code names: Skylake, Apollo Lake, Kaby Lake, Kaby Lake Refresh, Amber Lake, Coffee Lake, Coffee Lake Refresh, Whiskey Lake, Comet Lake, Gemini Lake, Gemini Lake Refresh.
- HD Graphics 530
- Iris Graphics 550
- HD Graphics 500
- HD Graphics 620
- Iris Plus Graphics 640
- UHD Graphics 630
- Iris Plus Graphics 655
- UHD Graphics 600
- Instruction Set Architecture, [webarchive], [backup]
- Compute Architecture of Intel Processor Graphics Gen9, [backup]
- [Graphics API Performance Guide for Intel Processor Graphics Gen9]https://cdrdv2-public.intel.com/671201/graphics-api-performance-guide-2-5.pdf), [backup]
- Branches:
On hardware with structured control flow instructions such as Intel, the loop break instruction does not always jump to the end of the loop. Instead, it removes the active invocations from some sort of internal execution mask to ensure that they get disabled on the next iteration of the loop. Once the final invocation is disabled (the execution mask goes to zero), the hardware jumps to the end of the loop. ref
- Each EU contains 2 x 128-bit FPUs.
- One FPU supports 32-bit and 64-bit integer, FP16, FP32, FP64, and transcendental math functions.
- Other FPU supports only 32-bit and 64-bit integer, FP16 and FP32.
- Each Subslice contains 8 EUs (two of which are disabled in GT1) and a sampler (4 tex/clk), and has 64 KB shared memory.
Result of Rainbow( gl_SubgroupInvocationID / gl_SubgroupSize )
in fragment shader, gl_SubgroupSize: 16.
Result of Rainbow( gl_SubgroupInvocationID / gl_SubgroupSize )
in compute shader, gl_SubgroupSize: 16, workgroup size: 8x8.