From 60d6d4fde12590231cfccb4c89cbae940060fe48 Mon Sep 17 00:00:00 2001 From: SamulKyull Date: Tue, 2 Jul 2024 18:30:48 +0800 Subject: [PATCH] delete unused files --- bsp/configs/linux-5.10/sun55iw3p1.dtsi | 5152 ---------------- bsp/configs/linux-5.15/arm64_min_defconfig | 102 - bsp/configs/linux-5.15/arm_min_defconfig | 85 - .../linux-5.15/debug_defconfig.fragment | 59 - .../linux-5.15/ftrace_defconfig.fragment | 4 - .../linux-5.15/lock_defconfig.fragment | 27 - bsp/configs/linux-5.15/mem_defconfig.fragment | 26 - bsp/configs/linux-5.15/sun55iw3p1.dtsi | 5310 ----------------- .../linux-5.15/sun55iw3p1_min_defconfig | 113 - .../sun55iw3p1_standby_min_defconfig | 132 - .../linux-6.1/android_min_ko_defconfig | 92 - bsp/configs/linux-6.1/sun55iw3p1.dtsi | 3672 ------------ .../linux-6.1/sun55iw3p1_min_defconfig | 108 - bsp/configs/linux-6.6/sun55iw3p1.dtsi | 173 - .../linux-6.6/sun55iw3p1_min_defconfig | 96 - 15 files changed, 15151 deletions(-) delete mode 100644 bsp/configs/linux-5.10/sun55iw3p1.dtsi delete mode 100644 bsp/configs/linux-5.15/arm64_min_defconfig delete mode 100644 bsp/configs/linux-5.15/arm_min_defconfig delete mode 100644 bsp/configs/linux-5.15/debug_defconfig.fragment delete mode 100644 bsp/configs/linux-5.15/ftrace_defconfig.fragment delete mode 100644 bsp/configs/linux-5.15/lock_defconfig.fragment delete mode 100644 bsp/configs/linux-5.15/mem_defconfig.fragment delete mode 100644 bsp/configs/linux-5.15/sun55iw3p1.dtsi delete mode 100644 bsp/configs/linux-5.15/sun55iw3p1_min_defconfig delete mode 100644 bsp/configs/linux-5.15/sun55iw3p1_standby_min_defconfig delete mode 100644 bsp/configs/linux-6.1/android_min_ko_defconfig delete mode 100644 bsp/configs/linux-6.1/sun55iw3p1.dtsi delete mode 100644 bsp/configs/linux-6.1/sun55iw3p1_min_defconfig delete mode 100644 bsp/configs/linux-6.6/sun55iw3p1.dtsi delete mode 100644 bsp/configs/linux-6.6/sun55iw3p1_min_defconfig diff --git a/bsp/configs/linux-5.10/sun55iw3p1.dtsi b/bsp/configs/linux-5.10/sun55iw3p1.dtsi deleted file mode 100644 index 14bf6ed8be..0000000000 --- a/bsp/configs/linux-5.10/sun55iw3p1.dtsi +++ /dev/null @@ -1,5152 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -/* - * Copyright (C) 2021 liujuan1@allwinnertech.com - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/ { - model = "sun55iw3"; - interrupt-parent = <&wakeupgen>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - serial5 = &uart5; - serial6 = &uart6; - serial7 = &uart7; - serial8 = &uart8; - serial9 = &uart9; - ir0 = &irrx; - ir1 = &s_irrx; - ir2 = &irtx; - pcie = &pcie; - gpadc0 = &gpadc0; - gpadc1 = &gpadc1; - twi0 = &twi0; - twi1 = &twi1; - twi2 = &twi2; - twi3 = &twi3; - twi4 = &twi4; - twi5 = &twi5; - twi6 = &twi6; - twi7 = &twi7; - twi8 = &twi8; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - spi3 = &r_spi0; - spif0 = &spif0; - nand0 = &nand0; - ve0 = &ve; - ve1 = &ve1; - sunxi-mmc0 = &sdc0; - sunxi-mmc2 = &sdc2; - gmac0 = &gmac0; - gmac1 = &gmac1; - edp0 = &edp0; - nsi0 = &nsi0; - }; - - reg_vdd_sys: vdd-sys { - compatible = "regulator-fixed"; - regulator-name = "vdd_sys"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-boot-on; - regulator-always-on; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - bl31 { - reg = <0x0 0x48000000 0x0 0x01000000>; - }; - }; - - firmware { - android { - compatible = "android,firmware"; - name = "android"; - boot_devices = "soc@3000000/4020000.sdmmc,soc@3000000/4022000.sdmmc,soc@3000000"; - vbmeta { - compatible = "android,vbmeta"; - parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot,init_boot"; - }; - }; - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x0>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - dynamic-power-coefficient = <286>; - }; - - cpu1: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x100>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - }; - - cpu2: cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x200>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - }; - - cpu3: cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x300>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - }; - - cpu4: cpu@400 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x400>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - dynamic-power-coefficient = <354>; - }; - - cpu5: cpu@500 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x500>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - }; - - cpu6: cpu@600 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x600>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - }; - - cpu7: cpu@700 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x700>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <&cpu0>; - }; - core1 { - cpu = <&cpu1>; - }; - core2 { - cpu = <&cpu2>; - }; - core3 { - cpu = <&cpu3>; - }; - }; - - cluster1 { - core0 { - cpu = <&cpu4>; - }; - core1 { - cpu = <&cpu5>; - }; - core2 { - cpu = <&cpu6>; - }; - core3 { - cpu = <&cpu7>; - }; - }; - }; - - idle-states { - entry-method = "arm,psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - entry-latency-us = <46>; - exit-latency-us = <59>; - min-residency-us = <3570>; - local-timer-stop; - }; - - CLUSTER_SLEEP_0: cluster-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <47>; - exit-latency-us = <74>; - min-residency-us = <5000>; - local-timer-stop; - }; - }; - }; - - - gpu_vf_mapping_table: gpu_vf_mapping_table { - table = < - 0x01 1 - 0x02 2 - 0x12 21 - 0x04 3 - 0x14 31 - 0x05 4 - 0x06 5 - >; - }; - - - cluster0_opp_table: cluster0-opp-table { - compatible = "allwinner,sun50i-operating-points"; - opp-shared; - - opp@408000000 { - opp-hz = /bits/ 64 <408000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <900000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@480000000 { - opp-hz = /bits/ 64 <480000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@672000000 { - opp-hz = /bits/ 64 <672000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@720000000 { - opp-hz = /bits/ 64 <720000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <900000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@792000000 { - opp-hz = /bits/ 64 <792000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@936000000 { - opp-hz = /bits/ 64 <936000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <900000>; - opp-microvolt-vf1 = <920000>; - opp-microvolt-vf2 = <920000>; - opp-microvolt-vf21 = <920000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@1008000000 { - opp-hz = /bits/ 64 <1008000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <960000>; - opp-microvolt-vf2 = <960000>; - opp-microvolt-vf21 = <960000>; - opp-microvolt-vf3 = <920000>; - opp-microvolt-vf31 = <920000>; - }; - - opp@1104000000 { - opp-hz = /bits/ 64 <1104000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <1000000>; - opp-microvolt-vf2 = <1000000>; - opp-microvolt-vf21 = <1000000>; - opp-microvolt-vf3 = <960000>; - opp-microvolt-vf31 = <960000>; - }; - - opp@1128000000 { - opp-hz = /bits/ 64 <1128000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <1000000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@1224000000 { - opp-hz = /bits/ 64 <1224000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <1050000>; - opp-microvolt-vf1 = <1050000>; - opp-microvolt-vf2 = <1050000>; - opp-microvolt-vf21 = <1050000>; - opp-microvolt-vf3 = <1000000>; - opp-microvolt-vf31 = <1000000>; - }; - - opp@1296000000 { - opp-hz = /bits/ 64 <1296000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <1100000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@1320000000 { - opp-hz = /bits/ 64 <1320000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <1120000>; - opp-microvolt-vf2 = <1120000>; - opp-microvolt-vf21 = <1120000>; - opp-microvolt-vf3 = <1050000>; - opp-microvolt-vf31 = <1050000>; - }; - - opp@1416000000 { - opp-hz = /bits/ 64 <1416000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <1150000>; - opp-microvolt-vf1 = <1150000>; - opp-microvolt-vf2 = <1150000>; - opp-microvolt-vf21 = <1150000>; - opp-microvolt-vf3 = <1100000>; - opp-microvolt-vf31 = <1100000>; - }; - }; - - cluster1_opp_table: cluster1-opp-table { - compatible = "allwinner,sun50i-operating-points"; - opp-shared; - - opp@408000000 { - opp-hz = /bits/ 64 <408000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <900000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@480000000 { - opp-hz = /bits/ 64 <480000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@672000000 { - opp-hz = /bits/ 64 <672000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@720000000 { - opp-hz = /bits/ 64 <720000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <900000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@840000000 { - opp-hz = /bits/ 64 <840000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@1008000000 { - opp-hz = /bits/ 64 <1008000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@1200000000 { - opp-hz = /bits/ 64 <1200000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <920000>; - opp-microvolt-vf2 = <920000>; - opp-microvolt-vf21 = <920000>; - opp-microvolt-vf3 = <920000>; - opp-microvolt-vf31 = <920000>; - }; - - opp@1248000000 { - opp-hz = /bits/ 64 <1248000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <900000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@1344000000 { - opp-hz = /bits/ 64 <1344000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <960000>; - opp-microvolt-vf2 = <960000>; - opp-microvolt-vf21 = <960000>; - opp-microvolt-vf3 = <960000>; - opp-microvolt-vf31 = <960000>; - }; - - opp@1488000000 { - opp-hz = /bits/ 64 <1488000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <1000000>; - opp-microvolt-vf1 = <1000000>; - opp-microvolt-vf2 = <1000000>; - opp-microvolt-vf21 = <1000000>; - opp-microvolt-vf3 = <1000000>; - opp-microvolt-vf31 = <1000000>; - }; - - opp@1584000000 { - opp-hz = /bits/ 64 <1584000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <1050000>; - opp-microvolt-vf1 = <1050000>; - opp-microvolt-vf2 = <1050000>; - opp-microvolt-vf21 = <1050000>; - opp-microvolt-vf3 = <1050000>; - opp-microvolt-vf31 = <1050000>; - }; - - opp@1680000000 { - opp-hz = /bits/ 64 <1680000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <1100000>; - opp-microvolt-vf1 = <1100000>; - opp-microvolt-vf2 = <1100000>; - opp-microvolt-vf21 = <1100000>; - opp-microvolt-vf3 = <1100000>; - opp-microvolt-vf31 = <1100000>; - }; - - opp@1800000000 { - opp-hz = /bits/ 64 <1800000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0 = <1150000>; - opp-microvolt-vf1 = <1150000>; - opp-microvolt-vf2 = <1150000>; - opp-microvolt-vf21 = <1150000>; - opp-microvolt-vf3 = <1150000>; - opp-microvolt-vf31 = <1150000>; - }; - }; - - dsufreq: dsufreq@0 { - compatible = "allwinner,sun55iw3-dsufreq"; - reg = <0x0 0x08815000 0x0 0x1000>; - clocks = <&cpupll_ccu CLK_PLL_CPU2>; - operating-points-v2 = <&dsu_opp_table>; - }; - - dsu_opp_table: dsu-opp-table { - compatible = "allwinner,dsu-operating-points"; - - opp@288000000 { - opp-hz = /bits/ 64 <288000000>; - opp-microvolt-vf0 = <900000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@432000000 { - opp-hz = /bits/ 64 <432000000>; - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@528000000 { - opp-hz = /bits/ 64 <528000000>; - opp-microvolt-vf0 = <900000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@696000000 { - opp-hz = /bits/ 64 <696000000>; - opp-microvolt-vf0 = <900000>; - opp-microvolt-vf1 = <900000>; - opp-microvolt-vf2 = <900000>; - opp-microvolt-vf21 = <900000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@792000000 { - opp-hz = /bits/ 64 <792000000>; - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <920000>; - opp-microvolt-vf2 = <920000>; - opp-microvolt-vf21 = <920000>; - opp-microvolt-vf3 = <900000>; - opp-microvolt-vf31 = <900000>; - }; - - opp@864000000 { - opp-hz = /bits/ 64 <864000000>; - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <960000>; - opp-microvolt-vf2 = <960000>; - opp-microvolt-vf21 = <960000>; - opp-microvolt-vf3 = <920000>; - opp-microvolt-vf31 = <920000>; - }; - - opp@936000000 { - opp-hz = /bits/ 64 <936000000>; - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <1000000>; - opp-microvolt-vf2 = <1000000>; - opp-microvolt-vf21 = <1000000>; - opp-microvolt-vf3 = <960000>; - opp-microvolt-vf31 = <960000>; - }; - - opp@984000000 { - opp-hz = /bits/ 64 <984000000>; - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <1050000>; - opp-microvolt-vf2 = <1050000>; - opp-microvolt-vf21 = <1050000>; - opp-microvolt-vf3 = <1000000>; - opp-microvolt-vf31 = <1000000>; - }; - - opp@1008000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt-vf0 = <1000000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@1056000000 { - opp-hz = /bits/ 64 <1056000000>; - opp-microvolt-vf0 = <0>; - opp-microvolt-vf1 = <1120000>; - opp-microvolt-vf2 = <1120000>; - opp-microvolt-vf21 = <1120000>; - opp-microvolt-vf3 = <1050000>; - opp-microvolt-vf31 = <1050000>; - }; - - opp@1104000000 { - opp-hz = /bits/ 64 <1104000000>; - opp-microvolt-vf0 = <1050000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@1128000000 { - opp-hz = /bits/ 64 <1128000000>; - opp-microvolt-vf0 = <1100000>; - opp-microvolt-vf1 = <0>; - opp-microvolt-vf2 = <0>; - opp-microvolt-vf21 = <0>; - opp-microvolt-vf3 = <0>; - opp-microvolt-vf31 = <0>; - }; - - opp@1152000000 { - opp-hz = /bits/ 64 <1152000000>; - opp-microvolt-vf0 = <1150000>; - opp-microvolt-vf1 = <1150000>; - opp-microvolt-vf2 = <1150000>; - opp-microvolt-vf21 = <1150000>; - opp-microvolt-vf3 = <1100000>; - opp-microvolt-vf31 = <1100000>; - }; - }; - - thermal-zones { - cpul_thermal_zone { - polling-delay-passive = <500>; - polling-delay = <1000>; - thermal-sensors = <&ths1 1>; - sustainable-power = <1200>; - - cpul_trips: trips { - cpul_threshold: trip-point@0 { - temperature = <70000>; - type = "passive"; - hysteresis = <0>; - }; - cpul_target: trip-point@1 { - temperature = <90000>; - type = "passive"; - hysteresis = <0>; - }; - cpul_crit: cpu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - - cooling-maps { - map0 { - trip = <&cpul_target>; - cooling-device = <&cpu0 - THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - contribution = <1024>; - }; - }; - }; - - cpub_thermal_zone { - polling-delay-passive = <500>; - polling-delay = <1000>; - thermal-sensors = <&ths1 0>; - sustainable-power = <1600>; - - cpub_trips: trips { - cpub_threshold: trip-point@0 { - temperature = <70000>; - type = "passive"; - hysteresis = <0>; - }; - cpub_target: trip-point@1 { - temperature = <90000>; - type = "passive"; - hysteresis = <0>; - }; - cpub_crit: cpu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - - cooling-maps { - map0 { - trip = <&cpub_target>; - cooling-device = <&cpu4 - THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - contribution = <1024>; - }; - }; - }; - - gpu_thermal_zone: gpu_thermal_zone { - polling-delay-passive = <100>; - polling-delay = <1000>; - thermal-sensors = <&ths1 2>; - sustainable-power = <2400>; - - gpu_trips: trips { - gpu_threshold: trip-point@0 { - temperature = <60000>; - type = "passive"; - hysteresis = <0>; - }; - gpu_target: trip-point@1 { - temperature = <90000>; - type = "passive"; - hysteresis = <0>; - }; - gpu_crit: gpu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - - cooling-maps { - map0 { - trip = <&gpu_target>; - cooling-device = <&gpu - THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - contribution = <1024>; - }; - }; - }; - - npu_thermal_zone { - polling-delay-passive = <500>; - polling-delay = <1000>; - thermal-sensors = <&ths1 3>; - }; - - ddr_thermal_zone { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&ths0 0>; - }; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - dcxo24M: dcxo24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "dcxo24M"; - }; - - rc_16m: rc16m_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <16000000>; - clock-accuracy = <300000000>; - clock-output-names = "rc-16m"; - }; - - ext_32k: ext32k_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "ext-32k"; - }; - - gic: interrupt-controller@3400000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0x03400000 0 0x10000>, /* GIC Dist */ - <0x0 0x03460000 0 0xFF004>; /* GIC Re */ - interrupt-parent = <&gic>; - }; - - wakeupgen: interrupt-controller@0 { - compatible = "allwinner,sunxi-wakeupgen"; - interrupt-controller; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-parent = <&gic>; - }; - - timer_arch { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - clock-frequency = <24000000>; - interrupt-parent = <&gic>; - arm,no-tick-in-suspend; - }; - - power: power-management@7001400 { - compatible = "allwinner,a523-pmu", "syscon", "simple-mfd"; - reg = <0x0 0x07001400 0x0 0x400>; - - pd: power-controller { - compatible = "allwinner,a523-power-controller"; - clocks = <&r_ccu CLK_R_PPU1>; - clock-names = "ppu"; - resets = <&r_ccu RST_R_PPU1>; - reset-names = "ppu_rst"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd_dsp@A523_PD_DSP { - reg = ; - }; - pd_npu@A523_PD_NPU { - reg = ; - }; - pd_sram@A523_PD_SRAM { - reg = ; - }; - pd_riscv@A523_PD_RISCV { - reg = ; - }; - }; - }; - - pck: pck-600@7060000 { - compatible = "allwinner,a523-pck", "syscon", "simple-mfd"; - reg = <0x0 0x07060000 0x0 0x8000>; - - pd1: power-controller { - compatible = "allwinner,a523-pck-600"; - clocks = <&r_ccu CLK_R_PPU>; - clock-names = "pck"; - resets = <&r_ccu RST_R_PPU>; - reset-names = "pck_rst"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd1_ve@A523_PCK_VE { - reg = ; - }; - pd1_vi@A523_PCK_VI { - reg = ; - }; - pd1_vo0@A523_PCK_VO0 { - reg = ; - }; - pd1_vo1@A523_PCK_VO1 { - reg = ; - }; - pd1_de@A523_PCK_DE { - reg = ; - }; - pd1_nand@A523_PCK_NAND { - reg = ; - }; - pd1_pcie@A523_PCK_PCIE { - reg = ; - }; - }; - }; - - nmi_intc: intc-nmi@7010320 { - compatible = "allwinner,sun8i-nmi"; - interrupt-parent = <&gic>; - #interrupt-cells = <2>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0x07010320 0 0xc>; - interrupts = ; - }; - - mmu_aw: iommu@2010000 { - compatible = "allwinner,iommu-v15-sun55iw3"; - reg = <0x0 0x02010000 0x0 0x1000>; - interrupts = ; - interrupt-names = "iommu-irq"; - clocks = <&ccu CLK_IOMMU>; - clock-names = "iommu"; - /* clock-frequency = <24000000>; */ - #iommu-cells = <2>; - }; - - dram: dram { - compatible = "allwinner,dram"; - clocks = <&ccu CLK_PLL_DDR>; - clock-names = "pll_ddr"; - }; - - ddr_clk: clk_ddr { - compatible = "allwinner,clock_ddr"; - reg = <0x0 0x02001000 0x0 0x1000>; - clocks = <&ccu CLK_PLL_DDR>; - clock-names = "pll_ddr"; - #clock-cells = <0>; - }; - - dram_opp_table: opp_table { - compatible = "operating-points-v2"; - opp@150000000 { - opp-hz = /bits/ 64 <150000000>; - clock-latency-ns = <150000>; - opp-microvolt = <900000>; - }; - }; - - sunxi_dmcfreq: dmcfreq@3120000 { - compatible = "allwinner,sun55iw3-dmc", "syscon"; - reg = <0x0 0x03120000 0x0 0x11000>, - <0x0 0x02020000 0x0 0x4000>; - interrupts = ; - clocks = <&ddr_clk>, <&ccu CLK_NSI>; - clock-names = "dram", "bus"; - operating-points-v2 = <&dram_opp_table>; - upthreshold = <60>; - downdifferential = <20>; - vddcore-supply = <®_vdd_sys>; - normalvoltage = <900000>; - boostvoltage = <900000>; - }; - - soc: soc@3000000 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rt-media@1c0e000 { - compatible = "allwinner,rt-media"; - }; - - ve: ve@1c0e000 { - compatible = "allwinner,sunxi-cedar-ve"; - reg = <0x0 0x01c0e000 0x0 0x1000>, - <0x0 0x03000000 0x0 0x10>; - interrupts = ; - clocks =<&ccu CLK_BUS_VE>, <&ccu CLK_VE>, <&ccu CLK_VE_MBUS_GATE>; - clock-names = "bus_ve", "ve", "mbus_ve"; - resets = <&ccu RST_BUS_VE>; - reset-names = "reset_ve"; - iommus = <&mmu_aw 2 1>; - power-domains = <&pd1 A523_PCK_VE>; - }; - - ve1: ve1@1c0e000 { - compatible = "allwinner,sunxi-cedar-ve"; - iommus = <&mmu_aw 3 1>; - }; - - pd_ve_test: pd-ve-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_VE>; - status = "okay"; - }; - - pd_vi_test: pd-vi-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_VI>; - status = "okay"; - }; - - pd_vo0_test: pd-vo0-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_VO0>; - status = "okay"; - }; - - pd_vo1_test: pd-vo1-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_VO1>; - status = "okay"; - }; - - pd_de_test: pd-de-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_DE>; - status = "okay"; - }; - - pd_nand_test: pd-nand-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_NAND>; - status = "okay"; - }; - - pd_pcie_test: pd-pcie-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_PCIE>; - status = "okay"; - }; - - pd_dsp_test: pd-dsp-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd A523_PD_DSP>; - status = "okay"; - }; - - pd_npu_test: pd-npu-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd A523_PD_NPU>; - status = "okay"; - }; - - pd_sram_test: pd-sram-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd A523_PD_SRAM>; - status = "okay"; - }; - - pd_riscv_test: pd-riscv-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd A523_PD_RISCV>; - status = "okay"; - }; - - test_ccu: test_ccu@3000090 { - compatible = "allwinner,sun55iw3-test-ccu"; - device_type = "ccu-test"; - resets = <&ccu RST_BUS_UART7>, <&ccu RST_BUS_UART6>; - reset-names = "rst-uart7", "rst-uart6"; - reg = <0x0 0x3000090 0x0 0x8>; - #clock-cells = <1>; - }; - - rtc_ccu: rtc_ccu@7090000 { - compatible = "allwinner,sun55iw3-rtc-ccu"; - reg = <0x0 0x07090000 0x0 0x400>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - cpupll_ccu: clock@8817000 { - compatible = "allwinner,sun55iw3-cpupll"; - reg = <0x0 0x08817000 0x0 0x4000>; - #clock-cells = <1>; - #reset-cells = <1>; - pll_step = <0x9>; - /* pll_ssc will divid pll_ssc_scale in code - * keep value 0 < pll_ssc < 10 - */ - pll_ssc_scale = <0xa>; - pll_ssc = <0x1>; - }; - - ccu: ccu@2001000 { - compatible = "allwinner,sun55iw3-ccu"; - reg = <0x0 0x02001000 0x0 0x1000>; - clocks = <&dcxo24M>, <&rtc_ccu CLK_OSC32K>, <&rc_16m>; - clock-names = "hosc", "losc", "iosc"; - #clock-cells = <1>; - #reset-cells = <1>; - /* - * sdm info: - * for example: - * pll_npux4 { - * sdm-enable = <1>; // required - * sdm-factor = <4>; // required - * freq-mod = ; // optional: default TR_N - * sdm-freq = ; // optional: default FREQ_31_5 - * }; - */ - }; - - r_ccu: r_ccu@7010000 { - compatible = "allwinner,sun55iw3-r-ccu"; - reg = <0x0 0x07010000 0x0 0x230>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mcu_ccu: mcu_ccu@7102000 { - compatible = "allwinner,sun55iw3-mcu-ccu"; - reg = <0x0 0x07102000 0x0 0x165>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - sunxi_drm: sunxi-drm { - compatible = "allwinner,sunxi-drm"; - fb_base = <0>; - status = "okay"; - }; - - de: de@5000000 { - compatible = "allwinner,display-engine"; - iommus = <&mmu_aw 5 1>; - power-domains = <&pd1 A523_PCK_DE>; - reg = <0x0 0x5000000 0x0 0x400000>; - interrupts = ; - clocks = <&ccu CLK_DE>, - <&ccu CLK_DE0>; - clock-names = "clk_de", - "clk_bus_de"; - resets = <&ccu RST_BUS_DE0>; - reset-names = "rst_bus_de"; - assigned-clocks = <&ccu CLK_DE>; - assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>; - assigned-clock-rates = <600000000>; - status = "okay"; - ports { - #address-cells = <1>; - #size-cells = <0>; - disp0: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - disp0_out_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_in_disp0>; - }; - disp0_out_tcon1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon1_in_disp0>; - }; - disp0_out_tcon2: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon2_in_disp0>; - }; - disp0_out_tcon3: endpoint@3 { - reg = <3>; - remote-endpoint = <&tcon3_in_disp0>; - }; - disp0_out_tcon4: endpoint@4 { - reg = <4>; - remote-endpoint = <&tcon4_in_disp0>; - }; - }; - disp1: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - disp1_out_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_in_disp1>; - }; - disp1_out_tcon1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon1_in_disp1>; - }; - disp1_out_tcon2: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon2_in_disp1>; - }; - disp1_out_tcon3: endpoint@3 { - reg = <3>; - remote-endpoint = <&tcon3_in_disp1>; - }; - disp1_out_tcon4: endpoint@4 { - reg = <4>; - remote-endpoint = <&tcon4_in_disp1>; - }; - }; - }; - }; - vo0: vo0@5500000 { - compatible = "allwinner,tcon-top0"; - power-domains = <&pd1 A523_PCK_VO0>; - reg = <0x0 0x05500000 0x0 0xfff>; - clocks = <&ccu CLK_DPSS_TOP0>; - clock-names = "clk_bus_dpss_top"; - resets = <&ccu RST_BUS_DPSS_TOP0>; - reset-names = "rst_bus_dpss_top"; - status = "disabled"; - }; - - vo1: vo1@5730000 { - compatible = "allwinner,tcon-top1"; - power-domains = <&pd1 A523_PCK_VO1>; - reg = <0x0 0x05730000 0x0 0xfff>; - clocks = <&ccu CLK_DPSS_TOP1>; - clock-names = "clk_bus_dpss_top"; - resets = <&ccu RST_BUS_DPSS_TOP1>; - reset-names = "rst_bus_dpss_top"; - status = "disabled"; - }; - - dlcd0: tcon0@5501000 { - compatible = "allwinner,tcon-lcd"; - reg = <0x0 0x05501000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_VO0_TCONLCD0>, - <&ccu CLK_BUS_VO0_TCONLCD0>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_VO0_TCONLCD0>, - <&ccu RST_BUS_LVDS0>; - reset-names = "rst_bus_tcon", "rst_bus_lvds"; - top = <&vo0>; - phys = <&dsi0combophy>, <&dsi1combophy>; - phy-names = "lvds_combo_phy0", "lvds_combo_phy1"; - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon0_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - tcon0_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon0>; - }; - tcon0_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon0>; - }; - }; - tcon0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - tcon0_out_dsi0: endpoint@0 { - reg = <0>; - remote-endpoint = <&dsi0_in_tcon0>; - }; - tcon0_out_dsi1: endpoint@1 { - reg = <1>; - remote-endpoint = <&dsi1_in_tcon0>; - }; - }; - }; - }; - - dlcd1: tcon1@5502000 { - compatible = "allwinner,tcon-lcd"; - reg = <0x0 0x05502000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_VO0_TCONLCD1>, - <&ccu CLK_BUS_VO0_TCONLCD1>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_VO0_TCONLCD1>; - reset-names = "rst_bus_tcon"; - top = <&vo0>; - status = "disabled"; - // TODO find panel used of_graph? - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon1_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - tcon1_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon1>; - }; - tcon1_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon1>; - }; - }; - tcon1_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - tcon1_out_dsi1: endpoint@0 { - reg = <0>; - remote-endpoint = <&dsi1_in_tcon1>; - }; - }; - }; - }; - - dlcd2: tcon4@5731000 { - compatible = "allwinner,tcon-lcd"; - reg = <0x0 0x05731000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_VO1_TCONLCD0>, - <&ccu CLK_BUS_VO1_TCONLCD0>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_VO1_TCONLCD0>, - <&ccu RST_BUS_LVDS1>; - reset-names = "rst_bus_tcon", - "rst_bus_lvds"; - top = <&vo1>; - phys = <&dsi0combophy>, <&dsi1combophy>; - phy-names = "lvds_combo_phy0", "lvds_combo_phy1"; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon4_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - tcon4_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon4>; - }; - tcon4_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon4>; - }; - }; - tcon4_out: port@1 { - reg = <1>; - /* tcon4_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&xxxxx>; - }*/ - }; - }; - }; - - dsi0combophy: phy@5507000 { - compatible = "allwinner,sunxi-dsi-combo-phy0"; - reg = <0x0 0x05507000 0x0 0x1ff>; - clocks = <&ccu CLK_DSI0>, - <&ccu CLK_BUS_DSI0>, - <&ccu CLK_COMBPHY0>; - clock-names = "clk_mipi_dsi", - "clk_bus_mipi_dsi", - "clk_mipi_dsi_combphy"; - resets = <&ccu RST_BUS_DSI0>; - reset-names = "rst_bus_mipi_dsi"; - #phy-cells = <0>; - status = "disabled"; - }; - - dsi0: dsi0@5506000 { - compatible = "allwinner,dsi0"; - reg = <0x0 0x05506000 0x0 0xfff>; - interrupts = ; - clocks = <&ccu CLK_DSI0>, - <&ccu CLK_BUS_DSI0>, - <&ccu CLK_COMBPHY0>; - clock-names = "clk_mipi_dsi", - "clk_bus_mipi_dsi", - "clk_mipi_dsi_combphy"; - resets = <&ccu RST_BUS_DSI0>; - reset-names = "rst_bus_mipi_dsi"; - phys = <&dsi0combophy>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - dsi0_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - dsi0_in_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_out_dsi0>; - }; - }; - }; - }; - - dsi1combophy: phy@5509000 { - compatible = "allwinner,sunxi-dsi-combo-phy1"; - reg = <0x0 0x05509000 0x0 0x1ff>; - - clocks = <&ccu CLK_DSI1>, - <&ccu CLK_BUS_DSI1>, - <&ccu CLK_COMBPHY1>; - clock-names = "clk_mipi_dsi", - "clk_bus_mipi_dsi", - "clk_mipi_dsi_combphy"; - resets = <&ccu RST_BUS_DSI1>; - reset-names = "rst_bus_mipi_dsi"; - #phy-cells = <0>; - status = "disabled"; - }; - - dsi1: dsi1@5508000 { - compatible = "allwinner,dsi1"; - reg = <0x0 0x05508000 0x0 0xfff>; - interrupts = ; - clocks = <&ccu CLK_DSI1>, - <&ccu CLK_BUS_DSI1>, - <&ccu CLK_COMBPHY1>; - clock-names = "clk_mipi_dsi", - "clk_bus_mipi_dsi", - "clk_mipi_dsi_combphy"; - resets = <&ccu RST_BUS_DSI1>; - reset-names = "rst_bus_mipi_dsi"; - phys = <&dsi1combophy>; - - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - dsi1_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - dsi1_in_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_out_dsi1>; - }; - dsi1_in_tcon1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon1_out_dsi1>; - }; - }; - }; - }; - - tv0: tcon2@5503000 { - compatible = "allwinner,tcon-tv-hdmi"; - reg = <0x0 0x05503000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_TCONTV>, - <&ccu CLK_BUS_TCONTV>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_TCONTV>; - reset-names = "rst_bus_tcon"; - top = <&vo0>; - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon2_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - tcon2_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon2>; - }; - tcon2_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon2>; - }; - }; - tcon2_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - tcon2_out_hdmi: endpoint@0 { - reg = <0>; - remote-endpoint = <&hdmi_in_tcon2>; - }; - }; - }; - }; - - hdmi: hdmi@5520000 { - compatible = "allwinner,sunxi-hdmi"; - reg = <0x0 0x05520000 0x0 0x100000>; - interrupts = ; - clocks = <&ccu CLK_HDMI>, - <&ccu CLK_HDMI_24M>, - <&ccu CLK_HDMI_CEC>, - <&ccu CLK_TCONTV>; - clock-names = "clk_hdmi", - "clk_hdmi_24M", - "clk_cec", - "clk_tcon_tv"; - resets = <&ccu RST_BUS_HDMI_SUB>, <&ccu RST_BUS_HDMI_MAIN>; - reset-names = "rst_bus_sub", "rst_bus_main"; - assigned-clocks = <&ccu CLK_HDMI>; - assigned-clock-rates = <0>, <0>; - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - hdmi_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - hdmi_in_tcon2: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon2_out_hdmi>; - }; - }; - }; - }; - - tv1: tcon3@5504000 { - compatible = "allwinner,tcon-tv-edp"; - reg = <0x0 0x05504000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_TCONTV1>, - <&ccu CLK_BUS_TCONTV1>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_TCONTV1>; - reset-names = "rst_bus_tcon"; - top = <&vo0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon3_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - tcon3_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon3>; - }; - tcon3_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon3>; - }; - }; - tcon3_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - tcon3_out_edp: endpoint@0 { - reg = <0>; - remote-endpoint = <&edp_in_tcon3>; - }; - }; - }; - }; - - drm_edp: drm_edp@5720000 { - compatible = "allwinner,drm-edp"; - reg = <0x0 0x05720000 0x0 0x4000>; - interrupts = ; - clocks = <&ccu CLK_BUS_EDP>, - <&ccu CLK_EDP>, - <&ccu CLK_HDMI_24M>; - clock-names = "clk_bus_edp", "clk_edp", "clk_24m_edp"; - resets = <&ccu RST_BUS_EDP>; - reset-names = "rst_bus_edp"; - - assigned-clocks = <&ccu CLK_EDP>; - assigned-clock-parents = <&ccu CLK_PLL_VIDEO1_4X>; - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - edp_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - edp_in_tcon3: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon3_out_edp>; - }; - }; - edp_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; -/* edp_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&edp_panel>; - };*/ - }; - }; - /* edp_panel: panel@0 { - reg = <0>; - ports { - #address-cells = <1>; - #size-cells = <0>; - edp_panel_in: port@0 { - reg = <0>; - edp_panel_in_edp: endpoint@0 { - reg = <0>; - remote-endpoint = <&edp_out_panel>; - }; - }; - }; - }*/ - }; - - disp: disp@5000000 { - compatible = "allwinner,sunxi-disp"; - reg = <0x0 0x05000000 0x0 0x400000>, /*de*/ - <0x0 0x05500000 0x0 0x1000>, /* display_if_top */ - <0x0 0x05501000 0x0 0x1000>, /* tcon0 - tcon_lcd0 */ - <0x0 0x05502000 0x0 0x1000>, /* tcon1 - tcon_lcd1 */ - <0x0 0x05503000 0x0 0x1000>, /* tcon2 - tcon_tv0 */ - <0x0 0x05504000 0x0 0x1000>, /* tcon3 - tcon_tv1 */ - <0x0 0x05731000 0x0 0x1000>, /* tcon4 - tcon_lcd2 */ - <0x0 0x05506000 0x0 0x1fff>, /* dsi0 */ - <0x0 0x05508000 0x0 0x1fff>; /* dsi1 */ - interrupts = , /* DE */ - , /* tcon_lcd0 */ - , /* tcon_lcd1 */ - , /* tcon_tv0 */ - , /* tcon_tv1 */ - , /* tcon_lcd2 */ - , /* dsi0 */ - ; /* dsi1 */ - clocks = <&ccu CLK_DE>, - <&ccu CLK_DE>, - <&ccu CLK_DE0>, - <&ccu CLK_DE0>, - <&ccu CLK_VO0_TCONLCD0>, - <&ccu CLK_VO0_TCONLCD1>, - <&ccu CLK_TCONTV>, - <&ccu CLK_TCONTV1>, - <&ccu CLK_VO1_TCONLCD0>, - <&ccu CLK_BUS_VO0_TCONLCD0>, - <&ccu CLK_BUS_VO0_TCONLCD1>, - <&ccu CLK_BUS_TCONTV>, - <&ccu CLK_BUS_TCONTV1>, - <&ccu CLK_BUS_VO1_TCONLCD0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP1>, - <&ccu CLK_DSI0>, - <&ccu CLK_DSI1>, - <&ccu CLK_BUS_DSI0>, - <&ccu CLK_BUS_DSI1>, - <&ccu CLK_COMBPHY0>, - <&ccu CLK_COMBPHY1>; - clock-names = "clk_de0", - "clk_de1", - "clk_bus_de0", - "clk_bus_de1", - "clk_tcon0", - "clk_tcon1", - "clk_tcon2", - "clk_tcon3", - "clk_tcon4", - "clk_bus_tcon0", - "clk_bus_tcon1", - "clk_bus_tcon2", - "clk_bus_tcon3", - "clk_bus_tcon4", - "clk_bus_dpss_top0", - "clk_bus_dpss_top1", - "clk_bus_dpss_top2", - "clk_bus_dpss_top3", - "clk_bus_dpss_top4", - "clk_mipi_dsi0", - "clk_mipi_dsi1", - "clk_bus_mipi_dsi0", - "clk_bus_mipi_dsi1", - "clk_mipi_dsi_combphy0", - "clk_mipi_dsi_combphy1"; - resets = <&ccu RST_BUS_DE0>, - <&ccu RST_BUS_DE0>, - <&ccu RST_BUS_VO0_TCONLCD0>, - <&ccu RST_BUS_VO0_TCONLCD1>, - <&ccu RST_BUS_TCONTV>, - <&ccu RST_BUS_TCONTV1>, - <&ccu RST_BUS_VO1_TCONLCD0>, - <&ccu RST_BUS_LVDS0>, - <&ccu RST_BUS_LVDS1>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP1>, - <&ccu RST_BUS_DSI0>, - <&ccu RST_BUS_DSI1>; - reset-names = "rst_bus_de0", - "rst_bus_de1", - "rst_bus_tcon0", - "rst_bus_tcon1", - "rst_bus_tcon2", - "rst_bus_tcon3", - "rst_bus_tcon4", - "rst_bus_lvds0", - "rst_bus_lvds1", - "rst_bus_dpss_top0", - "rst_bus_dpss_top1", - "rst_bus_dpss_top2", - "rst_bus_dpss_top3", - "rst_bus_dpss_top4", - "rst_bus_mipi_dsi0", - "rst_bus_mipi_dsi1"; - assigned-clocks = <&ccu CLK_DE>, - <&ccu CLK_VO0_TCONLCD0>, - <&ccu CLK_VO0_TCONLCD1>, - <&ccu CLK_VO1_TCONLCD0>, - <&ccu CLK_BUS_TCONTV>, - <&ccu CLK_TCONTV>, - <&ccu CLK_TCONTV1>, - <&ccu CLK_DSI0>, - <&ccu CLK_DSI1>, - <&ccu CLK_COMBPHY0>, - <&ccu CLK_COMBPHY1>; - assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO1_4X>, - <&ccu CLK_PLL_VIDEO1_4X>, - <&ccu CLK_PLL_PERI0_150M>, - <&ccu CLK_PLL_PERI0_150M>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>; - assigned-clock-rates = <600000000>; - iommus = <&mmu_aw 5 0>; - /*power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>, <&pd1 A523_PCK_VO1>; - power-domain-names = "pd_de", "pd_vo0", "pd_vo1";*/ - power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>; - power-domain-names = "pd_de", "pd_vo0"; - status = "okay"; - - boot_disp = <0>; - fb_base = <0>; - }; - - edp0: edp0@5720000 { - compatible = "allwinner,sunxi-edp0"; - reg = <0x0 0x05720000 0x0 0x4000>; - interrupts = ; - clocks = <&ccu CLK_BUS_EDP>, - <&ccu CLK_EDP>, - <&ccu CLK_HDMI_24M>; - clock-names = "clk_bus_edp", "clk_edp", "edp_clk_24m"; - resets = <&ccu RST_BUS_EDP>; - reset-names = "rst_bus_edp"; - - assigned-clocks = <&ccu CLK_EDP>; - assigned-clock-parents = <&ccu CLK_PLL_VIDEO1_4X>; - - status = "disabled"; - }; - - - lcd0: lcd0@1c0c000 { - compatible = "allwinner,sunxi-lcd0"; - /* Fake registers to avoid dtc compiling warnings */ - reg = <0x0 0x1c0c000 0x0 0x0>; - pinctrl-names = "active","sleep"; - }; - - lcd1: lcd1@1c0c000 { - compatible = "allwinner,sunxi-lcd1"; - /* Fake registers to avoid dtc compiling warnings */ - reg = <0x0 0x1c0c000 0x0 0x0>; - pinctrl-names = "active","sleep"; - }; - - lcd2: lcd2@1c0c000 { - compatible = "allwinner,sunxi-lcd2"; - /* Fake registers to avoid dtc compiling warnings */ - reg = <0x0 0x1c0c000 0x0 0x0>; - pinctrl-names = "active","sleep"; - }; - - r_pio: pinctrl@7022000 { - #address-cells = <1>; - compatible = "allwinner,sun55iw3-r-pinctrl"; - reg = <0x0 0x07022000 0x0 0x800>; - interrupts = , /* GPIOL */ - ; /* GPIOM */ - clocks = <&ccu CLK_R_APBS1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - }; - - g2d: g2d@5440000 { - compatible = "allwinner,sunxi-g2d"; - reg = <0x0 0x05440000 0x0 0x30000>; - interrupts = ; - clocks = <&ccu CLK_BUS_G2D>, <&ccu CLK_G2D>; - clock-names = "bus", "g2d"; - resets = <&ccu RST_BUS_G2D>; - iommus = <&mmu_aw 4 1>; - power-domains = <&pd1 A523_PCK_VO0>; - power-domain-names = "pd1_vo0"; - assigned-clocks = <&ccu CLK_G2D>; - assigned-clock-rates = <300000000>; - }; - - pio: pinctrl@2000000 { - #address-cells = <1>; - compatible = "allwinner,sun55iw3-pinctrl"; - reg = <0x0 0x02000000 0x0 0x800>; - interrupts = , /* GPIOB */ - , /* GPIOC */ - , /* GPIOD */ - , /* GPIOE */ - , /* GPIOF */ - , /* GPIOG */ - , /* GPIOH */ - , /* GPIOI */ - , /* GPIOJ */ - ; /* GPIOK */ - clocks = <&ccu CLK_APB1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - - sdc0_pins_a: sdc0@0 { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "sdc0"; - drive-strength = <40>; - bias-pull-up; - power-source = <3300>; - }; - - sdc0_pins_b: sdc0@1 { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "sdc0"; - drive-strength = <40>; - bias-pull-up; - power-source = <1800>; - }; - - sdc0_pins_c: sdc0@2 { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "gpio_in"; - power-source = <3300>; - }; - - /* TODO: add jtag pin */ - sdc0_pins_d: sdc0@3 { - pins = "PF2", "PF4"; - function = "uart0"; - drive-strength = <10>; - bias-pull-up; - power-source = <3300>; - }; - - sdc0_pins_e: sdc0@4 { - pins = "PF0", "PF1", "PF3", - "PF5"; - function = "jtag"; - drive-strength = <10>; - bias-pull-up; - power-source = <3300>; - }; - - sdc1_pins_a: sdc1@0 { - pins = "PG0", "PG1", "PG2", - "PG3", "PG4", "PG5"; - function = "sdc1"; - drive-strength = <40>; - bias-pull-up; - }; - - sdc1_pins_b: sdc1@1 { - pins = "PG0", "PG1", "PG2", - "PG3", "PG4", "PG5"; - function = "gpio_in"; - }; - - sdc2_pins_a: sdc2@0 { - pins = "PC1", "PC5", "PC6", - "PC8", "PC9", "PC10", "PC11", - "PC13", "PC14", "PC15", "PC16"; - function = "sdc2"; - drive-strength = <40>; - bias-pull-up; - }; - - sdc2_pins_b: sdc2@1 { - pins = "PC0", "PC1", "PC5", "PC6", - "PC8", "PC9", "PC10", "PC11", - "PC13", "PC14", "PC15", "PC16"; - function = "gpio_in"; - }; - - sdc2_pins_c: sdc2@2 { - pins = "PC0"; - function = "sdc2"; - drive-strength = <40>; - bias-pull-down; - }; - - uart1_pins_a: uart1@0 { - pins = "PG6", "PG7", "PG8", "PG9"; - function = "uart1"; - drive-strength = <10>; - bias-pull-up; - }; - - uart1_pins_b: uart1@1 { - pins = "PG6", "PG7", "PG8", "PG9"; - function = "gpio_in"; - }; - - dsi0_4lane_pins_a: dsi0_4lane@0 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; - function = "dsi0"; - drive-strength = <30>; - bias-disable; - }; - - dsi0_4lane_pins_b: dsi0_4lane@1 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; - function = "io_disabled"; - bias-disable; - }; - - dsi1_4lane_pins_a: dsi1_4lane@0 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "dsi1"; - drive-strength = <30>; - bias-disable; - }; - - dsi1_4lane_pins_b: dsi1_4lane@1 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "io_disabled"; - bias-disable; - }; - - rgb18_pins_a: rgb18@0 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ - "PD20", "PD21"; - function = "lcd0"; - drive-strength = <30>; - }; - - rgb18_pins_b: rgb18@1 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ - "PD20", "PD21"; - function = "gpio_in"; - }; - - lvds1_pins_a: lvds1@0 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "lvds1"; - drive-strength = <30>; - }; - - lvds1_pins_b: lvds1@1 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "gpio_in"; - }; - - lvds2_pins_a: lvds2@0 { - pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9"; - function = "lvds2"; - drive-strength = <30>; - }; - - lvds2_pins_b: lvds2@1 { - pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9"; - function = "gpio_in"; - }; - - lvds3_pins_a: lvds3@0 { - pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; - function = "lvds3"; - drive-strength = <30>; - }; - - lvds3_pins_b: lvds3@1 { - pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; - function = "gpio_in"; - }; - csi_mclk0_pins_a: csi_mclk0@0 { - pins = "PE0"; - function = "mipi0"; - drive-strength = <20>; - }; - - csi_mclk0_pins_b: csi_mclk0@1 { - pins = "PE0"; - function = "gpio_in"; - }; - - csi_mclk1_pins_a: csi_mclk1@0 { - pins = "PE5"; - function = "mipi1"; - drive-strength = <20>; - }; - - csi_mclk1_pins_b: csi_mclk1@1 { - pins = "PE5"; - function = "gpio_in"; - }; - - csi_mclk2_pins_a: csi_mclk2@0 { - pins = "PE15"; - function = "mipi2"; - drive-strength = <20>; - }; - - csi_mclk2_pins_b: csi_mclk2@1 { - pins = "PE15"; - function = "gpio_in"; - }; - - csi_mclk3_pins_a: csi_mclk3@0 { - pins = "PE10"; - function = "mipi3"; - drive-strength = <20>; - }; - - csi_mclk3_pins_b: csi_mclk3@1 { - pins = "PE10"; - function = "gpio_in"; - }; - - ncsi_bt656_pins_a: ncsi_BT656@0 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23"; - function = "ncsi"; - drive-strength = <20>; - }; - - ncsi_bt656_pins_b: ncsi_BT656@1 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23"; - function = "gpio_in"; - }; - - ncsi_bt1120_pins_a: ncsi_BT1120@0 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23", - "PE6", "PE7", "PE8", "PE9", - "PE10", "PE11", "PE12", "PE15"; - function = "ncsi"; - drive-strength = <20>; - }; - - ncsi_bt1120_pins_b: ncsi_BT1120@1 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23", - "PE6", "PE7", "PE8", "PE9", - "PE10", "PE11", "PE12", "PE15"; - function = "gpio_in"; - }; - - mipia_pins_a: mipia@0 { - pins = "PK0", "PK1", "PK2", - "PK3", "PK4", "PK5"; - function = "mcsia"; - drive-strength = <10>; - - }; - - mipia_pins_b: mipia@1 { - pins = "PK0", "PK1", "PK2", - "PK3", "PK4", "PK5"; - function = "gpio_in"; - }; - - mipib_pins_a: mipib@0 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "mcsib"; - drive-strength = <10>; - }; - - mipib_pins_b: mipib@1 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "gpio_in"; - - }; - - mipib_4lane_pins_a: mipib_4lane@0 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "mcsib"; - drive-strength = <10>; - }; - - mipib_4lane_pins_b: mipib_4lane@1 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "gpio_in"; - }; - - mipic_pins_a: mipic@0 { - pins = "PK12", "PK13", "PK14", - "PK15", "PK16", "PK17"; - function = "mcsic"; - drive-strength = <10>; - - }; - - mipic_pins_b: mipic@1 { - pins = "PK12", "PK13", "PK14", - "PK15", "PK16", "PK17"; - function = "gpio_in"; - }; - - mipid_pins_a: mipid@0 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "mcsid"; - drive-strength = <10>; - }; - - mipid_pins_b: mipid@1 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "gpio_in"; - - }; - - mipid_4lane_pins_a: mipid_4lane@0 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "mcsid"; - drive-strength = <10>; - }; - - mipid_4lane_pins_b: mipid_4lane@1 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "gpio_in"; - }; - - test_pins_a: test_pins@0 { - pins = "PB2", "PB5"; - function = "test"; - drive-strength = <10>; - bias-pull-up; - }; - - test_pins_b: test_pins@1 { - pins = "PB2", "PB5"; - function = "gpio_in"; - }; - }; - - pinctrl_test: pinctrl_test@2000000 { - reg = <0x0 0x0 0x0 0x0>; - compatible = "allwinner,sunxi-pinctrl-test"; - device_type = "pinctrl-test"; - pinctrl-0 = <&test_pins_a>; - pinctrl-1 = <&test_pins_b>; - pinctrl-names = "default", "sleep"; - test-gpios = <&pio PB 4 GPIO_ACTIVE_LOW>; - suspend-gpios = <&r_pio PL 4 GPIO_ACTIVE_LOW>; - wakeup-source; - interrupt-parent = <&pio>; - interrupts = ; - }; - - ths0: ths0@200a000 { - compatible = "allwinner,sun55iw3p1-ths0"; - reg = <0x0 0x0200a000 0x0 0x400>; - clocks = <&ccu CLK_THS>, <&ccu CLK_GPADC0_24M>; - clock-names = "bus", "sclk"; - resets = <&ccu RST_BUS_TH>; - #thermal-sensor-cells = <1>; - }; - - ths1: ths0@2009400 { - compatible = "allwinner,sun55iw3p1-ths1"; - reg = <0x0 0x02009400 0x0 0x400>; - clocks = <&ccu CLK_THS>, <&ccu CLK_GPADC1_24M>; - clock-names = "bus", "sclk"; - resets = <&ccu RST_BUS_TH>; - #thermal-sensor-cells = <1>; - }; - - soc_timer0: timer@3008000 { - compatible = "allwinner,sun50i-timer"; - device_type = "soc_timer"; - reg = <0x0 0x03008000 0x0 0x400>; - interrupt-parent = <&gic>; - interrupts = ; - clock-names = "parent", "bus", "timer0-mod", "timer1-mod"; - clocks = <&dcxo24M>, <&ccu CLK_TIMER>, <&ccu CLK_TIMER0>, <&ccu CLK_TIMER1>; - resets = <&ccu RST_BUS_TIME>; - }; - - arm_pmu { - compatible = "arm,armv8-pmuv3"; - interrupt-parent = <&gic>; - interrupts = ; - }; - - dump_reg:dump_reg@40000 { - compatible = "allwinner,sunxi-dump-reg"; - reg = <0x0 0x00040000 0x0 0x0004>; - }; - - soft_jtag_master:soft_jtag_master@0 { - compatible = "allwinner,soft-jtag-master"; - tdi-gpios = <&r_pio PL 2 GPIO_ACTIVE_HIGH>; - tdo-gpios = <&r_pio PL 3 GPIO_ACTIVE_HIGH>; - tck-gpios = <&pio PB 11 GPIO_ACTIVE_HIGH>; - tms-gpios = <&pio PB 12 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; - - reg_pio1_8: pio-18 { - compatible = "regulator-fixed"; - regulator-name = "pio-18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - reg_pio2_8: pio-28 { - compatible = "regulator-fixed"; - regulator-name = "pio-28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - reg_pio3_3: pio-33 { - compatible = "regulator-fixed"; - regulator-name = "pio-33"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - uart0: uart@2500000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x02500000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_UART0>; - resets = <&ccu RST_BUS_UART0>; - uart0_port = <0>; - uart0_type = <2>; - status = "disabled"; - }; - - uart1: uart@2500400 { - compatible = "allwinner,sun55i-uart"; - device_type = "uart1"; - reg = <0x0 0x02500400 0x0 0x400>; - interrupts = ; - sunxi,uart-fifosize = <64>; - clocks = <&ccu CLK_BUS_UART1>; - clock-names = "uart1"; - resets = <&ccu RST_BUS_UART1>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&uart1_pins_a>; - pinctrl-1 = <&uart1_pins_b>; - uart1_port = <1>; - uart1_type = <4>; - status = "disabled"; - }; - - uart2: uart@2500800 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2500800 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART2>; - resets = <&ccu RST_BUS_UART2>; - uart2_port = <2>; - uart2_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart3: uart@2500c00 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2500c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART3>; - resets = <&ccu RST_BUS_UART3>; - uart3_port = <3>; - uart3_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart4: uart@2501000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART4>; - resets = <&ccu RST_BUS_UART4>; - uart4_port = <4>; - uart4_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart5: uart@2501400 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501400 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART5>; - resets = <&ccu RST_BUS_UART5>; - uart5_port = <5>; - uart5_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart6: uart@2501800 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501800 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART6>; - resets = <&ccu RST_BUS_UART6>; - uart6_port = <6>; - uart6_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart7: uart@2501c00 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART7>; - resets = <&ccu RST_BUS_UART7>; - uart7_port = <7>; - uart7_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart8: uart@7080000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x7080000 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_UART0>; - resets = <&r_ccu RST_R_UART0>; - uart8_port = <8>; - uart8_type = <2>; - sunxi,uart-fifosize = <64>; - status = "disabled"; - }; - - uart9: uart@7080400 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x7080400 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_UART1>; - resets = <&r_ccu RST_R_UART1>; - uart9_port = <9>; - uart9_type = <2>; - sunxi,uart-fifosize = <64>; - status = "disabled"; - }; - - dma:dma-controller@3002000 { - compatible = "allwinner,dma-v105"; - reg = <0x0 0x03002000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_DMA>, <&ccu CLK_DMA_MBUS_GATE>; - clock-names = "bus", "mbus"; - dma-channels = <8>; - dma-requests = <54>; - resets = <&ccu RST_BUS_DMA>; - #dma-cells = <1>; - status = "okay"; - }; - - dma1:dma1-controller@7121000 { - compatible = "allwinner,dma-v104"; - reg = <0x0 0x7121000 0x0 0x1000>; - interrupts = ; - clocks = <&mcu_ccu CLK_BUS_MCU_DMA>, <&mcu_ccu CLK_BUS_MCU_DMA_MBUS>, <&mcu_ccu CLK_BUS_MCU_MBUS>; - clock-names = "bus", "mbus", "mcu-mbus"; - dma-channels = <8>; - dma-requests = <15>; - resets = <&mcu_ccu RST_BUS_MCU_DMA>; - #dma-cells = <1>; - status = "okay"; - }; - - npu: npu@7122000 { - compatible = "allwinner,npu"; - reg = <0x0 0x07122000 0x0 0x1000>; - device_type = "npu"; - dev_name = "npu"; - interrupts = ; - clocks = <&ccu CLK_NPU>, <&ccu CLK_PLL_NPU_2X>, <&mcu_ccu CLK_BUS_MCU_NPU_ACLK>, <&mcu_ccu CLK_BUS_MCU_NPU_HCLK>; - clock-names = "clk_npu", "clk_parent", "npu-aclk", "npu-hclk"; - clock-frequency = <600000000>; - resets = <&mcu_ccu RST_BUS_MCU_NPU>; - interrupt-names = "npu"; - status = "okay"; - power-domains = <&pd A523_PD_NPU>; - }; - - wdt: watchdog@2050000 { - compatible = "allwinner,wdt-v103"; - reg = <0x0 0x02050000 0x0 0x20>; /* In Timers Spec */ - interrupts = ; /* In GIC Spec */ - }; - - gpadc0: gpadc0@2009000 { - compatible = "allwinner,sunxi-gpadc"; - reg = <0x0 0x02009000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_GPADC0>; - clock-names = "bus"; - resets = <&ccu RST_BUS_GPADC0>; - status = "disabled"; - }; - - gpadc1: gpadc1@2009c00 { - compatible = "allwinner,sunxi-gpadc"; - reg = <0x0 0x02009c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_GPADC1>; - clock-names = "bus"; - resets = <&ccu RST_BUS_GPADC1>; - status = "disabled"; - }; - - dsp0_rproc: dsp0_rproc@0 { - compatible = "allwinner,hifi4-rproc"; - clock-frequency = <600000000>; - clocks = <&ccu CLK_PLL_PERI0_2X>, <&mcu_ccu CLK_DSP_DSP>, <&ccu CLK_DSP>, <&mcu_ccu CLK_BUS_DSP_CFG>, <&r_ccu CLK_R_AHB>; - clock-names = "pll", "mcu-mod", "mod", "cfg", "ahbs"; - resets = <&mcu_ccu RST_BUS_DSP>, <&mcu_ccu RST_BUS_DSP_CFG>, <&mcu_ccu RST_BUS_DSP_DBG>; - reset-names = "mod-rst", "cfg-rst", "dbg-rst"; - reg = <0x0 0x07010364 0x0 0x04>, - <0x0 0x07100000 0x0 0x40>; - reg-names = "sram-for-cpux", "hifi4-cfg"; - firmware-name = "amp_dsp0.bin"; - power-domains = <&pd A523_PD_DSP>, <&pd A523_PD_SRAM>; - power-domain-names = "pd_dsp", "pd_sram"; - status = "disabled"; - }; - - e906_rproc: e906_rproc@7130000 { - compatible = "allwinner,e906-rproc"; - clocks = <&mcu_ccu CLK_BUS_PUBSRAM>, <&mcu_ccu CLK_BUS_RV>, <&mcu_ccu CLK_BUS_RV_CFG>; - clock-names = "pubsram", "mod", "cfg"; - resets = <&mcu_ccu RST_BUS_PUBSRAM>, <&mcu_ccu RST_BUS_RV>, <&mcu_ccu RST_BUS_RV_CFG>, <&mcu_ccu RST_BUS_RV_DBG>; - reset-names = "pubsram-rst", "mod-rst", "cfg-rst", "dbg-rst"; - firmware-name = "amp_rv0.bin"; - reg = <0x0 0x07130000 0x0 0x1000>; - reg-names = "e906-cfg"; - power-domains = <&pd A523_PD_RISCV>, <&pd A523_PD_SRAM>; - power-domain-names = "pd_riscv", "pd_sram"; - status = "disabled"; - }; - - msgbox: msgbox@3003000 { - compatible = "allwinner,sun55iw3-msgbox"; - #mbox-cells = <1>; - reg = <0x0 0x03003000 0x0 0x1000>, - <0x0 0x07120000 0x0 0x1000>, - <0x0 0x07094000 0x0 0x1000>, - <0x0 0x07136000 0x0 0x1000>; - interrupts = , - , - , - ; - clocks = <&ccu CLK_MSGBOX0>; - clock-names = "msgbox"; - resets = <&ccu RST_BUS_MSGBOX0>; - reset-names = "rst"; - local_id = <0>; - }; - - hwspinlock: hwspinlock@3005000 { - compatible = "allwinner,sunxi-hwspinlock"; - reg = <0x0 0x3005000 0x0 0x1000>; - #hwlock-cells = <1>; - clocks = <&ccu CLK_SPINLOCK>; - clock-names = "clk_hwspinlock_bus"; - resets = <&ccu RST_BUS_SPINLOCK>; - reset-names = "rst"; - num-locks = <32>; - status = "okay"; - }; - - pwm0: pwm0@2000c00 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v201"; - reg = <0x0 0x02000c00 0x0 0x400>; - clocks = <&ccu CLK_PWM>; - interrupts = ; - resets = <&ccu RST_BUS_PWM>; - pwm-number = <16>; - pwm-base = <0x0>; - sunxi-pwms = <&pwm0_0>, <&pwm0_1>, <&pwm0_2>, <&pwm0_3>, <&pwm0_4>, - <&pwm0_5>, <&pwm0_6>, <&pwm0_7>, <&pwm0_8>, <&pwm0_9>, - <&pwm0_10>, <&pwm0_11>, <&pwm0_12>, <&pwm0_13>, - <&pwm0_14>, <&pwm0_15>; - status = "okay"; - }; - - pwm0_0: pwm0_0@2000c10 { - compatible = "allwinner,sunxi-pwm0"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c10 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_1: pwm0_1@2000c11 { - compatible = "allwinner,sunxi-pwm1"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c11 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_2: pwm0_2@2000c12 { - compatible = "allwinner,sunxi-pwm2"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c12 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_3: pwm0_3@2000c13 { - compatible = "allwinner,sunxi-pwm3"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c13 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_4: pwm0_4@2000c14 { - compatible = "allwinner,sunxi-pwm4"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c14 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_5: pwm0_5@2000c15 { - compatible = "allwinner,sunxi-pwm5"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c15 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_6: pwm0_6@2000c16 { - compatible = "allwinner,sunxi-pwm6"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c16 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_7: pwm0_7@2000c17 { - compatible = "allwinner,sunxi-pwm7"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c17 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_8: pwm0_8@2000c18 { - compatible = "allwinner,sunxi-pwm8"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c18 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_9: pwm0_9@2000c19 { - compatible = "allwinner,sunxi-pwm9"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c19 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_10: pwm0_10@2000c1a { - compatible = "allwinner,sunxi-pwm10"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1a 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_11: pwm0_11@2000c1b { - compatible = "allwinner,sunxi-pwm11"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1b 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_12: pwm0_12@2000c1c { - compatible = "allwinner,sunxi-pwm12"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1c 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_13: pwm0_13@2000c1d { - compatible = "allwinner,sunxi-pwm13"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1d 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_14: pwm0_14@2000c1e { - compatible = "allwinner,sunxi-pwm14"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1e 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_15: pwm0_15@2000c1f { - compatible = "allwinner,sunxi-pwm15"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1f 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm1: pwm1@2051000 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v201"; - reg = <0x0 0x02051000 0x0 0x400>; - clocks = <&ccu CLK_PWM1>; - interrupts = ; - resets = <&ccu RST_BUS_PWM1>; - pwm-number = <4>; - pwm-base = <0x10>; - sunxi-pwms = <&pwm1_0>, <&pwm1_1>, <&pwm1_2>, <&pwm1_3>; - status = "disabled"; - }; - - pwm1_0: pwm1_0@2051010 { - compatible = "allwinner,sunxi-pwm16"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051010 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - pwm1_1: pwm1_1@2051011 { - compatible = "allwinner,sunxi-pwm17"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051011 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - pwm1_2: pwm1_2@2051012 { - compatible = "allwinner,sunxi-pwm18"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051012 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - pwm1_3: pwm1_3@2051013 { - compatible = "allwinner,sunxi-pwm19"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051013 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - s_pwm0: s_pwm0@7020c00 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v202"; - reg = <0x0 0x07020c00 0x0 0x400>; - clocks = <&r_ccu CLK_R_PWM>,<&r_ccu CLK_BUS_R_PWM>; - interrupts = ; - clock-names = "clk_pwm","clk_bus_pwm"; - resets = <&r_ccu RST_R_PWM>; - pwm-number = <2>; - pwm-base = <0x14>; - sunxi-pwms = <&s_pwm0_0>, <&s_pwm0_1>; - status = "disabled"; - }; - - s_pwm0_0: s_pwm0_0@7020c10 { - compatible = "allwinner,sunxi-pwm20"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07020c10 0x0 0x4>; - reg_base = <0x07020c00>; - status = "disabled"; - }; - - s_pwm0_1: s_pwm0_1@7020c11 { - compatible = "allwinner,sunxi-pwm21"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07020c11 0x0 0x4>; - reg_base = <0x07020c00>; - status = "disabled"; - }; - - mcu_pwm0: mcu_pwm0@7103000 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v202"; - reg = <0x0 0x07103000 0x0 0x400>; - clocks = <&mcu_ccu CLK_MCU_PWM>,<&mcu_ccu CLK_BUS_MCU_PWM>; - interrupts = ; - clock-names = "clk_pwm","clk_bus_pwm"; - resets = <&mcu_ccu RST_BUS_MCU_PWM>; - pwm-number = <8>; - pwm-base = <0x16>; - sunxi-pwms = <&mcu_pwm0_0>, <&mcu_pwm0_1>, <&mcu_pwm0_2>, <&mcu_pwm0_3>, - <&mcu_pwm0_4>,<&mcu_pwm0_5>, <&mcu_pwm0_6>, <&mcu_pwm0_7>; - status = "disabled"; - }; - - mcu_pwm0_0: mcu_pwm0_0@7103010 { - compatible = "allwinner,sunxi-pwm22"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103010 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_1: mcu_pwm0_1@7103020 { - compatible = "allwinner,sunxi-pwm23"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103020 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_2: mcu_pwm0_2@7103030 { - compatible = "allwinner,sunxi-pwm24"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103030 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_3: mcu_pwm0_3@7103040 { - compatible = "allwinner,sunxi-pwm25"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103040 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_4: mcu_pwm0_4@7103050 { - compatible = "allwinner,sunxi-pwm26"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103050 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_5: mcu_pwm0_5@7103060 { - compatible = "allwinner,sunxi-pwm27"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103060 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_6: mcu_pwm0_6@7103070 { - compatible = "allwinner,sunxi-pwm28"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103070 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_7: mcu_pwm0_7@7103080 { - compatible = "allwinner,sunxi-pwm29"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103080 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - ledc: ledc@2008000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-leds"; - reg = <0x0 0x02008000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_LEDC>, <&ccu CLK_BUS_LEDC>; - clock-names = "clk_ledc", "clk_cpuapb"; - resets = <&ccu RST_BUS_LEDC>; - reset-names = "ledc_reset"; - dmas = <&dma 42>, <&dma 42>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - irrx: irrx@2005000 { - compatible = "allwinner,irrx"; - reg = <0x0 0x02005000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_IRRX>, <&dcxo24M>, <&ccu CLK_IRRX>; - clock-names = "bus", "pclk", "mclk"; - resets = <&ccu RST_BUS_IRRX>; - status = "disabled"; - }; - - s_irrx: s_irrx@7040000 { - compatible = "allwinner,irrx"; - reg = <0x0 0x07040000 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_IRRX>, <&dcxo24M>, <&r_ccu CLK_R_IRRX>; - clock-names = "bus", "pclk", "mclk"; - resets = <&r_ccu RST_R_IRRX>; - status = "disabled"; - }; - - irtx: irtx@2003000 { - compatible = "allwinner,irtx"; - reg = <0x0 0x02003000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_IRTX>, <&dcxo24M>, <&ccu CLK_IRTX>; - clock-names = "bus", "pclk", "mclk"; - resets = <&ccu RST_BUS_IRTX>; - status = "disabled"; - }; - - twi0: twi0@2502000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi0"; - reg = <0x0 0x02502000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI0>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI0>; - dmas = <&dma 43>, <&dma 43>; - dma-names = "tx", "rx"; - status = "okay"; - }; - - twi1: twi1@2502400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi1"; - reg = <0x0 0x02502400 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI1>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI1>; - dmas = <&dma 44>, <&dma 44>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi2: twi2@2502800 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi2"; - reg = <0x0 0x02502800 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI2>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI2>; - dmas = <&dma 45>, <&dma 45>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi3: twi3@2502c00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi3"; - reg = <0x0 0x02502c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI3>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI3>; - dmas = <&dma 46>, <&dma 46>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi4: twi4@2503000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi4"; - reg = <0x0 0x02503000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI4>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI4>; - dmas = <&dma 47>, <&dma 47>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi5: twi5@2503400{ - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi5"; - reg = <0x0 0x02503400 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI5>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI5>; - dmas = <&dma 48>, <&dma 48>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi6: s_twi0@7081400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi6"; - reg = <0x0 0x07081400 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_TWI0>; - clock-names = "bus"; - resets = <&r_ccu RST_R_TWI0>; - dmas = <&dma1 9>, <&dma1 9>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi7: s_twi1@7081800 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi7"; - reg = <0x0 0x07081800 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_TWI1>; - clock-names = "bus"; - resets = <&r_ccu RST_R_TWI1>; - dmas = <&dma1 10>, <&dma1 10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi8: s_twi2@7081c00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi8"; - reg = <0x0 0x07081C00 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_TWI2>; - clock-names = "bus"; - resets = <&r_ccu RST_R_TWI2>; - dmas = <&dma1 14>, <&dma1 14>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi0: spi@4025000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.3"; - device_type = "spi0"; - reg = <0x0 0x04025000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI0>, <&ccu CLK_BUS_SPI0>; - clock-names = "pll", "mod", "bus"; - resets = <&ccu RST_BUS_SPI0>; - dmas = <&dma 22>, <&dma 22>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi1: spi@4026000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.4"; - device_type = "spi1"; - reg = <0x0 0x04026000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI1>, <&ccu CLK_BUS_SPI1>; - clock-names = "pll", "mod", "bus"; - resets = <&ccu RST_BUS_SPI1>; - dmas = <&dma 23>, <&dma 23>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi2: spi@4027000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.3"; - device_type = "spi2"; - reg = <0x0 0x04027000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI2>, <&ccu CLK_BUS_SPI2>; - clock-names = "pll", "mod", "bus"; - resets = <&ccu RST_BUS_SPI2>; - dmas = <&dma 24>, <&dma 24>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - r_spi0: spi@7092000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.3"; - device_type = "r_spi0"; - reg = <0x0 0x07092000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&r_ccu CLK_R_SPI>, <&r_ccu CLK_BUS_R_SPI>; - clock-names = "pll", "mod", "bus"; - resets = <&r_ccu RST_R_SPI>; - dmas = <&dma1 13>, <&dma1 13>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spif0: spif@47f0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sun55i-spif"; - device_type = "spif"; - reg = <0x0 0x047f0000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_400M>, <&ccu CLK_SPIF>, <&ccu CLK_BUS_SPIF>; - clock-names = "pclk", "mclk", "bus"; - resets = <&ccu RST_BUS_SPIF>; - status = "disabled"; - }; - - nand0:nand0@4011000 { - compatible = "allwinner,sun55iw3-nand"; - device_type = "nand0"; - reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */ - interrupts = ; - clocks = <&ccu CLK_PLL_PERI1_400M>, - <&ccu CLK_NAND0_CLK0>, - <&ccu CLK_NAND0_CLK1>, - <&ccu CLK_NAND0>, - <&ccu CLK_NAND_MBUS_GATE>; - clock-names = "pll_periph", "mclk","ecc", "bus", "mbus"; - resets = <&ccu RST_BUS_NAND0>; - reset-names = "rst"; - power-domains = <&pd1 A523_PCK_NAND>; - - nand0_regulator1 = "none"; - nand0_regulator2 = "none"; - nand0_cache_level = <0x55aaaa55>; - nand0_flush_cache_num = <0x55aaaa55>; - nand0_capacity_level = <0x55aaaa55>; - nand0_id_number_ctl = <0x55aaaa55>; - nand0_print_level = <0x55aaaa55>; - nand0_p0 = <0x55aaaa55>; - nand0_p1 = <0x55aaaa55>; - nand0_p2 = <0x55aaaa55>; - nand0_p3 = <0x55aaaa55>; - chip_code = "sun50iw10"; - status = "disabled"; - boot_crc = "disabled"; - }; - - lradc: lradc@2009800 { - compatible = "allwinner,keyboard_1350mv"; - reg = <0x0 0x02009800 0x0 0x100>; - interrupts = ; - clocks = <&ccu CLK_LRADC>; - resets = <&ccu RST_BUS_LRADC>; - status = "disabled"; - }; - - nsi0: nsi-controller@2020000 { - compatible = "allwinner,sun55i-nsi"; - interrupts = ; - reg = <0x0 0x02020000 0x0 0x10000>, - <0x0 0x02071000 0x0 0x400>; - clocks = <&ccu CLK_PLL_DDR>, <&ccu CLK_MBUS>; - clock-names = "pll", "bus"; - resets = <&ccu RST_MBUS>; - clock-frequency = <462000000>; - #nsi-cells = <1>; - - npu{ - id = <5>; - mode = <0>; - pri = <0>; - select = <1>; - }; - - gmac0{ - id = <18>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - gmac1{ - id = <19>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - smhc0{ - id = <20>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - smhc1{ - id = <21>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - smhc2{ - id = <22>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - usb0{ - id = <23>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - usb1{ - id = <24>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - usb2{ - id = <25>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - isp{ - id = <6>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - iommu{ - id = <10>; - mode = <0>; - pri = <3>; - select = <1>; - }; - - ve_r{ - id = <11>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - ve_rw{ - id = <12>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - de{ - id = <13>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - csi{ - id = <14>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - }; - - npd0: npd@2070000 { - compatible = "allwinner,sun55i-npd"; - status = "okay"; - }; - - cryptoengine: ce@3040000 { - compatible = "allwinner,sunxi-ce"; - device_name = "ce"; - reg = <0x0 0x03040000 0x0 0xa0>, /* non-secure space */ - <0x0 0x03040800 0x0 0xa0>; /* secure space */ - interrupts = , /*non-secure*/ - ; /* secure*/ - clock-frequency = <400000000>; /* 400MHz */ - clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_CE_MBUS_GATE>, <&ccu CLK_PLL_PERI0_400M>; - clock-names = "bus_ce", "ce_clk", "mbus_ce", "clk_src"; - resets = <&ccu RST_BUS_CE>; - }; - - rtc: rtc@7090000 { - compatible = "allwinner,rtc-v201"; - device_type = "rtc"; - wakeup-source; - reg = <0x0 0x07090000 0x0 0x320>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_RTC>, <&rtc_ccu CLK_RTC_1K>, <&rtc_ccu CLK_RTC_SPI>; - clock-names = "r-ahb-rtc", "rtc-1k", "rtc-spi"; - resets = <&r_ccu RST_R_RTC>; - gpr_cur_pos = <6>; - gpr_bootcount_pos = <7>; - }; - - sdc2: sdmmc@4022000 { - compatible = "allwinner,sunxi-mmc-v4p6x"; - device_type = "sdc2"; - reg = <0x0 0x04022000 0x0 0x1000>; - interrupts = ; - clocks = <&dcxo24M>, - <&ccu CLK_PLL_PERI1_800M>, - <&ccu CLK_PLL_PERI1_600M>, - <&ccu CLK_SMHC2>, - <&ccu CLK_BUS_SMHC2>; - clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; - resets = <&ccu RST_BUS_SMHC2>; - reset-names = "rst"; - pinctrl-names = "default","sleep"; - pinctrl-0 = <&sdc2_pins_a &sdc2_pins_c>; - pinctrl-1 = <&sdc2_pins_b>; - bus-width = <8>; - req-page-count = <2>; - cap-mmc-highspeed; - cap-cmd23; - mmc-cache-ctrl; - non-removable; - /*max-frequency = <200000000>;*/ - max-frequency = <50000000>; - cap-erase; - mmc-high-capacity-erase-size; - no-sdio; - no-sd; - /*-- speed mode --*/ - /*sm0: DS26_SDR12*/ - /*sm1: HSSDR52_SDR25*/ - /*sm2: HSDDR52_DDR50*/ - /*sm3: HS200_SDR104*/ - /*sm4: HS400*/ - /*-- frequency point --*/ - /*f0: CLK_400K*/ - /*f1: CLK_25M*/ - /*f2: CLK_50M*/ - /*f3: CLK_100M*/ - /*f4: CLK_150M*/ - /*f5: CLK_200M*/ - ctl-spec-caps = <0x308>; - sdc_tm4_sm0_freq0 = <0>; - sdc_tm4_sm0_freq1 = <0>; - sdc_tm4_sm1_freq0 = <0x00000000>; - sdc_tm4_sm1_freq1 = <0>; - sdc_tm4_sm2_freq0 = <0x00000000>; - sdc_tm4_sm2_freq1 = <0>; - sdc_tm4_sm3_freq0 = <0x05000000>; - sdc_tm4_sm3_freq1 = <0x00000005>; - sdc_tm4_sm4_freq0 = <0x00050000>; - sdc_tm4_sm4_freq1 = <0x00000004>; - sdc_tm4_sm4_freq0_cmd = <0>; - sdc_tm4_sm4_freq1_cmd = <0>; - - /*vmmc-supply = <®_3p3v>;*/ - /*vqmc-supply = <®_3p3v>;*/ - /*vdmc-supply = <®_3p3v>;*/ - /*vmmc = "vcc-card";*/ - /*vqmc = "";*/ - /*vdmc = "";*/ - /*sunxi-power-save-mode;*/ - }; - - sdc0: sdmmc@4020000 { - compatible = "allwinner,sunxi-mmc-v5p3x"; - device_type = "sdc0"; - reg = <0x0 0x04020000 0x0 0x1000>; - interrupts = ; - clocks = <&dcxo24M>, - <&ccu CLK_PLL_PERI1_400M>, - <&ccu CLK_PLL_PERI1_300M>, - <&ccu CLK_SMHC0>, - <&ccu CLK_BUS_SMHC0>; - clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; - resets = <&ccu RST_BUS_SMHC0>; - reset-names = "rst"; - pinctrl-names = "default","mmc_1v8","sleep","uart_jtag"; - pinctrl-0 = <&sdc0_pins_a>; - pinctrl-1 = <&sdc0_pins_b>; - pinctrl-2 = <&sdc0_pins_c>; - pinctrl-3 = <&sdc0_pins_d &sdc0_pins_e>; - max-frequency = <50000000>; - bus-width = <4>; - req-page-count = <2>; - /*non-removable;*/ - /*broken-cd;*/ - /*cd-inverted*/ - /*cd-gpios = <&pio PF 6 GPIO_ACTIVE_LOW>;*/ - /* vmmc-supply = <®_3p3v>;*/ - /* vqmc-supply = <®_3p3v>;*/ - /* vdmc-supply = <®_3p3v>;*/ - /*vmmc = "vcc-card";*/ - /*vqmc = "";*/ - /*vdmc = "";*/ - cap-sd-highspeed; - cap-wait-while-busy; - /*sd-uhs-sdr50;*/ - /*sd-uhs-ddr50;*/ - /*cap-sdio-irq;*/ - /*keep-power-in-suspend;*/ - /*ignore-pm-notify;*/ - /*sunxi-power-save-mode;*/ - /*sunxi-dly-400k = <1 0 0 0>; */ - /*sunxi-dly-26M = <1 0 0 0>;*/ - /*sunxi-dly-52M = <1 0 0 0>;*/ - /*sunxi-dly-52M-ddr4 = <1 0 0 0>;*/ - /*sunxi-dly-52M-ddr8 = <1 0 0 0>;*/ - /*sunxi-dly-104M = <1 0 0 0>;*/ - /*sunxi-dly-208M = <1 0 0 0>;*/ - /*sunxi-dly-104M-ddr = <1 0 0 0>;*/ - /*sunxi-dly-208M-ddr = <1 0 0 0>;*/ - ctl-spec-caps = <0x408>; - status = "okay"; - }; - - sdc1: sdmmc@4021000 { - compatible = "allwinner,sunxi-mmc-v5p3x"; - device_type = "sdc1"; - reg = <0x0 0x04021000 0x0 0x1000>; - interrupts = ; - clocks = <&dcxo24M>, - <&ccu CLK_PLL_PERI1_400M>, - <&ccu CLK_PLL_PERI1_300M>, - <&ccu CLK_SMHC1>, - <&ccu CLK_BUS_SMHC1>; - clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; - resets = <&ccu RST_BUS_SMHC1>; - reset-names = "rst"; - pinctrl-names = "default","sleep"; - pinctrl-0 = <&sdc1_pins_a>; - pinctrl-1 = <&sdc1_pins_b>; - max-frequency = <50000000>; - bus-width = <4>; - /*broken-cd;*/ - /*cd-inverted*/ - /*cd-gpios = <&pio PG 6 6 1 2 0>;*/ - /* vmmc-supply = <®_3p3v>;*/ - /* vqmc-supply = <®_3p3v>;*/ - /* vdmc-supply = <®_3p3v>;*/ - /*vmmc = "vcc-card";*/ - /*vqmc = "";*/ - /*vdmc = "";*/ - cap-sd-highspeed; - cap-sdio-irq; - ignore-pm-notify; - /*sd-uhs-sdr50;*/ - /*sd-uhs-ddr50;*/ - /*sd-uhs-sdr104;*/ - /*cap-sdio-irq;*/ - keep-power-in-suspend; - /*ignore-pm-notify;*/ - /*sunxi-power-save-mode;*/ - /*sunxi-dly-400k = <0xff 0xff 0xff 0xff 0xff 0xff>; */ - /*sunxi-dly-26M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-52M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-52M-ddr4 = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-52M-ddr8 = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-104M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-208M = <0xff 0xff 0xff 0xff 0xff 0xff> ;*/ - /*sunxi-dly-104M-ddr = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-208M-ddr = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - sunxi-dly-208M = <0xff 0x1 0xff 0xff 0xff 0xff>; - ctl-spec-caps = <0x8>; - status = "okay"; - }; - - usbc0: usbc0@10 { - device_type = "usbc0"; - compatible = "allwinner,sunxi-otg-manager"; - reg = <0x0 0x10 0x0 0x1000>; - usb_port_type = <2>; - usb_detect_type = <1>; - usb_detect_mode = <0>; - usb_id_gpio; - usb_det_vbus_gpio; - usb_regulator_io = "nocare"; - usb_wakeup_suspend = <0>; - usb_luns = <3>; - usb_serial_unique = <0>; - usb_serial_number = "20080411"; - rndis_wceis = <1>; - status = "disabled"; - }; - - udc:udc-controller@4100000 { - compatible = "allwinner,sunxi-udc"; - reg = <0x0 0x04100000 0x0 0x1000>, /*udc base*/ - <0x0 0x00000000 0x0 0x100>; /*sram base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOTG0>; - clock-names = "hosc", "bus_otg"; - resets = <&ccu RST_USB_OTG0>, <&ccu RST_USB_PHY0_RSTN>; - reset-names = "otg", "phy"; - status = "disabled"; - }; - - ehci0:ehci0-controller@4101000 { - compatible = "allwinner,sunxi-ehci0"; - reg = <0x0 0x04101000 0x0 0xFFF>, /*hci0 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBEHCI0>; - clock-names = "hosc", "bus_hci"; - resets = <&ccu RST_USB_EHCI0>, <&ccu RST_USB_PHY0_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <0>; - status = "disabled"; - }; - - ohci0:ohci0-controller@4101400 { - compatible = "allwinner,sunxi-ohci0"; - reg = <0x0 0x04101400 0x0 0xFFF>, /*hci0 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOHCI0>, <&ccu CLK_USB0>; - clock-names = "hosc", "bus_hci", "ohci"; - resets = <&ccu RST_USB_OHCI0>, <&ccu RST_USB_PHY0_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <0>; - status = "disabled"; - }; - - usbc1: usbc1@11 { - device_type = "usbc1"; - reg = <0x0 0x11 0x0 0x1000>; - usb_regulator_io = "nocare"; - usb_wakeup_suspend = <0>; - status = "disabled"; - }; - - ehci1: ehci1-controller@4200000 { - compatible = "allwinner,sunxi-ehci1"; - reg = <0x0 0x04200000 0x0 0xFFF>, /*ehci1 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBEHCI1>; - clock-names = "hosc", "bus_hci"; - resets = <&ccu RST_USB_EHCI1>, <&ccu RST_USB_PHY1_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <1>; - status = "disabled"; - }; - - ohci1: ohci1-controller@4200400 { - compatible = "allwinner,sunxi-ohci1"; - reg = <0x0 0x04200400 0x0 0xFFF>, /*ohci1 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOHCI1>, <&ccu CLK_USB1>; - clock-names = "hosc", "bus_hci", "ohci"; - resets = <&ccu RST_USB_OHCI1>, <&ccu RST_USB_PHY1_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <1>; - status = "disabled"; - }; - - usbc2:usbc2@12 { - device_type = "usbc2"; - compatible = "allwinner,sunxi-plat-dwc3"; - reg = <0x0 0x12 0x0 0x1000>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - aw,hcgen2-phygen1-quirk; - status = "disabled"; - - xhci2: xhci2-controller@4d00000 { - compatible = "snps,dwc3"; - reg = <0x0 0x04d00000 0x0 0x100000>; - interrupts = ; - dr_mode = "otg"; // dr_mode option: host, peripheral, otg - clocks = <&ccu CLK_USB3_MBUS_GATE>, <&ccu CLK_USB3_REF>, - <&ccu CLK_USB2_REF>, <&ccu CLK_USB3_SUSPEND>; - clock-names = "bus_clk", "ref_clk3", "ref_clk2", "suspend"; - resets = <&ccu RST_USB_3>; - reset-names = "hci"; - maximum-speed = "super-speed"; - phy_type = "utmi"; - snps,dis_enblslpm_quirk; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - snps,dis_u3_susphy_quirk; - snps,dis_u2_susphy_quirk; - phys = <&u2phy>, <&combophy PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - status = "disabled"; - }; - }; - - u2phy: phy@4e00000 { - compatible = "allwinner,sunxi-plat-phy"; - reg = <0x0 0x04e00000 0x0 0x800>; /* Application Registers */ - #phy-cells = <0>; - status = "disabled"; - }; - - vind0: vind@5800800 { - compatible = "allwinner,sunxi-vin-media", "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - device_id = <0>; - csi_top = <336000000>; - csi_isp = <327000000>; - reg = <0x0 0x05800800 0x0 0x200>, - <0x0 0x05800000 0x0 0x800>, - <0x0 0x05810000 0x0 0x100>; - interrupts = ; - clocks = <&ccu CLK_CSI>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER0>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER1>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER2>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER3>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_ISP>, <&ccu CLK_PLL_VIDEO2_4X>, - <&ccu CLK_BUS_CSI>, <&ccu CLK_CSI_MBUS_GATE>, <&ccu CLK_ISP_MBUS_GATE>; - clock-names = "csi_top", "csi_top_src", - "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", - "csi_mclk1", "csi_mclk1_24m", "csi_mclk1_pll", - "csi_mclk2", "csi_mclk2_24m", "csi_mclk2_pll", - "csi_mclk3", "csi_mclk3_24m", "csi_mclk3_pll", - "csi_isp", "csi_isp_src", - "csi_bus", "csi_mbus", "csi_isp_mbus"; - resets = <&ccu RST_BUS_CSI>, <&ccu RST_BUS_ISP>; - reset-names = "csi_ret", "isp_ret"; - pinctrl-names = "mclk0-default", "mclk0-sleep", "mclk1-default", "mclk1-sleep", - "mclk2-default", "mclk2-sleep", "mclk3-default", "mclk3-sleep"; - pinctrl-0 = <&csi_mclk0_pins_a>; - pinctrl-1 = <&csi_mclk0_pins_b>; - pinctrl-2 = <&csi_mclk1_pins_a>; - pinctrl-3 = <&csi_mclk1_pins_b>; - pinctrl-4 = <&csi_mclk2_pins_a>; - pinctrl-5 = <&csi_mclk2_pins_b>; - pinctrl-6 = <&csi_mclk3_pins_a>; - pinctrl-7 = <&csi_mclk3_pins_b>; - power-domains = <&pd1 A523_PCK_VI>; - dram_dfs_time = <150>; - status = "okay"; - - csi0: csi@5820000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05820000 0x0 0x1000>; - interrupts = ; - device_id = <0>; - status = "okay"; - }; - csi1: csi@5821000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05821000 0x0 0x1000>; - interrupts = ; - device_id = <1>; - status = "okay"; - }; - csi2: csi@5822000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05822000 0x0 0x1000>; - interrupts = ; - device_id = <2>; - status = "okay"; - }; - csi3: csi@5823000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05823000 0x0 0x1000>; - interrupts = ; - pinctrl-names = "default","sleep"; - pinctrl-0 = <&ncsi_bt656_pins_a>; - pinctrl-1 = <&ncsi_bt656_pins_b>; - device_id = <3>; - status = "okay"; - }; - mipi0: mipi@5810100 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810100 0x0 0x100>, - <0x0 0x05811000 0x0 0x400>; - interrupts = ; - pinctrl-names = "mipi0-default","mipi0-sleep", - "mipi1-4lane-default","mipi1-4lane-sleep"; - pinctrl-0 = <&mipia_pins_a>; - pinctrl-1 = <&mipia_pins_b>; - pinctrl-2 = <&mipib_4lane_pins_a>; - pinctrl-3 = <&mipib_4lane_pins_b>; - device_id = <0>; - status = "okay"; - }; - mipi1: mipi@5810200 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810200 0x0 0x100>, - <0x0 0x05811400 0x0 0x400>; - pinctrl-names = "mipi1-default","mipi1-sleep"; - pinctrl-0 = <&mipib_pins_a>; - pinctrl-1 = <&mipib_pins_b>; - device_id = <1>; - status = "okay"; - }; - mipi2: mipi@5810300 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810300 0x0 0x100>, - <0x0 0x05811800 0x0 0x400>; - pinctrl-names = "mipi2-default","mipi2-sleep", - "mipi3-4lane-default","mipi3-4lane-sleep"; - pinctrl-0 = <&mipic_pins_a>; - pinctrl-1 = <&mipic_pins_b>; - pinctrl-2 = <&mipid_4lane_pins_a>; - pinctrl-3 = <&mipid_4lane_pins_b>; - device_id = <2>; - status = "okay"; - }; - mipi3: mipi@5810400 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810400 0x0 0x100>, - <0x0 0x05811C00 0x0 0x400>; - pinctrl-names = "mipi3-default","mipi3-sleep"; - pinctrl-0 = <&mipid_pins_a>; - pinctrl-1 = <&mipid_pins_b>; - device_id = <3>; - status = "okay"; - }; - tdm0: tdm@5908000 { - compatible = "allwinner,sunxi-tdm"; - reg = <0x0 0x05908000 0x0 0x300>; - interrupts = ; - work_mode = <0x0>; - device_id = <0>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp00:isp@5900000 { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x05900000 0x0 0x1300>; - interrupts = ; - work_mode = <0x0>; - device_id = <0>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp01:isp@58ffffc { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x058ffffc 0x0 0x1304>; - interrupts = ; - work_mode = <0xff>; - device_id = <1>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp02:isp@58ffff8 { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x058ffff8 0x0 0x1308>; - interrupts = ; - work_mode = <0xff>; - device_id = <2>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp03:isp@58ffff4 { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x058ffff4 0x0 0x130c>; - interrupts = ; - work_mode = <0xff>; - device_id = <3>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp10:isp@4 { - compatible = "allwinner,sunxi-isp"; - device_id = <4>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp20:isp@5 { - compatible = "allwinner,sunxi-isp"; - device_id = <5>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp30:isp@6 { - compatible = "allwinner,sunxi-isp"; - device_id = <6>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - scaler00:scaler@5910000 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910000 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <0>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler01:scaler@590fffc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x0590fffc 0x0 0x404>; - work_mode = <0xff>; - device_id = <1>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler02:scaler@590fff8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x0590fff8 0x0 0x408>; - work_mode = <0xff>; - device_id = <2>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler03:scaler@590fff4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x0590fff4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <3>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler10:scaler@5910400 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910400 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <4>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler11:scaler@59103fc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059103fc 0x0 0x404>; - work_mode = <0xff>; - device_id = <5>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler12:scaler@59103f8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059103f8 0x0 0x408>; - work_mode = <0xff>; - device_id = <6>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler13:scaler@59103f4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059103f4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <7>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler20:scaler@5910800 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910800 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <8>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler21:scaler@59107fc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059107fc 0x0 0x404>; - work_mode = <0xff>; - device_id = <9>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler22:scaler@59107f8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059107f8 0x0 0x408>; - work_mode = <0xff>; - device_id = <10>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler23:scaler@59107f4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059107f4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <11>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler30:scaler@5910c00 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910c00 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <12>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler31:scaler@5910bfc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910bfc 0x0 0x404>; - work_mode = <0xff>; - device_id = <13>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler32:scaler@5910bf8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910bf8 0x0 0x408>; - work_mode = <0xff>; - device_id = <14>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler33:scaler@5910bf4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910bf4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <15>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler40:scaler@16 { - compatible = "allwinner,sunxi-scaler"; - device_id = <16>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler50:scaler@17 { - compatible = "allwinner,sunxi-scaler"; - device_id = <17>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - actuator0: actuator@2108180 { - compatible = "allwinner,sunxi-actuator"; - device_type = "actuator0"; - reg = <0x0 0x02108180 0x0 0x10>; - actuator0_name = "ad5820_act"; - actuator0_slave = <0x18>; - actuator0_af_pwdn = <>; - actuator0_afvdd = "afvcc-csi"; - actuator0_afvdd_vol = <2800000>; - status = "disabled"; - }; - flash0: flash@2108190 { - device_type = "flash0"; - compatible = "allwinner,sunxi-flash"; - reg = <0x0 0x02108190 0x0 0x10>; - flash0_type = <2>; - flash0_en = <>; - flash0_mode = <>; - flash0_flvdd = ""; - flash0_flvdd_vol = <>; - device_id = <0>; - status = "disabled"; - }; - sensor0: sensor@5812000 { - reg = <0x0 0x05812000 0x0 0x10>; - device_type = "sensor0"; - compatible = "allwinner,sunxi-sensor"; - sensor0_mname = "ov5640"; - sensor0_twi_cci_id = <2>; - sensor0_twi_addr = <0x78>; - sensor0_mclk_id = <0>; - sensor0_pos = "rear"; - sensor0_isp_used = <0>; - sensor0_fmt = <0>; - sensor0_stby_mode = <0>; - sensor0_vflip = <0>; - sensor0_hflip = <0>; - sensor0_iovdd-supply = <>; - sensor0_iovdd_vol = <>; - sensor0_avdd-supply = <>; - sensor0_avdd_vol = <>; - sensor0_dvdd-supply = <>; - sensor0_dvdd_vol = <>; - sensor0_power_en = <>; - sensor0_reset = <>; - sensor0_pwdn = <>; - sensor0_sm_vs = <>; - flash_handle = <&flash0>; - act_handle = <&actuator0>; - device_id = <0>; - status = "disabled"; - }; - sensor1: sensor@5812010 { - reg = <0x0 0x05812010 0x0 0x10>; - device_type = "sensor1"; - compatible = "allwinner,sunxi-sensor"; - sensor1_mname = "ov5647"; - sensor1_twi_cci_id = <3>; - sensor1_twi_addr = <0x6c>; - sensor1_mclk_id = <1>; - sensor1_pos = "front"; - sensor1_isp_used = <0>; - sensor1_fmt = <0>; - sensor1_stby_mode = <0>; - sensor1_vflip = <0>; - sensor1_hflip = <0>; - sensor1_iovdd-supply = <>; - sensor1_iovdd_vol = <>; - sensor1_avdd-supply = <>; - sensor1_avdd_vol = <>; - sensor1_dvdd-supply = <>; - sensor1_dvdd_vol = <>; - sensor1_power_en = <>; - sensor1_reset = <>; - sensor1_pwdn = <>; - sensor1_sm_vs = <>; - flash_handle = <>; - act_handle = <>; - device_id = <1>; - status = "disabled"; - }; - sensor2: sensor@5812020 { - reg = <0x0 0x05812020 0x0 0x10>; - device_type = "sensor2"; - compatible = "allwinner,sunxi-sensor"; - sensor2_mname = "imx386_mipi"; - sensor2_twi_cci_id = <3>; - sensor2_twi_addr = <0x6c>; - sensor2_mclk_id = <1>; - sensor2_pos = "rear"; - sensor2_isp_used = <0>; - sensor2_fmt = <0>; - sensor2_stby_mode = <0>; - sensor2_vflip = <0>; - sensor2_hflip = <0>; - sensor2_iovdd-supply = <>; - sensor2_iovdd_vol = <>; - sensor2_avdd-supply = <>; - sensor2_avdd_vol = <>; - sensor2_dvdd-supply = <>; - sensor2_dvdd_vol = <>; - sensor2_power_en = <>; - sensor2_reset = <>; - sensor2_pwdn = <>; - sensor2_sm_vs = <>; - flash_handle = <>; - act_handle = <>; - device_id = <2>; - status= "disabled"; - }; - sensor3: sensor@5812030 { - reg = <0x0 0x05812030 0x0 0x10>; - device_type = "sensor3"; - compatible = "allwinner,sunxi-sensor"; - sensor3_mname = "imx317_mipi"; - sensor3_twi_cci_id = <3>; - sensor3_twi_addr = <0x6c>; - sensor3_mclk_id = <1>; - sensor3_pos = "rear"; - sensor3_isp_used = <0>; - sensor3_fmt = <0>; - sensor3_stby_mode = <0>; - sensor3_vflip = <0>; - sensor3_hflip = <0>; - sensor3_iovdd-supply = <>; - sensor3_iovdd_vol = <>; - sensor3_avdd-supply = <>; - sensor3_avdd_vol = <>; - sensor3_dvdd-supply = <>; - sensor3_dvdd_vol = <>; - sensor3_power_en = <>; - sensor3_reset = <>; - sensor3_pwdn = <>; - sensor3_sm_vs = <>; - flash_handle = <>; - act_handle = <>; - device_id = <2>; - status= "disabled"; - }; - sensor_list0:sensor_list@200b820 { - reg = <0x0 0x0200b820 0x0 0x10>; - device_type = "sensor_list0"; - compatible = "allwinner,sunxi-sensor-list"; - csi_sel = <0>; - sensor00_mname = "gc5035_mipi"; - sensor00_twi_addr = <0x6c>; - sensor00_type = <1>; - sensor00_hflip = <0>; - sensor00_vflip = <0>; - sensor00_act_used = <1>; - sensor00_act_name = ""; - sensor00_act_twi_addr = <>; - sensor01_mname = "ov5675_mipi"; - sensor01_twi_addr = <0x6c>; - sensor01_type = <1>; - sensor01_hflip = <0>; - sensor01_vflip = <0>; - sensor01_act_used = <1>; - sensor01_act_name = "dw9714_act"; - sensor01_act_twi_addr = <0x18>; - sensor02_mname = "sp5409_mipi"; - sensor02_twi_addr = <0x78>; - sensor02_type = <1>; - sensor02_hflip = <0>; - sensor02_vflip = <0>; - sensor02_act_used = <0>; - sensor02_act_name = "dw9714_act"; - sensor02_act_twi_addr = <0x18>; - device_id = <0>; - status = "disabled"; - }; - sensor_list1:sensor_list@200b830 { - reg = <0x0 0x0200b830 0x0 0x10>; - device_type = "sensor_list1"; - compatible = "allwinner,sunxi-sensor-list"; - csi_sel = <0>; - sensor10_mname = "gc02m2_mipi"; - sensor10_twi_addr = <0x20>; - sensor10_type = <1>; - sensor10_hflip = <0>; - sensor10_vflip = <0>; - sensor10_act_used = <1>; - sensor10_act_name = "dw9714_act"; - sensor10_act_twi_addr = <0x18>; - sensor11_mname = "ov02a10_mipi"; - sensor11_twi_addr = <0x7a>; - sensor11_type = <1>; - sensor11_hflip = <1>; - sensor11_vflip = <0>; - sensor11_act_used = <0>; - sensor11_act_name = ""; - sensor11_act_twi_addr = <>; - sensor12_mname = "gc030a_mipi"; - sensor12_twi_addr = <0x42>; - sensor12_type = <1>; - sensor12_hflip = <0>; - sensor12_vflip = <0>; - sensor12_act_used = <0>; - sensor12_act_name = ""; - sensor12_act_twi_addr = <>; - device_id = <1>; - status = "disabled"; - }; - vinc00:vinc@5830000 { - device_type = "vinc0"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830000 0x0 0x1000>; - interrupts = ; - vinc0_csi_sel = <3>; - vinc0_mipi_sel = <0xff>; - vinc0_isp_sel = <0>; - vinc0_isp_tx_ch = <0>; - vinc0_tdm_rx_sel = <0>; - vinc0_rear_sensor_sel = <0>; - vinc0_front_sensor_sel = <0>; - vinc0_sensor_list = <0>; - device_id = <0>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - - vinc01:vinc@582fffc { - device_type = "vinc1"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x0582fffc 0x0 0x1004>; - vinc1_csi_sel = <2>; - vinc1_mipi_sel = <0xff>; - vinc1_isp_sel = <1>; - vinc1_isp_tx_ch = <1>; - vinc1_tdm_rx_sel = <1>; - vinc1_rear_sensor_sel = <0>; - vinc1_front_sensor_sel = <0>; - vinc1_sensor_list = <0>; - device_id = <1>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - vinc02:vinc@582fff8 { - device_type = "vinc2"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x0582fff8 0x0 0x1008>; - vinc2_csi_sel = <2>; - vinc2_mipi_sel = <0xff>; - vinc2_isp_sel = <2>; - vinc2_isp_tx_ch = <2>; - vinc2_tdm_rx_sel = <2>; - vinc2_rear_sensor_sel = <0>; - vinc2_front_sensor_sel = <0>; - vinc2_sensor_list = <0>; - device_id = <2>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc03:vinc@582fff4 { - device_type = "vinc3"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x0582fff4 0x0 0x100c>; - vinc3_csi_sel = <0>; - vinc3_mipi_sel = <0xff>; - vinc3_isp_sel = <0>; - vinc3_isp_tx_ch = <0>; - vinc3_tdm_rx_sel = <0>; - vinc3_rear_sensor_sel = <1>; - vinc3_front_sensor_sel = <1>; - vinc3_sensor_list = <0>; - device_id = <3>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc10:vinc@5831000 { - device_type = "vinc4"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831000 0x0 0x1000>; - interrupts = ; - vinc4_csi_sel = <3>; - vinc4_mipi_sel = <0xff>; - vinc4_isp_sel = <0>; - vinc4_isp_tx_ch = <0>; - vinc4_tdm_rx_sel = <1>; - vinc4_rear_sensor_sel = <0>; - vinc4_front_sensor_sel = <0>; - vinc4_sensor_list = <0>; - device_id = <4>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc11:vinc@5830ffc { - device_type = "vinc5"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830ffc 0x0 0x1004>; - vinc5_csi_sel = <2>; - vinc5_mipi_sel = <0xff>; - vinc5_isp_sel = <1>; - vinc5_isp_tx_ch = <1>; - vinc5_tdm_rx_sel = <1>; - vinc5_rear_sensor_sel = <0>; - vinc5_front_sensor_sel = <0>; - vinc5_sensor_list = <0>; - device_id = <5>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc12:vinc@5830ff8 { - device_type = "vinc6"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830ff8 0x0 0x1008>; - vinc6_csi_sel = <2>; - vinc6_mipi_sel = <0xff>; - vinc6_isp_sel = <0>; - vinc6_isp_tx_ch = <0>; - vinc6_tdm_rx_sel = <0>; - vinc6_rear_sensor_sel = <0>; - vinc6_front_sensor_sel = <0>; - vinc6_sensor_list = <0>; - device_id = <6>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc13:vinc@5830ff4 { - device_type = "vinc7"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830ff4 0x0 0x100c>; - vinc7_csi_sel = <2>; - vinc7_mipi_sel = <0xff>; - vinc7_isp_sel = <0>; - vinc7_isp_tx_ch = <0>; - vinc7_tdm_rx_sel = <0>; - vinc7_rear_sensor_sel = <0>; - vinc7_front_sensor_sel = <0>; - vinc7_sensor_list = <0>; - device_id = <7>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc20:vinc@5832000 { - device_type = "vinc8"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832000 0x0 0x1000>; - interrupts = ; - vinc8_csi_sel = <2>; - vinc8_mipi_sel = <0xff>; - vinc8_isp_sel = <4>; - vinc8_isp_tx_ch = <3>; - vinc8_tdm_rx_sel = <3>; - vinc8_rear_sensor_sel = <0>; - vinc8_front_sensor_sel = <0>; - vinc8_sensor_list = <0>; - device_id = <8>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc21:vinc@5831ffc { - device_type = "vinc9"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831ffc 0x0 0x1004>; - vinc9_csi_sel = <2>; - vinc9_mipi_sel = <0xff>; - vinc9_isp_sel = <0>; - vinc9_isp_tx_ch = <0>; - vinc9_tdm_rx_sel = <0>; - vinc9_rear_sensor_sel = <0>; - vinc9_front_sensor_sel = <0>; - vinc9_sensor_list = <0>; - device_id = <9>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc22:vinc@5831ff8 { - device_type = "vinc10"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831ff8 0x0 0x1008>; - vinc10_csi_sel = <2>; - vinc10_mipi_sel = <0xff>; - vinc10_isp_sel = <0>; - vinc10_isp_tx_ch = <0>; - vinc10_tdm_rx_sel = <0>; - vinc10_rear_sensor_sel = <0>; - vinc10_front_sensor_sel = <0>; - vinc10_sensor_list = <0>; - device_id = <10>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc23:vinc@5831ff4 { - device_type = "vinc11"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831ff4 0x0 0x100c>; - vinc11_csi_sel = <2>; - vinc11_mipi_sel = <0xff>; - vinc11_isp_sel = <0>; - vinc11_isp_tx_ch = <0>; - vinc11_tdm_rx_sel = <0>; - vinc11_rear_sensor_sel = <0>; - vinc11_front_sensor_sel = <0>; - vinc11_sensor_list = <0>; - device_id = <11>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc30:vinc@5833000 { - device_type = "vinc12"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05833000 0x0 0x1000>; - interrupts = ; - vinc12_csi_sel = <2>; - vinc12_mipi_sel = <0xff>; - vinc12_isp_sel = <0>; - vinc12_isp_tx_ch = <0>; - vinc12_tdm_rx_sel = <0>; - vinc12_rear_sensor_sel = <0>; - vinc12_front_sensor_sel = <0>; - vinc12_sensor_list = <0>; - device_id = <12>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc31:vinc@5832ffc { - device_type = "vinc13"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832ffc 0x0 0x1004>; - vinc13_csi_sel = <2>; - vinc13_mipi_sel = <0xff>; - vinc13_isp_sel = <0>; - vinc13_isp_tx_ch = <0>; - vinc13_tdm_rx_sel = <0>; - vinc13_rear_sensor_sel = <0>; - vinc13_front_sensor_sel = <0>; - vinc13_sensor_list = <0>; - device_id = <13>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc32:vinc@5832ff8 { - device_type = "vinc14"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832ff8 0x0 0x1008>; - vinc14_csi_sel = <2>; - vinc14_mipi_sel = <0xff>; - vinc14_isp_sel = <0>; - vinc14_isp_tx_ch = <0>; - vinc14_tdm_rx_sel = <0>; - vinc14_rear_sensor_sel = <0>; - vinc14_front_sensor_sel = <0>; - vinc14_sensor_list = <0>; - device_id = <14>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc33:vinc@5832ff4 { - device_type = "vinc15"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832ff4 0x0 0x100c>; - vinc15_csi_sel = <2>; - vinc15_mipi_sel = <0xff>; - vinc15_isp_sel = <0>; - vinc15_isp_tx_ch = <0>; - vinc15_tdm_rx_sel = <0>; - vinc15_rear_sensor_sel = <0>; - vinc15_front_sensor_sel = <0>; - vinc15_sensor_list = <0>; - device_id = <15>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc40:vinc@5834000 { - device_type = "vinc16"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05834000 0x0 0x1000>; - interrupts = ; - vinc16_csi_sel = <2>; - vinc16_mipi_sel = <0xff>; - vinc16_isp_sel = <0>; - vinc16_isp_tx_ch = <0>; - vinc16_tdm_rx_sel = <0>; - vinc16_rear_sensor_sel = <0>; - vinc16_front_sensor_sel = <0>; - vinc16_sensor_list = <0>; - device_id = <16>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc50:vinc@5835000 { - device_type = "vinc17"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05835000 0x0 0x1000>; - interrupts = ; - vinc17_csi_sel = <2>; - vinc17_mipi_sel = <0xff>; - vinc17_isp_sel = <0>; - vinc17_isp_tx_ch = <0>; - vinc17_tdm_rx_sel = <0>; - vinc17_rear_sensor_sel = <0>; - vinc17_front_sensor_sel = <0>; - vinc17_sensor_list = <0>; - device_id = <17>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - }; - - di:deinterlace@5400000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-deinterlace"; - reg = <0x0 0x05400000 0x0 0x040000>; - interrupts = ; - iommus = <&mmu_aw 6 1>; - power-domains = <&pd1 A523_PCK_VO0>; - status = "okay"; - - clocks = <&ccu CLK_DI>, <&ccu CLK_BUS_DI>, <&ccu CLK_PLL_VIDEO0_4X>; - clock-names = "clk_di", "clk_bus_di", "clk_di_parent"; - clock-frequency = <300000000>; - - resets = <&ccu RST_BUS_DI>; - reset-names = "rst_bus_di"; - }; - - gpu:gpu@1800000 { - device_type = "gpu"; - compatible = "arm,mali-valhall"; - reg = <0x0 0x01800000 0x0 0x10000>; - interrupts = , - , - ; - interrupt-names = "JOB", "MMU", "GPU"; - clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>, <&ccu CLK_PLL_GPU>; - clock-names = "clk_mali", "clk_bus", "clk_parent"; - resets = <&ccu RST_BUS_GPU>; - operating-points-v2 = <&gpu_opp_table>; - #cooling-cells = <2>; - ipa_dvfs:ipa_dvfs { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <636>; - dynamic-coefficient = <1434>; - /* ts0 -> ts3 */ - ts = <0xcc77c0 217000 0xffffd508 200>; - thermal-zone = "gpu_thermal_zone"; - /*ss-coefficient = <36>;*/ - /*ff-coefficient = <291>;*/ - }; - /*power-domains = <&pd1 A523_PCK_GPU>;*/ - }; - - gpu_opp_table: gpu-opp-table { - compatible = "allwinner, mali-valhall-operating-points"; - opp@150000000 { - opp-hz = /bits/ 64 <150000000>; - opp-microvolt = <900000>; - }; - - opp@200000000 { - opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <900000>; - }; - - opp@300000000 { - opp-hz = /bits/ 64 <300000000>; - opp-microvolt = <900000>; - }; - - opp@400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <900000>; - }; - - opp@600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000>; - }; - - opp@648000000 { - opp-hz = /bits/ 64 <648000000>; - opp-microvolt = <0>; - opp-microvolt-vf0900 = <900000>; - }; - - opp@696000000 { - opp-hz = /bits/ 64 <696000000>; - opp-microvolt = <0>; - opp-microvolt-vf1920 = <900000>; - opp-microvolt-vf2920 = <900000>; - opp-microvolt-vf3920 = <900000>; - opp-microvolt-vf21920 = <900000>; - opp-microvolt-vf31920 = <900000>; - opp-microvolt-vf5920 = <900000>; - }; - - /* Not use: only for performance test */ - opp@744000000 { - opp-hz = /bits/ 64 <744000000>; - opp-microvolt = <0>; - opp-microvolt-vf4920 = <900000>; - /* Not use: only for performance test - opp-microvolt-vf2920 = <900000>; - opp-microvolt-vf3920 = <900000>; - opp-microvolt-vf21920 = <900000>; - opp-microvolt-vf31920 = <900000>; - */ - }; - - /* Not use: only for performance test */ - opp@792000000 { - opp-hz = /bits/ 64 <792000000>; - opp-microvolt = <0>; - /* opp-microvolt-vf2950 = <900000>; - opp-microvolt-vf3950 = <900000>; - opp-microvolt-vf21950 = <900000>; - opp-microvolt-vf31950 = <900000>; - */ - }; - }; - - combophy: phy@4f00000 { - compatible = "allwinner,inno-combphy"; - reg = <0x0 0x04f00000 0x0 0x80000>, /* Sub-System Application Registers */ - <0x0 0x04f80000 0x0 0x80000>; /* Combo INNO PHY Registers */ - reg-names = "phy-ctl", "phy-clk"; - power-domains = <&pd1 A523_PCK_PCIE>; - phy_refclk_sel = <0>; /* 0:internal clk; 1:external clk */ - resets = <&ccu RST_BUS_PCIE_USB3>; - #phy-cells = <1>; - status = "disabled"; - }; - - pcie: pcie@4800000 { - #address-cells = <3>; - #size-cells = <2>; - compatible = "allwinner,sunxi-pcie-v210"; - bus-range = <0x0 0xff>; - reg = <0 0x04800000 0 0x480000>; - reg-names = "dbi"; - device_type = "pci"; - ranges = <0x00000800 0 0x20000000 0x0 0x20000000 0 0x01000000 - 0x81000000 0 0x21000000 0x0 0x21000000 0 0x01000000 - 0x82000000 0 0x22000000 0x0 0x22000000 0 0x07000000>; - num-lanes = <1>; - phys = <&combophy PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - interrupts = , - , - , - , - , - , - , - , - , - ; - interrupt-names = "msi", "sii", "edma-w0", "edma-w1", "edma-w2", "edma-w3", - "edma-r0", "edma-r1", "edma-r2", "edma-r3"; - #interrupt-cells = <1>; - num-edma = <4>; - max-link-speed = <2>; - num-ib-windows = <8>; - num-ob-windows = <8>; - num-viewport = <8>; - linux,pci-domain = <0>; - power-domains = <&pd1 A523_PCK_PCIE>; - clocks = <&ccu CLK_USB3_REF>, <&ccu CLK_PLL_PERI0_200M>, <&dcxo24M>, <&ccu CLK_PCIE_AUX>; - clock-names = "pclk_ref", "pclk_per", "hosc", "pclk_aux"; - busno = <0>; - status = "disabled"; - }; - - /* audio dirver module -> audio codec */ - codec:codec@7110000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-codec"; - reg = <0x0 0x07110000 0x0 0x348>; - resets = <&mcu_ccu RST_BUS_MCU_AUDIO_CODEC>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_AUDIO_CODEC>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_AUDIO_CODEC_DAC>, - <&mcu_ccu CLK_MCU_AUDIO_CODEC_ADC>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_audio", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_audio_dac", - "clk_audio_adc"; - interrupts = ; - status = "disabled"; - }; - - codec_plat:codec_plat { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-aaudio"; - dac-txdata = <0x07110020>; - adc-txdata = <0x07110040>; - dmas = <&dma1 7>, <&dma1 7>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - codec_mach:codec_mach { - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "audiocodec"; - soundcard-mach,pin-switches = "MIC1", "MIC2", "MIC3", - "LINEOUTL", "LINEOUTR", - "HPOUT", "SPK"; - soundcard-mach,routing = "MIC1P_PIN", "MIC1", - "MIC1N_PIN", "MIC1", - "MIC2P_PIN", "MIC2", - "MIC2N_PIN", "MIC2", - "MIC3P_PIN", "MIC3", - "MIC3N_PIN", "MIC3", - "LINEOUTL", "LINEOUTLP_PIN", - "LINEOUTL", "LINEOUTLN_PIN", - "LINEOUTR", "LINEOUTRP_PIN", - "LINEOUTR", "LINEOUTRN_PIN", - "SPK", "LINEOUTLP_PIN", - "SPK", "LINEOUTLN_PIN", - "SPK", "LINEOUTRP_PIN", - "SPK", "LINEOUTRN_PIN", - "HPOUT", "HPOUTL_PIN", - "HPOUT", "HPOUTR_PIN"; - soundcard-mach,jack-support = <1>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&codec_plat>; - }; - soundcard-mach,codec { - sound-dai = <&codec>; - soundcard-mach,pll-fs = <1>; - }; - }; - - hdmi_codec:hdmi_codec { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-codec-hdmi"; - status = "disabled"; - }; - - edp_codec:edp_codec { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-codec-edp"; - status = "disabled"; - }; - - /* audio dirver module -> owa */ - owa_plat:owa_plat@7116000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-owa"; - reg = <0x0 0x07116000 0x0 0x58>; - resets = <&mcu_ccu RST_BUS_MCU_OWA>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_OWA>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&ccu CLK_PLL_PERI0_300M>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_OWA_TX>, - <&mcu_ccu CLK_MCU_OWA_RX>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_owa", - "clk_pll_audio0_4x", - "clk_pll_peri0_300", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_owa_tx", - "clk_owa_rx"; - dmas = <&dma1 2>, <&dma1 2>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - owa_mach:owa_mach { - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndowa"; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&owa_plat>; - }; - soundcard-mach,codec { - }; - }; - - /* audio dirver module -> dmic */ - dmic_plat:dmic_plat@7111000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-dmic"; - reg = <0x0 0x07111000 0x0 0x50>; - resets = <&mcu_ccu RST_BUS_MCU_DMIC>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_DMIC>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_DMIC>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_dmic", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_dmic"; - dmas = <&dma1 8>; - dma-names = "rx"; - capture-cma = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - dmic_mach:dmic_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "snddmic"; - soundcard-mach,capture-only; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&dmic_plat>; - }; - soundcard-mach,codec { - }; - }; - - /* audio dirver module -> I2S/PCM */ - i2s0_plat:i2s0_plat@7112000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07112000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S0>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S0>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S0>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s"; - dmas = <&dma1 3>, <&dma1 3>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s0_mach:i2s0_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndi2s0"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s0_plat>; - }; - soundcard-mach,codec { - }; - }; - - i2s1_plat:i2s1_plat@7113000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07113000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S1>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S1>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S1>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s"; - dmas = <&dma1 4>, <&dma1 4>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s1_mach:i2s1_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndi2s1"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s1_plat>; - }; - soundcard-mach,codec { - }; - }; - - i2s2_plat:i2s2_plat@7114000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07114000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S2>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S2>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S2>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s"; - dmas = <&dma1 5>, <&dma1 5>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s2_mach:i2s2_mach{ - compatible = "allwinner,sunxi-snd-mach"; - /* card name. hdmi: "sndhdmi"; edp: "sndedp" */ - soundcard-mach,name = "sndhdmi"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s2_plat>; - }; - soundcard-mach,codec { - }; - }; - - i2s3_plat:i2s3_plat@7115000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07115000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S3>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S3>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&ccu CLK_PLL_PERI0_300M>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S3_ASRC>, - <&mcu_ccu CLK_MCU_I2S3>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_peri0_300", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s_asrc", - "clk_i2s"; - dmas = <&dma1 6>, <&dma1 6>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s3_mach:i2s3_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndi2s3"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s3_plat>; - }; - soundcard-mach,codec { - }; - }; - - rfkill: rfkill { - compatible = "allwinner,sunxi-rfkill"; - status = "disabled"; - }; - - addr_mgt: addr_mgt { - compatible = "allwinner,sunxi-addr_mgt"; - status = "disabled"; - }; - - btlpm: btlpm { - compatible = "allwinner,sunxi-btlpm"; - status = "disabled"; - }; - - mdio0: mdio0@4500048 { - compatible = "allwinner,sunxi-mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x04500048 0x0 0x8>; - status = "disabled"; - gmac0_phy0: ethernet-phy@1 { - /* RTL8211F (0x001cc916) */ - reg = <1>; - max-speed = <1000>; /* Max speed capability */ - reset-gpios = <&pio PH 19 GPIO_ACTIVE_LOW>; - /* PHY datasheet rst time */ - reset-assert-us = <10000>; - reset-deassert-us = <150000>; - }; - }; - - gmac0: gmac0@4500000 { - compatible = "allwinner,sunxi-gmac"; - reg = <0x0 0x04500000 0x0 0x10000>, - <0x0 0x03000030 0x0 0x4>; - interrupts = ; - interrupt-names = "gmacirq"; - clocks = <&ccu CLK_GMAC0>, <&ccu CLK_GMAC0_25M>; - clock-names = "gmac", "phy25m"; - resets = <&ccu RST_BUS_GMAC0>; - phy-handle = <&gmac0_phy0>; - status = "disabled"; - }; - - gmac1: ethernet@4510000 { - compatible = "allwinner,sunxi-gmac-200", "snps,dwmac-4.20a"; - reg = <0x0 0x04510000 0x0 0x10000>, - <0x0 0x03000034 0x0 0x4>; - interrupts = ; - interrupt-names = "macirq"; - clocks = <&ccu CLK_GMAC1>, <&ccu CLK_GMAC1_MBUS_GATE>, <&ccu CLK_GMAC1_25M>; - clock-names = "stmmaceth", "pclk", "phy25m"; - resets = <&ccu RST_BUS_GMAC1>; - reset-names = "stmmaceth"; - phy-handle = <&gmac1_phy0>; - power-domains = <&pd1 A523_PCK_VO1>; - status = "disabled"; - - - snps,fixed-burst; - - snps,axi-config = <&gmac1_stmmac_axi_setup>; - snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; - snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; - - gmac1_stmmac_axi_setup: stmmac-axi-config { - snps,wr_osr_lmt = <0xf>; - snps,rd_osr_lmt = <0xf>; - snps,blen = <256 128 64 32 16 8 4>; - }; - - gmac1_mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <1>; - queue0 {}; - }; - - gmac1_mtl_tx_setup: tx_queues-config { - snps,tx-queues-to-use = <1>; - queue0 {}; - }; - - mdio1: mdio1@1 { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - gmac1_phy0: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x1>; - max-speed = <1000>; /* Max speed capability */ - reset-gpios = <&pio PJ 27 GPIO_ACTIVE_LOW>; - /* PHY datasheet rst time */ - reset-assert-us = <10000>; - reset-deassert-us = <150000>; - }; - }; - }; - - sid@3006000 { - compatible = "allwinner,sun55iw3p1-sid", "allwinner,sunxi-sid"; - reg = <0x0 0x03006000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - non-secure-maxoffset = <0x80>; - non-secure-maxlen = <0x20>; - - secure_status { - reg = <0x0 0>; - offset = <0xa0>; - size = <0x4>; - }; - chipid { - reg = <0x0 0>; - offset = <0x200>; - size = <0x10>; - }; - rotpk { - reg = <0x0 0>; - offset = <0x140>; - size = <0x20>; - }; - }; - - sram_ctrl: sram_ctrl@3000000 { - compatible = "allwinner,sram_ctrl"; - reg = <0x0 0x03000000 0 0x184>; - soc_ver { - offset = <0x24>; - mask = <0x7>; - shift = <0>; - ver_a = <0x00000000>; - ver_b = <0x00000001>; - ver_c = <0x00000002>; - }; - - soc_id { - offset = <0x200>; - mask = <0x1>; - shift = <22>; - }; - - soc_bin { - offset = <0x0>; - mask = <0x3ff>; - shift = <0x0>; - }; - }; - }; -}; - diff --git a/bsp/configs/linux-5.15/arm64_min_defconfig b/bsp/configs/linux-5.15/arm64_min_defconfig deleted file mode 100644 index 76b802da73..0000000000 --- a/bsp/configs/linux-5.15/arm64_min_defconfig +++ /dev/null @@ -1,102 +0,0 @@ -CONFIG_AW_BSP=y -CONFIG_ARCH_SUN55I=y -CONFIG_AW_IC_BOARD=y -CONFIG_AW_SOC_NAME="A523" -# CONFIG_AW_DUMP_REG is not set -# CONFIG_AW_VIDEO_ENCODER_DECODER is not set -# CONFIG_AW_EVENT_DDR is not set -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_CGROUPS=y -CONFIG_NAMESPACES=y -# CONFIG_UTS_NS is not set -# CONFIG_PID_NS is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="./bsp/ramfs/ramfs_aarch64.cpio.gz" -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_XZ is not set -# CONFIG_RD_LZO is not set -# CONFIG_RD_LZ4 is not set -# CONFIG_RD_ZSTD is not set -CONFIG_INITRAMFS_COMPRESSION_NONE=y -CONFIG_EXPERT=y -# CONFIG_SYSFS_SYSCALL is not set -# CONFIG_FHANDLE is not set -# CONFIG_AIO is not set -# CONFIG_IO_URING is not set -CONFIG_KALLSYMS_ALL=y -# CONFIG_RSEQ is not set -# CONFIG_PERF_EVENTS is not set -# CONFIG_SLUB_DEBUG is not set -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB_MERGE_DEFAULT is not set -CONFIG_PROFILING=y -CONFIG_NR_CPUS=4 -CONFIG_HOTPLUG_CPU=y -CONFIG_COMPAT=y -# CONFIG_EFI is not set -# CONFIG_SUSPEND is not set -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_CMA=y -CONFIG_DEVTMPFS=y -# CONFIG_ALLOW_DEV_COREDUMP is not set -# CONFIG_SUN50I_DE2_BUS is not set -# CONFIG_SUNXI_RSB is not set -# CONFIG_BLK_DEV is not set -# CONFIG_INPUT is not set -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_VT is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_HW_RANDOM is not set -# CONFIG_DEVMEM is not set -# CONFIG_PINCTRL_SUN8I_H3_R is not set -# CONFIG_PINCTRL_SUN50I_A64 is not set -# CONFIG_PINCTRL_SUN50I_A64_R is not set -# CONFIG_PINCTRL_SUN50I_A100 is not set -# CONFIG_PINCTRL_SUN50I_A100_R is not set -# CONFIG_PINCTRL_SUN50I_H5 is not set -# CONFIG_PINCTRL_SUN50I_H6 is not set -# CONFIG_PINCTRL_SUN50I_H6_R is not set -# CONFIG_PINCTRL_SUN50I_H616 is not set -# CONFIG_PINCTRL_SUN50I_H616_R is not set -# CONFIG_HWMON is not set -# CONFIG_USB_SUPPORT is not set -CONFIG_RTC_CLASS=y -# CONFIG_SUNXI_CCU is not set -# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_HISILICON_ERRATUM_161010101 is not set -# CONFIG_ARM64_ERRATUM_858921 is not set -# CONFIG_SUN50I_ERRATUM_UNKNOWN1 is not set -# CONFIG_IOMMU_SUPPORT is not set -# CONFIG_DNOTIFY is not set -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_XZ_DEC=y -CONFIG_DMA_CMA=y -CONFIG_PRINTK_TIME=y -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set -CONFIG_MAGIC_SYSRQ=y -# CONFIG_DEBUG_MISC is not set -CONFIG_PANIC_ON_OOPS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_PREEMPT is not set -CONFIG_STACKTRACE=y -# CONFIG_FTRACE is not set diff --git a/bsp/configs/linux-5.15/arm_min_defconfig b/bsp/configs/linux-5.15/arm_min_defconfig deleted file mode 100644 index 9a9485904e..0000000000 --- a/bsp/configs/linux-5.15/arm_min_defconfig +++ /dev/null @@ -1,85 +0,0 @@ -CONFIG_AW_BSP=y -CONFIG_ARCH_SUN8IW21=y -CONFIG_AW_IC_BOARD=y -CONFIG_AW_SOC_NAME="V851S3" -# CONFIG_AW_DUMP_REG is not set -# CONFIG_AW_VIDEO_ENCODER_DECODER is not set -# CONFIG_AW_INPUT_SENSORINIT is not set -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_BLK_DEV_INITRD=y -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -# CONFIG_SYSFS_SYSCALL is not set -CONFIG_KALLSYMS_ALL=y -CONFIG_EMBEDDED=y -# CONFIG_SLUB_DEBUG is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_PROFILING=y -# CONFIG_MACH_SUN4I is not set -# CONFIG_MACH_SUN5I is not set -# CONFIG_MACH_SUN6I is not set -# CONFIG_MACH_SUN7I is not set -# CONFIG_MACH_SUN9I is not set -# CONFIG_VDSO is not set -CONFIG_SMP=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_OABI_COMPAT=y -CONFIG_HIGHMEM=y -# CONFIG_ARM_MODULE_PLTS is not set -# CONFIG_ATAGS is not set -CONFIG_CMDLINE="earlyprintk=sunxi-uart,0x01c28000 loglevel=8 initcall_debug=1 console=ttyS0 init=/init" -CONFIG_VFP=y -CONFIG_NEON=y -CONFIG_JUMP_LABEL=y -# CONFIG_GCC_PLUGINS is not set -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_COMPACTION is not set -CONFIG_CMA=y -CONFIG_UEVENT_HELPER=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -# CONFIG_SUNXI_RSB is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_DEVMEM is not set -CONFIG_PPS=y -# CONFIG_PINCTRL_SUN4I_A10 is not set -# CONFIG_PINCTRL_SUN8I_A23 is not set -# CONFIG_PINCTRL_SUN8I_A33 is not set -# CONFIG_PINCTRL_SUN8I_A83T is not set -# CONFIG_PINCTRL_SUN8I_A83T_R is not set -# CONFIG_PINCTRL_SUN8I_A23_R is not set -# CONFIG_PINCTRL_SUN8I_H3 is not set -# CONFIG_PINCTRL_SUN8I_H3_R is not set -# CONFIG_PINCTRL_SUN8I_V3S is not set -CONFIG_STAGING=y -# CONFIG_CLK_SUNXI is not set -# CONFIG_SUNXI_CCU is not set -# CONFIG_ARM_PMU is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -CONFIG_SQUASHFS=y -CONFIG_CRYPTO=y -CONFIG_DMA_CMA=y -CONFIG_PRINTK_TIME=y -CONFIG_FRAME_WARN=2048 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_DEBUG_MISC is not set -# CONFIG_SCHED_DEBUG is not set -CONFIG_STACKTRACE=y -# CONFIG_FTRACE is not set diff --git a/bsp/configs/linux-5.15/debug_defconfig.fragment b/bsp/configs/linux-5.15/debug_defconfig.fragment deleted file mode 100644 index ad442a8a8e..0000000000 --- a/bsp/configs/linux-5.15/debug_defconfig.fragment +++ /dev/null @@ -1,59 +0,0 @@ -CONFIG_DETECT_HUNG_TASK=y -CONFIG_SOFTLOCKUP_DETECTOR=y -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_MUTEXES=y -CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_LOCK_ALLOC=y -CONFIG_PROVE_LOCKING=y -CONFIG_LOCKDEP=y -CONFIG_LOCK_STAT=y -CONFIG_DEBUG_LOCKDEP=y -CONFIG_DEBUG_ATOMIC_SLEEP=y -CONFIG_DEBUG_PAGEALLOC=y -CONFIG_DEBUG_PAGEALLOC_ENABLE_DEFAULT=y -CONFIG_PAGE_OWNER=y -CONFIG_PAGE_POISONING=y -CONFIG_DEBUG_WX=y -CONFIG_SLUB_DEBUG_ON=y -CONFIG_KASAN=y -CONFIG_SLUB_STATS=y -CONFIG_DEBUG_KMEMLEAK=y -CONFIG_SCHED_STACK_END_CHECK=y -CONFIG_DEBUG_VM=y -CONFIG_BOOTTIME_TRACING=y -CONFIG_FUNCTION_TRACER=y -CONFIG_FUNCTION_PROFILER=y -CONFIG_FTRACE_SYSCALLS=y -CONFIG_PAGE_EXTENSION=y -CONFIG_DEBUG_RWSEMS=y -CONFIG_DEBUG_IRQFLAGS=y -CONFIG_AW_DEBUG_SPINLOCK=y -CONFIG_PRINTK_CALLER=y -CONFIG_DYNAMIC_DEBUG_CORE=y -CONFIG_NET_DROP_MONITOR=y -CONFIG_TRACE_MMIO_ACCESS=y -CONFIG_STACK_HASH_ORDER=20 -CONFIG_DEBUG_PAGE_REF=y -CONFIG_DEBUG_KMEMLEAK_MEM_POOL_SIZE=16000 -# CONFIG_DEBUG_KMEMLEAK_TEST is not set -# CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF is not set -CONFIG_DEBUG_KMEMLEAK_AUTO_SCAN=y -CONFIG_DEBUG_VM_VMACACHE=y -CONFIG_DEBUG_VM_RB=y -CONFIG_DEBUG_VM_PGFLAGS=y -# CONFIG_KASAN_HW_TAGS is not set -# CONFIG_KASAN_INLINE is not set -CONFIG_KASAN_GENERIC=y -CONFIG_KASAN_OUTLINE=y -# CONFIG_KASAN_MODULE_TEST is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 -CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -# CONFIG_PROVE_RAW_LOCK_NESTING is not set -CONFIG_LOCKDEP_BITS=15 -CONFIG_LOCKDEP_CHAINS_BITS=16 -CONFIG_LOCKDEP_STACK_TRACE_BITS=19 -CONFIG_LOCKDEP_STACK_TRACE_HASH_BITS=14 -CONFIG_LOCKDEP_CIRCULAR_QUEUE_BITS=12 -CONFIG_FRAME_WARN=4096 diff --git a/bsp/configs/linux-5.15/ftrace_defconfig.fragment b/bsp/configs/linux-5.15/ftrace_defconfig.fragment deleted file mode 100644 index ce58aa5efe..0000000000 --- a/bsp/configs/linux-5.15/ftrace_defconfig.fragment +++ /dev/null @@ -1,4 +0,0 @@ -CONFIG_BOOTTIME_TRACING=y -CONFIG_FUNCTION_TRACER=y -CONFIG_FUNCTION_PROFILER=y -CONFIG_FTRACE_SYSCALLS=y diff --git a/bsp/configs/linux-5.15/lock_defconfig.fragment b/bsp/configs/linux-5.15/lock_defconfig.fragment deleted file mode 100644 index 8a770d97be..0000000000 --- a/bsp/configs/linux-5.15/lock_defconfig.fragment +++ /dev/null @@ -1,27 +0,0 @@ -CONFIG_DETECT_HUNG_TASK=y -CONFIG_SOFTLOCKUP_DETECTOR=y -CONFIG_DEBUG_RT_MUTEXES=y -CONFIG_DEBUG_MUTEXES=y -CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y -CONFIG_DEBUG_SPINLOCK=y -CONFIG_DEBUG_LOCK_ALLOC=y -CONFIG_PROVE_LOCKING=y -CONFIG_LOCKDEP=y -CONFIG_LOCK_STAT=y -CONFIG_DEBUG_LOCKDEP=y -CONFIG_DEBUG_ATOMIC_SLEEP=y -CONFIG_DEBUG_RWSEMS=y -CONFIG_DEBUG_IRQFLAGS=y -CONFIG_AW_DEBUG_SPINLOCK=y -CONFIG_NET_DROP_MONITOR=y -CONFIG_TRACE_MMIO_ACCESS=y -CONFIG_DEBUG_PAGE_REF=y -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y -CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 -CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y -# CONFIG_PROVE_RAW_LOCK_NESTING is not set -CONFIG_LOCKDEP_BITS=15 -CONFIG_LOCKDEP_CHAINS_BITS=16 -CONFIG_LOCKDEP_STACK_TRACE_BITS=19 -CONFIG_LOCKDEP_STACK_TRACE_HASH_BITS=14 -CONFIG_LOCKDEP_CIRCULAR_QUEUE_BITS=12 diff --git a/bsp/configs/linux-5.15/mem_defconfig.fragment b/bsp/configs/linux-5.15/mem_defconfig.fragment deleted file mode 100644 index 16f8198880..0000000000 --- a/bsp/configs/linux-5.15/mem_defconfig.fragment +++ /dev/null @@ -1,26 +0,0 @@ -CONFIG_KASAN=y -CONFIG_DEBUG_PAGEALLOC=y -CONFIG_DEBUG_PAGEALLOC_ENABLE_DEFAULT=y -CONFIG_PAGE_OWNER=y -CONFIG_PAGE_POISONING=y -CONFIG_DEBUG_WX=y -CONFIG_SLUB_DEBUG_ON=y -CONFIG_SLUB_STATS=y -CONFIG_DEBUG_KMEMLEAK=y -CONFIG_SCHED_STACK_END_CHECK=y -CONFIG_DEBUG_VM=y -CONFIG_PAGE_EXTENSION=y -CONFIG_STACK_HASH_ORDER=20 -CONFIG_DEBUG_KMEMLEAK_MEM_POOL_SIZE=16000 -# CONFIG_DEBUG_KMEMLEAK_TEST is not set -# CONFIG_DEBUG_KMEMLEAK_DEFAULT_OFF is not set -CONFIG_DEBUG_KMEMLEAK_AUTO_SCAN=y -CONFIG_DEBUG_VM_VMACACHE=y -CONFIG_DEBUG_VM_RB=y -CONFIG_DEBUG_VM_PGFLAGS=y -# CONFIG_KASAN_HW_TAGS is not set -# CONFIG_KASAN_INLINE is not set -CONFIG_KASAN_GENERIC=y -CONFIG_KASAN_OUTLINE=y -# CONFIG_KASAN_MODULE_TEST is not set -CONFIG_FRAME_WARN=4096 diff --git a/bsp/configs/linux-5.15/sun55iw3p1.dtsi b/bsp/configs/linux-5.15/sun55iw3p1.dtsi deleted file mode 100644 index 6f15661866..0000000000 --- a/bsp/configs/linux-5.15/sun55iw3p1.dtsi +++ /dev/null @@ -1,5310 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -/* - * Copyright (C) 2021 liujuan1@allwinnertech.com - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/ { - model = "sun55iw3"; - interrupt-parent = <&wakeupgen>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - serial5 = &uart5; - serial6 = &uart6; - serial7 = &uart7; - serial8 = &uart8; - serial9 = &uart9; - ir0 = &irrx; - ir1 = &s_irrx; - ir2 = &irtx; - pcie = &pcie; - gpadc0 = &gpadc0; - gpadc1 = &gpadc1; - twi0 = &twi0; - twi1 = &twi1; - twi2 = &twi2; - twi3 = &twi3; - twi4 = &twi4; - twi5 = &twi5; - twi6 = &twi6; - twi7 = &twi7; - twi8 = &twi8; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - spi3 = &r_spi0; - spif0 = &spif0; - nand0 = &nand0; - ve0 = &ve; - ve1 = &ve1; - sunxi-mmc0 = &sdc0; - sunxi-mmc2 = &sdc2; - gmac0 = &gmac0; - gmac1 = &gmac1; - edp0 = &edp0; - nsi0 = &nsi0; - npu = &npu; - }; - - reg_vdd_sys: vdd-sys { - compatible = "regulator-fixed"; - regulator-name = "vdd_sys"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-boot-on; - regulator-always-on; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - bl31 { - reg = <0x0 0x48000000 0x0 0x01000000>; - }; - }; - - firmware { - android { - compatible = "android,firmware"; - name = "android"; - boot_devices = "soc@3000000/4020000.sdmmc,soc@3000000/4022000.sdmmc,soc@3000000"; - vbmeta { - compatible = "android,vbmeta"; - parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot,init_boot"; - }; - }; - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x0>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - dynamic-power-coefficient = <286>; - }; - - cpu1: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x100>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - }; - - cpu2: cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x200>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - }; - - cpu3: cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x300>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - }; - - cpu4: cpu@400 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x400>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - dynamic-power-coefficient = <354>; - }; - - cpu5: cpu@500 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x500>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - }; - - cpu6: cpu@600 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x600>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - }; - - cpu7: cpu@700 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x700>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <&cpu0>; - }; - core1 { - cpu = <&cpu1>; - }; - core2 { - cpu = <&cpu2>; - }; - core3 { - cpu = <&cpu3>; - }; - }; - - cluster1 { - core0 { - cpu = <&cpu4>; - }; - core1 { - cpu = <&cpu5>; - }; - core2 { - cpu = <&cpu6>; - }; - core3 { - cpu = <&cpu7>; - }; - }; - }; - - idle-states { - entry-method = "arm,psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - entry-latency-us = <46>; - exit-latency-us = <59>; - min-residency-us = <3570>; - local-timer-stop; - }; - - CLUSTER_SLEEP_0: cluster-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <47>; - exit-latency-us = <74>; - min-residency-us = <5000>; - local-timer-stop; - }; - }; - }; - - vf_mapping_table: vf_mapping_table { - vf-version = "V0.60"; - table = < - 0x00 0x0000 - 0x01 0x0100 - 0x02 0x0200 - 0x12 0x0201 - 0x04 0x0300 - 0x14 0x0301 - 0x05 0x0400 - 0x06 0x0500 - >; - }; - - gpu_vf_mapping_table: gpu_vf_mapping_table { - table = < - 0x01 1 - 0x02 2 - 0x12 21 - 0x04 3 - 0x14 31 - 0x05 4 - 0x06 5 - >; - }; - - npu_vf_mapping_table: npu_vf_mapping_table { - table = < - 0x01 1 - 0x02 2 - 0x12 21 - 0x04 3 - 0x14 31 - 0x05 4 - 0x06 5 - >; - }; - - cluster0_opp_table: cluster0-opp-table { - compatible = "allwinner,sun50i-operating-points"; - opp-shared; - - opp@408000000 { - opp-hz = /bits/ 64 <408000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <900000>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@672000000 { - opp-hz = /bits/ 64 <672000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@720000000 { - opp-hz = /bits/ 64 <720000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <900000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <0>; - }; - - opp@792000000 { - opp-hz = /bits/ 64 <792000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@936000000 { - opp-hz = /bits/ 64 <936000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <900000>; - opp-microvolt-vf0100 = <920000>; - opp-microvolt-vf0200 = <920000>; - opp-microvolt-vf0201 = <920000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@1008000000 { - opp-hz = /bits/ 64 <1008000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <960000>; - opp-microvolt-vf0200 = <960000>; - opp-microvolt-vf0201 = <960000>; - opp-microvolt-vf0300 = <920000>; - opp-microvolt-vf0301 = <920000>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <920000>; - }; - - opp@1032000000 { - opp-hz = /bits/ 64 <1032000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <920000>; - opp-microvolt-vf0500 = <0>; - }; - - opp@1104000000 { - opp-hz = /bits/ 64 <1104000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <1000000>; - opp-microvolt-vf0200 = <1000000>; - opp-microvolt-vf0201 = <1000000>; - opp-microvolt-vf0300 = <960000>; - opp-microvolt-vf0301 = <960000>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <960000>; - }; - - opp@1128000000 { - opp-hz = /bits/ 64 <1128000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <1000000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <960000>; - opp-microvolt-vf0500 = <0>; - }; - - opp@1224000000 { - opp-hz = /bits/ 64 <1224000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <1050000>; - opp-microvolt-vf0100 = <1050000>; - opp-microvolt-vf0200 = <1050000>; - opp-microvolt-vf0201 = <1050000>; - opp-microvolt-vf0300 = <1000000>; - opp-microvolt-vf0301 = <1000000>; - opp-microvolt-vf0400 = <1000000>; - opp-microvolt-vf0500 = <1000000>; - }; - - opp@1296000000 { - opp-hz = /bits/ 64 <1296000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <1100000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <0>; - }; - - opp@1320000000 { - opp-hz = /bits/ 64 <1320000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <1120000>; - opp-microvolt-vf0200 = <1120000>; - opp-microvolt-vf0201 = <1120000>; - opp-microvolt-vf0300 = <1050000>; - opp-microvolt-vf0301 = <1050000>; - opp-microvolt-vf0400 = <1050000>; - opp-microvolt-vf0500 = <1050000>; - }; - - opp@1416000000 { - opp-hz = /bits/ 64 <1416000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <1150000>; - opp-microvolt-vf0100 = <1150000>; - opp-microvolt-vf0200 = <1150000>; - opp-microvolt-vf0201 = <1150000>; - opp-microvolt-vf0300 = <1100000>; - opp-microvolt-vf0301 = <1100000>; - opp-microvolt-vf0400 = <1100000>; - opp-microvolt-vf0500 = <1100000>; - }; - }; - - cluster1_opp_table: cluster1-opp-table { - compatible = "allwinner,sun50i-operating-points"; - opp-shared; - - opp@408000000 { - opp-hz = /bits/ 64 <408000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <900000>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@672000000 { - opp-hz = /bits/ 64 <672000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@720000000 { - opp-hz = /bits/ 64 <720000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <900000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <0>; - }; - - opp@840000000 { - opp-hz = /bits/ 64 <840000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@1008000000 { - opp-hz = /bits/ 64 <1008000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@1200000000 { - opp-hz = /bits/ 64 <1200000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <920000>; - opp-microvolt-vf0200 = <920000>; - opp-microvolt-vf0201 = <920000>; - opp-microvolt-vf0300 = <920000>; - opp-microvolt-vf0301 = <920000>; - opp-microvolt-vf0400 = <920000>; - opp-microvolt-vf0500 = <920000>; - }; - - opp@1248000000 { - opp-hz = /bits/ 64 <1248000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <900000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <0>; - }; - - opp@1344000000 { - opp-hz = /bits/ 64 <1344000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <960000>; - opp-microvolt-vf0200 = <960000>; - opp-microvolt-vf0201 = <960000>; - opp-microvolt-vf0300 = <960000>; - opp-microvolt-vf0301 = <960000>; - opp-microvolt-vf0400 = <960000>; - opp-microvolt-vf0500 = <960000>; - }; - - opp@1488000000 { - opp-hz = /bits/ 64 <1488000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <1000000>; - opp-microvolt-vf0100 = <1000000>; - opp-microvolt-vf0200 = <1000000>; - opp-microvolt-vf0201 = <1000000>; - opp-microvolt-vf0300 = <1000000>; - opp-microvolt-vf0301 = <1000000>; - opp-microvolt-vf0400 = <1000000>; - opp-microvolt-vf0500 = <1000000>; - }; - - opp@1584000000 { - opp-hz = /bits/ 64 <1584000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <1050000>; - opp-microvolt-vf0100 = <1050000>; - opp-microvolt-vf0200 = <1050000>; - opp-microvolt-vf0201 = <1050000>; - opp-microvolt-vf0300 = <1050000>; - opp-microvolt-vf0301 = <1050000>; - opp-microvolt-vf0400 = <1050000>; - opp-microvolt-vf0500 = <1050000>; - }; - - opp@1680000000 { - opp-hz = /bits/ 64 <1680000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <1100000>; - opp-microvolt-vf0100 = <1100000>; - opp-microvolt-vf0200 = <1100000>; - opp-microvolt-vf0201 = <1100000>; - opp-microvolt-vf0300 = <1100000>; - opp-microvolt-vf0301 = <1100000>; - opp-microvolt-vf0400 = <1100000>; - opp-microvolt-vf0500 = <0>; - }; - - opp@1800000000 { - opp-hz = /bits/ 64 <1800000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <1150000>; - opp-microvolt-vf0100 = <1150000>; - opp-microvolt-vf0200 = <1150000>; - opp-microvolt-vf0201 = <1150000>; - opp-microvolt-vf0300 = <1150000>; - opp-microvolt-vf0301 = <1150000>; - opp-microvolt-vf0400 = <1150000>; - opp-microvolt-vf0500 = <0>; - }; - - opp@1992000000 { - opp-hz = /bits/ 64 <1992000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <1220000>; - opp-microvolt-vf0500 = <0>; - }; - }; - - dsufreq: dsufreq@0 { - compatible = "allwinner,sun55iw3-dsufreq"; - reg = <0x0 0x08815000 0x0 0x1000>; - clocks = <&cpupll_ccu CLK_PLL_CPU2>; - operating-points-v2 = <&dsu_opp_table>; - }; - - dsu_opp_table: dsu-opp-table { - compatible = "allwinner,dsu-operating-points"; - - opp@288000000 { - opp-hz = /bits/ 64 <288000000>; - opp-microvolt-vf0000 = <900000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <0>; - }; - - opp@408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@528000000 { - opp-hz = /bits/ 64 <528000000>; - opp-microvolt-vf0000 = <900000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <0>; - }; - - opp@600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@696000000 { - opp-hz = /bits/ 64 <696000000>; - opp-microvolt-vf0000 = <900000>; - opp-microvolt-vf0100 = <900000>; - opp-microvolt-vf0200 = <900000>; - opp-microvolt-vf0201 = <900000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@792000000 { - opp-hz = /bits/ 64 <792000000>; - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <920000>; - opp-microvolt-vf0200 = <920000>; - opp-microvolt-vf0201 = <920000>; - opp-microvolt-vf0300 = <900000>; - opp-microvolt-vf0301 = <900000>; - opp-microvolt-vf0400 = <900000>; - opp-microvolt-vf0500 = <900000>; - }; - - opp@864000000 { - opp-hz = /bits/ 64 <864000000>; - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <960000>; - opp-microvolt-vf0200 = <960000>; - opp-microvolt-vf0201 = <960000>; - opp-microvolt-vf0300 = <920000>; - opp-microvolt-vf0301 = <920000>; - opp-microvolt-vf0400 = <920000>; - opp-microvolt-vf0500 = <920000>; - }; - - opp@936000000 { - opp-hz = /bits/ 64 <936000000>; - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <1000000>; - opp-microvolt-vf0200 = <1000000>; - opp-microvolt-vf0201 = <1000000>; - opp-microvolt-vf0300 = <960000>; - opp-microvolt-vf0301 = <960000>; - opp-microvolt-vf0400 = <960000>; - opp-microvolt-vf0500 = <960000>; - }; - - opp@984000000 { - opp-hz = /bits/ 64 <984000000>; - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <1050000>; - opp-microvolt-vf0200 = <1050000>; - opp-microvolt-vf0201 = <1050000>; - opp-microvolt-vf0300 = <1000000>; - opp-microvolt-vf0301 = <1000000>; - opp-microvolt-vf0400 = <1000000>; - opp-microvolt-vf0500 = <1000000>; - }; - - opp@1008000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt-vf0000 = <1000000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <0>; - }; - - opp@1056000000 { - opp-hz = /bits/ 64 <1056000000>; - opp-microvolt-vf0000 = <0>; - opp-microvolt-vf0100 = <1100000>; - opp-microvolt-vf0200 = <1100000>; - opp-microvolt-vf0201 = <1100000>; - opp-microvolt-vf0300 = <1050000>; - opp-microvolt-vf0301 = <1050000>; - opp-microvolt-vf0400 = <1050000>; - opp-microvolt-vf0500 = <1050000>; - }; - - opp@1104000000 { - opp-hz = /bits/ 64 <1104000000>; - opp-microvolt-vf0000 = <1050000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <0>; - }; - - opp@1128000000 { - opp-hz = /bits/ 64 <1128000000>; - opp-microvolt-vf0000 = <1100000>; - opp-microvolt-vf0100 = <0>; - opp-microvolt-vf0200 = <0>; - opp-microvolt-vf0201 = <0>; - opp-microvolt-vf0300 = <0>; - opp-microvolt-vf0301 = <0>; - opp-microvolt-vf0400 = <0>; - opp-microvolt-vf0500 = <0>; - }; - - opp@1152000000 { - opp-hz = /bits/ 64 <1152000000>; - opp-microvolt-vf0000 = <1150000>; - opp-microvolt-vf0100 = <1150000>; - opp-microvolt-vf0200 = <1150000>; - opp-microvolt-vf0201 = <1150000>; - opp-microvolt-vf0300 = <1100000>; - opp-microvolt-vf0301 = <1100000>; - opp-microvolt-vf0400 = <1100000>; - opp-microvolt-vf0500 = <1100000>; - }; - }; - - thermal-zones { - cpul_thermal_zone: cpul_thermal_zone { - polling-delay-passive = <100>; - polling-delay = <1000>; - thermal-sensors = <&ths1 1>; - sustainable-power = <1200>; - - cpul_trips: trips { - cpul_threshold: trip-point@0 { - temperature = <70000>; - type = "passive"; - hysteresis = <0>; - }; - cpul_target: trip-point@1 { - temperature = <90000>; - type = "passive"; - hysteresis = <0>; - }; - cpul_crit: cpu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - - cooling-maps { - map0 { - trip = <&cpul_target>; - cooling-device = <&cpu0 - THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - contribution = <1024>; - }; - }; - }; - - cpub_thermal_zone: cpub_thermal_zone { - polling-delay-passive = <100>; - polling-delay = <1000>; - thermal-sensors = <&ths1 0>; - sustainable-power = <1600>; - - cpub_trips: trips { - cpub_threshold: trip-point@0 { - temperature = <70000>; - type = "passive"; - hysteresis = <0>; - }; - cpub_target: trip-point@1 { - temperature = <90000>; - type = "passive"; - hysteresis = <0>; - }; - cpub_crit: cpu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - - cooling-maps { - map0 { - trip = <&cpub_target>; - cooling-device = <&cpu4 - THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - contribution = <1024>; - }; - }; - }; - - gpu_thermal_zone: gpu_thermal_zone { - polling-delay-passive = <100>; - polling-delay = <1000>; - thermal-sensors = <&ths1 2>; - sustainable-power = <2400>; - - gpu_trips: trips { - gpu_threshold: trip-point@0 { - temperature = <60000>; - type = "passive"; - hysteresis = <0>; - }; - gpu_target: trip-point@1 { - temperature = <90000>; - type = "passive"; - hysteresis = <0>; - }; - gpu_crit: gpu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - - cooling-maps { - map0 { - trip = <&gpu_target>; - cooling-device = <&gpu - THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - contribution = <1024>; - }; - }; - }; - - npu_thermal_zone { - polling-delay-passive = <100>; - polling-delay = <1000>; - thermal-sensors = <&ths1 3>; - }; - - ddr_thermal_zone { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&ths0 0>; - }; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - dcxo24M: dcxo24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "dcxo24M"; - }; - - rc_16m: rc16m_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <16000000>; - clock-accuracy = <300000000>; - clock-output-names = "rc-16m"; - }; - - ext_32k: ext32k_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "ext-32k"; - }; - - gic: interrupt-controller@3400000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0x03400000 0 0x10000>, /* GIC Dist */ - <0x0 0x03460000 0 0xFF004>; /* GIC Re */ - interrupt-parent = <&gic>; - }; - - wakeupgen: interrupt-controller@0 { - compatible = "allwinner,sunxi-wakeupgen"; - interrupt-controller; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-parent = <&gic>; - }; - - timer_arch { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - clock-frequency = <24000000>; - interrupt-parent = <&gic>; - arm,no-tick-in-suspend; - }; - - power: power-management@7001400 { - compatible = "allwinner,a523-pmu", "syscon", "simple-mfd"; - reg = <0x0 0x07001400 0x0 0x400>; - - pd: power-controller { - compatible = "allwinner,a523-power-controller"; - clocks = <&r_ccu CLK_R_PPU1>; - clock-names = "ppu"; - resets = <&r_ccu RST_R_PPU1>; - reset-names = "ppu_rst"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd_dsp@A523_PD_DSP { - reg = ; - }; - pd_npu@A523_PD_NPU { - reg = ; - }; - pd_sram@A523_PD_SRAM { - reg = ; - }; - pd_riscv@A523_PD_RISCV { - reg = ; - }; - }; - }; - - pck: pck-600@7060000 { - compatible = "allwinner,a523-pck", "syscon", "simple-mfd"; - reg = <0x0 0x07060000 0x0 0x8000>; - - pd1: power-controller { - compatible = "allwinner,a523-pck-600"; - clocks = <&r_ccu CLK_R_PPU>; - clock-names = "pck"; - resets = <&r_ccu RST_R_PPU>; - reset-names = "pck_rst"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd1_ve@A523_PCK_VE { - reg = ; - }; - pd1_vi@A523_PCK_VI { - reg = ; - }; - pd1_vo0@A523_PCK_VO0 { - reg = ; - }; - pd1_vo1@A523_PCK_VO1 { - reg = ; - }; - pd1_de@A523_PCK_DE { - reg = ; - }; - pd1_nand@A523_PCK_NAND { - reg = ; - }; - pd1_pcie@A523_PCK_PCIE { - reg = ; - }; - }; - }; - - nmi_intc: intc-nmi@7010320 { - compatible = "allwinner,sun8i-nmi"; - interrupt-parent = <&gic>; - #interrupt-cells = <2>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0x07010320 0 0xc>; - interrupts = ; - }; - - mmu_aw: iommu@2010000 { - compatible = "allwinner,iommu-v15-sun55iw3"; - reg = <0x0 0x02010000 0x0 0x1000>; - interrupts = ; - interrupt-names = "iommu-irq"; - clocks = <&ccu CLK_IOMMU>; - clock-names = "iommu"; - /* clock-frequency = <24000000>; */ - #iommu-cells = <2>; - }; - - dram: dram { - compatible = "allwinner,dram"; - clocks = <&ccu CLK_PLL_DDR>; - clock-names = "pll_ddr"; - }; - - ddr_clk: clk_ddr { - compatible = "allwinner,clock_ddr"; - reg = <0x0 0x02001000 0x0 0x1000>; - clocks = <&ccu CLK_PLL_DDR>; - clock-names = "pll_ddr"; - #clock-cells = <0>; - }; - - dram_opp_table: opp_table { - compatible = "operating-points-v2"; - opp@150000000 { - opp-hz = /bits/ 64 <150000000>; - clock-latency-ns = <150000>; - opp-microvolt = <900000>; - }; - }; - - sunxi_dmcfreq: dmcfreq@3120000 { - compatible = "allwinner,sun55iw3-dmc", "syscon"; - reg = <0x0 0x03120000 0x0 0x11000>, - <0x0 0x02020000 0x0 0x4000>; - interrupts = ; - clocks = <&ddr_clk>, <&ccu CLK_NSI>; - clock-names = "dram", "bus"; - operating-points-v2 = <&dram_opp_table>; - upthreshold = <60>; - downdifferential = <20>; - vddcore-supply = <®_vdd_sys>; - normalvoltage = <900000>; - boostvoltage = <900000>; - }; - - soc: soc@3000000 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rt-media@1c0e000 { - compatible = "allwinner,rt-media"; - }; - - ve: ve@1c0e000 { - compatible = "allwinner,sunxi-cedar-ve"; - reg = <0x0 0x01c0e000 0x0 0x1000>, - <0x0 0x03000000 0x0 0x10>; - interrupts = ; - clocks =<&ccu CLK_BUS_VE>, <&ccu CLK_VE>, <&ccu CLK_VE_MBUS_GATE>; - clock-names = "bus_ve", "ve", "mbus_ve"; - resets = <&ccu RST_BUS_VE>; - reset-names = "reset_ve"; - iommus = <&mmu_aw 2 1>; - power-domains = <&pd1 A523_PCK_VE>; - }; - - ve1: ve1@1c0e000 { - compatible = "allwinner,sunxi-cedar-ve"; - iommus = <&mmu_aw 3 1>; - }; - - pd_ve_test: pd-ve-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_VE>; - status = "okay"; - }; - - pd_vi_test: pd-vi-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_VI>; - status = "okay"; - }; - - pd_vo0_test: pd-vo0-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_VO0>; - status = "okay"; - }; - - pd_vo1_test: pd-vo1-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_VO1>; - status = "okay"; - }; - - pd_de_test: pd-de-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_DE>; - status = "okay"; - }; - - pd_nand_test: pd-nand-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_NAND>; - status = "okay"; - }; - - pd_pcie_test: pd-pcie-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd1 A523_PCK_PCIE>; - status = "okay"; - }; - - pd_dsp_test: pd-dsp-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd A523_PD_DSP>; - status = "okay"; - }; - - pd_npu_test: pd-npu-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd A523_PD_NPU>; - status = "okay"; - }; - - pd_sram_test: pd-sram-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd A523_PD_SRAM>; - status = "okay"; - }; - - pd_riscv_test: pd-riscv-test@0 { - compatible = "allwinner,sunxi-power-domain-test"; - reg = <0x0 0x0 0x0 0x0>; - power-domains = <&pd A523_PD_RISCV>; - status = "okay"; - }; - - test_ccu: test_ccu@3000090 { - compatible = "allwinner,sun55iw3-test-ccu"; - device_type = "ccu-test"; - resets = <&ccu RST_BUS_UART7>, <&ccu RST_BUS_UART6>; - reset-names = "rst-uart7", "rst-uart6"; - reg = <0x0 0x3000090 0x0 0x8>; - #clock-cells = <1>; - }; - - rtc_ccu: rtc_ccu@7090000 { - compatible = "allwinner,sun55iw3-rtc-ccu"; - reg = <0x0 0x07090000 0x0 0x400>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - cpupll_ccu: clock@8817000 { - compatible = "allwinner,sun55iw3-cpupll"; - reg = <0x0 0x08817000 0x0 0x4000>; - #clock-cells = <1>; - #reset-cells = <1>; - pll_step = <0x9>; - /* pll_ssc will divid pll_ssc_scale in code - * keep value 0 < pll_ssc < 10 - */ - pll_ssc_scale = <0xa>; - pll_ssc = <0x1>; - }; - - ccu: ccu@2001000 { - compatible = "allwinner,sun55iw3-ccu"; - reg = <0x0 0x02001000 0x0 0x1000>; - clocks = <&dcxo24M>, <&rtc_ccu CLK_OSC32K>, <&rc_16m>; - clock-names = "hosc", "losc", "iosc"; - #clock-cells = <1>; - #reset-cells = <1>; - /* - * sdm info: - * for example: - * pll_npux4 { - * sdm-enable = <1>; // required - * sdm-factor = <4>; // required - * freq-mod = ; // optional: default TR_N - * sdm-freq = ; // optional: default FREQ_31_5 - * }; - */ - }; - - r_ccu: r_ccu@7010000 { - compatible = "allwinner,sun55iw3-r-ccu"; - reg = <0x0 0x07010000 0x0 0x230>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mcu_ccu: mcu_ccu@7102000 { - compatible = "allwinner,sun55iw3-mcu-ccu"; - reg = <0x0 0x07102000 0x0 0x165>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - sunxi_drm: sunxi-drm { - compatible = "allwinner,sunxi-drm"; - fb_base = <0>; - status = "okay"; - }; - - de: de@5000000 { - compatible = "allwinner,display-engine"; - iommus = <&mmu_aw 5 1>; - power-domains = <&pd1 A523_PCK_DE>; - reg = <0x0 0x5000000 0x0 0x400000>; - interrupts = ; - clocks = <&ccu CLK_DE>, - <&ccu CLK_DE0>; - clock-names = "clk_de", - "clk_bus_de"; - resets = <&ccu RST_BUS_DE0>; - reset-names = "rst_bus_de"; - assigned-clocks = <&ccu CLK_DE>; - assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>; - assigned-clock-rates = <600000000>; - status = "okay"; - ports { - #address-cells = <1>; - #size-cells = <0>; - disp0: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - disp0_out_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_in_disp0>; - }; - disp0_out_tcon1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon1_in_disp0>; - }; - disp0_out_tcon2: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon2_in_disp0>; - }; - disp0_out_tcon3: endpoint@3 { - reg = <3>; - remote-endpoint = <&tcon3_in_disp0>; - }; - disp0_out_tcon4: endpoint@4 { - reg = <4>; - remote-endpoint = <&tcon4_in_disp0>; - }; - }; - disp1: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - disp1_out_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_in_disp1>; - }; - disp1_out_tcon1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon1_in_disp1>; - }; - disp1_out_tcon2: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon2_in_disp1>; - }; - disp1_out_tcon3: endpoint@3 { - reg = <3>; - remote-endpoint = <&tcon3_in_disp1>; - }; - disp1_out_tcon4: endpoint@4 { - reg = <4>; - remote-endpoint = <&tcon4_in_disp1>; - }; - }; - }; - }; - vo0: vo0@5500000 { - compatible = "allwinner,tcon-top0"; - power-domains = <&pd1 A523_PCK_VO0>; - reg = <0x0 0x05500000 0x0 0xfff>; - clocks = <&ccu CLK_DPSS_TOP0>; - clock-names = "clk_bus_dpss_top"; - resets = <&ccu RST_BUS_DPSS_TOP0>; - reset-names = "rst_bus_dpss_top"; - status = "disabled"; - }; - - vo1: vo1@5730000 { - compatible = "allwinner,tcon-top1"; - power-domains = <&pd1 A523_PCK_VO1>; - reg = <0x0 0x05730000 0x0 0xfff>; - clocks = <&ccu CLK_DPSS_TOP1>; - clock-names = "clk_bus_dpss_top"; - resets = <&ccu RST_BUS_DPSS_TOP1>; - reset-names = "rst_bus_dpss_top"; - status = "disabled"; - }; - - dlcd0: tcon0@5501000 { - compatible = "allwinner,tcon-lcd"; - reg = <0x0 0x05501000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_VO0_TCONLCD0>, - <&ccu CLK_BUS_VO0_TCONLCD0>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_VO0_TCONLCD0>, - <&ccu RST_BUS_LVDS0>; - reset-names = "rst_bus_tcon", "rst_bus_lvds"; - top = <&vo0>; - phys = <&dsi0combophy>, <&dsi1combophy>; - phy-names = "lvds_combo_phy0", "lvds_combo_phy1"; - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon0_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - tcon0_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon0>; - }; - tcon0_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon0>; - }; - }; - tcon0_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - tcon0_out_dsi0: endpoint@0 { - reg = <0>; - remote-endpoint = <&dsi0_in_tcon0>; - }; - tcon0_out_dsi1: endpoint@1 { - reg = <1>; - remote-endpoint = <&dsi1_in_tcon0>; - }; - }; - }; - }; - - dlcd1: tcon1@5502000 { - compatible = "allwinner,tcon-lcd"; - reg = <0x0 0x05502000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_VO0_TCONLCD1>, - <&ccu CLK_BUS_VO0_TCONLCD1>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_VO0_TCONLCD1>; - reset-names = "rst_bus_tcon"; - top = <&vo0>; - status = "disabled"; - // TODO find panel used of_graph? - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon1_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - tcon1_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon1>; - }; - tcon1_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon1>; - }; - }; - tcon1_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - tcon1_out_dsi1: endpoint@0 { - reg = <0>; - remote-endpoint = <&dsi1_in_tcon1>; - }; - }; - }; - }; - - dlcd2: tcon4@5731000 { - compatible = "allwinner,tcon-lcd"; - reg = <0x0 0x05731000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_VO1_TCONLCD0>, - <&ccu CLK_BUS_VO1_TCONLCD0>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_VO1_TCONLCD0>, - <&ccu RST_BUS_LVDS1>; - reset-names = "rst_bus_tcon", - "rst_bus_lvds"; - top = <&vo1>; - phys = <&dsi0combophy>, <&dsi1combophy>; - phy-names = "lvds_combo_phy0", "lvds_combo_phy1"; - - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon4_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - tcon4_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon4>; - }; - tcon4_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon4>; - }; - }; - tcon4_out: port@1 { - reg = <1>; - /* tcon4_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&xxxxx>; - }*/ - }; - }; - }; - - dsi0combophy: phy@5507000 { - compatible = "allwinner,sunxi-dsi-combo-phy0"; - reg = <0x0 0x05507000 0x0 0x1ff>; - clocks = <&ccu CLK_DSI0>, - <&ccu CLK_BUS_DSI0>, - <&ccu CLK_COMBPHY0>; - clock-names = "clk_mipi_dsi", - "clk_bus_mipi_dsi", - "clk_mipi_dsi_combphy"; - resets = <&ccu RST_BUS_DSI0>; - reset-names = "rst_bus_mipi_dsi"; - #phy-cells = <0>; - status = "disabled"; - }; - - dsi0: dsi0@5506000 { - compatible = "allwinner,dsi0"; - reg = <0x0 0x05506000 0x0 0xfff>; - interrupts = ; - clocks = <&ccu CLK_DSI0>, - <&ccu CLK_BUS_DSI0>, - <&ccu CLK_COMBPHY0>; - clock-names = "clk_mipi_dsi", - "clk_bus_mipi_dsi", - "clk_mipi_dsi_combphy"; - resets = <&ccu RST_BUS_DSI0>; - reset-names = "rst_bus_mipi_dsi"; - phys = <&dsi0combophy>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - dsi0_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - dsi0_in_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_out_dsi0>; - }; - }; - }; - }; - - dsi1combophy: phy@5509000 { - compatible = "allwinner,sunxi-dsi-combo-phy1"; - reg = <0x0 0x05509000 0x0 0x1ff>; - - clocks = <&ccu CLK_DSI1>, - <&ccu CLK_BUS_DSI1>, - <&ccu CLK_COMBPHY1>; - clock-names = "clk_mipi_dsi", - "clk_bus_mipi_dsi", - "clk_mipi_dsi_combphy"; - resets = <&ccu RST_BUS_DSI1>; - reset-names = "rst_bus_mipi_dsi"; - #phy-cells = <0>; - status = "disabled"; - }; - - dsi1: dsi1@5508000 { - compatible = "allwinner,dsi1"; - reg = <0x0 0x05508000 0x0 0xfff>; - interrupts = ; - clocks = <&ccu CLK_DSI1>, - <&ccu CLK_BUS_DSI1>, - <&ccu CLK_COMBPHY1>; - clock-names = "clk_mipi_dsi", - "clk_bus_mipi_dsi", - "clk_mipi_dsi_combphy"; - resets = <&ccu RST_BUS_DSI1>; - reset-names = "rst_bus_mipi_dsi"; - phys = <&dsi1combophy>; - - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - - dsi1_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - dsi1_in_tcon0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon0_out_dsi1>; - }; - dsi1_in_tcon1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon1_out_dsi1>; - }; - }; - }; - }; - - tv0: tcon2@5503000 { - compatible = "allwinner,tcon-tv-hdmi"; - reg = <0x0 0x05503000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_TCONTV>, - <&ccu CLK_BUS_TCONTV>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_TCONTV>; - reset-names = "rst_bus_tcon"; - top = <&vo0>; - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon2_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - tcon2_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon2>; - }; - tcon2_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon2>; - }; - }; - tcon2_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - tcon2_out_hdmi: endpoint@0 { - reg = <0>; - remote-endpoint = <&hdmi_in_tcon2>; - }; - }; - }; - }; - - hdmi: hdmi@5520000 { - compatible = "allwinner,sunxi-hdmi"; - reg = <0x0 0x05520000 0x0 0x100000>; - interrupts = ; - clocks = <&ccu CLK_HDMI>, - <&ccu CLK_HDMI_24M>, - <&ccu CLK_HDMI_CEC>, - <&ccu CLK_TCONTV>; - clock-names = "clk_hdmi", - "clk_hdmi_24M", - "clk_cec", - "clk_tcon_tv"; - resets = <&ccu RST_BUS_HDMI_SUB>, - <&ccu RST_BUS_HDMI_MAIN>; - reset-names = "rst_bus_sub", - "rst_bus_main"; - assigned-clocks = <&ccu CLK_HDMI>; - assigned-clock-rates = <0>, <0>; - - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - hdmi_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - hdmi_in_tcon2: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon2_out_hdmi>; - }; - }; - }; - }; - - tv1: tcon3@5504000 { - compatible = "allwinner,tcon-tv-edp"; - reg = <0x0 0x05504000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_TCONTV1>, - <&ccu CLK_BUS_TCONTV1>; - clock-names = "clk_tcon", - "clk_bus_tcon"; - resets = <&ccu RST_BUS_TCONTV1>; - reset-names = "rst_bus_tcon"; - top = <&vo0>; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - tcon3_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - tcon3_in_disp0: endpoint@0 { - reg = <0>; - remote-endpoint = <&disp0_out_tcon3>; - }; - tcon3_in_disp1: endpoint@1 { - reg = <1>; - remote-endpoint = <&disp1_out_tcon3>; - }; - }; - tcon3_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; - tcon3_out_edp: endpoint@0 { - reg = <0>; - remote-endpoint = <&edp_in_tcon3>; - }; - }; - }; - }; - - drm_edp: drm_edp@5720000 { - compatible = "allwinner,drm-edp"; - reg = <0x0 0x05720000 0x0 0x4000>; - interrupts = ; - power-domains = <&pd1 A523_PCK_VO0>; - clocks = <&ccu CLK_BUS_EDP>, - <&ccu CLK_EDP>, - <&ccu CLK_HDMI_24M>; - clock-names = "clk_bus_edp", "clk_edp", "clk_24m_edp"; - resets = <&ccu RST_BUS_EDP>; - reset-names = "rst_bus_edp"; - - assigned-clocks = <&ccu CLK_EDP>; - assigned-clock-parents = <&ccu CLK_PLL_VIDEO1_4X>; - status = "disabled"; - ports { - #address-cells = <1>; - #size-cells = <0>; - edp_in: port@0 { - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - edp_in_tcon3: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon3_out_edp>; - }; - }; - edp_out: port@1 { - #address-cells = <1>; - #size-cells = <0>; - reg = <1>; -/* edp_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&edp_panel>; - };*/ - }; - }; - /* edp_panel: panel@0 { - reg = <0>; - ports { - #address-cells = <1>; - #size-cells = <0>; - edp_panel_in: port@0 { - reg = <0>; - edp_panel_in_edp: endpoint@0 { - reg = <0>; - remote-endpoint = <&edp_out_panel>; - }; - }; - }; - }*/ - }; - - disp: disp@5000000 { - compatible = "allwinner,sunxi-disp"; - reg = <0x0 0x05000000 0x0 0x400000>, /*de*/ - <0x0 0x05500000 0x0 0x1000>, /* display_if_top */ - <0x0 0x05501000 0x0 0x1000>, /* tcon0 - tcon_lcd0 */ - <0x0 0x05502000 0x0 0x1000>, /* tcon1 - tcon_lcd1 */ - <0x0 0x05503000 0x0 0x1000>, /* tcon2 - tcon_tv0 */ - <0x0 0x05504000 0x0 0x1000>, /* tcon3 - tcon_tv1 */ - <0x0 0x05731000 0x0 0x1000>, /* tcon4 - tcon_lcd2 */ - <0x0 0x05506000 0x0 0x1fff>, /* dsi0 */ - <0x0 0x05508000 0x0 0x1fff>; /* dsi1 */ - interrupts = , /* DE */ - , /* tcon_lcd0 */ - , /* tcon_lcd1 */ - , /* tcon_tv0 */ - , /* tcon_tv1 */ - , /* tcon_lcd2 */ - , /* dsi0 */ - ; /* dsi1 */ - clocks = <&ccu CLK_DE>, - <&ccu CLK_DE>, - <&ccu CLK_DE0>, - <&ccu CLK_DE0>, - <&ccu CLK_VO0_TCONLCD0>, - <&ccu CLK_VO0_TCONLCD1>, - <&ccu CLK_TCONTV>, - <&ccu CLK_TCONTV1>, - <&ccu CLK_VO1_TCONLCD0>, - <&ccu CLK_BUS_VO0_TCONLCD0>, - <&ccu CLK_BUS_VO0_TCONLCD1>, - <&ccu CLK_BUS_TCONTV>, - <&ccu CLK_BUS_TCONTV1>, - <&ccu CLK_BUS_VO1_TCONLCD0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP1>, - <&ccu CLK_DSI0>, - <&ccu CLK_DSI1>, - <&ccu CLK_BUS_DSI0>, - <&ccu CLK_BUS_DSI1>, - <&ccu CLK_COMBPHY0>, - <&ccu CLK_COMBPHY1>; - clock-names = "clk_de0", - "clk_de1", - "clk_bus_de0", - "clk_bus_de1", - "clk_tcon0", - "clk_tcon1", - "clk_tcon2", - "clk_tcon3", - "clk_tcon4", - "clk_bus_tcon0", - "clk_bus_tcon1", - "clk_bus_tcon2", - "clk_bus_tcon3", - "clk_bus_tcon4", - "clk_bus_dpss_top0", - "clk_bus_dpss_top1", - "clk_bus_dpss_top2", - "clk_bus_dpss_top3", - "clk_bus_dpss_top4", - "clk_mipi_dsi0", - "clk_mipi_dsi1", - "clk_bus_mipi_dsi0", - "clk_bus_mipi_dsi1", - "clk_mipi_dsi_combphy0", - "clk_mipi_dsi_combphy1"; - resets = <&ccu RST_BUS_DE0>, - <&ccu RST_BUS_DE0>, - <&ccu RST_BUS_VO0_TCONLCD0>, - <&ccu RST_BUS_VO0_TCONLCD1>, - <&ccu RST_BUS_TCONTV>, - <&ccu RST_BUS_TCONTV1>, - <&ccu RST_BUS_VO1_TCONLCD0>, - <&ccu RST_BUS_LVDS0>, - <&ccu RST_BUS_LVDS1>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP1>, - <&ccu RST_BUS_DSI0>, - <&ccu RST_BUS_DSI1>; - reset-names = "rst_bus_de0", - "rst_bus_de1", - "rst_bus_tcon0", - "rst_bus_tcon1", - "rst_bus_tcon2", - "rst_bus_tcon3", - "rst_bus_tcon4", - "rst_bus_lvds0", - "rst_bus_lvds1", - "rst_bus_dpss_top0", - "rst_bus_dpss_top1", - "rst_bus_dpss_top2", - "rst_bus_dpss_top3", - "rst_bus_dpss_top4", - "rst_bus_mipi_dsi0", - "rst_bus_mipi_dsi1"; - assigned-clocks = <&ccu CLK_DE>, - <&ccu CLK_VO0_TCONLCD0>, - <&ccu CLK_VO0_TCONLCD1>, - <&ccu CLK_VO1_TCONLCD0>, - <&ccu CLK_BUS_TCONTV>, - <&ccu CLK_TCONTV>, - <&ccu CLK_TCONTV1>, - <&ccu CLK_DSI0>, - <&ccu CLK_DSI1>, - <&ccu CLK_COMBPHY0>, - <&ccu CLK_COMBPHY1>; - assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO1_4X>, - <&ccu CLK_PLL_VIDEO1_4X>, - <&ccu CLK_PLL_PERI0_150M>, - <&ccu CLK_PLL_PERI0_150M>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>; - assigned-clock-rates = <600000000>; - iommus = <&mmu_aw 5 0>; - /*power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>, <&pd1 A523_PCK_VO1>; - power-domain-names = "pd_de", "pd_vo0", "pd_vo1";*/ - power-domains = <&pd1 A523_PCK_DE>, <&pd1 A523_PCK_VO0>; - power-domain-names = "pd_de", "pd_vo0"; - status = "okay"; - - boot_disp = <0>; - fb_base = <0>; - }; - - edp0: edp0@5720000 { - compatible = "allwinner,sunxi-edp0"; - reg = <0x0 0x05720000 0x0 0x4000>; - interrupts = ; - clocks = <&ccu CLK_BUS_EDP>, - <&ccu CLK_EDP>, - <&ccu CLK_HDMI_24M>; - clock-names = "clk_bus_edp", "clk_edp", "edp_clk_24m"; - resets = <&ccu RST_BUS_EDP>; - reset-names = "rst_bus_edp"; - - assigned-clocks = <&ccu CLK_EDP>; - assigned-clock-parents = <&ccu CLK_PLL_VIDEO1_4X>; - - status = "disabled"; - }; - - - lcd0: lcd0@1c0c000 { - compatible = "allwinner,sunxi-lcd0"; - /* Fake registers to avoid dtc compiling warnings */ - reg = <0x0 0x1c0c000 0x0 0x0>; - pinctrl-names = "active","sleep"; - }; - - lcd1: lcd1@1c0c000 { - compatible = "allwinner,sunxi-lcd1"; - /* Fake registers to avoid dtc compiling warnings */ - reg = <0x0 0x1c0c000 0x0 0x0>; - pinctrl-names = "active","sleep"; - }; - - lcd2: lcd2@1c0c000 { - compatible = "allwinner,sunxi-lcd2"; - /* Fake registers to avoid dtc compiling warnings */ - reg = <0x0 0x1c0c000 0x0 0x0>; - pinctrl-names = "active","sleep"; - }; - - r_pio: pinctrl@7022000 { - #address-cells = <1>; - compatible = "allwinner,sun55iw3-r-pinctrl"; - reg = <0x0 0x07022000 0x0 0x800>, - <0x0 0x07010374 0x0 0x4>, - <0x0 0x07010378 0x0 0x4>; - /* - * The reg control i2s0/dmic routes to cpus-pad or sys-pad - * 0: use cpus pad, 1: use sys pad - */ - reg-names = "r-pio", "i2s0", "dmic"; - interrupts = , /* GPIOL */ - ; /* GPIOM */ - clocks = <&ccu CLK_R_APBS1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - }; - - g2d: g2d@5440000 { - compatible = "allwinner,sunxi-g2d"; - reg = <0x0 0x05440000 0x0 0x30000>; - interrupts = ; - clocks = <&ccu CLK_BUS_G2D>, <&ccu CLK_G2D>; - clock-names = "bus", "g2d"; - resets = <&ccu RST_BUS_G2D>; - iommus = <&mmu_aw 4 1>; - power-domains = <&pd1 A523_PCK_VO0>; - power-domain-names = "pd1_vo0"; - assigned-clocks = <&ccu CLK_G2D>; - assigned-clock-rates = <300000000>; - }; - - pio: pinctrl@2000000 { - #address-cells = <1>; - compatible = "allwinner,sun55iw3-pinctrl"; - /* - * The reg control i2s0/dmic routes to cpus-pad or sys-pad - * 0: use cpus pad, 1: use sys pad - */ - reg = <0x0 0x02000000 0x0 0x800>, - <0x0 0x07010374 0x0 0x4>, - <0x0 0x07010378 0x0 0x4>; - reg-names = "pio", "i2s0", "dmic"; - interrupts = , /* GPIOB */ - , /* GPIOC */ - , /* GPIOD */ - , /* GPIOE */ - , /* GPIOF */ - , /* GPIOG */ - , /* GPIOH */ - , /* GPIOI */ - , /* GPIOJ */ - ; /* GPIOK */ - clocks = <&ccu CLK_APB1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - - sdc0_pins_a: sdc0@0 { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "sdc0"; - drive-strength = <40>; - bias-pull-up; - power-source = <3300>; - }; - - sdc0_pins_b: sdc0@1 { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "sdc0"; - drive-strength = <40>; - bias-pull-up; - power-source = <1800>; - }; - - sdc0_pins_c: sdc0@2 { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "gpio_in"; - power-source = <3300>; - }; - - /* TODO: add jtag pin */ - sdc0_pins_d: sdc0@3 { - pins = "PF2", "PF4"; - function = "uart0"; - drive-strength = <10>; - bias-pull-up; - power-source = <3300>; - }; - - sdc0_pins_e: sdc0@4 { - pins = "PF0", "PF1", "PF3", - "PF5"; - function = "jtag"; - drive-strength = <10>; - bias-pull-up; - power-source = <3300>; - }; - - sdc1_pins_a: sdc1@0 { - pins = "PG0", "PG1", "PG2", - "PG3", "PG4", "PG5"; - function = "sdc1"; - drive-strength = <40>; - bias-pull-up; - }; - - sdc1_pins_b: sdc1@1 { - pins = "PG0", "PG1", "PG2", - "PG3", "PG4", "PG5"; - function = "gpio_in"; - }; - - sdc2_pins_a: sdc2@0 { - pins = "PC1", "PC5", "PC6", - "PC8", "PC9", "PC10", "PC11", - "PC13", "PC14", "PC15", "PC16"; - function = "sdc2"; - drive-strength = <40>; - bias-pull-up; - }; - - sdc2_pins_b: sdc2@1 { - pins = "PC0", "PC1", "PC5", "PC6", - "PC8", "PC9", "PC10", "PC11", - "PC13", "PC14", "PC15", "PC16"; - function = "gpio_in"; - }; - - sdc2_pins_c: sdc2@2 { - pins = "PC0"; - function = "sdc2"; - drive-strength = <40>; - bias-pull-down; - }; - - uart1_pins_a: uart1@0 { - pins = "PG6", "PG7", "PG8", "PG9"; - function = "uart1"; - drive-strength = <10>; - bias-pull-up; - }; - - uart1_pins_b: uart1@1 { - pins = "PG6", "PG7", "PG8", "PG9"; - function = "gpio_in"; - }; - - dsi0_4lane_pins_a: dsi0_4lane@0 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; - function = "dsi0"; - drive-strength = <30>; - bias-disable; - }; - - dsi0_4lane_pins_b: dsi0_4lane@1 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; - function = "io_disabled"; - bias-disable; - }; - - dsi1_4lane_pins_a: dsi1_4lane@0 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "dsi1"; - drive-strength = <30>; - bias-disable; - }; - - dsi1_4lane_pins_b: dsi1_4lane@1 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "io_disabled"; - bias-disable; - }; - - rgb18_pins_a: rgb18@0 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ - "PD20", "PD21"; - function = "lcd0"; - drive-strength = <30>; - }; - - rgb18_pins_b: rgb18@1 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ - "PD20", "PD21"; - function = "gpio_in"; - }; - - lvds1_pins_a: lvds1@0 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "lvds1"; - drive-strength = <30>; - }; - - lvds1_pins_b: lvds1@1 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "gpio_in"; - }; - - lvds2_pins_a: lvds2@0 { - pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9"; - function = "lvds2"; - drive-strength = <30>; - }; - - lvds2_pins_b: lvds2@1 { - pins = "PJ0", "PJ1", "PJ2", "PJ3", "PJ4", "PJ5", "PJ6", "PJ7", "PJ8", "PJ9"; - function = "gpio_in"; - }; - - lvds3_pins_a: lvds3@0 { - pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; - function = "lvds3"; - drive-strength = <30>; - }; - - lvds3_pins_b: lvds3@1 { - pins = "PJ10", "PJ11", "PJ12", "PJ13", "PJ14", "PJ15", "PJ16", "PJ17", "PJ18", "PJ19"; - function = "gpio_in"; - }; - csi_mclk0_pins_a: csi_mclk0@0 { - pins = "PE0"; - function = "mipi0"; - drive-strength = <20>; - }; - - csi_mclk0_pins_b: csi_mclk0@1 { - pins = "PE0"; - function = "gpio_in"; - }; - - csi_mclk1_pins_a: csi_mclk1@0 { - pins = "PE5"; - function = "mipi1"; - drive-strength = <20>; - }; - - csi_mclk1_pins_b: csi_mclk1@1 { - pins = "PE5"; - function = "gpio_in"; - }; - - csi_mclk2_pins_a: csi_mclk2@0 { - pins = "PE15"; - function = "mipi2"; - drive-strength = <20>; - }; - - csi_mclk2_pins_b: csi_mclk2@1 { - pins = "PE15"; - function = "gpio_in"; - }; - - csi_mclk3_pins_a: csi_mclk3@0 { - pins = "PE10"; - function = "mipi3"; - drive-strength = <20>; - }; - - csi_mclk3_pins_b: csi_mclk3@1 { - pins = "PE10"; - function = "gpio_in"; - }; - - ncsi_bt656_pins_a: ncsi_BT656@0 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23"; - function = "ncsi"; - drive-strength = <20>; - }; - - ncsi_bt656_pins_b: ncsi_BT656@1 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23"; - function = "gpio_in"; - }; - - ncsi_bt1120_pins_a: ncsi_BT1120@0 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23", - "PE6", "PE7", "PE8", "PE9", - "PE10", "PE11", "PE12", "PE15"; - function = "ncsi"; - drive-strength = <20>; - }; - - ncsi_bt1120_pins_b: ncsi_BT1120@1 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23", - "PE6", "PE7", "PE8", "PE9", - "PE10", "PE11", "PE12", "PE15"; - function = "gpio_in"; - }; - - mipia_pins_a: mipia@0 { - pins = "PK0", "PK1", "PK2", - "PK3", "PK4", "PK5"; - function = "mcsia"; - drive-strength = <10>; - - }; - - mipia_pins_b: mipia@1 { - pins = "PK0", "PK1", "PK2", - "PK3", "PK4", "PK5"; - function = "gpio_in"; - }; - - mipib_pins_a: mipib@0 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "mcsib"; - drive-strength = <10>; - }; - - mipib_pins_b: mipib@1 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "gpio_in"; - - }; - - mipib_4lane_pins_a: mipib_4lane@0 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "mcsib"; - drive-strength = <10>; - }; - - mipib_4lane_pins_b: mipib_4lane@1 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "gpio_in"; - }; - - mipic_pins_a: mipic@0 { - pins = "PK12", "PK13", "PK14", - "PK15", "PK16", "PK17"; - function = "mcsic"; - drive-strength = <10>; - - }; - - mipic_pins_b: mipic@1 { - pins = "PK12", "PK13", "PK14", - "PK15", "PK16", "PK17"; - function = "gpio_in"; - }; - - mipid_pins_a: mipid@0 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "mcsid"; - drive-strength = <10>; - }; - - mipid_pins_b: mipid@1 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "gpio_in"; - - }; - - mipid_4lane_pins_a: mipid_4lane@0 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "mcsid"; - drive-strength = <10>; - }; - - mipid_4lane_pins_b: mipid_4lane@1 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "gpio_in"; - }; - - test_pins_a: test_pins@0 { - pins = "PB2", "PB5"; - function = "test"; - drive-strength = <10>; - bias-pull-up; - }; - - test_pins_b: test_pins@1 { - pins = "PB2", "PB5"; - function = "gpio_in"; - }; - }; - - pinctrl_test: pinctrl_test@2000000 { - reg = <0x0 0x0 0x0 0x0>; - compatible = "allwinner,sunxi-pinctrl-test"; - device_type = "pinctrl-test"; - pinctrl-0 = <&test_pins_a>; - pinctrl-1 = <&test_pins_b>; - pinctrl-names = "default", "sleep"; - test-gpios = <&pio PB 4 GPIO_ACTIVE_LOW>; - suspend-gpios = <&r_pio PL 4 GPIO_ACTIVE_LOW>; - wakeup-source; - interrupt-parent = <&pio>; - interrupts = ; - }; - - ths0: ths0@200a000 { - compatible = "allwinner,sun55iw3p1-ths0"; - reg = <0x0 0x0200a000 0x0 0x400>; - clocks = <&ccu CLK_THS>, <&ccu CLK_GPADC0_24M>; - clock-names = "bus", "sclk"; - resets = <&ccu RST_BUS_TH>; - #thermal-sensor-cells = <1>; - }; - - ths1: ths0@2009400 { - compatible = "allwinner,sun55iw3p1-ths1"; - reg = <0x0 0x02009400 0x0 0x400>; - clocks = <&ccu CLK_THS>, <&ccu CLK_GPADC1_24M>; - clock-names = "bus", "sclk"; - resets = <&ccu RST_BUS_TH>; - #thermal-sensor-cells = <1>; - }; - - soc_timer0: timer@3008000 { - compatible = "allwinner,sun50i-timer"; - device_type = "soc_timer"; - reg = <0x0 0x03008000 0x0 0x400>; - interrupt-parent = <&gic>; - interrupts = ; - clock-names = "parent", "bus", "timer0-mod", "timer1-mod"; - clocks = <&dcxo24M>, <&ccu CLK_TIMER>, <&ccu CLK_TIMER0>, <&ccu CLK_TIMER1>; - resets = <&ccu RST_BUS_TIME>; - }; - - arm_pmu { - compatible = "arm,armv8-pmuv3"; - interrupt-parent = <&gic>; - interrupts = ; - }; - - dump_reg:dump_reg@40000 { - compatible = "allwinner,sunxi-dump-reg"; - reg = <0x0 0x00040000 0x0 0x0004>; - }; - - soft_jtag_master:soft_jtag_master@0 { - compatible = "allwinner,soft-jtag-master"; - tdi-gpios = <&r_pio PL 2 GPIO_ACTIVE_HIGH>; - tdo-gpios = <&r_pio PL 3 GPIO_ACTIVE_HIGH>; - tck-gpios = <&pio PB 11 GPIO_ACTIVE_HIGH>; - tms-gpios = <&pio PB 12 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; - - reg_pio1_8: pio-18 { - compatible = "regulator-fixed"; - regulator-name = "pio-18"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - reg_pio2_8: pio-28 { - compatible = "regulator-fixed"; - regulator-name = "pio-28"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - }; - - reg_pio3_3: pio-33 { - compatible = "regulator-fixed"; - regulator-name = "pio-33"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - uart0: uart@2500000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x02500000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_UART0>; - resets = <&ccu RST_BUS_UART0>; - uart0_port = <0>; - uart0_type = <2>; - status = "disabled"; - }; - - uart1: uart@2500400 { - compatible = "allwinner,sun55i-uart"; - device_type = "uart1"; - reg = <0x0 0x02500400 0x0 0x400>; - interrupts = ; - sunxi,uart-fifosize = <64>; - clocks = <&ccu CLK_BUS_UART1>; - clock-names = "uart1"; - resets = <&ccu RST_BUS_UART1>; - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&uart1_pins_a>; - pinctrl-1 = <&uart1_pins_b>; - uart1_port = <1>; - uart1_type = <4>; - status = "disabled"; - }; - - uart2: uart@2500800 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2500800 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART2>; - resets = <&ccu RST_BUS_UART2>; - uart2_port = <2>; - uart2_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart3: uart@2500c00 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2500c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART3>; - resets = <&ccu RST_BUS_UART3>; - uart3_port = <3>; - uart3_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart4: uart@2501000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART4>; - resets = <&ccu RST_BUS_UART4>; - uart4_port = <4>; - uart4_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart5: uart@2501400 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501400 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART5>; - resets = <&ccu RST_BUS_UART5>; - uart5_port = <5>; - uart5_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart6: uart@2501800 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501800 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART6>; - resets = <&ccu RST_BUS_UART6>; - uart6_port = <6>; - uart6_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart7: uart@2501c00 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART7>; - resets = <&ccu RST_BUS_UART7>; - uart7_port = <7>; - uart7_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart8: uart@7080000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x7080000 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_UART0>; - resets = <&r_ccu RST_R_UART0>; - uart8_port = <8>; - uart8_type = <2>; - sunxi,uart-fifosize = <64>; - status = "disabled"; - }; - - uart9: uart@7080400 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x7080400 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_UART1>; - resets = <&r_ccu RST_R_UART1>; - uart9_port = <9>; - uart9_type = <2>; - sunxi,uart-fifosize = <64>; - status = "disabled"; - }; - - dma:dma-controller@3002000 { - compatible = "allwinner,dma-v105"; - reg = <0x0 0x03002000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_DMA>, <&ccu CLK_DMA_MBUS_GATE>; - clock-names = "bus", "mbus"; - dma-channels = <8>; - dma-requests = <54>; - resets = <&ccu RST_BUS_DMA>; - #dma-cells = <1>; - status = "okay"; - }; - - dma1:dma1-controller@7121000 { - compatible = "allwinner,dma-v104"; - reg = <0x0 0x7121000 0x0 0x1000>; - interrupts = ; - clocks = <&mcu_ccu CLK_BUS_MCU_DMA>, <&mcu_ccu CLK_BUS_MCU_DMA_MBUS>, <&mcu_ccu CLK_BUS_MCU_MBUS>; - clock-names = "bus", "mbus", "mcu-mbus"; - dma-channels = <8>; - dma-requests = <15>; - resets = <&mcu_ccu RST_BUS_MCU_DMA>; - #dma-cells = <1>; - status = "okay"; - }; - - npu: npu@7122000 { - compatible = "allwinner,npu"; - reg = <0x0 0x07122000 0x0 0x1000>; - device_type = "npu"; - dev_name = "npu"; - interrupts = ; - clocks = <&ccu CLK_NPU>, <&ccu CLK_PLL_NPU_2X>, <&mcu_ccu CLK_BUS_MCU_NPU_ACLK>, <&mcu_ccu CLK_BUS_MCU_NPU_HCLK>; - clock-names = "clk_npu", "clk_parent", "npu-aclk", "npu-hclk"; - operating-points-v2 = <&npu_opp_table>; - resets = <&mcu_ccu RST_BUS_MCU_NPU>; - reset-names = "npu_rst"; - interrupt-names = "npu"; - npu-vf = <696>; - npu-regulator = <1>; - power-domains = <&pd A523_PD_NPU>; - status = "okay"; - }; - - npu_opp_table: npu-opp-table { - compatible = "allwinner,sun55i-operating-points"; - opp-shared; - npu_opp_table_546: opp-546 { - opp-hz = <546000000>; - opp-microvolt-vf1 = <920000>; - opp-microvolt-vf2 = <920000>; - opp-microvolt-vf21 = <920000>; - opp-microvolt-vf3 = <920000>; - opp-microvolt-vf31 = <920000>; - opp-microvolt-vf4 = <920000>; - opp-microvolt-vf5 = <920000>; - }; - - npu_opp_table_696: opp-696 { - opp-hz = <696000000>; - opp-microvolt-vf1 = <1050000>; - opp-microvolt-vf2 = <1050000>; - opp-microvolt-vf21 = <1050000>; - opp-microvolt-vf3 = <1000000>; - opp-microvolt-vf31 = <1000000>; - opp-microvolt-vf4 = <1000000>; - opp-microvolt-vf5 = <960000>; - }; - }; - - wdt: watchdog@2050000 { - compatible = "allwinner,wdt-v103"; - reg = <0x0 0x02050000 0x0 0x20>; /* In Timers Spec */ - interrupts = ; /* In GIC Spec */ - }; - - gpadc0: gpadc0@2009000 { - compatible = "allwinner,sunxi-gpadc"; - reg = <0x0 0x02009000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_GPADC0>; - clock-names = "bus"; - resets = <&ccu RST_BUS_GPADC0>; - status = "disabled"; - }; - - gpadc1: gpadc1@2009c00 { - compatible = "allwinner,sunxi-gpadc"; - reg = <0x0 0x02009c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_GPADC1>; - clock-names = "bus"; - resets = <&ccu RST_BUS_GPADC1>; - status = "disabled"; - }; - - dsp0_rproc: dsp0_rproc@0 { - compatible = "allwinner,hifi4-rproc"; - clock-frequency = <600000000>; - clocks = <&ccu CLK_PLL_PERI0_2X>, <&mcu_ccu CLK_DSP_DSP>, <&ccu CLK_DSP>, <&mcu_ccu CLK_BUS_DSP_CFG>, <&r_ccu CLK_R_AHB>; - clock-names = "pll", "mcu-mod", "mod", "cfg", "ahbs"; - resets = <&mcu_ccu RST_BUS_DSP>, <&mcu_ccu RST_BUS_DSP_CFG>, <&mcu_ccu RST_BUS_DSP_DBG>; - reset-names = "mod-rst", "cfg-rst", "dbg-rst"; - reg = <0x0 0x07010364 0x0 0x04>, - <0x0 0x07100000 0x0 0x40>; - reg-names = "sram-for-cpux", "hifi4-cfg"; - firmware-name = "amp_dsp0.bin"; - power-domains = <&pd A523_PD_DSP>, <&pd A523_PD_SRAM>; - power-domain-names = "pd_dsp", "pd_sram"; - status = "disabled"; - }; - - e906_rproc: e906_rproc@7130000 { - compatible = "allwinner,e906-rproc"; - clocks = <&mcu_ccu CLK_BUS_PUBSRAM>, <&mcu_ccu CLK_BUS_RV>, <&mcu_ccu CLK_BUS_RV_CFG>; - clock-names = "pubsram", "mod", "cfg"; - resets = <&mcu_ccu RST_BUS_PUBSRAM>, <&mcu_ccu RST_BUS_RV>, <&mcu_ccu RST_BUS_RV_CFG>, <&mcu_ccu RST_BUS_RV_DBG>; - reset-names = "pubsram-rst", "mod-rst", "cfg-rst", "dbg-rst"; - firmware-name = "amp_rv0.bin"; - reg = <0x0 0x07130000 0x0 0x1000>; - reg-names = "e906-cfg"; - power-domains = <&pd A523_PD_RISCV>, <&pd A523_PD_SRAM>; - power-domain-names = "pd_riscv", "pd_sram"; - status = "disabled"; - }; - - msgbox: msgbox@3003000 { - compatible = "allwinner,sun55iw3-msgbox"; - #mbox-cells = <1>; - reg = <0x0 0x03003000 0x0 0x1000>, - <0x0 0x07120000 0x0 0x1000>, - <0x0 0x07094000 0x0 0x1000>, - <0x0 0x07136000 0x0 0x1000>; - interrupts = , - , - , - ; - clocks = <&ccu CLK_MSGBOX0>; - clock-names = "msgbox"; - resets = <&ccu RST_BUS_MSGBOX0>; - reset-names = "rst"; - local_id = <0>; - }; - - hwspinlock: hwspinlock@3005000 { - compatible = "allwinner,sunxi-hwspinlock"; - reg = <0x0 0x3005000 0x0 0x1000>; - #hwlock-cells = <1>; - clocks = <&ccu CLK_SPINLOCK>; - clock-names = "clk_hwspinlock_bus"; - resets = <&ccu RST_BUS_SPINLOCK>; - reset-names = "rst"; - num-locks = <32>; - status = "okay"; - }; - - pwm0: pwm0@2000c00 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v201"; - reg = <0x0 0x02000c00 0x0 0x400>; - clocks = <&ccu CLK_PWM>; - interrupts = ; - resets = <&ccu RST_BUS_PWM>; - pwm-number = <16>; - pwm-base = <0x0>; - sunxi-pwms = <&pwm0_0>, <&pwm0_1>, <&pwm0_2>, <&pwm0_3>, <&pwm0_4>, - <&pwm0_5>, <&pwm0_6>, <&pwm0_7>, <&pwm0_8>, <&pwm0_9>, - <&pwm0_10>, <&pwm0_11>, <&pwm0_12>, <&pwm0_13>, - <&pwm0_14>, <&pwm0_15>; - status = "okay"; - }; - - pwm0_0: pwm0_0@2000c10 { - compatible = "allwinner,sunxi-pwm0"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c10 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_1: pwm0_1@2000c11 { - compatible = "allwinner,sunxi-pwm1"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c11 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_2: pwm0_2@2000c12 { - compatible = "allwinner,sunxi-pwm2"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c12 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_3: pwm0_3@2000c13 { - compatible = "allwinner,sunxi-pwm3"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c13 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_4: pwm0_4@2000c14 { - compatible = "allwinner,sunxi-pwm4"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c14 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_5: pwm0_5@2000c15 { - compatible = "allwinner,sunxi-pwm5"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c15 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_6: pwm0_6@2000c16 { - compatible = "allwinner,sunxi-pwm6"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c16 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_7: pwm0_7@2000c17 { - compatible = "allwinner,sunxi-pwm7"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c17 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_8: pwm0_8@2000c18 { - compatible = "allwinner,sunxi-pwm8"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c18 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_9: pwm0_9@2000c19 { - compatible = "allwinner,sunxi-pwm9"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c19 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_10: pwm0_10@2000c1a { - compatible = "allwinner,sunxi-pwm10"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1a 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_11: pwm0_11@2000c1b { - compatible = "allwinner,sunxi-pwm11"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1b 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_12: pwm0_12@2000c1c { - compatible = "allwinner,sunxi-pwm12"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1c 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_13: pwm0_13@2000c1d { - compatible = "allwinner,sunxi-pwm13"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1d 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_14: pwm0_14@2000c1e { - compatible = "allwinner,sunxi-pwm14"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1e 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_15: pwm0_15@2000c1f { - compatible = "allwinner,sunxi-pwm15"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1f 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm1: pwm1@2051000 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v201"; - reg = <0x0 0x02051000 0x0 0x400>; - clocks = <&ccu CLK_PWM1>; - interrupts = ; - resets = <&ccu RST_BUS_PWM1>; - pwm-number = <4>; - pwm-base = <0x10>; - sunxi-pwms = <&pwm1_0>, <&pwm1_1>, <&pwm1_2>, <&pwm1_3>; - status = "disabled"; - }; - - pwm1_0: pwm1_0@2051010 { - compatible = "allwinner,sunxi-pwm16"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051010 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - pwm1_1: pwm1_1@2051011 { - compatible = "allwinner,sunxi-pwm17"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051011 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - pwm1_2: pwm1_2@2051012 { - compatible = "allwinner,sunxi-pwm18"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051012 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - pwm1_3: pwm1_3@2051013 { - compatible = "allwinner,sunxi-pwm19"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051013 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - s_pwm0: s_pwm0@7020c00 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v202"; - reg = <0x0 0x07020c00 0x0 0x400>; - clocks = <&r_ccu CLK_R_PWM>,<&r_ccu CLK_BUS_R_PWM>; - interrupts = ; - clock-names = "clk_pwm","clk_bus_pwm"; - resets = <&r_ccu RST_R_PWM>; - pwm-number = <2>; - pwm-base = <0x14>; - sunxi-pwms = <&s_pwm0_0>, <&s_pwm0_1>; - status = "disabled"; - }; - - s_pwm0_0: s_pwm0_0@7020c10 { - compatible = "allwinner,sunxi-pwm20"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07020c10 0x0 0x4>; - reg_base = <0x07020c00>; - status = "disabled"; - }; - - s_pwm0_1: s_pwm0_1@7020c11 { - compatible = "allwinner,sunxi-pwm21"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07020c11 0x0 0x4>; - reg_base = <0x07020c00>; - status = "disabled"; - }; - - mcu_pwm0: mcu_pwm0@7103000 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v202"; - reg = <0x0 0x07103000 0x0 0x400>; - clocks = <&mcu_ccu CLK_MCU_PWM>,<&mcu_ccu CLK_BUS_MCU_PWM>; - interrupts = ; - clock-names = "clk_pwm","clk_bus_pwm"; - resets = <&mcu_ccu RST_BUS_MCU_PWM>; - pwm-number = <8>; - pwm-base = <0x16>; - sunxi-pwms = <&mcu_pwm0_0>, <&mcu_pwm0_1>, <&mcu_pwm0_2>, <&mcu_pwm0_3>, - <&mcu_pwm0_4>,<&mcu_pwm0_5>, <&mcu_pwm0_6>, <&mcu_pwm0_7>; - status = "disabled"; - }; - - mcu_pwm0_0: mcu_pwm0_0@7103010 { - compatible = "allwinner,sunxi-pwm22"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103010 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_1: mcu_pwm0_1@7103020 { - compatible = "allwinner,sunxi-pwm23"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103020 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_2: mcu_pwm0_2@7103030 { - compatible = "allwinner,sunxi-pwm24"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103030 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_3: mcu_pwm0_3@7103040 { - compatible = "allwinner,sunxi-pwm25"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103040 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_4: mcu_pwm0_4@7103050 { - compatible = "allwinner,sunxi-pwm26"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103050 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_5: mcu_pwm0_5@7103060 { - compatible = "allwinner,sunxi-pwm27"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103060 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_6: mcu_pwm0_6@7103070 { - compatible = "allwinner,sunxi-pwm28"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103070 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - mcu_pwm0_7: mcu_pwm0_7@7103080 { - compatible = "allwinner,sunxi-pwm29"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07103080 0x0 0x4>; - reg_base = <0x07103000>; - status = "disabled"; - }; - - ledc: ledc@2008000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-leds"; - reg = <0x0 0x02008000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_LEDC>, <&ccu CLK_BUS_LEDC>; - clock-names = "clk_ledc", "clk_cpuapb"; - resets = <&ccu RST_BUS_LEDC>; - reset-names = "ledc_reset"; - dmas = <&dma 42>, <&dma 42>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - irrx: irrx@2005000 { - compatible = "allwinner,irrx"; - reg = <0x0 0x02005000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_IRRX>, <&dcxo24M>, <&ccu CLK_IRRX>; - clock-names = "bus", "pclk", "mclk"; - resets = <&ccu RST_BUS_IRRX>; - status = "disabled"; - }; - - s_irrx: s_irrx@7040000 { - compatible = "allwinner,irrx"; - reg = <0x0 0x07040000 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_IRRX>, <&dcxo24M>, <&r_ccu CLK_R_IRRX>; - clock-names = "bus", "pclk", "mclk"; - resets = <&r_ccu RST_R_IRRX>; - status = "disabled"; - }; - - irtx: irtx@2003000 { - compatible = "allwinner,irtx"; - reg = <0x0 0x02003000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_IRTX>, <&dcxo24M>, <&ccu CLK_IRTX>; - clock-names = "bus", "pclk", "mclk"; - resets = <&ccu RST_BUS_IRTX>; - status = "disabled"; - }; - - twi0: twi0@2502000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi0"; - reg = <0x0 0x02502000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI0>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI0>; - dmas = <&dma 43>, <&dma 43>; - dma-names = "tx", "rx"; - status = "okay"; - }; - - twi1: twi1@2502400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi1"; - reg = <0x0 0x02502400 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI1>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI1>; - dmas = <&dma 44>, <&dma 44>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi2: twi2@2502800 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi2"; - reg = <0x0 0x02502800 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI2>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI2>; - dmas = <&dma 45>, <&dma 45>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi3: twi3@2502c00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi3"; - reg = <0x0 0x02502c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI3>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI3>; - dmas = <&dma 46>, <&dma 46>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi4: twi4@2503000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi4"; - reg = <0x0 0x02503000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI4>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI4>; - dmas = <&dma 47>, <&dma 47>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi5: twi5@2503400{ - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi5"; - reg = <0x0 0x02503400 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI5>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI5>; - dmas = <&dma 48>, <&dma 48>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi6: s_twi0@7081400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi6"; - reg = <0x0 0x07081400 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_TWI0>; - clock-names = "bus"; - resets = <&r_ccu RST_R_TWI0>; - dmas = <&dma1 9>, <&dma1 9>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi7: s_twi1@7081800 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi7"; - reg = <0x0 0x07081800 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_TWI1>; - clock-names = "bus"; - resets = <&r_ccu RST_R_TWI1>; - dmas = <&dma1 10>, <&dma1 10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi8: s_twi2@7081c00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi8"; - reg = <0x0 0x07081C00 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_TWI2>; - clock-names = "bus"; - resets = <&r_ccu RST_R_TWI2>; - dmas = <&dma1 14>, <&dma1 14>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi0: spi@4025000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.3"; - device_type = "spi0"; - reg = <0x0 0x04025000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI0>, <&ccu CLK_BUS_SPI0>; - clock-names = "pll", "mod", "bus"; - resets = <&ccu RST_BUS_SPI0>; - dmas = <&dma 22>, <&dma 22>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi1: spi@4026000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.4"; - device_type = "spi1"; - reg = <0x0 0x04026000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI1>, <&ccu CLK_BUS_SPI1>; - clock-names = "pll", "mod", "bus"; - resets = <&ccu RST_BUS_SPI1>; - dmas = <&dma 23>, <&dma 23>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi2: spi@4027000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.3"; - device_type = "spi2"; - reg = <0x0 0x04027000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI2>, <&ccu CLK_BUS_SPI2>; - clock-names = "pll", "mod", "bus"; - resets = <&ccu RST_BUS_SPI2>; - dmas = <&dma 24>, <&dma 24>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - r_spi0: spi@7092000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.3"; - device_type = "r_spi0"; - reg = <0x0 0x07092000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&r_ccu CLK_R_SPI>, <&r_ccu CLK_BUS_R_SPI>; - clock-names = "pll", "mod", "bus"; - resets = <&r_ccu RST_R_SPI>; - dmas = <&dma1 13>, <&dma1 13>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spif0: spif@47f0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sun55i-spif"; - device_type = "spif"; - reg = <0x0 0x047f0000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_400M>, <&ccu CLK_SPIF>, <&ccu CLK_BUS_SPIF>; - clock-names = "pclk", "mclk", "bus"; - resets = <&ccu RST_BUS_SPIF>; - status = "disabled"; - }; - - nand0:nand0@4011000 { - compatible = "allwinner,sun55iw3-nand"; - device_type = "nand0"; - reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */ - interrupts = ; - clocks = <&ccu CLK_PLL_PERI1_400M>, - <&ccu CLK_NAND0_CLK0>, - <&ccu CLK_NAND0_CLK1>, - <&ccu CLK_NAND0>, - <&ccu CLK_NAND_MBUS_GATE>; - clock-names = "pll_periph", "mclk","ecc", "bus", "mbus"; - resets = <&ccu RST_BUS_NAND0>; - reset-names = "rst"; - power-domains = <&pd1 A523_PCK_NAND>; - - nand0_regulator1 = "none"; - nand0_regulator2 = "none"; - nand0_cache_level = <0x55aaaa55>; - nand0_flush_cache_num = <0x55aaaa55>; - nand0_capacity_level = <0x55aaaa55>; - nand0_id_number_ctl = <0x55aaaa55>; - nand0_print_level = <0x55aaaa55>; - nand0_p0 = <0x55aaaa55>; - nand0_p1 = <0x55aaaa55>; - nand0_p2 = <0x55aaaa55>; - nand0_p3 = <0x55aaaa55>; - chip_code = "sun50iw10"; - status = "disabled"; - boot_crc = "disabled"; - }; - - lradc: lradc@2009800 { - compatible = "allwinner,keyboard_1350mv"; - reg = <0x0 0x02009800 0x0 0x100>; - interrupts = ; - clocks = <&ccu CLK_LRADC>; - resets = <&ccu RST_BUS_LRADC>; - status = "disabled"; - }; - - nsi0: nsi-controller@2020000 { - compatible = "allwinner,sun55i-nsi"; - interrupts = ; - reg = <0x0 0x02020000 0x0 0x10000>, - <0x0 0x02071000 0x0 0x400>; - clocks = <&ccu CLK_PLL_DDR>, <&ccu CLK_MBUS>; - clock-names = "pll", "bus"; - resets = <&ccu RST_MBUS>; - clock-frequency = <462000000>; - #nsi-cells = <1>; - - npu{ - id = <5>; - mode = <0>; - pri = <0>; - select = <1>; - }; - - gmac0{ - id = <18>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - gmac1{ - id = <19>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - smhc0{ - id = <20>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - smhc1{ - id = <21>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - smhc2{ - id = <22>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - usb0{ - id = <23>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - usb1{ - id = <24>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - usb2{ - id = <25>; - mode = <0>; - pri = <1>; - select = <1>; - }; - - isp{ - id = <6>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - iommu{ - id = <10>; - mode = <0>; - pri = <3>; - select = <1>; - }; - - ve_r{ - id = <11>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - ve_rw{ - id = <12>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - de{ - id = <13>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - csi{ - id = <14>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - }; - - npd0: npd@2070000 { - compatible = "allwinner,sun55i-npd"; - status = "okay"; - }; - - cryptoengine: ce@3040000 { - compatible = "allwinner,sunxi-ce"; - device_name = "ce"; - reg = <0x0 0x03040000 0x0 0xa0>, /* non-secure space */ - <0x0 0x03040800 0x0 0xa0>; /* secure space */ - interrupts = , /*non-secure*/ - ; /* secure*/ - clock-frequency = <400000000>; /* 400MHz */ - clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_CE_MBUS_GATE>, - <&ccu CLK_PLL_PERI0_400M>, <&ccu CLK_CE_SYS>; - clock-names = "bus_ce", "ce_clk", "mbus_ce", "clk_src", "ce_sys_clk"; - resets = <&ccu RST_BUS_CE>; - }; - - rtc: rtc@7090000 { - compatible = "allwinner,rtc-v201"; - device_type = "rtc"; - wakeup-source; - reg = <0x0 0x07090000 0x0 0x320>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_RTC>, <&rtc_ccu CLK_RTC_1K>, <&rtc_ccu CLK_RTC_SPI>; - clock-names = "r-ahb-rtc", "rtc-1k", "rtc-spi"; - resets = <&r_ccu RST_R_RTC>; - gpr_cur_pos = <6>; - gpr_bootcount_pos = <7>; - }; - - sdc2: sdmmc@4022000 { - compatible = "allwinner,sunxi-mmc-v4p6x"; - device_type = "sdc2"; - reg = <0x0 0x04022000 0x0 0x1000>; - interrupts = ; - clocks = <&dcxo24M>, - <&ccu CLK_PLL_PERI1_800M>, - <&ccu CLK_PLL_PERI1_600M>, - <&ccu CLK_SMHC2>, - <&ccu CLK_BUS_SMHC2>; - clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; - resets = <&ccu RST_BUS_SMHC2>; - reset-names = "rst"; - pinctrl-names = "default","sleep"; - pinctrl-0 = <&sdc2_pins_a &sdc2_pins_c>; - pinctrl-1 = <&sdc2_pins_b>; - bus-width = <8>; - req-page-count = <2>; - cap-mmc-highspeed; - cap-cmd23; - mmc-cache-ctrl; - non-removable; - /*max-frequency = <200000000>;*/ - max-frequency = <50000000>; - cap-erase; - mmc-high-capacity-erase-size; - no-sdio; - no-sd; - /*-- speed mode --*/ - /*sm0: DS26_SDR12*/ - /*sm1: HSSDR52_SDR25*/ - /*sm2: HSDDR52_DDR50*/ - /*sm3: HS200_SDR104*/ - /*sm4: HS400*/ - /*-- frequency point --*/ - /*f0: CLK_400K*/ - /*f1: CLK_25M*/ - /*f2: CLK_50M*/ - /*f3: CLK_100M*/ - /*f4: CLK_150M*/ - /*f5: CLK_200M*/ - ctl-spec-caps = <0x328>; - sdc_tm4_sm0_freq0 = <0>; - sdc_tm4_sm0_freq1 = <0>; - sdc_tm4_sm1_freq0 = <0x00000000>; - sdc_tm4_sm1_freq1 = <0>; - sdc_tm4_sm2_freq0 = <0x00000000>; - sdc_tm4_sm2_freq1 = <0>; - sdc_tm4_sm3_freq0 = <0x05000000>; - sdc_tm4_sm3_freq1 = <0x00000005>; - sdc_tm4_sm4_freq0 = <0x00050000>; - sdc_tm4_sm4_freq1 = <0x00000004>; - sdc_tm4_sm4_freq0_cmd = <0>; - sdc_tm4_sm4_freq1_cmd = <0>; - - /*vmmc-supply = <®_3p3v>;*/ - /*vqmc-supply = <®_3p3v>;*/ - /*vdmc-supply = <®_3p3v>;*/ - /*vmmc = "vcc-card";*/ - /*vqmc = "";*/ - /*vdmc = "";*/ - /*sunxi-power-save-mode;*/ - }; - - sdc0: sdmmc@4020000 { - compatible = "allwinner,sunxi-mmc-v5p3x"; - device_type = "sdc0"; - reg = <0x0 0x04020000 0x0 0x1000>; - interrupts = ; - clocks = <&dcxo24M>, - <&ccu CLK_PLL_PERI1_400M>, - <&ccu CLK_PLL_PERI1_300M>, - <&ccu CLK_SMHC0>, - <&ccu CLK_BUS_SMHC0>; - clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; - resets = <&ccu RST_BUS_SMHC0>; - reset-names = "rst"; - pinctrl-names = "default","mmc_1v8","sleep","uart_jtag"; - pinctrl-0 = <&sdc0_pins_a>; - pinctrl-1 = <&sdc0_pins_b>; - pinctrl-2 = <&sdc0_pins_c>; - pinctrl-3 = <&sdc0_pins_d &sdc0_pins_e>; - max-frequency = <50000000>; - bus-width = <4>; - req-page-count = <2>; - /*non-removable;*/ - /*broken-cd;*/ - /*cd-inverted*/ - /*cd-gpios = <&pio PF 6 GPIO_ACTIVE_LOW>;*/ - /* vmmc-supply = <®_3p3v>;*/ - /* vqmc-supply = <®_3p3v>;*/ - /* vdmc-supply = <®_3p3v>;*/ - /*vmmc = "vcc-card";*/ - /*vqmc = "";*/ - /*vdmc = "";*/ - cap-sd-highspeed; - cap-wait-while-busy; - /*sd-uhs-sdr50;*/ - /*sd-uhs-ddr50;*/ - /*cap-sdio-irq;*/ - /*keep-power-in-suspend;*/ - /*ignore-pm-notify;*/ - /*sunxi-power-save-mode;*/ - /*sunxi-dly-400k = <1 0 0 0>; */ - /*sunxi-dly-26M = <1 0 0 0>;*/ - /*sunxi-dly-52M = <1 0 0 0>;*/ - /*sunxi-dly-52M-ddr4 = <1 0 0 0>;*/ - /*sunxi-dly-52M-ddr8 = <1 0 0 0>;*/ - /*sunxi-dly-104M = <1 0 0 0>;*/ - /*sunxi-dly-208M = <1 0 0 0>;*/ - /*sunxi-dly-104M-ddr = <1 0 0 0>;*/ - /*sunxi-dly-208M-ddr = <1 0 0 0>;*/ - ctl-spec-caps = <0x428>; - status = "okay"; - }; - - sdc1: sdmmc@4021000 { - compatible = "allwinner,sunxi-mmc-v5p3x"; - device_type = "sdc1"; - reg = <0x0 0x04021000 0x0 0x1000>; - interrupts = ; - clocks = <&dcxo24M>, - <&ccu CLK_PLL_PERI1_400M>, - <&ccu CLK_PLL_PERI1_300M>, - <&ccu CLK_SMHC1>, - <&ccu CLK_BUS_SMHC1>; - clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; - resets = <&ccu RST_BUS_SMHC1>; - reset-names = "rst"; - pinctrl-names = "default","sleep"; - pinctrl-0 = <&sdc1_pins_a>; - pinctrl-1 = <&sdc1_pins_b>; - max-frequency = <50000000>; - bus-width = <4>; - /*broken-cd;*/ - /*cd-inverted*/ - /*cd-gpios = <&pio PG 6 6 1 2 0>;*/ - /* vmmc-supply = <®_3p3v>;*/ - /* vqmc-supply = <®_3p3v>;*/ - /* vdmc-supply = <®_3p3v>;*/ - /*vmmc = "vcc-card";*/ - /*vqmc = "";*/ - /*vdmc = "";*/ - cap-sd-highspeed; - cap-sdio-irq; - ignore-pm-notify; - /*sd-uhs-sdr50;*/ - /*sd-uhs-ddr50;*/ - /*sd-uhs-sdr104;*/ - /*cap-sdio-irq;*/ - keep-power-in-suspend; - /*ignore-pm-notify;*/ - /*sunxi-power-save-mode;*/ - /*sunxi-dly-400k = <0xff 0xff 0xff 0xff 0xff 0xff>; */ - /*sunxi-dly-26M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-52M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-52M-ddr4 = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-52M-ddr8 = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-104M = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-208M = <0xff 0xff 0xff 0xff 0xff 0xff> ;*/ - /*sunxi-dly-104M-ddr = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - /*sunxi-dly-208M-ddr = <0xff 0xff 0xff 0xff 0xff 0xff>;*/ - sunxi-dly-208M = <0xff 0x1 0xff 0xff 0xff 0xff>; - ctl-spec-caps = <0x428>; - status = "okay"; - }; - - usbc0: usbc0@10 { - device_type = "usbc0"; - compatible = "allwinner,sunxi-otg-manager"; - reg = <0x0 0x10 0x0 0x1000>; - usb_port_type = <2>; - usb_detect_type = <1>; - usb_detect_mode = <0>; - usb_id_gpio; - usb_det_vbus_gpio; - usb_regulator_io = "nocare"; - usb_wakeup_suspend = <0>; - usb_luns = <3>; - usb_serial_unique = <0>; - usb_serial_number = "20080411"; - rndis_wceis = <1>; - status = "disabled"; - }; - - udc:udc-controller@4100000 { - compatible = "allwinner,sunxi-udc"; - reg = <0x0 0x04100000 0x0 0x1000>, /*udc base*/ - <0x0 0x00000000 0x0 0x100>; /*sram base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOTG0>; - clock-names = "hosc", "bus_otg"; - resets = <&ccu RST_USB_OTG0>, <&ccu RST_USB_PHY0_RSTN>; - reset-names = "otg", "phy"; - status = "disabled"; - }; - - ehci0:ehci0-controller@4101000 { - compatible = "allwinner,sunxi-ehci0"; - reg = <0x0 0x04101000 0x0 0xFFF>, /*hci0 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBEHCI0>; - clock-names = "hosc", "bus_hci"; - resets = <&ccu RST_USB_EHCI0>, <&ccu RST_USB_PHY0_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <0>; - status = "disabled"; - }; - - ohci0:ohci0-controller@4101400 { - compatible = "allwinner,sunxi-ohci0"; - reg = <0x0 0x04101400 0x0 0xFFF>, /*hci0 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOHCI0>, <&ccu CLK_USB0>; - clock-names = "hosc", "bus_hci", "ohci"; - resets = <&ccu RST_USB_OHCI0>, <&ccu RST_USB_PHY0_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <0>; - status = "disabled"; - }; - - usbc1: usbc1@11 { - device_type = "usbc1"; - reg = <0x0 0x11 0x0 0x1000>; - usb_regulator_io = "nocare"; - usb_wakeup_suspend = <0>; - status = "disabled"; - }; - - ehci1: ehci1-controller@4200000 { - compatible = "allwinner,sunxi-ehci1"; - reg = <0x0 0x04200000 0x0 0xFFF>, /*ehci1 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBEHCI1>; - clock-names = "hosc", "bus_hci"; - resets = <&ccu RST_USB_EHCI1>, <&ccu RST_USB_PHY1_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <1>; - status = "disabled"; - }; - - ohci1: ohci1-controller@4200400 { - compatible = "allwinner,sunxi-ohci1"; - reg = <0x0 0x04200400 0x0 0xFFF>, /*ohci1 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOHCI1>, <&ccu CLK_USB1>; - clock-names = "hosc", "bus_hci", "ohci"; - resets = <&ccu RST_USB_OHCI1>, <&ccu RST_USB_PHY1_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <1>; - status = "disabled"; - }; - - usbc2:usbc2@12 { - device_type = "usbc2"; - compatible = "allwinner,sunxi-plat-dwc3"; - reg = <0x0 0x12 0x0 0x1000>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - aw,hcgen2-phygen1-quirk; - status = "disabled"; - - xhci2: xhci2-controller@4d00000 { - compatible = "snps,dwc3"; - reg = <0x0 0x04d00000 0x0 0x100000>; - interrupts = ; - dr_mode = "otg"; // dr_mode option: host, peripheral, otg - clocks = <&ccu CLK_USB3_MBUS_GATE>, <&ccu CLK_USB3_REF>, - <&ccu CLK_USB2_REF>, <&ccu CLK_USB3_SUSPEND>; - clock-names = "bus_clk", "ref_clk3", "ref_clk2", "suspend"; - resets = <&ccu RST_USB_3>; - reset-names = "hci"; - maximum-speed = "super-speed"; - phy_type = "utmi"; - snps,dis_enblslpm_quirk; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - snps,dis_u3_susphy_quirk; - snps,dis_u2_susphy_quirk; - phys = <&u2phy>, <&combophy PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - status = "disabled"; - }; - }; - - u2phy: phy@4e00000 { - compatible = "allwinner,sunxi-plat-phy"; - reg = <0x0 0x04e00000 0x0 0x800>; /* Application Registers */ - #phy-cells = <0>; - status = "disabled"; - }; - - vind0: vind@5800800 { - compatible = "allwinner,sunxi-vin-media", "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - device_id = <0>; - csi_top = <336000000>; - csi_isp = <327000000>; - reg = <0x0 0x05800800 0x0 0x200>, - <0x0 0x05800000 0x0 0x800>, - <0x0 0x05810000 0x0 0x100>; - interrupts = ; - clocks = <&ccu CLK_CSI>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER0>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER1>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER2>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER3>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_ISP>, <&ccu CLK_PLL_VIDEO2_4X>, - <&ccu CLK_BUS_CSI>, <&ccu CLK_CSI_MBUS_GATE>, <&ccu CLK_ISP_MBUS_GATE>; - clock-names = "csi_top", "csi_top_src", - "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", - "csi_mclk1", "csi_mclk1_24m", "csi_mclk1_pll", - "csi_mclk2", "csi_mclk2_24m", "csi_mclk2_pll", - "csi_mclk3", "csi_mclk3_24m", "csi_mclk3_pll", - "csi_isp", "csi_isp_src", - "csi_bus", "csi_mbus", "csi_isp_mbus"; - resets = <&ccu RST_BUS_CSI>, <&ccu RST_BUS_ISP>; - reset-names = "csi_ret", "isp_ret"; - pinctrl-names = "mclk0-default", "mclk0-sleep", "mclk1-default", "mclk1-sleep", - "mclk2-default", "mclk2-sleep", "mclk3-default", "mclk3-sleep"; - pinctrl-0 = <&csi_mclk0_pins_a>; - pinctrl-1 = <&csi_mclk0_pins_b>; - pinctrl-2 = <&csi_mclk1_pins_a>; - pinctrl-3 = <&csi_mclk1_pins_b>; - pinctrl-4 = <&csi_mclk2_pins_a>; - pinctrl-5 = <&csi_mclk2_pins_b>; - pinctrl-6 = <&csi_mclk3_pins_a>; - pinctrl-7 = <&csi_mclk3_pins_b>; - power-domains = <&pd1 A523_PCK_VI>; - dram_dfs_time = <150>; - status = "okay"; - - csi0: csi@5820000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05820000 0x0 0x1000>; - interrupts = ; - device_id = <0>; - status = "okay"; - }; - csi1: csi@5821000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05821000 0x0 0x1000>; - interrupts = ; - device_id = <1>; - status = "okay"; - }; - csi2: csi@5822000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05822000 0x0 0x1000>; - interrupts = ; - device_id = <2>; - status = "okay"; - }; - csi3: csi@5823000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05823000 0x0 0x1000>; - interrupts = ; - pinctrl-names = "default","sleep"; - pinctrl-0 = <&ncsi_bt656_pins_a>; - pinctrl-1 = <&ncsi_bt656_pins_b>; - device_id = <3>; - status = "okay"; - }; - mipi0: mipi@5810100 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810100 0x0 0x100>, - <0x0 0x05811000 0x0 0x400>; - interrupts = ; - pinctrl-names = "mipi0-default","mipi0-sleep", - "mipi1-4lane-default","mipi1-4lane-sleep"; - pinctrl-0 = <&mipia_pins_a>; - pinctrl-1 = <&mipia_pins_b>; - pinctrl-2 = <&mipib_4lane_pins_a>; - pinctrl-3 = <&mipib_4lane_pins_b>; - device_id = <0>; - status = "okay"; - }; - mipi1: mipi@5810200 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810200 0x0 0x100>, - <0x0 0x05811400 0x0 0x400>; - pinctrl-names = "mipi1-default","mipi1-sleep"; - pinctrl-0 = <&mipib_pins_a>; - pinctrl-1 = <&mipib_pins_b>; - device_id = <1>; - status = "okay"; - }; - mipi2: mipi@5810300 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810300 0x0 0x100>, - <0x0 0x05811800 0x0 0x400>; - pinctrl-names = "mipi2-default","mipi2-sleep", - "mipi3-4lane-default","mipi3-4lane-sleep"; - pinctrl-0 = <&mipic_pins_a>; - pinctrl-1 = <&mipic_pins_b>; - pinctrl-2 = <&mipid_4lane_pins_a>; - pinctrl-3 = <&mipid_4lane_pins_b>; - device_id = <2>; - status = "okay"; - }; - mipi3: mipi@5810400 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810400 0x0 0x100>, - <0x0 0x05811C00 0x0 0x400>; - pinctrl-names = "mipi3-default","mipi3-sleep"; - pinctrl-0 = <&mipid_pins_a>; - pinctrl-1 = <&mipid_pins_b>; - device_id = <3>; - status = "okay"; - }; - tdm0: tdm@5908000 { - compatible = "allwinner,sunxi-tdm"; - reg = <0x0 0x05908000 0x0 0x300>; - interrupts = ; - work_mode = <0x0>; - device_id = <0>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp00:isp@5900000 { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x05900000 0x0 0x1300>; - interrupts = ; - work_mode = <0x0>; - device_id = <0>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp01:isp@58ffffc { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x058ffffc 0x0 0x1304>; - interrupts = ; - work_mode = <0xff>; - device_id = <1>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp02:isp@58ffff8 { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x058ffff8 0x0 0x1308>; - interrupts = ; - work_mode = <0xff>; - device_id = <2>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp03:isp@58ffff4 { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x058ffff4 0x0 0x130c>; - interrupts = ; - work_mode = <0xff>; - device_id = <3>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp10:isp@4 { - compatible = "allwinner,sunxi-isp"; - device_id = <4>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp20:isp@5 { - compatible = "allwinner,sunxi-isp"; - device_id = <5>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp30:isp@6 { - compatible = "allwinner,sunxi-isp"; - device_id = <6>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - scaler00:scaler@5910000 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910000 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <0>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler01:scaler@590fffc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x0590fffc 0x0 0x404>; - work_mode = <0xff>; - device_id = <1>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler02:scaler@590fff8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x0590fff8 0x0 0x408>; - work_mode = <0xff>; - device_id = <2>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler03:scaler@590fff4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x0590fff4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <3>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler10:scaler@5910400 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910400 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <4>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler11:scaler@59103fc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059103fc 0x0 0x404>; - work_mode = <0xff>; - device_id = <5>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler12:scaler@59103f8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059103f8 0x0 0x408>; - work_mode = <0xff>; - device_id = <6>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler13:scaler@59103f4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059103f4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <7>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler20:scaler@5910800 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910800 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <8>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler21:scaler@59107fc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059107fc 0x0 0x404>; - work_mode = <0xff>; - device_id = <9>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler22:scaler@59107f8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059107f8 0x0 0x408>; - work_mode = <0xff>; - device_id = <10>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler23:scaler@59107f4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059107f4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <11>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler30:scaler@5910c00 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910c00 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <12>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler31:scaler@5910bfc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910bfc 0x0 0x404>; - work_mode = <0xff>; - device_id = <13>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler32:scaler@5910bf8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910bf8 0x0 0x408>; - work_mode = <0xff>; - device_id = <14>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler33:scaler@5910bf4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910bf4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <15>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler40:scaler@16 { - compatible = "allwinner,sunxi-scaler"; - device_id = <16>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler50:scaler@17 { - compatible = "allwinner,sunxi-scaler"; - device_id = <17>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - actuator0: actuator@2108180 { - compatible = "allwinner,sunxi-actuator"; - device_type = "actuator0"; - reg = <0x0 0x02108180 0x0 0x10>; - actuator0_name = "ad5820_act"; - actuator0_slave = <0x18>; - actuator0_af_pwdn = <>; - actuator0_afvdd = "afvcc-csi"; - actuator0_afvdd_vol = <2800000>; - status = "disabled"; - }; - flash0: flash@2108190 { - device_type = "flash0"; - compatible = "allwinner,sunxi-flash"; - reg = <0x0 0x02108190 0x0 0x10>; - flash0_type = <2>; - flash0_en = <>; - flash0_mode = <>; - flash0_flvdd = ""; - flash0_flvdd_vol = <>; - device_id = <0>; - status = "disabled"; - }; - sensor0: sensor@5812000 { - reg = <0x0 0x05812000 0x0 0x10>; - device_type = "sensor0"; - compatible = "allwinner,sunxi-sensor"; - sensor0_mname = "ov5640"; - sensor0_twi_cci_id = <2>; - sensor0_twi_addr = <0x78>; - sensor0_mclk_id = <0>; - sensor0_pos = "rear"; - sensor0_isp_used = <0>; - sensor0_fmt = <0>; - sensor0_stby_mode = <0>; - sensor0_vflip = <0>; - sensor0_hflip = <0>; - sensor0_iovdd-supply = <>; - sensor0_iovdd_vol = <>; - sensor0_avdd-supply = <>; - sensor0_avdd_vol = <>; - sensor0_dvdd-supply = <>; - sensor0_dvdd_vol = <>; - sensor0_power_en = <>; - sensor0_reset = <>; - sensor0_pwdn = <>; - sensor0_sm_vs = <>; - flash_handle = <&flash0>; - act_handle = <&actuator0>; - device_id = <0>; - status = "disabled"; - }; - sensor1: sensor@5812010 { - reg = <0x0 0x05812010 0x0 0x10>; - device_type = "sensor1"; - compatible = "allwinner,sunxi-sensor"; - sensor1_mname = "ov5647"; - sensor1_twi_cci_id = <3>; - sensor1_twi_addr = <0x6c>; - sensor1_mclk_id = <1>; - sensor1_pos = "front"; - sensor1_isp_used = <0>; - sensor1_fmt = <0>; - sensor1_stby_mode = <0>; - sensor1_vflip = <0>; - sensor1_hflip = <0>; - sensor1_iovdd-supply = <>; - sensor1_iovdd_vol = <>; - sensor1_avdd-supply = <>; - sensor1_avdd_vol = <>; - sensor1_dvdd-supply = <>; - sensor1_dvdd_vol = <>; - sensor1_power_en = <>; - sensor1_reset = <>; - sensor1_pwdn = <>; - sensor1_sm_vs = <>; - flash_handle = <>; - act_handle = <>; - device_id = <1>; - status = "disabled"; - }; - sensor2: sensor@5812020 { - reg = <0x0 0x05812020 0x0 0x10>; - device_type = "sensor2"; - compatible = "allwinner,sunxi-sensor"; - sensor2_mname = "imx386_mipi"; - sensor2_twi_cci_id = <3>; - sensor2_twi_addr = <0x6c>; - sensor2_mclk_id = <1>; - sensor2_pos = "rear"; - sensor2_isp_used = <0>; - sensor2_fmt = <0>; - sensor2_stby_mode = <0>; - sensor2_vflip = <0>; - sensor2_hflip = <0>; - sensor2_iovdd-supply = <>; - sensor2_iovdd_vol = <>; - sensor2_avdd-supply = <>; - sensor2_avdd_vol = <>; - sensor2_dvdd-supply = <>; - sensor2_dvdd_vol = <>; - sensor2_power_en = <>; - sensor2_reset = <>; - sensor2_pwdn = <>; - sensor2_sm_vs = <>; - flash_handle = <>; - act_handle = <>; - device_id = <2>; - status= "disabled"; - }; - sensor3: sensor@5812030 { - reg = <0x0 0x05812030 0x0 0x10>; - device_type = "sensor3"; - compatible = "allwinner,sunxi-sensor"; - sensor3_mname = "imx317_mipi"; - sensor3_twi_cci_id = <3>; - sensor3_twi_addr = <0x6c>; - sensor3_mclk_id = <1>; - sensor3_pos = "rear"; - sensor3_isp_used = <0>; - sensor3_fmt = <0>; - sensor3_stby_mode = <0>; - sensor3_vflip = <0>; - sensor3_hflip = <0>; - sensor3_iovdd-supply = <>; - sensor3_iovdd_vol = <>; - sensor3_avdd-supply = <>; - sensor3_avdd_vol = <>; - sensor3_dvdd-supply = <>; - sensor3_dvdd_vol = <>; - sensor3_power_en = <>; - sensor3_reset = <>; - sensor3_pwdn = <>; - sensor3_sm_vs = <>; - flash_handle = <>; - act_handle = <>; - device_id = <2>; - status= "disabled"; - }; - sensor_list0:sensor_list@5812040 { - reg = <0x0 0x05812040 0x0 0x10>; - device_type = "sensor_list0"; - compatible = "allwinner,sunxi-sensor-list"; - csi_sel = <0>; - sensor00_mname = "ov5675_mipi_b"; - sensor00_twi_addr = <0x60>; - sensor00_type = <1>; - sensor00_hflip = <1>; - sensor00_vflip = <0>; - sensor00_act_used = <1>; - sensor00_act_name = "dw9714_act"; - sensor00_act_twi_addr = <0x18>; - sensor01_mname = "gc05a2_mipi_b"; - sensor01_twi_addr = <0x62>; - sensor01_type = <1>; - sensor01_hflip = <0>; - sensor01_vflip = <0>; - sensor01_act_used = <1>; - sensor01_act_name = "dw9714_act"; - sensor01_act_twi_addr = <0x18>; - sensor02_mname = "gc5035_mipi_b"; - sensor02_twi_addr = <0x64>; - sensor02_type = <1>; - sensor02_hflip = <0>; - sensor02_vflip = <0>; - sensor02_act_used = <1>; - sensor02_act_name = "dw9714_act"; - sensor02_act_twi_addr = <0x18>; - device_id = <0>; - status = "disabled"; - }; - sensor_list1:sensor_list@5812050 { - reg = <0x0 0x05812050 0x0 0x10>; - device_type = "sensor_list1"; - compatible = "allwinner,sunxi-sensor-list"; - csi_sel = <0>; - sensor10_mname = "ov02a10_mipi_f"; - sensor10_twi_addr = <0x70>; - sensor10_type = <1>; - sensor10_hflip = <1>; - sensor10_vflip = <0>; - sensor10_act_used = <0>; - sensor10_act_name = ""; - sensor10_act_twi_addr = <>; - sensor11_mname = "gc02m1_mipi_f"; - sensor11_twi_addr = <0x72>; - sensor11_type = <1>; - sensor11_hflip = <1>; - sensor11_vflip = <0>; - sensor11_act_used = <0>; - sensor11_act_name = ""; - sensor11_act_twi_addr = <>; - sensor12_mname = "gc02m2_mipi_f"; - sensor12_twi_addr = <0x74>; - sensor12_type = <1>; - sensor12_hflip = <0>; - sensor12_vflip = <0>; - sensor12_act_used = <0>; - sensor12_act_name = ""; - sensor12_act_twi_addr = <>; - device_id = <1>; - status = "disabled"; - }; - vinc00:vinc@5830000 { - device_type = "vinc0"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830000 0x0 0x1000>; - interrupts = ; - vinc0_csi_sel = <3>; - vinc0_mipi_sel = <0xff>; - vinc0_isp_sel = <0>; - vinc0_isp_tx_ch = <0>; - vinc0_tdm_rx_sel = <0>; - vinc0_rear_sensor_sel = <0>; - vinc0_front_sensor_sel = <0>; - vinc0_sensor_list = <0>; - device_id = <0>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - - vinc01:vinc@582fffc { - device_type = "vinc1"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x0582fffc 0x0 0x1004>; - vinc1_csi_sel = <2>; - vinc1_mipi_sel = <0xff>; - vinc1_isp_sel = <1>; - vinc1_isp_tx_ch = <1>; - vinc1_tdm_rx_sel = <1>; - vinc1_rear_sensor_sel = <0>; - vinc1_front_sensor_sel = <0>; - vinc1_sensor_list = <0>; - device_id = <1>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - vinc02:vinc@582fff8 { - device_type = "vinc2"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x0582fff8 0x0 0x1008>; - vinc2_csi_sel = <2>; - vinc2_mipi_sel = <0xff>; - vinc2_isp_sel = <2>; - vinc2_isp_tx_ch = <2>; - vinc2_tdm_rx_sel = <2>; - vinc2_rear_sensor_sel = <0>; - vinc2_front_sensor_sel = <0>; - vinc2_sensor_list = <0>; - device_id = <2>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc03:vinc@582fff4 { - device_type = "vinc3"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x0582fff4 0x0 0x100c>; - vinc3_csi_sel = <0>; - vinc3_mipi_sel = <0xff>; - vinc3_isp_sel = <0>; - vinc3_isp_tx_ch = <0>; - vinc3_tdm_rx_sel = <0>; - vinc3_rear_sensor_sel = <1>; - vinc3_front_sensor_sel = <1>; - vinc3_sensor_list = <0>; - device_id = <3>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc10:vinc@5831000 { - device_type = "vinc4"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831000 0x0 0x1000>; - interrupts = ; - vinc4_csi_sel = <3>; - vinc4_mipi_sel = <0xff>; - vinc4_isp_sel = <0>; - vinc4_isp_tx_ch = <0>; - vinc4_tdm_rx_sel = <1>; - vinc4_rear_sensor_sel = <0>; - vinc4_front_sensor_sel = <0>; - vinc4_sensor_list = <0>; - device_id = <4>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc11:vinc@5830ffc { - device_type = "vinc5"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830ffc 0x0 0x1004>; - vinc5_csi_sel = <2>; - vinc5_mipi_sel = <0xff>; - vinc5_isp_sel = <1>; - vinc5_isp_tx_ch = <1>; - vinc5_tdm_rx_sel = <1>; - vinc5_rear_sensor_sel = <0>; - vinc5_front_sensor_sel = <0>; - vinc5_sensor_list = <0>; - device_id = <5>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc12:vinc@5830ff8 { - device_type = "vinc6"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830ff8 0x0 0x1008>; - vinc6_csi_sel = <2>; - vinc6_mipi_sel = <0xff>; - vinc6_isp_sel = <0>; - vinc6_isp_tx_ch = <0>; - vinc6_tdm_rx_sel = <0>; - vinc6_rear_sensor_sel = <0>; - vinc6_front_sensor_sel = <0>; - vinc6_sensor_list = <0>; - device_id = <6>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc13:vinc@5830ff4 { - device_type = "vinc7"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830ff4 0x0 0x100c>; - vinc7_csi_sel = <2>; - vinc7_mipi_sel = <0xff>; - vinc7_isp_sel = <0>; - vinc7_isp_tx_ch = <0>; - vinc7_tdm_rx_sel = <0>; - vinc7_rear_sensor_sel = <0>; - vinc7_front_sensor_sel = <0>; - vinc7_sensor_list = <0>; - device_id = <7>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc20:vinc@5832000 { - device_type = "vinc8"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832000 0x0 0x1000>; - interrupts = ; - vinc8_csi_sel = <2>; - vinc8_mipi_sel = <0xff>; - vinc8_isp_sel = <4>; - vinc8_isp_tx_ch = <3>; - vinc8_tdm_rx_sel = <3>; - vinc8_rear_sensor_sel = <0>; - vinc8_front_sensor_sel = <0>; - vinc8_sensor_list = <0>; - device_id = <8>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc21:vinc@5831ffc { - device_type = "vinc9"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831ffc 0x0 0x1004>; - vinc9_csi_sel = <2>; - vinc9_mipi_sel = <0xff>; - vinc9_isp_sel = <0>; - vinc9_isp_tx_ch = <0>; - vinc9_tdm_rx_sel = <0>; - vinc9_rear_sensor_sel = <0>; - vinc9_front_sensor_sel = <0>; - vinc9_sensor_list = <0>; - device_id = <9>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc22:vinc@5831ff8 { - device_type = "vinc10"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831ff8 0x0 0x1008>; - vinc10_csi_sel = <2>; - vinc10_mipi_sel = <0xff>; - vinc10_isp_sel = <0>; - vinc10_isp_tx_ch = <0>; - vinc10_tdm_rx_sel = <0>; - vinc10_rear_sensor_sel = <0>; - vinc10_front_sensor_sel = <0>; - vinc10_sensor_list = <0>; - device_id = <10>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc23:vinc@5831ff4 { - device_type = "vinc11"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831ff4 0x0 0x100c>; - vinc11_csi_sel = <2>; - vinc11_mipi_sel = <0xff>; - vinc11_isp_sel = <0>; - vinc11_isp_tx_ch = <0>; - vinc11_tdm_rx_sel = <0>; - vinc11_rear_sensor_sel = <0>; - vinc11_front_sensor_sel = <0>; - vinc11_sensor_list = <0>; - device_id = <11>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc30:vinc@5833000 { - device_type = "vinc12"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05833000 0x0 0x1000>; - interrupts = ; - vinc12_csi_sel = <2>; - vinc12_mipi_sel = <0xff>; - vinc12_isp_sel = <0>; - vinc12_isp_tx_ch = <0>; - vinc12_tdm_rx_sel = <0>; - vinc12_rear_sensor_sel = <0>; - vinc12_front_sensor_sel = <0>; - vinc12_sensor_list = <0>; - device_id = <12>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc31:vinc@5832ffc { - device_type = "vinc13"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832ffc 0x0 0x1004>; - vinc13_csi_sel = <2>; - vinc13_mipi_sel = <0xff>; - vinc13_isp_sel = <0>; - vinc13_isp_tx_ch = <0>; - vinc13_tdm_rx_sel = <0>; - vinc13_rear_sensor_sel = <0>; - vinc13_front_sensor_sel = <0>; - vinc13_sensor_list = <0>; - device_id = <13>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc32:vinc@5832ff8 { - device_type = "vinc14"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832ff8 0x0 0x1008>; - vinc14_csi_sel = <2>; - vinc14_mipi_sel = <0xff>; - vinc14_isp_sel = <0>; - vinc14_isp_tx_ch = <0>; - vinc14_tdm_rx_sel = <0>; - vinc14_rear_sensor_sel = <0>; - vinc14_front_sensor_sel = <0>; - vinc14_sensor_list = <0>; - device_id = <14>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc33:vinc@5832ff4 { - device_type = "vinc15"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832ff4 0x0 0x100c>; - vinc15_csi_sel = <2>; - vinc15_mipi_sel = <0xff>; - vinc15_isp_sel = <0>; - vinc15_isp_tx_ch = <0>; - vinc15_tdm_rx_sel = <0>; - vinc15_rear_sensor_sel = <0>; - vinc15_front_sensor_sel = <0>; - vinc15_sensor_list = <0>; - device_id = <15>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc40:vinc@5834000 { - device_type = "vinc16"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05834000 0x0 0x1000>; - interrupts = ; - vinc16_csi_sel = <2>; - vinc16_mipi_sel = <0xff>; - vinc16_isp_sel = <0>; - vinc16_isp_tx_ch = <0>; - vinc16_tdm_rx_sel = <0>; - vinc16_rear_sensor_sel = <0>; - vinc16_front_sensor_sel = <0>; - vinc16_sensor_list = <0>; - device_id = <16>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc50:vinc@5835000 { - device_type = "vinc17"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05835000 0x0 0x1000>; - interrupts = ; - vinc17_csi_sel = <2>; - vinc17_mipi_sel = <0xff>; - vinc17_isp_sel = <0>; - vinc17_isp_tx_ch = <0>; - vinc17_tdm_rx_sel = <0>; - vinc17_rear_sensor_sel = <0>; - vinc17_front_sensor_sel = <0>; - vinc17_sensor_list = <0>; - device_id = <17>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - }; - - di:deinterlace@5400000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-deinterlace"; - reg = <0x0 0x05400000 0x0 0x040000>; - interrupts = ; - iommus = <&mmu_aw 6 1>; - power-domains = <&pd1 A523_PCK_VO0>; - status = "okay"; - - clocks = <&ccu CLK_DI>, <&ccu CLK_BUS_DI>, <&ccu CLK_PLL_VIDEO0_4X>; - clock-names = "clk_di", "clk_bus_di", "clk_di_parent"; - clock-frequency = <300000000>; - - resets = <&ccu RST_BUS_DI>; - reset-names = "rst_bus_di"; - }; - - gpu:gpu@1800000 { - device_type = "gpu"; - compatible = "arm,mali-valhall"; - reg = <0x0 0x01800000 0x0 0x10000>; - interrupts = , - , - ; - interrupt-names = "JOB", "MMU", "GPU"; - clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>, <&ccu CLK_PLL_GPU>; - clock-names = "clk_mali", "clk_bus", "clk_parent"; - resets = <&ccu RST_BUS_GPU>; - operating-points-v2 = <&gpu_opp_table>; - #cooling-cells = <2>; - ipa_dvfs:ipa_dvfs { - compatible = "arm,mali-simple-power-model"; - static-coefficient = <636>; - dynamic-coefficient = <1434>; - /* ts0 -> ts3 */ - ts = <0xcc77c0 217000 0xffffd508 200>; - thermal-zone = "gpu_thermal_zone"; - /*ss-coefficient = <36>;*/ - /*ff-coefficient = <291>;*/ - }; - /*power-domains = <&pd1 A523_PCK_GPU>;*/ - }; - - gpu_opp_table: gpu-opp-table { - compatible = "allwinner, mali-valhall-operating-points"; - opp@150000000 { - opp-hz = /bits/ 64 <150000000>; - opp-microvolt = <900000>; - }; - - opp@200000000 { - opp-hz = /bits/ 64 <200000000>; - opp-microvolt = <900000>; - }; - - opp@300000000 { - opp-hz = /bits/ 64 <300000000>; - opp-microvolt = <900000>; - }; - - opp@400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <900000>; - }; - - opp@600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000>; - }; - - opp@648000000 { - opp-hz = /bits/ 64 <648000000>; - opp-microvolt = <0>; - opp-microvolt-vf0900 = <900000>; - }; - - opp@696000000 { - opp-hz = /bits/ 64 <696000000>; - opp-microvolt = <0>; - opp-microvolt-vf1920 = <900000>; - opp-microvolt-vf2920 = <900000>; - opp-microvolt-vf3920 = <900000>; - opp-microvolt-vf21920 = <900000>; - opp-microvolt-vf31920 = <900000>; - opp-microvolt-vf5920 = <900000>; - }; - - opp@744000000 { - opp-hz = /bits/ 64 <744000000>; - opp-microvolt = <0>; - opp-microvolt-vf4920 = <900000>; - /* Not use: only for performance test - opp-microvolt-vf2920 = <900000>; - opp-microvolt-vf3920 = <900000>; - opp-microvolt-vf21920 = <900000>; - opp-microvolt-vf31920 = <900000>; - */ - }; - - /* Not use: only for performance test */ - opp@792000000 { - opp-hz = /bits/ 64 <792000000>; - opp-microvolt = <0>; - /* opp-microvolt-vf2950 = <900000>; - opp-microvolt-vf3950 = <900000>; - opp-microvolt-vf21950 = <900000>; - opp-microvolt-vf31950 = <900000>; - */ - }; - }; - - combophy: phy@4f00000 { - compatible = "allwinner,inno-combphy"; - reg = <0x0 0x04f00000 0x0 0x80000>, /* Sub-System Application Registers */ - <0x0 0x04f80000 0x0 0x80000>; /* Combo INNO PHY Registers */ - reg-names = "phy-ctl", "phy-clk"; - power-domains = <&pd1 A523_PCK_PCIE>; - phy_refclk_sel = <0>; /* 0:internal clk; 1:external clk */ - resets = <&ccu RST_BUS_PCIE_USB3>; - #phy-cells = <1>; - status = "disabled"; - }; - - pcie: pcie@4800000 { - compatible = "allwinner,sunxi-pcie-v210-rc"; - #address-cells = <3>; - #size-cells = <2>; - bus-range = <0x0 0xff>; - reg = <0 0x04800000 0 0x480000>; - reg-names = "dbi"; - device_type = "pci"; - ranges = <0x00000800 0 0x20000000 0x0 0x20000000 0 0x01000000 - 0x81000000 0 0x21000000 0x0 0x21000000 0 0x01000000 - 0x82000000 0 0x22000000 0x0 0x22000000 0 0x07000000>; - num-lanes = <1>; - phys = <&combophy PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - interrupts = , - , - , - , - , - , - , - , - , - ; - interrupt-names = "msi", "sii", "edma-w0", "edma-w1", "edma-w2", "edma-w3", - "edma-r0", "edma-r1", "edma-r2", "edma-r3"; - #interrupt-cells = <1>; - num-edma = <4>; - max-link-speed = <2>; - num-ib-windows = <8>; - num-ob-windows = <8>; - linux,pci-domain = <0>; - power-domains = <&pd1 A523_PCK_PCIE>; - clocks = <&ccu CLK_USB3_REF>, <&ccu CLK_PLL_PERI0_200M>, <&dcxo24M>, <&ccu CLK_PCIE_AUX>; - clock-names = "pclk_ref", "pclk_per", "hosc", "pclk_aux"; - status = "disabled"; - }; - - /* audio dirver module -> audio codec */ - codec:codec@7110000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-codec"; - reg = <0x0 0x07110000 0x0 0x348>; - resets = <&mcu_ccu RST_BUS_MCU_AUDIO_CODEC>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_AUDIO_CODEC>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_AUDIO_CODEC_DAC>, - <&mcu_ccu CLK_MCU_AUDIO_CODEC_ADC>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_audio", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_audio_dac", - "clk_audio_adc"; - interrupts = ; - status = "disabled"; - }; - - codec_plat:codec_plat { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-aaudio"; - dac-txdata = <0x07110020>; - adc-txdata = <0x07110040>; - dmas = <&dma1 7>, <&dma1 7>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - codec_mach:codec_mach { - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "audiocodec"; - soundcard-mach,pin-switches = "MIC1", "MIC2", "MIC3", - "LINEOUTL", "LINEOUTR", - "HPOUT", "SPK"; - soundcard-mach,routing = "MIC1P_PIN", "MIC1", - "MIC1N_PIN", "MIC1", - "MIC2P_PIN", "MIC2", - "MIC2N_PIN", "MIC2", - "MIC3P_PIN", "MIC3", - "MIC3N_PIN", "MIC3", - "LINEOUTL", "LINEOUTLP_PIN", - "LINEOUTL", "LINEOUTLN_PIN", - "LINEOUTR", "LINEOUTRP_PIN", - "LINEOUTR", "LINEOUTRN_PIN", - "SPK", "LINEOUTLP_PIN", - "SPK", "LINEOUTLN_PIN", - "SPK", "LINEOUTRP_PIN", - "SPK", "LINEOUTRN_PIN", - "HPOUT", "HPOUTL_PIN", - "HPOUT", "HPOUTR_PIN"; - soundcard-mach,jack-support = <1>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&codec_plat>; - }; - soundcard-mach,codec { - sound-dai = <&codec>; - soundcard-mach,pll-fs = <1>; - }; - }; - - hdmi_codec:hdmi_codec { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-codec-hdmi"; - status = "disabled"; - }; - - edp_codec:edp_codec { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-codec-edp"; - status = "disabled"; - }; - - /* audio dirver module -> owa */ - owa_plat:owa_plat@7116000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-owa"; - reg = <0x0 0x07116000 0x0 0x58>; - interrupts = ; - resets = <&mcu_ccu RST_BUS_MCU_OWA>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_OWA>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&ccu CLK_PLL_PERI0_300M>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_OWA_TX>, - <&mcu_ccu CLK_MCU_OWA_RX>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_owa", - "clk_pll_audio0_4x", - "clk_pll_peri0_300", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_owa_tx", - "clk_owa_rx"; - dmas = <&dma1 2>, <&dma1 2>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - owa_mach:owa_mach { - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndowa"; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&owa_plat>; - }; - soundcard-mach,codec { - }; - }; - - /* audio dirver module -> dmic */ - dmic_plat:dmic_plat@7111000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-dmic"; - reg = <0x0 0x07111000 0x0 0x50>; - resets = <&mcu_ccu RST_BUS_MCU_DMIC>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_DMIC>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_DMIC>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_dmic", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_dmic"; - dmas = <&dma1 8>; - dma-names = "rx"; - capture-cma = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - dmic_mach:dmic_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "snddmic"; - soundcard-mach,capture-only; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&dmic_plat>; - }; - soundcard-mach,codec { - }; - }; - - /* audio dirver module -> I2S/PCM */ - i2s0_plat:i2s0_plat@7112000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07112000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S0>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S0>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S0>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s"; - dmas = <&dma1 3>, <&dma1 3>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s0_mach:i2s0_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndi2s0"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s0_plat>; - }; - soundcard-mach,codec { - }; - }; - - i2s1_plat:i2s1_plat@7113000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07113000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S1>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S1>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S1>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s"; - dmas = <&dma1 4>, <&dma1 4>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s1_mach:i2s1_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndi2s1"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s1_plat>; - }; - soundcard-mach,codec { - }; - }; - - i2s2_plat:i2s2_plat@7114000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07114000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S2>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S2>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S2>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s"; - dmas = <&dma1 5>, <&dma1 5>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s2_mach:i2s2_mach{ - compatible = "allwinner,sunxi-snd-mach"; - /* card name. hdmi: "sndhdmi"; edp: "sndedp" */ - soundcard-mach,name = "sndhdmi"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s2_plat>; - }; - soundcard-mach,codec { - }; - }; - - i2s3_plat:i2s3_plat@7115000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07115000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S3>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S3>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&ccu CLK_PLL_PERI0_300M>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S3_ASRC>, - <&mcu_ccu CLK_MCU_I2S3>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_peri0_300", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s_asrc", - "clk_i2s"; - dmas = <&dma1 6>, <&dma1 6>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s3_mach:i2s3_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndi2s3"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s3_plat>; - }; - soundcard-mach,codec { - }; - }; - - rfkill: rfkill { - compatible = "allwinner,sunxi-rfkill"; - status = "disabled"; - }; - - addr_mgt: addr_mgt { - compatible = "allwinner,sunxi-addr_mgt"; - status = "disabled"; - }; - - btlpm: btlpm { - compatible = "allwinner,sunxi-btlpm"; - status = "disabled"; - }; - - mdio0: mdio0@4500048 { - compatible = "allwinner,sunxi-mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x04500048 0x0 0x8>; - status = "disabled"; - gmac0_phy0: ethernet-phy@1 { - /* RTL8211F (0x001cc916) */ - reg = <1>; - max-speed = <1000>; /* Max speed capability */ - reset-gpios = <&pio PH 19 GPIO_ACTIVE_LOW>; - /* PHY datasheet rst time */ - reset-assert-us = <10000>; - reset-deassert-us = <150000>; - }; - }; - - gmac0: gmac0@4500000 { - compatible = "allwinner,sunxi-gmac"; - reg = <0x0 0x04500000 0x0 0x10000>, - <0x0 0x03000030 0x0 0x4>; - interrupts = ; - interrupt-names = "gmacirq"; - clocks = <&ccu CLK_GMAC0>, <&ccu CLK_GMAC0_25M>; - clock-names = "gmac", "phy25m"; - resets = <&ccu RST_BUS_GMAC0>; - phy-handle = <&gmac0_phy0>; - status = "disabled"; - }; - - gmac1: ethernet@4510000 { - compatible = "allwinner,sunxi-gmac-200", "snps,dwmac-4.20a"; - reg = <0x0 0x04510000 0x0 0x10000>, - <0x0 0x03000034 0x0 0x4>; - interrupts = ; - interrupt-names = "macirq"; - clocks = <&ccu CLK_GMAC1>, <&ccu CLK_GMAC1_MBUS_GATE>, <&ccu CLK_GMAC1_25M>; - clock-names = "stmmaceth", "pclk", "phy25m"; - resets = <&ccu RST_BUS_GMAC1>; - reset-names = "stmmaceth"; - phy-handle = <&gmac1_phy0>; - power-domains = <&pd1 A523_PCK_VO1>; - status = "disabled"; - - - snps,fixed-burst; - - snps,axi-config = <&gmac1_stmmac_axi_setup>; - snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; - snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; - - gmac1_stmmac_axi_setup: stmmac-axi-config { - snps,wr_osr_lmt = <0xf>; - snps,rd_osr_lmt = <0xf>; - snps,blen = <256 128 64 32 16 8 4>; - }; - - gmac1_mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <1>; - queue0 {}; - }; - - gmac1_mtl_tx_setup: tx_queues-config { - snps,tx-queues-to-use = <1>; - queue0 {}; - }; - - mdio1: mdio1@1 { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - gmac1_phy0: ethernet-phy@1 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x1>; - max-speed = <1000>; /* Max speed capability */ - reset-gpios = <&pio PJ 27 GPIO_ACTIVE_LOW>; - /* PHY datasheet rst time */ - reset-assert-us = <10000>; - reset-deassert-us = <150000>; - }; - }; - }; - - ioserial@0 { - compatible = "allwinner,ioserial-100"; - tx-gpios = <&pio PB 11 GPIO_ACTIVE_HIGH>; - status = "disabled"; - }; - - sid@3006000 { - compatible = "allwinner,sun55iw3p1-sid", "allwinner,sunxi-sid"; - reg = <0x0 0x03006000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - non-secure-maxoffset = <0x80>; - non-secure-maxlen = <0x20>; - - secure_status { - reg = <0x0 0>; - offset = <0xa0>; - size = <0x4>; - }; - chipid { - reg = <0x0 0>; - offset = <0x200>; - size = <0x10>; - }; - rotpk { - reg = <0x0 0>; - offset = <0x140>; - size = <0x20>; - }; - }; - - sram_ctrl: sram_ctrl@3000000 { - compatible = "allwinner,sram_ctrl"; - reg = <0x0 0x03000000 0 0x184>; - soc_ver { - offset = <0x24>; - mask = <0x7>; - shift = <0>; - ver_a = <0x00000000>; - ver_b = <0x00000001>; - ver_c = <0x00000002>; - }; - - soc_id { - offset = <0x200>; - mask = <0x1>; - shift = <22>; - }; - - soc_bin { - offset = <0x0>; - mask = <0x3ff>; - shift = <0x0>; - }; - }; - }; -}; - diff --git a/bsp/configs/linux-5.15/sun55iw3p1_min_defconfig b/bsp/configs/linux-5.15/sun55iw3p1_min_defconfig deleted file mode 100644 index 6fbc161cff..0000000000 --- a/bsp/configs/linux-5.15/sun55iw3p1_min_defconfig +++ /dev/null @@ -1,113 +0,0 @@ -CONFIG_AW_BSP=y -CONFIG_ARCH_SUN55I=y -CONFIG_AW_IC_BOARD=y -CONFIG_AW_SOC_NAME="A523" -CONFIG_AW_TIMER=y -CONFIG_AW_RTC=y -CONFIG_AW_RTC_POWEROFF_ALARM=y -CONFIG_AW_WATCHDOG=y -CONFIG_AW_WAKEUPGEN=y -# CONFIG_AW_INPUT_SENSORINIT is not set -# CONFIG_AW_DISP2 is not set -CONFIG_AW_CRASHDUMP=y -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_CGROUPS=y -CONFIG_CGROUP_SCHED=y -CONFIG_NAMESPACES=y -# CONFIG_UTS_NS is not set -# CONFIG_PID_NS is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="./bsp/ramfs/ramfs_aarch64.cpio.gz" -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_XZ is not set -# CONFIG_RD_LZO is not set -# CONFIG_RD_LZ4 is not set -CONFIG_EXPERT=y -# CONFIG_SYSFS_SYSCALL is not set -# CONFIG_FHANDLE is not set -CONFIG_KALLSYMS_ALL=y -# CONFIG_RSEQ is not set -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB_MERGE_DEFAULT is not set -CONFIG_PROFILING=y -CONFIG_SCHED_MC=y -CONFIG_NR_CPUS=4 -CONFIG_HOTPLUG_CPU=y -CONFIG_COMPAT=y -# CONFIG_EFI is not set -# CONFIG_SUSPEND is not set -CONFIG_JUMP_LABEL=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_CMA=y -CONFIG_CMA_AREAS=16 -CONFIG_PCI=y -# CONFIG_PCI_QUIRKS is not set -CONFIG_DEVTMPFS=y -# CONFIG_ALLOW_DEV_COREDUMP is not set -CONFIG_GNSS=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_VT is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_HW_RANDOM is not set -# CONFIG_DEVPORT is not set -# CONFIG_PINCTRL_SUN8I_H3_R is not set -# CONFIG_PINCTRL_SUN50I_A64 is not set -# CONFIG_PINCTRL_SUN50I_A64_R is not set -# CONFIG_PINCTRL_SUN50I_A100 is not set -# CONFIG_PINCTRL_SUN50I_A100_R is not set -# CONFIG_PINCTRL_SUN50I_H5 is not set -# CONFIG_PINCTRL_SUN50I_H6 is not set -# CONFIG_PINCTRL_SUN50I_H6_R is not set -# CONFIG_PINCTRL_SUN50I_H616 is not set -# CONFIG_PINCTRL_SUN50I_H616_R is not set -# CONFIG_HWMON is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_VGA_ARB is not set -CONFIG_FB=y -# CONFIG_USB_SUPPORT is not set -# CONFIG_CLK_SUNXI is not set -# CONFIG_SUNXI_CCU is not set -# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_IOMMU_SUPPORT is not set -CONFIG_EXT4_FS=y -# CONFIG_DNOTIFY is not set -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_XZ_DEC=y -CONFIG_DMA_CMA=y -CONFIG_PRINTK_TIME=y -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -CONFIG_DEBUG_INFO=y -# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_PANIC_ON_OOPS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_PREEMPT is not set -CONFIG_STACKTRACE=y -# CONFIG_FTRACE is not set diff --git a/bsp/configs/linux-5.15/sun55iw3p1_standby_min_defconfig b/bsp/configs/linux-5.15/sun55iw3p1_standby_min_defconfig deleted file mode 100644 index 7e3bbfa781..0000000000 --- a/bsp/configs/linux-5.15/sun55iw3p1_standby_min_defconfig +++ /dev/null @@ -1,132 +0,0 @@ -CONFIG_AW_BSP=y -CONFIG_ARCH_SUN55I=y -CONFIG_AW_IC_BOARD=y -CONFIG_AW_SOC_NAME="A523" -CONFIG_AW_TIMER_SUN50I=y -CONFIG_AW_DMA=y -CONFIG_AW_RTC=y -CONFIG_AW_RTC_REBOOT_FLAG=y -CONFIG_AW_RTC_POWEROFF_ALARM=y -CONFIG_AW_TIMER_ALARM=y -CONFIG_AW_NSI=y -CONFIG_AW_WATCHDOG=y -CONFIG_AW_TWI=y -CONFIG_AW_SPI=y -CONFIG_AW_LEDC=y -CONFIG_AW_PWM=y -CONFIG_AW_IOMMU=y -CONFIG_AW_WAKEUPGEN=y -CONFIG_AW_SUN8I_NMI=y -CONFIG_AW_MFD_AXP2101_I2C=y -CONFIG_AW_MFD_PMU_EXT_I2C=y -CONFIG_AW_REGULATOR_AXP2101=y -CONFIG_AW_REGULATOR_PMU_EXT=y -CONFIG_AW_AXP2202_POWER=y -# CONFIG_AW_INPUT_SENSORINIT is not set -CONFIG_AW_MMC=y -# CONFIG_AW_DISP2 is not set -CONFIG_AW_CRASHDUMP=y -# CONFIG_AW_NNA_VIP is not set -# CONFIG_AW_NNA_GALCORE is not set -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_CGROUPS=y -CONFIG_CGROUP_SCHED=y -CONFIG_NAMESPACES=y -# CONFIG_UTS_NS is not set -# CONFIG_PID_NS is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="./bsp/ramfs/ramfs_aarch64.cpio.gz" -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_XZ is not set -# CONFIG_RD_LZO is not set -# CONFIG_RD_LZ4 is not set -CONFIG_EXPERT=y -# CONFIG_SYSFS_SYSCALL is not set -# CONFIG_FHANDLE is not set -CONFIG_KALLSYMS_ALL=y -# CONFIG_RSEQ is not set -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB_MERGE_DEFAULT is not set -CONFIG_PROFILING=y -CONFIG_SCHED_MC=y -CONFIG_NR_CPUS=8 -CONFIG_COMPAT=y -# CONFIG_EFI is not set -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_DEBUG=y -CONFIG_PM_ADVANCED_DEBUG=y -CONFIG_JUMP_LABEL=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_CMA=y -CONFIG_CMA_AREAS=16 -CONFIG_PCI=y -# CONFIG_PCI_QUIRKS is not set -CONFIG_DEVTMPFS=y -# CONFIG_ALLOW_DEV_COREDUMP is not set -CONFIG_GNSS=y -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_VT is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_HW_RANDOM is not set -# CONFIG_DEVPORT is not set -# CONFIG_PINCTRL_SUN8I_H3_R is not set -# CONFIG_PINCTRL_SUN50I_A64 is not set -# CONFIG_PINCTRL_SUN50I_A64_R is not set -# CONFIG_PINCTRL_SUN50I_A100 is not set -# CONFIG_PINCTRL_SUN50I_A100_R is not set -# CONFIG_PINCTRL_SUN50I_H5 is not set -# CONFIG_PINCTRL_SUN50I_H6 is not set -# CONFIG_PINCTRL_SUN50I_H6_R is not set -# CONFIG_PINCTRL_SUN50I_H616 is not set -# CONFIG_PINCTRL_SUN50I_H616_R is not set -# CONFIG_HWMON is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -# CONFIG_VGA_ARB is not set -CONFIG_FB=y -# CONFIG_USB_SUPPORT is not set -CONFIG_MMC=y -CONFIG_MMC_HSQ=y -# CONFIG_CLK_SUNXI is not set -# CONFIG_SUNXI_CCU is not set -# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set -# CONFIG_FSL_ERRATUM_A008585 is not set -CONFIG_EXT4_FS=y -# CONFIG_DNOTIFY is not set -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_XZ_DEC=y -CONFIG_DMA_CMA=y -CONFIG_PRINTK_TIME=y -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -CONFIG_DEBUG_INFO=y -# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_PANIC_ON_OOPS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_PREEMPT is not set -CONFIG_STACKTRACE=y -# CONFIG_FTRACE is not set diff --git a/bsp/configs/linux-6.1/android_min_ko_defconfig b/bsp/configs/linux-6.1/android_min_ko_defconfig deleted file mode 100644 index e85943238d..0000000000 --- a/bsp/configs/linux-6.1/android_min_ko_defconfig +++ /dev/null @@ -1,92 +0,0 @@ -# V0.1 BSP Min System -CONFIG_AW_BSP=y -CONFIG_ARCH_SUN55I=y -CONFIG_AW_IC_BOARD=y -CONFIG_AW_SOC_NAME="A523" -CONFIG_AW_CCU=m -CONFIG_AW_PINCTRL=m -CONFIG_AW_UART=m -CONFIG_AW_SERIAL_CONSOLE=y -CONFIG_AW_EARLY_PRINTK=y -CONFIG_AW_TIMER_SUN50I=m - -# V0.3 BSP Basic System -CONFIG_AW_DMA=m -CONFIG_AW_DUMP_REG=m -CONFIG_AW_RTC=m -CONFIG_AW_RTC_REBOOT_FLAG=y -CONFIG_AW_RTC_POWEROFF_ALARM=y -CONFIG_AW_WATCHDOG=m -CONFIG_AW_NSI=m - -# V0.5 BSP Peripheral Module -CONFIG_AW_I2C=m -CONFIG_AW_PWM=m -CONFIG_AW_LRADC=m -CONFIG_AW_LEDC=m -CONFIG_AW_IR_RX=m -CONFIG_AW_IR_TX=m -CONFIG_AW_GPADC=m -CONFIG_AW_SPI=m -CONFIG_AW_PCIE_RC=m -CONFIG_AW_HWSPINLOCK=m -CONFIG_AW_MSGBOX=m -CONFIG_AW_SID=m -CONFIG_AW_SYS_INFO=m -CONFIG_AW_SMC=m -CONFIG_AW_NAND=m -CONFIG_AW_MMC_HSQ=m -CONFIG_AW_MMC=m -#USB -CONFIG_USB_OHCI_HCD=m # only for Linux-6.1 -CONFIG_USB_EHCI_HCD_SUNXI=m -CONFIG_USB_OHCI_HCD_SUNXI=m -CONFIG_USB_SUNXI_HCD=m -CONFIG_USB_SUNXI_HCI=m -CONFIG_USB_SUNXI_EHCI0=m -CONFIG_USB_SUNXI_EHCI1=m -CONFIG_USB_SUNXI_OHCI0=m -CONFIG_USB_SUNXI_OHCI1=m -CONFIG_USB_SUNXI_USB=m -CONFIG_USB_SUNXI_UDC0=m -CONFIG_USB_SUNXI_USB_MANAGER=m -CONFIG_USB_SUNXI_USB_DEBUG=m -CONFIG_USB_SUNXI_USB_ADB=m - -# V1.0 Complete System & Android min system -# System -CONFIG_AW_IOMMU=m -CONFIG_AW_CRASHDUMP=m -CONFIG_AW_CRASHDUMP_KEY=y -# CTP -CONFIG_AW_INPUT_SENSORINIT=m -CONFIG_AW_INPUT_CTP=y -CONFIG_TOUCHSCREEN_GT9XX=m -CONFIG_AW_INPUT_SENSOR=y -CONFIG_AW_INPUT_MISC=y -CONFIG_AW_HALL_SENSOR=m -# Power -CONFIG_AW_THERMAL=m -CONFIG_AW_PM_DOMAINS=m -CONFIG_AW_PCK600_DOMAINS=m -CONFIG_AW_POWER_DOMAIN_TEST=m -CONFIG_AW_MFD_AXP2101_I2C=m -CONFIG_AW_MFD_PMU_EXT_I2C=m -CONFIG_AW_REGULATOR_AXP2101=m -CONFIG_AW_REGULATOR_PMU_EXT=m -CONFIG_AW_INPUT_AXP2101_PEK=m -CONFIG_AW_AXP2202_POWER=m -CONFIG_AW_CPUFREQ_DT=m -CONFIG_AW_DMC_DEVFREQ=m -CONFIG_AW_EVENT_DDR=m -# DE(Display) -CONFIG_FB=m -CONFIG_AW_DISP2=m -CONFIG_EDP2_AW_DISP2=m -CONFIG_EDP_SUPPORT_VVX10T025J00_2560X1600=m -CONFIG_DISP_PHY_INNO_EDP_1_3=m -CONFIG_AW_DISP2_DEBUG=y -CONFIG_AW_DISP2_COMPOSER=y -# LCD -# GPU -CONFIG_AW_GPU_TYPE="mali-g57" diff --git a/bsp/configs/linux-6.1/sun55iw3p1.dtsi b/bsp/configs/linux-6.1/sun55iw3p1.dtsi deleted file mode 100644 index 05fdf0a4d5..0000000000 --- a/bsp/configs/linux-6.1/sun55iw3p1.dtsi +++ /dev/null @@ -1,3672 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/ { - model = "sun55iw3"; - interrupt-parent = <&wakeupgen>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - serial5 = &uart5; - serial6 = &uart6; - serial7 = &uart7; - serial8 = &uart8; - serial9 = &uart9; - sunxi-mmc0 = &sdc0; - sunxi-mmc2 = &sdc2; - nand0 =&nand0; - gpadc0 = &gpadc0; - gpadc1 = &gpadc1; - twi0 = &twi0; - twi1 = &twi1; - twi2 = &twi2; - twi3 = &twi3; - twi4 = &twi4; - twi5 = &twi5; - twi6 = &twi6; - twi7 = &twi7; - twi8 = &twi8; - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - spi3 = &r_spi0; - spif0 = &spif0; - ir0 = &irrx; - ir1 = &s_irrx; - ir2 = &irtx; - ve0 = &ve; - ve1 = &ve1; - edp0 = &edp0; - pcie = &pcie; - gmac0 = &gmac0; - }; - - memory@40000000 { - device_type = "memory"; - reg = <0x00000000 0x40000000 0x00000000 0x20000000>; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - bl31 { - reg = <0x0 0x48000000 0x0 0x01000000>; - }; - }; - - firmware { - android { - compatible = "android,firmware"; - name = "android"; - boot_devices = "soc@3000000/4020000.sdmmc,soc@3000000/4022000.sdmmc,soc@3000000"; - vbmeta { - compatible = "android,vbmeta"; - parts = "vbmeta,vbmeta_system,vbmeta_vendor,boot,init_boot"; - }; - }; - optee { - compatible = "linaro,optee-tz"; - method = "smc"; - }; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x0>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - dynamic-power-coefficient = <286>; - }; - - cpu1: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x100>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - }; - - cpu2: cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x200>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - }; - - cpu3: cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x300>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <922>; - clocks = <&cpupll_ccu CLK_PLL_CPU1>; - operating-points-v2 = <&cluster0_opp_table>; - #cooling-cells = <2>; - }; - - cpu4: cpu@400 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x400>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - dynamic-power-coefficient = <354>; - }; - - cpu5: cpu@500 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x500>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - }; - - cpu6: cpu@600 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x600>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - }; - - cpu7: cpu@700 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x700>; - enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; - capacity-dmips-mhz = <1024>; - clocks = <&cpupll_ccu CLK_PLL_CPU3>; - operating-points-v2 = <&cluster1_opp_table>; - #cooling-cells = <2>; - }; - - cpu-map { - cluster0 { - core0 { - cpu = <&cpu0>; - }; - core1 { - cpu = <&cpu1>; - }; - core2 { - cpu = <&cpu2>; - }; - core3 { - cpu = <&cpu3>; - }; - }; - - cluster1 { - core0 { - cpu = <&cpu4>; - }; - core1 { - cpu = <&cpu5>; - }; - core2 { - cpu = <&cpu6>; - }; - core3 { - cpu = <&cpu7>; - }; - }; - }; - - idle-states { - entry-method = "arm,psci"; - - CPU_SLEEP_0: cpu-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0010000>; - entry-latency-us = <46>; - exit-latency-us = <59>; - min-residency-us = <3570>; - local-timer-stop; - }; - - CLUSTER_SLEEP_0: cluster-sleep-0 { - compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x1010000>; - entry-latency-us = <47>; - exit-latency-us = <74>; - min-residency-us = <5000>; - local-timer-stop; - }; - }; - }; - - cluster0_opp_table: cluster0-opp-table { - compatible = "allwinner,sun50i-operating-points"; - opp-shared; - - opp@408000000 { - opp-hz = /bits/ 64 <408000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <900000>; - }; - - opp@720000000 { - opp-hz = /bits/ 64 <720000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <900000>; - }; - - opp@936000000 { - opp-hz = /bits/ 64 <936000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <900000>; - }; - - opp@1128000000 { - opp-hz = /bits/ 64 <1128000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <1000000>; - }; - - opp@1224000000 { - opp-hz = /bits/ 64 <1224000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <1050000>; - }; - - opp@1296000000 { - opp-hz = /bits/ 64 <1296000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <1100000>; - }; - - opp@1416000000 { - opp-hz = /bits/ 64 <1416000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <1150000>; - }; - }; - - cluster1_opp_table: cluster1-opp-table { - compatible = "allwinner,sun50i-operating-points"; - opp-shared; - - opp@408000000 { - opp-hz = /bits/ 64 <408000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <900000>; - }; - - opp@720000000 { - opp-hz = /bits/ 64 <720000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <900000>; - }; - - opp@1248000000 { - opp-hz = /bits/ 64 <1248000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <900000>; - }; - - opp@1488000000 { - opp-hz = /bits/ 64 <1488000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <1000000>; - }; - - opp@1584000000 { - opp-hz = /bits/ 64 <1584000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <1050000>; - }; - - opp@1680000000 { - opp-hz = /bits/ 64 <1680000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <1100000>; - }; - - opp@1800000000 { - opp-hz = /bits/ 64 <1800000000>; - clock-latency-ns = <244144>; /* 8 32k periods */ - opp-microvolt = <1150000>; - }; - }; - thermal-zones { - cpul_thermal_zone { - polling-delay-passive = <500>; - polling-delay = <1000>; - thermal-sensors = <&ths1 1>; - sustainable-power = <1200>; - - cpul_trips: trips { - cpul_threshold: trip-point@0 { - temperature = <70000>; - type = "passive"; - hysteresis = <0>; - }; - cpul_target: trip-point@1 { - temperature = <90000>; - type = "passive"; - hysteresis = <0>; - }; - cpul_crit: cpu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - - cooling-maps { - map0 { - trip = <&cpul_target>; - cooling-device = <&cpu0 - THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - contribution = <1024>; - }; - }; - }; - - cpub_thermal_zone { - polling-delay-passive = <500>; - polling-delay = <1000>; - thermal-sensors = <&ths1 0>; - sustainable-power = <1600>; - - cpub_trips: trips { - cpub_threshold: trip-point@0 { - temperature = <70000>; - type = "passive"; - hysteresis = <0>; - }; - cpub_target: trip-point@1 { - temperature = <90000>; - type = "passive"; - hysteresis = <0>; - }; - cpub_crit: cpu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - - cooling-maps { - map0 { - trip = <&cpub_target>; - cooling-device = <&cpu4 - THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - contribution = <1024>; - }; - }; - }; - - gpu_thermal_zone { - polling-delay-passive = <500>; - polling-delay = <1000>; - thermal-sensors = <&ths1 2>; - - gpu_trips: trips { - gpu_crit: gpu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - }; - - npu_thermal_zone { - polling-delay-passive = <500>; - polling-delay = <1000>; - thermal-sensors = <&ths1 3>; - - npu_trips: trips { - npu_crit: npu_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - }; - - ddr_thermal_zone { - polling-delay-passive = <0>; - polling-delay = <0>; - thermal-sensors = <&ths0 0>; - ddr_trips: trips { - ddr_crit: ddr_crit@0 { - temperature = <110000>; - type = "critical"; - hysteresis = <0>; - }; - }; - }; - }; - - nmi_intc: intc-nmi@7010320 { - compatible = "allwinner,sun8i-nmi"; - interrupt-parent = <&gic>; - #interrupt-cells = <2>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0x07010320 0 0xc>; - interrupts = ; - }; - - dcxo24M: dcxo24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "dcxo24M"; - }; - - rc_16m: rc16m_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <16000000>; - clock-accuracy = <300000000>; - clock-output-names = "rc-16m"; - }; - - ext_32k: ext32k_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "ext-32k"; - }; - - gic: interrupt-controller@3400000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0x03400000 0 0x10000>, /* GIC Dist */ - <0x0 0x03460000 0 0xFF004>; /* GIC Re */ - interrupt-parent = <&gic>; - }; - - wakeupgen: interrupt-controller@0 { - compatible = "allwinner,sunxi-wakeupgen"; - interrupt-controller; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-parent = <&gic>; - }; - - timer_arch { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - clock-frequency = <24000000>; - interrupt-parent = <&gic>; - arm,no-tick-in-suspend; - }; - - power: power-management@7001400 { - compatible = "allwinner,a523-pmu", "syscon", "simple-mfd"; - reg = <0x0 0x07001400 0x0 0x400>; - - pd: power-controller { - compatible = "allwinner,a523-power-controller"; - clocks = <&r_ccu CLK_R_PPU1>; - clock-names = "ppu"; - resets = <&r_ccu RST_R_PPU1>; - reset-names = "ppu_rst"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd_dsp@A523_PD_DSP { - reg = ; - }; - pd_npu@A523_PD_NPU { - reg = ; - }; - pd_sram@A523_PD_SRAM { - reg = ; - }; - pd_riscv@A523_PD_RISCV { - reg = ; - }; - }; - }; - pck: pck-600@7060000 { - compatible = "allwinner,a523-pck", "syscon", "simple-mfd"; - reg = <0x0 0x07060000 0x0 0x8000>; - - pd1: power-controller { - compatible = "allwinner,a523-pck-600"; - clocks = <&r_ccu CLK_R_PPU>; - clock-names = "pck"; - resets = <&r_ccu RST_R_PPU>; - reset-names = "pck_rst"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd1_ve@A523_PCK_VE { - reg = ; - }; - pd1_vi@A523_PCK_VI { - reg = ; - }; - pd1_vo0@A523_PCK_VO0 { - reg = ; - }; - pd1_vo1@A523_PCK_VO1 { - reg = ; - }; - pd1_de@A523_PCK_DE { - reg = ; - }; - pd1_nand@A523_PCK_NAND { - reg = ; - }; - pd1_pcie@A523_PCK_PCIE { - reg = ; - }; - }; - }; - - mmu_aw: iommu@2010000 { - compatible = "allwinner,iommu-v15-sun55iw3"; - reg = <0x0 0x02010000 0x0 0x1000>; - interrupts = ; - interrupt-names = "iommu-irq"; - clocks = <&ccu CLK_IOMMU>; - clock-names = "iommu"; - /* clock-frequency = <24000000>; */ - #iommu-cells = <2>; - }; - - soc: soc@3000000 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - ve: ve@1c0e000 { - compatible = "allwinner,sunxi-cedar-ve"; - reg = <0x0 0x01c0e000 0x0 0x1000>, - <0x0 0x03000000 0x0 0x10>; - interrupts = ; - clocks =<&ccu CLK_BUS_VE>, <&ccu CLK_VE>, <&ccu CLK_VE_MBUS_GATE>; - clock-names = "bus_ve", "ve", "mbus_ve"; - resets = <&ccu RST_BUS_VE>; - reset-names = "reset_ve"; - iommus = <&mmu_aw 2 1>; - }; - - ve1: ve1@1c0e000 { - compatible = "allwinner,sunxi-cedar-ve"; - iommus = <&mmu_aw 3 1>; - }; - - rtc_ccu: rtc_ccu@7090000 { - compatible = "allwinner,sun55iw3-rtc-ccu"; - reg = <0x0 0x07090000 0x0 0x400>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - cpupll_ccu: clock@8817000 { - compatible = "allwinner,sun55iw3-cpupll"; - reg = <0x0 0x08817000 0x0 0x4000>; - #clock-cells = <1>; - #reset-cells = <1>; - pll_step = <0x9>; - /* pll_ssc will divid pll_ssc_scale in code - * keep value 0 < pll_ssc < 10 - */ - pll_ssc_scale = <0xa>; - pll_ssc = <0x1>; - }; - - ccu: ccu@2001000 { - compatible = "allwinner,sun55iw3-ccu"; - reg = <0x0 0x02001000 0x0 0x1000>; - clocks = <&dcxo24M>, <&rtc_ccu CLK_OSC32K>, <&rc_16m>; - clock-names = "hosc", "losc", "iosc"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mcu_ccu: mcu_ccu@7102000 { - compatible = "allwinner,sun55iw3-mcu-ccu"; - reg = <0x0 0x07102000 0x0 0x165>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - r_ccu: r_ccu@7010000 { - compatible = "allwinner,sun55iw3-r-ccu"; - reg = <0x0 0x07010000 0x0 0x230>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - hdmi: hdmi@5520000 { - compatible = "allwinner,sunxi-hdmi"; - reg = <0x0 0x05520000 0x0 0x100000>; - interrupts = ; - clocks = <&ccu CLK_HDMI>, - <&ccu CLK_HDMI_24M>, - <&ccu CLK_HDMI_CEC>, - <&ccu CLK_TCONTV>; - clock-names = "clk_hdmi", - "clk_hdmi_24M", - "clk_cec", - "clk_tcon_tv"; - resets = <&ccu RST_BUS_HDMI_SUB>, - <&ccu RST_BUS_HDMI_MAIN>; - reset-names = "rst_bus_sub", - "rst_bus_main"; - assigned-clocks = <&ccu CLK_HDMI>; - assigned-clock-rates = <0>, <0>; - - status = "disabled"; - }; - - wdt: watchdog@2050000 { - compatible = "allwinner,wdt-v103"; - reg = <0x0 0x02050000 0x0 0x20>; - interrupts = ; - }; - - ledc: ledc@2008000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-leds"; - reg = <0x0 0x02008000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_LEDC>, <&ccu CLK_BUS_LEDC>; - clock-names = "clk_ledc", "clk_cpuapb"; - resets = <&ccu RST_BUS_LEDC>; - reset-names = "ledc_reset"; - dmas = <&dma 42>, <&dma 42>; - dma-names = "rx", "tx"; - status = "disabled"; - }; - - irrx: irrx@2005000 { - compatible = "allwinner,irrx"; - reg = <0x0 0x02005000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_IRRX>, <&dcxo24M>, <&ccu CLK_IRRX>; - clock-names = "bus", "pclk", "mclk"; - resets = <&ccu RST_BUS_IRRX>; - status = "disabled"; - }; - - s_irrx: s_irrx@7040000 { - compatible = "allwinner,irrx"; - reg = <0x0 0x07040000 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_IRRX>, <&dcxo24M>, <&r_ccu CLK_R_IRRX>; - clock-names = "bus", "pclk", "mclk"; - resets = <&r_ccu RST_R_IRRX>; - status = "disabled"; - }; - - irtx: irtx@2003000 { - compatible = "allwinner,irtx"; - reg = <0x0 0x02003000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_IRTX>, <&dcxo24M>, <&ccu CLK_IRTX>; - clock-names = "bus", "pclk", "mclk"; - resets = <&ccu RST_BUS_IRTX>; - status = "disabled"; - }; - - lradc: lradc@2009800 { - compatible = "allwinner,keyboard_1350mv"; - reg = <0x0 0x02009800 0x0 0x100>; - interrupts = ; - clocks = <&ccu CLK_LRADC>; - resets = <&ccu RST_BUS_LRADC>; - status = "disabled"; - }; - - g2d: g2d@5440000 { - compatible = "allwinner,sunxi-g2d"; - reg = <0x0 0x05440000 0x0 0x30000>; - interrupts = ; - clocks = <&ccu CLK_BUS_G2D>, <&ccu CLK_G2D>; - clock-names = "bus", "g2d"; - resets = <&ccu RST_BUS_G2D>; - iommus = <&mmu_aw 4 1>; - assigned-clocks = <&ccu CLK_G2D>; - assigned-clock-rates = <300000000>; - }; - - gpadc0: gpadc0@2009000 { - compatible = "allwinner,sunxi-gpadc"; - reg = <0x0 0x02009000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_GPADC0>; - clock-names = "bus"; - resets = <&ccu RST_BUS_GPADC0>; - status = "disabled"; - }; - - gpadc1: gpadc1@2009c00 { - compatible = "allwinner,sunxi-gpadc"; - reg = <0x0 0x02009c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_GPADC1>; - clock-names = "bus"; - resets = <&ccu RST_BUS_GPADC1>; - status = "disabled"; - }; - - soc_timer0: timer@3008000 { - compatible = "allwinner,sun50i-timer"; - device_type = "soc_timer"; - reg = <0x0 0x03008000 0x0 0x400>; - interrupt-parent = <&gic>; - interrupts = ; - sunxi-timers = <&timer0>, <&timer1>; - }; - - timer0: timer@0 { - clocks = <&dcxo24M>, <&ccu CLK_TIMER0>, <&ccu CLK_TIMER>; - clock-names = "parent", "mod", "bus"; - resets = <&ccu RST_BUS_TIME>; - }; - - timer1: timer@1 { - clocks = <&dcxo24M>, <&ccu CLK_TIMER1>, <&ccu CLK_TIMER>; - clock-names = "parent", "mod", "bus"; - }; - - pio: pinctrl@2000000 { - //#address-cells = <1>; - //#size-cells = <0>; - compatible = "allwinner,sun55iw3-pinctrl"; - reg = <0x0 0x02000000 0x0 0x800>; - interrupts = , - , - , - , - , - , - , - , - , - ; - clocks = <&ccu CLK_APB1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - - sdc0_pins_a: sdc0@0 { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "sdc0"; - drive-strength = <40>; - bias-pull-up; - power-source = <3300>; - }; - - sdc0_pins_b: sdc0@1 { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "sdc0"; - drive-strength = <40>; - bias-pull-up; - power-source = <1800>; - }; - - sdc0_pins_c: sdc0@2 { - pins = "PF0", "PF1", "PF2", - "PF3", "PF4", "PF5"; - function = "gpio_in"; - }; - - /* TODO: add jtag pin */ - sdc0_pins_d: sdc0@3 { - pins = "PF2", "PF4"; - function = "uart0"; - drive-strength = <10>; - bias-pull-up; - }; - - sdc0_pins_e: sdc0@4 { - pins = "PF0", "PF1", "PF3", - "PF5"; - function = "jtag"; - drive-strength = <10>; - bias-pull-up; - }; - - sdc1_pins_a: sdc1@0 { - pins = "PG0", "PG1", "PG2", - "PG3", "PG4", "PG5"; - function = "sdc1"; - drive-strength = <40>; - bias-pull-up; - }; - - sdc1_pins_b: sdc1@1 { - pins = "PG0", "PG1", "PG2", - "PG3", "PG4", "PG5"; - function = "gpio_in"; - }; - - sdc2_pins_a: sdc2@0 { - pins = "PC1", "PC5", "PC6", - "PC8", "PC9", "PC10", "PC11", - "PC13", "PC14", "PC15", "PC16"; - function = "sdc2"; - drive-strength = <40>; - bias-pull-up; - }; - - sdc2_pins_b: sdc2@1 { - pins = "PC0", "PC1", "PC5", "PC6", - "PC8", "PC9", "PC10", "PC11", - "PC13", "PC14", "PC15", "PC16"; - function = "gpio_in"; - }; - - sdc2_pins_c: sdc2@2 { - pins = "PC0"; - function = "sdc2"; - drive-strength = <40>; - bias-pull-down; - }; - - dsi0_4lane_pins_a: dsi0_4lane@0 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; - function = "dsi0"; - drive-strength = <30>; - bias-disable; - }; - - dsi0_4lane_pins_b: dsi0_4lane@1 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; - function = "io_disabled"; - bias-disable; - }; - - dsi1_4lane_pins_a: dsi1_4lane@0 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "dsi1"; - drive-strength = <30>; - bias-disable; - }; - - dsi1_4lane_pins_b: dsi1_4lane@1 { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19"; - function = "io_disabled"; - bias-disable; - }; - - rgb18_pins_a: rgb18@0 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ - "PD20", "PD21"; - function = "lcd0"; - drive-strength = <30>; - }; - - rgb18_pins_b: rgb18@1 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ - "PD20", "PD21"; - function = "gpio_in"; - }; - - rgb24_pins_a: rgb24@0 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ - "PD20", "PD21", "PD22","PD23","PD24","PD25","PD26","PD27"; - function = "dpss"; - drive-strength = <30>; - }; - - rgb24_pins_b: rgb24@1 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9", \ - "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", "PD18", "PD19", \ - "PD20", "PD21", "PD22", "PD23","PD24","PD25","PD26","PD27"; - function = "gpio_in"; - }; - - lvds0_pins_a: lvds0@0 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; - function = "lvds"; - drive-strength = <30>; - }; - - lvds0_pins_b: lvds0@1 { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD8", "PD9"; - function = "gpio_in"; - }; - - csi_mclk0_pins_a: csi_mclk0@0 { - pins = "PE0"; - function = "mipi0"; - drive-strength = <20>; - }; - - csi_mclk0_pins_b: csi_mclk0@1 { - pins = "PE0"; - function = "gpio_in"; - }; - - csi_mclk1_pins_a: csi_mclk1@0 { - pins = "PE5"; - function = "mipi1"; - drive-strength = <20>; - }; - - csi_mclk1_pins_b: csi_mclk1@1 { - pins = "PE5"; - function = "gpio_in"; - }; - - csi_mclk2_pins_a: csi_mclk2@0 { - pins = "PE15"; - function = "mipi2"; - drive-strength = <20>; - }; - - csi_mclk2_pins_b: csi_mclk2@1 { - pins = "PE15"; - function = "gpio_in"; - }; - - csi_mclk3_pins_a: csi_mclk3@0 { - pins = "PE10"; - function = "mipi3"; - drive-strength = <20>; - }; - - csi_mclk3_pins_b: csi_mclk3@1 { - pins = "PE10"; - function = "gpio_in"; - }; - - ncsi_bt656_pins_a: ncsi_BT656@0 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23"; - function = "ncsi"; - drive-strength = <20>; - }; - - ncsi_bt656_pins_b: ncsi_BT656@1 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23"; - function = "gpio_in"; - }; - - ncsi_bt1120_pins_a: ncsi_BT1120@0 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23", - "PE6", "PE7", "PE8", "PE9", - "PE10", "PE11", "PE12", "PE15"; - function = "ncsi"; - drive-strength = <20>; - }; - - ncsi_bt1120_pins_b: ncsi_BT1120@1 { - pins = "PK12", "PK14", "PK15", - "PK16", "PK17", "PK18", "PK19", - "PK20", "PK21", "PK22", "PK23", - "PE6", "PE7", "PE8", "PE9", - "PE10", "PE11", "PE12", "PE15"; - function = "gpio_in"; - }; - - mipia_pins_a: mipia@0 { - pins = "PK0", "PK1", "PK2", - "PK3", "PK4", "PK5"; - function = "mcsia"; - drive-strength = <10>; - - }; - - mipia_pins_b: mipia@1 { - pins = "PK0", "PK1", "PK2", - "PK3", "PK4", "PK5"; - function = "gpio_in"; - }; - - mipib_pins_a: mipib@0 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "mcsib"; - drive-strength = <10>; - }; - - mipib_pins_b: mipib@1 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "gpio_in"; - - }; - - mipib_4lane_pins_a: mipib_4lane@0 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "mcsib"; - drive-strength = <10>; - }; - - mipib_4lane_pins_b: mipib_4lane@1 { - pins = "PK6", "PK7", "PK8", - "PK9", "PK10", "PK11"; - function = "gpio_in"; - }; - - mipic_pins_a: mipic@0 { - pins = "PK12", "PK13", "PK14", - "PK15", "PK16", "PK17"; - function = "mcsic"; - drive-strength = <10>; - - }; - - mipic_pins_b: mipic@1 { - pins = "PK12", "PK13", "PK14", - "PK15", "PK16", "PK17"; - function = "gpio_in"; - }; - - mipid_pins_a: mipid@0 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "mcsid"; - drive-strength = <10>; - }; - - mipid_pins_b: mipid@1 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "gpio_in"; - - }; - - mipid_4lane_pins_a: mipid_4lane@0 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "mcsid"; - drive-strength = <10>; - }; - - mipid_4lane_pins_b: mipid_4lane@1 { - pins = "PK18", "PK19", "PK20", - "PK21", "PK22", "PK23"; - function = "gpio_in"; - }; - }; - - r_pio: pinctrl@7022000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sun55iw3-r-pinctrl"; - reg = <0x0 0x07022000 0x0 0x800>; - interrupts = , - ; - clocks = <&ccu CLK_R_APBS1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - }; - - ths0: ths0@200a000 { - compatible = "allwinner,sun55iw3p1-ths0"; - reg = <0x0 0x0200a000 0x0 0x400>; - clocks = <&ccu CLK_THS>, <&ccu CLK_GPADC0_24M>; - clock-names = "bus", "sclk"; - resets = <&ccu RST_BUS_TH>; - #thermal-sensor-cells = <1>; - }; - - ths1: ths0@2009400 { - compatible = "allwinner,sun55iw3p1-ths1"; - reg = <0x0 0x02009400 0x0 0x400>; - clocks = <&ccu CLK_THS>, <&ccu CLK_GPADC1_24M>; - clock-names = "bus", "sclk"; - resets = <&ccu RST_BUS_TH>; - #thermal-sensor-cells = <1>; - }; - - uart0: uart@2500000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x02500000 0x0 0x400>; - interrupts = ; - sunxi,uart-fifosize = <64>; - clocks = <&ccu CLK_BUS_UART0>; - resets = <&ccu RST_BUS_UART0>; - uart0_port = <0>; - uart0_type = <2>; - status = "disabled"; - }; - - uart1: uart@2500400 { - compatible = "allwinner,sun55i-uart"; - device_type = "uart1"; - reg = <0x0 0x02500400 0x0 0x400>; - interrupts = ; - sunxi,uart-fifosize = <128>; - clocks = <&ccu CLK_BUS_UART1>; - clock-names = "uart1"; - resets = <&ccu RST_BUS_UART1>; - uart1_port = <1>; - uart1_type = <4>; - status = "disabled"; - }; - - uart2: uart@2500800 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2500800 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART2>; - resets = <&ccu RST_BUS_UART2>; - uart2_port = <2>; - uart2_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart3: uart@2500c00 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2500c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART3>; - resets = <&ccu RST_BUS_UART3>; - uart3_port = <3>; - uart3_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart4: uart@2501000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART4>; - resets = <&ccu RST_BUS_UART4>; - uart4_port = <4>; - uart4_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart5: uart@2501400 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501400 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART5>; - resets = <&ccu RST_BUS_UART5>; - uart5_port = <5>; - uart5_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart6: uart@2501800 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501800 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART6>; - resets = <&ccu RST_BUS_UART6>; - uart6_port = <6>; - uart6_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart7: uart@2501c00 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x2501c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_UART7>; - resets = <&ccu RST_BUS_UART7>; - uart7_port = <7>; - uart7_type = <4>; - sunxi,uart-fifosize = <128>; - status = "disabled"; - }; - - uart8: uart@7080000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x7080000 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_UART0>; - resets = <&r_ccu RST_R_UART0>; - uart8_port = <8>; - uart8_type = <2>; - sunxi,uart-fifosize = <64>; - status = "disabled"; - }; - - uart9: uart@7080400 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x7080400 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_UART1>; - resets = <&r_ccu RST_R_UART1>; - uart9_port = <9>; - uart9_type = <2>; - sunxi,uart-fifosize = <64>; - status = "disabled"; - }; - - sdc2: sdmmc@4022000 { - compatible = "allwinner,sunxi-mmc-v4p6x"; - device_type = "sdc2"; - reg = <0x0 0x04022000 0x0 0x1000>; - interrupts = ; - clocks = <&dcxo24M>, - <&ccu CLK_PLL_PERI1_800M>, - <&ccu CLK_PLL_PERI1_600M>, - <&ccu CLK_SMHC2>, - <&ccu CLK_BUS_SMHC2>; - clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; - resets = <&ccu RST_BUS_SMHC2>; - reset-names = "rst"; - pinctrl-names = "default","sleep"; - pinctrl-0 = <&sdc2_pins_a &sdc2_pins_c>; - pinctrl-1 = <&sdc2_pins_b>; - bus-width = <8>; - req-page-count = <2>; - cap-mmc-highspeed; - cap-cmd23; - mmc-cache-ctrl; - non-removable; - /*max-frequency = <200000000>;*/ - max-frequency = <50000000>; - cap-erase; - mmc-high-capacity-erase-size; - no-sdio; - no-sd; - /*-- speed mode --*/ - /*sm0: DS26_SDR12*/ - /*sm1: HSSDR52_SDR25*/ - /*sm2: HSDDR52_DDR50*/ - /*sm3: HS200_SDR104*/ - /*sm4: HS400*/ - /*-- frequency point --*/ - /*f0: CLK_400K*/ - /*f1: CLK_25M*/ - /*f2: CLK_50M*/ - /*f3: CLK_100M*/ - /*f4: CLK_150M*/ - /*f5: CLK_200M*/ - ctl-spec-caps = <0x308>; - sdc_tm4_sm0_freq0 = <0>; - sdc_tm4_sm0_freq1 = <0>; - sdc_tm4_sm1_freq0 = <0x00000000>; - sdc_tm4_sm1_freq1 = <0>; - sdc_tm4_sm2_freq0 = <0x00000000>; - sdc_tm4_sm2_freq1 = <0>; - sdc_tm4_sm3_freq0 = <0x05000000>; - sdc_tm4_sm3_freq1 = <0x00000005>; - sdc_tm4_sm4_freq0 = <0x00050000>; - sdc_tm4_sm4_freq1 = <0x00000004>; - sdc_tm4_sm4_freq0_cmd = <0>; - sdc_tm4_sm4_freq1_cmd = <0>; - - /*vmmc-supply = <®_3p3v>;*/ - /*vqmc-supply = <®_3p3v>;*/ - /*vdmc-supply = <®_3p3v>;*/ - /*vmmc = "vcc-card";*/ - /*vqmc = "";*/ - /*vdmc = "";*/ - /*sunxi-power-save-mode;*/ - }; - - nand0:nand0@4011000 { - compatible = "allwinner,sun55iw3-nand"; - device_type = "nand0"; - reg = <0x0 0x04011000 0x0 0x1000>;/* nand0 */ - interrupts = ; - clocks = <&ccu CLK_PLL_PERI1_400M>, - <&ccu CLK_NAND0_CLK0>, - <&ccu CLK_NAND0_CLK1>, - <&ccu CLK_NAND0>, - <&ccu CLK_NAND_MBUS_GATE>; - clock-names = "pll_periph", "mclk","ecc", "bus", "mbus"; - resets = <&ccu RST_BUS_NAND0>; - reset-names = "rst"; - - nand0_regulator1 = "none"; - nand0_regulator2 = "none"; - nand0_cache_level = <0x55aaaa55>; - nand0_flush_cache_num = <0x55aaaa55>; - nand0_capacity_level = <0x55aaaa55>; - nand0_id_number_ctl = <0x55aaaa55>; - nand0_print_level = <0x55aaaa55>; - nand0_p0 = <0x55aaaa55>; - nand0_p1 = <0x55aaaa55>; - nand0_p2 = <0x55aaaa55>; - nand0_p3 = <0x55aaaa55>; - chip_code = "sun50iw10"; - status = "disabled"; - boot_crc = "disabled"; - }; - - pcie: pcie@4800000 { - #address-cells = <3>; - #size-cells = <2>; - compatible = "allwinner,sunxi-pcie-v210"; - bus-range = <0x0 0xff>; - reg = <0 0x04800000 0 0x480000>; - reg-names = "dbi"; - device_type = "pci"; - ranges = <0x00000800 0 0x20000000 0x0 0x20000000 0 0x01000000 - 0x81000000 0 0x21000000 0x0 0x21000000 0 0x01000000 - 0x82000000 0 0x22000000 0x0 0x22000000 0 0x07000000>; - num-lanes = <1>; - phys = <&combophy PHY_TYPE_PCIE>; - phy-names = "pcie-phy"; - interrupts = , - , - , - , - , - , - , - , - , - ; - interrupt-names = "msi", "sii", "edma-w0", "edma-w1", "edma-w2", "edma-w3", - "edma-r0", "edma-r1", "edma-r2", "edma-r3"; - #interrupt-cells = <1>; - num-edma = <4>; - max-link-speed = <2>; - num-ib-windows = <8>; - num-ob-windows = <8>; - num-viewport = <8>; - linux,pci-domain = <0>; - //power-domains = <&pd1 A523_PCK_PCIE>; - clocks = <&ccu CLK_USB3_REF>, <&ccu CLK_PLL_PERI0_200M>, <&dcxo24M>, <&ccu CLK_PCIE_AUX>; - clock-names = "pclk_ref", "pclk_per", "hosc", "pclk_aux"; - resets = <&ccu RST_BUS_PCIE_USB3>; - reset-names = "pclk_rst"; - busno = <0>; - status = "disabled"; - }; - - sdc0: sdmmc@4020000 { - compatible = "allwinner,sunxi-mmc-v5p3x"; - device_type = "sdc0"; - reg = <0x0 0x04020000 0x0 0x1000>; - interrupts = ; - clocks = <&dcxo24M>, - <&ccu CLK_PLL_PERI1_400M>, - <&ccu CLK_PLL_PERI1_300M>, - <&ccu CLK_SMHC0>, - <&ccu CLK_BUS_SMHC0>; - clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; - resets = <&ccu RST_BUS_SMHC0>; - reset-names = "rst"; - pinctrl-names = "default","mmc_1v8","sleep","uart_jtag"; - pinctrl-0 = <&sdc0_pins_a>; - pinctrl-1 = <&sdc0_pins_b>; - pinctrl-2 = <&sdc0_pins_c>; - pinctrl-3 = <&sdc0_pins_d &sdc0_pins_e>; - max-frequency = <50000000>; - bus-width = <4>; - req-page-count = <2>; - /*non-removable;*/ - /*broken-cd;*/ - /*cd-inverted*/ - /*cd-gpios = <&pio PF 6 GPIO_ACTIVE_LOW>;*/ - /* vmmc-supply = <®_3p3v>;*/ - /* vqmc-supply = <®_3p3v>;*/ - /* vdmc-supply = <®_3p3v>;*/ - /*vmmc = "vcc-card";*/ - /*vqmc = "";*/ - /*vdmc = "";*/ - cap-sd-highspeed; - cap-wait-while-busy; - /*sd-uhs-sdr50;*/ - /*sd-uhs-ddr50;*/ - /*cap-sdio-irq;*/ - /*keep-power-in-suspend;*/ - /*ignore-pm-notify;*/ - /*sunxi-power-save-mode;*/ - /*sunxi-dly-400k = <1 0 0 0>; */ - /*sunxi-dly-26M = <1 0 0 0>;*/ - /*sunxi-dly-52M = <1 0 0 0>;*/ - /*sunxi-dly-52M-ddr4 = <1 0 0 0>;*/ - /*sunxi-dly-52M-ddr8 = <1 0 0 0>;*/ - /*sunxi-dly-104M = <1 0 0 0>;*/ - /*sunxi-dly-208M = <1 0 0 0>;*/ - /*sunxi-dly-104M-ddr = <1 0 0 0>;*/ - /*sunxi-dly-208M-ddr = <1 0 0 0>;*/ - ctl-spec-caps = <0x408>; - status = "okay"; - }; - - sdc1: sdmmc@4021000 { - compatible = "allwinner,sunxi-mmc-v5p3x"; - device_type = "sdc1"; - reg = <0x0 0x04021000 0x0 0x1000>; - interrupts = ; - clocks = <&dcxo24M>, - <&ccu CLK_PLL_PERI1_400M>, - <&ccu CLK_PLL_PERI1_300M>, - <&ccu CLK_SMHC1>, - <&ccu CLK_BUS_SMHC1>; - clock-names = "osc24m","pll_periph","pll_periph_2","mmc","ahb"; - resets = <&ccu RST_BUS_SMHC1>; - reset-names = "rst"; - pinctrl-names = "default","sleep"; - pinctrl-0 = <&sdc1_pins_a>; - pinctrl-1 = <&sdc1_pins_b>; - max-frequency = <50000000>; - bus-width = <4>; - /*broken-cd;*/ - /*cd-inverted*/ - /*cd-gpios = <&pio PG 6 6 1 2 0>;*/ - /* vmmc-supply = <®_3p3v>;*/ - /* vqmc-supply = <®_3p3v>;*/ - /* vdmc-supply = <®_3p3v>;*/ - /*vmmc = "vcc-card";*/ - /*vqmc = "";*/ - /*vdmc = "";*/ - cap-sd-highspeed; - cap-sdio-irq; - ignore-pm-notify; - /*sd-uhs-sdr50;*/ - /*sd-uhs-ddr50;*/ - /*sd-uhs-sdr104;*/ - /*cap-sdio-irq;*/ - keep-power-in-suspend; - /*ignore-pm-notify;*/ - /*sunxi-power-save-mode;*/ - /*sunxi-dly-400k = <1 0 0 0 0>; */ - /*sunxi-dly-26M = <1 0 0 0 0>;*/ - /*sunxi-dly-52M = <1 0 0 0 0>;*/ - sunxi-dly-52M-ddr4 = <1 0 0 0 2>; - /*sunxi-dly-52M-ddr8 = <1 0 0 0 0>;*/ - sunxi-dly-104M = <1 0 0 0 1>; - /*sunxi-dly-208M = <1 1 0 0 0>;*/ - sunxi-dly-208M = <1 0 0 0 1>; - /*sunxi-dly-104M-ddr = <1 0 0 0 0>;*/ - /*sunxi-dly-208M-ddr = <1 0 0 0 0>;*/ - ctl-spec-caps = <0x8>; - status = "okay"; - }; - - dma:dma-controller@3002000 { - compatible = "allwinner,dma-v100"; - reg = <0x0 0x03002000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_DMA>, <&ccu CLK_DMA_MBUS_GATE>; - clock-names = "bus", "mbus"; - dma-channels = <16>; - dma-requests = <54>; - resets = <&ccu RST_BUS_DMA>; - #dma-cells = <1>; - status = "okay"; - }; - - dma1:dma1-controller@7121000 { - compatible = "allwinner,dma-v104"; - reg = <0x0 0x7121000 0x0 0x1000>; - interrupts = ; - clocks = <&mcu_ccu CLK_BUS_MCU_DMA>, <&mcu_ccu CLK_BUS_MCU_DMA_MBUS>, <&mcu_ccu CLK_BUS_MCU_MBUS>; - clock-names = "bus", "mbus", "mcu-mbus"; - dma-channels = <8>; - dma-requests = <15>; - resets = <&mcu_ccu RST_BUS_MCU_DMA>; - #dma-cells = <1>; - status = "okay"; - }; - npu: npu@7122000 { - compatible = "allwinner,npu"; - reg = <0x0 0x07122000 0x0 0x1000>; - device_type = "npu"; - dev_name = "npu"; - interrupts = ; - clocks = <&ccu CLK_NPU>, <&ccu CLK_PLL_NPU_2X>, <&mcu_ccu CLK_BUS_MCU_NPU_ACLK>, <&mcu_ccu CLK_BUS_MCU_NPU_HCLK>; - clock-names = "clk_npu", "clk_parent", "npu-aclk", "npu-hclk"; - clock-frequency = <600000000>; - resets = <&mcu_ccu RST_BUS_MCU_NPU>; - interrupt-names = "npu"; - status = "okay"; - /*power-domains = <&pd A523_PD_NPU>;*/ - }; - - twi0: twi0@2502000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi0"; - reg = <0x0 0x02502000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI0>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI0>; - dmas = <&dma 43>, <&dma 43>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi1: twi1@2502400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi1"; - reg = <0x0 0x02502400 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI1>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI1>; - dmas = <&dma 44>, <&dma 44>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi2: twi2@2502800 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi2"; - reg = <0x0 0x02502800 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI2>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI2>; - dmas = <&dma 45>, <&dma 45>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi3: twi3@2502c00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi3"; - reg = <0x0 0x02502c00 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI3>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI3>; - dmas = <&dma 46>, <&dma 46>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi4: twi4@2503000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi4"; - reg = <0x0 0x02503000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI4>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI4>; - dmas = <&dma 47>, <&dma 47>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi5: twi5@2503400{ - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi5"; - reg = <0x0 0x02503400 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_TWI5>; - clock-names = "bus"; - resets = <&ccu RST_BUS_TWI5>; - dmas = <&dma 48>, <&dma 48>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi6: s_twi0@7081400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi6"; - reg = <0x0 0x07081400 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_TWI0>; - clock-names = "bus"; - resets = <&r_ccu RST_R_TWI0>; - dmas = <&dma1 9>, <&dma1 9>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi7: s_twi1@7081800 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi7"; - reg = <0x0 0x07081800 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_TWI1>; - clock-names = "bus"; - resets = <&r_ccu RST_R_TWI1>; - dmas = <&dma1 10>, <&dma1 10>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - twi8: s_twi2@7081c00 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-twi-v101"; - device_type = "twi8"; - reg = <0x0 0x07081C00 0x0 0x400>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_TWI2>; - clock-names = "bus"; - resets = <&r_ccu RST_R_TWI2>; - status = "disabled"; - }; - - spi0: spi@4025000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.3"; - device_type = "spi0"; - reg = <0x0 0x04025000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI0>, <&ccu CLK_BUS_SPI0>; - clock-names = "pll", "mod", "bus"; - resets = <&ccu RST_BUS_SPI0>; - dmas = <&dma 22>, <&dma 22>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi1: spi@4026000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.4"; - device_type = "spi1"; - reg = <0x0 0x04026000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI1>, <&ccu CLK_BUS_SPI1>; - clock-names = "pll", "mod", "bus"; - resets = <&ccu RST_BUS_SPI1>; - dmas = <&dma 23>, <&dma 23>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spi2: spi@4027000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.3"; - device_type = "spi2"; - reg = <0x0 0x04027000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&ccu CLK_SPI2>, <&ccu CLK_BUS_SPI2>; - clock-names = "pll", "mod", "bus"; - resets = <&ccu RST_BUS_SPI2>; - dmas = <&dma 24>, <&dma 24>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - spif0: spif@47f0000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sun55i-spif"; - device_type = "spif"; - reg = <0x0 0x047f0000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_400M>, <&ccu CLK_SPIF>, <&ccu CLK_BUS_SPIF>; - clock-names = "pclk", "mclk", "bus"; - resets = <&ccu RST_BUS_SPIF>; - status = "disabled"; - }; - - r_spi0: spi@7092000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-spi-v1.3"; - device_type = "r_spi0"; - reg = <0x0 0x07092000 0x0 0x1000>; - interrupts = ; - clocks = <&ccu CLK_PLL_PERI0_300M>, <&r_ccu CLK_R_SPI>, <&r_ccu CLK_BUS_R_SPI>; - clock-names = "pll", "mod", "bus"; - resets = <&r_ccu RST_R_SPI>; - dmas = <&dma1 13>, <&dma1 13>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - hwspinlock: hwspinlock@3005000 { - compatible = "allwinner,sunxi-hwspinlock"; - reg = <0x0 0x3005000 0x0 0x1000>; - #hwlock-cells = <1>; - clocks = <&ccu CLK_SPINLOCK>; - clock-names = "clk_hwspinlock_bus"; - resets = <&ccu RST_BUS_SPINLOCK>; - reset-names = "rst"; - num-locks = <32>; - status = "okay"; - }; - - nsi0: nsi-controller@2020000 { - compatible = "allwinner,sun55i-nsi"; - interrupts = ; - reg = <0x0 0x02020000 0x0 0x10000>, - <0x0 0x02071000 0x0 0x400>; - clocks = <&ccu CLK_PLL_DDR>, <&ccu CLK_MBUS>; - clock-names = "pll", "bus"; - resets = <&ccu RST_MBUS>; - clock-frequency = <462000000>; - #nsi-cells = <1>; - - npu{ - id = <5>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - isp{ - id = <6>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - iommu{ - id = <10>; - mode = <0>; - pri = <3>; - select = <1>; - }; - - ve_r{ - id = <11>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - ve_rw{ - id = <12>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - de{ - id = <13>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - csi{ - id = <14>; - mode = <0>; - pri = <2>; - select = <1>; - }; - - }; - - npd0: npd@2070000 { - compatible = "allwinner,sun55i-npd"; - status = "okay"; - }; - - cryptoengine: ce@3040000 { - compatible = "allwinner,sunxi-ce"; - device_name = "ce"; - reg = <0x0 0x03040000 0x0 0xa0>, /* non-secure space */ - <0x0 0x03040800 0x0 0xa0>; /* secure space */ - interrupts = , /*non-secure*/ - ; /* secure*/ - clock-frequency = <400000000>; /* 400MHz */ - clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, <&ccu CLK_CE_MBUS_GATE>, <&ccu CLK_PLL_PERI0_400M>; - clock-names = "bus_ce", "ce_clk", "mbus_ce", "clk_src"; - resets = <&ccu RST_BUS_CE>; - status = "okay"; - }; - - pwm0: pwm0@2000c00 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v201"; - reg = <0x0 0x02000c00 0x0 0x3ff>; - interrupts = ; - clocks = <&ccu CLK_PWM>; - resets = <&ccu RST_BUS_PWM>; - pwm-number = <16>; - pwm-base = <0x0>; - sunxi-pwms = <&pwm0_0>, <&pwm0_1>, <&pwm0_2>, <&pwm0_3>, <&pwm0_4>, - <&pwm0_5>, <&pwm0_6>, <&pwm0_7>, <&pwm0_8>, <&pwm0_9>, - <&pwm0_10>, <&pwm0_11>, <&pwm0_12>, <&pwm0_13>, - <&pwm0_14>, <&pwm0_15>; - status = "disabled"; - }; - - pwm0_0: pwm0_0@2000c10 { - compatible = "allwinner,sunxi-pwm0"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c10 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_1: pwm0_1@2000c11 { - compatible = "allwinner,sunxi-pwm1"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c11 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_2: pwm0_2@2000c12 { - compatible = "allwinner,sunxi-pwm2"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c12 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_3: pwm0_3@2000c13 { - compatible = "allwinner,sunxi-pwm3"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c13 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_4: pwm0_4@2000c14 { - compatible = "allwinner,sunxi-pwm4"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c14 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_5: pwm0_5@2000c15 { - compatible = "allwinner,sunxi-pwm5"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c15 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_6: pwm0_6@2000c16 { - compatible = "allwinner,sunxi-pwm6"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c16 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_7: pwm0_7@2000c17 { - compatible = "allwinner,sunxi-pwm7"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c17 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_8: pwm0_8@2000c18 { - compatible = "allwinner,sunxi-pwm8"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c18 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_9: pwm0_9@2000c19 { - compatible = "allwinner,sunxi-pwm9"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c19 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_10: pwm0_10@2000c1a { - compatible = "allwinner,sunxi-pwm10"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1a 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_11: pwm0_11@2000c1b { - compatible = "allwinner,sunxi-pwm11"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1b 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_12: pwm0_12@2000c1c { - compatible = "allwinner,sunxi-pwm12"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1c 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_13: pwm0_13@2000c1d { - compatible = "allwinner,sunxi-pwm13"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1d 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_14: pwm0_14@2000c1e { - compatible = "allwinner,sunxi-pwm14"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1e 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm0_15: pwm0_15@2000c1f { - compatible = "allwinner,sunxi-pwm15"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02000c1f 0x0 0x4>; - reg_base = <0x02000c00>; - status = "disabled"; - }; - - pwm1: pwm1@2051000 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v201"; - reg = <0x0 0x02051000 0x0 0x3ff>; - interrupts = ; - clocks = <&ccu CLK_PWM1>; - resets = <&ccu RST_BUS_PWM1>; - pwm-number = <4>; - pwm-base = <0x10>; - sunxi-pwms = <&pwm1_0>, <&pwm1_1>, <&pwm1_2>, <&pwm1_3>; - status = "disabled"; - }; - - pwm1_0: pwm1_0@2051010 { - compatible = "allwinner,sunxi-pwm16"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051010 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - pwm1_1: pwm1_1@2051011 { - compatible = "allwinner,sunxi-pwm17"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051011 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - pwm1_2: pwm1_2@2051012 { - compatible = "allwinner,sunxi-pwm18"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051012 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - pwm1_3: pwm1_3@2051013 { - compatible = "allwinner,sunxi-pwm19"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x02051013 0x0 0x4>; - reg_base = <0x02051000>; - status = "disabled"; - }; - - s_pwm0: s_pwm0@7020c00 { - #pwm-cells = <0x3>; - compatible = "allwinner,sunxi-pwm-v201"; - reg = <0x0 0x07020c00 0x0 0x3ff>; - interrupts = ; - clocks = <&r_ccu CLK_R_PWM>; - resets = <&r_ccu RST_R_PWM>; - pwm-number = <2>; - pwm-base = <0x20>; - sunxi-pwms = <&s_pwm0_0>, <&s_pwm0_1>; - status = "disabled"; - }; - - s_pwm0_0: s_pwm0_0@7020c10 { - compatible = "allwinner,sunxi-pwm20"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07020c10 0x0 0x4>; - reg_base = <0x07020c00>; - status = "disabled"; - }; - - s_pwm0_1: s_pwm0_1@7020c11 { - compatible = "allwinner,sunxi-pwm21"; - pinctrl-names = "active", "sleep"; - reg = <0x0 0x07020c11 0x0 0x4>; - reg_base = <0x07020c00>; - status = "disabled"; - }; - - rtc: rtc@7090000 { - compatible = "allwinner,rtc-v201"; - device_type = "rtc"; - wakeup-source; - reg = <0x0 0x07090000 0x0 0x320>; - interrupts = ; - clocks = <&r_ccu CLK_BUS_R_RTC>, <&rtc_ccu CLK_RTC_1K>, <&rtc_ccu CLK_RTC_SPI>; - clock-names = "r-ahb-rtc", "rtc-1k", "rtc-spi"; - resets = <&r_ccu RST_R_RTC>; - gpr_cur_pos = <6>; - gpr_bootcount_pos = <7>; - }; - - /* - * channel0~3 : arm -> cpus - * channel4~7 : arm -> dsp - * channel8~11 : arm -> rv - */ - msgbox: msgbox@3003000 { - compatible = "allwinner,sun55iw3-msgbox"; - #mbox-cells = <1>; - reg = <0x0 0x03003000 0x0 0x1000>, - <0x0 0x07120000 0x0 0x1000>, - <0x0 0x07094000 0x0 0x1000>, - <0x0 0x07136000 0x0 0x1000>; - interrupts = , - , - , - ; - clocks = <&ccu CLK_MSGBOX0>; - clock-names = "msgbox"; - resets = <&ccu RST_BUS_MSGBOX0>; - reset-names = "rst"; - local_id = <0>; - status = "okay"; - }; - - dump_reg:dump_reg@40000 { - compatible = "allwinner,sunxi-dump-reg"; - reg = <0x0 0x00040000 0x0 0x0004>; - }; - - usbc0: usbc0@10 { - device_type = "usbc0"; - compatible = "allwinner,sunxi-otg-manager"; - reg = <0x0 0x10 0x0 0x1000>; - usb_port_type = <2>; - usb_detect_type = <1>; - usb_detect_mode = <0>; - usb_id_gpio; - usb_det_vbus_gpio; - usb_regulator_io = "nocare"; - usb_wakeup_suspend = <0>; - usb_luns = <3>; - usb_serial_unique = <0>; - usb_serial_number = "20080411"; - rndis_wceis = <1>; - status = "disabled"; - }; - - udc:udc-controller@4100000 { - compatible = "allwinner,sunxi-udc"; - reg = <0x0 0x04100000 0x0 0x1000>, /*udc base*/ - <0x0 0x00000000 0x0 0x100>; /*sram base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOTG0>; - clock-names = "hosc", "bus_otg"; - resets = <&ccu RST_USB_OTG0>, <&ccu RST_USB_PHY0_RSTN>; - reset-names = "otg", "phy"; - status = "disabled"; - }; - - ehci0:ehci0-controller@4101000 { - compatible = "allwinner,sunxi-ehci0"; - reg = <0x0 0x04101000 0x0 0xFFF>, /*hci0 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBEHCI0>; - clock-names = "hosc", "bus_hci"; - resets = <&ccu RST_USB_EHCI0>, <&ccu RST_USB_PHY0_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <0>; - status = "disabled"; - }; - - ohci0:ohci0-controller@4101400 { - compatible = "allwinner,sunxi-ohci0"; - reg = <0x0 0x04101400 0x0 0xFFF>, /*hci0 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOHCI0>, <&ccu CLK_USB0>; - clock-names = "hosc", "bus_hci", "ohci"; - resets = <&ccu RST_USB_OHCI0>, <&ccu RST_USB_PHY0_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <0>; - status = "disabled"; - }; - - usbc1: usbc1@11 { - device_type = "usbc1"; - reg = <0x0 0x11 0x0 0x1000>; - usb_regulator_io = "nocare"; - usb_wakeup_suspend = <0>; - status = "disabled"; - }; - - ehci1: ehci1-controller@4200000 { - compatible = "allwinner,sunxi-ehci1"; - reg = <0x0 0x04200000 0x0 0xFFF>, /*ehci1 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBEHCI1>; - clock-names = "hosc", "bus_hci"; - resets = <&ccu RST_USB_EHCI1>, <&ccu RST_USB_PHY1_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <1>; - status = "disabled"; - }; - - ohci1: ohci1-controller@4200400 { - compatible = "allwinner,sunxi-ohci1"; - reg = <0x0 0x04200400 0x0 0xFFF>, /*ohci1 base*/ - <0x0 0x00000000 0x0 0x100>, /*sram base*/ - <0x0 0x04100000 0x0 0x1000>; /*otg base*/ - interrupts = ; - clocks = <&ccu CLK_USB_24M>, <&ccu CLK_USBOHCI1>, <&ccu CLK_USB1>; - clock-names = "hosc", "bus_hci", "ohci"; - resets = <&ccu RST_USB_OHCI1>, <&ccu RST_USB_PHY1_RSTN>; - reset-names = "hci", "phy"; - hci_ctrl_no = <1>; - status = "disabled"; - }; - - usbc2:usbc2@12 { - device_type = "usbc2"; - compatible = "allwinner,sunxi-plat-dwc3"; - reg = <0x0 0x12 0x0 0x1000>; - clocks = <&ccu CLK_USB3_MBUS_GATE>, <&ccu CLK_USB3_REF>, - <&ccu CLK_USB2_REF>, <&ccu CLK_USB3_SUSPEND>; - clock-names = "bus_clk", "ref_clk3", "ref_clk2", "suspend"; - // power-domains = <&pd1 A523_PCK_PCIE>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - aw,hcgen2-phygen1-quirk; - status = "disabled"; - - xhci2: xhci2-controller@4d00000 { - compatible = "snps,dwc3"; - reg = <0x0 0x04d00000 0x0 0x100000>; - interrupts = ; - dr_mode = "otg"; // dr_mode option: host, peripheral, otg - maximum-speed = "super-speed"; - phy_type = "utmi"; - snps,dis_enblslpm_quirk; - snps,dis-u1-entry-quirk; - snps,dis-u2-entry-quirk; - snps,dis_u3_susphy_quirk; - snps,dis_u2_susphy_quirk; - phys = <&u2phy>, <&combophy PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - status = "disabled"; - }; - }; - - u2phy: phy@4e00000 { - compatible = "allwinner,sunxi-plat-phy"; - reg = <0x0 0x04e00000 0x0 0x800>; /* Application Registers */ - #phy-cells = <0>; - status = "disabled"; - }; - - combophy: phy@4f00000 { - compatible = "allwinner,inno-combphy"; - reg = <0x0 0x04f00000 0x0 0x80000>, /* Sub-System Application Registers */ - <0x0 0x04f80000 0x0 0x80000>; /* Combo INNO PHY Registers */ - reg-names = "phy-ctl", "phy-clk"; - phy_refclk_sel = <0>; /* 0:internal clk; 1:external clk */ - #phy-cells = <1>; - status = "disabled"; - }; - - disp: disp@5000000 { - compatible = "allwinner,sunxi-disp"; - reg = <0x0 0x05000000 0x0 0x400000>, /*de*/ - <0x0 0x05500000 0x0 0x1000>, /* display_if_top */ - <0x0 0x05501000 0x0 0x1000>, /* tcon0 - tcon_lcd0 */ - <0x0 0x05502000 0x0 0x1000>, /* tcon1 - tcon_lcd1 */ - <0x0 0x05503000 0x0 0x1000>, /* tcon2 - tcon_tv0 */ - <0x0 0x05504000 0x0 0x1000>, /* tcon3 - tcon_tv1 */ - <0x0 0x05731000 0x0 0x1000>, /* tcon4 - tcon_lcd2 */ - <0x0 0x05506000 0x0 0x1fff>, /* dsi0 */ - <0x0 0x05508000 0x0 0x1fff>; /* dsi1 */ - interrupts = , /* DE */ - , /* tcon_lcd0 */ - , /* tcon_lcd1 */ - , /* tcon_tv0 */ - , /* tcon_tv1 */ - , /* tcon_lcd2 */ - , /* dsi0 */ - ; /* dsi1 */ - clocks = <&ccu CLK_DE>, - <&ccu CLK_DE>, - <&ccu CLK_DE0>, - <&ccu CLK_DE0>, - <&ccu CLK_VO0_TCONLCD0>, - <&ccu CLK_VO0_TCONLCD1>, - <&ccu CLK_TCONTV>, - <&ccu CLK_TCONTV1>, - <&ccu CLK_VO1_TCONLCD0>, - <&ccu CLK_BUS_VO0_TCONLCD0>, - <&ccu CLK_BUS_VO0_TCONLCD1>, - <&ccu CLK_BUS_TCONTV>, - <&ccu CLK_BUS_TCONTV1>, - <&ccu CLK_BUS_VO1_TCONLCD0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP0>, - <&ccu CLK_DPSS_TOP1>, - <&ccu CLK_DSI0>, - <&ccu CLK_DSI1>, - <&ccu CLK_BUS_DSI0>, - <&ccu CLK_BUS_DSI1>, - <&ccu CLK_COMBPHY0>, - <&ccu CLK_COMBPHY1>; - clock-names = "clk_de0", - "clk_de1", - "clk_bus_de0", - "clk_bus_de1", - "clk_tcon0", - "clk_tcon1", - "clk_tcon2", - "clk_tcon3", - "clk_tcon4", - "clk_bus_tcon0", - "clk_bus_tcon1", - "clk_bus_tcon2", - "clk_bus_tcon3", - "clk_bus_tcon4", - "clk_bus_dpss_top0", - "clk_bus_dpss_top1", - "clk_bus_dpss_top2", - "clk_bus_dpss_top3", - "clk_bus_dpss_top4", - "clk_mipi_dsi0", - "clk_mipi_dsi1", - "clk_bus_mipi_dsi0", - "clk_bus_mipi_dsi1", - "clk_mipi_dsi_combphy0", - "clk_mipi_dsi_combphy1"; - resets = <&ccu RST_BUS_DE0>, - <&ccu RST_BUS_DE0>, - <&ccu RST_BUS_VO0_TCONLCD0>, - <&ccu RST_BUS_VO0_TCONLCD1>, - <&ccu RST_BUS_TCONTV>, - <&ccu RST_BUS_TCONTV1>, - <&ccu RST_BUS_VO1_TCONLCD0>, - <&ccu RST_BUS_LVDS0>, - <&ccu RST_BUS_LVDS1>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP0>, - <&ccu RST_BUS_DPSS_TOP1>, - <&ccu RST_BUS_DSI0>, - <&ccu RST_BUS_DSI1>; - reset-names = "rst_bus_de0", - "rst_bus_de1", - "rst_bus_tcon0", - "rst_bus_tcon1", - "rst_bus_tcon2", - "rst_bus_tcon3", - "rst_bus_tcon4", - "rst_bus_lvds0", - "rst_bus_lvds1", - "rst_bus_dpss_top0", - "rst_bus_dpss_top1", - "rst_bus_dpss_top2", - "rst_bus_dpss_top3", - "rst_bus_dpss_top4", - "rst_bus_mipi_dsi0", - "rst_bus_mipi_dsi1"; - assigned-clocks = <&ccu CLK_DE>, - <&ccu CLK_VO0_TCONLCD0>, - <&ccu CLK_VO0_TCONLCD1>, - <&ccu CLK_VO1_TCONLCD0>, - <&ccu CLK_BUS_TCONTV>, - <&ccu CLK_DSI0>, - <&ccu CLK_DSI1>, - <&ccu CLK_COMBPHY0>, - <&ccu CLK_COMBPHY1>; - assigned-clock-parents = <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_PERI0_150M>, - <&ccu CLK_PLL_PERI0_150M>, - <&ccu CLK_PLL_VIDEO0_4X>, - <&ccu CLK_PLL_VIDEO0_4X>; - assigned-clock-rates = <600000000>; - iommus = <&mmu_aw 5 0>; - - boot_disp = <0>; - fb_base = <0>; - }; - - edp0: edp0@5720000 { - compatible = "allwinner,sunxi-edp0"; - reg = <0x0 0x05720000 0x0 0x4000>; - interrupts = ; - clocks = <&ccu CLK_BUS_EDP>, - <&ccu CLK_EDP>, - <&ccu CLK_HDMI_24M>; - clock-names = "clk_bus_edp", "clk_edp", "edp_clk_24m"; - resets = <&ccu RST_BUS_EDP>; - reset-names = "rst_bus_edp"; - - status = "disabled"; - }; - - lcd0: lcd0@1c0c000 { - compatible = "allwinner,sunxi-lcd0"; - /* Fake registers to avoid dtc compiling warnings */ - reg = <0x0 0x1c0c000 0x0 0x0>; - pinctrl-names = "active","sleep"; - }; - - lcd1: lcd1@1c0c000 { - compatible = "allwinner,sunxi-lcd1"; - /* Fake registers to avoid dtc compiling warnings */ - reg = <0x0 0x1c0c000 0x0 0x0>; - pinctrl-names = "active","sleep"; - }; - - lcd2: lcd2@1c0c000 { - compatible = "allwinner,sunxi-lcd2"; - /* Fake registers to avoid dtc compiling warnings */ - reg = <0x0 0x1c0c000 0x0 0x0>; - pinctrl-names = "active","sleep"; - }; - /* audio dirver module -> audio codec */ - codec:codec@7110000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-codec"; - reg = <0x0 0x07110000 0x0 0x348>; - resets = <&mcu_ccu RST_BUS_MCU_AUDIO_CODEC>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_AUDIO_CODEC>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_AUDIO_CODEC_DAC>, - <&mcu_ccu CLK_MCU_AUDIO_CODEC_ADC>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_audio", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_audio_dac", - "clk_audio_adc"; - interrupts = ; - status = "disabled"; - }; - - codec_plat:codec_plat { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-aaudio"; - dac-txdata = <0x07110020>; - adc-txdata = <0x07110040>; - dmas = <&dma1 7>, <&dma1 7>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - codec_mach:codec_mach { - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "audiocodec"; - soundcard-mach,pin-switches = "MIC1", "MIC2", "MIC3", - "LINEOUTL", "LINEOUTR", - "HPOUT", "SPK"; - soundcard-mach,routing = "MIC1P_PIN", "MIC1", - "MIC1N_PIN", "MIC1", - "MIC2P_PIN", "MIC2", - "MIC2N_PIN", "MIC2", - "MIC3P_PIN", "MIC3", - "MIC3N_PIN", "MIC3", - "LINEOUTL", "LINEOUTLP_PIN", - "LINEOUTL", "LINEOUTLN_PIN", - "LINEOUTR", "LINEOUTRP_PIN", - "LINEOUTR", "LINEOUTRN_PIN", - "SPK", "LINEOUTLP_PIN", - "SPK", "LINEOUTLN_PIN", - "SPK", "LINEOUTRP_PIN", - "SPK", "LINEOUTRN_PIN", - "HPOUT", "HPOUTL_PIN", - "HPOUT", "HPOUTR_PIN"; - soundcard-mach,jack-support = <1>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&codec_plat>; - }; - soundcard-mach,codec { - sound-dai = <&codec>; - soundcard-mach,pll-fs = <1>; - }; - }; - - hdmi_codec:hdmi_codec { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-codec-hdmi"; - status = "disabled"; - }; - - /* audio dirver module -> owa */ - owa_plat:owa_plat@7116000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-owa"; - reg = <0x0 0x07116000 0x0 0x58>; - resets = <&mcu_ccu RST_BUS_MCU_OWA>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_OWA>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&ccu CLK_PLL_PERI0_300M>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_OWA_TX>, - <&mcu_ccu CLK_MCU_OWA_RX>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_owa", - "clk_pll_audio0_4x", - "clk_pll_peri0_300", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_owa_tx", - "clk_owa_rx"; - dmas = <&dma1 2>, <&dma1 2>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - owa_mach:owa_mach { - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndowa"; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&owa_plat>; - }; - soundcard-mach,codec { - }; - }; - - /* audio dirver module -> dmic */ - dmic_plat:dmic_plat@7111000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-dmic"; - reg = <0x0 0x07111000 0x0 0x50>; - resets = <&mcu_ccu RST_BUS_MCU_DMIC>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_DMIC>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_DMIC>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_dmic", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_dmic"; - dmas = <&dma1 8>; - dma-names = "rx"; - capture-cma = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - dmic_mach:dmic_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "snddmic"; - soundcard-mach,capture-only; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&dmic_plat>; - }; - soundcard-mach,codec { - }; - }; - - /* audio dirver module -> I2S/PCM */ - i2s0_plat:i2s0_plat@7112000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07112000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S0>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S0>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S0>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s"; - dmas = <&dma1 3>, <&dma1 3>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s0_mach:i2s0_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndi2s0"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s0_plat>; - }; - soundcard-mach,codec { - }; - }; - - i2s1_plat:i2s1_plat@7113000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07113000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S1>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S1>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S1>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s"; - dmas = <&dma1 4>, <&dma1 4>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s1_mach:i2s1_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndi2s1"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s1_plat>; - }; - soundcard-mach,codec { - }; - }; - - i2s2_plat:i2s2_plat@7114000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07114000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S2>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S2>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S2>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s"; - dmas = <&dma1 5>, <&dma1 5>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s2_mach:i2s2_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndhdmi"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s2_plat>; - }; - soundcard-mach,codec { - }; - }; - - i2s3_plat:i2s3_plat@7115000 { - #sound-dai-cells = <0>; - compatible = "allwinner,sunxi-snd-plat-i2s"; - reg = <0x0 0x07115000 0x0 0xA0>; - resets = <&mcu_ccu RST_BUS_MCU_I2S3>; - clocks = <&ccu CLK_PLL_PERI0_2X>, - <&ccu CLK_DSP>, - <&mcu_ccu CLK_DSP_DSP>, - <&mcu_ccu CLK_BUS_MCU_I2S3>, - <&ccu CLK_PLL_AUDIO0_4X>, - <&ccu CLK_PLL_PERI0_300M>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV2>, - <&mcu_ccu CLK_PLL_MCU_AUDIO1_DIV5>, - <&mcu_ccu CLK_MCU_I2S3_ASRC>, - <&mcu_ccu CLK_MCU_I2S3>; - clock-names = "clk_pll_peri0_2x", - "clk_dsp_src", - "clk_dsp_core", - "clk_bus_i2s", - "clk_pll_audio0_4x", - "clk_pll_peri0_300", - "clk_pll_audio1_div2", - "clk_pll_audio1_div5", - "clk_i2s_asrc", - "clk_i2s"; - dmas = <&dma1 6>, <&dma1 6>; - dma-names = "tx", "rx"; - playback-cma = <128>; - capture-cma = <128>; - tx-fifo-size = <128>; - rx-fifo-size = <128>; - status = "disabled"; - }; - - i2s3_mach:i2s3_mach{ - compatible = "allwinner,sunxi-snd-mach"; - soundcard-mach,name = "sndi2s3"; - soundcard-mach,format = "i2s"; - soundcard-mach,slot-num = <2>; - soundcard-mach,slot-width = <32>; - status = "disabled"; - soundcard-mach,cpu { - sound-dai = <&i2s3_plat>; - }; - soundcard-mach,codec { - }; - }; - - sid@3006000 { - compatible = "allwinner,sun55iw3p1-sid", "allwinner,sunxi-sid"; - reg = <0x0 0x03006000 0 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - non-secure-maxoffset = <0x80>; - non-secure-maxlen = <0x20>; - - secure_status { - reg = <0x0 0>; - offset = <0xa0>; - size = <0x4>; - }; - - chipid { - reg = <0x0 0>; - offset = <0x200>; - size = <0x10>; - }; - - rotpk { - reg = <0x0 0>; - offset = <0x140>; - size = <0x20>; - }; - }; - - sram_ctrl: sram_ctrl@3000000 { - compatible = "allwinner,sram_ctrl"; - reg = <0x0 0x03000000 0 0x184>; - soc_ver { - offset = <0x24>; - mask = <0x7>; - shift = <0>; - ver_a = <0x0>; - ver_b = <0x1>; - ver_c = <0x2>; - }; - - soc_id { - offset = <0x200>; - mask = <0x1>; - shift = <22>; - }; - - soc_bin { - offset = <0x0>; - mask = <0x3ff>; - shift = <0x0>; - }; - - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - di:deinterlace@5400000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "allwinner,sunxi-deinterlace"; - reg = <0x0 0x05400000 0x0 0x040000>; - interrupts = ; - iommus = <&mmu_aw 6 1>; - //power-domains = <&pd1 A523_PCK_VO0>; - status = "okay"; - - clocks = <&ccu CLK_DI>, <&ccu CLK_BUS_DI>, <&ccu CLK_PLL_VIDEO0_4X>; - clock-names = "clk_di", "clk_bus_di", "clk_di_parent"; - clock-frequency = <300000000>; - - resets = <&ccu RST_BUS_DI>; - reset-names = "rst_bus_di"; - }; - - gpu:gpu@1800000 { - device_type = "gpu"; - compatible = "arm,mali-valhall"; - reg = <0x0 0x01800000 0x0 0x10000>; - interrupts = , - , - ; - interrupt-names = "JOB", "MMU", "GPU"; - clocks = <&ccu CLK_PLL_GPU>, <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>; - clock-names = "clk_parent", "clk_mali", "clk_bus"; - resets = <&ccu RST_BUS_GPU>; - /*power-domains = <&pd1 A523_PCK_GPU>;*/ - }; - - vind0: vind@5800800 { - compatible = "allwinner,sunxi-vin-media", "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - device_id = <0>; - csi_top = <336000000>; - csi_isp = <327000000>; - reg = <0x0 0x05800800 0x0 0x200>, - <0x0 0x05800000 0x0 0x800>, - <0x0 0x05810000 0x0 0x100>; - interrupts = ; - clocks = <&ccu CLK_CSI>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER0>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER1>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER2>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_CSI_MASTER3>, <&dcxo24M>, <&ccu CLK_PLL_VIDEO3_4X>, - <&ccu CLK_ISP>, <&ccu CLK_PLL_VIDEO2_4X>, - <&ccu CLK_BUS_CSI>, <&ccu CLK_CSI_MBUS_GATE>, <&ccu CLK_ISP_MBUS_GATE>; - clock-names = "csi_top", "csi_top_src", - "csi_mclk0", "csi_mclk0_24m", "csi_mclk0_pll", - "csi_mclk1", "csi_mclk1_24m", "csi_mclk1_pll", - "csi_mclk2", "csi_mclk2_24m", "csi_mclk2_pll", - "csi_mclk3", "csi_mclk3_24m", "csi_mclk3_pll", - "csi_isp", "csi_isp_src", - "csi_bus", "csi_mbus", "csi_isp_mbus"; - resets = <&ccu RST_BUS_CSI>, <&ccu RST_BUS_ISP>; - reset-names = "csi_ret", "isp_ret"; - pinctrl-names = "mclk0-default", "mclk0-sleep", "mclk1-default", "mclk1-sleep", - "mclk2-default", "mclk2-sleep", "mclk3-default", "mclk3-sleep"; - pinctrl-0 = <&csi_mclk0_pins_a>; - pinctrl-1 = <&csi_mclk0_pins_b>; - pinctrl-2 = <&csi_mclk1_pins_a>; - pinctrl-3 = <&csi_mclk1_pins_b>; - pinctrl-4 = <&csi_mclk2_pins_a>; - pinctrl-5 = <&csi_mclk2_pins_b>; - pinctrl-6 = <&csi_mclk3_pins_a>; - pinctrl-7 = <&csi_mclk3_pins_b>; - //power-domains = <&pd1 A523_PCK_VI>; - status = "okay"; - - csi0: csi@5820000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05820000 0x0 0x1000>; - interrupts = ; - device_id = <0>; - status = "okay"; - }; - csi1: csi@5821000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05821000 0x0 0x1000>; - interrupts = ; - device_id = <1>; - status = "okay"; - }; - csi2: csi@5822000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05822000 0x0 0x1000>; - interrupts = ; - device_id = <2>; - status = "okay"; - }; - csi3: csi@5823000 { - compatible = "allwinner,sunxi-csi"; - reg = <0x0 0x05823000 0x0 0x1000>; - interrupts = ; - pinctrl-names = "default","sleep"; - pinctrl-0 = <&ncsi_bt656_pins_a>; - pinctrl-1 = <&ncsi_bt656_pins_b>; - device_id = <3>; - status = "okay"; - }; - mipi0: mipi@5810100 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810100 0x0 0x100>, - <0x0 0x05811000 0x0 0x400>; - interrupts = ; - pinctrl-names = "mipi0-default","mipi0-sleep", - "mipi1-4lane-default","mipi1-4lane-sleep"; - pinctrl-0 = <&mipia_pins_a>; - pinctrl-1 = <&mipia_pins_b>; - pinctrl-2 = <&mipib_4lane_pins_a>; - pinctrl-3 = <&mipib_4lane_pins_b>; - device_id = <0>; - status = "okay"; - }; - mipi1: mipi@5810200 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810200 0x0 0x100>, - <0x0 0x05811400 0x0 0x400>; - pinctrl-names = "mipi1-default","mipi1-sleep"; - pinctrl-0 = <&mipib_pins_a>; - pinctrl-1 = <&mipib_pins_b>; - device_id = <1>; - status = "okay"; - }; - mipi2: mipi@5810300 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810300 0x0 0x100>, - <0x0 0x05811800 0x0 0x400>; - pinctrl-names = "mipi2-default","mipi2-sleep", - "mipi3-4lane-default","mipi3-4lane-sleep"; - pinctrl-0 = <&mipic_pins_a>; - pinctrl-1 = <&mipic_pins_b>; - pinctrl-2 = <&mipid_4lane_pins_a>; - pinctrl-3 = <&mipid_4lane_pins_b>; - device_id = <2>; - status = "okay"; - }; - mipi3: mipi@5810400 { - compatible = "allwinner,sunxi-mipi"; - reg = <0x0 0x05810400 0x0 0x100>, - <0x0 0x05811C00 0x0 0x400>; - pinctrl-names = "mipi3-default","mipi3-sleep"; - pinctrl-0 = <&mipid_pins_a>; - pinctrl-1 = <&mipid_pins_b>; - device_id = <3>; - status = "okay"; - }; - tdm0: tdm@5908000 { - compatible = "allwinner,sunxi-tdm"; - reg = <0x0 0x05908000 0x0 0x300>; - interrupts = ; - work_mode = <0x0>; - device_id = <0>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp00:isp@5900000 { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x05900000 0x0 0x1300>; - interrupts = ; - work_mode = <0x0>; - device_id = <0>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp01:isp@58ffffc { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x058ffffc 0x0 0x1304>; - interrupts = ; - work_mode = <0xff>; - device_id = <1>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp02:isp@58ffff8 { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x058ffff8 0x0 0x1308>; - interrupts = ; - work_mode = <0xff>; - device_id = <2>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp03:isp@58ffff4 { - compatible = "allwinner,sunxi-isp"; - reg = <0x0 0x058ffff4 0x0 0x130c>; - interrupts = ; - work_mode = <0xff>; - device_id = <3>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - isp10:isp@4 { - compatible = "allwinner,sunxi-isp"; - device_id = <4>; - iommus = <&mmu_aw 0 0>; - status = "okay"; - }; - scaler00:scaler@5910000 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910000 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <0>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler01:scaler@590fffc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x0590fffc 0x0 0x404>; - work_mode = <0xff>; - device_id = <1>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler02:scaler@590fff8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x0590fff8 0x0 0x408>; - work_mode = <0xff>; - device_id = <2>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler03:scaler@590fff4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x0590fff4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <3>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler10:scaler@5910400 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910400 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <4>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler11:scaler@59103fc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059103fc 0x0 0x404>; - work_mode = <0xff>; - device_id = <5>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler12:scaler@59103f8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059103f8 0x0 0x408>; - work_mode = <0xff>; - device_id = <6>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler13:scaler@59103f4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059103f4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <7>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler20:scaler@5910800 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910800 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <8>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler21:scaler@59107fc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059107fc 0x0 0x404>; - work_mode = <0xff>; - device_id = <9>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler22:scaler@59107f8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059107f8 0x0 0x408>; - work_mode = <0xff>; - device_id = <10>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler23:scaler@59107f4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x059107f4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <11>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler30:scaler@5910c00 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910c00 0x0 0x400>; - interrupts = ; - work_mode = <0x0>; - device_id = <12>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler31:scaler@5910bfc { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910bfc 0x0 0x404>; - work_mode = <0xff>; - device_id = <13>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler32:scaler@5910bf8 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910bf8 0x0 0x408>; - work_mode = <0xff>; - device_id = <14>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler33:scaler@5910bf4 { - compatible = "allwinner,sunxi-scaler"; - reg = <0x0 0x05910bf4 0x0 0x40c>; - work_mode = <0xff>; - device_id = <15>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler40:scaler@16 { - compatible = "allwinner,sunxi-scaler"; - device_id = <16>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - scaler50:scaler@17 { - compatible = "allwinner,sunxi-scaler"; - device_id = <17>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - actuator0: actuator@2108180 { - compatible = "allwinner,sunxi-actuator"; - device_type = "actuator0"; - reg = <0x0 0x02108180 0x0 0x10>; - actuator0_name = "ad5820_act"; - actuator0_slave = <0x18>; - actuator0_af_pwdn = <>; - actuator0_afvdd = "afvcc-csi"; - actuator0_afvdd_vol = <2800000>; - status = "disabled"; - }; - flash0: flash@2108190 { - device_type = "flash0"; - compatible = "allwinner,sunxi-flash"; - reg = <0x0 0x02108190 0x0 0x10>; - flash0_type = <2>; - flash0_en = <>; - flash0_mode = <>; - flash0_flvdd = ""; - flash0_flvdd_vol = <>; - device_id = <0>; - status = "disabled"; - }; - sensor0: sensor@5812000 { - reg = <0x0 0x05812000 0x0 0x10>; - device_type = "sensor0"; - compatible = "allwinner,sunxi-sensor"; - sensor0_mname = "ov5640"; - sensor0_twi_cci_id = <2>; - sensor0_twi_addr = <0x78>; - sensor0_mclk_id = <0>; - sensor0_pos = "rear"; - sensor0_isp_used = <0>; - sensor0_fmt = <0>; - sensor0_stby_mode = <0>; - sensor0_vflip = <0>; - sensor0_hflip = <0>; - sensor0_iovdd-supply = <>; - sensor0_iovdd_vol = <>; - sensor0_avdd-supply = <>; - sensor0_avdd_vol = <>; - sensor0_dvdd-supply = <>; - sensor0_dvdd_vol = <>; - sensor0_power_en = <>; - sensor0_reset = <>; - sensor0_pwdn = <>; - sensor0_sm_vs = <>; - flash_handle = <&flash0>; - act_handle = <&actuator0>; - device_id = <0>; - status = "disabled"; - }; - sensor1: sensor@5812010 { - reg = <0x0 0x05812010 0x0 0x10>; - device_type = "sensor1"; - compatible = "allwinner,sunxi-sensor"; - sensor1_mname = "ov5647"; - sensor1_twi_cci_id = <3>; - sensor1_twi_addr = <0x6c>; - sensor1_mclk_id = <1>; - sensor1_pos = "front"; - sensor1_isp_used = <0>; - sensor1_fmt = <0>; - sensor1_stby_mode = <0>; - sensor1_vflip = <0>; - sensor1_hflip = <0>; - sensor1_iovdd-supply = <>; - sensor1_iovdd_vol = <>; - sensor1_avdd-supply = <>; - sensor1_avdd_vol = <>; - sensor1_dvdd-supply = <>; - sensor1_dvdd_vol = <>; - sensor1_power_en = <>; - sensor1_reset = <>; - sensor1_pwdn = <>; - sensor1_sm_vs = <>; - flash_handle = <>; - act_handle = <>; - device_id = <1>; - status = "disabled"; - }; - sensor2: sensor@5812020 { - reg = <0x0 0x05812020 0x0 0x10>; - device_type = "sensor2"; - compatible = "allwinner,sunxi-sensor"; - sensor2_mname = "imx386_mipi"; - sensor2_twi_cci_id = <3>; - sensor2_twi_addr = <0x6c>; - sensor2_mclk_id = <1>; - sensor2_pos = "rear"; - sensor2_isp_used = <0>; - sensor2_fmt = <0>; - sensor2_stby_mode = <0>; - sensor2_vflip = <0>; - sensor2_hflip = <0>; - sensor2_iovdd-supply = <>; - sensor2_iovdd_vol = <>; - sensor2_avdd-supply = <>; - sensor2_avdd_vol = <>; - sensor2_dvdd-supply = <>; - sensor2_dvdd_vol = <>; - sensor2_power_en = <>; - sensor2_reset = <>; - sensor2_pwdn = <>; - sensor2_sm_vs = <>; - flash_handle = <>; - act_handle = <>; - device_id = <2>; - status = "disabled"; - }; - sensor3: sensor@5812030 { - reg = <0x0 0x05812030 0x0 0x10>; - device_type = "sensor3"; - compatible = "allwinner,sunxi-sensor"; - sensor3_mname = "imx317_mipi"; - sensor3_twi_cci_id = <3>; - sensor3_twi_addr = <0x6c>; - sensor3_mclk_id = <1>; - sensor3_pos = "rear"; - sensor3_isp_used = <0>; - sensor3_fmt = <0>; - sensor3_stby_mode = <0>; - sensor3_vflip = <0>; - sensor3_hflip = <0>; - sensor3_iovdd-supply = <>; - sensor3_iovdd_vol = <>; - sensor3_avdd-supply = <>; - sensor3_avdd_vol = <>; - sensor3_dvdd-supply = <>; - sensor3_dvdd_vol = <>; - sensor3_power_en = <>; - sensor3_reset = <>; - sensor3_pwdn = <>; - sensor3_sm_vs = <>; - flash_handle = <>; - act_handle = <>; - device_id = <2>; - status = "disabled"; - }; - vinc00:vinc@5830000 { - device_type = "vinc0"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830000 0x0 0x1000>; - interrupts = ; - vinc0_csi_sel = <3>; - vinc0_mipi_sel = <0xff>; - vinc0_isp_sel = <0>; - vinc0_isp_tx_ch = <0>; - vinc0_tdm_rx_sel = <0>; - vinc0_rear_sensor_sel = <0>; - vinc0_front_sensor_sel = <0>; - vinc0_sensor_list = <0>; - device_id = <0>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "okay"; - }; - - vinc01:vinc@582fffc { - device_type = "vinc1"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x0582fffc 0x0 0x1004>; - vinc1_csi_sel = <2>; - vinc1_mipi_sel = <0xff>; - vinc1_isp_sel = <1>; - vinc1_isp_tx_ch = <1>; - vinc1_tdm_rx_sel = <1>; - vinc1_rear_sensor_sel = <0>; - vinc1_front_sensor_sel = <0>; - vinc1_sensor_list = <0>; - device_id = <1>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - vinc02:vinc@582fff8 { - device_type = "vinc2"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x0582fff8 0x0 0x1008>; - vinc2_csi_sel = <2>; - vinc2_mipi_sel = <0xff>; - vinc2_isp_sel = <2>; - vinc2_isp_tx_ch = <2>; - vinc2_tdm_rx_sel = <2>; - vinc2_rear_sensor_sel = <0>; - vinc2_front_sensor_sel = <0>; - vinc2_sensor_list = <0>; - device_id = <2>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc03:vinc@582fff4 { - device_type = "vinc3"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x0582fff4 0x0 0x100c>; - vinc3_csi_sel = <0>; - vinc3_mipi_sel = <0xff>; - vinc3_isp_sel = <0>; - vinc3_isp_tx_ch = <0>; - vinc3_tdm_rx_sel = <0>; - vinc3_rear_sensor_sel = <1>; - vinc3_front_sensor_sel = <1>; - vinc3_sensor_list = <0>; - device_id = <3>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc10:vinc@5831000 { - device_type = "vinc4"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831000 0x0 0x1000>; - interrupts = ; - vinc4_csi_sel = <3>; - vinc4_mipi_sel = <0xff>; - vinc4_isp_sel = <0>; - vinc4_isp_tx_ch = <0>; - vinc4_tdm_rx_sel = <1>; - vinc4_rear_sensor_sel = <0>; - vinc4_front_sensor_sel = <0>; - vinc4_sensor_list = <0>; - device_id = <4>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc11:vinc@5830ffc { - device_type = "vinc5"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830ffc 0x0 0x1004>; - vinc5_csi_sel = <2>; - vinc5_mipi_sel = <0xff>; - vinc5_isp_sel = <1>; - vinc5_isp_tx_ch = <1>; - vinc5_tdm_rx_sel = <1>; - vinc5_rear_sensor_sel = <0>; - vinc5_front_sensor_sel = <0>; - vinc5_sensor_list = <0>; - device_id = <5>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc12:vinc@5830ff8 { - device_type = "vinc6"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830ff8 0x0 0x1008>; - vinc6_csi_sel = <2>; - vinc6_mipi_sel = <0xff>; - vinc6_isp_sel = <0>; - vinc6_isp_tx_ch = <0>; - vinc6_tdm_rx_sel = <0>; - vinc6_rear_sensor_sel = <0>; - vinc6_front_sensor_sel = <0>; - vinc6_sensor_list = <0>; - device_id = <6>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc13:vinc@5830ff4 { - device_type = "vinc7"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05830ff4 0x0 0x100c>; - vinc7_csi_sel = <2>; - vinc7_mipi_sel = <0xff>; - vinc7_isp_sel = <0>; - vinc7_isp_tx_ch = <0>; - vinc7_tdm_rx_sel = <0>; - vinc7_rear_sensor_sel = <0>; - vinc7_front_sensor_sel = <0>; - vinc7_sensor_list = <0>; - device_id = <7>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc20:vinc@5832000 { - device_type = "vinc8"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832000 0x0 0x1000>; - interrupts = ; - vinc8_csi_sel = <2>; - vinc8_mipi_sel = <0xff>; - vinc8_isp_sel = <4>; - vinc8_isp_tx_ch = <3>; - vinc8_tdm_rx_sel = <3>; - vinc8_rear_sensor_sel = <0>; - vinc8_front_sensor_sel = <0>; - vinc8_sensor_list = <0>; - device_id = <8>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc21:vinc@5831ffc { - device_type = "vinc9"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831ffc 0x0 0x1004>; - vinc9_csi_sel = <2>; - vinc9_mipi_sel = <0xff>; - vinc9_isp_sel = <0>; - vinc9_isp_tx_ch = <0>; - vinc9_tdm_rx_sel = <0>; - vinc9_rear_sensor_sel = <0>; - vinc9_front_sensor_sel = <0>; - vinc9_sensor_list = <0>; - device_id = <9>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc22:vinc@5831ff8 { - device_type = "vinc10"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831ff8 0x0 0x1008>; - vinc10_csi_sel = <2>; - vinc10_mipi_sel = <0xff>; - vinc10_isp_sel = <0>; - vinc10_isp_tx_ch = <0>; - vinc10_tdm_rx_sel = <0>; - vinc10_rear_sensor_sel = <0>; - vinc10_front_sensor_sel = <0>; - vinc10_sensor_list = <0>; - device_id = <10>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc23:vinc@5831ff4 { - device_type = "vinc11"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05831ff4 0x0 0x100c>; - vinc11_csi_sel = <2>; - vinc11_mipi_sel = <0xff>; - vinc11_isp_sel = <0>; - vinc11_isp_tx_ch = <0>; - vinc11_tdm_rx_sel = <0>; - vinc11_rear_sensor_sel = <0>; - vinc11_front_sensor_sel = <0>; - vinc11_sensor_list = <0>; - device_id = <11>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc30:vinc@5833000 { - device_type = "vinc12"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05833000 0x0 0x1000>; - interrupts = ; - vinc12_csi_sel = <2>; - vinc12_mipi_sel = <0xff>; - vinc12_isp_sel = <0>; - vinc12_isp_tx_ch = <0>; - vinc12_tdm_rx_sel = <0>; - vinc12_rear_sensor_sel = <0>; - vinc12_front_sensor_sel = <0>; - vinc12_sensor_list = <0>; - device_id = <12>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc31:vinc@5832ffc { - device_type = "vinc13"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832ffc 0x0 0x1004>; - vinc13_csi_sel = <2>; - vinc13_mipi_sel = <0xff>; - vinc13_isp_sel = <0>; - vinc13_isp_tx_ch = <0>; - vinc13_tdm_rx_sel = <0>; - vinc13_rear_sensor_sel = <0>; - vinc13_front_sensor_sel = <0>; - vinc13_sensor_list = <0>; - device_id = <13>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc32:vinc@5832ff8 { - device_type = "vinc14"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832ff8 0x0 0x1008>; - vinc14_csi_sel = <2>; - vinc14_mipi_sel = <0xff>; - vinc14_isp_sel = <0>; - vinc14_isp_tx_ch = <0>; - vinc14_tdm_rx_sel = <0>; - vinc14_rear_sensor_sel = <0>; - vinc14_front_sensor_sel = <0>; - vinc14_sensor_list = <0>; - device_id = <14>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc33:vinc@5832ff4 { - device_type = "vinc15"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05832ff4 0x0 0x100c>; - vinc15_csi_sel = <2>; - vinc15_mipi_sel = <0xff>; - vinc15_isp_sel = <0>; - vinc15_isp_tx_ch = <0>; - vinc15_tdm_rx_sel = <0>; - vinc15_rear_sensor_sel = <0>; - vinc15_front_sensor_sel = <0>; - vinc15_sensor_list = <0>; - device_id = <15>; - work_mode = <0xff>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc40:vinc@5834000 { - device_type = "vinc16"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05834000 0x0 0x1000>; - interrupts = ; - vinc16_csi_sel = <2>; - vinc16_mipi_sel = <0xff>; - vinc16_isp_sel = <0>; - vinc16_isp_tx_ch = <0>; - vinc16_tdm_rx_sel = <0>; - vinc16_rear_sensor_sel = <0>; - vinc16_front_sensor_sel = <0>; - vinc16_sensor_list = <0>; - device_id = <16>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - - vinc50:vinc@5835000 { - device_type = "vinc17"; - compatible = "allwinner,sunxi-vin-core"; - reg = <0x0 0x05835000 0x0 0x1000>; - interrupts = ; - vinc17_csi_sel = <2>; - vinc17_mipi_sel = <0xff>; - vinc17_isp_sel = <0>; - vinc17_isp_tx_ch = <0>; - vinc17_tdm_rx_sel = <0>; - vinc17_rear_sensor_sel = <0>; - vinc17_front_sensor_sel = <0>; - vinc17_sensor_list = <0>; - device_id = <17>; - work_mode = <0x0>; - iommus = <&mmu_aw 1 0>; - status = "disabled"; - }; - }; - - mdio0: mdio0@4500048 { - compatible = "allwinner,sunxi-mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x04500048 0x0 0x8>; - status = "disabled"; - gmac0_phy0: ethernet-phy@1 { - /* RTL8211F (0x001cc916) */ - reg = <1>; - max-speed = <1000>; /* Max speed capability */ - reset-gpios = <&pio PH 19 GPIO_ACTIVE_LOW>; - /* PHY datasheet rst time */ - reset-assert-us = <10000>; - reset-deassert-us = <150000>; - }; - }; - - gmac0: gmac0@4500000 { - compatible = "allwinner,sunxi-gmac"; - reg = <0x0 0x04500000 0x0 0x10000>, - <0x0 0x03000030 0x0 0x4>; - interrupts = ; - interrupt-names = "gmacirq"; - clocks = <&ccu CLK_GMAC0>, <&ccu CLK_GMAC0_25M>; - clock-names = "gmac", "phy25m"; - resets = <&ccu RST_BUS_GMAC0>; - phy-handle = <&gmac0_phy0>; - status = "disabled"; - }; - }; -}; - diff --git a/bsp/configs/linux-6.1/sun55iw3p1_min_defconfig b/bsp/configs/linux-6.1/sun55iw3p1_min_defconfig deleted file mode 100644 index 39d943cdad..0000000000 --- a/bsp/configs/linux-6.1/sun55iw3p1_min_defconfig +++ /dev/null @@ -1,108 +0,0 @@ -CONFIG_AW_BSP=y -CONFIG_ARCH_SUN55I=y -CONFIG_AW_IC_BOARD=y -CONFIG_AW_SOC_NAME="A523" -# CONFIG_AW_DUMP_REG is not set -# CONFIG_AW_INPUT_SENSORINIT is not set -# CONFIG_AW_DISP2 is not set -# CONFIG_AW_NNA_VIP is not set -# CONFIG_AW_NNA_GALCORE is not set -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_CGROUPS=y -CONFIG_CGROUP_SCHED=y -CONFIG_NAMESPACES=y -# CONFIG_UTS_NS is not set -# CONFIG_PID_NS is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="./bsp/ramfs/ramfs_aarch64.cpio.gz" -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_XZ is not set -# CONFIG_RD_LZO is not set -# CONFIG_RD_LZ4 is not set -CONFIG_EXPERT=y -# CONFIG_SYSFS_SYSCALL is not set -# CONFIG_FHANDLE is not set -CONFIG_KALLSYMS_ALL=y -# CONFIG_RSEQ is not set -CONFIG_PROFILING=y -CONFIG_SCHED_MC=y -CONFIG_NR_CPUS=4 -CONFIG_HOTPLUG_CPU=y -CONFIG_COMPAT=y -# CONFIG_EFI is not set -# CONFIG_SUSPEND is not set -CONFIG_JUMP_LABEL=y -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_SLAB_MERGE_DEFAULT is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_CMA=y -CONFIG_CMA_AREAS=16 -CONFIG_DEVTMPFS=y -# CONFIG_ALLOW_DEV_COREDUMP is not set -# CONFIG_BLK_DEV is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_VT is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_HW_RANDOM is not set -# CONFIG_PINCTRL_SUN8I_H3_R is not set -# CONFIG_PINCTRL_SUN50I_A64 is not set -# CONFIG_PINCTRL_SUN50I_A64_R is not set -# CONFIG_PINCTRL_SUN50I_A100 is not set -# CONFIG_PINCTRL_SUN50I_A100_R is not set -# CONFIG_PINCTRL_SUN50I_H5 is not set -# CONFIG_PINCTRL_SUN50I_H6 is not set -# CONFIG_PINCTRL_SUN50I_H6_R is not set -# CONFIG_PINCTRL_SUN50I_H616 is not set -# CONFIG_PINCTRL_SUN50I_H616_R is not set -# CONFIG_HWMON is not set -CONFIG_MFD_SUN6I_PRCM=y -CONFIG_MFD_SYSCON=y -CONFIG_FB=y -# CONFIG_USB_SUPPORT is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VHOST_MENU is not set -# CONFIG_SURFACE_PLATFORMS is not set -# CONFIG_SUNXI_CCU is not set -# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_IOMMU_SUPPORT is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_CRC16=y -CONFIG_XZ_DEC=y -CONFIG_DMA_CMA=y -CONFIG_PRINTK_TIME=y -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -# CONFIG_DEBUG_MISC is not set -# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_PANIC_ON_OOPS=y -# CONFIG_SCHED_DEBUG is not set -# CONFIG_DEBUG_PREEMPT is not set -# CONFIG_FTRACE is not set -# CONFIG_STRICT_DEVMEM is not set -# CONFIG_RUNTIME_TESTING_MENU is not set diff --git a/bsp/configs/linux-6.6/sun55iw3p1.dtsi b/bsp/configs/linux-6.6/sun55iw3p1.dtsi deleted file mode 100644 index 6ab692013d..0000000000 --- a/bsp/configs/linux-6.6/sun55iw3p1.dtsi +++ /dev/null @@ -1,173 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ or MIT) -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/ { - model = "sun55iw3"; - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - serial0 = &uart0; - }; - - reserved-memory { - #address-cells = <2>; - #size-cells = <2>; - ranges; - - bl31 { - reg = <0x0 0x48000000 0x0 0x01000000>; - }; - }; - - /* avoid panic when memory-node err(from uboot) */ - memory@40000000 { - device_type = "memory"; - reg = <0x00000000 0x40000000 0x00000000 0x20000000>; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x0>; - }; - }; - - dcxo24M: dcxo24M_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "dcxo24M"; - }; - - rc_16m: rc16m_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <16000000>; - clock-accuracy = <300000000>; - clock-output-names = "rc-16m"; - }; - - ext_32k: ext32k_clk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "ext-32k"; - }; - - gic: interrupt-controller@3400000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x0 0x03400000 0 0x10000>, /* GIC Dist */ - <0x0 0x03460000 0 0xFF004>; /* GIC Re */ - interrupt-parent = <&gic>; - }; - - timer_arch { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - clock-frequency = <24000000>; - interrupt-parent = <&gic>; - arm,no-tick-in-suspend; - }; - - soc: soc@3000000 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - rtc_ccu: rtc_ccu@7090000 { - compatible = "allwinner,sun55iw3-rtc-ccu"; - reg = <0x0 0x07090000 0x0 0x400>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - cpupll_ccu: clock@8817000 { - compatible = "allwinner,sun55iw3-cpupll"; - reg = <0x0 0x08817000 0x0 0x4000>; - #clock-cells = <1>; - #reset-cells = <1>; - pll_step = <0x9>; - /* pll_ssc will divid pll_ssc_scale in code - * keep value 0 < pll_ssc < 10 - */ - pll_ssc_scale = <0xa>; - pll_ssc = <0x1>; - }; - - ccu: ccu@2001000 { - compatible = "allwinner,sun55iw3-ccu"; - reg = <0x0 0x02001000 0x0 0x1000>; - clocks = <&dcxo24M>, <&rtc_ccu CLK_OSC32K>, <&rc_16m>; - clock-names = "hosc", "losc", "iosc"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - r_ccu: r_ccu@7010000 { - compatible = "allwinner,sun55iw3-r-ccu"; - reg = <0x0 0x07010000 0x0 0x230>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - pio: pinctrl@2000000 { - //#address-cells = <1>; - //#size-cells = <0>; - compatible = "allwinner,sun55iw3-pinctrl"; - reg = <0x0 0x02000000 0x0 0x800>; - interrupts = , - , - , - , - , - , - , - , - , - ; - clocks = <&ccu CLK_APB1>, <&dcxo24M>, <&rtc_ccu CLK_OSC32K>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - #gpio-cells = <3>; - interrupt-controller; - #interrupt-cells = <3>; - }; - - uart0: uart@2500000 { - compatible = "allwinner,sun55i-uart"; - reg = <0x0 0x02500000 0x0 0x400>; - interrupts = ; - clocks = <&ccu CLK_BUS_UART0>; - resets = <&ccu RST_BUS_UART0>; - uart0_port = <0>; - uart0_type = <2>; - status = "disabled"; - }; - }; -}; diff --git a/bsp/configs/linux-6.6/sun55iw3p1_min_defconfig b/bsp/configs/linux-6.6/sun55iw3p1_min_defconfig deleted file mode 100644 index 11691d4aa5..0000000000 --- a/bsp/configs/linux-6.6/sun55iw3p1_min_defconfig +++ /dev/null @@ -1,96 +0,0 @@ -CONFIG_AW_BSP=y -CONFIG_ARCH_SUN55I=y -CONFIG_AW_IC_BOARD=y -CONFIG_AW_SOC_NAME="A523" -# CONFIG_AW_DUMP_REG is not set -# CONFIG_AW_INPUT_SENSORINIT is not set -# CONFIG_AW_NNA_VIP is not set -# CONFIG_AW_NNA_GALCORE is not set -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y -CONFIG_PREEMPT=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_NAMESPACES=y -# CONFIG_UTS_NS is not set -# CONFIG_PID_NS is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="./bsp/ramfs/ramfs_aarch64.cpio.gz" -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_XZ is not set -# CONFIG_RD_LZO is not set -# CONFIG_RD_LZ4 is not set -CONFIG_EXPERT=y -# CONFIG_SYSFS_SYSCALL is not set -# CONFIG_FHANDLE is not set -CONFIG_KALLSYMS_ALL=y -# CONFIG_RSEQ is not set -CONFIG_PROFILING=y -CONFIG_SCHED_MC=y -CONFIG_NR_CPUS=4 -CONFIG_HOTPLUG_CPU=y -CONFIG_COMPAT=y -# CONFIG_EFI is not set -# CONFIG_SUSPEND is not set -CONFIG_MODULES=y -CONFIG_MODULE_UNLOAD=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -# CONFIG_SLAB_MERGE_DEFAULT is not set -# CONFIG_COMPAT_BRK is not set -CONFIG_CMA=y -CONFIG_CMA_AREAS=16 -CONFIG_DEVTMPFS=y -# CONFIG_ALLOW_DEV_COREDUMP is not set -# CONFIG_BLK_DEV is not set -CONFIG_SCSI=y -CONFIG_BLK_DEV_SD=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO_SERPORT is not set -# CONFIG_VT is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_8250=y -# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set -CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_RUNTIME_UARTS=0 -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_HW_RANDOM is not set -# CONFIG_PINCTRL_SUN8I_H3_R is not set -# CONFIG_PINCTRL_SUN50I_A64 is not set -# CONFIG_PINCTRL_SUN50I_A64_R is not set -# CONFIG_PINCTRL_SUN50I_A100 is not set -# CONFIG_PINCTRL_SUN50I_A100_R is not set -# CONFIG_PINCTRL_SUN50I_H5 is not set -# CONFIG_PINCTRL_SUN50I_H6 is not set -# CONFIG_PINCTRL_SUN50I_H6_R is not set -# CONFIG_PINCTRL_SUN50I_H616 is not set -# CONFIG_PINCTRL_SUN50I_H616_R is not set -# CONFIG_HWMON is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VHOST_MENU is not set -# CONFIG_SURFACE_PLATFORMS is not set -# CONFIG_SUNXI_CCU is not set -# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set -# CONFIG_FSL_ERRATUM_A008585 is not set -# CONFIG_IOMMU_SUPPORT is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY_USER is not set -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_XZ_DEC=y -CONFIG_DMA_CMA=y -CONFIG_PRINTK_TIME=y -CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7 -# CONFIG_DEBUG_MISC is not set -# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set -CONFIG_MAGIC_SYSRQ=y -CONFIG_PANIC_ON_OOPS=y -# CONFIG_FTRACE is not set -# CONFIG_STRICT_DEVMEM is not set -# CONFIG_RUNTIME_TESTING_MENU is not set