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ToRadixBE: polish error handling and align with brillig VM and AVM circuit #11295

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jeanmon opened this issue Jan 17, 2025 · 0 comments

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jeanmon commented Jan 17, 2025 •

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Discrepancy with BrilligVM:

if radix > 256: no error is handled by brilligVM
if num_limbs < 1: no error is handled by brilligVM

Both BrilligVM and AVM TS simulator:

no explicit handling of error if radix == 0
no enforcement that radix == 2 whenever bit mode is activated (TS would hit an assert if radix > 2 with bit mode activated)

Note on radix ==1: Current code would return zero values which I think it is perfectly fine. Should we enforce radix > 1

Apply the above to the AVM circuit (possibly unconstrained).

jeanmon added the C-avm label

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jeanmon added this to A3

github-project-automation bot moved this to Todo in A3

jeanmon moved this from Todo to In Progress in A3

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