-
Notifications
You must be signed in to change notification settings - Fork 9
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Proposed relaxing of cjalr sealing #86
base: main
Are you sure you want to change the base?
Conversation
54497f9
to
f3c2688
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
You need to make a similar change in CJAL
.
f3c2688
to
85e58b7
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Looks fine except for comments. I may slightly prefer inverting the if
so that the common cd==ra
case is handled first but it does not matter.
Lgtm. As Robert pointed out, can you fix the commentary in the JAL case |
85e58b7
to
0dd27c1
Compare
Copy-paste errors fixed, conditions flipped, and archdoc prose updated to explain the changes. |
Is there a security issue if |
I think it would be fine in that the interrupt disabling DoS attack that pushed us to add return sentries would still be mitigated (because you have to use Specifically, most code will use |
My rationale is that when
Slight hardware simplification and in line with the design principle that if you want protection of the caller, use |
But ROP is a code reuse attack which uses the victims own code against them. I agree that we need to articulate the threat model more clearly: it's difficult to imagine a scenario on CHERIoT where this would make a difference. I think it would be something like: the attacker finds a vulnerability that allows them to store a capability at an arbitrary offset in the victim's stack. They use this to overwrite the victim's return address with a capability of their choosing. If
I don't think it simplifies hardware to make return address generation different between |
If they are all in the same PCC, you are not gaining much. The invariant I am maintaining is, the return is protected only if the call is. But I agree it's not necessary to weaken things. |
Attempt at capturing #85 Co-authored-by: Robert Norton <[email protected]>
0dd27c1
to
c9589ea
Compare
@@ -477,16 +477,40 @@ \subsection{Sealed capabilities} | |||
\footnotesize | |||
\begin{tabular}{|c|c|c|c|} | |||
\hline | |||
\asm{cs1} & \asm{cd} & Used for & Valid \cotype{}s \\ | |||
\asm{cs1} & \asm{cd} (out \cotype{}s) & Used for & Valid \asm{cs1} \cotype{}s \\ |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
It might be clearer to have another column for the output otype or maybe even a separate (smaller) table? We should make clear that the same behaviour applies to cjal
.
outlined code may use a specialized calling convention, not using \asm{\$cra} to exit | ||
(so return from such outlined code looks like a ``tail call'' in the above table), | ||
especially in cases where the outlined code must preserve \asm{\$cra} for its caller. | ||
In this case, the \insnriscvref{CJALR} used to enter the outlined code |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
In this case, the \insnriscvref{CJALR} used to enter the outlined code | |
In this case, the \insnriscvref{CJAL} or \insnriscvref{CJALR} used to enter the outlined code |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Looks fine. Suggested clarifications in arch doc optional.
Attempt at capturing #85