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Should return structs of two capabilities in ca0/ca1 #326
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arichardson
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poor code generation
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May 29, 2019
arichardson
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May 29, 2019
I was only testing a -O0 rtld so the inline assembly happened to work. However, at -O2 the compiler is free to reorder instruction before/after the inline asm (including the restore of $cgp after a function call). This was causing the rtld $cgp to be re-installed after the inline asm so the function calls would then crash due to a wrong $cgp. Using "memory" clobbers should fix this issue but for the two cases the return the target function pointer it would be much nicer if we could just return "target+cgp" in $c3/$c4 instead of having to use an on-stack output argument. See CTSRD-CHERI/llvm-project#326
arichardson
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May 29, 2019
I was only testing a -O0 rtld so the inline assembly happened to work. However, at -O2 the compiler is free to reorder instruction before/after the inline asm (including the restore of $cgp after a function call). This was causing the rtld $cgp to be re-installed after the inline asm so the function calls would then crash due to a wrong $cgp. Using "memory" clobbers should fix this issue but for the two cases the return the target function pointer it would be much nicer if we could just return "target+cgp" in $c3/$c4 instead of having to use an on-stack output argument. See CTSRD-CHERI/llvm-project#326
arichardson
added a commit
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that referenced
this issue
May 31, 2019
I was only testing a -O0 rtld so the inline assembly happened to work. However, at -O2 the compiler is free to reorder instruction before/after the inline asm (including the restore of $cgp after a function call). This was causing the rtld $cgp to be re-installed after the inline asm so the function calls would then crash due to a wrong $cgp. Using "memory" clobbers should fix this issue but for the two cases the return the target function pointer it would be much nicer if we could just return "target+cgp" in $c3/$c4 instead of having to use an on-stack output argument. See CTSRD-CHERI/llvm-project#326
arichardson
added a commit
to arichardson/cheribsd
that referenced
this issue
Jun 28, 2019
I was only testing a -O0 rtld so the inline assembly happened to work. However, at -O2 the compiler is free to reorder instruction before/after the inline asm (including the restore of $cgp after a function call). This was causing the rtld $cgp to be re-installed after the inline asm so the function calls would then crash due to a wrong $cgp. Using "memory" clobbers should fix this issue but for the two cases the return the target function pointer it would be much nicer if we could just return "target+cgp" in $c3/$c4 instead of having to use an on-stack output argument. See CTSRD-CHERI/llvm-project#326
arichardson
added a commit
to CTSRD-CHERI/cheribsd
that referenced
this issue
Jun 28, 2019
I was only testing a -O0 rtld so the inline assembly happened to work. However, at -O2 the compiler is free to reorder instruction before/after the inline asm (including the restore of $cgp after a function call). This was causing the rtld $cgp to be re-installed after the inline asm so the function calls would then crash due to a wrong $cgp. Using "memory" clobbers should fix this issue but for the two cases the return the target function pointer it would be much nicer if we could just return "target+cgp" in $c3/$c4 instead of having to use an on-stack output argument. See CTSRD-CHERI/llvm-project#326
This also affects RISC-V, updating description to remove old MIPS references. |
arichardson
changed the title
Should return structs of two capabilities in $c3/$c4
Should return structs of two capabilities in ca0/ca1
Feb 20, 2024
Wrong link |
Should be fixed now. |
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EDIT: The description below applies to MIPS code generation, but the same issue also applies to RISC-V: https://cheri-compiler-explorer.cl.cam.ac.uk/z/c88q34 where we should return this pair in ca0/ca1.
The MIPS n64 ABI returns the following struct in $v0/$v1 whereas for CHERI we store to the stack instead.
This could be causing some performance differences.
However, it would be a flag day if we make this change (which is easier now that we have an ABI version that the kernel and RTLD check)
IR generated for MIPS (-O2):
IR for CHERI (-O2):
MIPS assembly code:
CHERI code:
The text was updated successfully, but these errors were encountered: