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time_counter_inst.v
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// Copyright (C) 2017 Intel Corporation. All rights reserved.
// Your use of Intel Corporation's design tools, logic functions
// and other software and tools, and its AMPP partner logic
// functions, and any output files from any of the foregoing
// (including device programming or simulation files), and any
// associated documentation or information are expressly subject
// to the terms and conditions of the Intel Program License
// Subscription Agreement, the Intel Quartus Prime License Agreement,
// the Intel FPGA IP License Agreement, or other applicable license
// agreement, including, without limitation, that your use is for
// the sole purpose of programming logic devices manufactured by
// Intel and sold by Intel or its authorized distributors. Please
// refer to the applicable agreement for further details.
// Generated by Quartus Prime Version 17.1 (Build Build 590 10/25/2017)
// Created on Fri Jun 07 16:50:29 2024
time_counter time_counter_inst
(
.clk_1Hz(clk_1Hz_sig) , // input clk_1Hz_sig
.rst(rst_sig) , // input rst_sig
.sw0(sw0_sig) , // input sw0_sig
.sw1(sw1_sig) , // input sw1_sig
.sw2(sw2_sig) , // input sw2_sig
.sw3(sw3_sig) , // input sw3_sig
.sw7(sw7_sig) , // input sw7_sig
.led_1(led_1_sig) , // output led_1_sig
.led_2(led_2_sig) , // output led_2_sig
.led_3(led_3_sig) , // output led_3_sig
.day_increment(day_increment_sig) , // output day_increment_sig
.hours(hours_sig) , // output [4:0] hours_sig
.minutes(minutes_sig) , // output [5:0] minutes_sig
.seconds(seconds_sig) // output [5:0] seconds_sig
);