From 808f860a44fd1d93195898bc4fa6b8754c1ebdd2 Mon Sep 17 00:00:00 2001 From: Valmantas Paliksa Date: Fri, 13 Dec 2024 10:01:56 +0200 Subject: [PATCH] rockchip64: rk3399 fix pcie being stuck at 1x width after a warm phy reset --- .../rk3399-fix-pci-lanes.patch | 44 +++++++++++++++++++ .../rockchip64-6.6/rk3399-fix-pci-lanes.patch | 44 +++++++++++++++++++ .../rockchip64-6.9/rk3399-fix-pci-lanes.patch | 44 +++++++++++++++++++ 3 files changed, 132 insertions(+) create mode 100644 patch/kernel/archive/rockchip64-6.12/rk3399-fix-pci-lanes.patch create mode 100644 patch/kernel/archive/rockchip64-6.6/rk3399-fix-pci-lanes.patch create mode 100644 patch/kernel/archive/rockchip64-6.9/rk3399-fix-pci-lanes.patch diff --git a/patch/kernel/archive/rockchip64-6.12/rk3399-fix-pci-lanes.patch b/patch/kernel/archive/rockchip64-6.12/rk3399-fix-pci-lanes.patch new file mode 100644 index 000000000000..55a127182d59 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.12/rk3399-fix-pci-lanes.patch @@ -0,0 +1,44 @@ +From 77f6dfcb20c2dc6a4a2f5303709c6fa0c7b65f30 Mon Sep 17 00:00:00 2001 +From: Valmantas Paliksa +Date: Thu, 12 Dec 2024 12:24:33 +0200 +Subject: [PATCH] Disable PHY_LANE_IDLE_OFF for each instance of + rockchip_pcie_phy_power_one + +Previously PHY_LANE_IDLE_OFF was only disabled for the first lane +--- + drivers/phy/rockchip/phy-rockchip-pcie.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c +index 8234b83fdd88..240cb27a0e9e 100644 +--- a/drivers/phy/rockchip/phy-rockchip-pcie.c ++++ b/drivers/phy/rockchip/phy-rockchip-pcie.c +@@ -167,6 +167,12 @@ static int rockchip_pcie_phy_power_on(struct phy *phy) + + mutex_lock(&rk_phy->pcie_mutex); + ++ regmap_write(rk_phy->reg_base, ++ rk_phy->phy_data->pcie_laneoff, ++ HIWORD_UPDATE(!PHY_LANE_IDLE_OFF, ++ PHY_LANE_IDLE_MASK, ++ PHY_LANE_IDLE_A_SHIFT + inst->index)); ++ + if (rk_phy->pwr_cnt++) + goto err_out; + +@@ -181,12 +187,6 @@ static int rockchip_pcie_phy_power_on(struct phy *phy) + PHY_CFG_ADDR_MASK, + PHY_CFG_ADDR_SHIFT)); + +- regmap_write(rk_phy->reg_base, +- rk_phy->phy_data->pcie_laneoff, +- HIWORD_UPDATE(!PHY_LANE_IDLE_OFF, +- PHY_LANE_IDLE_MASK, +- PHY_LANE_IDLE_A_SHIFT + inst->index)); +- + /* + * No documented timeout value for phy operation below, + * so we make it large enough here. And we use loop-break +-- +2.34.1 + diff --git a/patch/kernel/archive/rockchip64-6.6/rk3399-fix-pci-lanes.patch b/patch/kernel/archive/rockchip64-6.6/rk3399-fix-pci-lanes.patch new file mode 100644 index 000000000000..55a127182d59 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.6/rk3399-fix-pci-lanes.patch @@ -0,0 +1,44 @@ +From 77f6dfcb20c2dc6a4a2f5303709c6fa0c7b65f30 Mon Sep 17 00:00:00 2001 +From: Valmantas Paliksa +Date: Thu, 12 Dec 2024 12:24:33 +0200 +Subject: [PATCH] Disable PHY_LANE_IDLE_OFF for each instance of + rockchip_pcie_phy_power_one + +Previously PHY_LANE_IDLE_OFF was only disabled for the first lane +--- + drivers/phy/rockchip/phy-rockchip-pcie.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c +index 8234b83fdd88..240cb27a0e9e 100644 +--- a/drivers/phy/rockchip/phy-rockchip-pcie.c ++++ b/drivers/phy/rockchip/phy-rockchip-pcie.c +@@ -167,6 +167,12 @@ static int rockchip_pcie_phy_power_on(struct phy *phy) + + mutex_lock(&rk_phy->pcie_mutex); + ++ regmap_write(rk_phy->reg_base, ++ rk_phy->phy_data->pcie_laneoff, ++ HIWORD_UPDATE(!PHY_LANE_IDLE_OFF, ++ PHY_LANE_IDLE_MASK, ++ PHY_LANE_IDLE_A_SHIFT + inst->index)); ++ + if (rk_phy->pwr_cnt++) + goto err_out; + +@@ -181,12 +187,6 @@ static int rockchip_pcie_phy_power_on(struct phy *phy) + PHY_CFG_ADDR_MASK, + PHY_CFG_ADDR_SHIFT)); + +- regmap_write(rk_phy->reg_base, +- rk_phy->phy_data->pcie_laneoff, +- HIWORD_UPDATE(!PHY_LANE_IDLE_OFF, +- PHY_LANE_IDLE_MASK, +- PHY_LANE_IDLE_A_SHIFT + inst->index)); +- + /* + * No documented timeout value for phy operation below, + * so we make it large enough here. And we use loop-break +-- +2.34.1 + diff --git a/patch/kernel/archive/rockchip64-6.9/rk3399-fix-pci-lanes.patch b/patch/kernel/archive/rockchip64-6.9/rk3399-fix-pci-lanes.patch new file mode 100644 index 000000000000..55a127182d59 --- /dev/null +++ b/patch/kernel/archive/rockchip64-6.9/rk3399-fix-pci-lanes.patch @@ -0,0 +1,44 @@ +From 77f6dfcb20c2dc6a4a2f5303709c6fa0c7b65f30 Mon Sep 17 00:00:00 2001 +From: Valmantas Paliksa +Date: Thu, 12 Dec 2024 12:24:33 +0200 +Subject: [PATCH] Disable PHY_LANE_IDLE_OFF for each instance of + rockchip_pcie_phy_power_one + +Previously PHY_LANE_IDLE_OFF was only disabled for the first lane +--- + drivers/phy/rockchip/phy-rockchip-pcie.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/drivers/phy/rockchip/phy-rockchip-pcie.c b/drivers/phy/rockchip/phy-rockchip-pcie.c +index 8234b83fdd88..240cb27a0e9e 100644 +--- a/drivers/phy/rockchip/phy-rockchip-pcie.c ++++ b/drivers/phy/rockchip/phy-rockchip-pcie.c +@@ -167,6 +167,12 @@ static int rockchip_pcie_phy_power_on(struct phy *phy) + + mutex_lock(&rk_phy->pcie_mutex); + ++ regmap_write(rk_phy->reg_base, ++ rk_phy->phy_data->pcie_laneoff, ++ HIWORD_UPDATE(!PHY_LANE_IDLE_OFF, ++ PHY_LANE_IDLE_MASK, ++ PHY_LANE_IDLE_A_SHIFT + inst->index)); ++ + if (rk_phy->pwr_cnt++) + goto err_out; + +@@ -181,12 +187,6 @@ static int rockchip_pcie_phy_power_on(struct phy *phy) + PHY_CFG_ADDR_MASK, + PHY_CFG_ADDR_SHIFT)); + +- regmap_write(rk_phy->reg_base, +- rk_phy->phy_data->pcie_laneoff, +- HIWORD_UPDATE(!PHY_LANE_IDLE_OFF, +- PHY_LANE_IDLE_MASK, +- PHY_LANE_IDLE_A_SHIFT + inst->index)); +- + /* + * No documented timeout value for phy operation below, + * so we make it large enough here. And we use loop-break +-- +2.34.1 +