From bb304ef0097805870b160f4c6864b67ba8485862 Mon Sep 17 00:00:00 2001 From: Andrea Spadaccini Date: Mon, 13 Nov 2023 09:52:27 +0100 Subject: [PATCH] fix: use Map.put() due to GWT not supporting Map.Entry --- .../edumips64/core/is/InstructionBuilder.java | 303 +++++++++--------- 1 file changed, 152 insertions(+), 151 deletions(-) diff --git a/src/main/java/org/edumips64/core/is/InstructionBuilder.java b/src/main/java/org/edumips64/core/is/InstructionBuilder.java index 043466dac..1ed821766 100644 --- a/src/main/java/org/edumips64/core/is/InstructionBuilder.java +++ b/src/main/java/org/edumips64/core/is/InstructionBuilder.java @@ -2,7 +2,8 @@ import java.util.Map; import java.util.function.Supplier; -import static java.util.Map.entry; + +import java.util.HashMap; import org.edumips64.core.CPU; import org.edumips64.core.Dinero; @@ -18,18 +19,164 @@ * will refuse to build it. */ public class InstructionBuilder { - private Memory memory; - private IOManager iom; private CPU cpu; private Dinero dinero; private ConfigStore config; + private Map> instructionDictionary; + public InstructionBuilder(Memory memory, IOManager iom, CPU cpu, Dinero dinero, ConfigStore config) { - this.memory = memory; - this.iom = iom; this.cpu = cpu; this.dinero = dinero; this.config = config; + + // Note: the map isn't built using Map.ofEntries() due to GWT not supporting Map.entry() yet. + // Also, this is not static because some instructions need to access the CPU and the memory at construction time. + instructionDictionary = new HashMap<>(); + + //ALU R-Type 32-bits + instructionDictionary.put("ADD", ADD::new); + instructionDictionary.put("ADDU", ADDU::new); + instructionDictionary.put("SUB", SUB::new); + instructionDictionary.put("SUBU", SUBU::new); + instructionDictionary.put("DIV", DIV::new); + instructionDictionary.put("DIVU", DIVU::new); + instructionDictionary.put("MULT", MULT::new); + instructionDictionary.put("MULTU", MULTU::new); + + //ALU I-Type 32-bits + instructionDictionary.put("ADDI", ADDI::new); + instructionDictionary.put("ADDIU", ADDIU::new); + + //ALU Shifting 32-bits + instructionDictionary.put("SLL", SLL::new); + instructionDictionary.put("SLLV", SLLV::new); + instructionDictionary.put("SRA", SRA::new); + instructionDictionary.put("SRAV", SRAV::new); + instructionDictionary.put("SRL", SRL::new); + instructionDictionary.put("SRLV", SRLV::new); + + //ALU R-Type + instructionDictionary.put("AND", AND::new); + instructionDictionary.put("DADD", DADD::new); + instructionDictionary.put("DADDU", DADDU::new); + instructionDictionary.put("DSUB", DSUB::new); + instructionDictionary.put("DSUBU", DSUBU::new); + instructionDictionary.put("OR", OR::new); + instructionDictionary.put("SLT", SLT::new); + instructionDictionary.put("SLTU", SLTU::new); + instructionDictionary.put("XOR", XOR::new); + instructionDictionary.put("MOVN", MOVN::new); + instructionDictionary.put("MOVZ", MOVZ::new); + instructionDictionary.put("DDIV", DDIV::new); + instructionDictionary.put("DDIVU", DDIVU::new); + instructionDictionary.put("DMUHU", DMUHU::new); + instructionDictionary.put("DMULT", DMULT::new); + instructionDictionary.put("DMULU", DMULU::new); + instructionDictionary.put("DMULTU", DMULTU::new); + instructionDictionary.put("MFLO", MFLO::new); + instructionDictionary.put("MFHI", MFHI::new); + + //ALU I-Type + instructionDictionary.put("ANDI", ANDI::new); + instructionDictionary.put("DADDI", DADDI::new); + instructionDictionary.put("DADDUI", DADDUI::new); + instructionDictionary.put("DADDIU", DADDIU::new); + instructionDictionary.put("LUI", LUI::new); + instructionDictionary.put("ORI", ORI::new); + instructionDictionary.put("SLTI", SLTI::new); + instructionDictionary.put("SLTIU", SLTIU::new); + instructionDictionary.put("XORI", XORI::new); + + //ALU Shifting + instructionDictionary.put("DSLL", DSLL::new); + instructionDictionary.put("DSLLV", DSLLV::new); + instructionDictionary.put("DSRA", DSRA::new); + instructionDictionary.put("DSRAV", DSRAV::new); + instructionDictionary.put("DSRL", DSRL::new); + instructionDictionary.put("DSRLV", DSRLV::new); + + //Load-Signed + instructionDictionary.put("LB", () -> new LB(memory)); + instructionDictionary.put("LH", () -> new LH(memory)); + instructionDictionary.put("LW", () -> new LW(memory)); + instructionDictionary.put("LD", () -> new LD(memory)); + + //Load-Unsigned + instructionDictionary.put("LBU", () -> new LBU(memory)); + instructionDictionary.put("LHU", () -> new LHU(memory)); + instructionDictionary.put("LWU", () -> new LWU(memory)); + + //Store + instructionDictionary.put("SB", () -> new SB(memory)); + instructionDictionary.put("SH", () -> new SH(memory)); + instructionDictionary.put("SW", () -> new SW(memory)); + instructionDictionary.put("SD", () -> new SD(memory)); + + //Unconditional branches + instructionDictionary.put("J", J::new); + instructionDictionary.put("JAL", JAL::new); + instructionDictionary.put("JALR", JALR::new); + instructionDictionary.put("JR", JR::new); + instructionDictionary.put("B", B::new); + + //Conditional branches + instructionDictionary.put("BEQ", BEQ::new); + instructionDictionary.put("BNE", BNE::new); + instructionDictionary.put("BNEZ", BNEZ::new); + instructionDictionary.put("BEQZ", BEQZ::new); + instructionDictionary.put("BGEZ", BGEZ::new); + + //Special instructions + instructionDictionary.put("NOP", NOP::new); + instructionDictionary.put("HALT", HALT::new); + instructionDictionary.put("TRAP", () -> new TRAP(memory, iom)); + instructionDictionary.put("SYSCALL", () -> new SYSCALL(memory, iom)); + instructionDictionary.put("BREAK", BREAK::new); + + //Floating point instructions + //Arithmetic + instructionDictionary.put("ADD_D", () -> new ADD_D(cpu.getFCSR())); + instructionDictionary.put("SUB_D", () -> new SUB_D(cpu.getFCSR())); + instructionDictionary.put("MUL_D", () -> new MUL_D(cpu.getFCSR())); + instructionDictionary.put("DIV_D", () -> new DIV_D(cpu.getFCSR())); + + //Load store + instructionDictionary.put("LDC1", () -> new LDC1(memory)); + instructionDictionary.put("L_D", () -> new L_D(memory)); + instructionDictionary.put("SDC1", () -> new SDC1(memory)); + instructionDictionary.put("S_D", () -> new S_D(memory)); + instructionDictionary.put("LWC1", () -> new LWC1(memory)); + instructionDictionary.put("SWC1", () -> new SWC1(memory)); + + //Move to and from + instructionDictionary.put("DMTC1", DMTC1::new); + instructionDictionary.put("DMFC1", DMFC1::new); + instructionDictionary.put("MTC1", MTC1::new); + instructionDictionary.put("MFC1", MFC1::new); + + //Formatted operand move + instructionDictionary.put("MOV_D", MOV_D::new); + instructionDictionary.put("MOVZ_D", MOVZ_D::new); + instructionDictionary.put("MOVN_D", MOVN_D::new); + + //Special arithmetic instructions + instructionDictionary.put("C_LT_D", C_LT_D::new); + instructionDictionary.put("C_EQ_D", C_EQ_D::new); + + //Conditional branches instructions + instructionDictionary.put("BC1T", BC1T::new); + instructionDictionary.put("BC1F", BC1F::new); + + //Conditional move on CC instructions + instructionDictionary.put("MOVT_D", MOVT_D::new); + instructionDictionary.put("MOVF_D", MOVF_D::new); + + //Conversion instructions + instructionDictionary.put("CVT_L_D", CVT_L_D::new); + instructionDictionary.put("CVT_D_L", CVT_D_L::new); + instructionDictionary.put("CVT_W_D", CVT_W_D::new); + instructionDictionary.put("CVT_D_W", CVT_D_W::new); } /** @@ -53,152 +200,6 @@ public Instruction buildInstruction(String instructionName, ParsedInstructionMet // If the name of the requested instruction has got a dot, the instruction is FP and an // underscore takes the place of the dot because classes names cannot contain dots String name = instructionName.replaceAll("\\.", "_"); - - Map> instructionDictionary = Map.ofEntries( - //ALU R-Type 32-bits - entry("ADD", ADD::new), - entry("ADDU", ADDU::new), - entry("SUB", SUB::new), - entry("SUBU", SUBU::new), - entry("DIV", DIV::new), - entry("DIVU", DIVU::new), - entry("MULT", MULT::new), - entry("MULTU", MULTU::new), - - //ALU I-Type 32-bits - entry("ADDI", ADDI::new), - entry("ADDIU", ADDIU::new), - - //ALU Shifting 32-bits - entry("SLL", SLL::new), - entry("SLLV", SLLV::new), - entry("SRA", SRA::new), - entry("SRAV", SRAV::new), - entry("SRL", SRL::new), - entry("SRLV", SRLV::new), - - //ALU R-Type - entry("AND", AND::new), - entry("DADD", DADD::new), - entry("DADDU", DADDU::new), - entry("DSUB", DSUB::new), - entry("DSUBU", DSUBU::new), - entry("OR", OR::new), - entry("SLT", SLT::new), - entry("SLTU", SLTU::new), - entry("XOR", XOR::new), - entry("MOVN", MOVN::new), - entry("MOVZ", MOVZ::new), - entry("DDIV", DDIV::new), - entry("DDIVU", DDIVU::new), - entry("DMUHU", DMUHU::new), - entry("DMULT", DMULT::new), - entry("DMULU", DMULU::new), - entry("DMULTU", DMULTU::new), - entry("MFLO", MFLO::new), - entry("MFHI", MFHI::new), - - //ALU I-Type - entry("ANDI", ANDI::new), - entry("DADDI", DADDI::new), - entry("DADDUI", DADDUI::new), - entry("DADDIU", DADDIU::new), - entry("LUI", LUI::new), - entry("ORI", ORI::new), - entry("SLTI", SLTI::new), - entry("SLTIU", SLTIU::new), - entry("XORI", XORI::new), - - //ALU Shifting - entry("DSLL", DSLL::new), - entry("DSLLV", DSLLV::new), - entry("DSRA", DSRA::new), - entry("DSRAV", DSRAV::new), - entry("DSRL", DSRL::new), - entry("DSRLV", DSRLV::new), - - //Load-Signed - entry("LB", () -> new LB(memory)), - entry("LH", () -> new LH(memory)), - entry("LW", () -> new LW(memory)), - entry("LD", () -> new LD(memory)), - - //Load-Unsigned - entry("LBU", () -> new LBU(memory)), - entry("LHU", () -> new LHU(memory)), - entry("LWU", () -> new LWU(memory)), - - //Store - entry("SB", () -> new SB(memory)), - entry("SH", () -> new SH(memory)), - entry("SW", () -> new SW(memory)), - entry("SD", () -> new SD(memory)), - - //Unconditional branches - entry("J", J::new), - entry("JAL", JAL::new), - entry("JALR", JALR::new), - entry("JR", JR::new), - entry("B", B::new), - - //Conditional branches - entry("BEQ", BEQ::new), - entry("BNE", BNE::new), - entry("BNEZ", BNEZ::new), - entry("BEQZ", BEQZ::new), - entry("BGEZ", BGEZ::new), - - //Special instructions - entry("NOP", NOP::new), - entry("HALT", HALT::new), - entry("TRAP", () -> new TRAP(memory, iom)), - entry("SYSCALL", () -> new SYSCALL(memory, iom)), - entry("BREAK", BREAK::new), - - //Floating point instructions - //Arithmetic - entry("ADD_D", () -> new ADD_D(cpu.getFCSR())), - entry("SUB_D", () -> new SUB_D(cpu.getFCSR())), - entry("MUL_D", () -> new MUL_D(cpu.getFCSR())), - entry("DIV_D", () -> new DIV_D(cpu.getFCSR())), - - //Load store - entry("LDC1", () -> new LDC1(memory)), - entry("L_D", () -> new L_D(memory)), - entry("SDC1", () -> new SDC1(memory)), - entry("S_D", () -> new S_D(memory)), - entry("LWC1", () -> new LWC1(memory)), - entry("SWC1", () -> new SWC1(memory)), - - //Move to and from - entry("DMTC1", DMTC1::new), - entry("DMFC1", DMFC1::new), - entry("MTC1", MTC1::new), - entry("MFC1", MFC1::new), - - //Formatted operand move - entry("MOV_D", MOV_D::new), - entry("MOVZ_D", MOVZ_D::new), - entry("MOVN_D", MOVN_D::new), - - //Special arithmetic instructions - entry("C_LT_D", C_LT_D::new), - entry("C_EQ_D", C_EQ_D::new), - - //Conditional branches instructions - entry("BC1T", BC1T::new), - entry("BC1F", BC1F::new), - - //Conditional move on CC instructions - entry("MOVT_D", MOVT_D::new), - entry("MOVF_D", MOVF_D::new), - - //Conversion instructions - entry("CVT_L_D", CVT_L_D::new), - entry("CVT_D_L", CVT_D_L::new), - entry("CVT_W_D", CVT_W_D::new), - entry("CVT_D_W", CVT_D_W::new) - ); // If the instruction is not implemented, return null if (!instructionDictionary.containsKey(name)) {