diff --git a/CMakeLists.txt b/CMakeLists.txt index 96a039a1cf..6616314223 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -25,7 +25,7 @@ cmake_minimum_required(VERSION 3.21) -project(VKGC LANGUAGES C CXX) +project(LLPCrepo LANGUAGES C CXX) ### Standalone LLPC build handling if(CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR) @@ -33,104 +33,52 @@ if(CMAKE_SOURCE_DIR STREQUAL CMAKE_CURRENT_SOURCE_DIR) set(LLPC_IS_STANDALONE ON) endif() +### Find LLVM (needed by llpc_version.cmake). +include("cmake/findllvm.cmake") + ### Version info ### include(cmake/llpc_version.cmake) -if(NOT ICD_BUILD_LLPC) - set(DISABLE_LLPC_VERSION_USES_LLVM ON) -endif() add_llpc_version_projects() -### Top-level VKGC Interface ### -add_library(vkgc INTERFACE) - -### VKGC header-only library ### -add_library(vkgc_headers INTERFACE) - -target_link_libraries(vkgc_headers INTERFACE llpc_version) - ### Cached Project Options ############################################################################################# option(LLPC_BUILD_TOOLS "LLPC build all tools" OFF) -### Options that affect the headers #################################################################################### -#if VKI_BUILD_GFX11 -if(LLPC_BUILD_GFX11) - target_compile_definitions(vkgc_headers INTERFACE VKI_BUILD_GFX11) -endif() -#endif - -if(VKI_RAY_TRACING) - if(NOT LLPC_IS_STANDALONE) - target_compile_definitions(vkgc_headers INTERFACE HAVE_GPURT_SHIM) - endif() - - target_compile_definitions(vkgc_headers INTERFACE VKI_RAY_TRACING) - target_compile_definitions(vkgc_headers INTERFACE GPURT_CLIENT_INTERFACE_MAJOR_VERSION=${GPURT_CLIENT_INTERFACE_MAJOR_VERSION}) -endif() -target_link_libraries(vkgc INTERFACE vkgc_headers) +#if LLPC_RAY_TRACING +option(LLPC_RAY_TRACING "Enable raytracing" OFF) +#endif +#if LLPC_AMD_YUV_IMAGE +option(LLPC_AMD_YUV_IMAGE "Build with AMD_YUV_IMAGE" OFF) +#endif +#if LLPC_AMD_LVR_INTEROP +option(LLPC_AMD_LVR_INTEROP "Build with AMD_LVR_INTEROP" OFF) +#endif -### Expose header files ################################################################################################ -target_include_directories(vkgc_headers - INTERFACE - ${PROJECT_SOURCE_DIR}/include +### VKGC aspects ################################################################### +# For drivers that use VKGC, as the interface to the LLPC front-end +if (FALSE + OR ICD_BUILD_LLPC ) - -### external SPIRV headers ######################################################### -if (NOT SPIRV_HEADERS_PATH) - if(EXISTS ${PROJECT_SOURCE_DIR}/../SPIRV-Headers) - set(SPIRV_HEADERS_PATH ${PROJECT_SOURCE_DIR}/../SPIRV-Headers CACHE PATH "The path of SPIRV headers.") - elseif(EXISTS ${PROJECT_SOURCE_DIR}/../../../../SPIRV-Headers) - set(SPIRV_HEADERS_PATH ${PROJECT_SOURCE_DIR}/../../../../SPIRV-Headers CACHE PATH "The path of SPIRV headers.") - endif() + include("cmake/vkgc.cmake") endif() -### Interface Target ################################################################################################### -### SPIRV Interface ### -add_library(khronos_spirv_interface INTERFACE) - -if(EXISTS ${SPIRV_HEADERS_PATH}) - target_include_directories(khronos_spirv_interface - INTERFACE - ${SPIRV_HEADERS_PATH}/include - ${PROJECT_SOURCE_DIR}/include/khronos - ) - if (NOT SPIRV_HEADERS_PATH_INTERNAL) - target_compile_definitions(khronos_spirv_interface - INTERFACE - EXTERNAL_SPIRV_HEADERS=1 - ) - endif() -else() - target_include_directories(khronos_spirv_interface - INTERFACE - ${PROJECT_SOURCE_DIR}/include/khronos - ) -endif() - -if(LLPC_BUILD_TOOLS) -# SPVGEN -if(EXISTS ${PROJECT_SOURCE_DIR}/../spvgen) - set(XGL_SPVGEN_PATH ${PROJECT_SOURCE_DIR}/../spvgen CACHE PATH "Specify the path to SPVGEN.") -elseif(EXISTS ${PROJECT_SOURCE_DIR}/../xgl/tools/spvgen) - set(XGL_SPVGEN_PATH ${PROJECT_SOURCE_DIR}/../xgl/tools/spvgen CACHE PATH "Specify the path to SPVGEN.") -else() - set(XGL_SPVGEN_PATH ${PROJECT_SOURCE_DIR}/../../../tools/spvgen CACHE PATH "Specify the path to SPVGEN.") +### LGC for LLPC ################################################################### +if (ICD_BUILD_LLPC) + # Add LGC and its dependencies as LLVM external projects for LLPC to use. + include("cmake/lgc.cmake") + add_lgc_projects() endif() -if(EXISTS ${XGL_SPVGEN_PATH}) - set(XGL_SPVGEN_BUILD_PATH ${CMAKE_BINARY_DIR}/spvgen) - add_subdirectory(${XGL_SPVGEN_PATH} ${XGL_SPVGEN_BUILD_PATH} EXCLUDE_FROM_ALL) -endif() - -endif(LLPC_BUILD_TOOLS) - -if(ICD_BUILD_LLPC) - # Generate Strings for LLPC standalone tool and vkgc_gpurtshim - add_subdirectory(util ${PROJECT_BINARY_DIR}/util) - add_subdirectory(gfxruntime ${PROJECT_BINARY_DIR}/gfxruntime) +### LLVM ########################################################################### +if (LLVM_EXTERNAL_PROJECTS) + if (ICD_BUILD_LLPC AND LLPC_BUILD_TESTS) + set(LLVM_INCLUDE_TESTS ON CACHE BOOL "Force enable LLVM_INCLUDE_TESTS to include gmock" FORCE) + endif() + # Build LLVM. + include("cmake/llvm.cmake") endif() -### VKGC build LLPC ################################################################ +### Build LLPC ##################################################################### if(ICD_BUILD_LLPC) include("cmake/compilerutils.cmake") add_compilerutils_projects() @@ -144,7 +92,6 @@ if(ICD_BUILD_LLPC) add_subdirectory(llpc ${PROJECT_BINARY_DIR}/llpc) if(LLPC_BUILD_TESTS) - set(LLVM_INCLUDE_TESTS ON CACHE BOOL "Force enable LLVM_INCLUDE_TESTS to include gmock" FORCE) add_subdirectory(test) endif() @@ -179,9 +126,11 @@ if(CMAKE_CXX_COMPILER_ID STREQUAL "MSVC") if(ICD_BUILD_LLPC) set_property(TARGET llpc PROPERTY FOLDER Compiler) set_property(TARGET llpcinternal PROPERTY FOLDER Compiler) - if(VKI_RAY_TRACING AND NOT LLPC_IS_STANDALONE) +#if LLPC_RAY_TRACING + if(LLPC_RAY_TRACING AND NOT LLPC_IS_STANDALONE) set_property(TARGET vkgc_gpurtshim PROPERTY FOLDER Compiler) endif() +#endif set_property(TARGET vkgc_util PROPERTY FOLDER Compiler) if (LLPC_BUILD_TOOLS) set_property(TARGET amdllpc PROPERTY FOLDER Compiler) diff --git a/cmake/CompilerFlags.cmake b/cmake/CompilerFlags.cmake index 9fec02583e..d28bc4ca11 100644 --- a/cmake/CompilerFlags.cmake +++ b/cmake/CompilerFlags.cmake @@ -11,6 +11,7 @@ function(set_compiler_options PROJECT_NAME ENABLE_WERROR) target_compile_options("${PROJECT_NAME}" PRIVATE -Werror -Wno-error=deprecated-declarations + -Wno-error=unknown-attributes ) endif() @@ -74,7 +75,7 @@ function(set_compiler_options PROJECT_NAME ENABLE_WERROR) -Wno-gnu-anonymous-struct -Wno-nested-anon-types ) - if(XGL_ENABLE_LTO) + if(LLPC_ENABLE_LTO) target_link_libraries("${PROJECT_NAME}" PRIVATE -flto=thin) endif() endif() diff --git a/cmake/findllvm.cmake b/cmake/findllvm.cmake new file mode 100644 index 0000000000..fbf38f0d07 --- /dev/null +++ b/cmake/findllvm.cmake @@ -0,0 +1,37 @@ +## + ####################################################################################################################### + # + # Copyright (c) 2024 Advanced Micro Devices, Inc. All Rights Reserved. + # + # Permission is hereby granted, free of charge, to any person obtaining a copy + # of this software and associated documentation files (the "Software"), to + # deal in the Software without restriction, including without limitation the + # rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + # sell copies of the Software, and to permit persons to whom the Software is + # furnished to do so, subject to the following conditions: + # + # The above copyright notice and this permission notice shall be included in all + # copies or substantial portions of the Software. + # + # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + # IN THE SOFTWARE. + # + ####################################################################################################################### + +if (NOT LLPC_LLVM_SRC_PATH) + # Find LLVM source. Allow client driver to override using its own name for overlay builds. + set(DEFAULT_LLPC_LLVM_SRC_PATH ${XGL_LLVM_SRC_PATH}) + if (NOT DEFAULT_LLPC_LLVM_SRC_PATH) + if(EXISTS ${CMAKE_CURRENT_LIST_DIR}/../../../imported/llvm-project/llvm) + set(DEFAULT_LLPC_LLVM_SRC_PATH ${CMAKE_CURRENT_LIST_DIR}/../../../imported/llvm-project/llvm) + elseif(EXISTS ${CMAKE_CURRENT_LIST_DIR}/../../llvm-project/llvm) + set(DEFAULT_LLPC_LLVM_SRC_PATH ${CMAKE_CURRENT_LIST_DIR}/../../llvm-project/llvm) + endif() + endif() + set(LLPC_LLVM_SRC_PATH ${DEFAULT_LLPC_LLVM_SRC_PATH} CACHE PATH "Specify the path to LLVM.") +endif() diff --git a/cmake/llpc_version.cmake b/cmake/llpc_version.cmake index c318af06d1..32d82f577e 100644 --- a/cmake/llpc_version.cmake +++ b/cmake/llpc_version.cmake @@ -25,6 +25,8 @@ set(LLPC_SOURCE_DIR "${CMAKE_CURRENT_LIST_DIR}/..") +include("${LLPC_SOURCE_DIR}/cmake/findllvm.cmake") + macro(add_llpc_version_projects) if (NOT TARGET llpc_version) # Force the binary directory to account for the possibility that LLPC is diff --git a/cmake/llvm.cmake b/cmake/llvm.cmake new file mode 100644 index 0000000000..ee26b47a75 --- /dev/null +++ b/cmake/llvm.cmake @@ -0,0 +1,129 @@ +## + ####################################################################################################################### + # + # Copyright (c) 2024 Advanced Micro Devices, Inc. All Rights Reserved. + # + # Permission is hereby granted, free of charge, to any person obtaining a copy + # of this software and associated documentation files (the "Software"), to + # deal in the Software without restriction, including without limitation the + # rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + # sell copies of the Software, and to permit persons to whom the Software is + # furnished to do so, subject to the following conditions: + # + # The above copyright notice and this permission notice shall be included in all + # copies or substantial portions of the Software. + # + # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + # IN THE SOFTWARE. + # + ####################################################################################################################### + +# Build LLVM, using previously set up LLVM_EXTERNAL_PROJECTS and LLVM_EXTERNAL_*_SOURCE_DIR. +# Relies on findllvm.cmake being run first. + +if (NOT LLPC_LLVM_SRC_PATH) + message(FATAL_ERROR "No LLPC_LLVM_SRC_PATH specified") +endif() + +# Set cached options. +set(LLVMRAYTRACING_BUILD_TESTS ${LLPC_BUILD_TESTS}) +set(LLVM_TARGETS_TO_BUILD AMDGPU CACHE STRING "LLVM targets to build") +set(LLVM_BUILD_TESTS OFF CACHE BOOL "LLVM build tests") +set(LLVM_BUILD_TOOLS ${LLPC_BUILD_LLVM_TOOLS} CACHE BOOL "LLVM build tools") +set(LLVM_BUILD_UTILS OFF CACHE BOOL "LLVM build utils") +set(LLVM_INCLUDE_DOCS OFF CACHE BOOL "LLVM include docs") +set(LLVM_INCLUDE_EXAMPLES OFF CACHE BOOL "LLVM include examples") +set(LLVM_INCLUDE_GO_TESTS OFF CACHE BOOL "LLVM include go tests") +set(LLVM_INCLUDE_TESTS ${LLPC_BUILD_TESTS} CACHE BOOL "LLVM include tests") +set(LLVM_INCLUDE_TOOLS ON CACHE BOOL "LLVM include tools") +set(LLVM_INCLUDE_UTILS ON CACHE BOOL "LLVM include utils") +set(LLVM_ENABLE_TERMINFO OFF CACHE BOOL "LLVM enable terminfo") +set(LLVM_RAM_PER_TABLEGEN_JOB 4000 CACHE STRING "LLVM RAM per tablegen job") +set(LLVM_RAM_PER_LINK_JOB 5000 CACHE STRING "LLVM RAM per link job") +if(CMAKE_BUILD_TYPE_DEBUG) + # Build optimized version of llvm-tblgen even in debug builds, for faster build times. + set(LLVM_OPTIMIZED_TABLEGEN ON CACHE BOOL "Build optimized llvm-tblgen") +#if _WIN32 + if(LLVM_OPTIMIZED_TABLEGEN AND WIN32 AND (CMAKE_GENERATOR MATCHES "Ninja")) + # LLVM implements the Release build of llvm-tblgen as a cross-compile target, which fails to find + # our DK-based toolchain (created with amd_generate_msvc_toolchain). However, we can inject the toolchain + # argument into LLVM's add_custom_target that sets up this cross-compile build. + # See: llvm-project/llvm/cmake/modules/CrossCompile.cmake + set(CROSS_TOOLCHAIN_FLAGS_NATIVE "-DCMAKE_TOOLCHAIN_FILE=${CMAKE_TOOLCHAIN_FILE}" CACHE STRING + "Toolchain flags for native build" FORCE) + endif() +#endif +endif() + +# This will greatly speed up debug builds because we won't be listing all the symbols with llvm-nm. +set(LLVM_BUILD_LLVM_C_DYLIB OFF CACHE BOOL "LLVM build LLVM-C dylib") + +# Remove /nologo from CMAKE_RC_FLAGS to avoid getting an error from specifying it twice in LLVM. +if (CMAKE_RC_FLAGS) + string(REPLACE "/nologo" "" CMAKE_RC_FLAGS ${CMAKE_RC_FLAGS}) +endif() + +# Build LLVM. +if (NOT LLPC_LLVM_BUILD_PATH) + set(LLPC_LLVM_BUILD_PATH ${PROJECT_BINARY_DIR}/llvm) +endif() +if (ICD_BUILD_LLPC) + add_subdirectory(${LLPC_LLVM_SRC_PATH} ${LLPC_LLVM_BUILD_PATH}) +else() + add_subdirectory(${LLPC_LLVM_SRC_PATH} ${LLPC_LLVM_BUILD_PATH} EXCLUDE_FROM_ALL) +endif() + +# Get LLVMConfig onto cmake path. +list(APPEND CMAKE_MODULE_PATH + "${LLPC_LLVM_BUILD_PATH}/lib/cmake/llvm" + "${LLPC_LLVM_BUILD_PATH}/${CMAKE_CFG_INTDIR}/lib/cmake/llvm" # Workaround for VS generator with older LLVM. +) + +# Export LLVM build path for client driver. +# TODO: Change uses to LLPC_LLVM_BUILD_PATH. +set(XGL_LLVM_BUILD_PATH ${LLPC_LLVM_BUILD_PATH} PARENT_SCOPE) + +# Extract LLVM revision number for code outside the LLPC repository to use. +file(READ "${LLPC_LLVM_SRC_PATH}/include/llvm/Config/llvm-config.h.cmake" LLVM_CONFIG_HEADER) +string(REGEX MATCH "#define LLVM_MAIN_REVISION ([0-9]+)" "\\1" _ "${LLVM_CONFIG_HEADER}") +set(LLVM_MAIN_REVISION "${CMAKE_MATCH_1}") +set(LLVM_MAIN_REVISION ${LLVM_MAIN_REVISION} PARENT_SCOPE) + +# Some of the games using old versions of the tcmalloc lib are crashing +# when allocating aligned memory. C++17 enables aligned new by default, +# so we need to disable it to prevent those crashes. +if (ICD_BUILD_LLPC AND NOT WIN32) + llvm_map_components_to_libnames(llvm_libs + AMDGPUAsmParser + AMDGPUCodeGen + AMDGPUDisassembler + AMDGPUInfo + Analysis + BinaryFormat + Core + Coroutines + BitReader + BitWriter + CodeGen + InstCombine + ipo + IRPrinter + IRReader + Linker + LTO + MC + Passes + ScalarOpts + Support + Target + TransformUtils + ) + foreach (lib ${llvm_libs}) + target_compile_options(${lib} PRIVATE "-fno-aligned-new") + endforeach() +endif() diff --git a/cmake/vkgc.cmake b/cmake/vkgc.cmake new file mode 100644 index 0000000000..acde1624ca --- /dev/null +++ b/cmake/vkgc.cmake @@ -0,0 +1,113 @@ +## + ####################################################################################################################### + # + # Copyright (c) 2024 Advanced Micro Devices, Inc. All Rights Reserved. + # + # Permission is hereby granted, free of charge, to any person obtaining a copy + # of this software and associated documentation files (the "Software"), to + # deal in the Software without restriction, including without limitation the + # rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + # sell copies of the Software, and to permit persons to whom the Software is + # furnished to do so, subject to the following conditions: + # + # The above copyright notice and this permission notice shall be included in all + # copies or substantial portions of the Software. + # + # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + # AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + # IN THE SOFTWARE. + # + ####################################################################################################################### + +### Top-level VKGC Interface ### +add_library(vkgc INTERFACE) + +### VKGC header-only library ### +add_library(vkgc_headers INTERFACE) + +target_link_libraries(vkgc_headers INTERFACE llpc_version) + +### Options that affect the headers #################################################################################### +#if LLPC_BUILD_GFX11 +if(LLPC_BUILD_GFX11) + target_compile_definitions(vkgc_headers INTERFACE LLPC_BUILD_GFX11) +endif() +#endif + +#if LLPC_RAY_TRACING +if(LLPC_RAY_TRACING) + if(NOT LLPC_IS_STANDALONE) + target_compile_definitions(vkgc_headers INTERFACE HAVE_GPURT_SHIM) + endif() + + target_compile_definitions(vkgc_headers INTERFACE LLPC_RAY_TRACING) + target_compile_definitions(vkgc_headers INTERFACE GPURT_CLIENT_INTERFACE_MAJOR_VERSION=${GPURT_CLIENT_INTERFACE_MAJOR_VERSION}) +endif() +#endif + +target_link_libraries(vkgc INTERFACE vkgc_headers) + +### Expose header files ################################################################################################ +target_include_directories(vkgc_headers + INTERFACE + ${PROJECT_SOURCE_DIR}/include +) + +### external SPIRV headers ######################################################### +if (NOT SPIRV_HEADERS_PATH) + if(EXISTS ${PROJECT_SOURCE_DIR}/../SPIRV-Headers) + set(SPIRV_HEADERS_PATH ${PROJECT_SOURCE_DIR}/../SPIRV-Headers CACHE PATH "The path of SPIRV headers.") + elseif(EXISTS ${PROJECT_SOURCE_DIR}/../../../../SPIRV-Headers) + set(SPIRV_HEADERS_PATH ${PROJECT_SOURCE_DIR}/../../../../SPIRV-Headers CACHE PATH "The path of SPIRV headers.") + endif() +endif() + +### Interface Target ################################################################################################### +### SPIRV Interface ### +add_library(khronos_spirv_interface INTERFACE) + +if(EXISTS ${SPIRV_HEADERS_PATH}) + target_include_directories(khronos_spirv_interface + INTERFACE + ${SPIRV_HEADERS_PATH}/include + ${PROJECT_SOURCE_DIR}/include/khronos + ) + if (NOT SPIRV_HEADERS_PATH_INTERNAL) + target_compile_definitions(khronos_spirv_interface + INTERFACE + EXTERNAL_SPIRV_HEADERS=1 + ) + endif() +else() + target_include_directories(khronos_spirv_interface + INTERFACE + ${PROJECT_SOURCE_DIR}/include/khronos + ) +endif() + +if(LLPC_BUILD_TOOLS) +# SPVGEN +if(EXISTS ${PROJECT_SOURCE_DIR}/../spvgen) + set(XGL_SPVGEN_PATH ${PROJECT_SOURCE_DIR}/../spvgen CACHE PATH "Specify the path to SPVGEN.") +elseif(EXISTS ${PROJECT_SOURCE_DIR}/../xgl/tools/spvgen) + set(XGL_SPVGEN_PATH ${PROJECT_SOURCE_DIR}/../xgl/tools/spvgen CACHE PATH "Specify the path to SPVGEN.") +else() + set(XGL_SPVGEN_PATH ${PROJECT_SOURCE_DIR}/../../../tools/spvgen CACHE PATH "Specify the path to SPVGEN.") +endif() + +if(EXISTS ${XGL_SPVGEN_PATH}) + set(XGL_SPVGEN_BUILD_PATH ${CMAKE_BINARY_DIR}/spvgen) + add_subdirectory(${XGL_SPVGEN_PATH} ${XGL_SPVGEN_BUILD_PATH} EXCLUDE_FROM_ALL) +endif() + +endif(LLPC_BUILD_TOOLS) + +if(ICD_BUILD_LLPC) + # Generate Strings for LLPC standalone tool and vkgc_gpurtshim + add_subdirectory(util ${PROJECT_BINARY_DIR}/util) + add_subdirectory(gfxruntime ${PROJECT_BINARY_DIR}/gfxruntime) +endif() diff --git a/compilerutils/CMakeLists.txt b/compilerutils/CMakeLists.txt index 5e6eb5b0b0..8ea17ab716 100644 --- a/compilerutils/CMakeLists.txt +++ b/compilerutils/CMakeLists.txt @@ -15,6 +15,9 @@ add_llvm_library(LLVMCompilerUtils lib/ArgPromotion.cpp lib/CompilerUtils.cpp lib/DxilToLlvm.cpp + lib/IRSerializationUtils.cpp + lib/MbStandardInstrumentations.cpp + lib/ModuleBunch.cpp lib/TypeLowering.cpp lib/TypesMetadata.cpp lib/ValueOriginTracking.cpp @@ -28,6 +31,8 @@ add_llvm_library(LLVMCompilerUtils LINK_COMPONENTS Analysis Core + IPO + Passes Support TransformUtils ) diff --git a/compilerutils/include/compilerutils/CompilerUtils.h b/compilerutils/include/compilerutils/CompilerUtils.h index 200bbd1053..c66576bcc2 100644 --- a/compilerutils/include/compilerutils/CompilerUtils.h +++ b/compilerutils/include/compilerutils/CompilerUtils.h @@ -82,6 +82,9 @@ void createUnreachable(llvm::IRBuilder<> &b); // Specifies a memory that is loaded is the last use. void setIsLastUseLoad(llvm::LoadInst &Load); +// Handle early returns, ensure the function has only one return instruction +llvm::ReturnInst *unifyReturns(llvm::Function &function, llvm::IRBuilder<> &builder, const llvm::Twine &blockName = ""); + struct CrossModuleInlinerResult { llvm::Value *returnValue; llvm::iterator_range newBBs; diff --git a/compilerutils/include/compilerutils/IRSerializationUtils.h b/compilerutils/include/compilerutils/IRSerializationUtils.h new file mode 100644 index 0000000000..b6cda6761c --- /dev/null +++ b/compilerutils/include/compilerutils/IRSerializationUtils.h @@ -0,0 +1,58 @@ +/* + *********************************************************************************************************************** + * + * Copyright (c) 2024 Advanced Micro Devices, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + **********************************************************************************************************************/ + +//===- IRSerializationUtils.h - Library for compiler frontends ------------===// +// +// Implements several shared helper functions for dumping IR in various forms +// including to DOT files and LL. +// +//===----------------------------------------------------------------------===// + +#ifndef IRSERIALIZATIONUTILS_H +#define IRSERIALIZATIONUTILS_H + +#include "llvm/ADT/StringRef.h" +#include "llvm/IR/Function.h" +#include "llvm/IR/Module.h" + +namespace irserializationutils { + +// Returns an MD5 hash of the module LL. This is returned as a string so it can +// be used as part of a filename. +std::string getModuleHashStr(const llvm::Module &m); + +// Writes a DOT file with the CFG of the function. The filename is: +// FilenamePrefix.FuncName.Hash.dot where FuncName is determined by demangling +// the DXIL function name, and Hash is given by getModuleHashStr. +// Set cfgOnly = false to include instructions within the BBs. +void writeCFGToDotFile(const llvm::Function &f, llvm::StringRef filenamePrefix = "cfg", bool cfgOnly = true); + +// Writes an LL file with the module. The filename is: +// FilenamePrefix.Hash.ll where Hash is given by getModuleHashStr. +void writeModuleToLLFile(const llvm::Module &m, llvm::StringRef filenamePrefix = "module"); + +} // namespace irserializationutils + +#endif diff --git a/lgc/interface/lgc/MbStandardInstrumentations.h b/compilerutils/include/compilerutils/MbStandardInstrumentations.h similarity index 91% rename from lgc/interface/lgc/MbStandardInstrumentations.h rename to compilerutils/include/compilerutils/MbStandardInstrumentations.h index f2fabf78d9..d86f52318b 100644 --- a/lgc/interface/lgc/MbStandardInstrumentations.h +++ b/compilerutils/include/compilerutils/MbStandardInstrumentations.h @@ -30,7 +30,7 @@ #pragma once -#include "lgc/ModuleBunch.h" +#include "compilerutils/ModuleBunch.h" #include "llvm/Passes/StandardInstrumentations.h" namespace llvm { @@ -116,14 +116,7 @@ class MbStandardInstrumentations { // Register all the standard instrumentation callbacks. If \p FAM is nullptr // then PreservedCFGChecker is not enabled. - void registerCallbacks(PassInstrumentationCallbacks &PIC, -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 454783 - // Old version of the code - FunctionAnalysisManager *FAM = nullptr); -#else - // New version of the code (also handles unknown version, which we treat as latest) - ModuleAnalysisManager *MAM = nullptr); -#endif + void registerCallbacks(PassInstrumentationCallbacks &PIC, ModuleAnalysisManager *MAM = nullptr); TimePassesHandler &getTimePasses() { return TimePasses; } }; diff --git a/lgc/interface/lgc/ModuleBunch.h b/compilerutils/include/compilerutils/ModuleBunch.h similarity index 98% rename from lgc/interface/lgc/ModuleBunch.h rename to compilerutils/include/compilerutils/ModuleBunch.h index dbc5c81404..2bfe8cabcd 100644 --- a/lgc/interface/lgc/ModuleBunch.h +++ b/compilerutils/include/compilerutils/ModuleBunch.h @@ -88,7 +88,6 @@ class ModuleBunch { // Dump the module to stderr (for debugging). void dump() const; -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 494698 // API used by PassManager.h. void setIsNewDbgInfoFormat(bool UseNewFormat) { IsNewDbgInfoFormat = UseNewFormat; @@ -99,7 +98,6 @@ class ModuleBunch { // Public field used by PassManager.h. bool IsNewDbgInfoFormat = false; -#endif private: SmallVector> Modules; @@ -171,12 +169,8 @@ class ModuleBunchToModulePassAdaptor : public PassInfoMixin std::unique_ptr createForModuleBunchToModulePassAdaptor(ModulePassT Pass) { -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 488550 - using PassModelT = detail::PassModel; -#else // Analysis are always preserved. using PassModelT = detail::PassModel; -#endif return std::unique_ptr(new PassModelT(std::forward(Pass))); } diff --git a/compilerutils/lib/CompilerUtils.cpp b/compilerutils/lib/CompilerUtils.cpp index 8590a6fe90..c301c95a13 100644 --- a/compilerutils/lib/CompilerUtils.cpp +++ b/compilerutils/lib/CompilerUtils.cpp @@ -27,6 +27,7 @@ #include "ValueOriginTrackingTestPass.h" #include "ValueSpecializationTestPass.h" #include "compilerutils/DxilToLlvm.h" +#include "compilerutils/DxilUtils.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/iterator_range.h" #include "llvm/IR/Attributes.h" @@ -124,10 +125,8 @@ Function *CompilerUtils::cloneFunctionHeader(Function &f, FunctionType *newType, } else { // Insert new function before f to facilitate writing tests f.getParent()->getFunctionList().insert(f.getIterator(), newFunc); -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 489715 // If targetModule is null then take flag from original function. newFunc->setIsNewDbgInfoFormat(f.IsNewDbgInfoFormat); -#endif } newFunc->copyAttributesFrom(&f); @@ -163,6 +162,64 @@ void CompilerUtils::setIsLastUseLoad(llvm::LoadInst &Load) { Load.setMetadata(MDIsLastUseName, MDTuple::get(Load.getContext(), {})); } +// ===================================================================================================================== +// Ensures that the given function has a single, unified return point. This function modifies the LLVM IR to create a +// single return block for functions with multiple return statements. +// +// @param function: The Function to modify +// @param builder: An IRBuilder instance used for inserting new instructions +// @param blockName: The name to give to the new unified return block +llvm::ReturnInst *CompilerUtils::unifyReturns(Function &function, llvm::IRBuilder<> &builder, const Twine &blockName) { + SmallVector retInsts; + + for (BasicBlock &block : function) { + if (auto *retInst = dyn_cast(block.getTerminator())) + retInsts.push_back(retInst); + } + + // It is expected when unifyReturns is called, the input function should not be empty, it is expected to have at + // least one return instruction. + assert(!retInsts.empty() && "Function has no return instruction"); + if (retInsts.size() == 1) { + return retInsts[0]; + } + + // There are more than 2 returns; create a unified return block. + // + // Also create a "unified return block" if there are no returns at all. Such a shader will surely hang or otherwise + // trigger UB if it is ever executed, but we still need to compile it correctly in case it never runs. + BasicBlock *retBlock = BasicBlock::Create(builder.getContext(), blockName, &function); + Type *returnType = function.getReturnType(); + PHINode *phiNode = nullptr; + + // If the function has multiple returns and a non-void return type, create a PHI node to collect the return values + // from different paths. + if (!returnType->isVoidTy()) { + builder.SetInsertPoint(retBlock); + phiNode = builder.CreatePHI(returnType, retInsts.size(), "retval"); + } + + for (ReturnInst *retInst : retInsts) { + BasicBlock *predBlock = retInst->getParent(); + Value *retVal = retInst->getReturnValue(); + + builder.SetInsertPoint(retInst); + builder.CreateBr(retBlock); + + if (phiNode) + phiNode->addIncoming(retVal, predBlock); + + retInst->eraseFromParent(); + } + + builder.SetInsertPoint(retBlock); + + if (returnType->isVoidTy()) + return builder.CreateRetVoid(); + else + return builder.CreateRet(phiNode); +} + namespace { // Map Types from source to target module. @@ -295,17 +352,13 @@ iterator_range CompilerUtils::CrossModuleInliner::inlineCall // Copy code InlineFunctionInfo ifi; -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 489715 // calleeFunc is not from targetMod, check if we need to convert it. bool shouldConvert = !calleeFunc->IsNewDbgInfoFormat && targetMod->IsNewDbgInfoFormat; if (shouldConvert) calleeFunc->convertToNewDbgValues(); -#endif auto res = InlineFunction(cb, ifi); -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 489715 if (shouldConvert) calleeFunc->convertFromNewDbgValues(); -#endif if (!res.isSuccess()) report_fatal_error(Twine("Failed to inline ") + calleeFunc->getName() + ": " + res.getFailureReason()); @@ -475,13 +528,7 @@ std::string CrossModuleInliner::getCrossModuleName(GlobalValue &gv) { } PointerType *llvm::getWithSamePointeeType(PointerType *ptrTy, unsigned addressSpace) { -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 482880 - return PointerType::getWithSamePointeeType(ptrTy, addressSpace); -#else - // New version of the code (also handles unknown version, which we treat as - // latest) return PointerType::get(ptrTy->getContext(), addressSpace); -#endif } void CrossModuleInliner::checkTargetModule(llvm::Module &targetModule) { diff --git a/compilerutils/lib/IRSerializationUtils.cpp b/compilerutils/lib/IRSerializationUtils.cpp new file mode 100644 index 0000000000..625207add1 --- /dev/null +++ b/compilerutils/lib/IRSerializationUtils.cpp @@ -0,0 +1,98 @@ +/* + *********************************************************************************************************************** + * + * Copyright (c) 2024 Advanced Micro Devices, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to + * deal in the Software without restriction, including without limitation the + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + **********************************************************************************************************************/ +#include "compilerutils/IRSerializationUtils.h" +#include "compilerutils/DxilUtils.h" +#include "llvm/Analysis/CFGPrinter.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/GraphWriter.h" +#include "llvm/Support/MD5.h" +#include +#include + +using namespace llvm; +using namespace irserializationutils; + +// Returns an MD5 hash of the module LL. This is returned as a string so it can +// be used as part of a filename. +std::string irserializationutils::getModuleHashStr(const Module &m) { + std::string moduleStr; + raw_string_ostream os(moduleStr); + os << m; + + MD5 hash; + MD5::MD5Result result; + hash.update(moduleStr); + hash.final(result); + + SmallString<32> resStr; + MD5::stringifyResult(result, resStr); + std::stringstream hexStream; + for (char value : resStr) + hexStream << std::hex << value; + + return hexStream.str(); +} + +static void writeToHashedOutputFile(const Module &m, StringRef filenamePrefix, StringRef filenameExt, + std::function callback) { + // LLVM_DEBUG is not used in this function because the call will already be + // guarded by a DEBUG macro, such as: DEBUG_WITH_TYPE(...); + + auto hash = getModuleHashStr(m); + auto fullName = filenamePrefix + "." + hash + "." + filenameExt; + + // If a file with an identical hash exists then we don't need to write it + // again. + if (sys::fs::exists(fullName)) + return; + + std::error_code ec; + raw_fd_ostream file(fullName.str(), ec, sys::fs::OF_Text); + + if (ec) { + errs() << "Error opening " << fullName << " : " << ec.message() << "\n"; + return; + } + + callback(file); + + dbgs() << "Wrote file '" << fullName << "'\n"; +} + +void irserializationutils::writeCFGToDotFile(const Function &f, StringRef filenamePrefix, bool cfgOnly) { + // LLVM_DEBUG is not used in this function because the call will already be + // guarded by a DEBUG macro, such as: DEBUG_WITH_TYPE(...); + auto funcName = CompilerUtils::dxil::tryDemangleFunctionName(f.getName()); + auto filenamePrefixFuncName = filenamePrefix.str() + "." + funcName.str(); + + writeToHashedOutputFile(*f.getParent(), filenamePrefixFuncName, "dot", [&](raw_fd_ostream &file) { + DOTFuncInfo cfgInfo(&f); + WriteGraph(file, &cfgInfo, cfgOnly); + }); +} + +void irserializationutils::writeModuleToLLFile(const Module &m, StringRef filenamePrefix) { + writeToHashedOutputFile(m, filenamePrefix, "ll", [&](raw_fd_ostream &file) { file << m; }); +} diff --git a/lgc/util/MbStandardInstrumentations.cpp b/compilerutils/lib/MbStandardInstrumentations.cpp similarity index 95% rename from lgc/util/MbStandardInstrumentations.cpp rename to compilerutils/lib/MbStandardInstrumentations.cpp index af7ddcc8ee..6ac50aa3e9 100644 --- a/lgc/util/MbStandardInstrumentations.cpp +++ b/compilerutils/lib/MbStandardInstrumentations.cpp @@ -28,7 +28,7 @@ // Most code here is copied from LLVM's StandardInstrumentations.cpp and // edited. -#include "lgc/MbStandardInstrumentations.h" +#include "compilerutils/MbStandardInstrumentations.h" #include "llvm/IR/PrintPasses.h" #include "llvm/IR/Verifier.h" #include "llvm/Support/FormatVariadic.h" @@ -444,28 +444,14 @@ MbStandardInstrumentations::MbStandardInstrumentations(bool DebugLogging, bool V } // Copied from LLVM's StandardInstrumentations.cpp and edited. -void MbStandardInstrumentations::registerCallbacks( -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 454783 - // Old version of the code - PassInstrumentationCallbacks &PIC, FunctionAnalysisManager *FAM) { -#else - // New version of the code (also handles unknown version, which we treat as latest) - PassInstrumentationCallbacks &PIC, ModuleAnalysisManager *MAM) { -#endif +void MbStandardInstrumentations::registerCallbacks(PassInstrumentationCallbacks &PIC, ModuleAnalysisManager *MAM) { PrintIR.registerCallbacks(PIC); PrintPass.registerCallbacks(PIC); TimePasses.registerCallbacks(PIC); OptNone.registerCallbacks(PIC); // OptPassGate.registerCallbacks(PIC); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 454783 - // Old version of the code - if (FAM) - PreservedCFGChecker.registerCallbacks(PIC, *FAM); -#else - // New version of the code (also handles unknown version, which we treat as latest) if (MAM) PreservedCFGChecker.registerCallbacks(PIC, *MAM); -#endif PrintChangedIR.registerCallbacks(PIC); PseudoProbeVerification.registerCallbacks(PIC); if (VerifyEach) diff --git a/lgc/util/ModuleBunch.cpp b/compilerutils/lib/ModuleBunch.cpp similarity index 99% rename from lgc/util/ModuleBunch.cpp rename to compilerutils/lib/ModuleBunch.cpp index 0ecf4be684..a0ed6638f3 100644 --- a/lgc/util/ModuleBunch.cpp +++ b/compilerutils/lib/ModuleBunch.cpp @@ -26,7 +26,7 @@ // The ModuleBunch class, representing a bunch of modules, and a pass manager // and analysis manager for it allowing you to run passes on it. -#include "lgc/ModuleBunch.h" +#include "compilerutils/ModuleBunch.h" #include "llvm/IR/PassManagerImpl.h" #include "llvm/IR/PrintPasses.h" #include "llvm/Support/FormatVariadic.h" diff --git a/imported/llvm-dialects b/imported/llvm-dialects index c436594690..50e4ca3a5c 160000 --- a/imported/llvm-dialects +++ b/imported/llvm-dialects @@ -1 +1 @@ -Subproject commit c4365946902436063f872dbcf1a370fe73982a54 +Subproject commit 50e4ca3a5c365b0bde36b122cc34256406723049 diff --git a/include/khronos/spirv/GLSL.ext.AMD.h b/include/khronos/spirv/GLSL.ext.AMD.h new file mode 100644 index 0000000000..ba7f636425 --- /dev/null +++ b/include/khronos/spirv/GLSL.ext.AMD.h @@ -0,0 +1,87 @@ +/* +** Copyright (c) 2014-2016 The Khronos Group Inc. +** +** Permission is hereby granted, free of charge, to any person obtaining a copy +** of this software and/or associated documentation files (the "Materials"), +** to deal in the Materials without restriction, including without limitation +** the rights to use, copy, modify, merge, publish, distribute, sublicense, +** and/or sell copies of the Materials, and to permit persons to whom the +** Materials are furnished to do so, subject to the following conditions: +** +** The above copyright notice and this permission notice shall be included in +** all copies or substantial portions of the Materials. +** +** MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS +** STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND +** HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/ +** +** THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS +** OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +** FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +** THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +** LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +** FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS +** IN THE MATERIALS. +*/ + +#ifndef GLSLextAMD_H +#define GLSLextAMD_H + +enum BuiltIn; +enum Capability; +enum Decoration; +enum Op; + +static const int GLSLextAMDVersion = 100; +static const int GLSLextAMDRevision = 8; + +// SPV_AMD_shader_ballot +enum ShaderBallotAMD { + ShaderBallotBadAMD = 0, // Don't use + + SwizzleInvocationsAMD = 1, + SwizzleInvocationsMaskedAMD = 2, + WriteInvocationAMD = 3, + MbcntAMD = 4, + + ShaderBallotCountAMD +}; + +// SPV_AMD_shader_trinary_minmax +enum ShaderTrinaryMinMaxAMD { + ShaderTrinaryMinMaxBadAMD = 0, // Don't use + + FMin3AMD = 1, + UMin3AMD = 2, + SMin3AMD = 3, + FMax3AMD = 4, + UMax3AMD = 5, + SMax3AMD = 6, + FMid3AMD = 7, + UMid3AMD = 8, + SMid3AMD = 9, + + ShaderTrinaryMinMaxCountAMD +}; + +// SPV_AMD_shader_explicit_vertex_parameter +enum ShaderExplicitVertexParameterAMD { + ShaderExplicitVertexParameterBadAMD = 0, // Don't use + + InterpolateAtVertexAMD = 1, + + ShaderExplicitVertexParameterCountAMD +}; + +// SPV_AMD_gcn_shader +enum GcnShaderAMD { + GcnShaderBadAMD = 0, // Don't use + + CubeFaceIndexAMD = 1, + CubeFaceCoordAMD = 2, + TimeAMD = 3, + + GcnShaderCountAMD +}; + +#endif // #ifndef GLSLextAMD_H diff --git a/include/khronos/spirv/spirv.hpp b/include/khronos/spirv/spirv.hpp index 1065013035..d4485d26c8 100644 --- a/include/khronos/spirv/spirv.hpp +++ b/include/khronos/spirv/spirv.hpp @@ -174,6 +174,7 @@ enum ExecutionMode { ExecutionModeEarlyAndLateFragmentTestsAMD = 5017, ExecutionModeStencilRefReplacingEXT = 5027, ExecutionModeCoalescingAMDX = 5069, + ExecutionModeIsApiEntryAMDX = 5070, ExecutionModeMaxNodeRecursionAMDX = 5071, ExecutionModeStaticNumWorkgroupsAMDX = 5072, ExecutionModeShaderIndexAMDX = 5073, @@ -186,6 +187,7 @@ enum ExecutionMode { ExecutionModeStencilRefLessBackAMD = 5084, ExecutionModeQuadDerivativesKHR = 5088, ExecutionModeRequireFullQuadsKHR = 5089, + ExecutionModeSharesInputWithAMDX = 5102, ExecutionModeOutputLinesEXT = 5269, ExecutionModeOutputLinesNV = 5269, ExecutionModeOutputPrimitivesEXT = 5270, @@ -239,7 +241,6 @@ enum StorageClass { StorageClassStorageBuffer = 12, StorageClassTileImageEXT = 4172, StorageClassNodePayloadAMDX = 5068, - StorageClassNodeOutputPayloadAMDX = 5076, StorageClassCallableDataKHR = 5328, StorageClassCallableDataNV = 5328, StorageClassIncomingCallableDataKHR = 5329, @@ -552,6 +553,10 @@ enum Decoration { DecorationNodeMaxPayloadsAMDX = 5020, DecorationTrackFinishWritingAMDX = 5078, DecorationPayloadNodeNameAMDX = 5091, + DecorationPayloadNodeBaseIndexAMDX = 5098, + DecorationPayloadNodeSparseArrayAMDX = 5099, + DecorationPayloadNodeArraySizeAMDX = 5100, + DecorationPayloadDispatchIndirectAMDX = 5105, DecorationOverrideCoverageNV = 5248, DecorationPassthroughNV = 5250, DecorationViewportRelativeNV = 5252, @@ -715,7 +720,7 @@ enum BuiltIn { BuiltInBaryCoordSmoothSampleAMD = 4997, BuiltInBaryCoordPullModelAMD = 4998, BuiltInFragStencilRefEXT = 5014, - BuiltInCoalescedInputCountAMDX = 5021, + BuiltInRemainingRecursionLevelsAMDX = 5021, BuiltInShaderIndexAMDX = 5073, BuiltInViewportMaskNV = 5253, BuiltInSecondaryPositionNV = 5257, @@ -1846,9 +1851,14 @@ enum Op { OpFragmentMaskFetchAMD = 5011, OpFragmentFetchAMD = 5012, OpReadClockKHR = 5056, - OpFinalizeNodePayloadsAMDX = 5075, + OpAllocateNodePayloadsAMDX = 5074, + OpEnqueueNodePayloadsAMDX = 5075, + OpTypeNodePayloadArrayAMDX = 5076, OpFinishWritingNodePayloadAMDX = 5078, - OpInitializeNodePayloadsAMDX = 5090, + OpNodePayloadArrayLengthAMDX = 5090, + OpIsNodePayloadValidAMDX = 5101, + OpConstantStringAMDX = 5103, + OpSpecConstantStringAMDX = 5104, OpGroupNonUniformQuadAllKHR = 5110, OpGroupNonUniformQuadAnyKHR = 5111, OpHitObjectRecordHitMotionNV = 5249, @@ -2597,9 +2607,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { case OpFragmentMaskFetchAMD: *hasResult = true; *hasResultType = true; break; case OpFragmentFetchAMD: *hasResult = true; *hasResultType = true; break; case OpReadClockKHR: *hasResult = true; *hasResultType = true; break; - case OpFinalizeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; + case OpAllocateNodePayloadsAMDX: *hasResult = true; *hasResultType = true; break; + case OpEnqueueNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; + case OpTypeNodePayloadArrayAMDX: *hasResult = true; *hasResultType = false; break; case OpFinishWritingNodePayloadAMDX: *hasResult = true; *hasResultType = true; break; - case OpInitializeNodePayloadsAMDX: *hasResult = false; *hasResultType = false; break; + case OpNodePayloadArrayLengthAMDX: *hasResult = true; *hasResultType = true; break; + case OpIsNodePayloadValidAMDX: *hasResult = true; *hasResultType = true; break; + case OpConstantStringAMDX: *hasResult = true; *hasResultType = false; break; + case OpSpecConstantStringAMDX: *hasResult = true; *hasResultType = false; break; case OpGroupNonUniformQuadAllKHR: *hasResult = true; *hasResultType = true; break; case OpGroupNonUniformQuadAnyKHR: *hasResult = true; *hasResultType = true; break; case OpHitObjectRecordHitMotionNV: *hasResult = false; *hasResultType = false; break; @@ -3040,6 +3055,7 @@ inline const char* ExecutionModeToString(ExecutionMode value) { case ExecutionModeEarlyAndLateFragmentTestsAMD: return "EarlyAndLateFragmentTestsAMD"; case ExecutionModeStencilRefReplacingEXT: return "StencilRefReplacingEXT"; case ExecutionModeCoalescingAMDX: return "CoalescingAMDX"; + case ExecutionModeIsApiEntryAMDX: return "IsApiEntryAMDX"; case ExecutionModeMaxNodeRecursionAMDX: return "MaxNodeRecursionAMDX"; case ExecutionModeStaticNumWorkgroupsAMDX: return "StaticNumWorkgroupsAMDX"; case ExecutionModeShaderIndexAMDX: return "ShaderIndexAMDX"; @@ -3052,6 +3068,7 @@ inline const char* ExecutionModeToString(ExecutionMode value) { case ExecutionModeStencilRefLessBackAMD: return "StencilRefLessBackAMD"; case ExecutionModeQuadDerivativesKHR: return "QuadDerivativesKHR"; case ExecutionModeRequireFullQuadsKHR: return "RequireFullQuadsKHR"; + case ExecutionModeSharesInputWithAMDX: return "SharesInputWithAMDX"; case ExecutionModeOutputLinesEXT: return "OutputLinesEXT"; case ExecutionModeOutputPrimitivesEXT: return "OutputPrimitivesEXT"; case ExecutionModeDerivativeGroupQuadsKHR: return "DerivativeGroupQuadsKHR"; @@ -3102,7 +3119,6 @@ inline const char* StorageClassToString(StorageClass value) { case StorageClassStorageBuffer: return "StorageBuffer"; case StorageClassTileImageEXT: return "TileImageEXT"; case StorageClassNodePayloadAMDX: return "NodePayloadAMDX"; - case StorageClassNodeOutputPayloadAMDX: return "NodeOutputPayloadAMDX"; case StorageClassCallableDataKHR: return "CallableDataKHR"; case StorageClassIncomingCallableDataKHR: return "IncomingCallableDataKHR"; case StorageClassRayPayloadKHR: return "RayPayloadKHR"; @@ -3354,6 +3370,10 @@ inline const char* DecorationToString(Decoration value) { case DecorationNodeMaxPayloadsAMDX: return "NodeMaxPayloadsAMDX"; case DecorationTrackFinishWritingAMDX: return "TrackFinishWritingAMDX"; case DecorationPayloadNodeNameAMDX: return "PayloadNodeNameAMDX"; + case DecorationPayloadNodeBaseIndexAMDX: return "PayloadNodeBaseIndexAMDX"; + case DecorationPayloadNodeSparseArrayAMDX: return "PayloadNodeSparseArrayAMDX"; + case DecorationPayloadNodeArraySizeAMDX: return "PayloadNodeArraySizeAMDX"; + case DecorationPayloadDispatchIndirectAMDX: return "PayloadDispatchIndirectAMDX"; case DecorationOverrideCoverageNV: return "OverrideCoverageNV"; case DecorationPassthroughNV: return "PassthroughNV"; case DecorationViewportRelativeNV: return "ViewportRelativeNV"; @@ -3507,7 +3527,7 @@ inline const char* BuiltInToString(BuiltIn value) { case BuiltInBaryCoordSmoothSampleAMD: return "BaryCoordSmoothSampleAMD"; case BuiltInBaryCoordPullModelAMD: return "BaryCoordPullModelAMD"; case BuiltInFragStencilRefEXT: return "FragStencilRefEXT"; - case BuiltInCoalescedInputCountAMDX: return "CoalescedInputCountAMDX"; + case BuiltInRemainingRecursionLevelsAMDX: return "RemainingRecursionLevelsAMDX"; case BuiltInShaderIndexAMDX: return "ShaderIndexAMDX"; case BuiltInViewportMaskNV: return "ViewportMaskNV"; case BuiltInSecondaryPositionNV: return "SecondaryPositionNV"; @@ -4394,9 +4414,14 @@ inline const char* OpToString(Op value) { case OpFragmentMaskFetchAMD: return "OpFragmentMaskFetchAMD"; case OpFragmentFetchAMD: return "OpFragmentFetchAMD"; case OpReadClockKHR: return "OpReadClockKHR"; - case OpFinalizeNodePayloadsAMDX: return "OpFinalizeNodePayloadsAMDX"; + case OpAllocateNodePayloadsAMDX: return "OpAllocateNodePayloadsAMDX"; + case OpEnqueueNodePayloadsAMDX: return "OpEnqueueNodePayloadsAMDX"; + case OpTypeNodePayloadArrayAMDX: return "OpTypeNodePayloadArrayAMDX"; case OpFinishWritingNodePayloadAMDX: return "OpFinishWritingNodePayloadAMDX"; - case OpInitializeNodePayloadsAMDX: return "OpInitializeNodePayloadsAMDX"; + case OpNodePayloadArrayLengthAMDX: return "OpNodePayloadArrayLengthAMDX"; + case OpIsNodePayloadValidAMDX: return "OpIsNodePayloadValidAMDX"; + case OpConstantStringAMDX: return "OpConstantStringAMDX"; + case OpSpecConstantStringAMDX: return "OpSpecConstantStringAMDX"; case OpGroupNonUniformQuadAllKHR: return "OpGroupNonUniformQuadAllKHR"; case OpGroupNonUniformQuadAnyKHR: return "OpGroupNonUniformQuadAnyKHR"; case OpHitObjectRecordHitMotionNV: return "OpHitObjectRecordHitMotionNV"; diff --git a/include/vkgcDefs.h b/include/vkgcDefs.h index 73ee3d7e77..01497ccec7 100644 --- a/include/vkgcDefs.h +++ b/include/vkgcDefs.h @@ -511,6 +511,7 @@ struct PipelineOptions { bool enableLineSmooth; ///< For OGL only, enable line smooth mode. bool emulateWideLineStipple; ///< For OGL only, enable line AA stipple. bool enablePointSmooth; ///< For OGL only, enable point smooth mode. + bool enableRemapLocation; ///< For OGL only, enables location remapping. const auto &getGlState() const { return *this; } #else struct GLState { @@ -529,6 +530,7 @@ struct PipelineOptions { bool enableLineSmooth; ///< For OGL only, enable line smooth mode. bool emulateWideLineStipple; ///< For OGL only, enable line AA stipple. bool enablePointSmooth; ///< For OGL only, enable point smooth mode. + bool enableRemapLocation; ///< For OGL only, enables location remapping. } glState; const auto &getGlState() const { return glState; } #endif @@ -930,6 +932,13 @@ struct PipelineShaderOptions { /// Application workaround: disable all fast math flags on gl_Position. bool disableGlPositionOpt; + + /// Specifies that any shader input variables decorated as ViewIndex + /// will be assigned values as if they were decorated as DeviceIndex. + bool viewIndexFromDeviceIndex; + + /// Indicate whether the vertex shader is used by transform pipeline + bool enableTransformShader; }; /// Represents YCbCr sampler meta data in resource descriptor @@ -1238,6 +1247,13 @@ struct UniformConstantMap { UniformConstantMapEntry *pUniforms; ///< Mapping of for uniform constant }; +/// Remaps output locations according to the location map. +struct OutputLocationMap { + uint32_t *oldLocation; ///< Pointer to an array of old output locations. + uint32_t *newLocation; ///< Pointer to an array of new remapped output locations. + uint32_t count; ///< Number of locations that have been remapped. +}; + /// Represents transform feedback info for the captured output struct XfbOutInfo { bool isBuiltIn; ///< Determine if it is a built-in output @@ -1350,6 +1366,7 @@ struct GraphicsPipelineBuildInfo { bool enableEarlyCompile; ///< Whether enable early compile bool useSoftwareVertexBufferDescriptors; ///< Use software vertex buffer descriptors to structure SRD. bool dynamicTopology; ///< Whether primitive topology is dynamic. + OutputLocationMap *outLocationMaps; ///< Array of location remapping pointers, sized by ShaderStageGfxCount. #if LLPC_CLIENT_INTERFACE_MAJOR_VERSION < 62 BinaryData shaderLibrary; ///< SPIR-V library binary data #endif diff --git a/lgc/CMakeLists.txt b/lgc/CMakeLists.txt index 7596d07991..f7a81abd85 100644 --- a/lgc/CMakeLists.txt +++ b/lgc/CMakeLists.txt @@ -123,6 +123,7 @@ target_sources(LLVMlgc PRIVATE builder/BuilderBase.cpp builder/BuilderImpl.cpp builder/BuilderRecorder.cpp + builder/BuilderRecorder.h builder/BuilderReplayer.cpp builder/DescBuilder.cpp builder/ImageBuilder.cpp @@ -131,15 +132,28 @@ target_sources(LLVMlgc PRIVATE builder/MiscBuilder.cpp builder/SubgroupBuilder.cpp builder/YCbCrAddressHandler.cpp + builder/YCbCrAddressHandler.h builder/YCbCrConverter.cpp + builder/YCbCrConverter.h +) + +# include/lgc/builder +target_sources(LLVMlgc PRIVATE + include/lgc/builder/BuilderImpl.h + include/lgc/builder/BuilderReplayer.h + include/lgc/builder/SubgroupBuilder.h ) # lgc/elfLinker target_sources(LLVMlgc PRIVATE elfLinker/ColorExportShader.cpp + elfLinker/ColorExportShader.h elfLinker/ElfLinker.cpp + elfLinker/ElfLinkerImpl.h elfLinker/GlueShader.cpp + elfLinker/GlueShader.h elfLinker/NullFragmentShader.cpp + elfLinker/NullFragmentShader.h ) # lgc/patch @@ -153,7 +167,7 @@ target_sources(LLVMlgc PRIVATE patch/LowerSubgroupOps.cpp patch/MeshTaskShader.cpp patch/NggPrimShader.cpp - patch/Patch.cpp + patch/LgcLowering.cpp patch/StructurizeBuffers.cpp patch/LowerBufferOperations.cpp patch/CheckShaderCache.cpp @@ -181,7 +195,7 @@ target_sources(LLVMlgc PRIVATE patch/VertexFetch.cpp patch/CollectImageOperations.cpp patch/RegisterMetadataBuilder.cpp -#if VKI_BUILD_STRIX1 +#if LLPC_BUILD_STRIX1 patch/WorkaroundDsSubdwordWrite.cpp #endif patch/CombineCooperativeMatrix.cpp @@ -190,6 +204,44 @@ target_sources(LLVMlgc PRIVATE patch/LowerRayQueryWrapper.cpp ) +# include/lgc/patch +target_sources(LLVMlgc PRIVATE + include/lgc/patch/AddLoopMetadata.h + include/lgc/patch/ApplyWorkarounds.h + include/lgc/patch/CheckShaderCache.h + include/lgc/patch/CollectImageOperations.h + include/lgc/patch/CollectResourceUsage.h + include/lgc/patch/CombineCooperativeMatrix.h + include/lgc/patch/Continufy.h + include/lgc/patch/FragmentColorExport.h + include/lgc/patch/GenerateCopyShader.h + include/lgc/patch/IncludeLlvmIr.h + include/lgc/patch/LgcLowering.h + include/lgc/patch/LowerBufferOperations.h + include/lgc/patch/LowerCooperativeMatrix.h + include/lgc/patch/LowerDebugPrintf.h + include/lgc/patch/LowerDesc.h + include/lgc/patch/LowerGpuRt.h + include/lgc/patch/LowerImageDerivatives.h + include/lgc/patch/LowerInOut.h + include/lgc/patch/LowerInvariantLoads.h + include/lgc/patch/LowerMulDx9Zero.h + include/lgc/patch/LowerReadFirstLane.h + include/lgc/patch/LowerSubgroupOps.h + include/lgc/patch/MutateEntryPoint.h + include/lgc/patch/PassthroughHullShader.h + include/lgc/patch/PatchInitializeWorkgroupMemory.h + include/lgc/patch/PeepholeOptimization.h + include/lgc/patch/PreparePipelineAbi.h + include/lgc/patch/ScalarizeLoads.h + include/lgc/patch/SetupTargetFeatures.h + include/lgc/patch/ShaderInputs.h + include/lgc/patch/StructurizeBuffers.h + include/lgc/patch/SystemValues.h + include/lgc/patch/VertexFetch.h + include/lgc/patch/WorkaroundDsSubdwordWrite.h +) + # lgc/state target_sources(LLVMlgc PRIVATE state/Compiler.cpp @@ -207,6 +259,22 @@ target_sources(LLVMlgc PRIVATE state/RuntimeContext.cpp ) +# include/lgc/state +target_sources(LLVMlgc PRIVATE + include/lgc/state/Abi.h + include/lgc/state/AbiMetadata.h + include/lgc/state/AbiUnlinked.h + include/lgc/state/Defs.h + include/lgc/state/IntrinsDefs.h + include/lgc/state/PalMetadata.h + include/lgc/state/PassManagerCache.h + include/lgc/state/PipelineShaders.h + include/lgc/state/PipelineState.h + include/lgc/state/ResourceUsage.h + include/lgc/state/ShaderStage.h + include/lgc/state/TargetInfo.h +) + # lgc/util target_sources(LLVMlgc PRIVATE util/AddressExtender.cpp @@ -214,8 +282,6 @@ target_sources(LLVMlgc PRIVATE util/GfxRegHandlerBase.cpp util/GfxRegHandler.cpp util/Internal.cpp - util/MbStandardInstrumentations.cpp - util/ModuleBunch.cpp util/MsgPackScanner.cpp util/PassManager.cpp util/RegStackUsage.cpp @@ -223,8 +289,37 @@ target_sources(LLVMlgc PRIVATE util/WorkgroupLayout.cpp ) +# include/lgc/util +target_sources(LLVMlgc PRIVATE + include/lgc/util/AddressExtender.h + include/lgc/util/BuilderBase.h + include/lgc/util/Debug.h + include/lgc/util/GfxRegHandler.h + include/lgc/util/GfxRegHandlerBase.h + include/lgc/util/Internal.h + include/lgc/util/MsgPackScanner.h + include/lgc/util/WorkgroupLayout.h +) + # lgc/interface/lgc -target_sources(LLVMlgc PRIVATE interface/lgc/LgcDialect.td) +target_sources(LLVMlgc PRIVATE + interface/lgc/Builder.h + interface/lgc/BuilderCommon.h + interface/lgc/BuiltInDefs.h + interface/lgc/BuiltIns.h + interface/lgc/CommonDefs.h + interface/lgc/Disassembler.h + interface/lgc/ElfLinker.h + interface/lgc/EnumIterator.h + interface/lgc/LgcContext.h + interface/lgc/LgcDialect.h + interface/lgc/PassManager.h + interface/lgc/Pipeline.h + interface/lgc/RayTracingLibrarySummary.h + interface/lgc/RegStackUsage.h + interface/lgc/RuntimeContext.h + interface/lgc/LgcDialect.td +) add_subdirectory(disassembler) add_subdirectory(tool/lgc) diff --git a/lgc/builder/ArithBuilder.cpp b/lgc/builder/ArithBuilder.cpp index a9c307efe8..7a12be6e97 100644 --- a/lgc/builder/ArithBuilder.cpp +++ b/lgc/builder/ArithBuilder.cpp @@ -737,13 +737,7 @@ Value *BuilderImpl::CreateLdexp(Value *x, Value *exp, const Twine &instName) { // We need to scalarize this ourselves. Value *result = scalarize(x, exp, [this](Value *x, Value *exp) { -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 463519 - // Old version of the code - Value *ldexp = CreateIntrinsic(Intrinsic::amdgcn_ldexp, x->getType(), {x, exp}); -#else - // New version of the code (also handles unknown version, which we treat as latest) Value *ldexp = CreateIntrinsic(x->getType(), Intrinsic::ldexp, {x, exp}); -#endif if (x->getType()->getScalarType()->isDoubleTy()) { // NOTE: If LDEXP result is a denormal, we can flush it to zero. This is allowed. For double type, LDEXP // instruction does mantissa rounding instead of truncation, which is not expected by SPIR-V spec. diff --git a/lgc/builder/BuilderBase.cpp b/lgc/builder/BuilderBase.cpp index 49458c0e4e..09300d1233 100644 --- a/lgc/builder/BuilderBase.cpp +++ b/lgc/builder/BuilderBase.cpp @@ -54,13 +54,7 @@ Value *BuilderCommon::CreatePtrDiff(Type *ty, Value *lhs, Value *rhs, const Twin Type *const rhsType = rhs->getType(); if (!lhsType->isPointerTy() || lhsType->getPointerAddressSpace() != ADDR_SPACE_BUFFER_FAT_POINTER || !rhsType->isPointerTy() || rhsType->getPointerAddressSpace() != ADDR_SPACE_BUFFER_FAT_POINTER) -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 412285 - // Old version of the code - return IRBuilderBase::CreatePtrDiff(lhs, rhs, instName); -#else - // New version of the code (also handles unknown version, which we treat as latest) return IRBuilderBase::CreatePtrDiff(ty, lhs, rhs, instName); -#endif Value *difference = create(lhs, rhs); return CreateExactSDiv(difference, ConstantExpr::getSizeOf(ty), instName); @@ -328,3 +322,19 @@ Value *BuilderCommon::CreateBuildVector(llvm::ArrayRef elements, vector = CreateInsertElement(vector, elements.back(), elements.size() - 1, instName); return vector; } + +// ===================================================================================================================== +// Create an "s_setreg" to set specified bits of a hardware register. +// +// @param hwRegId : The hardware register ID +// @param offset: The starting offset +// @param size: The size of bits +// @param value : The value to set to the register +// @param instName : Name to give instruction(s) +Instruction *BuilderBase::CreateSetReg(unsigned hwRegId, unsigned offset, unsigned size, llvm::Value *value, + const llvm::Twine &instName) { + assert(size > 0 && size <= 32); + assert(offset + size <= 32); + unsigned hwReg = hwRegId | offset << 6 | (size - 1) << 11; + return CreateIntrinsic(getVoidTy(), Intrinsic::amdgcn_s_setreg, {getInt32(hwReg), value}); +} diff --git a/lgc/builder/BuilderImpl.cpp b/lgc/builder/BuilderImpl.cpp index 3023c51823..febd09669c 100644 --- a/lgc/builder/BuilderImpl.cpp +++ b/lgc/builder/BuilderImpl.cpp @@ -311,13 +311,7 @@ BranchInst *BuilderCommon::CreateIf(Value *condition, bool wantElse, const Twine BasicBlock *ifBlock = BasicBlock::Create(getContext(), "", endIfBlock->getParent(), endIfBlock); ifBlock->takeName(endIfBlock); endIfBlock->setName(instName + ".endif"); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 445640 - // Old version of the code - ifBlock->getInstList().splice(ifBlock->end(), endIfBlock->getInstList(), endIfBlock->begin(), GetInsertPoint()); -#else - // New version of the code (also handles unknown version, which we treat as latest) ifBlock->splice(ifBlock->end(), endIfBlock, endIfBlock->begin(), GetInsertPoint()); -#endif // Replace non-phi uses of the original block with the new "if" block. SmallVector nonPhiUses; @@ -944,27 +938,17 @@ Instruction *BuilderImpl::createWaterfallLoop(Instruction *nonUniformInst, Array operandIdx, instName, traceNonUniformIndex); } else { Value *newIntrinsic = nonUniformInstOperand; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 463892 - // Old version of the code -#else // When the non-uniform use is in a VGPR, we can save a v_mov by not inserting the amdgcn_waterfall_readfirstlane if (!useVgprForOperands) -#endif - newIntrinsic = - CreateIntrinsic(Intrinsic::amdgcn_waterfall_readfirstlane, {nonUniformInstOperandTy, nonUniformInstOperandTy}, - {waterfallBegin, newIntrinsic}, nullptr, instName); + newIntrinsic = CreateIntrinsic(Intrinsic::amdgcn_waterfall_readfirstlane, + {nonUniformInstOperandTy, nonUniformInstOperandTy}, + {waterfallBegin, newIntrinsic}, nullptr, instName); if (nonUniformInst->getType()->isVoidTy()) { // The buffer/image operation we are waterfalling is a store with no return value. Use // llvm.amdgcn.waterfall.last.use on the descriptor. -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 463892 - // Old version of the code - newIntrinsic = CreateIntrinsic(Intrinsic::amdgcn_waterfall_last_use, nonUniformInstOperandTy, - {waterfallBegin, newIntrinsic}, nullptr, instName); -#else newIntrinsic = CreateIntrinsic(useVgprForOperands ? Intrinsic::amdgcn_waterfall_last_use_vgpr : Intrinsic::amdgcn_waterfall_last_use, nonUniformInstOperandTy, {waterfallBegin, newIntrinsic}, nullptr, instName); -#endif } // Replace the descriptor operand in the buffer/image operation. nonUniformInst->setOperand(operandIdx, newIntrinsic); diff --git a/lgc/builder/BuilderRecorder.cpp b/lgc/builder/BuilderRecorder.cpp index 6bec003577..78bb7138b3 100644 --- a/lgc/builder/BuilderRecorder.cpp +++ b/lgc/builder/BuilderRecorder.cpp @@ -1092,8 +1092,7 @@ Value *Builder::CreateLoadPushConstantsPtr(const Twine &instName) { // @param feedbackDesc : feedback descriptor // @param resourceDesc : resource descriptor Value *Builder::CreateSamplerFeedbackDesc(Value *feedbackDesc, Value *resourceDesc, const Twine &instName) { - return record(BuilderOpcode::SamplerFeedbackDesc, getDescTy(ResourceNodeType::DescriptorResource), - {feedbackDesc, resourceDesc}, instName); + return record(BuilderOpcode::SamplerFeedbackDesc, getDescPtrTy(), {feedbackDesc, resourceDesc}, instName); } // ===================================================================================================================== @@ -1102,7 +1101,7 @@ Value *Builder::CreateSamplerFeedbackDesc(Value *feedbackDesc, Value *resourceDe // @param resultTy : Result type // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor +// @param imageDesc : The pointer to the image descriptor // @param coord : Coordinates: scalar or vector i32 // @param mipLevel : Mipmap level if doing load_mip, otherwise nullptr // @param instName : Name to give instruction(s) @@ -1124,8 +1123,8 @@ Value *Builder::CreateImageLoad(Type *resultTy, unsigned dim, unsigned flags, Va // @param resultTy : Result type // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor -// @param fmaskDesc : Fmask descriptor +// @param imageDesc : The pointer to the image descriptor +// @param fmaskDesc : The pointer to the fmask descriptor // @param coord : Coordinates: scalar or vector i32, exactly right width for given dimension excluding sample // @param sampleNum : Sample number, i32 // @param instName : Name to give instruction(s) @@ -1141,7 +1140,7 @@ Value *Builder::CreateImageLoadWithFmask(Type *resultTy, unsigned dim, unsigned // @param texel : Texel value to store; v4f16 or v4f32 // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor +// @param imageDesc : The pointer to the image descriptor // @param coord : Coordinates: scalar or vector i32 // @param mipLevel : Mipmap level if doing load_mip, otherwise nullptr // @param instName : Name to give instruction(s) @@ -1164,8 +1163,8 @@ Value *Builder::CreateImageStore(Value *texel, unsigned dim, unsigned flags, Val // @param resultTy : Result type // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor -// @param samplerDesc : Sampler descriptor +// @param imageDesc : The pointer to the image descriptor +// @param samplerDesc : The pointer to the sampler descriptor // @param address : Address and other arguments // @param instName : Name to give instruction(s) Value *Builder::CreateImageSample(Type *resultTy, unsigned dim, unsigned flags, Value *imageDesc, Value *samplerDesc, @@ -1196,7 +1195,8 @@ Value *Builder::CreateImageSample(Type *resultTy, unsigned dim, unsigned flags, // @param resultTy : Result type // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDescArray : Image descriptor, or array of up to three descriptors for multi-plane +// @param imageDescArray : The pointer to the image descriptor, or array of up to three pointers to descriptors for +// multi-plane // @param convertingSamplerDesc : Converting sampler descriptor (constant v10i32) // @param address : Address and other arguments // @param instName : Name to give instruction(s) @@ -1229,8 +1229,8 @@ Value *Builder::CreateImageSampleConvert(Type *resultTy, unsigned dim, unsigned // @param resultTy : Result type // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor -// @param samplerDesc : Sampler descriptor +// @param imageDesc : The pointer to the image descriptor +// @param samplerDesc : The pointer to the sampler descriptor // @param address : Address and other arguments // @param instName : Name to give instruction(s) Value *Builder::CreateImageGather(Type *resultTy, unsigned dim, unsigned flags, Value *imageDesc, Value *samplerDesc, @@ -1262,7 +1262,7 @@ Value *Builder::CreateImageGather(Type *resultTy, unsigned dim, unsigned flags, // @param dim : Image dimension // @param flags : ImageFlag* flags // @param ordering : Atomic ordering -// @param imageDesc : Image descriptor +// @param imageDesc : The pointer to the image descriptor // @param coord : Coordinates: scalar or vector i32 // @param inputValue : Input value: i32 // @param instName : Name to give instruction(s) @@ -1280,7 +1280,7 @@ Value *Builder::CreateImageAtomic(unsigned atomicOp, unsigned dim, unsigned flag // @param dim : Image dimension // @param flags : ImageFlag* flags // @param ordering : Atomic ordering -// @param imageDesc : Image descriptor +// @param imageDesc : The pointer to the image descriptor // @param coord : Coordinates: scalar or vector i32 // @param inputValue : Input value: i32 // @param comparatorValue : Value to compare against: i32 @@ -1299,7 +1299,7 @@ Value *Builder::CreateImageAtomicCompareSwap(unsigned dim, unsigned flags, Atomi // // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor or texel buffer descriptor +// @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param instName : Name to give instruction(s) Value *Builder::CreateImageQueryLevels(unsigned dim, unsigned flags, Value *imageDesc, const Twine &instName) { return record(BuilderOpcode::ImageQueryLevels, getInt32Ty(), {getInt32(dim), getInt32(flags), imageDesc}, instName); @@ -1310,7 +1310,7 @@ Value *Builder::CreateImageQueryLevels(unsigned dim, unsigned flags, Value *imag // // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor or texel buffer descriptor +// @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param instName : Name to give instruction(s) Value *Builder::CreateImageQuerySamples(unsigned dim, unsigned flags, Value *imageDesc, const Twine &instName) { return record(BuilderOpcode::ImageQuerySamples, getInt32Ty(), {getInt32(dim), getInt32(flags), imageDesc}, instName); @@ -1322,7 +1322,7 @@ Value *Builder::CreateImageQuerySamples(unsigned dim, unsigned flags, Value *ima // // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor or texel buffer descriptor +// @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param lod : LOD // @param instName : Name to give instruction(s) Value *Builder::CreateImageQuerySize(unsigned dim, unsigned flags, Value *imageDesc, Value *lod, @@ -1341,8 +1341,8 @@ Value *Builder::CreateImageQuerySize(unsigned dim, unsigned flags, Value *imageD // // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor -// @param samplerDesc : Sampler descriptor +// @param imageDesc : The pointer to the image descriptor +// @param samplerDesc : The pointer to the sampler descriptor // @param coord : Coordinates // @param instName : Name to give instruction(s) Value *Builder::CreateImageGetLod(unsigned dim, unsigned flags, Value *imageDesc, Value *samplerDesc, Value *coord, @@ -1356,7 +1356,7 @@ Value *Builder::CreateImageGetLod(unsigned dim, unsigned flags, Value *imageDesc // // @param dim : Image dimension // @param flags : ImageFlag* flags -// @param imageDesc : Image descriptor or texel buffer descriptor +// @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param sampleId : Sample ID // @param instName : Name to give instruction(s) Value *Builder::CreateImageGetSamplePosition(unsigned dim, unsigned flags, Value *imageDesc, Value *sampleId, diff --git a/lgc/builder/ImageBuilder.cpp b/lgc/builder/ImageBuilder.cpp index df9123c523..4c01853832 100644 --- a/lgc/builder/ImageBuilder.cpp +++ b/lgc/builder/ImageBuilder.cpp @@ -536,7 +536,8 @@ static const Intrinsic::ID ImageAtomicIntrinsicTable[][8] = { {Intrinsic::amdgcn_image_atomic_fmax_1d, Intrinsic::amdgcn_image_atomic_fmax_2d, Intrinsic::amdgcn_image_atomic_fmax_3d, Intrinsic::amdgcn_image_atomic_fmax_cube, Intrinsic::amdgcn_image_atomic_fmax_1darray, Intrinsic::amdgcn_image_atomic_fmax_2darray, - Intrinsic::amdgcn_image_atomic_fmax_2dmsaa, Intrinsic::amdgcn_image_atomic_fmax_2darraymsaa}}; + Intrinsic::amdgcn_image_atomic_fmax_2dmsaa, Intrinsic::amdgcn_image_atomic_fmax_2darraymsaa}, +}; // ===================================================================================================================== // Convert an integer or vector of integer type to the equivalent (vector of) half/float/double @@ -572,6 +573,7 @@ static Type *convertToFloatingPointType(Type *origTy) { // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageLoad(Type *resultTy, unsigned dim, unsigned flags, Value *imageDesc, Value *coord, Value *mipLevel, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy()); if (isa(imageDesc)) return PoisonValue::get(resultTy); @@ -588,10 +590,11 @@ Value *BuilderImpl::CreateImageLoad(Type *resultTy, unsigned dim, unsigned flags texelTy = FixedVectorType::get(getHalfTy(), 4); } + const bool isUniformImage = isUniformDescriptor(imageDesc, flags, true); bool isTexelBuffer = (dim == Dim1DBuffer || dim == Dim1DArrayBuffer); - bool needFullDesc = texelTy != origTexelTy && origTexelTy->isIntOrIntVectorTy(64) && origTexelTy->isVectorTy() && - m_pipelineState->getOptions().allowNullDescriptor; - imageDesc = transformImageDesc(imageDesc, needFullDesc, isTexelBuffer, resultTy); + bool needFullDesc = + (isUniformImage || isTexelBuffer) ? true : isFullDescriptorNeeded(imageDesc, true, origTexelTy, texelTy); + imageDesc = transformImageDesc(imageDesc, needFullDesc, isTexelBuffer); const bool isVecTyDesc = imageDesc->getType()->isVectorTy(); if (isVecTyDesc) imageDesc = fixImageDescForRead(imageDesc); @@ -659,7 +662,7 @@ Value *BuilderImpl::CreateImageLoad(Type *resultTy, unsigned dim, unsigned flags args.push_back(getInt32(0)); args.push_back(getInt32(0)); args.push_back(getInt32(0)); - imageInst = CreateIntrinsic(Intrinsic::amdgcn_struct_buffer_load_format, intrinsicDataTy, args, nullptr, instName); + imageInst = CreateIntrinsic(intrinsicDataTy, Intrinsic::amdgcn_struct_buffer_load_format, args, nullptr, instName); } // Mark it as an invariant load if possible. @@ -668,7 +671,7 @@ Value *BuilderImpl::CreateImageLoad(Type *resultTy, unsigned dim, unsigned flags // Add a waterfall loop if needed. Value *result = imageInst; - if (imageDesc->getType()->isVectorTy()) { + if (imageDesc->getType()->isVectorTy() && !isUniformImage) { if (flags & ImageFlagNonUniformImage) result = createWaterfallLoop(imageInst, imageDescArgIndex, getPipelineState()->getShaderOptions(m_shaderStage.value()).scalarizeWaterfallLoads); @@ -742,6 +745,7 @@ Value *BuilderImpl::CreateImageLoad(Type *resultTy, unsigned dim, unsigned flags // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageLoadWithFmask(Type *resultTy, unsigned dim, unsigned flags, Value *imageDesc, Value *fmaskDesc, Value *coord, Value *sampleNum, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy() && fmaskDesc->getType()->isPointerTy()); if (isa(imageDesc)) return PoisonValue::get(resultTy); // Load texel from F-mask image. @@ -760,8 +764,10 @@ Value *BuilderImpl::CreateImageLoadWithFmask(Type *resultTy, unsigned dim, unsig // When the shadow table is disabled, we don't need to load F-mask descriptor if (m_pipelineState->getOptions().enableFmask && !isa(fmaskDesc)) { + m_isFmaskLoad = true; Value *fmaskTexel = CreateImageLoad(FixedVectorType::get(getInt32Ty(), 4), fmaskDim, flags, fmaskDesc, coord, nullptr, instName + ".fmaskload"); + m_isFmaskLoad = false; // Calculate the sample number we would use if the F-mask descriptor format is valid. Value *calcSampleNum = CreateExtractElement(fmaskTexel, uint64_t(0)); @@ -770,11 +776,10 @@ Value *BuilderImpl::CreateImageLoadWithFmask(Type *resultTy, unsigned dim, unsig calcSampleNum = CreateAnd(calcSampleNum, getInt32(15)); // Check whether the F-mask descriptor has a BUF_DATA_FORMAT_INVALID (0) format (dword[1].bit[20-25]). - if (!fmaskDesc->getType()->isVectorTy()) { - auto callInst = cast(fmaskTexel); - unsigned argIdx = callInst->arg_size() == 5 ? 0 : callInst->arg_size() - 3; - fmaskDesc = callInst->getArgOperand(argIdx); - } + assert(fmaskDesc->getType()->isPointerTy()); + auto callInst = cast(fmaskTexel); + unsigned argIdx = callInst->arg_size() == 5 ? 0 : callInst->arg_size() - 3; + fmaskDesc = callInst->getArgOperand(argIdx); Value *fmaskFormat = CreateExtractElement(fmaskDesc, 1); fmaskFormat = CreateAnd(fmaskFormat, getInt32(63 << 20)); Value *fmaskValidFormat = CreateICmpNE(fmaskFormat, getInt32(0)); @@ -802,6 +807,7 @@ Value *BuilderImpl::CreateImageLoadWithFmask(Type *resultTy, unsigned dim, unsig // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageStore(Value *texel, unsigned dim, unsigned flags, Value *imageDesc, Value *coord, Value *mipLevel, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy()); if (isa(imageDesc)) return PoisonValue::get(texel->getType()); // Mark usage of images, to allow the compute workgroup reconfiguration optimization. @@ -829,7 +835,9 @@ Value *BuilderImpl::CreateImageStore(Value *texel, unsigned dim, unsigned flags, dim = prepareCoordinate(dim, coord, nullptr, nullptr, nullptr, coords, derivatives); bool isTexelBuffer = (dim == Dim1DBuffer || dim == Dim1DArrayBuffer); - imageDesc = transformImageDesc(imageDesc, false, isTexelBuffer, texel->getType()); + const bool isUniformImage = isUniformDescriptor(imageDesc, flags, true); + const bool needFullDesc = isUniformImage || isTexelBuffer; + imageDesc = transformImageDesc(imageDesc, needFullDesc, isTexelBuffer); Type *texelTy = texel->getType(); SmallVector args; @@ -886,11 +894,10 @@ Value *BuilderImpl::CreateImageStore(Value *texel, unsigned dim, unsigned flags, args.push_back(getInt32(0)); args.push_back(getInt32(0)); args.push_back(getInt32(0)); - imageStore = - CreateIntrinsic(Intrinsic::amdgcn_struct_buffer_store_format, texel->getType(), args, nullptr, instName); + imageStore = CreateIntrinsic(getVoidTy(), Intrinsic::amdgcn_struct_buffer_store_format, args, nullptr, instName); } - if (imageDesc->getType()->isVectorTy()) { + if (imageDesc->getType()->isVectorTy() && !isUniformImage) { // Add a waterfall loop if needed. if (flags & ImageFlagNonUniformImage) createWaterfallLoop(imageStore, imageDescArgIndex, @@ -916,6 +923,7 @@ Value *BuilderImpl::CreateImageStore(Value *texel, unsigned dim, unsigned flags, // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageSample(Type *resultTy, unsigned dim, unsigned flags, Value *imageDesc, Value *samplerDesc, ArrayRef address, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy() && samplerDesc->getType()->isPointerTy()); Value *coord = address[ImageAddressIdxCoordinate]; assert(coord->getType()->getScalarType()->isFloatTy() || coord->getType()->getScalarType()->isHalfTy()); return CreateImageSampleGather(resultTy, dim, flags, coord, imageDesc, samplerDesc, address, instName, true); @@ -983,7 +991,7 @@ Value *BuilderImpl::CreateImageSampleConvertYCbCr(Type *resultTy, unsigned dim, if (isa(imageDesc)) imageDesc = PoisonValue::get(FixedVectorType::get(getInt32Ty(), 8)); else - imageDesc = transformImageDesc(imageDesc, true, false, resultTy); + imageDesc = transformImageDesc(imageDesc, true, false); imageDesc = fixImageDescForRead(imageDesc); YCbCrSampleInfo sampleInfoLuma = {resultTy, dim, flags, imageDesc, samplerDescLuma, address, instName.str(), true}; @@ -999,7 +1007,7 @@ Value *BuilderImpl::CreateImageSampleConvertYCbCr(Type *resultTy, unsigned dim, if (isa(imageDesc)) imageDesc = PoisonValue::get(FixedVectorType::get(getInt32Ty(), 8)); else - imageDesc = transformImageDesc(imageDesc, true, false, resultTy); + imageDesc = transformImageDesc(imageDesc, true, false); imageDesc = fixImageDescForRead(imageDesc); YCbCrConverter.SetImgDescChroma(planeIdx, imageDesc); } @@ -1026,6 +1034,7 @@ Value *BuilderImpl::CreateImageSampleConvertYCbCr(Type *resultTy, unsigned dim, // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageGather(Type *resultTy, unsigned dim, unsigned flags, Value *imageDesc, Value *samplerDesc, ArrayRef address, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy() && samplerDesc->getType()->isPointerTy()); if (isa(imageDesc) || isa(samplerDesc)) return PoisonValue::get(resultTy); @@ -1047,7 +1056,9 @@ Value *BuilderImpl::CreateImageGather(Type *resultTy, unsigned dim, unsigned fla gatherTy = StructType::get(getContext(), {gatherTy, getInt32Ty()}); } - samplerDesc = transformSamplerDesc(samplerDesc); + bool isUniformSampler = isUniformDescriptor(samplerDesc, flags, false); + bool needFullDesc = isUniformSampler ? true : isFullDescriptorNeeded(samplerDesc, false); + samplerDesc = transformSamplerDesc(samplerDesc, needFullDesc); if (m_pipelineState->getOptions().disableTruncCoordForGather) { samplerDesc = modifySamplerDescForGather(samplerDesc); @@ -1117,13 +1128,15 @@ Value *BuilderImpl::CreateImageSampleGather(Type *resultTy, unsigned dim, unsign const Twine &instName, bool isSample) { if (isa(imageDesc) || isa(samplerDesc)) return PoisonValue::get(resultTy); - - imageDesc = transformImageDesc(imageDesc, false, false, resultTy); + const bool isUniformImage = isUniformDescriptor(imageDesc, flags, true); + const bool needFullDesc = isUniformImage || isFullDescriptorNeeded(imageDesc, true); + imageDesc = transformImageDesc(imageDesc, needFullDesc, false); const bool isVecTyDesc = imageDesc->getType()->isVectorTy(); if (isVecTyDesc) imageDesc = fixImageDescForRead(imageDesc); - samplerDesc = transformSamplerDesc(samplerDesc); + bool isUniformSampler = isUniformDescriptor(samplerDesc, flags, false); + samplerDesc = transformSamplerDesc(samplerDesc, isUniformSampler); // Mark usage of images, to allow the compute workgroup reconfiguration optimization. getPipelineState()->getShaderResourceUsage(m_shaderStage.value())->useImages = true; @@ -1247,14 +1260,14 @@ Value *BuilderImpl::CreateImageSampleGather(Type *resultTy, unsigned dim, unsign // Add a waterfall loop if needed. SmallVector nonUniformArgIndexes; - if (imageDesc->getType()->isVectorTy()) { + if (imageDesc->getType()->isVectorTy() && !isUniformImage) { if (flags & ImageFlagNonUniformImage) nonUniformArgIndexes.push_back(imageDescArgIndex); else if (flags & ImageFlagEnforceReadFirstLaneImage) enforceReadFirstLane(imageOp, imageDescArgIndex); } - if (samplerDesc->getType()->isVectorTy()) { + if (samplerDesc->getType()->isVectorTy() && !isUniformSampler) { const unsigned samplerDescArgIndex = imageDescArgIndex + 1; if (flags & ImageFlagNonUniformSampler) nonUniformArgIndexes.push_back(samplerDescArgIndex); @@ -1262,6 +1275,17 @@ Value *BuilderImpl::CreateImageSampleGather(Type *resultTy, unsigned dim, unsign enforceReadFirstLane(imageOp, samplerDescArgIndex); } + // TODO: This is quick fix to prevent the backend from auto-waterfalling for the uniform operand. + if (nonUniformArgIndexes.size() == 1) { + const unsigned nonUniformArgIndex = nonUniformArgIndexes.back(); + Value *nonUniformArg = imageOp->getOperand(nonUniformArgIndex); + if (nonUniformArg == imageDesc) { + const unsigned samplerDescArgIndex = imageDescArgIndex + 1; + enforceReadFirstLane(imageOp, samplerDescArgIndex); + } else + enforceReadFirstLane(imageOp, imageDescArgIndex); + } + if (!nonUniformArgIndexes.empty()) imageOp = createWaterfallLoop(imageOp, nonUniformArgIndexes, getPipelineState()->getShaderOptions(m_shaderStage.value()).scalarizeWaterfallLoads); @@ -1317,6 +1341,7 @@ Value *BuilderImpl::CreateImageAtomicCompareSwap(unsigned dim, unsigned flags, A Value *BuilderImpl::CreateImageAtomicCommon(unsigned atomicOp, unsigned dim, unsigned flags, AtomicOrdering ordering, Value *imageDesc, Value *coord, Value *inputValue, Value *comparatorValue, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy()); if (isa(imageDesc)) return PoisonValue::get(inputValue->getType()); getPipelineState()->getShaderResourceUsage(m_shaderStage.value())->resourceWrite = true; @@ -1339,13 +1364,16 @@ Value *BuilderImpl::CreateImageAtomicCommon(unsigned atomicOp, unsigned dim, uns dim = prepareCoordinate(dim, coord, nullptr, nullptr, nullptr, coords, derivatives); bool isTexelBuffer = (dim == Dim1DBuffer || dim == Dim1DArrayBuffer); - imageDesc = transformImageDesc(imageDesc, false, isTexelBuffer, nullptr); + const bool isUniformImage = isUniformDescriptor(imageDesc, flags, true); + bool needFullDesc = isUniformImage || isTexelBuffer; + imageDesc = transformImageDesc(imageDesc, needFullDesc, isTexelBuffer); SmallVector args; Instruction *atomicInst = nullptr; unsigned imageDescArgIndex = 0; if (!isTexelBuffer) { // Resource descriptor. Use the image atomic instruction. + args.push_back(inputValue); if (atomicOp == AtomicOpCompareSwap) args.push_back(comparatorValue); @@ -1357,8 +1385,7 @@ Value *BuilderImpl::CreateImageAtomicCommon(unsigned atomicOp, unsigned dim, uns // Get the intrinsic ID from the load intrinsic ID table, and create the intrinsic. // Rectangle image uses the same Intrinsic ID with 2D image. - Intrinsic::ID intrinsicId = - (dim == DimRect) ? ImageAtomicIntrinsicTable[atomicOp][Dim2D] : ImageAtomicIntrinsicTable[atomicOp][dim]; + Intrinsic::ID intrinsicId = ImageAtomicIntrinsicTable[atomicOp][dim == DimRect ? Dim2D : dim]; #if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION >= 511095 atomicInst = CreateIntrinsic(inputValue->getType(), intrinsicId, args, nullptr, instName); #else @@ -1377,9 +1404,9 @@ Value *BuilderImpl::CreateImageAtomicCommon(unsigned atomicOp, unsigned dim, uns args.push_back(getInt32(0)); args.push_back(getInt32(0)); atomicInst = - CreateIntrinsic(StructBufferAtomicIntrinsicTable[atomicOp], inputValue->getType(), args, nullptr, instName); + CreateIntrinsic(inputValue->getType(), StructBufferAtomicIntrinsicTable[atomicOp], args, nullptr, instName); } - if (imageDesc->getType()->isVectorTy()) { + if (imageDesc->getType()->isVectorTy() && !isUniformImage) { if (flags & ImageFlagNonUniformImage) atomicInst = createWaterfallLoop(atomicInst, imageDescArgIndex, @@ -1409,11 +1436,12 @@ Value *BuilderImpl::CreateImageAtomicCommon(unsigned atomicOp, unsigned dim, uns // @param imageDesc : Image descriptor or texel buffer descriptor // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageQueryLevels(unsigned dim, unsigned flags, Value *imageDesc, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy()); if (isa(imageDesc)) return PoisonValue::get(getInt32Ty()); dim = dim == DimCubeArray ? DimCube : dim; - imageDesc = transformImageDesc(imageDesc, true, false, nullptr); + imageDesc = transformImageDesc(imageDesc, true, false); Value *numMipLevel = nullptr; GfxIpVersion gfxIp = getPipelineState()->getTargetInfo().getGfxIpVersion(); @@ -1451,10 +1479,11 @@ Value *BuilderImpl::CreateImageQueryLevels(unsigned dim, unsigned flags, Value * // @param imageDesc : Image descriptor or texel buffer descriptor // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageQuerySamples(unsigned dim, unsigned flags, Value *imageDesc, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy()); if (isa(imageDesc)) return PoisonValue::get(getInt32Ty()); - imageDesc = transformImageDesc(imageDesc, true, false, nullptr); + imageDesc = transformImageDesc(imageDesc, true, false); Value *descWord3 = CreateExtractElement(imageDesc, 3); Value *lastLevel = nullptr; if (m_pipelineState->getTargetInfo().getGfxIpVersion().major <= 11) { @@ -1512,10 +1541,11 @@ Value *BuilderImpl::CreateImageQuerySamples(unsigned dim, unsigned flags, Value // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageQuerySize(unsigned dim, unsigned flags, Value *imageDesc, Value *lod, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy()); if (isa(imageDesc)) return PoisonValue::get(getInt32Ty()); bool isTexelBuffer = (dim == Dim1DBuffer || dim == Dim1DArrayBuffer); - imageDesc = transformImageDesc(imageDesc, true, isTexelBuffer, nullptr); + imageDesc = transformImageDesc(imageDesc, true, isTexelBuffer); if (isTexelBuffer) { // Texel buffer. // Extract NUM_RECORDS (SQ_BUF_RSRC_WORD2) @@ -1613,6 +1643,7 @@ Value *BuilderImpl::CreateImageQuerySize(unsigned dim, unsigned flags, Value *im // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageGetLod(unsigned dim, unsigned flags, Value *imageDesc, Value *samplerDesc, Value *coord, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy() && samplerDesc->getType()->isPointerTy()); if (isa(imageDesc) || isa(samplerDesc)) return PoisonValue::get(FixedVectorType::get(getFloatTy(), 2)); @@ -1637,12 +1668,16 @@ Value *BuilderImpl::CreateImageGetLod(unsigned dim, unsigned flags, Value *image SmallVector derivatives; dim = prepareCoordinate(dim, coord, nullptr, nullptr, nullptr, coords, derivatives); - imageDesc = transformImageDesc(imageDesc, false, false, nullptr); + const bool isUniformImage = isUniformDescriptor(imageDesc, flags, true); + imageDesc = transformImageDesc(imageDesc, isUniformImage, false); + + bool isUniformSampler = false; if (isa(samplerDesc->getType())) { // Only the first 4 dwords are sampler descriptor, we need to extract these values under any condition samplerDesc = CreateShuffleVector(samplerDesc, ArrayRef{0, 1, 2, 3}); } else { - samplerDesc = transformSamplerDesc(samplerDesc); + isUniformSampler = isUniformDescriptor(samplerDesc, flags, false); + samplerDesc = transformSamplerDesc(samplerDesc, isUniformSampler); } SmallVector args; @@ -1659,7 +1694,7 @@ Value *BuilderImpl::CreateImageGetLod(unsigned dim, unsigned flags, Value *image CreateIntrinsic(FixedVectorType::get(getFloatTy(), 2), ImageGetLodIntrinsicTable[dim], args, nullptr, instName); SmallVector nonUniformArgIndexes; - if (imageDesc->getType()->isVectorTy()) { + if (imageDesc->getType()->isVectorTy() && !isUniformImage) { // Add a waterfall loop if needed. if (flags & ImageFlagNonUniformImage) nonUniformArgIndexes.push_back(imageDescArgIndex); @@ -1667,13 +1702,25 @@ Value *BuilderImpl::CreateImageGetLod(unsigned dim, unsigned flags, Value *image enforceReadFirstLane(result, imageDescArgIndex); } - if (samplerDesc->getType()->isVectorTy()) { + if (samplerDesc->getType()->isVectorTy() && !isUniformSampler) { const unsigned samplerDescArgIndex = imageDescArgIndex + 1; if (flags & ImageFlagNonUniformSampler) nonUniformArgIndexes.push_back(samplerDescArgIndex); else if (flags & ImageFlagEnforceReadFirstLaneSampler) enforceReadFirstLane(result, samplerDescArgIndex); } + + // TODO: This is quick fix to prevent the backend from auto-waterfalling for the uniform operand. + if (nonUniformArgIndexes.size() == 1) { + const unsigned nonUniformArgIndex = nonUniformArgIndexes.back(); + Value *nonUniformArg = result->getOperand(nonUniformArgIndex); + if (nonUniformArg == imageDesc) { + const unsigned samplerDescArgIndex = imageDescArgIndex + 1; + enforceReadFirstLane(result, samplerDescArgIndex); + } else + enforceReadFirstLane(result, imageDescArgIndex); + } + if (!nonUniformArgIndexes.empty()) result = createWaterfallLoop(result, nonUniformArgIndexes, getPipelineState()->getShaderOptions(m_shaderStage.value()).scalarizeWaterfallLoads); @@ -1691,6 +1738,7 @@ Value *BuilderImpl::CreateImageGetLod(unsigned dim, unsigned flags, Value *image // @param instName : Name to give instruction(s) Value *BuilderImpl::CreateImageGetSamplePosition(unsigned dim, unsigned flags, Value *imageDesc, Value *sampleId, const Twine &instName) { + assert(imageDesc->getType()->isPointerTy()); // Add ImageFlagSamplePatternOffset to query back both sample count and sample pattern offset. Value *sampleInfo = CreateImageQuerySamples(dim, flags | ImageFlagSamplePatternOffset, imageDesc); Value *sampleCount = CreateAnd(sampleInfo, 0xFFFF); @@ -1708,7 +1756,7 @@ Value *BuilderImpl::CreateImageGetSamplePosition(unsigned dim, unsigned flags, V offset = CreateShl(offset, getInt32(4)); Type *samplePosTy = FixedVectorType::get(getFloatTy(), 2); - return CreateIntrinsic(Intrinsic::amdgcn_raw_buffer_load, samplePosTy, {desc, offset, getInt32(0), getInt32(0)}); + return CreateIntrinsic(samplePosTy, Intrinsic::amdgcn_raw_buffer_load, {desc, offset, getInt32(0), getInt32(0)}); } // ===================================================================================================================== @@ -2154,7 +2202,7 @@ Value *BuilderImpl::modifySamplerDescForGather(Value *samplerDesc) { // @param isTexelBuffer : Whether it is a texel buffer // @param texelType : The type of the texel // @returns The transformed descriptor -Value *BuilderImpl::transformImageDesc(Value *imageDesc, bool mustLoad, bool isTexelBuffer, Type *texelType) { +Value *BuilderImpl::transformImageDesc(Value *imageDesc, bool mustLoad, bool isTexelBuffer) { assert(!isa(imageDesc)); if (isa(imageDesc->getType())) return imageDesc; @@ -2172,7 +2220,7 @@ Value *BuilderImpl::transformImageDesc(Value *imageDesc, bool mustLoad, bool isT // // @param samplerDesc : descriptor pointer or a full descriptor // @returns Transformed sampler descriptor -Value *BuilderImpl::transformSamplerDesc(Value *samplerDesc) { +Value *BuilderImpl::transformSamplerDesc(Value *samplerDesc, bool mustLoad) { assert(!isa(samplerDesc)); if (isa(samplerDesc->getType())) return samplerDesc; @@ -2184,7 +2232,6 @@ Value *BuilderImpl::transformSamplerDesc(Value *samplerDesc) { cast(desc)->setMetadata(LLVMContext::MD_invariant_load, MDNode::get(getContext(), {})); return desc; } - // ===================================================================================================================== // Merges a resource descriptor into a feedback descriptor to create a descriptor for sampler feedback instructions. // @@ -2194,8 +2241,12 @@ Value *BuilderImpl::transformSamplerDesc(Value *samplerDesc) { // @returns Descriptor for use with sampler feedback image sample calls Value *BuilderImpl::CreateSamplerFeedbackDesc(Value *feedbackDesc, Value *resourceDesc, const Twine &instName) { GfxIpVersion gfxIp = getPipelineState()->getTargetInfo().getGfxIpVersion(); - SqImgRsrcRegHandler feedbackRsrc(this, feedbackDesc, &gfxIp); - SqImgRsrcRegHandler resourceRsrc(this, feedbackDesc, &gfxIp); + + auto feedbackDescData = transformImageDesc(feedbackDesc, true, false); + auto resourceDescData = transformImageDesc(resourceDesc, true, false); + + SqImgRsrcRegHandler feedbackRsrc(this, feedbackDescData, &gfxIp); + SqImgRsrcRegHandler resourceRsrc(this, resourceDescData, &gfxIp); feedbackRsrc.setReg(SqRsrcRegs::BaseLevel, resourceRsrc.getReg(SqRsrcRegs::BaseLevel)); feedbackRsrc.setReg(SqRsrcRegs::LastLevel, resourceRsrc.getReg(SqRsrcRegs::LastLevel)); @@ -2203,5 +2254,93 @@ Value *BuilderImpl::CreateSamplerFeedbackDesc(Value *feedbackDesc, Value *resour feedbackRsrc.setReg(SqRsrcRegs::BaseArray, resourceRsrc.getReg(SqRsrcRegs::BaseArray)); feedbackRsrc.setReg(SqRsrcRegs::MinLod, resourceRsrc.getReg(SqRsrcRegs::MinLod)); - return feedbackRsrc.getRegister(); + CreateStore(feedbackRsrc.getRegister(), feedbackDesc); + + return feedbackDesc; +} + +// ===================================================================================================================== +// Check if we need a full descriptor +// +// @param descPtr : The given descriptor pointer +// @param isImage : Whether it is image descriptor +// @param origTexelTy : Specify type of origin texel when isImage is true +// @param texelTy : Specify the type when isImage is true +bool BuilderImpl::isFullDescriptorNeeded(Value *descPtr, bool isImage, Type *origTexelTy, Type *texelTy) { + if (isImage) { + // Need check if the descriptor is null + if (origTexelTy && texelTy != origTexelTy && origTexelTy->isIntOrIntVectorTy(64) && origTexelTy->isVectorTy() && + m_pipelineState->getOptions().allowNullDescriptor) + return true; + // Need modify descriptor + if (getPipelineState()->getTargetInfo().getGpuWorkarounds().gfx10.waClearWriteCompressBit) + return true; + // Need F-mask full descriptor + SmallVector outBuff; + if (m_isFmaskLoad) + return true; + + return false; + } else { + return m_pipelineState->getOptions().disableTruncCoordForGather; + } +} + +// ===================================================================================================================== +// Conservatively determine if the given descriptor pointer is uniform by looking at the data flow, if it is fully +// understood and rooted in constants. +// +// @param descPtr : The given descriptor pointer +// @param flags : ImageFlag* flags +// @param isImage : Whether is a image descriptor pointer +// @return true if the descriptor is uniform +bool BuilderImpl::isUniformDescriptor(Value *descPtr, unsigned flags, bool isImage) { + // Skip the heuristic + if (isImage && (flags & ImageFlagEnforceReadFirstLaneImage)) + return false; + if (!isImage && (flags & ImageFlagEnforceReadFirstLaneSampler)) + return false; + + SmallVector worklist; + worklist.push_back(descPtr); + constexpr unsigned maxIterCount = 20; + unsigned loopId = 0; + while (!worklist.empty()) { + if (loopId >= maxIterCount) + break; + Instruction *current = dyn_cast(worklist.pop_back_val()); + if (!current) + return false; // be conservative in case that is a function argument + if (auto gep = dyn_cast(current)) { + worklist.push_back(gep->getPointerOperand()); + for (auto &idx : gep->indices()) { + if (!isa(idx)) + worklist.push_back(idx); + } + } else if (current->getOpcode() >= Instruction::CastOpsBegin && current->getOpcode() < Instruction::CastOpsEnd) { + worklist.push_back(current->getOperand(0)); + } else if (auto insert = dyn_cast(current)) { + if (!isa(insert->getOperand(2))) + return false; + worklist.push_back(insert->getOperand(0)); + worklist.push_back(insert->getOperand(1)); + } else if (auto call = dyn_cast(current)) { + auto name = call->getCalledFunction()->getName(); + if (!isa(call) && call->getIntrinsicID() != Intrinsic::amdgcn_s_getpc && + !name.starts_with("lgc.create.load.push.constants.")) + return false; + } else if (auto binary = dyn_cast(current)) { + worklist.push_back(binary->getOperand(0)); + worklist.push_back(binary->getOperand(1)); + } else if (auto load = dyn_cast(current)) { + if (load->getPointerAddressSpace() == ADDR_SPACE_PRIVATE) + return false; + worklist.push_back(load->getPointerOperand()); + } else { + // Unhandled instruction + return false; + } + ++loopId; + } + return worklist.empty(); } diff --git a/lgc/builder/InOutBuilder.cpp b/lgc/builder/InOutBuilder.cpp index 6142c7c146..79aecbc882 100644 --- a/lgc/builder/InOutBuilder.cpp +++ b/lgc/builder/InOutBuilder.cpp @@ -233,13 +233,6 @@ Value *BuilderImpl::readGenericInputOutput(bool isOutput, Type *resultTy, unsign // Generate the call for reading the input/output. Value *result = nullptr; switch (m_shaderStage.value()) { - case ShaderStage::Vertex: { - assert(locationOffset == getInt32(0)); - result = - create(resultTy, false, location, getInt32(0), elemIdx, PoisonValue::get(getInt32Ty())); - break; - } - case ShaderStage::TessControl: case ShaderStage::TessEval: { assert(!isOutput || m_shaderStage == ShaderStage::TessControl); @@ -973,9 +966,13 @@ Value *BuilderImpl::CreateReadBuiltInInput(BuiltInKind builtIn, InOutInfo inputI const Twine &instName) { assert(isBuiltInInput(builtIn)); Value *builtInVal = readBuiltIn(false, builtIn, inputInfo, vertexIndex, index, instName); - if (builtIn == BuiltInViewIndex) + if (builtIn == BuiltInViewIndex) { + if (m_pipelineState->getShaderOptions(m_shaderStage.value()).viewIndexFromDeviceIndex) { + return getInt32(m_pipelineState->getDeviceIndex()); + } // View index can only use bit[3:0] of view ID register. builtInVal = CreateAnd(builtInVal, getInt32(0xF)); + } return builtInVal; } @@ -1105,16 +1102,6 @@ void BuilderImpl::getProvokingVertexInfo(llvm::Value **isOne, llvm::Value **isTw auto provokingVtxInfo = ShaderInputs::getInput(ShaderInput::ProvokingVtxInfo, BuilderBase::get(*this), *getLgcContext()); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 479645 - auto laneID = CreateGetLaneNumber(); - auto quadId = CreateSDiv(laneID, getInt32(4)); - auto provokingVertex = CreateIntrinsic(Intrinsic::amdgcn_ubfe, getInt32Ty(), - {provokingVtxInfo, CreateMul(quadId, getInt32(2)), getInt32(2)}); - - *isOne = CreateICmpEQ(provokingVertex, getInt32(1)); - *isTwo = CreateICmpEQ(provokingVertex, getInt32(2)); - -#else // Extract 2-bit vertex index from provokingVtxInfo auto isTwoMask = CreateAnd(provokingVtxInfo, getInt32(0xAAAAAAAA)); auto isOneMask = @@ -1125,7 +1112,6 @@ void BuilderImpl::getProvokingVertexInfo(llvm::Value **isOne, llvm::Value **isTw isOneMask = CreateIntrinsic(getInt64Ty(), Intrinsic::amdgcn_s_wqm, isOneMask); *isTwo = CreateIntrinsic(getInt1Ty(), Intrinsic::amdgcn_inverse_ballot, isTwoMask); *isOne = CreateIntrinsic(getInt1Ty(), Intrinsic::amdgcn_inverse_ballot, isOneMask); -#endif } // ===================================================================================================================== @@ -1505,8 +1491,12 @@ Value *BuilderImpl::readVsBuiltIn(BuiltInKind builtIn, const Twine &instName) { case BuiltInInstanceIndex: return ShaderInputs::getInstanceIndex(builder, *getLgcContext()); case BuiltInViewIndex: - if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) + if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) { + if (m_pipelineState->getShaderOptions(m_shaderStage.value()).viewIndexFromDeviceIndex) { + return getInt32(m_pipelineState->getDeviceIndex()); + } return ShaderInputs::getSpecialUserData(UserDataMapping::ViewId, builder); + } return builder.getInt32(0); case BuiltInVertexId: return ShaderInputs::getInput(ShaderInput::VertexId, builder, *getLgcContext()); diff --git a/lgc/builder/SubgroupBuilder.cpp b/lgc/builder/SubgroupBuilder.cpp index 758129281a..e5abd20412 100644 --- a/lgc/builder/SubgroupBuilder.cpp +++ b/lgc/builder/SubgroupBuilder.cpp @@ -425,7 +425,14 @@ Value *BuilderImpl::createSubgroupShuffle(const SubgroupHelperLaneState &state, return result; } - return createShuffleLoop(state, value, index); + auto mapFunc = [this](BuilderBase &builder, ArrayRef mappedArgs, + ArrayRef passthroughArgs) -> Value * { + Value *const readlane = + builder.CreateIntrinsic(builder.getInt32Ty(), Intrinsic::amdgcn_readlane, {mappedArgs[0], passthroughArgs[0]}); + return createWaterfallLoop(cast(readlane), 1); + }; + + return CreateMapToSimpleType(mapFunc, value, index); } // ===================================================================================================================== diff --git a/lgc/disassembler/Disassembler.cpp b/lgc/disassembler/Disassembler.cpp index 0466a4b548..31e4fdc518 100644 --- a/lgc/disassembler/Disassembler.cpp +++ b/lgc/disassembler/Disassembler.cpp @@ -175,15 +175,9 @@ static void disassembleArchive(MemoryBufferRef data, raw_ostream &ostream) { } if (!err) { -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 472105 Expected> newArchive = writeArchiveToBuffer(disassembledMembers, SymtabWritingMode::NoSymtab, object::Archive::Kind::K_GNU, /*Deterministic=*/true, /*Thin=*/false); -#else - Expected> newArchive = - writeArchiveToBuffer(disassembledMembers, /*WriteSymtab=*/false, object::Archive::Kind::K_GNU, - /*Deterministic=*/true, /*Thin=*/false); -#endif if (!newArchive) err = newArchive.takeError(); else @@ -240,13 +234,8 @@ void ObjDisassembler::run() { if (!m_target) report_fatal_error(m_objFile->getFileName() + ": '" + m_tripleName + "': " + error); - // Get the CPU name. -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 444152 - Optional mcpu = m_objFile->tryGetCPUName(); -#else - // New version of the code (also handles unknown version, which we treat as latest) + // Get the CPU name. std::optional mcpu = m_objFile->tryGetCPUName(); -#endif if (!mcpu) report_fatal_error(m_objFile->getFileName() + ": Cannot get CPU name"); diff --git a/lgc/elfLinker/ElfLinker.cpp b/lgc/elfLinker/ElfLinker.cpp index 967675eda5..1f659ab128 100644 --- a/lgc/elfLinker/ElfLinker.cpp +++ b/lgc/elfLinker/ElfLinker.cpp @@ -348,8 +348,8 @@ bool ElfLinkerImpl::link(raw_pwrite_stream &outStream) { uint64_t relocSectionOffset = m_outputSections[relocSectionId].getOutputOffset(relocIdxInSection); uint64_t targetSectionOffset = m_outputSections[targetSectionIdx].getOutputOffset(targetIdxInSection); StringRef id = sys::path::filename(elfInput.objectFile->getFileName()); - m_outputSections[relocSectionId].addRelocation(reloc, id, relocSectionOffset, targetSectionOffset, - sectType); + m_outputSections[relocSectionId].addRelocation(reloc, id, relocSectionOffset, targetSectionOffset, sectType, + m_mappingTable); } } } @@ -466,13 +466,7 @@ void ElfLinkerImpl::mergePalMetadataFromElf(object::ObjectFile &objectFile, bool auto shdr = cantFail(elfFile.getSection(elfSection.getIndex())); for (auto note : elfFile.notes(*shdr, err)) { if (note.getName() == Util::Abi::AmdGpuArchName && note.getType() == ELF::NT_AMDGPU_METADATA) { -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 460558 - // Old version of the code - ArrayRef desc = note.getDesc(); -#else - // New version of the code (also handles unknown version, which we treat as latest) ArrayRef desc = note.getDesc(shdr->sh_addralign); -#endif m_pipelineState->mergePalMetadataFromBlob(StringRef(reinterpret_cast(desc.data()), desc.size()), isGlueCode); } @@ -496,13 +490,7 @@ void ElfLinkerImpl::readIsaName(object::ObjectFile &objectFile) { auto shdr = cantFail(elfFile.getSection(elfSection.getIndex())); for (auto note : elfFile.notes(*shdr, err)) { if (note.getName() == Util::Abi::AmdGpuVendorName && note.getType() == ELF::NT_AMD_HSA_ISA_NAME) { -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 460558 - // Old version of the code - ArrayRef desc = note.getDesc(); -#else - // New version of the code (also handles unknown version, which we treat as latest) ArrayRef desc = note.getDesc(shdr->sh_addralign); -#endif m_isaName = StringRef(reinterpret_cast(desc.data()), desc.size()); return; } @@ -762,7 +750,8 @@ void OutputSection::addSymbol(const object::ELFSymbolRef &elfSymRef, unsigned in // Add a relocation to the output elf void OutputSection::addRelocation(object::ELFRelocationRef relocRef, StringRef id, unsigned int relocSectionOffset, - unsigned int targetSectionOffset, unsigned sectType) { + unsigned int targetSectionOffset, unsigned sectType, + const std::vector &mappingTable) { object::ELFSymbolRef relocSymRef(*relocRef.getSymbol()); std::string rodataSymName = cantFail(relocSymRef.getName()).str(); rodataSymName += "."; @@ -780,16 +769,23 @@ void OutputSection::addRelocation(object::ELFRelocationRef relocRef, StringRef i rodataSymIdx = m_linker->getSymbols().size(); m_linker->getSymbols().push_back(newSym); } + + auto newOffset = relocRef.getOffset(); + if (mappingTable.size()) { + newOffset = mappingTable[newOffset / sizeof(uint32_t)]; + assert(newOffset != -1); + } + if (sectType == ELF::SHT_REL) { ELF::Elf64_Rel newReloc = {}; newReloc.setSymbolAndType(rodataSymIdx, relocRef.getType()); - newReloc.r_offset = targetSectionOffset + relocRef.getOffset(); + newReloc.r_offset = targetSectionOffset + newOffset; m_linker->getRelocations().push_back(newReloc); } else { assert(sectType == ELF::SHT_RELA); ELF::Elf64_Rela newReloc = {}; newReloc.setSymbolAndType(rodataSymIdx, relocRef.getType()); - newReloc.r_offset = targetSectionOffset + relocRef.getOffset(); + newReloc.r_offset = targetSectionOffset + newOffset; newReloc.r_addend = cantFail(relocRef.getAddend()); m_linker->getRelocationsA().push_back(newReloc); } diff --git a/lgc/elfLinker/ElfLinkerImpl.h b/lgc/elfLinker/ElfLinkerImpl.h index 2f91ffce75..33fa8f63ed 100644 --- a/lgc/elfLinker/ElfLinkerImpl.h +++ b/lgc/elfLinker/ElfLinkerImpl.h @@ -85,7 +85,7 @@ class OutputSection { // Add a relocation to the output elf void addRelocation(llvm::object::ELFRelocationRef relocRef, llvm::StringRef id, unsigned int relocSectionOffset, - unsigned int targetSectionOffset, unsigned sectType); + unsigned int targetSectionOffset, unsigned sectType, const std::vector &mappingTable); // Get the output file offset of a particular input section in the output section uint64_t getOutputOffset(unsigned inputIdx) { return m_offset + m_inputSections[inputIdx].offset; } @@ -226,6 +226,7 @@ class ElfLinkerImpl final : public lgc::ElfLinker { std::string m_notes; // Notes to go in .note section bool m_doneInputs = false; // Set when caller has done adding inputs llvm::StringRef m_isaName; // ISA name to include in the .note section + std::vector m_mappingTable; // mapping table from SDL }; } // namespace lgc diff --git a/lgc/elfLinker/NullFragmentShader.cpp b/lgc/elfLinker/NullFragmentShader.cpp index e4b26ee188..4c1af783c6 100644 --- a/lgc/elfLinker/NullFragmentShader.cpp +++ b/lgc/elfLinker/NullFragmentShader.cpp @@ -31,7 +31,7 @@ #include "NullFragmentShader.h" #include "lgc/patch/FragmentColorExport.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/TargetInfo.h" #include "llvm/Target/TargetMachine.h" diff --git a/lgc/include/lgc/builder/BuilderImpl.h b/lgc/include/lgc/builder/BuilderImpl.h index 92095f5c89..5a5694a342 100644 --- a/lgc/include/lgc/builder/BuilderImpl.h +++ b/lgc/include/lgc/builder/BuilderImpl.h @@ -443,10 +443,17 @@ class BuilderImpl : public BuilderDefs { llvm::Value *modifySamplerDescForGather(llvm::Value *samplerDesc); // Transform 32-bit image descriptor pointer to a i32 type or a descriptor load instruction. - llvm::Value *transformImageDesc(llvm::Value *imageDesc, bool mustLoad, bool isTexelBuffer, llvm::Type *texelType); + llvm::Value *transformImageDesc(llvm::Value *imageDesc, bool mustLoad, bool isTexelBuffer); // Transform 32-bit sampler descriptor pointer to a i32 type or a descriptor load instruction. - llvm::Value *transformSamplerDesc(llvm::Value *samplerDesc); + llvm::Value *transformSamplerDesc(llvm::Value *samplerDesc, bool mustLoad); + + // Check if we need a full descriptor + bool isFullDescriptorNeeded(llvm::Value *descPtr, bool isImage, llvm::Type *origTexelTy = nullptr, + llvm::Type *texelTy = nullptr); + + // Check if the descriptor is uniform + bool isUniformDescriptor(llvm::Value *descPtr, unsigned flags, bool isImage); enum ImgDataFormat { IMG_DATA_FORMAT_32 = 4, @@ -471,6 +478,8 @@ class BuilderImpl : public BuilderDefs { static const unsigned AtomicOpCompareSwap = 1; + bool m_isFmaskLoad = false; // If set true, we need load a full descriptor + // ------------------------------------------------------------------------------------------------------------------- // Input/output operations public: diff --git a/lgc/include/lgc/patch/AddLoopMetadata.h b/lgc/include/lgc/patch/AddLoopMetadata.h index ecd0d69796..ef92c65527 100644 --- a/lgc/include/lgc/patch/AddLoopMetadata.h +++ b/lgc/include/lgc/patch/AddLoopMetadata.h @@ -30,7 +30,7 @@ */ #pragma once -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineState.h" #include "lgc/state/TargetInfo.h" #include "llvm/Transforms/Scalar/LoopPassManager.h" diff --git a/lgc/include/lgc/patch/ApplyWorkarounds.h b/lgc/include/lgc/patch/ApplyWorkarounds.h index f7777974af..37efa0077f 100644 --- a/lgc/include/lgc/patch/ApplyWorkarounds.h +++ b/lgc/include/lgc/patch/ApplyWorkarounds.h @@ -25,12 +25,12 @@ /** *********************************************************************************************************************** * @file ApplyWorkarounds.h - * @brief LLPC header file: contains declaration of class lgc::PatchWorkarounds. + * @brief LLPC header file: contains declaration of class lgc::ApplyWorkarounds. *********************************************************************************************************************** */ #pragma once -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/util/Internal.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/IR/IRBuilder.h" @@ -47,11 +47,11 @@ namespace lgc { // require a fix so the hardware will ignore this difference (actually an app error, but common enough to require // handling) // -class PatchWorkarounds final : public Patch, public llvm::PassInfoMixin { +class ApplyWorkarounds final : public Patch, public llvm::PassInfoMixin { public: llvm::PreservedAnalyses run(llvm::Module &module, llvm::ModuleAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch LLVM for workarounds"; } + static llvm::StringRef name() { return "Apply workarounds"; } private: std::unique_ptr> m_builder; // The IRBuilder. diff --git a/lgc/include/lgc/patch/CheckShaderCache.h b/lgc/include/lgc/patch/CheckShaderCache.h index 5d31f625a6..8fb33b9c02 100644 --- a/lgc/include/lgc/patch/CheckShaderCache.h +++ b/lgc/include/lgc/patch/CheckShaderCache.h @@ -30,7 +30,7 @@ */ #pragma once -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" @@ -46,7 +46,7 @@ class CheckShaderCache : public Patch, public llvm::PassInfoMixin InOutLocationInfoMap; // ===================================================================================================================== // Represents the pass of LLVM patching operations for resource collecting -class PatchResourceCollect : public Patch, - public llvm::InstVisitor, - public llvm::PassInfoMixin { +class CollectResourceUsage : public Patch, + public llvm::InstVisitor, + public llvm::PassInfoMixin { public: - PatchResourceCollect(); + CollectResourceUsage(); llvm::PreservedAnalyses run(llvm::Module &module, llvm::ModuleAnalysisManager &analysisManager); virtual void visitCallInst(llvm::CallInst &callInst); - static llvm::StringRef name() { return "Patch LLVM for resource collecting"; } + static llvm::StringRef name() { return "Collect resource usage"; } private: // Determines whether GS on-chip mode is valid for this pipeline, also computes ES-GS/GS-VS ring item size. @@ -110,6 +110,10 @@ class PatchResourceCollect : public Patch, std::vector m_outputCalls; // The output export calls llvm::DenseSet m_outputCallLocations; // The output export calls' location + llvm::SmallVector + m_pointSizeWritesToOptimize; // PointSize writes (PointSize = 1.0) that could be optimized + bool m_optimizePointSizeWrite = true; // Flag indicating whether we can optimize PointSize write + ResourceUsage *m_resUsage; // Pointer to shader resource usage std::unique_ptr m_locationInfoMapManager; // Pointer to InOutLocationInfoMapManager instance diff --git a/lgc/include/lgc/patch/CombineCooperativeMatrix.h b/lgc/include/lgc/patch/CombineCooperativeMatrix.h index 03fd9e2f14..6b01dbaa55 100644 --- a/lgc/include/lgc/patch/CombineCooperativeMatrix.h +++ b/lgc/include/lgc/patch/CombineCooperativeMatrix.h @@ -29,7 +29,7 @@ *********************************************************************************************************************** */ #pragma once -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "llvm/IR/PassManager.h" namespace lgc { @@ -42,7 +42,7 @@ class CombineCooperativeMatrix : public Patch, public llvm::PassInfoMixin namespace lgc { @@ -86,15 +79,8 @@ class BufferOpLowering { }; public: -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - BufferOpLowering(CompilerUtils::TypeLowering &typeLowering, PipelineState &pipelineState, - llvm::DivergenceInfo &divergenceInfo); -#else - // New version of the code (also handles unknown version, which we treat as latest) BufferOpLowering(CompilerUtils::TypeLowering &typeLowering, PipelineState &pipelineState, llvm::UniformityInfo &uniformityInfo); -#endif static void registerVisitors(llvm_dialects::VisitorBuilder &builder); @@ -150,19 +136,14 @@ class BufferOpLowering { llvm::IRBuilder<> m_builder; PipelineState &m_pipelineState; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - llvm::DivergenceInfo &m_uniformityInfo; -#else - // New version of the code (also handles unknown version, which we treat as latest) llvm::UniformityInfo &m_uniformityInfo; -#endif // The proxy pointer type used to accumulate offsets. llvm::PointerType *m_offsetType = nullptr; // Map of buffer descriptor infos (for tracking invariance and divergence). llvm::DenseMap m_descriptors; + llvm::DenseMap> m_stridedDescriptors; llvm::SmallVector m_divergentPhis; @@ -178,7 +159,7 @@ class PatchBufferOp : public llvm::InstVisitor, public llvm::Pass public: llvm::PreservedAnalyses run(llvm::Function &function, llvm::FunctionAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch LLVM for buffer operations"; } + static llvm::StringRef name() { return "Lower buffer operations"; } }; } // namespace lgc diff --git a/lgc/include/lgc/patch/LowerCooperativeMatrix.h b/lgc/include/lgc/patch/LowerCooperativeMatrix.h index e277d2e23b..6e510a1368 100644 --- a/lgc/include/lgc/patch/LowerCooperativeMatrix.h +++ b/lgc/include/lgc/patch/LowerCooperativeMatrix.h @@ -31,7 +31,7 @@ #pragma once #include "SystemValues.h" #include "lgc/Builder.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "lgc/state/TargetInfo.h" @@ -68,7 +68,7 @@ class LowerCooperativeMatrix : public Patch, public llvm::PassInfoMixin m_valPackedInMatrixes; }; } // namespace lgc diff --git a/lgc/include/lgc/patch/LowerDebugPrintf.h b/lgc/include/lgc/patch/LowerDebugPrintf.h index 2f198ec90f..8203a4c48c 100644 --- a/lgc/include/lgc/patch/LowerDebugPrintf.h +++ b/lgc/include/lgc/patch/LowerDebugPrintf.h @@ -31,7 +31,7 @@ #pragma once #include "SystemValues.h" #include "lgc/Builder.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "lgc/state/TargetInfo.h" diff --git a/lgc/include/lgc/patch/LowerDesc.h b/lgc/include/lgc/patch/LowerDesc.h index 517f03027b..3783453486 100644 --- a/lgc/include/lgc/patch/LowerDesc.h +++ b/lgc/include/lgc/patch/LowerDesc.h @@ -31,7 +31,7 @@ #pragma once #include "SystemValues.h" #include "lgc/Builder.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "lgc/state/TargetInfo.h" diff --git a/lgc/include/lgc/patch/LowerImageDerivatives.h b/lgc/include/lgc/patch/LowerImageDerivatives.h index 2f1c024fa7..bff2cf408b 100644 --- a/lgc/include/lgc/patch/LowerImageDerivatives.h +++ b/lgc/include/lgc/patch/LowerImageDerivatives.h @@ -24,7 +24,7 @@ **********************************************************************************************************************/ /** *********************************************************************************************************************** - * @file .h + * @file LowerImageDerivatives.h * @brief LLPC header file: contains declaration of class lgc::LowerImageDerivatives. *********************************************************************************************************************** */ @@ -42,7 +42,7 @@ class LowerImageDerivatives : public llvm::PassInfoMixin public: llvm::PreservedAnalyses run(llvm::Module &module, llvm::ModuleAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch attributes when image derivatives dependent on discard"; } + static llvm::StringRef name() { return "Lower image derivatives dependent on discard"; } }; } // namespace lgc diff --git a/lgc/include/lgc/patch/LowerInOut.h b/lgc/include/lgc/patch/LowerInOut.h index 8ebc2930a5..12753252d1 100644 --- a/lgc/include/lgc/patch/LowerInOut.h +++ b/lgc/include/lgc/patch/LowerInOut.h @@ -31,7 +31,7 @@ #pragma once #include "SystemValues.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "lgc/state/TargetInfo.h" @@ -49,7 +49,7 @@ class LowerInOut : public Patch, public llvm::PassInfoMixin { llvm::PreservedAnalyses run(llvm::Module &module, llvm::ModuleAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch LLVM for input import and output export operations"; } + static llvm::StringRef name() { return "Lower input import and output export operations"; } void visitCallInst(llvm::CallInst &callInst); void visitReturnInst(llvm::ReturnInst &retInst); diff --git a/lgc/include/lgc/patch/LowerInvariantLoads.h b/lgc/include/lgc/patch/LowerInvariantLoads.h index f3180ca0cc..34f17fe77c 100644 --- a/lgc/include/lgc/patch/LowerInvariantLoads.h +++ b/lgc/include/lgc/patch/LowerInvariantLoads.h @@ -42,7 +42,7 @@ class LowerInvariantLoads : public llvm::PassInfoMixin { public: llvm::PreservedAnalyses run(llvm::Function &function, llvm::FunctionAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch metadata for invariant loads"; } + static llvm::StringRef name() { return "Lower metadata for invariant loads"; } }; } // namespace lgc diff --git a/lgc/include/lgc/patch/LowerMulDx9Zero.h b/lgc/include/lgc/patch/LowerMulDx9Zero.h index ed6dff5b1f..4be021e34a 100644 --- a/lgc/include/lgc/patch/LowerMulDx9Zero.h +++ b/lgc/include/lgc/patch/LowerMulDx9Zero.h @@ -31,7 +31,7 @@ #pragma once #include "lgc/Builder.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "llvm/IR/InstVisitor.h" diff --git a/lgc/include/lgc/patch/LowerReadFirstLane.h b/lgc/include/lgc/patch/LowerReadFirstLane.h index 2c6cdc523a..9f8b5768b0 100644 --- a/lgc/include/lgc/patch/LowerReadFirstLane.h +++ b/lgc/include/lgc/patch/LowerReadFirstLane.h @@ -25,7 +25,7 @@ /** *********************************************************************************************************************** * @file LowerReadFirstLane.h - * @brief LLPC header file: contains declaration of class lgc::PatchReadFirstLane. + * @brief LLPC header file: contains declaration of class lgc::LowerReadFirstLane. *********************************************************************************************************************** */ #pragma once @@ -34,12 +34,12 @@ namespace lgc { -class PatchReadFirstLane final : public llvm::PassInfoMixin { +class LowerReadFirstLane final : public llvm::PassInfoMixin { public: - PatchReadFirstLane(); + LowerReadFirstLane(); llvm::PreservedAnalyses run(llvm::Function &function, llvm::FunctionAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch LLVM for readfirstlane optimizations"; } + static llvm::StringRef name() { return "Lower readfirstlane optimizations"; } }; } // namespace lgc diff --git a/lgc/include/lgc/patch/LowerSubgroupOps.h b/lgc/include/lgc/patch/LowerSubgroupOps.h index 26045fffc0..98acae42a6 100644 --- a/lgc/include/lgc/patch/LowerSubgroupOps.h +++ b/lgc/include/lgc/patch/LowerSubgroupOps.h @@ -34,7 +34,7 @@ #include "llvmraytracing/CpsStackLowering.h" #include "lgc/LgcCpsDialect.h" #include "lgc/LgcDialect.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/patch/ShaderInputs.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" diff --git a/lgc/include/lgc/patch/MutateEntryPoint.h b/lgc/include/lgc/patch/MutateEntryPoint.h index 7a582b176f..8fdc38678b 100644 --- a/lgc/include/lgc/patch/MutateEntryPoint.h +++ b/lgc/include/lgc/patch/MutateEntryPoint.h @@ -34,7 +34,7 @@ #include "llvmraytracing/CpsStackLowering.h" #include "lgc/LgcCpsDialect.h" #include "lgc/LgcDialect.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/patch/ShaderInputs.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" @@ -55,7 +55,7 @@ class MutateEntryPoint : public Patch, public llvm::PassInfoMixin argNames); llvm::Value *takeLevel(llvm::Value *level, llvm::IRBuilder<> &builder, llvm::Type *waveMaskTy, - llvm::ArrayRef priority); + llvm::ArrayRef priorities); - unsigned lowerCpsJump(llvm::Function *parent, cps::JumpOp *jumpOp, llvm::BasicBlock *tailBlock, - llvm::SmallVectorImpl &exitInfos); + void lowerCpsJump(llvm::Function *parent, cps::JumpOp *jumpOp, llvm::BasicBlock *tailBlock, + llvm::SmallVectorImpl &exitInfos); void lowerAsCpsReference(cps::AsContinuationReferenceOp &asCpsReferenceOp); // Get UserDataUsage struct for the merged shader stage that contains the given shader stage @@ -209,10 +209,8 @@ class MutateEntryPoint : public Patch, public llvm::PassInfoMixin m_funcCpsStackMap; llvm::Intrinsic::ID m_setInactiveChainArgId; - std::unique_ptr stackLowering; + unsigned m_cpsStackAddrspace; }; } // namespace lgc diff --git a/lgc/include/lgc/patch/PassthroughHullShader.h b/lgc/include/lgc/patch/PassthroughHullShader.h index 0917c3c81f..d1f2c7b330 100644 --- a/lgc/include/lgc/patch/PassthroughHullShader.h +++ b/lgc/include/lgc/patch/PassthroughHullShader.h @@ -30,7 +30,7 @@ */ #pragma once -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "llvm/IR/PassManager.h" @@ -42,7 +42,7 @@ class TcsPassthroughShader : public llvm::PassInfoMixin { public: llvm::PreservedAnalyses run(llvm::Module &module, llvm::ModuleAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch LLVM for tessellation control pass-through shader generation"; } + static llvm::StringRef name() { return "Pass-through hull shader generation"; } void updatePipelineState(llvm::Module &module, PipelineState *pipelineState) const; llvm::Function *generateTcsPassthroughShader(llvm::Module &module, PipelineShadersResult &pipelineShaders, PipelineState *pipelineState); diff --git a/lgc/include/lgc/patch/PatchInitializeWorkgroupMemory.h b/lgc/include/lgc/patch/PatchInitializeWorkgroupMemory.h index 1bdce133f1..29b0814b21 100644 --- a/lgc/include/lgc/patch/PatchInitializeWorkgroupMemory.h +++ b/lgc/include/lgc/patch/PatchInitializeWorkgroupMemory.h @@ -30,7 +30,7 @@ */ #pragma once -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "lgc/util/BuilderBase.h" diff --git a/lgc/include/lgc/patch/PeepholeOptimization.h b/lgc/include/lgc/patch/PeepholeOptimization.h index b2d05c7c09..a8707bcdc7 100644 --- a/lgc/include/lgc/patch/PeepholeOptimization.h +++ b/lgc/include/lgc/patch/PeepholeOptimization.h @@ -25,7 +25,7 @@ /** *********************************************************************************************************************** * @file PeepholeOptimization.h - * @brief LLPC header file: contains declaration of class lgc::PatchPeepholeOpt. + * @brief LLPC header file: contains declaration of class lgc::PeepholeOptimization. *********************************************************************************************************************** */ #pragma once @@ -45,12 +45,12 @@ namespace lgc { // // - Change log2 ( const +/- x ) -> log2 ( max ( 0.0, const +/- x ) ) to avoid application underflow. // -class PatchPeepholeOpt final : public llvm::InstVisitor, - public llvm::PassInfoMixin { +class PeepholeOptimization final : public llvm::InstVisitor, + public llvm::PassInfoMixin { public: llvm::PreservedAnalyses run(llvm::Function &function, llvm::FunctionAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch LLVM for peephole optimizations"; } + static llvm::StringRef name() { return "Peephole optimizations"; } void visitIntToPtr(llvm::IntToPtrInst &intToPtr); void visitCallInst(llvm::CallInst &callInst); diff --git a/lgc/include/lgc/patch/PreparePipelineAbi.h b/lgc/include/lgc/patch/PreparePipelineAbi.h index 5c025e1262..b70825b145 100644 --- a/lgc/include/lgc/patch/PreparePipelineAbi.h +++ b/lgc/include/lgc/patch/PreparePipelineAbi.h @@ -25,12 +25,12 @@ /** *********************************************************************************************************************** * @file PreparePipelineAbi.h - * @brief LLPC header file: contains declaration of class lgc::PatchPreparePipelineAbi. + * @brief LLPC header file: contains declaration of class lgc::PreparePipelineAbi. *********************************************************************************************************************** */ #pragma once -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "lgc/state/TargetInfo.h" @@ -41,7 +41,7 @@ namespace lgc { // ===================================================================================================================== // Pass to prepare the pipeline ABI -class PatchPreparePipelineAbi final : public Patch, public llvm::PassInfoMixin { +class PreparePipelineAbi final : public Patch, public llvm::PassInfoMixin { public: // A collection of handler functions to get the analysis info of the given function struct FunctionAnalysisHandlers { @@ -51,11 +51,11 @@ class PatchPreparePipelineAbi final : public Patch, public llvm::PassInfoMixin

getCycleInfo; }; - PatchPreparePipelineAbi(); + PreparePipelineAbi(); llvm::PreservedAnalyses run(llvm::Module &module, llvm::ModuleAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch LLVM for preparing pipeline ABI"; } + static llvm::StringRef name() { return "Preparing pipeline ABI"; } static std::pair readTessFactors(PipelineState *pipelineState, llvm::Value *relPatchId, llvm::IRBuilder<> &builder); diff --git a/lgc/include/lgc/patch/ScalarizeLoads.h b/lgc/include/lgc/patch/ScalarizeLoads.h index 8fd2286a40..aa77377754 100644 --- a/lgc/include/lgc/patch/ScalarizeLoads.h +++ b/lgc/include/lgc/patch/ScalarizeLoads.h @@ -31,7 +31,7 @@ #pragma once #include "lgc/Builder.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "llvm/IR/InstVisitor.h" @@ -46,7 +46,7 @@ class ScalarizeLoads final : public llvm::InstVisitor, public ll llvm::PreservedAnalyses run(llvm::Function &function, llvm::FunctionAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch LLVM for load scalarizer optimization"; } + static llvm::StringRef name() { return "Scalarize loads optimization"; } void visitLoadInst(llvm::LoadInst &loadInst); diff --git a/lgc/include/lgc/patch/SetupTargetFeatures.h b/lgc/include/lgc/patch/SetupTargetFeatures.h index 9af3830dca..8bbcf55b70 100644 --- a/lgc/include/lgc/patch/SetupTargetFeatures.h +++ b/lgc/include/lgc/patch/SetupTargetFeatures.h @@ -30,7 +30,7 @@ */ #pragma once -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "lgc/util/BuilderBase.h" @@ -43,7 +43,7 @@ class PatchSetupTargetFeatures : public Patch, public llvm::PassInfoMixin { public: llvm::PreservedAnalyses run(llvm::Function &function, llvm::FunctionAnalysisManager &analysisManager); - static llvm::StringRef name() { return "Patch LLVM for structured buffers"; } + static llvm::StringRef name() { return "Lower structured buffers operations"; } }; } // namespace lgc diff --git a/lgc/include/lgc/patch/VertexFetch.h b/lgc/include/lgc/patch/VertexFetch.h index 83d7b47314..d2ba9e3489 100644 --- a/lgc/include/lgc/patch/VertexFetch.h +++ b/lgc/include/lgc/patch/VertexFetch.h @@ -37,7 +37,7 @@ namespace lgc { class BuilderBase; -class InputImportGenericOp; +class LoadVertexInputOp; // ===================================================================================================================== // Public interface to vertex fetch manager. @@ -51,10 +51,11 @@ class VertexFetch { // Generate code to fetch a vertex value virtual llvm::Value *fetchVertex(llvm::Type *inputTy, const VertexInputDescription *description, unsigned location, - unsigned compIdx, BuilderImpl &builderImpl) = 0; + unsigned compIdx, BuilderImpl &builderImpl, llvm::Value *vertexIndex, + llvm::Value *instanceIndex) = 0; // Generate code to fetch a vertex value for uber shader - virtual llvm::Value *fetchVertex(InputImportGenericOp *vertexFetch, llvm::Value *inputDesc, llvm::Value *locMasks, + virtual llvm::Value *fetchVertex(LoadVertexInputOp *vertexFetch, llvm::Value *inputDesc, llvm::Value *locMasks, BuilderBase &builder, bool disablePerCompFetch) = 0; }; diff --git a/lgc/include/lgc/state/IntrinsDefs.h b/lgc/include/lgc/state/IntrinsDefs.h index 39ba91c3d4..522e5920c2 100644 --- a/lgc/include/lgc/state/IntrinsDefs.h +++ b/lgc/include/lgc/state/IntrinsDefs.h @@ -50,15 +50,15 @@ static const unsigned GsAllocReq = 9; // GS requests that parameter cache spa static const unsigned GsCut = 0x12; // [3:0] = 2 (GS), [5:4] = 1 (cut) static const unsigned GsEmit = 0x22; // [3:0] = 2 (GS), [5:4] = 2 (emit) -static const unsigned GsCutStreaM0 = 0x12; // [3:0] = 2 (GS), [5:4] = 1 (cut), [9:8] = 0 (stream0) -static const unsigned GsCutStreaM1 = 0x112; // [3:0] = 2 (GS), [5:4] = 1 (cut), [9:8] = 1 (stream1) -static const unsigned GsCutStreaM2 = 0x212; // [3:0] = 2 (GS), [5:4] = 1 (cut), [9:8] = 2 (stream2) -static const unsigned GsCutStreaM3 = 0x312; // [3:0] = 2 (GS), [5:4] = 1 (cut), [9:8] = 3 (stream3) - -static const unsigned GsEmitStreaM0 = 0x22; // [3:0] = 2 (GS), [5:4] = 2 (emit), [9:8] = 0 (stream0) -static const unsigned GsEmitStreaM1 = 0x122; // [3:0] = 2 (GS), [5:4] = 2 (emit), [9:8] = 1 (stream1) -static const unsigned GsEmitStreaM2 = 0x222; // [3:0] = 2 (GS), [5:4] = 2 (emit), [9:8] = 2 (stream2) -static const unsigned GsEmitStreaM3 = 0x322; // [3:0] = 2 (GS), [5:4] = 2 (emit), [9:8] = 3 (stream3) +static const unsigned GsCutStream0 = 0x12; // [3:0] = 2 (GS), [5:4] = 1 (cut), [9:8] = 0 (stream0) +static const unsigned GsCutStream1 = 0x112; // [3:0] = 2 (GS), [5:4] = 1 (cut), [9:8] = 1 (stream1) +static const unsigned GsCutStream2 = 0x212; // [3:0] = 2 (GS), [5:4] = 1 (cut), [9:8] = 2 (stream2) +static const unsigned GsCutStream3 = 0x312; // [3:0] = 2 (GS), [5:4] = 1 (cut), [9:8] = 3 (stream3) + +static const unsigned GsEmitStream0 = 0x22; // [3:0] = 2 (GS), [5:4] = 2 (emit), [9:8] = 0 (stream0) +static const unsigned GsEmitStream1 = 0x122; // [3:0] = 2 (GS), [5:4] = 2 (emit), [9:8] = 1 (stream1) +static const unsigned GsEmitStream2 = 0x222; // [3:0] = 2 (GS), [5:4] = 2 (emit), [9:8] = 2 (stream2) +static const unsigned GsEmitStream3 = 0x322; // [3:0] = 2 (GS), [5:4] = 2 (emit), [9:8] = 3 (stream3) static const unsigned GsEmitCutStreamIdShift = 0x8; // Shift of STREAM_ID of the message GS_EMIT/GS_CUT static const unsigned GsEmitCutStreamIdMask = 0x300; // Mask of STREAM_ID of the message GS_EMIT/GS_CUT diff --git a/lgc/include/lgc/state/ResourceUsage.h b/lgc/include/lgc/state/ResourceUsage.h index e8e946e3af..270cd32b02 100644 --- a/lgc/include/lgc/state/ResourceUsage.h +++ b/lgc/include/lgc/state/ResourceUsage.h @@ -410,9 +410,9 @@ struct ResourceUsage { // (in dword, correspond to "hsOutputBase") unsigned patchConstStart; // Offset into LDS where patch constants start (in dword, // correspond to "patchConstBase") - unsigned tessFactorStart; // Offset into LDS where tess factor start (in dword) unsigned hsPatchCountStart; // Offset into LDS where count of HS patches start (in dword) unsigned specialTfValueStart; // Offset into LDS where special TF value start (in dword) + unsigned inPatchStart; // Offset into LDS where vertices of input patches start (in dword) } onChip; // Off-chip calculation factors diff --git a/lgc/include/lgc/util/BuilderBase.h b/lgc/include/lgc/util/BuilderBase.h index fa4782b5f8..6cf3968ef4 100644 --- a/lgc/include/lgc/util/BuilderBase.h +++ b/lgc/include/lgc/util/BuilderBase.h @@ -95,6 +95,16 @@ class BuilderBase : public BuilderCommon { // Create a waterfall end intrinsic. llvm::Instruction *CreateWaterfallEnd(llvm::Value *nonUniformInst, llvm::Value *waterfallBegin); + + // Create an "s_setreg" to set specified bits of a hardware register. + // + // @param hwRegId : The hardware register ID + // @param offset: The starting offset + // @param size: The size of bits + // @param value : The value to set to the register + // @param instName : Name to give instruction(s) + llvm::Instruction *CreateSetReg(unsigned hwRegId, unsigned offset, unsigned size, llvm::Value *value, + const llvm::Twine &instName = ""); }; } // namespace lgc diff --git a/lgc/interface/lgc/Builder.h b/lgc/interface/lgc/Builder.h index fde589f64c..4741cc3f91 100644 --- a/lgc/interface/lgc/Builder.h +++ b/lgc/interface/lgc/Builder.h @@ -971,7 +971,7 @@ class Builder : public BuilderDefs { // @param resultTy : Result type // @param dim : Image dimension // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor or texel buffer descriptor. + // @param imageDesc : The pointer to the image descriptor or texel buffer descriptor. // @param coord : Coordinates: scalar or vector i32, exactly right width // @param mipLevel : Mipmap level if doing load_mip, otherwise nullptr // @param instName : Name to give instruction(s) @@ -988,8 +988,8 @@ class Builder : public BuilderDefs { // @param resultTy : Result type // @param dim : Image dimension, 2DMsaa or 2DArrayMsaa // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor - // @param fmaskDesc : Fmask descriptor + // @param imageDesc : The pointer to the image descriptor + // @param fmaskDesc : The pointer to the fmask descriptor // @param coord : Coordinates: scalar or vector i32, exactly right width for given dimension excluding sample // @param sampleNum : Sample number, i32 // @param instName : Name to give instruction(s) @@ -1002,7 +1002,7 @@ class Builder : public BuilderDefs { // @param texel : Texel value to store; v4i16, v4i32, v4f16 or v4f32 // @param dim : Image dimension // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor or texel buffer descriptor + // @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param coord : Coordinates: scalar or vector i32, exactly right width // @param mipLevel : Mipmap level if doing store_mip, otherwise nullptr // @param instName : Name to give instruction(s) @@ -1021,8 +1021,8 @@ class Builder : public BuilderDefs { // @param resultTy : Result type // @param dim : Image dimension // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor - // @param samplerDesc : Sampler descriptor + // @param imageDesc : The pointer to the image descriptor + // @param samplerDesc : The pointer to the sampler descriptor // @param address : Address and other arguments // @param instName : Name to give instruction(s) llvm::Value *CreateImageSample(llvm::Type *resultTy, unsigned dim, unsigned flags, llvm::Value *imageDesc, @@ -1054,8 +1054,8 @@ class Builder : public BuilderDefs { // @param resultTy : Result type // @param dim : Image dimension // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor - // @param samplerDesc : Sampler descriptor + // @param imageDesc : The pointer to the image descriptor + // @param samplerDesc : The pointer to the sampler descriptor // @param address : Address and other arguments // @param instName : Name to give instruction(s) llvm::Value *CreateImageGather(llvm::Type *resultTy, unsigned dim, unsigned flags, llvm::Value *imageDesc, @@ -1072,7 +1072,7 @@ class Builder : public BuilderDefs { // @param dim : Image dimension // @param flags : ImageFlag* flags // @param ordering : Atomic ordering - // @param imageDesc : Image descriptor or texel buffer descriptor + // @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param coord : Coordinates: scalar or vector i32, exactly right width // @param inputValue : Input value: i32 // @param instName : Name to give instruction(s) @@ -1088,7 +1088,7 @@ class Builder : public BuilderDefs { // @param dim : Image dimension // @param flags : ImageFlag* flags // @param ordering : Atomic ordering - // @param imageDesc : Image descriptor or texel buffer descriptor + // @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param coord : Coordinates: scalar or vector i32, exactly right width // @param inputValue : Input value: i32 // @param comparatorValue : Value to compare against: i32 @@ -1101,7 +1101,7 @@ class Builder : public BuilderDefs { // // @param dim : Image dimension // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor or texel buffer descriptor + // @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param instName : Name to give instruction(s) llvm::Value *CreateImageQueryLevels(unsigned dim, unsigned flags, llvm::Value *imageDesc, const llvm::Twine &instName = ""); @@ -1110,7 +1110,7 @@ class Builder : public BuilderDefs { // // @param dim : Image dimension // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor or texel buffer descriptor + // @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param instName : Name to give instruction(s) llvm::Value *CreateImageQuerySamples(unsigned dim, unsigned flags, llvm::Value *imageDesc, const llvm::Twine &instName = ""); @@ -1120,7 +1120,7 @@ class Builder : public BuilderDefs { // // @param dim : Image dimension // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor or texel buffer descriptor + // @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param lod : LOD // @param instName : Name to give instruction(s) llvm::Value *CreateImageQuerySize(unsigned dim, unsigned flags, llvm::Value *imageDesc, llvm::Value *lod, @@ -1132,8 +1132,8 @@ class Builder : public BuilderDefs { // // @param dim : Image dimension // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor - // @param samplerDesc : Sampler descriptor + // @param imageDesc : The pointer to the image descriptor + // @param samplerDesc : The pointer to the sampler descriptor // @param coord : Coordinates: scalar or vector f32, exactly right width without array layer // @param instName : Name to give instruction(s) llvm::Value *CreateImageGetLod(unsigned dim, unsigned flags, llvm::Value *imageDesc, llvm::Value *samplerDesc, @@ -1143,7 +1143,7 @@ class Builder : public BuilderDefs { // // @param dim : Image dimension // @param flags : ImageFlag* flags - // @param imageDesc : Image descriptor or texel buffer descriptor + // @param imageDesc : The pointer to the image descriptor or texel buffer descriptor // @param sampleId : Sample ID // @param instName : Name to give instruction(s) llvm::Value *CreateImageGetSamplePosition(unsigned dim, unsigned flags, llvm::Value *imageDesc, llvm::Value *sampleId, diff --git a/lgc/interface/lgc/LgcContext.h b/lgc/interface/lgc/LgcContext.h index 7413023c7c..f8c21fa4d1 100644 --- a/lgc/interface/lgc/LgcContext.h +++ b/lgc/interface/lgc/LgcContext.h @@ -84,15 +84,7 @@ class LgcContext { // @param gpuName : LLVM GPU name (e.g. "gfx900"); empty to use -mcpu option setting // @param optLevel : LLVM optimization level used to initialize target machine static std::unique_ptr createTargetMachine(llvm::StringRef gpuName, -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - llvm::CodeGenOpt::Level optLevel -#else - // New version of the code (also handles unknown - // version, which we treat as latest) - llvm::CodeGenOptLevel optLevel -#endif - ); + llvm::CodeGenOptLevel optLevel); // Create the LgcContext. // @@ -137,21 +129,11 @@ class LgcContext { // Adds target passes to pass manager, depending on "-filetype" and "-emit-llvm" options void addTargetPasses(lgc::LegacyPassManager &passMgr, llvm::Timer *codeGenTimer, llvm::raw_pwrite_stream &outStream); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - // Returns the optimization level for the context. - llvm::CodeGenOpt::Level getOptimizationLevel() const; - - // Returns the optimization level used for context initialization. - llvm::CodeGenOpt::Level getInitialOptimizationLevel() const { return m_initialOptLevel; } -#else - // New version of the code (also handles unknown version, which we treat as latest) // Returns the optimization level for the context. llvm::CodeGenOptLevel getOptimizationLevel() const; // Returns the optimization level used for context initialization. llvm::CodeGenOptLevel getInitialOptimizationLevel() const { return m_initialOptLevel; } -#endif // Utility method to create a start/stop timer pass static llvm::ModulePass *createStartStopTimer(llvm::Timer *timer, bool starting); @@ -185,13 +167,7 @@ class LgcContext { TargetInfo *m_targetInfo = nullptr; // Target info unsigned m_palAbiVersion = 0xFFFFFFFF; // PAL pipeline ABI version to compile for PassManagerCache *m_passManagerCache = nullptr; // Pass manager cache and creator -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - llvm::CodeGenOpt::Level m_initialOptLevel; // Optimization level at initialization -#else - // New version of the code (also handles unknown version, which we treat as latest) - llvm::CodeGenOptLevel m_initialOptLevel; // Optimization level at initialization -#endif + llvm::CodeGenOptLevel m_initialOptLevel; // Optimization level at initialization }; } // namespace lgc diff --git a/lgc/interface/lgc/LgcDialect.td b/lgc/interface/lgc/LgcDialect.td index 3831160fb3..430b975c50 100644 --- a/lgc/interface/lgc/LgcDialect.td +++ b/lgc/interface/lgc/LgcDialect.td @@ -369,9 +369,25 @@ def InputImportGenericOp : DivergentLgcOp<"input.import.generic", [Memory<[]>, W let summary = "read a generic shader input variable"; let description = [{ - Reads a generic graphics shader input variable, either from a vertex buffer or from the previous stage outputs. + Reads a generic graphics shader input variable from the previous stage outputs. - Used in all graphics shader stages except task and mesh shader. + Used in all graphics shader stages except vertex, task and mesh shader. + }]; +} + +def LoadVertexInputOp : DivergentLgcOp<"load.vertex.input", [Memory<[]>, WillReturn]> { + let superclass = GenericLocationOp; + + let arguments = (ins GenericLocationOp, I32:$vertex_index, I32:$instance_index); + let results = (outs value:$result); + + let defaultBuilderHasExplicitResultType = true; + + let summary = "read from a vertex buffer input"; + let description = [{ + Reads a generic input variable from a vertex buffer according to vertex array and buffer bindings. + + Used in vertex shaders and the transform compute shader (which inlines a vertex shader). }]; } @@ -1012,8 +1028,8 @@ def SparsityIndexLoadOp : DivergentLgcOp<"sparsityindex.load", [Memory<[(read)]> def SparseCooperativeMatrixMulAddOp : DivergentLgcOp<"sparseCooperativeMatrix.muladd", [Convergent, WillReturn]> { let arguments = (ins value:$matrix_a, value:$sparse_index, value:$matrix_b, value:$matrix_c, AttrI1:$is_signed_a, AttrI1:$is_signed_b, - AttrI1:$is_sat, CooperativeMatrixElementType:$accu_elem_type, - CooperativeMatrixElementType:$factor_elem_type); + AttrI1:$is_sat, CooperativeMatrixElementType:$matrix_a_elem_type, + CooperativeMatrixElementType:$matrix_b_elem_type, CooperativeMatrixElementType:$matrix_c_elem_type); let results = (outs value:$result); let defaultBuilderHasExplicitResultType = true; @@ -1033,8 +1049,9 @@ def SparseCooperativeMatrixMulAddOp : DivergentLgcOp<"sparseCooperativeMatrix.mu 'is_signed_a' is the signess for matrixA's element type. 'is_signed_b' is the signess for matrixB's element type. 'is_sat' is the saturatingAccumulation for calculation, - 'accu_elem_type' is the component type of the accumulator matrix. - 'factor_elem_type' is the component type of the factor matrix. + '$matrix_a_elem_type' is the component type of the A matrix. + '$matrix_b_elem_type' is the component type of the B matrix. + '$matrix_c_elem_type' is the component type of the C matrix. }]; } diff --git a/lgc/interface/lgc/PassManager.h b/lgc/interface/lgc/PassManager.h index c91b866e38..8741946ef0 100644 --- a/lgc/interface/lgc/PassManager.h +++ b/lgc/interface/lgc/PassManager.h @@ -30,7 +30,7 @@ */ #pragma once -#include "lgc/ModuleBunch.h" +#include "compilerutils/ModuleBunch.h" #include "llvm/IR/LegacyPassManager.h" #include "llvm/IR/PassManager.h" diff --git a/lgc/interface/lgc/Pipeline.h b/lgc/interface/lgc/Pipeline.h index 9a2cce48f5..c30b5f2f57 100644 --- a/lgc/interface/lgc/Pipeline.h +++ b/lgc/interface/lgc/Pipeline.h @@ -323,6 +323,10 @@ union ShaderOptions { bool reserved; /// Let dmask bits be fully enabled when call 'image.sample.c', for depth compare mode swizzling workaround. bool imageSampleDrefReturnsRgba; + + /// Specifies that any shader input variables decorated as ViewIndex + /// will be assigned values as if they were decorated as DeviceIndex. + bool viewIndexFromDeviceIndex; }; }; static_assert(sizeof(ShaderOptions) == sizeof(ShaderOptions::u32All)); @@ -907,8 +911,7 @@ class Pipeline { // Set a function's shader subtype. Only has an effect on a compute shader or non-shader export function, // where it causes the .shader_subtype PAL metadata item to be set to the arbitrary string given here. // The PAL metadata item has no semantic role, but is used by tools, which expect the value to be one of: - // "Traversal", "RayGeneration", "Intersection", "AnyHit", "ClosestHit", "Miss", "Callable", "LaunchKernel", - // "FixedExpansionNode", "DynamicExpansionNode", "AggregationNode", "ThreadLaunchNode", "DrawNode" + // "Traversal", "RayGeneration", "Intersection", "AnyHit", "ClosestHit", "Miss", "Callable", "LaunchKernel" static void setShaderSubtype(llvm::GlobalObject *func, llvm::StringRef subtype); // Find the shader entry-point from shader module, and set pipeline stage. diff --git a/lgc/patch/ApplyWorkarounds.cpp b/lgc/patch/ApplyWorkarounds.cpp index ad7213f703..f1c0c9fa3e 100644 --- a/lgc/patch/ApplyWorkarounds.cpp +++ b/lgc/patch/ApplyWorkarounds.cpp @@ -25,7 +25,7 @@ /** *********************************************************************************************************************** * @file ApplyWorkarounds.cpp - * @brief LLPC source file: contains implementation of class lgc::PatchWorkarounds. + * @brief LLPC source file: contains implementation of class lgc::ApplyWorkarounds. *********************************************************************************************************************** */ @@ -39,7 +39,7 @@ #include "llvm/IR/IntrinsicsAMDGPU.h" #include "llvm/Support/Debug.h" -#define DEBUG_TYPE "lgc-patch-workarounds" +#define DEBUG_TYPE "lgc-apply-workarounds" using namespace lgc; using namespace llvm; @@ -52,7 +52,7 @@ namespace lgc { // @param [in/out] module : LLVM module to be run on // @param [in/out] analysisManager : Analysis manager to use for this transformation // @returns : The preserved analyses (The analyses that are still valid after this pass) -PreservedAnalyses PatchWorkarounds::run(Module &module, ModuleAnalysisManager &analysisManager) { +PreservedAnalyses ApplyWorkarounds::run(Module &module, ModuleAnalysisManager &analysisManager) { PipelineState *pipelineState = analysisManager.getResult(module).getPipelineState(); LLVM_DEBUG(dbgs() << "Run the pass Patch-Workarounds\n"); @@ -76,7 +76,7 @@ PreservedAnalyses PatchWorkarounds::run(Module &module, ModuleAnalysisManager &a // be an image descriptor. We only have to apply the workaround for gfx10.1 (note: this is an application error that // are handling gracefully) // -void PatchWorkarounds::applyImageDescWorkaround(void) { +void ApplyWorkarounds::applyImageDescWorkaround(void) { if (!m_pipelineState->getOptions().disableImageResourceCheck && m_pipelineState->getTargetInfo().getGpuWorkarounds().gfx10.waFixBadImageDescriptor) { @@ -128,7 +128,7 @@ void PatchWorkarounds::applyImageDescWorkaround(void) { // // @param callInst : The image intrinsic call instruction // @param isLastUse : The intrinsic being considered is a waterfall.last.use -void PatchWorkarounds::processImageDescWorkaround(CallInst &callInst, bool isLastUse) { +void ApplyWorkarounds::processImageDescWorkaround(CallInst &callInst, bool isLastUse) { Function *const calledFunc = callInst.getCalledFunction(); if (!calledFunc) return; diff --git a/lgc/patch/CollectImageOperations.cpp b/lgc/patch/CollectImageOperations.cpp index edc0717e71..06fda22e8c 100644 --- a/lgc/patch/CollectImageOperations.cpp +++ b/lgc/patch/CollectImageOperations.cpp @@ -29,7 +29,7 @@ *********************************************************************************************************************** */ #include "lgc/patch/CollectImageOperations.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineState.h" #include "llvm/InitializePasses.h" #include "llvm/Support/Debug.h" diff --git a/lgc/patch/CollectResourceUsage.cpp b/lgc/patch/CollectResourceUsage.cpp index 40dec85d89..3b3ba150ce 100644 --- a/lgc/patch/CollectResourceUsage.cpp +++ b/lgc/patch/CollectResourceUsage.cpp @@ -25,7 +25,7 @@ /** *********************************************************************************************************************** * @file CollectResourceUsage.cpp - * @brief LLPC source file: contains implementation of class lgc::PatchResourceCollect. + * @brief LLPC source file: contains implementation of class lgc::CollectResourceUsage. *********************************************************************************************************************** */ #include "lgc/patch/CollectResourceUsage.h" @@ -49,7 +49,7 @@ #include #include -#define DEBUG_TYPE "lgc-patch-resource-collect" +#define DEBUG_TYPE "lgc-collect-resource-usage" using namespace llvm; using namespace lgc; @@ -69,7 +69,7 @@ constexpr unsigned OnChipGsMaxEsVertsPerSubgroup = 255; constexpr unsigned DefaultLdsSizePerSubgroup = 8192; // ===================================================================================================================== -PatchResourceCollect::PatchResourceCollect() : m_resUsage(nullptr) { +CollectResourceUsage::CollectResourceUsage() : m_resUsage(nullptr) { } // ===================================================================================================================== @@ -78,7 +78,7 @@ PatchResourceCollect::PatchResourceCollect() : m_resUsage(nullptr) { // @param [in/out] module : LLVM module to be run on // @param [in/out] analysisManager : Analysis manager to use for this transformation // @returns : The preserved analyses (The analyses that are still valid after this pass) -PreservedAnalyses PatchResourceCollect::run(Module &module, ModuleAnalysisManager &analysisManager) { +PreservedAnalyses CollectResourceUsage::run(Module &module, ModuleAnalysisManager &analysisManager) { PipelineShadersResult &pipelineShaders = analysisManager.getResult(module); PipelineState *pipelineState = analysisManager.getResult(module).getPipelineState(); @@ -94,6 +94,9 @@ PreservedAnalyses PatchResourceCollect::run(Module &module, ModuleAnalysisManage m_tcsInputHasDynamicIndexing = false; + // Initialize the flag to match pipeline option settings + m_optimizePointSizeWrite = m_pipelineState->getOptions().optimizePointSizeWrite; + bool needPack = false; for (auto stage : ShaderStagesGraphics) { if (pipelineState->hasShaderStage(stage) && @@ -156,7 +159,7 @@ PreservedAnalyses PatchResourceCollect::run(Module &module, ModuleAnalysisManage // Sets NGG control settings // // @param [in/out] module : Module -void PatchResourceCollect::setNggControl(Module *module) { +void CollectResourceUsage::setNggControl(Module *module) { assert(m_pipelineState->isGraphics()); // If mesh pipeline, skip NGG control settings const bool meshPipeline = @@ -264,7 +267,7 @@ void PatchResourceCollect::setNggControl(Module *module) { // Checks whether NGG could be enabled. // // @param [in/out] module : Module -bool PatchResourceCollect::canUseNgg(Module *module) { +bool CollectResourceUsage::canUseNgg(Module *module) { assert(m_pipelineState->isGraphics()); // Always enable NGG for GFX11+ @@ -316,7 +319,7 @@ bool PatchResourceCollect::canUseNgg(Module *module) { // Checks whether NGG culling could be enabled. // // @param [in/out] module : Module -bool PatchResourceCollect::canUseNggCulling(Module *module) { +bool CollectResourceUsage::canUseNggCulling(Module *module) { assert(m_pipelineState->isGraphics()); const bool hasTs = m_pipelineState->hasShaderStage(ShaderStage::TessControl) || @@ -398,8 +401,8 @@ bool PatchResourceCollect::canUseNggCulling(Module *module) { return false; // Heuristic detecting very simple calculated position for geometry that will - // never be culled, disable NGG culling if there is no position fetch. - auto hasPositionFetch = [posCall] { + // never be culled, disable NGG culling if position value is from input. + auto posValueFromInput = [posCall] { std::list workList; workList.push_back(posCall); std::unordered_set visited; @@ -408,8 +411,9 @@ bool PatchResourceCollect::canUseNggCulling(Module *module) { workList.pop_front(); visited.insert(inst); for (Value *op : inst->operands()) { - LoadInst *opLoad = dyn_cast(op); - if (opLoad && opLoad->getPointerAddressSpace() != ADDR_SPACE_CONST) + CallInst *call = dyn_cast(op); + if (call && (isa(call) || isa(call) || + call->getName().starts_with(lgcName::InputImportBuiltIn))) return true; Instruction *opInst = dyn_cast(op); if (opInst && visited.find(opInst) == visited.end()) @@ -418,7 +422,7 @@ bool PatchResourceCollect::canUseNggCulling(Module *module) { } return false; }; - if (!hasGs && !hasPositionFetch()) + if (!hasGs && !posValueFromInput()) return false; // We can safely enable NGG culling here @@ -427,7 +431,7 @@ bool PatchResourceCollect::canUseNggCulling(Module *module) { // ===================================================================================================================== // Determines whether GS on-chip mode is valid for this pipeline, also computes ES-GS/GS-VS ring item size. -bool PatchResourceCollect::checkGsOnChipValidity() { +bool CollectResourceUsage::checkGsOnChipValidity() { bool gsOnChip = true; const bool hasTs = m_pipelineState->hasShaderStage(ShaderStage::TessControl) || @@ -1084,7 +1088,7 @@ bool PatchResourceCollect::checkGsOnChipValidity() { // ===================================================================================================================== // Process a single shader. -void PatchResourceCollect::processShader() { +void CollectResourceUsage::processShader() { m_resUsage = m_pipelineState->getShaderResourceUsage(m_shaderStage.value()); // Invoke handling of "call" instruction @@ -1148,7 +1152,7 @@ void PatchResourceCollect::processShader() { // ===================================================================================================================== // Process missing fragment shader. This happens in a part-pipeline compile; we deserialize the FS's input mappings // from PAL metadata that came from the separate FS compilation. -void PatchResourceCollect::processMissingFs() { +void CollectResourceUsage::processMissingFs() { assert(m_shaderStage == ShaderStage::Fragment); if (!m_processMissingFs) return; @@ -1185,7 +1189,7 @@ void PatchResourceCollect::processMissingFs() { // ===================================================================================================================== // Check whether vertex reuse should be disabled. -bool PatchResourceCollect::isVertexReuseDisabled() { +bool CollectResourceUsage::isVertexReuseDisabled() { const bool hasGs = m_pipelineState->hasShaderStage(ShaderStage::Geometry); const bool hasTs = (m_pipelineState->hasShaderStage(ShaderStage::TessControl) || m_pipelineState->hasShaderStage(ShaderStage::TessEval)); @@ -1213,7 +1217,7 @@ bool PatchResourceCollect::isVertexReuseDisabled() { // Check if ray query LDS stack usage. // // @param module : LLVM module -void PatchResourceCollect::checkRayQueryLdsStackUsage(Module *module) { +void CollectResourceUsage::checkRayQueryLdsStackUsage(Module *module) { auto ldsStack = module->getNamedGlobal(RayQueryLdsStackName); if (ldsStack) { SmallVector worklist; @@ -1240,7 +1244,7 @@ void PatchResourceCollect::checkRayQueryLdsStackUsage(Module *module) { // Visits "call" instruction. // // @param callInst : "Call" instruction -void PatchResourceCollect::visitCallInst(CallInst &callInst) { +void CollectResourceUsage::visitCallInst(CallInst &callInst) { auto callee = callInst.getCalledFunction(); if (!callee) return; @@ -1249,7 +1253,8 @@ void PatchResourceCollect::visitCallInst(CallInst &callInst) { auto mangledName = callee->getName(); - if (isa(callInst) || isa(callInst)) { + if (isa(callInst) || isa(callInst) || + isa(callInst)) { if (isDeadCall) m_deadCalls.push_back(&callInst); else @@ -1277,26 +1282,27 @@ void PatchResourceCollect::visitCallInst(CallInst &callInst) { } else if (mangledName.starts_with(lgcName::OutputExportGeneric)) { m_outputCalls.push_back(&callInst); } else if (mangledName.starts_with(lgcName::OutputExportBuiltIn)) { - // NOTE: If an output value is unspecified, we can safely drop it and remove the output export call for the last - // vertex processing stage (Mesh shader has different processing). if (m_pipelineState->getLastVertexProcessingStage() == m_shaderStage && m_shaderStage != ShaderStage::Mesh) { + // NOTE: If an output value is unspecified, we can safely drop it and remove the output export call for the last + // vertex processing stage (Mesh shader has different processing). unsigned builtInId = cast(callInst.getOperand(0))->getZExtValue(); auto outputValue = callInst.getArgOperand(callInst.arg_size() - 1); - bool builtInActive = true; if (isa(outputValue) || isa(outputValue)) - builtInActive = false; + m_deadCalls.push_back(&callInst); // Output value is undefined, could be safely remove the write call + else + m_activeOutputBuiltIns.insert(builtInId); - if (m_pipelineState->getOptions().optimizePointSizeWrite && builtInId == BuiltInPointSize) { - // Remove the write of PointSize if its write value is 1.0. - if (isa(outputValue) && cast(outputValue)->getValueAPF().convertToFloat() == 1.0) - builtInActive = false; + // Could remove PointSize writes if all write values are uniformly 1.0. Let's decide when we finish + // visiting all of such writes. + if (m_optimizePointSizeWrite && builtInId == BuiltInPointSize) { + if (isa(outputValue) && cast(outputValue)->getValueAPF().convertToFloat() == 1.0) { + m_pointSizeWritesToOptimize.push_back(&callInst); // Could be optimized + } else { + m_optimizePointSizeWrite = false; // Encounter non-1.0 value, disable the optimization + m_pointSizeWritesToOptimize.clear(); + } } - - if (builtInActive) - m_activeOutputBuiltIns.insert(builtInId); - else - m_deadCalls.push_back(&callInst); } } else if (mangledName.starts_with(lgcName::OutputExportXfb)) { auto outputValue = callInst.getArgOperand(callInst.arg_size() - 1); @@ -1329,7 +1335,7 @@ void PatchResourceCollect::visitCallInst(CallInst &callInst) { // ===================================================================================================================== // Clears inactive (those actually unused) inputs. -void PatchResourceCollect::clearInactiveBuiltInInput() { +void CollectResourceUsage::clearInactiveBuiltInInput() { // Clear those inactive built-in inputs (some are not checked, whose usage flags do not rely on their // actual uses) auto &builtInUsage = m_resUsage->builtInUsage; @@ -1547,9 +1553,22 @@ void PatchResourceCollect::clearInactiveBuiltInInput() { // ===================================================================================================================== // Clears inactive (those actually unused) outputs. -void PatchResourceCollect::clearInactiveBuiltInOutput() { +void CollectResourceUsage::clearInactiveBuiltInOutput() { // Clear inactive output built-ins for the last vertex processing stage (Mesh shader has different processing). if (m_pipelineState->getLastVertexProcessingStage() == m_shaderStage && m_shaderStage != ShaderStage::Mesh) { + if (m_optimizePointSizeWrite) { + // Mark all such writes as dead in order to remove them later on + for (auto pointSizeWrite : m_pointSizeWritesToOptimize) + m_deadCalls.push_back(pointSizeWrite); + m_pointSizeWritesToOptimize.clear(); + + // Mark PointSize as inactive + if (m_activeOutputBuiltIns.count(BuiltInPointSize) > 0) + m_activeOutputBuiltIns.erase(BuiltInPointSize); + } else { + assert(m_pointSizeWritesToOptimize.empty()); // Must be empty collection + } + auto &builtInOutLocMap = m_resUsage->inOutUsage.builtInOutputLocMap; if (m_shaderStage == ShaderStage::Geometry) { @@ -1656,7 +1675,7 @@ void PatchResourceCollect::clearInactiveBuiltInOutput() { // Does generic input/output matching and does location mapping afterwards. // // NOTE: This function should be called after the cleanup work of inactive inputs is done. -void PatchResourceCollect::matchGenericInOut() { +void CollectResourceUsage::matchGenericInOut() { assert(m_pipelineState->isGraphics()); // Do input matching and location remapping @@ -1815,7 +1834,7 @@ void PatchResourceCollect::matchGenericInOut() { // Maps special built-in input/output to generic ones. // // NOTE: This function should be called after generic input/output matching is done. -void PatchResourceCollect::mapBuiltInToGenericInOut() { +void CollectResourceUsage::mapBuiltInToGenericInOut() { assert(m_pipelineState->isGraphics()); const auto resUsage = m_pipelineState->getShaderResourceUsage(m_shaderStage.value()); @@ -2714,7 +2733,7 @@ void PatchResourceCollect::mapBuiltInToGenericInOut() { // // @param builtInId : Built-in ID // @param elemCount : Element count of this built-in -void PatchResourceCollect::mapGsBuiltInOutput(unsigned builtInId, unsigned elemCount) { +void CollectResourceUsage::mapGsBuiltInOutput(unsigned builtInId, unsigned elemCount) { assert(m_shaderStage == ShaderStage::Geometry); auto resUsage = m_pipelineState->getShaderResourceUsage(ShaderStage::Geometry); auto &inOutUsage = resUsage->inOutUsage.gs; @@ -2733,7 +2752,7 @@ void PatchResourceCollect::mapGsBuiltInOutput(unsigned builtInId, unsigned elemC // ===================================================================================================================== // Update the inputLocInfoutputoMap, perPatchInputLocMap and perPrimitiveInputLocMap -void PatchResourceCollect::updateInputLocInfoMapWithUnpack() { +void CollectResourceUsage::updateInputLocInfoMapWithUnpack() { auto &inOutUsage = m_pipelineState->getShaderResourceUsage(m_shaderStage.value())->inOutUsage; auto &inputLocInfoMap = inOutUsage.inputLocInfoMap; // Remove unused locationInfo @@ -2889,7 +2908,7 @@ void PatchResourceCollect::updateInputLocInfoMapWithUnpack() { // ===================================================================================================================== // Clear unused output from outputLocInfoMap, perPatchOutputLocMap, and perPrimitiveOutputLocMap -void PatchResourceCollect::clearUnusedOutput() { +void CollectResourceUsage::clearUnusedOutput() { auto nextStage = m_pipelineState->getNextShaderStage(m_shaderStage.value()); auto &inOutUsage = m_pipelineState->getShaderResourceUsage(m_shaderStage.value())->inOutUsage; auto &outputLocInfoMap = inOutUsage.outputLocInfoMap; @@ -3031,7 +3050,7 @@ void PatchResourceCollect::clearUnusedOutput() { // ===================================================================================================================== // Update the outputLocInfoMap, perPatchOutputLocMap, and perPrimitiveOutputLocMap -void PatchResourceCollect::updateOutputLocInfoMapWithUnpack() { +void CollectResourceUsage::updateOutputLocInfoMapWithUnpack() { clearUnusedOutput(); const auto nextStage = m_pipelineState->getNextShaderStage(m_shaderStage.value()); @@ -3275,7 +3294,7 @@ void PatchResourceCollect::updateOutputLocInfoMapWithUnpack() { // ===================================================================================================================== // Returns true if the locations for the GS output can be compressed. -bool PatchResourceCollect::canChangeOutputLocationsForGs() { +bool CollectResourceUsage::canChangeOutputLocationsForGs() { // The GS outputs can only be changed if LGC has access to the fragment shader's inputs. if (!m_pipelineState->isUnlinked()) return true; @@ -3288,7 +3307,7 @@ bool PatchResourceCollect::canChangeOutputLocationsForGs() { // ===================================================================================================================== // Update inputLocInfoMap based on {TCS, GS, FS} input import calls -void PatchResourceCollect::updateInputLocInfoMapWithPack() { +void CollectResourceUsage::updateInputLocInfoMapWithPack() { auto &inOutUsage = m_pipelineState->getShaderResourceUsage(m_shaderStage.value())->inOutUsage; auto &inputLocInfoMap = inOutUsage.inputLocInfoMap; inputLocInfoMap.clear(); @@ -3331,7 +3350,7 @@ void PatchResourceCollect::updateInputLocInfoMapWithPack() { // ===================================================================================================================== // Update outputLocInfoMap based on inputLocInfoMap of next stage or GS output export calls for copy shader -void PatchResourceCollect::updateOutputLocInfoMapWithPack() { +void CollectResourceUsage::updateOutputLocInfoMapWithPack() { auto &inOutUsage = m_pipelineState->getShaderResourceUsage(m_shaderStage.value())->inOutUsage; auto &outputLocInfoMap = inOutUsage.outputLocInfoMap; outputLocInfoMap.clear(); // Clear it, will reconstruct @@ -3461,7 +3480,7 @@ void PatchResourceCollect::updateOutputLocInfoMapWithPack() { // ===================================================================================================================== // Re-assemble output export functions based on the locationInfoMap -void PatchResourceCollect::reassembleOutputExportCalls() { +void CollectResourceUsage::reassembleOutputExportCalls() { if (m_outputCalls.empty()) return; assert(m_pipelineState->canPackOutput(m_shaderStage.value())); @@ -3524,10 +3543,8 @@ void PatchResourceCollect::reassembleOutputExportCalls() { if (elementTy->isHalfTy()) element = builder.CreateBitCast(element, builder.getInt16Ty()); element = builder.CreateZExt(element, builder.getInt32Ty()); - } else if (elementTy->isFloatTy()) { - // float -> i32 - element = builder.CreateBitCast(element, builder.getInt32Ty()); } + elementsInfo.elements[elemIdx] = element; if (bitWidth < 32) ++elementsInfo.elemCountOf16bit; @@ -3560,8 +3577,11 @@ void PatchResourceCollect::reassembleOutputExportCalls() { assert(highElem); highElem = builder.CreateShl(highElem, 16); outValue = builder.CreateOr(outValue, highElem); + outValue = builder.CreateBitCast(outValue, builder.getFloatTy()); + } else if (outValue->getType()->isIntegerTy(32)) { + // Convert integer to float + outValue = builder.CreateBitCast(outValue, builder.getFloatTy()); } - outValue = builder.CreateBitCast(outValue, builder.getFloatTy()); } else { // Output a vector outValue = PoisonValue::get(FixedVectorType::get(builder.getFloatTy(), compCount)); @@ -3574,8 +3594,12 @@ void PatchResourceCollect::reassembleOutputExportCalls() { // Two 16 - bit elements packed as a 32 - bit scalar highElem = builder.CreateShl(highElem, 16); component = builder.CreateOr(component, highElem); + component = builder.CreateBitCast(component, builder.getFloatTy()); + } else if (component->getType()->isIntegerTy(32)) { + // Convert integer to float + component = builder.CreateBitCast(component, builder.getFloatTy()); } - component = builder.CreateBitCast(component, builder.getFloatTy()); + // If component is already a float, no bitcast needed outValue = builder.CreateInsertElement(outValue, component, vectorComp); } } @@ -3597,13 +3621,13 @@ void PatchResourceCollect::reassembleOutputExportCalls() { // Scalarize last vertex processing stage outputs and {TCS,FS} inputs ready for packing. // // @param [in/out] module : Module -void PatchResourceCollect::scalarizeForInOutPacking(Module *module) { +void CollectResourceUsage::scalarizeForInOutPacking(Module *module) { // First gather the input/output calls that need scalarizing. SmallVector outputCalls; SmallVector inputCalls; struct Payload { - PatchResourceCollect *self; + CollectResourceUsage *self; SmallVectorImpl &inputCalls; }; Payload payload = {this, inputCalls}; @@ -3673,7 +3697,7 @@ void PatchResourceCollect::scalarizeForInOutPacking(Module *module) { // This is known to be an FS generic or interpolant input or TCS input that is either a vector or 64 bit. // // @param input : The input import op -void PatchResourceCollect::scalarizeGenericInput(GenericLocationOp *input) { +void CollectResourceUsage::scalarizeGenericInput(GenericLocationOp *input) { BuilderBase builder(input); auto *interpolatedInput = dyn_cast(input); assert(interpolatedInput || isa(input)); @@ -3794,7 +3818,7 @@ void PatchResourceCollect::scalarizeGenericInput(GenericLocationOp *input) { // This is known to be a last vertex processing stage (VS/TES/GS) generic output that is either a vector or 64 bit. // // @param call : Call that represents exporting the generic output -void PatchResourceCollect::scalarizeGenericOutput(CallInst *call) { +void CollectResourceUsage::scalarizeGenericOutput(CallInst *call) { BuilderBase builder(call->getContext()); builder.SetInsertPoint(call); @@ -3849,7 +3873,7 @@ void PatchResourceCollect::scalarizeGenericOutput(CallInst *call) { // ===================================================================================================================== // Clear non-specified output value in non-fragment shader stages -void PatchResourceCollect::clearUndefinedOutput() { +void CollectResourceUsage::clearUndefinedOutput() { if (m_shaderStage == ShaderStage::Fragment) return; // NOTE: If a vector or all used channels in a location are not specified, we can safely drop it and remove the output diff --git a/lgc/patch/CombineCooperativeMatrix.cpp b/lgc/patch/CombineCooperativeMatrix.cpp index f1977df851..de592a61d3 100644 --- a/lgc/patch/CombineCooperativeMatrix.cpp +++ b/lgc/patch/CombineCooperativeMatrix.cpp @@ -117,13 +117,11 @@ bool CooperativeMatrixCombiner::run() { .addSet( [](auto &self, auto &op) { self.m_ops.push_back(&op); }) .add([](auto &self, auto &op) { -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 479080 auto accumElemType = op.getMatrixCElemType(); bool isPackable = accumElemType == CooperativeMatrixElementType::Float16; if ((self.m_gfxIpVersion.major == 11) && isPackable) { self.m_muladds[op.getParent()].push_back(&op); } -#endif }) .build(); visitor.visit(*this, m_function); @@ -144,7 +142,6 @@ bool CooperativeMatrixCombiner::run() { m_eraseList.clear(); } } -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 479080 // wmma packing on gfx11 only possible with new wmma_f16_tied intrinsic for (auto muladdsPerBB : m_muladds) { changed |= tryFoldMuladd(std::move(muladdsPerBB.second)); @@ -157,7 +154,6 @@ bool CooperativeMatrixCombiner::run() { } m_muladds.clear(); -#endif m_ops.clear(); @@ -677,11 +673,7 @@ bool CooperativeMatrixCombiner::tryFoldMuladd(SmallVectorsetIsSatOrOpsel(false); muladdChain.push_back(next); muladdLo = next; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 478769 - llvm::erase_value(muladds, muladdLo); -#else llvm::erase(muladds, muladdLo); -#endif } Instruction *firstLoUser = findFirstUser(muladdLo); @@ -708,11 +700,7 @@ bool CooperativeMatrixCombiner::tryFoldMuladd(SmallVectorsetIsSatOrOpsel(true); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 478769 - llvm::erase_value(muladds, muladdLo); -#else llvm::erase(muladds, muladdHi); -#endif while (muladdHi->hasOneUse()) { auto *next = dyn_cast(*muladdHi->users().begin()); if (!is_contained(muladds, next)) { @@ -725,11 +713,7 @@ bool CooperativeMatrixCombiner::tryFoldMuladd(SmallVectorsetIsSatOrOpsel(true); muladdChain.push_back(next); muladdHi = next; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 478769 - llvm::erase_value(muladds, muladdLo); -#else llvm::erase(muladds, next); -#endif } auto cmp = [&](CallInst *a, CallInst *b) { return a->comesBefore(b); }; diff --git a/lgc/patch/Continufy.cpp b/lgc/patch/Continufy.cpp index fcf7ba23e9..5b70f69a83 100644 --- a/lgc/patch/Continufy.cpp +++ b/lgc/patch/Continufy.cpp @@ -38,7 +38,7 @@ #include "lgc/LgcDialect.h" #include "lgc/LgcIlCpsDialect.h" #include "lgc/LgcRtDialect.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PalMetadata.h" #include "llvm/Support/Debug.h" @@ -137,6 +137,7 @@ static CpsLevel getCpsLevelFromRtStage(int stage) { PreservedAnalyses Continufy::run(Module &module, ModuleAnalysisManager &analysisManager) { LLVM_DEBUG(dbgs() << "Run the Continufy pass \n"); LLVMContext &context = module.getContext(); + ContHelper::setStackAddrspace(module, ContStackAddrspace::ScratchLLPC); llvm_dialects::Builder builder(context); SmallVector tobeErased; @@ -196,8 +197,7 @@ PreservedAnalyses Continufy::run(Module &module, ModuleAnalysisManager &analysis if (retValue) tailArgs.push_back(retValue); - builder.create(fnPtr->getArg(1), getReturnedLevels(currentRtStage.value()), - PoisonValue::get(StructType::get(context, {})) /* state */, poisonI32 /* csp */, + builder.create(fnPtr->getArg(1), getReturnedLevels(currentRtStage.value()), poisonI32 /* csp */, poisonI32 /* rcr */, tailArgs); } diff --git a/lgc/patch/FragmentColorExport.cpp b/lgc/patch/FragmentColorExport.cpp index 27e17693d1..3d1ae97140 100644 --- a/lgc/patch/FragmentColorExport.cpp +++ b/lgc/patch/FragmentColorExport.cpp @@ -30,7 +30,7 @@ */ #include "lgc/patch/FragmentColorExport.h" #include "lgc/LgcContext.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/patch/ShaderInputs.h" #include "lgc/state/IntrinsDefs.h" #include "lgc/state/PalMetadata.h" @@ -504,9 +504,12 @@ PreservedAnalyses LowerFragColorExport::run(Module &module, ModuleAnalysisManage // @param builder : builder to use void LowerFragColorExport::updateFragColors(CallInst *callInst, MutableArrayRef outFragColors, BuilderBase &builder) { + Value *output = callInst->getOperand(2); + if (isa(output)) + return; + const unsigned location = cast(callInst->getOperand(0))->getZExtValue(); const unsigned component = cast(callInst->getOperand(1))->getZExtValue(); - Value *output = callInst->getOperand(2); assert(output->getType()->getScalarSizeInBits() <= 32); // 64-bit output is not allowed assert(component < 4); diff --git a/lgc/patch/GenerateCopyShader.cpp b/lgc/patch/GenerateCopyShader.cpp index b962b0a744..e22e2250ca 100644 --- a/lgc/patch/GenerateCopyShader.cpp +++ b/lgc/patch/GenerateCopyShader.cpp @@ -565,7 +565,7 @@ Value *GenerateCopyShader::loadValueFromGsVsRing(Type *loadTy, unsigned location for (unsigned i = 0; i < elemCount; ++i) { Value *ringOffset = calcGsVsRingOffsetForInput(location + i / 4, component + i % 4, streamId, builder); auto loadElem = - builder.CreateIntrinsic(Intrinsic::amdgcn_raw_buffer_load, elemTy, + builder.CreateIntrinsic(elemTy, Intrinsic::amdgcn_raw_buffer_load, { m_pipelineSysValues.get(entryPoint)->getGsVsRingBufDesc(streamId), ringOffset, builder.getInt32(0), // soffset diff --git a/lgc/patch/GenerateNullFragmentShader.cpp b/lgc/patch/GenerateNullFragmentShader.cpp index 7bf335278e..66a1cea598 100644 --- a/lgc/patch/GenerateNullFragmentShader.cpp +++ b/lgc/patch/GenerateNullFragmentShader.cpp @@ -25,13 +25,13 @@ /** *********************************************************************************************************************** * @file GenerateNullFragmentShader.cpp - * @brief LLPC source file: contains declaration and implementation of class lgc::PatchNullFragShader. + * @brief LLPC source file: contains declaration and implementation of class lgc::GenerateNullFragmentShader. *********************************************************************************************************************** */ #include "GenerateNullFragmentShader.h" #include "lgc/LgcContext.h" #include "lgc/patch/FragmentColorExport.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/IntrinsDefs.h" #include "lgc/state/PalMetadata.h" #include "lgc/state/PipelineState.h" @@ -41,7 +41,7 @@ #include "llvm/IR/Instructions.h" #include "llvm/Support/Debug.h" -#define DEBUG_TYPE "lgc-patch-null-frag-shader" +#define DEBUG_TYPE "lgc-generate-null-frag-shader" using namespace lgc; using namespace llvm; @@ -52,7 +52,7 @@ using namespace llvm; // @param [in/out] module : LLVM module to be run on // @param [in/out] analysisManager : Analysis manager to use for this transformation // @returns : The preserved analyses (The analyses that are still valid after this pass) -PreservedAnalyses PatchNullFragShader::run(Module &module, ModuleAnalysisManager &analysisManager) { +PreservedAnalyses GenerateNullFragmentShader::run(Module &module, ModuleAnalysisManager &analysisManager) { PipelineState *pipelineState = analysisManager.getResult(module).getPipelineState(); LLVM_DEBUG(dbgs() << "Run the pass Patch-Null-Frag-Shader\n"); @@ -77,7 +77,7 @@ PreservedAnalyses PatchNullFragShader::run(Module &module, ModuleAnalysisManager // Updates the the pipeline state with the data for the null fragment shader. // // @param [in/out] module : The LLVM module in which to add the shader. -void PatchNullFragShader::updatePipelineState(PipelineState *pipelineState) const { +void GenerateNullFragmentShader::updatePipelineState(PipelineState *pipelineState) const { auto resUsage = pipelineState->getShaderResourceUsage(ShaderStage::Fragment); pipelineState->setShaderStageMask(pipelineState->getShaderStageMask() | ShaderStageMask(ShaderStage::Fragment)); diff --git a/lgc/patch/GenerateNullFragmentShader.h b/lgc/patch/GenerateNullFragmentShader.h index c836dd2cbf..e8ed486d64 100644 --- a/lgc/patch/GenerateNullFragmentShader.h +++ b/lgc/patch/GenerateNullFragmentShader.h @@ -25,19 +25,19 @@ /** *********************************************************************************************************************** * @file GenerateNullFragmentShader.h - * @brief LLPC header file: contains declaration of class lgc::PatchNullFragShader. + * @brief LLPC header file: contains declaration of class lgc::GenerateNullFragmentShader. *********************************************************************************************************************** */ #pragma once -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "llvm/IR/PassManager.h" namespace lgc { // ===================================================================================================================== // Pass to generate null fragment shader if required -class PatchNullFragShader : public Patch, public llvm::PassInfoMixin { +class GenerateNullFragmentShader : public Patch, public llvm::PassInfoMixin { public: llvm::PreservedAnalyses run(llvm::Module &module, llvm::ModuleAnalysisManager &analysisManager); diff --git a/lgc/patch/Patch.cpp b/lgc/patch/LgcLowering.cpp similarity index 94% rename from lgc/patch/Patch.cpp rename to lgc/patch/LgcLowering.cpp index 48ea4a2b88..e7b79c7ddd 100644 --- a/lgc/patch/Patch.cpp +++ b/lgc/patch/LgcLowering.cpp @@ -24,11 +24,11 @@ **********************************************************************************************************************/ /** *********************************************************************************************************************** - * @file Patch.cpp + * @file LgcLowering.cpp * @brief LLPC source file: contains implementation of class lgc::Patch. *********************************************************************************************************************** */ -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "GenerateNullFragmentShader.h" #include "LowerPopsInterlock.h" #include "LowerRayQueryWrapper.h" @@ -77,12 +77,7 @@ #include "lgc/util/Debug.h" #include "llvm/IR/IRPrintingPasses.h" #include "llvm/IR/Module.h" -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 442438 -// Old version of the code -#else -// New version of the code (also handles unknown version, which we treat as latest) #include "llvm/IRPrinter/IRPrintingPasses.h" -#endif #include "llvm/Passes/PassBuilder.h" #include "llvm/Transforms/AggressiveInstCombine/AggressiveInstCombine.h" #include "llvm/Transforms/IPO.h" @@ -100,12 +95,7 @@ #include "llvm/Transforms/Scalar/EarlyCSE.h" #include "llvm/Transforms/Scalar/GVN.h" #include "llvm/Transforms/Scalar/IndVarSimplify.h" -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 475156 -// Old version of the code -#else -// New version of the code (also handles unknown version, which we treat as latest) #include "llvm/Transforms/Scalar/InferAlignment.h" -#endif #include "llvm/Transforms/Scalar/InstSimplifyPass.h" #include "llvm/Transforms/Scalar/LICM.h" #include "llvm/Transforms/Scalar/LoopDeletion.h" @@ -199,14 +189,14 @@ void Patch::addPasses(PipelineState *pipelineState, lgc::PassManager &passMgr, T pipelineState->hasShaderStage(ShaderStage::TessEval)) passMgr.addPass(TcsPassthroughShader()); - passMgr.addPass(PatchNullFragShader()); - passMgr.addPass(PatchResourceCollect()); // also removes inactive/unused resources + passMgr.addPass(GenerateNullFragmentShader()); + passMgr.addPass(CollectResourceUsage()); // also removes inactive/unused resources - // CheckShaderCache depends on PatchResourceCollect + // CheckShaderCache depends on CollectResourceUsage passMgr.addPass(CheckShaderCache(std::move(checkShaderCacheFunc))); // First part of lowering to "AMDGCN-style" - passMgr.addPass(PatchWorkarounds()); + passMgr.addPass(ApplyWorkarounds()); passMgr.addPass(GenerateCopyShader()); passMgr.addPass(LowerVertexFetch()); passMgr.addPass(LowerFragColorExport()); @@ -242,7 +232,7 @@ void Patch::addPasses(PipelineState *pipelineState, lgc::PassManager &passMgr, T passMgr.addPass(CollectImageOperations()); // Second part of lowering to "AMDGCN-style" - passMgr.addPass(PatchPreparePipelineAbi()); + passMgr.addPass(PreparePipelineAbi()); // Do inlining and global DCE to inline subfunctions that were introduced during preparing pipeline ABI. passMgr.addPass(AlwaysInlinerPass()); @@ -407,20 +397,14 @@ void Patch::addOptimizationPasses(lgc::PassManager &passMgr, uint32_t optLevel) FunctionPassManager fpm; fpm.addPass(InstCombinePass()); fpm.addPass(SimplifyCFGPass()); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 444780 - // Old version of the code - fpm.addPass(SROAPass()); -#else - // New version of the code (also handles unknown version, which we treat as latest) fpm.addPass(SROAPass(SROAOptions::ModifyCFG)); -#endif fpm.addPass(EarlyCSEPass(true)); fpm.addPass(SpeculativeExecutionPass(/* OnlyIfDivergentTarget = */ true)); fpm.addPass(CorrelatedValuePropagationPass()); fpm.addPass(SimplifyCFGPass()); fpm.addPass(AggressiveInstCombinePass()); fpm.addPass(InstCombinePass()); - fpm.addPass(PatchPeepholeOpt()); + fpm.addPass(PeepholeOptimization()); fpm.addPass(SimplifyCFGPass()); fpm.addPass(ReassociatePass()); LoopPassManager lpm; @@ -437,15 +421,9 @@ void Patch::addOptimizationPasses(lgc::PassManager &passMgr, uint32_t optLevel) fpm.addPass(LoopUnrollPass( LoopUnrollOptions(optLevel).setPeeling(true).setRuntime(false).setUpperBound(false).setPartial(false))); fpm.addPass(SROAPass(SROAOptions::ModifyCFG)); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 464212 - // Old version of the code - fpm.addPass(ScalarizerPass()); -#else - // New version of the code (also handles unknown version, which we treat as latest) ScalarizerPassOptions scalarizerOptions; scalarizerOptions.ScalarizeMinBits = 32; fpm.addPass(ScalarizerPass(scalarizerOptions)); -#endif fpm.addPass(LowerMulDx9Zero()); fpm.addPass(ScalarizeLoads()); fpm.addPass(InstSimplifyPass()); @@ -465,13 +443,8 @@ void Patch::addOptimizationPasses(lgc::PassManager &passMgr, uint32_t optLevel) fpm.addPass(LoopUnrollPass(LoopUnrollOptions(optLevel))); fpm.addPass(SROAPass(SROAOptions::ModifyCFG)); // uses UniformityAnalysis - fpm.addPass(PatchReadFirstLane()); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 475156 - // Old version of the code -#else - // New version of the code (also handles unknown version, which we treat as latest) + fpm.addPass(LowerReadFirstLane()); fpm.addPass(InferAlignmentPass()); -#endif fpm.addPass(InstCombinePass()); passMgr.addPass(createModuleToFunctionPassAdaptor(std::move(fpm))); passMgr.addPass(ConstantMergePass()); diff --git a/lgc/patch/LowerBufferOperations.cpp b/lgc/patch/LowerBufferOperations.cpp index 3bdb4a204b..851714a72e 100644 --- a/lgc/patch/LowerBufferOperations.cpp +++ b/lgc/patch/LowerBufferOperations.cpp @@ -39,17 +39,11 @@ #include "lgc/state/TargetInfo.h" #include "llvm-dialects/Dialect/Visitor.h" #include "llvm/ADT/PostOrderIterator.h" -#include "llvm/Support/AtomicOrdering.h" -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 -// Old version of the code -#include "llvm/Analysis/DivergenceAnalysis.h" -#else -// New version of the code (also handles unknown version, which we treat as latest) -#endif #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/IR/Constants.h" #include "llvm/IR/IntrinsicsAMDGPU.h" #include "llvm/InitializePasses.h" +#include "llvm/Support/AtomicOrdering.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" @@ -63,13 +57,7 @@ using namespace lgc; namespace { struct PatchBufferOpImpl { -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - PatchBufferOpImpl(LLVMContext &context, PipelineState &pipelineState, DivergenceInfo &divergenceInfo); -#else - // New version of the code (also handles unknown version, which we treat as latest) PatchBufferOpImpl(LLVMContext &context, PipelineState &pipelineState, UniformityInfo &uniformityInfo); -#endif bool run(Function &function); @@ -92,13 +80,7 @@ PreservedAnalyses PatchBufferOp::run(Function &function, FunctionAnalysisManager const auto &moduleAnalysisManager = analysisManager.getResult(function); PipelineState *pipelineState = moduleAnalysisManager.getCachedResult(*function.getParent())->getPipelineState(); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - DivergenceInfo &uniformityInfo = analysisManager.getResult(function); -#else - // New version of the code (also handles unknown version, which we treat as latest) UniformityInfo &uniformityInfo = analysisManager.getResult(function); -#endif PatchBufferOpImpl impl(function.getContext(), *pipelineState, uniformityInfo); if (impl.run(function)) @@ -108,17 +90,9 @@ PreservedAnalyses PatchBufferOp::run(Function &function, FunctionAnalysisManager // ===================================================================================================================== // Construct the per-run temporaries of the PatchBufferOp pass. -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 -// Old version of the code -PatchBufferOpImpl::PatchBufferOpImpl(LLVMContext &context, PipelineState &pipelineState, DivergenceInfo &divergenceInfo) - : m_typeLowering(context), m_bufferOpLowering(m_typeLowering, pipelineState, divergenceInfo) { -} -#else -// New version of the code (also handles unknown version, which we treat as latest) PatchBufferOpImpl::PatchBufferOpImpl(LLVMContext &context, PipelineState &pipelineState, UniformityInfo &uniformityInfo) : m_typeLowering(context), m_bufferOpLowering(m_typeLowering, pipelineState, uniformityInfo) { } -#endif // ===================================================================================================================== // Executes this LLVM patching pass on the specified LLVM function. @@ -174,15 +148,8 @@ static SmallVector convertBufferPointer(TypeLowering &typeLowering, Type // @param typeLowering : the TypeLowering object to be used // @param pipelineState : the PipelineState object // @param uniformityInfo : the uniformity analysis result -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 -// Old version of the code -BufferOpLowering::BufferOpLowering(TypeLowering &typeLowering, PipelineState &pipelineState, - DivergenceInfo &uniformityInfo) -#else -// New version of the code (also handles unknown version, which we treat as latest) BufferOpLowering::BufferOpLowering(TypeLowering &typeLowering, PipelineState &pipelineState, UniformityInfo &uniformityInfo) -#endif : m_typeLowering(typeLowering), m_builder(typeLowering.getContext()), m_pipelineState(pipelineState), m_uniformityInfo(uniformityInfo) { m_typeLowering.addRule(&convertBufferPointer); @@ -444,12 +411,12 @@ void BufferOpLowering::visitAtomicCmpXchgInst(AtomicCmpXchgInst &atomicCmpXchgIn Value *atomicCall; if (atomicCmpXchgInst.getPointerAddressSpace() == ADDR_SPACE_BUFFER_STRIDED_POINTER) { Value *const index = values[2]; - atomicCall = m_builder.CreateIntrinsic(Intrinsic::amdgcn_struct_buffer_atomic_cmpswap, storeType, + atomicCall = m_builder.CreateIntrinsic(storeType, Intrinsic::amdgcn_struct_buffer_atomic_cmpswap, {atomicCmpXchgInst.getNewValOperand(), atomicCmpXchgInst.getCompareOperand(), bufferDesc, index, baseIndex, m_builder.getInt32(0), m_builder.getInt32(coherent.u32All)}); } else { - atomicCall = m_builder.CreateIntrinsic(Intrinsic::amdgcn_raw_buffer_atomic_cmpswap, storeType, + atomicCall = m_builder.CreateIntrinsic(storeType, Intrinsic::amdgcn_raw_buffer_atomic_cmpswap, {atomicCmpXchgInst.getNewValOperand(), atomicCmpXchgInst.getCompareOperand(), bufferDesc, baseIndex, m_builder.getInt32(0), m_builder.getInt32(coherent.u32All)}); @@ -610,11 +577,11 @@ void BufferOpLowering::visitAtomicRMWInst(AtomicRMWInst &atomicRmwInst) { Value *atomicCall; if (isStructBuffer) { Value *const index = values[2]; - atomicCall = m_builder.CreateIntrinsic(intrinsic, storeType, + atomicCall = m_builder.CreateIntrinsic(storeType, intrinsic, {atomicRmwInst.getValOperand(), bufferDesc, index, baseIndex, m_builder.getInt32(0), m_builder.getInt32(coherent.u32All)}); } else { - atomicCall = m_builder.CreateIntrinsic(intrinsic, storeType, + atomicCall = m_builder.CreateIntrinsic(storeType, intrinsic, {atomicRmwInst.getValOperand(), bufferDesc, baseIndex, m_builder.getInt32(0), m_builder.getInt32(coherent.u32All)}); } @@ -723,13 +690,7 @@ void BufferOpLowering::visitBufferAddrToPtr(BufferAddrToPtrOp &op) { auto &di = m_descriptors[descriptor]; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - di.divergent = m_uniformityInfo.isDivergent(*descriptor); -#else - // New version of the code (also handles unknown version, which we treat as latest) - di.divergent = m_uniformityInfo.isDivergent(descriptor); -#endif + di.divergent = m_uniformityInfo.isDivergent(op.getAddress()); LLVM_DEBUG(dbgs() << (di.divergent.value() ? "Divergent" : "Uniform") << " descriptor: " << *descriptor << '\n'); } @@ -745,13 +706,7 @@ void BufferOpLowering::visitBufferDescToPtr(BufferDescToPtrOp &descToPtr) { auto &di = m_descriptors[descriptor]; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - di.divergent = m_uniformityInfo.isDivergent(*descriptor); -#else - // New version of the code (also handles unknown version, which we treat as latest) - di.divergent = m_uniformityInfo.isDivergent(descriptor); -#endif + di.divergent = m_uniformityInfo.isDivergent(descToPtr.getDesc()); LLVM_DEBUG(dbgs() << (di.divergent.value() ? "Divergent" : "Uniform") << " descriptor: " << *descriptor << '\n'); } @@ -783,7 +738,9 @@ void BufferOpLowering::visitConvertToStridedBufferPointer(ConvertToStridedBuffer m_typeLowering.replaceInstruction(&convertToStrided, {newDescriptor, values[1], m_builder.getInt32(0)}); - m_descriptors[newDescriptor] = m_descriptors[oldDescriptor]; + DescriptorInfo di = m_descriptors.lookup(oldDescriptor); + m_descriptors.insert({newDescriptor, di}); + m_stridedDescriptors.insert({newDescriptor, {oldDescriptor, stride}}); } // ===================================================================================================================== @@ -799,13 +756,7 @@ void BufferOpLowering::visitStridedBufferDescToPtr(StridedBufferDescToPtrOp &des auto &di = m_descriptors[descriptor]; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - di.divergent = m_uniformityInfo.isDivergent(*descriptor); -#else - // New version of the code (also handles unknown version, which we treat as latest) di.divergent = m_uniformityInfo.isDivergent(descriptor); -#endif LLVM_DEBUG(dbgs() << (di.divergent.value() ? "Divergent" : "Uniform") << " descriptor: " << *descriptor << '\n'); } @@ -825,13 +776,7 @@ void BufferOpLowering::visitStridedBufferAddrAndStrideToPtr(StridedBufferAddrAnd auto &di = m_descriptors[bufDesc]; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - di.divergent = m_uniformityInfo.isDivergent(*bufDesc); -#else - // New version of the code (also handles unknown version, which we treat as latest) - di.divergent = m_uniformityInfo.isDivergent(bufDesc); -#endif + di.divergent = m_uniformityInfo.isDivergent(addrAndStrideToPtr.getAddress()); } // ===================================================================================================================== @@ -856,13 +801,7 @@ void BufferOpLowering::visitBufferLoadDescToPtr(BufferLoadDescToPtrOp &loadDescT // The loadInst isn't computed by UniformityAnalysis so that we should use its source for divergent check Value *loadSrc = loadDescToPtr.getDescPtr(); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - di.divergent = m_uniformityInfo.isDivergent(*loadSrc); -#else - // New version of the code (also handles unknown version, which we treat as latest) di.divergent = m_uniformityInfo.isDivergent(loadSrc); -#endif LLVM_DEBUG(dbgs() << (di.divergent.value() ? "Divergent" : "Uniform") << " descriptor: " << *descriptor << '\n'); } @@ -890,13 +829,7 @@ void BufferOpLowering::visitStridedBufferLoadDescToPtr(StridedBufferLoadDescToPt // The loadInst isn't computed by UniformityAnalysis so that we should use its source for divergent check Value *loadSrc = loadDescToPtr.getDescPtr(); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - di.divergent = m_uniformityInfo.isDivergent(*loadSrc); -#else - // New version of the code (also handles unknown version, which we treat as latest) di.divergent = m_uniformityInfo.isDivergent(loadSrc); -#endif LLVM_DEBUG(dbgs() << (di.divergent.value() ? "Divergent" : "Uniform") << " descriptor: " << *descriptor << '\n'); } @@ -1122,13 +1055,7 @@ void BufferOpLowering::visitPhiInst(llvm::PHINode &phi) { if (!isAnyBufferPointer(&phi)) return; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - if (m_uniformityInfo.isDivergent(phi)) -#else - // New version of the code (also handles unknown version, which we treat as latest) if (m_uniformityInfo.isDivergent(&phi)) -#endif m_divergentPhis.push_back(&phi); } @@ -1479,11 +1406,11 @@ void BufferOpLowering::postVisitLoadTfeOp(LoadTfeOp &loadTfe) { Instruction *bufferLoad = nullptr; if (pointerOperand->getType()->getPointerAddressSpace() == ADDR_SPACE_BUFFER_FAT_POINTER) { - bufferLoad = m_builder.CreateIntrinsic(Intrinsic::amdgcn_raw_buffer_load, loadTfe.getType(), + bufferLoad = m_builder.CreateIntrinsic(loadTfe.getType(), Intrinsic::amdgcn_raw_buffer_load, {bufferDesc, offset, m_builder.getInt32(0), m_builder.getInt32(0)}); } else { Value *index = pointerValues[2]; - bufferLoad = m_builder.CreateIntrinsic(Intrinsic::amdgcn_struct_buffer_load, loadTfe.getType(), + bufferLoad = m_builder.CreateIntrinsic(loadTfe.getType(), Intrinsic::amdgcn_struct_buffer_load, {bufferDesc, index, offset, m_builder.getInt32(0), m_builder.getInt32(0)}); } if (getDescriptorInfo(bufferDesc).divergent.value()) { @@ -1750,7 +1677,8 @@ Value *BufferOpLowering::replaceLoadStore(Instruction &inst) { // New version of the code (also handles unknown version, which we treat as latest) const bool isDivergentPtr = m_uniformityInfo.isDivergent(pointerOperand); #endif - if (isInvariant && !isDivergentDesc && accessSizeAllowed && + const bool haveNonStridedDescriptor = !isStridedPointer || m_stridedDescriptors.contains(bufferDesc); + if (isInvariant && !isDivergentDesc && accessSizeAllowed && haveNonStridedDescriptor && (!indexValue || isa(indexValue) || !isDivergentPtr)) { // create s.buffer.load Value *desc = bufferDesc; @@ -1759,10 +1687,15 @@ Value *BufferOpLowering::replaceLoadStore(Instruction &inst) { if (isStridedPointer) { // Especially when the index is a constant, and the stride is known at compile-time, // we should create s_buffer_load instructions with constant offsets: index * stride + offset - Value *desc1 = m_builder.CreateExtractElement(desc, 1); - // stride is 61:48 bits in descriptor, which will always be constantInt when create BufferDesc - Value *stride = - m_builder.CreateAnd(m_builder.CreateLShr(desc1, m_builder.getInt32(16)), m_builder.getInt32(0x3fff)); + Value *stride; + if (m_stridedDescriptors.contains(desc)) { + std::tie(desc, stride) = m_stridedDescriptors[desc]; + } else { + Value *desc1 = m_builder.CreateExtractElement(desc, 1); + // stride is 61:48 bits in descriptor, which will always be constantInt when create BufferDesc + stride = + m_builder.CreateAnd(m_builder.CreateLShr(desc1, m_builder.getInt32(16)), m_builder.getInt32(0x3fff)); + } Value *indexOffsetVal = m_builder.CreateMul(indexValue, stride); offsetVal = m_builder.CreateAdd(offsetVal, indexOffsetVal); } @@ -1779,14 +1712,14 @@ Value *BufferOpLowering::replaceLoadStore(Instruction &inst) { intrinsic = Intrinsic::amdgcn_struct_atomic_buffer_load; #endif part = m_builder.CreateIntrinsic( - intrinsic, intAccessType, + intAccessType, intrinsic, {getBufferDesc(), indexValue, offsetVal, m_builder.getInt32(0), m_builder.getInt32(coherent.u32All)}); } else { unsigned intrinsicID = Intrinsic::amdgcn_raw_buffer_load; if (ordering != AtomicOrdering::NotAtomic) intrinsicID = Intrinsic::amdgcn_raw_atomic_buffer_load; part = m_builder.CreateIntrinsic( - intrinsicID, intAccessType, + intAccessType, intrinsicID, {getBufferDesc(), offsetVal, m_builder.getInt32(0), m_builder.getInt32(coherent.u32All)}); } } @@ -1802,12 +1735,12 @@ Value *BufferOpLowering::replaceLoadStore(Instruction &inst) { part = m_builder.CreateBitCast(part, intAccessType); copyMetadata(part, &inst); if (pointerOperand->getType()->getPointerAddressSpace() == ADDR_SPACE_BUFFER_STRIDED_POINTER) { - part = m_builder.CreateIntrinsic(Intrinsic::amdgcn_struct_buffer_store, intAccessType, + part = m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_struct_buffer_store, {part, getBufferDesc(), pointerValues[2], offsetVal, m_builder.getInt32(0), m_builder.getInt32(coherent.u32All)}); } else { part = m_builder.CreateIntrinsic( - Intrinsic::amdgcn_raw_buffer_store, intAccessType, + m_builder.getVoidTy(), Intrinsic::amdgcn_raw_buffer_store, {part, getBufferDesc(), offsetVal, m_builder.getInt32(0), m_builder.getInt32(coherent.u32All)}); } } diff --git a/lgc/patch/LowerCooperativeMatrix.cpp b/lgc/patch/LowerCooperativeMatrix.cpp index c012d076ef..bf1b9db659 100644 --- a/lgc/patch/LowerCooperativeMatrix.cpp +++ b/lgc/patch/LowerCooperativeMatrix.cpp @@ -269,10 +269,12 @@ Value *LowerCooperativeMatrix::convCoopMatrixVecToFlatVec(BuilderCommon &builder // @param stride : The stride in bytes in memory between the first elements of consecutive rows (orcolumns) in the // source data. Guaranteed to be a multiple of the matrix element size. // @param isColMajor : Identify the order for the data stored in memory, col-major/row-major +// @param isFromPackedVal : Whether the loaded value is in a packed 8-bit format // @param insertPos : Where to insert the instruction LowerCooperativeMatrix::ComputeAddressInfo LowerCooperativeMatrix::computeAddressing(CooperativeMatrixLayout layout, CooperativeMatrixElementType elemType, - int waveSize, Value *stride, bool isColMajor, Instruction *insertPos) { + int waveSize, Value *stride, bool isColMajor, bool isFromPackedVal, + Instruction *insertPos) { BuilderBase builder(*m_context); builder.SetInsertPoint(insertPos); Value *threadId = getLaneNumber(builder); @@ -313,6 +315,33 @@ LowerCooperativeMatrix::computeAddressing(CooperativeMatrixLayout layout, Cooper addrInfo.microStep = builder.CreateMul(addrInfo.microStep, stride); } + // Update address info for a packed 8-bit format in row major in the view of VGPRs layout + if (!isColMajor) { + bool isToPackedVal = isa(insertPos) && (elemType == CooperativeMatrixElementType::Int4); + SmallVector nextLaneRes; + if (isFromPackedVal || isToPackedVal) { + if (layout != CooperativeMatrixLayout::FactorMatrixLayout) { + llvm_unreachable("This layout is not supported now."); + } + } + if (isFromPackedVal) { + Value *baseOffset = builder.CreateMul(stride, builder.getInt32(8)); + Value *isLessEight = builder.CreateICmpSLT(colOffsetPerLane, builder.getInt32(8)); + addrInfo.base = builder.CreateSRem(threadId, builder.getInt32(8)); + if (elemType == CooperativeMatrixElementType::Int4) { + addrInfo.base = builder.CreateSelect(isLessEight, addrInfo.base, builder.CreateAdd(addrInfo.base, baseOffset)); + } else { + addrInfo.base = builder.CreateMul(addrInfo.base, builder.getInt32(2)); + addrInfo.base = builder.CreateSelect(isLessEight, addrInfo.base, builder.CreateAdd(addrInfo.base, baseOffset)); + addrInfo.packOffset = builder.getInt32(1); + } + } else if (isToPackedVal) { + addrInfo.base = builder.CreateUDiv(addrInfo.base, builder.getInt32(2)); + addrInfo.macroStep = builder.CreateMul(addrInfo.macroStep, builder.getInt32(2)); + addrInfo.packOffset = builder.CreateMul(builder.CreateSRem(threadId, builder.getInt32(2)), stride); + } + } + return addrInfo; } @@ -382,7 +411,8 @@ void LowerCooperativeMatrix::visitCooperativeMatrixLoadOp(CooperativeMatrixLoadO auto props = getTypeProperties(elemType, layout); - auto addrInfo = computeAddressing(layout, elemType, waveSize, stride, isColMajor, &load); + bool isLoadingPackedVal = !isColMajor && elemType == CooperativeMatrixElementType::Int4; + auto addrInfo = computeAddressing(layout, elemType, waveSize, stride, isColMajor, isLoadingPackedVal, &load); Value *vecVal = PoisonValue::get(FixedVectorType::get(elemTy, props.numFlatElements)); for (unsigned idx = 0; idx < props.numFlatElements; ++idx) { Value *macroOffset = builder.CreateMul(addrInfo.macroStep, builder.getInt32(idx / addrInfo.microCount)); @@ -411,6 +441,9 @@ void LowerCooperativeMatrix::visitCooperativeMatrixLoadOp(CooperativeMatrixLoadO Value *coMatrix = convFlatVecToCoopMatrixVec(builder, vecVal, elemType, layout); m_coopMatrixCalls.push_back(&load); load.replaceAllUsesWith(coMatrix); + + if (!isColMajor && elemType == CooperativeMatrixElementType::Int4) + m_valPackedInMatrixes.insert(coMatrix); } // ===================================================================================================================== @@ -450,15 +483,45 @@ void LowerCooperativeMatrix::visitCooperativeMatrixStoreOp(CooperativeMatrixStor bool isTemporal = memoryAccess & (unsigned)(CooperativeMatrixMemoryAccess::MemoryAccessTemporalMask); auto props = getTypeProperties(elemType, layout); - auto addrInfo = computeAddressing(layout, elemType, waveSize, stride, isColMajor, &store); - + bool isFromPackedVal = m_valPackedInMatrixes.find(vecVal) != m_valPackedInMatrixes.end(); + + auto addrInfo = computeAddressing(layout, elemType, waveSize, stride, isColMajor, isFromPackedVal, &store); + + bool isToPackedVal = !isColMajor && (elemType == CooperativeMatrixElementType::Int4); + bool isFromPackedToNormal = !isColMajor && isFromPackedVal && !isToPackedVal; + bool isFromNormalToPacked = !isColMajor && !isFromPackedVal && isToPackedVal; + SmallVector nextLaneRes; + Value *threadId = isFromNormalToPacked ? getLaneNumber(builder) : nullptr; + if (isToPackedVal) { + // The being store value is packed from part of 8-bit values of the adjacent threads. We use permlane16 to get the + // value from the adjacent thread. + const unsigned lowSel = 0x67452301; + const unsigned highSel = 0xefcdab89; + for (unsigned idx = 0; idx < props.numMatrixWords; ++idx) { + Value *elem = isa(vecVal->getType()) ? builder.CreateExtractElement(vecVal, idx) : vecVal; + Value *permLaneX16 = builder.CreateIntrinsic( + builder.getInt32Ty(), Intrinsic::amdgcn_permlane16, + {elem, elem, builder.getInt32(lowSel), builder.getInt32(highSel), builder.getFalse(), builder.getFalse()}); + permLaneX16 = builder.CreateBitCast(permLaneX16, FixedVectorType::get(builder.getInt8Ty(), 4)); + nextLaneRes.push_back(permLaneX16); + } + } vecVal = convCoopMatrixVecToFlatVec(builder, vecVal, elemType, layout); for (unsigned idx = 0; idx < props.numFlatElements; ++idx) { - Value *macroOffset = builder.CreateMul(addrInfo.macroStep, builder.getInt32(idx / addrInfo.microCount)); - Value *microOffset = builder.CreateMul(addrInfo.microStep, builder.getInt32(idx % addrInfo.microCount)); + unsigned index = idx; + if (isFromPackedToNormal) + index = idx / 2; + + Value *macroOffset = builder.CreateMul(addrInfo.macroStep, builder.getInt32(index / addrInfo.microCount)); + Value *microOffset = builder.CreateMul(addrInfo.microStep, builder.getInt32(index % addrInfo.microCount)); Value *offsetInRowCol = builder.CreateAdd(macroOffset, microOffset); Value *offsetInMatrix = builder.CreateAdd(addrInfo.base, offsetInRowCol); + + bool isOddIdx = (idx & 1) == 1; + if (isFromNormalToPacked || (isFromPackedToNormal && isOddIdx)) + offsetInMatrix = builder.CreateAdd(offsetInMatrix, addrInfo.packOffset); + Value *elePtr = builder.CreateGEP(elemTy, dataPtr, offsetInMatrix); Value *oneElement = builder.CreateExtractElement(vecVal, idx); StoreInst *st = nullptr; @@ -468,6 +531,17 @@ void LowerCooperativeMatrix::visitCooperativeMatrixStoreOp(CooperativeMatrixStor Align compAlignment = commonAlignment(Align(alignment), constantOffsetInRowCol); st = builder.CreateAlignedStore(oneElement, elePtr, compAlignment, isVolatile); } else { + if (isFromNormalToPacked) { + Value *adjacentElem = builder.CreateExtractElement(nextLaneRes[idx / 4], idx % 4); + Value *evenTid = builder.CreateICmpEQ(builder.CreateAnd(threadId, builder.getInt32(1)), builder.getInt32(0)); + Value *mask = builder.CreateSelect(evenTid, builder.getInt8(0xF), builder.getInt8(0xF0)); + oneElement = builder.CreateAnd(oneElement, mask); + adjacentElem = builder.CreateAnd(adjacentElem, mask); + adjacentElem = builder.CreateSelect(evenTid, builder.CreateShl(adjacentElem, builder.getInt8(4)), + builder.CreateLShr(adjacentElem, builder.getInt8(4))); + oneElement = builder.CreateOr(oneElement, adjacentElem); + } + st = builder.CreateStore(oneElement, elePtr, isVolatile); } if (isCoherent && !(addrSpace == ADDR_SPACE_LOCAL && dataBitwidth < 32)) @@ -633,6 +707,10 @@ Value *LowerCooperativeMatrix::cooperativeMatrixConvertInternal(CastInst::CastOp for (unsigned i = 0; i < srcVecSize; ++i) { Value *elem = builder.CreateExtractElement(source, i); Value *elemLow = builder.CreateAnd(elem, builder.getInt8(0xF)); + if (isSigned) { + elemLow = builder.CreateShl(elemLow, 4); + elemLow = builder.CreateAShr(elemLow, 4); + } Value *elemHigh = isSigned ? builder.CreateAShr(elem, 4) : builder.CreateLShr(elem, 4); elems.push_back(elemLow); elems.push_back(elemHigh); @@ -741,6 +819,9 @@ void LowerCooperativeMatrix::visitCooperativeMatrixConvertOp(CooperativeMatrixCo } m_coopMatrixCalls.push_back(&convert); convert.replaceAllUsesWith(resultValue); + + if (srcElemType == CooperativeMatrixElementType::Int4) + m_valPackedInMatrixes.insert(resultValue); } // ===================================================================================================================== diff --git a/lgc/patch/LowerDebugPrintf.cpp b/lgc/patch/LowerDebugPrintf.cpp index cc8a512dee..27ea37ccf4 100644 --- a/lgc/patch/LowerDebugPrintf.cpp +++ b/lgc/patch/LowerDebugPrintf.cpp @@ -31,7 +31,7 @@ #include "lgc/patch/LowerDebugPrintf.h" #include "lgc/LgcDialect.h" #include "lgc/builder/BuilderImpl.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PalMetadata.h" #include "lgc/state/PipelineState.h" #include "llvm-dialects/Dialect/Visitor.h" diff --git a/lgc/patch/LowerGpuRt.cpp b/lgc/patch/LowerGpuRt.cpp index 6a7dfc24ac..52e17f61a1 100644 --- a/lgc/patch/LowerGpuRt.cpp +++ b/lgc/patch/LowerGpuRt.cpp @@ -333,7 +333,6 @@ void LowerGpuRt::visitFloatWithRoundMode(lgc::GpurtFloatWithRoundModeOp &inst) { constexpr uint32_t sqHwRegMode = 1; constexpr uint32_t width = 2; constexpr uint32_t offset = 0; - uint32_t hwReg = ((sqHwRegMode) | (offset << 6) | ((width - 1) << 11)); enum OperationType : uint32_t { Add = 0, Sub, Mul }; auto func = inst.getCalledFunction(); @@ -344,8 +343,7 @@ void LowerGpuRt::visitFloatWithRoundMode(lgc::GpurtFloatWithRoundModeOp &inst) { uint32_t op = cast(inst.getOperation())->getZExtValue(); // WARNING: This isn't supported robustly by the IR semantics and the backend, but it's the best we can do for now. - m_builder->CreateIntrinsic(m_builder->getVoidTy(), Intrinsic::amdgcn_s_setreg, - {m_builder->getInt32(hwReg), m_builder->getInt32(rm)}); + BuilderBase::get(*m_builder).CreateSetReg(sqHwRegMode, offset, width, m_builder->getInt32(rm)); Value *result = PoisonValue::get(retType); if (op == OperationType::Add) @@ -357,8 +355,7 @@ void LowerGpuRt::visitFloatWithRoundMode(lgc::GpurtFloatWithRoundModeOp &inst) { // set back to RoundTiesToEven. uint32_t roundTiesToEven = 1; - m_builder->CreateIntrinsic(m_builder->getVoidTy(), Intrinsic::amdgcn_s_setreg, - {m_builder->getInt32(hwReg), m_builder->getInt32(roundTiesToEven)}); + BuilderBase::get(*m_builder).CreateSetReg(sqHwRegMode, offset, width, m_builder->getInt32(roundTiesToEven)); inst.replaceAllUsesWith(result); m_callsToLower.push_back(&inst); diff --git a/lgc/patch/LowerImageDerivatives.cpp b/lgc/patch/LowerImageDerivatives.cpp index 933b178113..2b27c51801 100644 --- a/lgc/patch/LowerImageDerivatives.cpp +++ b/lgc/patch/LowerImageDerivatives.cpp @@ -29,7 +29,7 @@ *********************************************************************************************************************** */ #include "lgc/patch/LowerImageDerivatives.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineState.h" #include "llvm/ADT/SmallSet.h" #include "llvm/IR/IntrinsicInst.h" diff --git a/lgc/patch/LowerInOut.cpp b/lgc/patch/LowerInOut.cpp index eef8885f5e..46b3bb1e56 100644 --- a/lgc/patch/LowerInOut.cpp +++ b/lgc/patch/LowerInOut.cpp @@ -281,15 +281,12 @@ void LowerInOut::processShader() { // // NOTE: The LDS for tessellation is as follow: // - // +-------------+--------------+-------------+-------------+ - // On-chip | Input Patch | Output Patch | Patch Const | Tess Factor | (LDS) - // +-------------+--------------+-------------+-------------+ + // +-------------+----------------+------------------+-------------+ + // On-chip | Tess Factor | HS Patch Count | Special TF Value | Input Patch | (LDS) + // +-------------+----------------+------------------+-------------+ // - // +-------------+-------------+----------------+------------------+ - // Off-chip | Input Patch | Tess Factor | HS Patch Count | Special TF Value | (LDS) - // +-------------+-------------+----------------+------------------+ // +--------------+-------------+ - // | Output Patch | Patch Const | (LDS Buffer) + // Off-chip | Output Patch | Patch Const | (LDS Buffer) // +--------------+-------------+ // // inPatchTotalSize = inVertexCount * inVertexStride * patchCountPerThreadGroup @@ -351,10 +348,10 @@ void LowerInOut::processShader() { // LDS buffer (which will be loaded by TES). calcFactor.offChip.outPatchStart = 0; calcFactor.offChip.patchConstStart = calcFactor.offChip.outPatchStart + outPatchTotalSize; - calcFactor.onChip.tessFactorStart = inPatchTotalSize; calcFactor.tessFactorStride = tessFactorStride; - calcFactor.tessOnChipLdsSize = calcFactor.onChip.tessFactorStart + tessFactorTotalSize; + calcFactor.onChip.inPatchStart = tessFactorTotalSize; + calcFactor.tessOnChipLdsSize = tessFactorTotalSize + inPatchTotalSize; if (m_pipelineState->canOptimizeTessFactor()) { // @@ -368,14 +365,14 @@ void LowerInOut::processShader() { // |<---- Wave 0 --->| |<---- Wave N --->| // assert(m_gfxIp.major >= 11); - calcFactor.onChip.hsPatchCountStart = calcFactor.tessOnChipLdsSize; // One dword to store actual HS wave count + calcFactor.onChip.hsPatchCountStart = calcFactor.onChip.inPatchStart; // One dword to store actual HS wave count calcFactor.onChip.specialTfValueStart = calcFactor.onChip.hsPatchCountStart + 1; const unsigned maxNumHsWaves = MaxHsThreadsPerSubgroup / m_pipelineState->getMergedShaderWaveSize(ShaderStage::TessControl); calcFactor.specialTfValueSize = maxNumHsWaves * 2; - calcFactor.tessOnChipLdsSize += 1 + calcFactor.specialTfValueSize; + calcFactor.onChip.inPatchStart += 1 + calcFactor.specialTfValueSize; } // NOTE: If ray query uses LDS stack, the expected max thread count in the group is 64. And we force wave size @@ -390,10 +387,13 @@ void LowerInOut::processShader() { LLPC_OUTS("// LLPC tessellation calculation factor results\n\n"); LLPC_OUTS("Patch count per thread group: " << calcFactor.patchCountPerThreadGroup << "\n"); LLPC_OUTS("\n"); + LLPC_OUTS("Tess factor start: 0 (LDS)\n"); + LLPC_OUTS("Tess factor total size (in dwords): " << tessFactorTotalSize << "\n"); + LLPC_OUTS("\n"); LLPC_OUTS("Input vertex count: " << inVertexCount << "\n"); LLPC_OUTS("Input vertex stride: " << calcFactor.inVertexStride << "\n"); LLPC_OUTS("Input patch size (in dwords): " << inPatchSize << "\n"); - LLPC_OUTS("Input patch start: 0 (LDS)\n"); + LLPC_OUTS("Input patch start: " << calcFactor.onChip.inPatchStart << " (LDS)\n"); LLPC_OUTS("Input patch total size (in dwords): " << inPatchTotalSize << "\n"); LLPC_OUTS("\n"); LLPC_OUTS("Output vertex count: " << outVertexCount << "\n"); @@ -407,9 +407,6 @@ void LowerInOut::processShader() { LLPC_OUTS("Patch constant start: " << calcFactor.offChip.patchConstStart << " (LDS buffer)\n"); LLPC_OUTS("Patch constant total size (in dwords): " << patchConstTotalSize << "\n"); LLPC_OUTS("\n"); - LLPC_OUTS("Tess factor start: " << calcFactor.onChip.tessFactorStart << " (LDS)\n"); - LLPC_OUTS("Tess factor total size (in dwords): " << tessFactorTotalSize << "\n"); - LLPC_OUTS("\n"); LLPC_OUTS("HS patch count start: " << calcFactor.onChip.hsPatchCountStart << " (LDS)\n"); LLPC_OUTS("HS wave count size (in dwords): " << 1 << "\n"); LLPC_OUTS("\n"); @@ -1045,8 +1042,8 @@ void LowerInOut::visitCallInst(CallInst &callInst) { if (callee->isIntrinsic() && callee->getIntrinsicID() == Intrinsic::amdgcn_s_sendmsg) { unsigned emitStream = InvalidValue; uint64_t message = cast(callInst.getArgOperand(0))->getZExtValue(); - if (message == GsEmitStreaM0 || message == GsEmitStreaM1 || message == GsEmitStreaM2 || - message == GsEmitStreaM3) { + if (message == GsEmitStream0 || message == GsEmitStream1 || message == GsEmitStream2 || + message == GsEmitStream3) { // NOTE: MSG[9:8] = STREAM_ID emitStream = (message & GsEmitCutStreamIdMask) >> GsEmitCutStreamIdShift; } @@ -1061,6 +1058,8 @@ void LowerInOut::visitCallInst(CallInst &callInst) { auto rasterStream = m_pipelineState->getRasterizerState().rasterStream; if (emitStream == rasterStream) { + // When multiview and viewIndexFromDeviceIndex enable, it can't use the device id + // as viewId to storeValueToGsVsRing when multiview in the same device auto &entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::Geometry)->entryArgIdxs.gs; auto viewIndex = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); @@ -1244,11 +1243,19 @@ void LowerInOut::visitReturnInst(ReturnInst &retInst) { const auto enableMultiView = m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable; if (enableMultiView) { if (m_shaderStage == ShaderStage::Vertex) { - auto &entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::Vertex)->entryArgIdxs.vs; - m_viewIndex = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); + if (m_pipelineState->getShaderOptions(m_shaderStage.value()).viewIndexFromDeviceIndex) { + m_viewIndex = builder.getInt32(m_pipelineState->getDeviceIndex()); + } else { + auto &entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::Vertex)->entryArgIdxs.vs; + m_viewIndex = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); + } } else if (m_shaderStage == ShaderStage::TessEval) { - auto &entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::TessEval)->entryArgIdxs.tes; - m_viewIndex = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); + if (m_pipelineState->getShaderOptions(m_shaderStage.value()).viewIndexFromDeviceIndex) { + m_viewIndex = builder.getInt32(m_pipelineState->getDeviceIndex()); + } else { + auto &entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::TessEval)->entryArgIdxs.tes; + m_viewIndex = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); + } } else { assert(m_shaderStage == ShaderStage::CopyShader); assert(m_viewIndex); // Must have been explicitly loaded in copy shader @@ -1559,17 +1566,18 @@ void LowerInOut::visitReturnInst(ReturnInst &retInst) { builder.CreateIntrinsic(builder.getVoidTy(), Intrinsic::amdgcn_s_barrier, {}); builder.CreateFence(AtomicOrdering::Acquire, syncScope); } else if (m_shaderStage == ShaderStage::Geometry) { - // NOTE: Per programming guide, we should do a "s_waitcnt 0,0,0 + s_waitcnt_vscnt 0" before issuing a "done", so - // we use fence release to generate s_waitcnt vmcnt lgkmcnt/s_waitcnt_vscnt before s_sendmsg(MSG_GS_DONE) - StringRef scopeName = m_pipelineState->isGsOnChip() ? "workgroup" : "agent"; - SyncScope::ID scope = m_context->getOrInsertSyncScopeID(scopeName); - builder.CreateFence(AtomicOrdering::Release, scope); - - auto &entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::Geometry)->entryArgIdxs.gs; - auto gsWaveId = getFunctionArgument(m_entryPoint, entryArgIdxs.gsWaveId); - Value *args[] = {builder.getInt32(GsDone), gsWaveId}; - - builder.CreateIntrinsic(builder.getVoidTy(), Intrinsic::amdgcn_s_sendmsg, args); + // Send GS_DONE message for legacy GS + if (!m_pipelineState->getNggControl()->enableNgg) { + // NOTE: Per programming guide, we should do a "s_waitcnt 0,0,0 + s_waitcnt_vscnt 0" before issuing a "done", so + // we use fence release to generate s_waitcnt vmcnt lgkmcnt/s_waitcnt_vscnt before s_sendmsg(MSG_GS_DONE) + SyncScope::ID syncScope = + m_context->getOrInsertSyncScopeID(m_pipelineState->isGsOnChip() ? "workgroup" : "agent"); + builder.CreateFence(AtomicOrdering::Release, syncScope); + + auto &entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::Geometry)->entryArgIdxs.gs; + auto gsWaveId = getFunctionArgument(m_entryPoint, entryArgIdxs.gsWaveId); + builder.CreateIntrinsic(builder.getVoidTy(), Intrinsic::amdgcn_s_sendmsg, {builder.getInt32(GsDone), gsWaveId}); + } } else if (m_shaderStage == ShaderStage::Fragment) { // Fragment shader export are handled in LowerFragColorExport. return; @@ -1700,16 +1708,8 @@ Value *LowerInOut::performFsHalfInterpolation(BuilderBase &builder, Value *attr, Value *param = builder.CreateIntrinsic(builder.getFloatTy(), Intrinsic::amdgcn_lds_param_load, {channel, attr, primMask}); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 494282 - // Old version of code - auto interpP10Intrinsic = Intrinsic::amdgcn_interp_inreg_p10_f16; - auto interpP2Intrinsic = Intrinsic::amdgcn_interp_inreg_p2_f16; -#else - // New version of the code (also handles unknown version, which we treat as - // latest) auto interpP10Intrinsic = Intrinsic::amdgcn_interp_p10_rtz_f16; auto interpP2Intrinsic = Intrinsic::amdgcn_interp_p2_rtz_f16; -#endif // tmp = interp.p10(p10, coordI, p0, highHalf) result = builder.CreateIntrinsic(builder.getFloatTy(), interpP10Intrinsic, {param, coordI, param, highHalf}); @@ -2183,9 +2183,13 @@ Value *LowerInOut::patchTcsBuiltInInputImport(Type *inputTy, unsigned builtInId, break; } case BuiltInViewIndex: { - if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) - input = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); - else + if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) { + if (m_pipelineState->getShaderOptions(m_shaderStage.value()).viewIndexFromDeviceIndex) { + input = builder.getInt32(m_pipelineState->getDeviceIndex()); + } else { + input = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); + } + } else input = builder.getInt32(0); break; } @@ -2311,9 +2315,13 @@ Value *LowerInOut::patchTesBuiltInInputImport(Type *inputTy, unsigned builtInId, break; } case BuiltInViewIndex: { - if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) - input = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); - else + if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) { + if (m_pipelineState->getShaderOptions(m_shaderStage.value()).viewIndexFromDeviceIndex) { + input = builder.getInt32(m_pipelineState->getDeviceIndex()); + } else { + input = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); + } + } else input = builder.getInt32(0); break; } @@ -2362,9 +2370,13 @@ Value *LowerInOut::patchGsBuiltInInputImport(Type *inputTy, unsigned builtInId, break; } case BuiltInViewIndex: { - if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) - input = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); - else + if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) { + if (m_pipelineState->getShaderOptions(m_shaderStage.value()).viewIndexFromDeviceIndex) { + input = builder.getInt32(m_pipelineState->getDeviceIndex()); + } else { + input = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); + } + } else input = builder.getInt32(0); break; } @@ -2580,9 +2592,13 @@ Value *LowerInOut::patchFsBuiltInInputImport(Type *inputTy, unsigned builtInId, break; } case BuiltInViewIndex: { - if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) - input = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); - else + if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) { + if (m_pipelineState->getShaderOptions(m_shaderStage.value()).viewIndexFromDeviceIndex) { + input = builder.getInt32(m_pipelineState->getDeviceIndex()); + } else { + input = getFunctionArgument(m_entryPoint, entryArgIdxs.viewId); + } + } else input = builder.getInt32(0); break; } @@ -2805,7 +2821,7 @@ Value *LowerInOut::getSamplePosOffset(Type *inputTy, Value *sampleId, BuilderBas Value *desc = m_pipelineSysValues.get(m_entryPoint)->loadDescFromDriverTable(SiDrvTableSamplepos, builder); // Load the value using the descriptor. offset = builder.CreateShl(offset, builder.getInt32(4)); - return builder.CreateIntrinsic(Intrinsic::amdgcn_raw_buffer_load, inputTy, + return builder.CreateIntrinsic(inputTy, Intrinsic::amdgcn_raw_buffer_load, {desc, offset, builder.getInt32(0), builder.getInt32(0)}); } @@ -2889,14 +2905,11 @@ Value *LowerInOut::patchTcsBuiltInOutputImport(Type *outputTy, unsigned builtInI assert(builtInId != BuiltInTessLevelInner || builtInUsage.tessLevelInner); (void(builtInUsage)); // Unused - const auto &calcFactor = - m_pipelineState->getShaderResourceUsage(ShaderStage::TessControl)->inOutUsage.tcs.calcFactor; - // tessLevelOuter (float[4]) + tessLevelInner (float[2]) - // ldsOffset = tessFactorStart + relativeId * MaxTessFactorsPerPatch + elemIdx - uint32_t tessFactorStart = calcFactor.onChip.tessFactorStart; + // ldsOffset = relativeId * MaxTessFactorsPerPatch + elemIdx + uint32_t tessOffset = 0; if (builtInId == BuiltInTessLevelInner) - tessFactorStart += 4; + tessOffset += 4; auto relativeId = m_pipelineSysValues.get(m_entryPoint)->getRelativeId(); Value *baseOffset = builder.CreateMul(relativeId, builder.getInt32(MaxTessFactorsPerPatch)); @@ -2904,13 +2917,13 @@ Value *LowerInOut::patchTcsBuiltInOutputImport(Type *outputTy, unsigned builtInI if (outputTy->isArrayTy()) { // Import the whole tessLevel array for (unsigned i = 0; i < outputTy->getArrayNumElements(); ++i) { - Value *ldsOffset = builder.CreateAdd(baseOffset, builder.getInt32(tessFactorStart + i)); + Value *ldsOffset = builder.CreateAdd(baseOffset, builder.getInt32(tessOffset + i)); auto elem = readValueFromLds(false, builder.getFloatTy(), ldsOffset, builder); output = builder.CreateInsertValue(output, elem, {i}); } } else { // Import a single element of tessLevel array - Value *ldsOffset = builder.CreateAdd(baseOffset, builder.getInt32(tessFactorStart)); + Value *ldsOffset = builder.CreateAdd(baseOffset, builder.getInt32(tessOffset)); ldsOffset = builder.CreateAdd(ldsOffset, elemIdx); output = readValueFromLds(false, outputTy, ldsOffset, builder); } @@ -3159,24 +3172,23 @@ void LowerInOut::patchTcsBuiltInOutputExport(Value *output, unsigned builtInId, auto relativeId = m_pipelineSysValues.get(m_entryPoint)->getRelativeId(); // tessLevelOuter (float[4]) + tessLevelInner (float[2]) - // ldsOffset = tessFactorStart + relativeId * MaxTessFactorsPerPatch + elemIdx - uint32_t tessFactorStart = m_pipelineState->getShaderResourceUsage(ShaderStage::TessControl) - ->inOutUsage.tcs.calcFactor.onChip.tessFactorStart; + // ldsOffset = relativeId * MaxTessFactorsPerPatch + elemIdx + uint32_t tessOffset = 0; if (builtInId == BuiltInTessLevelInner) - tessFactorStart += 4; + tessOffset += 4; // Write tessellation factors to on-chip LDS for later TF buffer store Value *baseOffset = builder.CreateMul(relativeId, builder.getInt32(MaxTessFactorsPerPatch)); if (outputTy->isArrayTy()) { // Handle the whole tessLevelOuter array for (unsigned i = 0; i < outputTy->getArrayNumElements(); ++i) { - Value *ldsOffset = builder.CreateAdd(baseOffset, builder.getInt32(tessFactorStart + i)); + Value *ldsOffset = builder.CreateAdd(baseOffset, builder.getInt32(tessOffset + i)); auto elem = builder.CreateExtractValue(output, {i}); writeValueToLds(false, elem, ldsOffset, builder); } } else { // Handle a single element of tessLevelOuter array - Value *ldsOffset = builder.CreateAdd(baseOffset, builder.getInt32(tessFactorStart)); + Value *ldsOffset = builder.CreateAdd(baseOffset, builder.getInt32(tessOffset)); ldsOffset = builder.CreateAdd(ldsOffset, elemIdx); writeValueToLds(false, output, ldsOffset, builder); } @@ -3847,7 +3859,7 @@ void LowerInOut::storeValueToStreamOutBuffer(Value *storeValue, unsigned xfbBuff coherent.bits.glc = true; coherent.bits.slc = true; - builder.CreateIntrinsic(Intrinsic::amdgcn_struct_tbuffer_store, storeTy, + builder.CreateIntrinsic(builder.getVoidTy(), Intrinsic::amdgcn_struct_tbuffer_store, {storeValue, m_pipelineSysValues.get(m_entryPoint)->getStreamOutBufDesc(xfbBuffer), writeIndex, builder.getInt32(xfbOffset), streamOffset, builder.getInt32(format), builder.getInt32(coherent.u32All)}); @@ -4386,9 +4398,9 @@ Value *LowerInOut::calcLdsOffsetForVsOutput(Type *outputTy, unsigned location, u const auto &calcFactor = m_pipelineState->getShaderResourceUsage(ShaderStage::TessControl)->inOutUsage.tcs.calcFactor; auto vertexStride = builder.getInt32(calcFactor.inVertexStride); - - // dwordOffset = relVertexId * vertexStride + attribOffset - auto ldsOffset = builder.CreateMul(relVertexId, vertexStride); + // dwordOffset = inPatchStart + relVertexId * vertexStride + attribOffset + Value *ldsOffset = builder.getInt32(calcFactor.onChip.inPatchStart); + ldsOffset = builder.CreateAdd(ldsOffset, builder.CreateMul(relVertexId, vertexStride)); ldsOffset = builder.CreateAdd(ldsOffset, attribOffset); return ldsOffset; @@ -4430,19 +4442,16 @@ Value *LowerInOut::calcLdsOffsetForTcsInput(Type *inputTy, unsigned location, Va attribOffset = builder.CreateAdd(attribOffset, compIdx); } - // dwordOffset = (relativeId * inVertexCount + vertexId) * inVertexStride + attribOffset + // dwordOffset = inPatchStart + (relativeId * inVertexCount + vertexId) * inVertexStride + attribOffset auto inVertexCount = m_pipelineState->getNumPatchControlPoints(); - auto inVertexCountVal = builder.getInt32(inVertexCount); auto relativeId = m_pipelineSysValues.get(m_entryPoint)->getRelativeId(); - Value *ldsOffset = builder.CreateMul(relativeId, inVertexCountVal); ldsOffset = builder.CreateAdd(ldsOffset, vertexIdx); - auto inVertexStride = builder.getInt32(calcFactor.inVertexStride); ldsOffset = builder.CreateMul(ldsOffset, inVertexStride); - - ldsOffset = builder.CreateAdd(ldsOffset, attribOffset); + ldsOffset = + builder.CreateAdd(builder.getInt32(calcFactor.onChip.inPatchStart), builder.CreateAdd(ldsOffset, attribOffset)); return ldsOffset; } diff --git a/lgc/patch/LowerInvariantLoads.cpp b/lgc/patch/LowerInvariantLoads.cpp index 770c717218..e8dfe23a4d 100644 --- a/lgc/patch/LowerInvariantLoads.cpp +++ b/lgc/patch/LowerInvariantLoads.cpp @@ -29,7 +29,7 @@ *********************************************************************************************************************** */ #include "lgc/patch/LowerInvariantLoads.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineState.h" #include "lgc/state/TargetInfo.h" #include "llvm/IR/IntrinsicInst.h" diff --git a/lgc/patch/LowerPopsInterlock.cpp b/lgc/patch/LowerPopsInterlock.cpp index c04db3dcc9..17937da018 100644 --- a/lgc/patch/LowerPopsInterlock.cpp +++ b/lgc/patch/LowerPopsInterlock.cpp @@ -292,17 +292,11 @@ void LowerPopsInterlock::lowerBeginInterlock(PopsBeginInterlockOp &popsBeginInte { m_builder->SetInsertPoint(processOverlapBlock->getTerminator()); - auto packerId = m_builder->CreateAnd(m_builder->CreateLShr(collisionWaveId, 28), 0x3); // POPS_PACKER: [0] Enable; [2:1] Packer ID - auto hwReg = [=](unsigned hwRegId, unsigned offset, unsigned size) { - // The HW register of s_setreg has this layout: - // [5:0] ID of HW register; [10:6] Offset; [15:11] Size - return ((hwRegId) | (offset << 6) | ((size - 1) << 11)); - }; + auto packerId = m_builder->CreateAnd(m_builder->CreateLShr(collisionWaveId, 28), 0x3); static const unsigned HwRegPopsPacker = 25; auto popsPacker = m_builder->CreateOr(m_builder->CreateShl(packerId, 1), 0x1); - m_builder->CreateIntrinsic(m_builder->getVoidTy(), Intrinsic::amdgcn_s_setreg, - {m_builder->getInt32(hwReg(HwRegPopsPacker, 0, 3)), popsPacker}); + m_builder->CreateSetReg(HwRegPopsPacker, 0, 3, popsPacker); // waveIdRemapOffset = -(currentWaveId + 1) = ~currentWaveId auto currentWaveId = m_builder->CreateAnd(collisionWaveId, 0x3FF); diff --git a/lgc/patch/LowerReadFirstLane.cpp b/lgc/patch/LowerReadFirstLane.cpp index b598806edc..7689818d7e 100644 --- a/lgc/patch/LowerReadFirstLane.cpp +++ b/lgc/patch/LowerReadFirstLane.cpp @@ -25,21 +25,15 @@ /** *********************************************************************************************************************** * @file LowerReadFirstLane.cpp - * @brief LLPC source file: contains declaration and implementation of class lgc::PatchReadFirstLane. + * @brief LLPC source file: contains declaration and implementation of class lgc::LowerReadFirstLane. *********************************************************************************************************************** */ #include "lgc/patch/LowerReadFirstLane.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineState.h" #include "lgc/util/BuilderBase.h" #include "llvm/Analysis/TargetTransformInfo.h" -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 -// Old version of the code -#include "llvm/Analysis/DivergenceAnalysis.h" -#else -// New version of the code (also handles unknown version, which we treat as latest) #include "llvm/Analysis/UniformityAnalysis.h" -#endif #include "llvm/IR/Constants.h" #include "llvm/IR/InstVisitor.h" #include "llvm/IR/Instructions.h" @@ -49,7 +43,7 @@ #include "llvm/Support/Debug.h" #include -#define DEBUG_TYPE "lgc-patch-read-first-lane" +#define DEBUG_TYPE "lgc-lower-read-first-lane" using namespace lgc; using namespace llvm; @@ -58,13 +52,7 @@ namespace { class ReadFirstLaneOptimizer { public: -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - using UniformityInfo = llvm::DivergenceInfo; -#else - // New version of the code (also handles unknown version, which we treat as latest) using UniformityInfo = llvm::UniformityInfo; -#endif ReadFirstLaneOptimizer(UniformityInfo &uniformityInfo, TargetTransformInfo &targetTransformInfo) : m_uniformityInfo(uniformityInfo), m_targetTransformInfo(targetTransformInfo) {} @@ -122,7 +110,7 @@ static bool areAllUserReadFirstLane(Instruction *inst) { } // ===================================================================================================================== -PatchReadFirstLane::PatchReadFirstLane() = default; +LowerReadFirstLane::LowerReadFirstLane() = default; // ===================================================================================================================== // Executes this LLVM pass on the specified LLVM function. @@ -130,16 +118,10 @@ PatchReadFirstLane::PatchReadFirstLane() = default; // @param [in/out] function : Function that we will peephole optimize. // @param [in/out] analysisManager : Analysis manager to use for this transformation // @returns : The preserved analyses (The analyses that are still valid after this pass) -PreservedAnalyses PatchReadFirstLane::run(Function &function, FunctionAnalysisManager &analysisManager) { +PreservedAnalyses LowerReadFirstLane::run(Function &function, FunctionAnalysisManager &analysisManager) { auto &targetTransformInfo = analysisManager.getResult(function); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - auto &uniformityInfo = analysisManager.getResult(function); -#else - // New version of the code (also handles unknown version, which we treat as latest) auto &uniformityInfo = analysisManager.getResult(function); -#endif ReadFirstLaneOptimizer rflo(uniformityInfo, targetTransformInfo); bool changed = rflo.run(function); diff --git a/lgc/patch/MeshTaskShader.cpp b/lgc/patch/MeshTaskShader.cpp index 85577e675d..91a593450b 100644 --- a/lgc/patch/MeshTaskShader.cpp +++ b/lgc/patch/MeshTaskShader.cpp @@ -30,8 +30,8 @@ */ #include "MeshTaskShader.h" #include "ShaderMerger.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/patch/MutateEntryPoint.h" -#include "lgc/patch/Patch.h" #include "lgc/util/Debug.h" #include "lgc/util/WorkgroupLayout.h" #include "llvm-dialects/Dialect/Visitor.h" @@ -52,7 +52,7 @@ namespace lgc { // @param pipelineState : Pipeline state // @param getPostDomTree : Function to get the post dominator tree of the given function MeshTaskShader::MeshTaskShader(PipelineState *pipelineState, - PatchPreparePipelineAbi::FunctionAnalysisHandlers *analysisHandlers) + PreparePipelineAbi::FunctionAnalysisHandlers *analysisHandlers) : m_pipelineState(pipelineState), m_analysisHandlers(analysisHandlers), m_builder(pipelineState->getContext()), m_gfxIp(pipelineState->getTargetInfo().getGfxIpVersion()) { assert(pipelineState->getTargetInfo().getGfxIpVersion() >= GfxIpVersion({10, 3})); // Must be GFX10.3+ @@ -1281,8 +1281,9 @@ void MeshTaskShader::lowerEmitMeshTasks(EmitMeshTasksOp &emitMeshTasksOp) { if (isa(groupCountY) && isa(groupCountZ)) { const unsigned constGroupCountY = cast(groupCountY)->getZExtValue(); const unsigned constGroupCountZ = cast(groupCountZ)->getZExtValue(); + bool enableLinearDispatch = constGroupCountY == 1 && constGroupCountZ == 1; m_pipelineState->getShaderResourceUsage(ShaderStage::Task)->builtInUsage.task.meshLinearDispatch = - constGroupCountY == 1 && constGroupCountZ == 1; + enableLinearDispatch; } auto emitMeshTasksCall = m_builder.GetInsertPoint(); @@ -1363,7 +1364,7 @@ void MeshTaskShader::lowerEmitMeshTasks(EmitMeshTasksOp &emitMeshTasksOp) { CoherentFlag coherent = {}; - m_builder.CreateIntrinsic(Intrinsic::amdgcn_raw_buffer_store, groupCount->getType(), + m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_raw_buffer_store, {groupCount, drawDataRingBufDesc, m_builder.getInt32(0), drawDataRingEntryOffset, m_builder.getInt32(coherent.u32All)}); @@ -1371,7 +1372,7 @@ void MeshTaskShader::lowerEmitMeshTasks(EmitMeshTasksOp &emitMeshTasksOp) { Value *readyBit = getDrawDataReadyBit(entryPoint); readyBit = m_builder.CreateZExt(readyBit, m_builder.getInt8Ty()); - m_builder.CreateIntrinsic(Intrinsic::amdgcn_raw_buffer_store, readyBit->getType(), + m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_raw_buffer_store, {readyBit, drawDataRingBufDesc, m_builder.getInt32(3 * sizeof(unsigned)), drawDataRingEntryOffset, m_builder.getInt32(coherent.u32All)}); } @@ -1544,8 +1545,12 @@ void MeshTaskShader::lowerGetMeshBuiltinInput(GetMeshBuiltinInputOp &getMeshBuil } case BuiltInViewIndex: { if (m_pipelineState->getInputAssemblyState().multiView != MultiViewMode::Disable) { - auto &entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::Mesh)->entryArgIdxs.mesh; - input = getFunctionArgument(entryPoint, entryArgIdxs.viewId); + if (m_pipelineState->getShaderOptions(ShaderStage::Mesh).viewIndexFromDeviceIndex) { + input = m_builder.getInt32(m_pipelineState->getDeviceIndex()); + } else { + auto &entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::Mesh)->entryArgIdxs.mesh; + input = getFunctionArgument(entryPoint, entryArgIdxs.viewId); + } } else { input = m_builder.getInt32(0); } @@ -2081,7 +2086,7 @@ void MeshTaskShader::exportPrimitive() { if (enableMultiView) { auto entryPoint = m_builder.GetInsertBlock()->getParent(); const auto entryArgIdxs = m_pipelineState->getShaderInterfaceData(ShaderStage::Mesh)->entryArgIdxs.mesh; - Value *viewId = getFunctionArgument(entryPoint, entryArgIdxs.viewId); + auto viewId = getFunctionArgument(entryPoint, entryArgIdxs.viewId); // RT layer is view ID in simple mode (view index only). Value *layerFromViewId = viewId; @@ -2576,7 +2581,7 @@ void MeshTaskShader::doExport(ExportKind kind, ArrayRef exports) { coherent.bits.glc = true; } - m_builder.CreateIntrinsic(Intrinsic::amdgcn_struct_buffer_store, valueToStore->getType(), + m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_struct_buffer_store, {valueToStore, m_attribRingBufDesc, m_waveThreadInfo.primOrVertexIndex, locationOffset, m_attribRingBaseOffset, m_builder.getInt32(coherent.u32All)}); } diff --git a/lgc/patch/MeshTaskShader.h b/lgc/patch/MeshTaskShader.h index d007b081ce..9505aefb59 100644 --- a/lgc/patch/MeshTaskShader.h +++ b/lgc/patch/MeshTaskShader.h @@ -85,7 +85,7 @@ struct MeshOutputsLayout { // Represents the handler of mesh/task shader. class MeshTaskShader { public: - MeshTaskShader(PipelineState *pipelineState, PatchPreparePipelineAbi::FunctionAnalysisHandlers *analysisHandlers); + MeshTaskShader(PipelineState *pipelineState, PreparePipelineAbi::FunctionAnalysisHandlers *analysisHandlers); static unsigned layoutMeshShaderLds(PipelineState *pipelineState, llvm::Function *entryPoint, MeshLdsLayout *ldsLayout = nullptr, MeshOutputsLayout *outputsLayout = nullptr); @@ -203,7 +203,7 @@ class MeshTaskShader { PipelineState *m_pipelineState = nullptr; // Pipeline state - PatchPreparePipelineAbi::FunctionAnalysisHandlers + PreparePipelineAbi::FunctionAnalysisHandlers *m_analysisHandlers; // A collection of handler functions to get the analysis info of the given function PipelineSystemValues m_pipelineSysValues; // Cache of ShaderSystemValues objects, one per shader stage diff --git a/lgc/patch/MutateEntryPoint.cpp b/lgc/patch/MutateEntryPoint.cpp index 5766b985d0..20fa129daf 100644 --- a/lgc/patch/MutateEntryPoint.cpp +++ b/lgc/patch/MutateEntryPoint.cpp @@ -56,9 +56,11 @@ #include "lgc/patch/MutateEntryPoint.h" #include "ShaderMerger.h" #include "compilerutils/CompilerUtils.h" +#include "llvmraytracing/ContinuationsUtil.h" #include "lgc/LgcContext.h" #include "lgc/LgcCpsDialect.h" #include "lgc/LgcDialect.h" +#include "lgc/LgcRtDialect.h" #include "lgc/patch/ShaderInputs.h" #include "lgc/patch/SystemValues.h" #include "lgc/state/AbiMetadata.h" @@ -126,8 +128,6 @@ PreservedAnalyses MutateEntryPoint::run(Module &module, ModuleAnalysisManager &a m_pipelineState = pipelineState; - stackLowering = std::make_unique(module.getContext(), ADDR_SPACE_PRIVATE); - const auto stageMask = m_pipelineState->getShaderStageMask(); m_hasTs = stageMask.contains_any({ShaderStage::TessControl, ShaderStage::TessEval}); m_hasGs = stageMask.contains(ShaderStage::Geometry); @@ -477,6 +477,8 @@ void MutateEntryPoint::lowerAsCpsReference(cps::AsContinuationReferenceOp &asCps Value *loweredReference = lgc::cps::lowerAsContinuationReference(builder, asCpsReferenceOp, reloc); + assert(asCpsReferenceOp.getType()->getIntegerBitWidth() == 32); + loweredReference = builder.CreateAdd(loweredReference, builder.getIntN(loweredReference->getType()->getScalarSizeInBits(), static_cast(cps::getCpsLevelFromFunction(callee)))); @@ -519,13 +521,6 @@ bool MutateEntryPoint::lowerCpsOps(Function *func, ShaderInputs *shaderInputs) { if (!isCpsFunc && cpsJumps.empty()) return false; - if (!isCpsFunc) { - IRBuilder<> builder(func->getContext()); - builder.SetInsertPointPastAllocas(func); - Value *vspStorage = builder.CreateAlloca(builder.getInt32Ty()); - m_funcCpsStackMap[func] = vspStorage; - } - // Get the number of user-data arguments. const auto &mode = m_pipelineState->getShaderModes()->getComputeShaderMode(); bool haveLocalInvocationId = !mode.noLocalInvocationIdInCalls; @@ -556,16 +551,13 @@ bool MutateEntryPoint::lowerCpsOps(Function *func, ShaderInputs *shaderInputs) { IRBuilder<> builder(func->getContext()); // Lower cps jumps. - unsigned stackSize = 0; - for (auto *jump : cpsJumps) { - unsigned stateSize = lowerCpsJump(func, jump, tailBlock, exitInfos); - stackSize = std::max(stackSize, stateSize); - } + for (auto *jump : cpsJumps) + lowerCpsJump(func, jump, tailBlock, exitInfos); // Lower returns. for (auto *ret : retInstrs) { - auto *vspTy = builder.getPtrTy(stackLowering->getLoweredCpsStackAddrSpace()); - exitInfos.push_back(CpsExitInfo(ret->getParent(), {builder.getInt32(0), PoisonValue::get(vspTy)})); + auto *cspTy = builder.getInt32Ty(); + exitInfos.push_back(CpsExitInfo(ret->getParent(), {builder.getInt32(0), PoisonValue::get(cspTy)})); builder.SetInsertPoint(ret); builder.CreateBr(tailBlock); ret->eraseFromParent(); @@ -576,7 +568,7 @@ bool MutateEntryPoint::lowerCpsOps(Function *func, ShaderInputs *shaderInputs) { vgprNum = std::max(exit.vgpr.size(), vgprNum); SmallVector newVgpr; - // Put LocalInvocationId before {vcr, vsp}. + // Put LocalInvocationId before {vcr, csp}. if (haveLocalInvocationId) newVgpr.push_back(func->getArg(numUserdata)); @@ -586,7 +578,7 @@ bool MutateEntryPoint::lowerCpsOps(Function *func, ShaderInputs *shaderInputs) { newVgpr.append(exitInfos[0].vgpr); } else { for (size_t vgprIdx = 0; vgprIdx < vgprNum; vgprIdx++) { - // We always have the leading two fixed vgpr arguments: vcr, vsp. The other remaining payloads are i32 type. + // We always have the leading two fixed vgpr arguments: vcr, csp. The other remaining payloads are i32 type. Type *phiTy = vgprIdx < 2 ? exitInfos[0].vgpr[vgprIdx]->getType() : builder.getInt32Ty(); PHINode *phi = builder.CreatePHI(phiTy, exitInfos.size()); for (size_t exitIdx = 0; exitIdx < exitInfos.size(); exitIdx++) { @@ -616,7 +608,7 @@ bool MutateEntryPoint::lowerCpsOps(Function *func, ShaderInputs *shaderInputs) { // ret void unsigned waveSize = m_pipelineState->getShaderWaveSize(m_shaderStage.value()); Type *waveMaskTy = builder.getIntNTy(waveSize); - // For continufy based continuation, the vgpr list: LocalInvocationId(optional), vcr, vsp, ... + // For continufy based continuation, the vgpr list: LocalInvocationId(optional), vcr, csp, ... unsigned vcrIndexInVgpr = haveLocalInvocationId ? 1 : 0; auto *vcr = builder.CreateExtractValue(vgprArg, vcrIndexInVgpr); auto *vcrTy = vcr->getType(); @@ -700,34 +692,18 @@ bool MutateEntryPoint::lowerCpsOps(Function *func, ShaderInputs *shaderInputs) { chainArgs.push_back(builder.getInt32(0)); } -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 465197 - // Old version of the code - SmallVector chainArgTys = {builder.getPtrTy(), builder.getIntNTy(waveSize), sgprVec->getType(), - vgprArg->getType(), builder.getInt32Ty()}; - - FunctionType *chainFuncTy = FunctionType::get(builder.getVoidTy(), chainArgTys, true); - auto chainFunc = - Function::Create(chainFuncTy, GlobalValue::ExternalLinkage, "llvm.amdgcn.cs.chain", func->getParent()); - builder.CreateCall(chainFunc, chainArgs); -#else - // New version of the code (also handles unknown version, which we treat as - // latest) Type *chainTys[] = {builder.getPtrTy(), builder.getIntNTy(waveSize), sgprVec->getType(), vgprArg->getType()}; auto *chainCall = builder.CreateIntrinsic(Intrinsic::amdgcn_cs_chain, chainTys, chainArgs); // Add inreg attribute for (fn, exec, sgprs). for (unsigned arg = 0; arg < 3; arg++) chainCall->addParamAttr(arg, Attribute::InReg); -#endif builder.CreateUnreachable(); auto *doc = m_pipelineState->getPalMetadata()->getDocument(); auto funcName = doc->getNode(func->getName(), /*copy=*/true); - // Lower cps stack operations - Value *cspStorage = m_funcCpsStackMap[func]; - stackLowering->lowerCpsStackOps(func, nullptr, false, cspStorage); - stackSize += stackLowering->getStackSizeInBytes(); // Set per-function .frontend_stack_size PAL metadata. + unsigned stackSize = ContHelper::tryGetStackSize(func).value_or(0); auto &shaderFunctions = m_pipelineState->getPalMetadata() ->getPipelineNode() .getMap(true)[Util::Abi::PipelineMetadataKey::ShaderFunctions] @@ -741,22 +717,20 @@ bool MutateEntryPoint::lowerCpsOps(Function *func, ShaderInputs *shaderInputs) { // Mutate the argument list of the cps function // // Mutate the function type from: -// void @func({} state, args...) +// void @func(args...) // into: -// amdgpu_cs_chain void @func(fixed_shader_args, i32 %vcr, ptr addrspace(5) %vsp, args...) +// amdgpu_cs_chain void @func(fixed_shader_args, i32 %vcr, i32 %csp, args...) // // @param func : the cps function to be mutated // @param fixedShaderArgTys : the types of the fixed shader arguments(userdata + possibly shader inputs) // @param argNames : the name string of the fixed shader arguments Function *MutateEntryPoint::lowerCpsFunction(Function *func, ArrayRef fixedShaderArgTys, ArrayRef argNames) { - Value *state = func->getArg(0); - const DataLayout &layout = func->getParent()->getDataLayout(); IRBuilder<> builder(func->getContext()); SmallVector newArgTys; newArgTys.append(fixedShaderArgTys.begin(), fixedShaderArgTys.end()); - newArgTys.append({builder.getInt32Ty(), builder.getPtrTy(stackLowering->getLoweredCpsStackAddrSpace())}); - auto remainingArgs = func->getFunctionType()->params().drop_front(1); + newArgTys.push_back(builder.getInt32Ty()); + auto remainingArgs = func->getFunctionType()->params(); newArgTys.append(remainingArgs.begin(), remainingArgs.end()); FunctionType *newFuncTy = FunctionType::get(builder.getVoidTy(), newArgTys, false); auto newFunc = createFunctionHelper(newFuncTy, func->getLinkage(), func->getParent()); @@ -786,9 +760,9 @@ Function *MutateEntryPoint::lowerCpsFunction(Function *func, ArrayRef fi // %vcr attribute argAttrs.push_back(emptyAttrSet); - // %vsp attribute + // %csp attribute argAttrs.push_back(emptyAttrSet); - for (unsigned idx = 1; idx != func->getFunctionType()->getNumParams(); ++idx) + for (unsigned idx = 0; idx != func->getFunctionType()->getNumParams(); ++idx) argAttrs.push_back(oldAttrs.getParamAttrs(idx)); newFunc->setAttributes( AttributeList::get(func->getContext(), oldAttrs.getFnAttrs(), oldAttrs.getRetAttrs(), argAttrs)); @@ -797,45 +771,24 @@ Function *MutateEntryPoint::lowerCpsFunction(Function *func, ArrayRef fi newFunc->splice(newFunc->begin(), func); builder.SetInsertPointPastAllocas(newFunc); - Value *vspStorage = builder.CreateAlloca(builder.getInt32Ty()); - m_funcCpsStackMap[newFunc] = vspStorage; - - // Function arguments: {fixed_shader_arguments, vcr, vsp, original_func_arguments_exclude_state} - Value *vsp = newFunc->getArg(fixedShaderArgTys.size() + 1); - if (!state->getType()->isEmptyTy()) { - // Get stack address of pushed state and load it from continuation stack. - unsigned stateSize = layout.getTypeStoreSize(state->getType()); - vsp = builder.CreateConstInBoundsGEP1_32(builder.getInt8Ty(), vsp, -alignTo(stateSize, ContinuationStackAlignment)); - auto *newState = builder.CreateLoad(state->getType(), vsp, "cps.state"); - CompilerUtils::setIsLastUseLoad(*newState); - state->replaceAllUsesWith(newState); - } - vsp = builder.CreatePtrToInt(vsp, builder.getInt32Ty()); - builder.CreateStore(vsp, vspStorage); // Set name string for arguments. SmallVector newArgNames(argNames); - newArgNames.append({"vcr", "vsp"}); + newArgNames.push_back("vcr"); for (unsigned idx = 0; idx < newArgNames.size(); idx++) newFunc->getArg(idx)->setName(newArgNames[idx]); - // Replace old arguments with new ones (excluding the very first `state`). - unsigned argOffsetInNew = fixedShaderArgTys.size() + 2; - for (unsigned idx = 1; idx < func->arg_size(); idx++) { + // Replace old arguments with new ones. + unsigned argOffsetInNew = fixedShaderArgTys.size() + 1; + for (unsigned idx = 0; idx < func->arg_size(); idx++) { Value *oldArg = func->getArg(idx); - Value *newArg = newFunc->getArg(idx - 1 + argOffsetInNew); + Value *newArg = newFunc->getArg(idx + argOffsetInNew); newArg->setName(oldArg->getName()); oldArg->replaceAllUsesWith(newArg); } setShaderStage(newFunc, getShaderStage(func)); newFunc->setAlignment(Align(64)); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 465196 - // Old version of the code -#else - // New version of the code (also handles unknown version, which we treat as - // latest) newFunc->setCallingConv(CallingConv::AMDGPU_CS_Chain); -#endif return newFunc; } @@ -845,13 +798,14 @@ Function *MutateEntryPoint::lowerCpsFunction(Function *func, ArrayRef fi // @param level : the level to select // @param builder: IRBuilder to build instructions // @param waveMaskTy : Wave Mask type -// @param priorties : Priorities list -Value *MutateEntryPoint::takeLevel(Value *level, IRBuilder<> &builder, Type *waveMaskTy, ArrayRef priorties) { +// @param priorities : Priorities list +Value *MutateEntryPoint::takeLevel(Value *level, IRBuilder<> &builder, Type *waveMaskTy, + ArrayRef priorities) { auto levelMask = builder.CreateICmpNE(level, builder.getInt32(0)); Value *levelBallot = builder.CreateIntrinsic(Intrinsic::amdgcn_ballot, waveMaskTy, levelMask); Value *cond = nullptr; - for (auto cpsLevel : priorties) { + for (auto cpsLevel : priorities) { auto lvMask = builder.CreateICmpEQ(level, builder.getInt32(static_cast(cpsLevel))); Value *lvBallot = builder.CreateIntrinsic(Intrinsic::amdgcn_ballot, waveMaskTy, lvMask); cond = builder.CreateICmpNE(lvBallot, builder.getInt32(0)); @@ -861,43 +815,28 @@ Value *MutateEntryPoint::takeLevel(Value *level, IRBuilder<> &builder, Type *wav } // ===================================================================================================================== -// Lower cps.jump, fill cps exit information and branch to tailBlock. Return the state size. +// Lower cps.jump, fill cps exit information and branch to tailBlock. // This assume the arguments of the parent function are setup correctly. // // @param parent : the parent function of the cps.jump operation // @param jumpOp : the call instruction of cps.jump // @param [in/out] exitInfos : the vector of cps exit information to be filled -unsigned MutateEntryPoint::lowerCpsJump(Function *parent, cps::JumpOp *jumpOp, BasicBlock *tailBlock, - SmallVectorImpl &exitInfos) { +void MutateEntryPoint::lowerCpsJump(Function *parent, cps::JumpOp *jumpOp, BasicBlock *tailBlock, + SmallVectorImpl &exitInfos) { IRBuilder<> builder(parent->getContext()); const DataLayout &layout = parent->getParent()->getDataLayout(); - // Translate @lgc.cps.jump(CR %target, i32 %levels, T %state, i32 %csp, ...) into: + // Translate @lgc.cps.jump(CR %target, i32 %levels, i32 %csp, ...) into: // @llvm.amdgcn.cs.chain(ptr %fn, i{32,64} %exec, T %sgprs, U %vgprs, i32 immarg %flags, ...) - Value *vcr = jumpOp->getTarget(); builder.SetInsertPoint(jumpOp); - // Pushing state onto stack and get new vsp. - Value *state = jumpOp->getState(); - Value *vsp = builder.CreateLoad(builder.getInt32Ty(), m_funcCpsStackMap[parent]); - vsp = builder.CreateIntToPtr(vsp, builder.getPtrTy(stackLowering->getLoweredCpsStackAddrSpace())); - unsigned stateSize = 0; - if (!state->getType()->isEmptyTy()) { - stateSize = layout.getTypeStoreSize(state->getType()); - builder.CreateStore(state, vsp); - // Make vsp properly aligned across cps function. - stateSize = alignTo(stateSize, ContinuationStackAlignment); - vsp = builder.CreateConstGEP1_32(builder.getInt8Ty(), vsp, stateSize); - } - // Add extra args specific to the target function. - SmallVector remainingArgs; - for (Value *arg : drop_begin(jumpOp->args(), 4)) - remainingArgs.push_back(arg); + SmallVector remainingArgs{jumpOp->getTail()}; - // Packing VGPR arguments {vcr, vsp, args...} + // Packing VGPR arguments {vcr, csp, rcr, args...} SmallVector vgprArgs; - vgprArgs.push_back(vcr); - vgprArgs.push_back(vsp); + vgprArgs.push_back(jumpOp->getTarget()); + vgprArgs.push_back(jumpOp->getCsp()); + vgprArgs.push_back(jumpOp->getRcr()); splitIntoI32(layout, builder, remainingArgs, vgprArgs); // Fill exit information. @@ -909,7 +848,6 @@ unsigned MutateEntryPoint::lowerCpsJump(Function *parent, cps::JumpOp *jumpOp, B builder.CreateBr(tailBlock); jumpOp->eraseFromParent(); - return stateSize; } // ===================================================================================================================== @@ -1293,6 +1231,10 @@ void MutateEntryPoint::processComputeFuncs(ShaderInputs *shaderInputs, Module &m ArrayRef calleeArgNames; uint64_t inRegMask; + auto StackAddrspaceMD = ContHelper::tryGetStackAddrspace(module); + auto StackAddrspace = StackAddrspaceMD.value_or(ContStackAddrspace::ScratchLLPC); + m_cpsStackAddrspace = static_cast(StackAddrspace); + for (Function *origFunc : origFuncs) { auto *origType = origFunc->getFunctionType(); @@ -1542,15 +1484,7 @@ void MutateEntryPoint::setFuncAttrs(Function *entryPoint) { // NOTE: Remove "readnone" attribute for entry-point. If GS is empty, this attribute will allow // LLVM optimization to remove sendmsg(GS_DONE). It is unexpected. -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 440919 - // Old version of the code - if (entryPoint->hasFnAttribute(Attribute::ReadNone)) - entryPoint->removeFnAttr(Attribute::ReadNone); -#else - // New version of the code (also handles unknown version, which we treat as - // latest) entryPoint->setMemoryEffects(MemoryEffects::unknown()); -#endif } // ===================================================================================================================== @@ -1990,7 +1924,9 @@ void MutateEntryPoint::finalizeUserDataArgs(SmallVectorImpl &userDa else userDataArgs.emplace_back(builder.getInt32Ty(), "pad" + Twine(i)); } - if (userDataSgprs < userDataDwords) + // If there are user data to set or all users data are forced to be spilled, call setUserDataSpillUsage to update + // spill_threshold correctly. + if (userDataSgprs < userDataDwords || m_pipelineState->getOptions().forceUserDataSpill) m_pipelineState->getPalMetadata()->setUserDataSpillUsage(userDataSgprs, m_shaderStage); // We must conservatively assume that there are functions with dynamic push constant accesses, and that therefore diff --git a/lgc/patch/NggPrimShader.cpp b/lgc/patch/NggPrimShader.cpp index 795d0c15ca..0bc7de86ab 100644 --- a/lgc/patch/NggPrimShader.cpp +++ b/lgc/patch/NggPrimShader.cpp @@ -30,7 +30,7 @@ */ #include "NggPrimShader.h" #include "ShaderMerger.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PalMetadata.h" #include "lgc/util/Debug.h" #include "llvm/IR/Constants.h" @@ -3792,21 +3792,19 @@ void NggPrimShader::mutateGs() { continue; // Not belong to GS messages uint64_t message = cast(call->getArgOperand(0))->getZExtValue(); - if (message == GsEmitStreaM0 || message == GsEmitStreaM1 || message == GsEmitStreaM2 || - message == GsEmitStreaM3) { + if (message == GsEmitStream0 || message == GsEmitStream1 || message == GsEmitStream2 || + message == GsEmitStream3) { // Handle GS_EMIT, MSG[9:8] = STREAM_ID unsigned streamId = (message & GsEmitCutStreamIdMask) >> GsEmitCutStreamIdShift; assert(streamId < MaxGsStreams); processGsEmit(streamId, threadIdInSubgroup, emitVertsPtrs[streamId], outVertsPtrs[streamId], totalEmitVertsPtr); - } else if (message == GsCutStreaM0 || message == GsCutStreaM1 || message == GsCutStreaM2 || - message == GsCutStreaM3) { + } else if (message == GsCutStream0 || message == GsCutStream1 || message == GsCutStream2 || + message == GsCutStream3) { // Handle GS_CUT, MSG[9:8] = STREAM_ID unsigned streamId = (message & GsEmitCutStreamIdMask) >> GsEmitCutStreamIdShift; assert(streamId < MaxGsStreams); processGsCut(streamId, outVertsPtrs[streamId]); - } else if (message == GsDone) { - // Handle GS_DONE, do nothing (just remove this call) } else { // Unexpected GS message llvm_unreachable("Unexpected GS message!"); @@ -6186,7 +6184,7 @@ void NggPrimShader::exportVertexAttributeThroughMemory(Function *&target) { if (m_pipelineState->getTargetInfo().getGfxIpVersion().major <= 11) { coherent.bits.glc = true; } - m_builder.CreateIntrinsic(Intrinsic::amdgcn_struct_buffer_store, attribValue->getType(), + m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_struct_buffer_store, {attribValue, attribRingBufDesc, vertexIndex, locationOffset, attribRingBaseOffset, m_builder.getInt32(coherent.u32All)}); @@ -6450,7 +6448,7 @@ void NggPrimShader::processSwXfb(ArrayRef args) { if (xfbOutputExport.is16bit && xfbOutputExport.numElements == 3) { // NOTE: For 16vec3, HW doesn't have a corresponding buffer store instruction. We have to split it to 16vec2 // and 16scalar. - m_builder.CreateIntrinsic(Intrinsic::amdgcn_raw_tbuffer_store, FixedVectorType::get(m_builder.getHalfTy(), 2), + m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {m_builder.CreateShuffleVector(outputValue, ArrayRef{0, 1}), // vdata m_streamOutBufDescs[xfbOutputExport.xfbBuffer], // rsrc xfbOutputOffset, // offset @@ -6458,7 +6456,7 @@ void NggPrimShader::processSwXfb(ArrayRef args) { m_builder.getInt32(BUF_FORMAT_16_16_FLOAT), // format m_builder.getInt32(coherent.u32All)}); // auxiliary data - m_builder.CreateIntrinsic(Intrinsic::amdgcn_raw_tbuffer_store, m_builder.getHalfTy(), + m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {m_builder.CreateExtractElement(outputValue, 2), // vdata m_streamOutBufDescs[xfbOutputExport.xfbBuffer], // rsrc m_builder.CreateAdd(xfbOutputOffset, @@ -6467,7 +6465,7 @@ void NggPrimShader::processSwXfb(ArrayRef args) { m_builder.getInt32(BUF_FORMAT_16_FLOAT), // format m_builder.getInt32(coherent.u32All)}); // auxiliary data } else { - m_builder.CreateIntrinsic(Intrinsic::amdgcn_raw_tbuffer_store, outputValue->getType(), + m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {outputValue, // vdata m_streamOutBufDescs[xfbOutputExport.xfbBuffer], // rsrc xfbOutputOffset, // offset @@ -6918,8 +6916,7 @@ void NggPrimShader::processSwXfbWithGs(ArrayRef args) { if (xfbOutputExport.is16bit && xfbOutputExport.numElements == 3) { // NOTE: For 16vec3, HW doesn't have a corresponding buffer store instruction. We have to split it to 16vec2 // and 16scalar. - m_builder.CreateIntrinsic(Intrinsic::amdgcn_raw_tbuffer_store, - FixedVectorType::get(m_builder.getHalfTy(), 2), + m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {m_builder.CreateShuffleVector(outputValue, ArrayRef{0, 1}), // vdata m_streamOutBufDescs[xfbOutputExport.xfbBuffer], // rsrc xfbOutputOffset, // offset @@ -6928,7 +6925,7 @@ void NggPrimShader::processSwXfbWithGs(ArrayRef args) { m_builder.getInt32(coherent.u32All)}); // auxiliary data m_builder.CreateIntrinsic( - Intrinsic::amdgcn_raw_tbuffer_store, m_builder.getHalfTy(), + m_builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {m_builder.CreateExtractElement(outputValue, 2), // vdata m_streamOutBufDescs[xfbOutputExport.xfbBuffer], // rsrc m_builder.CreateAdd(xfbOutputOffset, m_builder.getInt32(2 * sizeof(uint16_t))), // offset @@ -6936,7 +6933,7 @@ void NggPrimShader::processSwXfbWithGs(ArrayRef args) { m_builder.getInt32(BUF_FORMAT_16_FLOAT), // format m_builder.getInt32(coherent.u32All)}); // auxiliary data } else { - m_builder.CreateIntrinsic(Intrinsic::amdgcn_raw_tbuffer_store, outputValue->getType(), + m_builder.CreateIntrinsic(m_builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {outputValue, // vdata m_streamOutBufDescs[xfbOutputExport.xfbBuffer], // rsrc xfbOutputOffset, // offset diff --git a/lgc/patch/PassRegistry.inc b/lgc/patch/PassRegistry.inc index ed87a7c05c..d9cb51c5b9 100644 --- a/lgc/patch/PassRegistry.inc +++ b/lgc/patch/PassRegistry.inc @@ -55,27 +55,27 @@ LLPC_MODULE_PASS("lgc-pipeline-state-recorder", PipelineStateRecorder) LLPC_MODULE_PASS("lgc-builder-replayer", BuilderReplayer) LLPC_MODULE_PASS("lgc-continufy", Continufy) -LLPC_MODULE_PASS("lgc-patch-resource-collect", PatchResourceCollect) +LLPC_MODULE_PASS("lgc-collect-resource-usage", CollectResourceUsage) LLPC_MODULE_PASS("lgc-patch-initialize-workgroup-memory", PatchInitializeWorkgroupMemory) LLPC_MODULE_PASS("lgc-lower-image-derivatives", LowerImageDerivatives) LLPC_MODULE_PASS("lgc-lower-in-out", LowerInOut) LLPC_FUNCTION_PASS("lgc-lower-invariant-loads", LowerInvariantLoads) LLPC_MODULE_PASS("lgc-patch-setup-target-features", PatchSetupTargetFeatures) LLPC_MODULE_PASS("lgc-generate-copy-shader", GenerateCopyShader) -LLPC_MODULE_PASS("lgc-patch-prepare-pipeline-abi", PatchPreparePipelineAbi) -LLPC_FUNCTION_PASS("lgc-patch-read-first-lane", PatchReadFirstLane) +LLPC_MODULE_PASS("lgc-patch-prepare-pipeline-abi", PreparePipelineAbi) +LLPC_FUNCTION_PASS("lgc-lower-read-first-lane", LowerReadFirstLane) LLPC_MODULE_PASS("lgc-include-llvm-ir", IncludeLlvmIr) -LLPC_FUNCTION_PASS("lgc-patch-peephole-opt", PatchPeepholeOpt) +LLPC_FUNCTION_PASS("lgc-peephole-optimization", PeepholeOptimization) LLPC_MODULE_PASS("lgc-lower-subgroup-ops", LowerSubgroupOps) LLPC_MODULE_PASS("lgc-mutate-entry-point", MutateEntryPoint) LLPC_MODULE_PASS("lgc-patch-check-shader-cache", CheckShaderCache) LLPC_LOOP_PASS("lgc-add-loop-metadata", AddLoopMetadata) LLPC_FUNCTION_PASS("lgc-structurize-buffers", StructurizeBuffers) LLPC_FUNCTION_PASS("lgc-patch-buffer-op", PatchBufferOp) -LLPC_MODULE_PASS("lgc-patch-workarounds", PatchWorkarounds) +LLPC_MODULE_PASS("lgc-apply-workarounds", ApplyWorkarounds) LLPC_FUNCTION_PASS("lgc-scalarizer-loads", ScalarizeLoads) LLPC_FUNCTION_PASS("lgc-lower-mul-dx9-zero", LowerMulDx9Zero) -LLPC_MODULE_PASS("lgc-patch-null-frag-shader", PatchNullFragShader) +LLPC_MODULE_PASS("lgc-generate-null-frag-shader", GenerateNullFragmentShader) LLPC_MODULE_PASS("lgc-patch-tcs-passthrough-shader", TcsPassthroughShader) LLPC_MODULE_PASS("lgc-collect-image-operations", CollectImageOperations) LLPC_MODULE_PASS("lgc-vertex-fetch", LowerVertexFetch) diff --git a/lgc/patch/PassthroughHullShader.cpp b/lgc/patch/PassthroughHullShader.cpp index 3c86fd8052..6556dc1eab 100644 --- a/lgc/patch/PassthroughHullShader.cpp +++ b/lgc/patch/PassthroughHullShader.cpp @@ -32,7 +32,7 @@ #include "lgc/LgcContext.h" #include "lgc/LgcDialect.h" #include "lgc/builder/BuilderImpl.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/IntrinsDefs.h" #include "lgc/state/PalMetadata.h" #include "lgc/state/PipelineShaders.h" diff --git a/lgc/patch/PeepholeOptimization.cpp b/lgc/patch/PeepholeOptimization.cpp index ced9761d8d..8e5989a97b 100644 --- a/lgc/patch/PeepholeOptimization.cpp +++ b/lgc/patch/PeepholeOptimization.cpp @@ -25,12 +25,12 @@ /** *********************************************************************************************************************** * @file PeepholeOptimization.cpp - * @brief LLPC source file: contains implementation of class lgc::PatchPeepholeOpt. + * @brief LLPC source file: contains implementation of class lgc::PeepholeOptimization. *********************************************************************************************************************** */ #include "lgc/patch/PeepholeOptimization.h" #include "lgc/Builder.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "llvm/IR/Constants.h" #include "llvm/IR/Instructions.h" #include "llvm/IR/PatternMatch.h" @@ -38,7 +38,7 @@ #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" -#define DEBUG_TYPE "lgc-patch-peephole-opt" +#define DEBUG_TYPE "lgc-peephole-optimization" using namespace lgc; using namespace llvm; @@ -52,8 +52,8 @@ namespace lgc { // @param [in/out] function : Function that we will peephole optimize. // @param [in/out] analysisManager : Analysis manager to use for this transformation // @returns : The preserved analyses (The analyses that are still valid after this pass) -PreservedAnalyses PatchPeepholeOpt::run(Function &function, FunctionAnalysisManager &analysisManager) { - LLVM_DEBUG(dbgs() << "Run the pass Patch-Peephole-Opt\n"); +PreservedAnalyses PeepholeOptimization::run(Function &function, FunctionAnalysisManager &analysisManager) { + LLVM_DEBUG(dbgs() << "Run the pass Peephole optimization\n"); m_changed = false; @@ -85,7 +85,7 @@ PreservedAnalyses PatchPeepholeOpt::run(Function &function, FunctionAnalysisMana // Reference: https://groups.google.com/g/llvm-dev/c/x4K7ppGLbg8/m/f_3NySRhjlcJ // @param intToPtr: The "inttoptr" instruction to visit. -void PatchPeepholeOpt::visitIntToPtr(IntToPtrInst &intToPtr) { +void PeepholeOptimization::visitIntToPtr(IntToPtrInst &intToPtr) { // Check if we are using add to do pointer arithmetic. auto *const binaryOperator = dyn_cast(intToPtr.getOperand(0)); if (!binaryOperator || binaryOperator->getOpcode() != Instruction::Add) @@ -144,7 +144,7 @@ void PatchPeepholeOpt::visitIntToPtr(IntToPtrInst &intToPtr) { // This addresses a potential precision underflow in applications intolerant to in-spec math reordering. // // @param callInst: The call instruction to visit. -void PatchPeepholeOpt::visitCallInst(CallInst &callInst) { +void PeepholeOptimization::visitCallInst(CallInst &callInst) { if (callInst.getIntrinsicID() != Intrinsic::log2) return; diff --git a/lgc/patch/PreparePipelineAbi.cpp b/lgc/patch/PreparePipelineAbi.cpp index 0991a5efde..1642e68323 100644 --- a/lgc/patch/PreparePipelineAbi.cpp +++ b/lgc/patch/PreparePipelineAbi.cpp @@ -25,7 +25,7 @@ /** *********************************************************************************************************************** * @file PreparePipelineAbi.cpp -* @brief LLPC source file: contains implementation of class lgc::PatchPreparePipelineAbi. +* @brief LLPC source file: contains implementation of class lgc::PreparePipelineAbi. *********************************************************************************************************************** */ #include "lgc/patch/PreparePipelineAbi.h" @@ -44,7 +44,7 @@ using namespace llvm; using namespace lgc; // ===================================================================================================================== -PatchPreparePipelineAbi::PatchPreparePipelineAbi() { +PreparePipelineAbi::PreparePipelineAbi() { } // ===================================================================================================================== @@ -53,7 +53,7 @@ PatchPreparePipelineAbi::PatchPreparePipelineAbi() { // @param [in/out] module : LLVM module to be run on // @param [in/out] analysisManager : Analysis manager to use for this transformation // @returns : The preserved analyses (The analyses that are still valid after this pass) -PreservedAnalyses PatchPreparePipelineAbi::run(Module &module, ModuleAnalysisManager &analysisManager) { +PreservedAnalyses PreparePipelineAbi::run(Module &module, ModuleAnalysisManager &analysisManager) { PipelineState *pipelineState = analysisManager.getResult(module).getPipelineState(); PipelineShadersResult &pipelineShaders = analysisManager.getResult(module); @@ -107,8 +107,8 @@ PreservedAnalyses PatchPreparePipelineAbi::run(Module &module, ModuleAnalysisMan // @param pipelineState : Pipeline state // @param relPatchId : Relative patch ID // @param builder : IR builder to insert instructions -std::pair PatchPreparePipelineAbi::readTessFactors(PipelineState *pipelineState, Value *relPatchId, - IRBuilder<> &builder) { +std::pair PreparePipelineAbi::readTessFactors(PipelineState *pipelineState, Value *relPatchId, + IRBuilder<> &builder) { auto func = builder.GetInsertBlock()->getParent(); auto lds = Patch::getLdsVariable(pipelineState, func); @@ -143,13 +143,9 @@ std::pair PatchPreparePipelineAbi::readTessFactors(PipelineSta break; } - const auto tessFactorStart = - pipelineState->getShaderResourceUsage(ShaderStage::TessControl)->inOutUsage.tcs.calcFactor.onChip.tessFactorStart; - assert(numOuterTfs >= 2 && numOuterTfs <= 4); - // ldsOffset = tessFactorStart + relativeId * MaxTessFactorsPerPatch + // ldsOffset = relativeId * MaxTessFactorsPerPatch Value *ldsOffset = builder.CreateMul(relPatchId, builder.getInt32(MaxTessFactorsPerPatch)); - ldsOffset = builder.CreateAdd(ldsOffset, builder.getInt32(tessFactorStart)); Value *outerTf = readValueFromLds(FixedVectorType::get(builder.getFloatTy(), numOuterTfs), ldsOffset); // NOTE: For isoline, the outer tessellation factors have to be exchanged, which is required by HW. @@ -161,9 +157,9 @@ std::pair PatchPreparePipelineAbi::readTessFactors(PipelineSta assert(numInnerTfs <= 2); Value *innerTf = nullptr; if (numInnerTfs > 0) { - // ldsOffset = tessFactorStart + relativeId * MaxTessFactorsPerPatch + 4 + // ldsOffset = relativeId * MaxTessFactorsPerPatch + 4 Value *ldsOffset = builder.CreateMul(relPatchId, builder.getInt32(MaxTessFactorsPerPatch)); - ldsOffset = builder.CreateAdd(ldsOffset, builder.getInt32(tessFactorStart + 4)); + ldsOffset = builder.CreateAdd(ldsOffset, builder.getInt32(4)); innerTf = readValueFromLds(FixedVectorType::get(builder.getFloatTy(), numInnerTfs), ldsOffset); } @@ -180,9 +176,8 @@ std::pair PatchPreparePipelineAbi::readTessFactors(PipelineSta // @param outerTf : Outer tessellation factors to write to TF buffer // @param innerTf : Inner tessellation factors to write to TF buffer // @param builder : IR builder to insert instructions -void PatchPreparePipelineAbi::writeTessFactors(PipelineState *pipelineState, Value *tfBufferDesc, Value *tfBufferBase, - Value *relPatchId, Value *outerTf, Value *innerTf, - IRBuilder<> &builder) { +void PreparePipelineAbi::writeTessFactors(PipelineState *pipelineState, Value *tfBufferDesc, Value *tfBufferBase, + Value *relPatchId, Value *outerTf, Value *innerTf, IRBuilder<> &builder) { // NOTE: Tessellation factors are from tessellation level array and we have: // Isoline: // TF[0] = outerTF[0] @@ -227,8 +222,7 @@ void PatchPreparePipelineAbi::writeTessFactors(PipelineState *pipelineState, Val auto primitiveMode = pipelineState->getShaderModes()->getTessellationMode().primitiveMode; if (primitiveMode == PrimitiveMode::Isolines) { assert(numOuterTfs == 2 && numInnerTfs == 0); - - builder.CreateIntrinsic(Intrinsic::amdgcn_raw_tbuffer_store, outerTf->getType(), + builder.CreateIntrinsic(builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {outerTf, // vdata tfBufferDesc, // rsrc tfBufferOffset, // voffset @@ -244,7 +238,7 @@ void PatchPreparePipelineAbi::writeTessFactors(PipelineState *pipelineState, Val tessFactor = builder.CreateInsertElement(tessFactor, builder.CreateExtractElement(innerTf, static_cast(0)), 3); - builder.CreateIntrinsic(Intrinsic::amdgcn_raw_tbuffer_store, tessFactor->getType(), + builder.CreateIntrinsic(builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {tessFactor, // vdata tfBufferDesc, // rsrc tfBufferOffset, // voffset @@ -255,7 +249,7 @@ void PatchPreparePipelineAbi::writeTessFactors(PipelineState *pipelineState, Val assert(primitiveMode == PrimitiveMode::Quads); assert(numOuterTfs == 4 && numInnerTfs == 2); - builder.CreateIntrinsic(Intrinsic::amdgcn_raw_tbuffer_store, outerTf->getType(), + builder.CreateIntrinsic(builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {outerTf, // vdata tfBufferDesc, // rsrc tfBufferOffset, // voffset @@ -264,7 +258,7 @@ void PatchPreparePipelineAbi::writeTessFactors(PipelineState *pipelineState, Val builder.getInt32(coherent.u32All)}); // glc tfBufferOffset = builder.CreateAdd(tfBufferOffset, builder.getInt32(4 * sizeof(float))); - builder.CreateIntrinsic(Intrinsic::amdgcn_raw_tbuffer_store, innerTf->getType(), + builder.CreateIntrinsic(builder.getVoidTy(), Intrinsic::amdgcn_raw_tbuffer_store, {innerTf, // vdata tfBufferDesc, // rsrc tfBufferOffset, // voffset @@ -278,7 +272,7 @@ void PatchPreparePipelineAbi::writeTessFactors(PipelineState *pipelineState, Val // Merge shaders and set calling convention for the entry-point of each shader (GFX9+) // // @param module : LLVM module -void PatchPreparePipelineAbi::mergeShader(Module &module) { +void PreparePipelineAbi::mergeShader(Module &module) { const bool hasTs = (m_hasTcs || m_hasTes); if (m_pipelineState->isGraphics()) { @@ -403,7 +397,7 @@ void PatchPreparePipelineAbi::mergeShader(Module &module) { // Set ABI-specified entrypoint name for each shader // // @param module : LLVM module -void PatchPreparePipelineAbi::setAbiEntryNames(Module &module) { +void PreparePipelineAbi::setAbiEntryNames(Module &module) { for (auto &func : module) { if (!func.empty()) { @@ -419,7 +413,7 @@ void PatchPreparePipelineAbi::setAbiEntryNames(Module &module) { // Add ABI metadata // // @param module : LLVM module -void PatchPreparePipelineAbi::addAbiMetadata(Module &module) { +void PreparePipelineAbi::addAbiMetadata(Module &module) { RegisterMetadataBuilder regMetadataBuilder(&module, m_pipelineState, m_pipelineShaders); regMetadataBuilder.buildPalMetadata(); } @@ -428,7 +422,7 @@ void PatchPreparePipelineAbi::addAbiMetadata(Module &module) { // Handle the store of tessellation factors. // // @param entryPoint : Entry-point of tessellation control shader -void PatchPreparePipelineAbi::storeTessFactors(Function *entryPoint) { +void PreparePipelineAbi::storeTessFactors(Function *entryPoint) { assert(getShaderStage(entryPoint) == ShaderStage::TessControl); // Must be tessellation control shader if (m_pipelineState->canOptimizeTessFactor()) diff --git a/lgc/patch/RegisterMetadataBuilder.cpp b/lgc/patch/RegisterMetadataBuilder.cpp index 3d15ebe444..87ecf557de 100644 --- a/lgc/patch/RegisterMetadataBuilder.cpp +++ b/lgc/patch/RegisterMetadataBuilder.cpp @@ -1060,15 +1060,10 @@ void RegisterMetadataBuilder::buildCsRegisters(ShaderStageEnum shaderStage) { // Only check X dimension of original size if (computeMode.origWorkgroupSizeX) { - if (foldWorkgroupXY) { - workgroupSizes[0] = computeMode.origWorkgroupSizeX * computeMode.origWorkgroupSizeY; - workgroupSizes[1] = computeMode.origWorkgroupSizeZ; - workgroupSizes[2] = 1; - } else { - workgroupSizes[0] = computeMode.origWorkgroupSizeX; - workgroupSizes[1] = computeMode.origWorkgroupSizeY; - workgroupSizes[2] = computeMode.origWorkgroupSizeZ; - } + workgroupSizes[0] = computeMode.origWorkgroupSizeX; + workgroupSizes[1] = computeMode.origWorkgroupSizeY; + workgroupSizes[2] = computeMode.origWorkgroupSizeZ; + setOrigThreadgroupDimensions(workgroupSizes); } } diff --git a/lgc/patch/SetupTargetFeatures.cpp b/lgc/patch/SetupTargetFeatures.cpp index b5235db7a4..8d03f7ddbd 100644 --- a/lgc/patch/SetupTargetFeatures.cpp +++ b/lgc/patch/SetupTargetFeatures.cpp @@ -29,7 +29,7 @@ *********************************************************************************************************************** */ #include "lgc/patch/SetupTargetFeatures.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineState.h" #include "lgc/state/TargetInfo.h" #include "llvm/Pass.h" @@ -56,6 +56,21 @@ PreservedAnalyses PatchSetupTargetFeatures::run(Module &module, ModuleAnalysisMa m_pipelineState = pipelineState; setupTargetFeatures(&module); +#ifndef NDEBUG + // On a debug build, check there are no leftover lgc*.* dialect ops. + bool err = false; + for (Function &decl : module) { + if (!decl.isDeclaration() || decl.getIntrinsicID() != Intrinsic::not_intrinsic || decl.use_empty()) + continue; + if (decl.getName().starts_with("lgc") && decl.getName().find('.') != StringRef::npos) { + errs() << "Leftover dialect op " << decl.getName() << "\n"; + err = true; + } + } + if (err) + report_fatal_error("Leftover dialect ops"); +#endif + return PreservedAnalyses::none(); } @@ -79,16 +94,12 @@ void PatchSetupTargetFeatures::setupTargetFeatures(Module *module) { auto shaderStage = lgc::getShaderStage(&*func); // NOTE: AMDGPU_CS_ChainPreserve is expected to not have shader stage set. -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 465196 if (func->getCallingConv() != CallingConv::AMDGPU_CS_ChainPreserve) { -#endif if (!shaderStage.has_value()) { errs() << "Invalid shader stage for function " << func->getName() << "\n"; report_fatal_error("Got invalid shader stage when setting up features for function"); } -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 465196 } -#endif if (isShaderEntryPoint(&*func)) { bool useSiScheduler = m_pipelineState->getShaderOptions(shaderStage.value()).useSiScheduler; @@ -114,11 +125,8 @@ void PatchSetupTargetFeatures::setupTargetFeatures(Module *module) { builder.addAttribute("amdgpu-flat-work-group-size", "128,128"); } - if (callingConv == CallingConv::AMDGPU_CS || callingConv == CallingConv::AMDGPU_Gfx -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 465196 - || callingConv == CallingConv::AMDGPU_CS_Chain -#endif - ) { + if (callingConv == CallingConv::AMDGPU_CS || callingConv == CallingConv::AMDGPU_Gfx || + callingConv == CallingConv::AMDGPU_CS_Chain) { // Set the work group size const auto &computeMode = m_pipelineState->getShaderModes()->getComputeShaderMode(); unsigned flatWorkGroupSize = computeMode.workgroupSizeX * computeMode.workgroupSizeY * computeMode.workgroupSizeZ; diff --git a/lgc/patch/ShaderInputs.cpp b/lgc/patch/ShaderInputs.cpp index a58996ef4f..6cd24e1cb3 100644 --- a/lgc/patch/ShaderInputs.cpp +++ b/lgc/patch/ShaderInputs.cpp @@ -395,7 +395,7 @@ void ShaderInputs::fixupUses(Module &module, PipelineState *pipelineState, bool } } - // The new ShaderInputs scheme means that InOutBuilder or PatchResourceCollect no longer needs to set + // The new ShaderInputs scheme means that InOutBuilder or CollectResourceUsage no longer needs to set // the builtInUsage field for an input that is generated using ShaderInputs::getInput() and/or // ShaderInputs::getSpecialUserData() (before MutateEntryPoint), and we can remove that // builtInUsage field. diff --git a/lgc/patch/ShaderMerger.cpp b/lgc/patch/ShaderMerger.cpp index 47b86b1bf0..80001e0a0f 100644 --- a/lgc/patch/ShaderMerger.cpp +++ b/lgc/patch/ShaderMerger.cpp @@ -30,7 +30,7 @@ */ #include "ShaderMerger.h" #include "NggPrimShader.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/patch/PreparePipelineAbi.h" #include "lgc/patch/SystemValues.h" #include "lgc/state/PalMetadata.h" @@ -1113,7 +1113,7 @@ void ShaderMerger::storeTessFactorsWithOpt(Value *threadIdInWave, IRBuilder<> &b builder.SetInsertPoint(checkSpecilTfInWaveBlock); // Read back TFs from LDS - auto tessFactors = PatchPreparePipelineAbi::readTessFactors(m_pipelineState, threadIdInGroup, builder); + auto tessFactors = PreparePipelineAbi::readTessFactors(m_pipelineState, threadIdInGroup, builder); outerTf = tessFactors.first; innerTf = tessFactors.second; @@ -1326,8 +1326,8 @@ void ShaderMerger::storeTessFactorsWithOpt(Value *threadIdInWave, IRBuilder<> &b Value *tfBufferBase = getFunctionArgument(entryPoint, getSpecialSgprInputIndex(m_gfxIp, LsHs::TfBufferBase)); // Store TFs to TF buffer - PatchPreparePipelineAbi::writeTessFactors(m_pipelineState, tfBufferDesc, tfBufferBase, threadIdInGroup, outerTf, - innerTf, builder); + PreparePipelineAbi::writeTessFactors(m_pipelineState, tfBufferDesc, tfBufferBase, threadIdInGroup, outerTf, innerTf, + builder); builder.CreateBr(endTryStoreTfBlock); } diff --git a/lgc/patch/SystemValues.cpp b/lgc/patch/SystemValues.cpp index 694eb1b0dc..9ef1d855ae 100644 --- a/lgc/patch/SystemValues.cpp +++ b/lgc/patch/SystemValues.cpp @@ -179,7 +179,7 @@ Value *ShaderSystemValues::getInvocationId() { Value *ShaderSystemValues::getRelativeId() { assert(m_shaderStage == ShaderStage::TessControl); if (!m_relativeId) { - auto insertPos = &*m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); + auto insertPos = m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); auto intfData = m_pipelineState->getShaderInterfaceData(m_shaderStage); auto relPatchId = getFunctionArgument(m_entryPoint, intfData->entryArgIdxs.tcs.relPatchId, "relPatchId"); @@ -207,7 +207,7 @@ Value *ShaderSystemValues::getOffChipLdsDesc() { Value *ShaderSystemValues::getTessCoord() { assert(m_shaderStage == ShaderStage::TessEval); if (!m_tessCoord) { - auto insertPos = &*m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); + auto insertPos = m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); auto intfData = m_pipelineState->getShaderInterfaceData(m_shaderStage); Value *tessCoordX = getFunctionArgument(m_entryPoint, intfData->entryArgIdxs.tes.tessCoordX, "tessCoordX"); @@ -237,7 +237,7 @@ Value *ShaderSystemValues::getTessCoord() { Value *ShaderSystemValues::getEsGsOffsets() { assert(m_shaderStage == ShaderStage::Geometry); if (!m_esGsOffsets) { - auto insertPos = &*m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); + auto insertPos = m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); auto intfData = m_pipelineState->getShaderInterfaceData(m_shaderStage); // TODO: We should only insert those offsets required by the specified input primitive. @@ -323,7 +323,7 @@ std::pair> ShaderSystemValues::getEmitCounterPtr() { if (m_emitCounterPtrs.empty()) { // Setup GS emit vertex counter auto &dataLayout = m_entryPoint->getParent()->getDataLayout(); - auto insertPos = &*m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); + auto insertPos = m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); for (int i = 0; i < MaxGsStreams; ++i) { auto emitCounterPtr = new AllocaInst(emitCounterTy, dataLayout.getAllocaAddrSpace(), "", insertPos); new StoreInst(ConstantInt::get(emitCounterTy, 0), emitCounterPtr, insertPos); @@ -405,7 +405,7 @@ Value *ShaderSystemValues::getStreamOutBufDesc(unsigned xfbBuffer) { if (!m_streamOutBufDescs[xfbBuffer]) { auto streamOutTablePair = getStreamOutTablePtr(); auto streamOutTablePtr = streamOutTablePair.second; - auto insertPos = streamOutTablePtr->getNextNode(); + auto insertPos = streamOutTablePtr->getNextNode()->getIterator(); Value *idxs[] = {ConstantInt::get(Type::getInt64Ty(*m_context), 0), ConstantInt::get(Type::getInt64Ty(*m_context), xfbBuffer)}; @@ -468,12 +468,12 @@ std::pair ShaderSystemValues::getStreamOutTablePtr() { // @param highValue : Value to use for high part, or InvalidValue to use PC Instruction *ShaderSystemValues::makePointer(Value *lowValue, Type *ptrTy, unsigned highValue) { // Insert extending code after lowValue if it is an instruction. - Instruction *insertPos = nullptr; + BasicBlock::iterator insertPos{}; auto lowValueInst = dyn_cast(lowValue); if (lowValueInst) - insertPos = lowValueInst->getNextNode(); + insertPos = lowValueInst->getNextNode()->getIterator(); else - insertPos = &*m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); + insertPos = m_entryPoint->front().getFirstNonPHIOrDbgOrAlloca(); Value *extendedPtrValue = nullptr; if (highValue == InvalidValue) { @@ -490,7 +490,7 @@ Instruction *ShaderSystemValues::makePointer(Value *lowValue, Type *ptrTy, unsig Value *pc = emitCall("llvm.amdgcn.s.getpc", Type::getInt64Ty(*m_context), ArrayRef(), {}, pcInsertPos); m_pc = new BitCastInst(pc, FixedVectorType::get(Type::getInt32Ty(*m_context), 2), "", insertPos); } else - insertPos = m_pc->getNextNode(); + insertPos = m_pc->getNextNode()->getIterator(); extendedPtrValue = m_pc; } else { // Use constant highValue value. diff --git a/lgc/patch/VertexFetch.cpp b/lgc/patch/VertexFetch.cpp index 87706b3fc8..598b3d6dda 100644 --- a/lgc/patch/VertexFetch.cpp +++ b/lgc/patch/VertexFetch.cpp @@ -32,7 +32,7 @@ #include "lgc/LgcContext.h" #include "lgc/LgcDialect.h" #include "lgc/builder/BuilderImpl.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/patch/ShaderInputs.h" #include "lgc/state/IntrinsDefs.h" #include "lgc/state/PalMetadata.h" @@ -59,7 +59,6 @@ class PipelineState; namespace { // Map vkgc -static constexpr unsigned InternalDescriptorSetId = static_cast(-1); static constexpr unsigned FetchShaderInternalBufferBinding = 5; // Descriptor binding for uber fetch shader static constexpr unsigned CurrentAttributeBufferBinding = 1; // Descriptor binding for current attribute static constexpr unsigned GenericVertexFetchShaderBinding = 0; // Descriptor binding for generic vertex fetch shader @@ -97,10 +96,10 @@ class VertexFetchImpl : public VertexFetch { // Generate code to fetch a vertex value Value *fetchVertex(Type *inputTy, const VertexInputDescription *description, unsigned location, unsigned compIdx, - BuilderImpl &builderImpl) override; + BuilderImpl &builderImpl, llvm::Value *vertexIndex, llvm::Value *instanceIndex) override; // Generate code to fetch a vertex value for uber shader - Value *fetchVertex(InputImportGenericOp *inst, Value *descPtr, Value *locMasks, BuilderBase &builder, + Value *fetchVertex(LoadVertexInputOp *inst, Value *descPtr, Value *locMasks, BuilderBase &builder, bool disablePerCompFetch) override; private: @@ -616,13 +615,15 @@ const unsigned char VertexFetchImpl::m_vertexFormatMapGfx11[][9] = { PreservedAnalyses LowerVertexFetch::run(Module &module, ModuleAnalysisManager &analysisManager) { PipelineState *pipelineState = analysisManager.getResult(module).getPipelineState(); - // Gather vertex fetch calls. We can assume they're all in one function, the vertex shader. + // Gather vertex fetch calls. We can assume they're all in one function, the vertex shader, or compute shader for + // transform pipeline. // We can assume that multiple fetches of the same location, component and type have been CSEd. - SmallVector vertexFetches; - static const auto fetchVisitor = llvm_dialects::VisitorBuilder>() + SmallVector vertexFetches; + static const auto fetchVisitor = llvm_dialects::VisitorBuilder>() .setStrategy(llvm_dialects::VisitorStrategy::ByFunctionDeclaration) - .add([](auto &fetches, InputImportGenericOp &op) { - if (lgc::getShaderStage(op.getFunction()) == ShaderStage::Vertex) + .add([](auto &fetches, LoadVertexInputOp &op) { + if (lgc::getShaderStage(op.getFunction()) == ShaderStage::Vertex || + lgc::getShaderStage(op.getFunction()) == ShaderStage::Compute) fetches.push_back(&op); }) .build(); @@ -649,7 +650,7 @@ PreservedAnalyses LowerVertexFetch::run(Module &module, ModuleAnalysisManager &a Value *locationMasks = builder.CreateLoad(builder.getInt64Ty(), descPtr); descPtr = builder.CreateGEP(builder.getInt64Ty(), descPtr, {builder.getInt32(1)}); - for (InputImportGenericOp *inst : vertexFetches) { + for (LoadVertexInputOp *inst : vertexFetches) { builder.SetInsertPoint(inst); Value *vertex = vertexFetch->fetchVertex(inst, descPtr, locationMasks, BuilderBase::get(builder), pipelineState->getOptions().disablePerCompFetch); @@ -662,7 +663,7 @@ PreservedAnalyses LowerVertexFetch::run(Module &module, ModuleAnalysisManager &a // Whole-pipeline compilation (or shader compilation where we were given the vertex input descriptions). // Lower each vertex fetch. - for (InputImportGenericOp *fetch : vertexFetches) { + for (LoadVertexInputOp *fetch : vertexFetches) { Value *vertex = nullptr; // Find the vertex input description. @@ -681,7 +682,17 @@ PreservedAnalyses LowerVertexFetch::run(Module &module, ModuleAnalysisManager &a // Fetch the vertex. builder.SetInsertPoint(fetch); builder.setShaderStage(ShaderStage::Vertex); - vertex = vertexFetch->fetchVertex(fetch->getType(), description, location, component, builder); + + // Get vertexIndex and instanceIndex from function args for transform shader + Value *vertexIndex = nullptr; + Value *instanceIndex = nullptr; + if (lgc::getShaderStage(fetch->getFunction()) == ShaderStage::Compute) { + vertexIndex = fetch->getVertexIndex(); + instanceIndex = fetch->getInstanceIndex(); + } + + vertex = vertexFetch->fetchVertex(fetch->getType(), description, location, component, builder, vertexIndex, + instanceIndex); } // Replace and erase this call. @@ -702,7 +713,7 @@ PreservedAnalyses LowerVertexFetch::run(Module &module, ModuleAnalysisManager &a // @param builder : Builder to use to insert vertex fetch instructions // @param disablePerCompFetch : disable per component fetch // @returns : vertex -Value *VertexFetchImpl::fetchVertex(InputImportGenericOp *inst, Value *descPtr, Value *locMasks, BuilderBase &builder, +Value *VertexFetchImpl::fetchVertex(LoadVertexInputOp *inst, Value *descPtr, Value *locMasks, BuilderBase &builder, bool disablePerCompFetch) { if (!m_vertexIndex) { IRBuilderBase::InsertPointGuard ipg(builder); @@ -874,11 +885,11 @@ Value *VertexFetchImpl::fetchVertex(InputImportGenericOp *inst, Value *descPtr, Value *wholeVertex = nullptr; { builder.SetInsertPoint(wholeVertexBlock); - wholeVertex = builder.CreateIntrinsic(instId, fetchType, args, {}); + wholeVertex = builder.CreateIntrinsic(fetchType, instId, args, {}); if (is64bitFetch) { // If it is 64-bit, we need the second fetch args[offsetIdx] = builder.CreateAdd(args[offsetIdx], builder.getInt32(SizeOfVec4)); - auto secondFetch = builder.CreateIntrinsic(instId, fetchType, args, {}); + auto secondFetch = builder.CreateIntrinsic(fetchType, instId, args, {}); wholeVertex = builder.CreateShuffleVector(wholeVertex, secondFetch, ArrayRef{0, 1, 2, 3, 4, 5, 6, 7}); } builder.CreateBr(fetchUberEndBlock); @@ -926,14 +937,14 @@ Value *VertexFetchImpl::fetchVertex(InputImportGenericOp *inst, Value *descPtr, args[offsetIdx] = byteOffset; if (is64bitFetch) { - Value *comp = builder.CreateIntrinsic(instId, fetch64Type, args, {}); + Value *comp = builder.CreateIntrinsic(fetch64Type, instId, args, {}); Value *elem = builder.CreateExtractElement(comp, uint64_t(0)); lastVert = builder.CreateInsertElement(lastVert, elem, uint64_t(0)); elem = builder.CreateExtractElement(comp, 1); lastVert = builder.CreateInsertElement(lastVert, elem, 1); comp0 = lastVert; } else { - comp0 = builder.CreateIntrinsic(instId, compType, args, {}); + comp0 = builder.CreateIntrinsic(compType, instId, args, {}); lastVert = builder.CreateInsertElement(lastVert, comp0, uint64_t(0)); comp0 = lastVert; } @@ -948,14 +959,14 @@ Value *VertexFetchImpl::fetchVertex(InputImportGenericOp *inst, Value *descPtr, // Add offset. offset = offset + componentSize args[offsetIdx] = builder.CreateAdd(args[offsetIdx], componentSize); if (is64bitFetch) { - Value *comp = builder.CreateIntrinsic(instId, fetch64Type, args, {}); + Value *comp = builder.CreateIntrinsic(fetch64Type, instId, args, {}); Value *elem = builder.CreateExtractElement(comp, uint64_t(0)); lastVert = builder.CreateInsertElement(lastVert, elem, 2); elem = builder.CreateExtractElement(comp, 1); lastVert = builder.CreateInsertElement(lastVert, elem, 3); comp1 = lastVert; } else { - comp1 = builder.CreateIntrinsic(instId, compType, args, {}); + comp1 = builder.CreateIntrinsic(compType, instId, args, {}); lastVert = builder.CreateInsertElement(lastVert, comp1, 1); comp1 = lastVert; } @@ -968,14 +979,14 @@ Value *VertexFetchImpl::fetchVertex(InputImportGenericOp *inst, Value *descPtr, builder.SetInsertPoint(comp2Block); args[offsetIdx] = builder.CreateAdd(args[offsetIdx], componentSize); if (is64bitFetch) { - Value *comp = builder.CreateIntrinsic(instId, fetch64Type, args, {}); + Value *comp = builder.CreateIntrinsic(fetch64Type, instId, args, {}); Value *elem = builder.CreateExtractElement(comp, uint64_t(0)); lastVert = builder.CreateInsertElement(lastVert, elem, 4); elem = builder.CreateExtractElement(comp, 1); lastVert = builder.CreateInsertElement(lastVert, elem, 5); comp2 = lastVert; } else { - comp2 = builder.CreateIntrinsic(instId, compType, args, {}); + comp2 = builder.CreateIntrinsic(compType, instId, args, {}); lastVert = builder.CreateInsertElement(lastVert, comp2, 2); comp2 = lastVert; } @@ -988,14 +999,14 @@ Value *VertexFetchImpl::fetchVertex(InputImportGenericOp *inst, Value *descPtr, builder.SetInsertPoint(comp3Block); args[offsetIdx] = builder.CreateAdd(args[offsetIdx], componentSize); if (is64bitFetch) { - Value *comp = builder.CreateIntrinsic(instId, fetch64Type, args, {}); + Value *comp = builder.CreateIntrinsic(fetch64Type, instId, args, {}); Value *elem = builder.CreateExtractElement(comp, uint64_t(0)); lastVert = builder.CreateInsertElement(lastVert, elem, 6); elem = builder.CreateExtractElement(comp, 1); lastVert = builder.CreateInsertElement(lastVert, elem, 7); comp3 = lastVert; } else { - comp3 = builder.CreateIntrinsic(instId, compType, args, {}); + comp3 = builder.CreateIntrinsic(compType, instId, args, {}); lastVert = builder.CreateInsertElement(lastVert, comp3, 3); comp3 = lastVert; } @@ -1183,9 +1194,12 @@ Type *VertexFetchImpl::getVertexFetchType(bool isFloat, unsigned byteSize, Build // @param description : Vertex input description // @param location : Vertex input location (only used for an IR name, not for functionality) // @param compIdx : Index used for vector element indexing -// @param builder : Builder to use to insert vertex fetch instructions +// @param builderImpl : Builder to use to insert vertex fetch instructions +// @param vertexIndex : Vertex index, unique for each vertex +// @param instanceIndex : Instance index, unique for each instance Value *VertexFetchImpl::fetchVertex(Type *inputTy, const VertexInputDescription *description, unsigned location, - unsigned compIdx, BuilderImpl &builderImpl) { + unsigned compIdx, BuilderImpl &builderImpl, llvm::Value *vertexIndex, + llvm::Value *instanceIndex) { Value *vertex = nullptr; BuilderBase &builder = BuilderBase::get(builderImpl); Instruction *insertPos = &*builder.GetInsertPoint(); @@ -1193,6 +1207,12 @@ Value *VertexFetchImpl::fetchVertex(Type *inputTy, const VertexInputDescription Value *srdStride = nullptr; if (m_useSoftwareVertexBufferDescriptors) std::tie(vbDesc, srdStride) = convertSrdToOffsetMode(vbDesc, builderImpl); + + if (vertexIndex) + m_vertexIndex = vertexIndex; + if (instanceIndex) + m_instanceIndex = instanceIndex; + Value *vbIndex = nullptr; if (description->inputRate == VertexInputRateVertex) { // Use vertex index diff --git a/lgc/patch/WorkaroundDsSubdwordWrite.cpp b/lgc/patch/WorkaroundDsSubdwordWrite.cpp index 08054463e3..904f84da5f 100644 --- a/lgc/patch/WorkaroundDsSubdwordWrite.cpp +++ b/lgc/patch/WorkaroundDsSubdwordWrite.cpp @@ -69,12 +69,6 @@ PreservedAnalyses WorkaroundDsSubdwordWrite::run(Module &module, ModuleAnalysisM auto gfxIp = pipelineState->getTargetInfo().getGfxIpVersion(); if (!workaroundSubdwordWrite || gfxIp.major != 11 || gfxIp.minor != 5) return PreservedAnalyses::all(); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 463892 - // Old version of the code - return PreservedAnalyses::all(); -#else - // New version of the code (also handles unknown version, which we treat as - // latest) bool isChanged = false; for (Function &func : module.getFunctionList()) { for (BasicBlock &block : func) { @@ -96,6 +90,5 @@ PreservedAnalyses WorkaroundDsSubdwordWrite::run(Module &module, ModuleAnalysisM } } return isChanged ? PreservedAnalyses::none() : PreservedAnalyses::all(); -#endif } } // namespace lgc diff --git a/lgc/state/Compiler.cpp b/lgc/state/Compiler.cpp index 0c627f82f3..011fe76d86 100644 --- a/lgc/state/Compiler.cpp +++ b/lgc/state/Compiler.cpp @@ -31,17 +31,12 @@ #include "llvmraytracing/Continuations.h" #include "lgc/LgcContext.h" #include "lgc/PassManager.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/IR/IRPrintingPasses.h" -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 442438 -// Old version of the code -#else -// New version of the code (also handles unknown version, which we treat as latest) #include "llvm/IRPrinter/IRPrintingPasses.h" -#endif #include "llvm/Linker/Linker.h" #include "llvm/Support/Debug.h" #include "llvm/Support/Timer.h" diff --git a/lgc/state/LgcContext.cpp b/lgc/state/LgcContext.cpp index 83a3568ec9..8966b1583f 100644 --- a/lgc/state/LgcContext.cpp +++ b/lgc/state/LgcContext.cpp @@ -32,7 +32,7 @@ #include "lgc/Builder.h" #include "lgc/LgcDialect.h" #include "lgc/PassManager.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PassManagerCache.h" #include "lgc/state/PipelineState.h" #include "lgc/state/TargetInfo.h" @@ -77,23 +77,12 @@ static cl::opt EmitLgc("emit-lgc", cl::desc("Emit LLVM assembly suitable f static cl::opt ShowEncoding("show-encoding", cl::desc("Show instruction encodings"), cl::init(false)); // -opt: Override the optimization level passed in to LGC with the given one. -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 -// Old version of the code -static cl::opt OptLevel("opt", cl::desc("Set the optimization level for LGC:"), - cl::init(CodeGenOpt::Default), - values(clEnumValN(CodeGenOpt::None, "none", "no optimizations"), - clEnumValN(CodeGenOpt::Less, "quick", "quick compilation time"), - clEnumValN(CodeGenOpt::Default, "default", "default optimizations"), - clEnumValN(CodeGenOpt::Aggressive, "fast", "fast execution time"))); -#else -// New version of the code (also handles unknown version, which we treat as latest) static cl::opt OptLevel("opt", cl::desc("Set the optimization level for LGC:"), cl::init(CodeGenOptLevel::Default), values(clEnumValN(CodeGenOptLevel::None, "none", "no optimizations"), clEnumValN(CodeGenOptLevel::Less, "quick", "quick compilation time"), clEnumValN(CodeGenOptLevel::Default, "default", "default optimizations"), clEnumValN(CodeGenOptLevel::Aggressive, "fast", "fast execution time"))); -#endif // ===================================================================================================================== // Set default for a command-line option, but only if command-line processing has not happened yet, or did not see @@ -157,24 +146,7 @@ void LgcContext::initialize() { // disable this to avoid miscompilation, see (https://github.com/GPUOpen-Drivers/llpc/issues/1206). setOptionDefault("enable-phi-of-ops", "0"); setOptionDefault("amdgpu-vgpr-index-mode", "1"); // force VGPR indexing on GFX8 -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 464446 - // Old version of the code - setOptionDefault("amdgpu-atomic-optimizations", "1"); -#else - // New version of the code (also handles unknown version, which we treat as latest) -#endif -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 463788 - // Old version of the code -#else - // New version of the code (also handles unknown version, which we treat as latest) setOptionDefault("amdgpu-atomic-optimizer-strategy", "DPP"); -#endif -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 458033 - // Old version of the code - setOptionDefault("use-gpu-divergence-analysis", "1"); -#else - // New version of the code (also handles unknown version, which we treat as latest) -#endif setOptionDefault("structurizecfg-skip-uniform-regions", "1"); setOptionDefault("spec-exec-max-speculation-cost", "10"); #if !defined(LLVM_HAVE_BRANCH_AMD_GFX) @@ -224,14 +196,7 @@ bool LgcContext::isGpuNameValid(llvm::StringRef gpuName) { // // @param gpuName : LLVM GPU name (e.g. "gfx900"); empty to use -mcpu option setting // @param optLevel : LLVM optimization level used to initialize target machine -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 -// Old version of the code -std::unique_ptr LgcContext::createTargetMachine(StringRef gpuName, CodeGenOpt::Level optLevel) -#else -// New version of the code (also handles unknown version, which we treat as latest) -std::unique_ptr LgcContext::createTargetMachine(StringRef gpuName, CodeGenOptLevel optLevel) -#endif -{ +std::unique_ptr LgcContext::createTargetMachine(StringRef gpuName, CodeGenOptLevel optLevel) { assert(Initialized && "Must call LgcContext::initialize before LgcContext::createTargetMachine"); std::string mcpuName = codegen::getMCPU(); // -mcpu setting from llvm/CodeGen/CommandFlags.h @@ -373,13 +338,7 @@ void LgcContext::addTargetPasses(lgc::LegacyPassManager &passMgr, Timer *codeGen passMgr.add(createStartStopTimer(codeGenTimer, false)); } -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 -// Old version of the code -llvm::CodeGenOpt::Level LgcContext::getOptimizationLevel() const { -#else -// New version of the code (also handles unknown version, which we treat as latest) llvm::CodeGenOptLevel LgcContext::getOptimizationLevel() const { -#endif return m_targetMachine->getOptLevel(); } diff --git a/lgc/state/PalMetadata.cpp b/lgc/state/PalMetadata.cpp index c4b7f8c8a9..27349c06a6 100644 --- a/lgc/state/PalMetadata.cpp +++ b/lgc/state/PalMetadata.cpp @@ -339,7 +339,7 @@ void PalMetadata::fixUpRegisters() { return gsOutputPrimitiveType; }; // Here we use register field to determine if NGG is enabled, because enabling NGG depends on other conditions. - // see PatchResourceCollect::canUseNgg. + // see CollectResourceUsage::canUseNgg. auto graphicsRegisters = m_pipelineNode[Util::Abi::PipelineMetadataKey::GraphicsRegisters].getMap(true); if (graphicsRegisters.find(Util::Abi::GraphicsRegisterMetadataKey::VgtGsOutPrimType) != graphicsRegisters.end()) { auto primType = getPrimType(); diff --git a/lgc/state/PassManagerCache.cpp b/lgc/state/PassManagerCache.cpp index 87e3ec5447..bc563f9aa2 100644 --- a/lgc/state/PassManagerCache.cpp +++ b/lgc/state/PassManagerCache.cpp @@ -33,13 +33,7 @@ #include "lgc/patch/IncludeLlvmIr.h" #include "lgc/patch/SetupTargetFeatures.h" #include "llvm/Analysis/TargetTransformInfo.h" -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 442438 -// Old version of the code -#include "llvm/IR/IRPrintingPasses.h" -#else -// New version of the code (also handles unknown version, which we treat as latest) #include "llvm/IRPrinter/IRPrintingPasses.h" -#endif #include "llvm/Target/TargetMachine.h" #include "llvm/Transforms/InstCombine/InstCombine.h" #include "llvm/Transforms/Scalar.h" @@ -96,13 +90,7 @@ std::pair PassManagerCache::getPassMana // Add a few optimizations. FunctionPassManager fpm; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 452298 - // Old version of the code - unsigned instCombineOpt = 5; -#else - // New version of the code (also handles unknown version, which we treat as latest) auto instCombineOpt = InstCombineOptions().setMaxIterations(5); -#endif fpm.addPass(InstCombinePass(instCombineOpt)); fpm.addPass(InstSimplifyPass()); fpm.addPass(EarlyCSEPass(true)); diff --git a/lgc/test/BuiltIns/cs-globalinvocationid.lgc b/lgc/test/BuiltIns/cs-globalinvocationid.lgc index c7224aec6c..2831e5c6d9 100644 --- a/lgc/test/BuiltIns/cs-globalinvocationid.lgc +++ b/lgc/test/BuiltIns/cs-globalinvocationid.lgc @@ -57,6 +57,4 @@ attributes #0 = { nounwind } ; GFX11-NEXT: v_mov_b32_e32 v2, v4 ; GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-NEXT: buffer_store_b96 v[0:2], off, s[8:11], 0 -; GFX11-NEXT: s_nop 0 -; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) -; GFX11-NEXT: s_endpgm +; GFX11: s_endpgm diff --git a/lgc/test/BuiltIns/cs-localinvocationid.lgc b/lgc/test/BuiltIns/cs-localinvocationid.lgc index 46c43aea2b..f3931dbcb4 100644 --- a/lgc/test/BuiltIns/cs-localinvocationid.lgc +++ b/lgc/test/BuiltIns/cs-localinvocationid.lgc @@ -47,6 +47,4 @@ attributes #0 = { nounwind } ; GFX11-NEXT: v_lshrrev_b32_e32 v3, 20, v0 ; GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-NEXT: buffer_store_b96 v[1:3], off, s[0:3], 0 -; GFX11-NEXT: s_nop 0 -; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) -; GFX11-NEXT: s_endpgm +; GFX11: s_endpgm diff --git a/lgc/test/BuiltIns/cs-localinvocationindex.lgc b/lgc/test/BuiltIns/cs-localinvocationindex.lgc index 8fa75c3ca0..2d88ebbd55 100644 --- a/lgc/test/BuiltIns/cs-localinvocationindex.lgc +++ b/lgc/test/BuiltIns/cs-localinvocationindex.lgc @@ -52,6 +52,4 @@ attributes #0 = { nounwind } ; GFX11-NEXT: v_mad_u32_u24 v0, v1, 5, v0 ; GFX11-NEXT: s_waitcnt lgkmcnt(0) ; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0 -; GFX11-NEXT: s_nop 0 -; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) -; GFX11-NEXT: s_endpgm +; GFX11: s_endpgm diff --git a/lgc/test/CallLibFromCs-indirect.lgc b/lgc/test/CallLibFromCs-indirect.lgc index 9f0d275e30..23fd7d5a28 100644 --- a/lgc/test/CallLibFromCs-indirect.lgc +++ b/lgc/test/CallLibFromCs-indirect.lgc @@ -1,7 +1,7 @@ ; Call an extern compute library function from a compute shader. ; RUN: lgc -mcpu=gfx1010 -print-after=lgc-mutate-entry-point -o /dev/null 2>&1 - <%s | FileCheck --check-prefixes=CHECK %s -; CHECK: IR Dump After Patch LLVM for entry-point mutation +; CHECK: IR Dump After Mutate entry point ; CHECK: define dllexport amdgpu_cs void @lgc.shader.CS.main(i32 inreg noundef %globalTable, ptr addrspace(4) inreg noundef %numWorkgroupsPtr, i32 inreg noundef %userdata0, i32 inreg noundef %userdata1, i32 inreg noundef %userdata2, i32 inreg noundef %userdata3, i32 inreg noundef %userdata4, i32 inreg noundef %userdata5, i32 inreg noundef %userdata6, i32 inreg noundef %userdata7, i32 inreg noundef %userdata8, i32 inreg noundef %userdata9, i32 inreg noundef %userdata10, i32 inreg noundef %userdata11, i32 inreg noundef %spillTable, <3 x i32> inreg noundef %WorkgroupId, i32 inreg noundef %MultiDispatchInfo, <3 x i32> noundef %LocalInvocationId) #0 !lgc.shaderstage !7 { ; CHECK: call amdgpu_gfx i32 %func_ptr(i32 inreg %globalTable, ptr addrspace(4) inreg %numWorkgroupsPtr, i32 inreg %userdata0, i32 inreg %userdata1, i32 inreg %userdata2, i32 inreg %userdata3, i32 inreg %userdata4, i32 inreg %userdata5, i32 inreg %userdata6, i32 inreg %userdata7, i32 inreg %userdata8, i32 inreg %userdata9, i32 inreg %userdata10, i32 inreg %userdata11, i32 inreg %spillTable, <3 x i32> inreg %WorkgroupId, i32 inreg %MultiDispatchInfo, <3 x i32> %LocalInvocationId) ; CHECK: !7 = !{i32 7} diff --git a/lgc/test/CallLibFromCs.lgc b/lgc/test/CallLibFromCs.lgc index 57f61b9b4f..cc372f97c0 100644 --- a/lgc/test/CallLibFromCs.lgc +++ b/lgc/test/CallLibFromCs.lgc @@ -1,7 +1,7 @@ ; Call an extern compute library function from a compute shader. ; RUN: lgc -mcpu=gfx1010 -print-after=lgc-mutate-entry-point -o /dev/null 2>&1 - <%s | FileCheck --check-prefixes=CHECK %s -; CHECK: IR Dump After Patch LLVM for entry-point mutation +; CHECK: IR Dump After Mutate entry point ; CHECK: declare amdgpu_gfx i32 @compute_library_func() #0 ; CHECK: define dllexport amdgpu_cs void @lgc.shader.CS.main(i32 inreg noundef %globalTable, ptr addrspace(4) inreg noundef %numWorkgroupsPtr, i32 inreg noundef %userdata0, i32 inreg noundef %userdata1, i32 inreg noundef %userdata2, i32 inreg noundef %userdata3, i32 inreg noundef %userdata4, i32 inreg noundef %userdata5, i32 inreg noundef %userdata6, i32 inreg noundef %userdata7, i32 inreg noundef %userdata8, i32 inreg noundef %userdata9, i32 inreg noundef %userdata10, i32 inreg noundef %userdata11, i32 inreg noundef %spillTable, <3 x i32> inreg noundef %WorkgroupId, i32 inreg noundef %MultiDispatchInfo, <3 x i32> noundef %LocalInvocationId) #1 !lgc.shaderstage !7 { ; CHECK: call amdgpu_gfx i32 @compute_library_func(i32 inreg %globalTable, ptr addrspace(4) inreg %numWorkgroupsPtr, i32 inreg %userdata0, i32 inreg %userdata1, i32 inreg %userdata2, i32 inreg %userdata3, i32 inreg %userdata4, i32 inreg %userdata5, i32 inreg %userdata6, i32 inreg %userdata7, i32 inreg %userdata8, i32 inreg %userdata9, i32 inreg %userdata10, i32 inreg %userdata11, i32 inreg %spillTable, <3 x i32> inreg %WorkgroupId, i32 inreg %MultiDispatchInfo, <3 x i32> %LocalInvocationId) diff --git a/lgc/test/CleanUndefOutputValues.lgc b/lgc/test/CleanUndefOutputValues.lgc index 67135bf7a5..bc54b21f83 100644 --- a/lgc/test/CleanUndefOutputValues.lgc +++ b/lgc/test/CleanUndefOutputValues.lgc @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --version 5 ; Check the case that undef output value cannot be removed since the location may be re-written with valid value later. -; RUN: lgc -mcpu=gfx1010 -passes=lgc-patch-resource-collect -o - %s -o - | FileCheck --check-prefixes=CHECK1 %s +; RUN: lgc -mcpu=gfx1010 -passes=lgc-collect-resource-usage -o - %s -o - | FileCheck --check-prefixes=CHECK1 %s ; Function Attrs: alwaysinline nounwind define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spirv.ExecutionModel !23 !lgc.shaderstage !19 { diff --git a/lgc/test/CsComputeLibrary.lgc b/lgc/test/CsComputeLibrary.lgc index 795fff8f49..933d317855 100644 --- a/lgc/test/CsComputeLibrary.lgc +++ b/lgc/test/CsComputeLibrary.lgc @@ -1,13 +1,13 @@ ; Define a compute library that can be called from a compute shader. ; RUN: lgc -mcpu=gfx1010 -print-after=lgc-mutate-entry-point -print-after=lgc-patch-prepare-pipeline-abi -print-after=lgc-patch-setup-target-features -o /dev/null 2>&1 - <%s | FileCheck --check-prefixes=CHECK %s -; CHECK: IR Dump After Patch LLVM for entry-point mutation +; CHECK: IR Dump After Mutate entry point ; CHECK: define amdgpu_gfx void @func(i32 inreg noundef %globalTable, ptr addrspace(4) inreg noundef %numWorkgroupsPtr, i32 inreg noundef %userdata0, i32 inreg noundef %userdata1, i32 inreg noundef %userdata2, i32 inreg noundef %userdata3, i32 inreg noundef %userdata4, i32 inreg noundef %userdata5, i32 inreg noundef %userdata6, i32 inreg noundef %userdata7, i32 inreg noundef %userdata8, i32 inreg noundef %userdata9, i32 inreg noundef %userdata10, i32 inreg noundef %userdata11, i32 inreg noundef %spillTable, <3 x i32> inreg noundef %WorkgroupId, i32 inreg noundef %MultiDispatchInfo, <3 x i32> noundef %LocalInvocationId) #0 !lgc.shaderstage !7 { ; CHECK: !7 = !{i32 7} -; CHECK: IR Dump After Patch LLVM for preparing pipeline ABI +; CHECK: IR Dump After Preparing pipeline ABI ; CHECK: define amdgpu_gfx void @func(i32 inreg noundef %globalTable, ptr addrspace(4) inreg noundef %numWorkgroupsPtr, i32 inreg noundef %userdata0, i32 inreg noundef %userdata1, i32 inreg noundef %userdata2, i32 inreg noundef %userdata3, i32 inreg noundef %userdata4, i32 inreg noundef %userdata5, i32 inreg noundef %userdata6, i32 inreg noundef %userdata7, i32 inreg noundef %userdata8, i32 inreg noundef %userdata9, i32 inreg noundef %userdata10, i32 inreg noundef %userdata11, i32 inreg noundef %spillTable, <3 x i32> inreg noundef %WorkgroupId, i32 inreg noundef %MultiDispatchInfo, <3 x i32> noundef %LocalInvocationId) #0 !lgc.shaderstage !7 { -; CHECK: IR Dump After Patch LLVM to set up target features +; CHECK: IR Dump After Set up target features ; CHECK: attributes #0 = { nounwind {{.*}}"amdgpu-flat-work-group-size"="6,6" ; ModuleID = 'lgcPipeline' diff --git a/lgc/test/CsLowerDebugPrintf.lgc b/lgc/test/CsLowerDebugPrintf.lgc index 766b907742..e186777b71 100644 --- a/lgc/test/CsLowerDebugPrintf.lgc +++ b/lgc/test/CsLowerDebugPrintf.lgc @@ -82,7 +82,7 @@ attributes #2 = { nounwind willreturn memory(none) } ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP5]], i32 0 ; CHECK-NEXT: [[TMP7:%.*]] = call ptr addrspace(7) @lgc.buffer.load.desc.to.ptr(ptr addrspace(4) [[TMP6]], i1 false, i1 false) ; CHECK-NEXT: [[TMP8:%.*]] = call <3 x i32> @lgc.shader.input.WorkgroupId(i32 0) #[[ATTR2:[0-9]+]] -; CHECK-NEXT: [[TMP9:%.*]] = mul <3 x i32> [[TMP8]], +; CHECK-NEXT: [[TMP9:%.*]] = mul <3 x i32> [[TMP8]], {{(splat \(i32 1\))|()}} ; CHECK-NEXT: [[TMP10:%.*]] = call i32 @lgc.shader.input.LocalInvocationId(i32 49) #[[ATTR2]] ; CHECK-NEXT: [[TMP11:%.*]] = and i32 [[TMP10]], 1023 ; CHECK-NEXT: [[TMP12:%.*]] = insertelement <3 x i32> poison, i32 [[TMP11]], i64 0 diff --git a/lgc/test/ElfRelocationAndNote.lgc b/lgc/test/ElfRelocationAndNote.lgc index 4702256be2..c681adcd2a 100644 --- a/lgc/test/ElfRelocationAndNote.lgc +++ b/lgc/test/ElfRelocationAndNote.lgc @@ -58,7 +58,7 @@ target triple = "amdgcn--amdpal" ; Function Attrs: nounwind define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !lgc.shaderstage !0 { .entry: - %0 = call <4 x i32> (...) @lgc.create.read.generic.input.v4i32(i32 5, i32 0, i32 0, i32 0, i32 0, i32 undef) + %0 = call <4 x i32> (...) @lgc.load.vertex.input__v4i32(i1 false, i32 5, i32 0, i32 0, i32 poison, i32 poison, i32 poison) %bc = bitcast <4 x i32> %0 to <4 x float> %1 = shufflevector <4 x float> %bc, <4 x float> undef, <3 x i32> call void (...) @lgc.create.write.generic.output(<3 x float> %1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 undef) @@ -66,7 +66,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !lgc } ; Function Attrs: nounwind readonly -declare <4 x i32> @lgc.create.read.generic.input.v4i32(...) local_unnamed_addr #1 +declare <4 x i32> @lgc.load.vertex.input__v4i32(...) local_unnamed_addr #1 ; Function Attrs: nounwind declare void @lgc.create.write.generic.output(...) local_unnamed_addr #0 diff --git a/lgc/test/ElfRelocationSize.lgc b/lgc/test/ElfRelocationSize.lgc index 3125c72577..6246fbcb87 100644 --- a/lgc/test/ElfRelocationSize.lgc +++ b/lgc/test/ElfRelocationSize.lgc @@ -143,9 +143,9 @@ target triple = "amdgcn--amdpal" define dllexport void @lgc.shader.VS.main() !lgc.shaderstage !22 { entry: %TEXCOORD1 = alloca <2 x float>, align 8, addrspace(5) - %TEXCOORD = call <2 x float> (...) @lgc.create.read.generic.input.v2f32(i32 1, i32 0, i32 0, i32 1, i32 16, i32 poison) + %TEXCOORD = call <2 x float> (...) @lgc.load.vertex.input__v2f32(i1 false, i32 1, i32 0, i32 0, i32 1, i32 16, i32 poison) %SV_Position = alloca <4 x float>, align 16, addrspace(5) - %POSITION = call <3 x float> (...) @lgc.create.read.generic.input.v3f32(i32 0, i32 0, i32 0, i32 1, i32 16, i32 poison) + %POSITION = call <3 x float> (...) @lgc.load.vertex.input__v3f32(i1 false, i32 0, i32 0, i32 0, i32 1, i32 16, i32 poison) %posx = extractelement <3 x float> %POSITION, i32 0 %posxi = fptoui float %posx to i32 @@ -185,13 +185,13 @@ entry: } ; Function Attrs: nounwind readonly willreturn -declare <3 x float> @lgc.create.read.generic.input.v3f32(...) #2 +declare <3 x float> @lgc.load.vertex.input__v3f32(...) #2 ; Function Attrs: nounwind declare void @lgc.create.write.builtin.output(...) #1 ; Function Attrs: nounwind readonly willreturn -declare <2 x float> @lgc.create.read.generic.input.v2f32(...) #2 +declare <2 x float> @lgc.load.vertex.input__v2f32(...) #2 ; Function Attrs: nounwind declare void @lgc.create.write.generic.output(...) #1 diff --git a/lgc/test/FDot2Gfx1010.lgc b/lgc/test/FDot2Gfx1010.lgc index 06e33debd8..6d812bd602 100644 --- a/lgc/test/FDot2Gfx1010.lgc +++ b/lgc/test/FDot2Gfx1010.lgc @@ -60,7 +60,7 @@ attributes #2 = { nounwind memory(none) } !0 = !{i32 8, i32 8, i32 1} !1 = !{!"DX12"} -!2 = !{i32 -1010443957, i32 1479304606, i32 -922603727, i32 -992904437, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 256, i32 0, i32 0, i32 0, i32 0, i32 5, i32 0, i32 3, i32 16777216, i32 16842752, i32 0, i32 0, i32 0, i32 -410708944, i32 1187695996} +!2 = !{i32 -1010443957, i32 1479304606, i32 -922603727, i32 -992904437, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 256, i32 0, i32 0, i32 0, i32 0, i32 5, i32 0, i32 3, i32 16777216, i32 16842752, i32 0, i32 0, i32 0, i32 0, i32 1187695996} !3 = !{i32 -1010443957, i32 1479304606, i32 -922603727, i32 -992904437, i32 0, i32 0, i32 0, i32 -1, i32 -1} !4 = !{!"DescriptorBufferCompact", i32 17, i32 255, i32 3, i32 2, i64 4294967296, i32 0, i32 2} !5 = !{i32 7} diff --git a/lgc/test/InOutPackingNonZeroBase.lgc b/lgc/test/InOutPackingNonZeroBase.lgc index a49f9c61d7..a8603a8964 100644 --- a/lgc/test/InOutPackingNonZeroBase.lgc +++ b/lgc/test/InOutPackingNonZeroBase.lgc @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc -; RUN: lgc -mcpu=gfx1010 --print-after=lgc-patch-resource-collect --verify-ir %s -o=/dev/null 2>&1 | FileCheck --check-prefixes=IR %s +; RUN: lgc -mcpu=gfx1010 --print-after=lgc-collect-resource-usage --verify-ir %s -o=/dev/null 2>&1 | FileCheck --check-prefixes=IR %s ; Throw in 'cat' as a hack to prevent update_test_checks from touching the "MAPPING" lines ; RUN: lgc -mcpu=gfx1010 -v --verify-ir %s -o=/dev/null 2>&1 > %t.out ; RUN: cat %t.out | FileCheck --check-prefixes=MAPPING %s @@ -26,8 +26,6 @@ target triple = "amdgcn--amdpal" ; MAPPING-LABEL: {{^//}} LLPC location input/output mapping results (VS) ; -; MAPPING: (VS) Input: [location, component] = [1, 0] => Mapped = [1, 0] -; ; MAPPING: (VS) Output: [location, component] = [7, 0] => Mapped = [1, 3] ; MAPPING-NEXT: (VS) Output: [location, component] = [8, 0] => Mapped = [2, 0] ; MAPPING-NEXT: (VS) Output: [location, component] = [9, 0] => Mapped = [2, 1] @@ -41,24 +39,18 @@ target triple = "amdgcn--amdpal" define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spirv.ExecutionModel !9 !lgc.shaderstage !10 { ; IR-LABEL: @lgc.shader.VS.main( ; IR-NEXT: .entry: -; IR-NEXT: [[TMP0:%.*]] = call <3 x float> @lgc.input.import.generic__v3f32(i1 false, i32 1, i32 0, i32 0, i32 poison) +; IR-NEXT: [[TMP0:%.*]] = call <3 x float> (...) @lgc.load.vertex.input__v3f32(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 poison, i32 poison) ; IR-NEXT: [[TMP1:%.*]] = extractelement <3 x float> [[TMP0]], i64 0 ; IR-NEXT: [[TMP2:%.*]] = extractelement <3 x float> [[TMP0]], i64 1 ; IR-NEXT: [[TMP3:%.*]] = extractelement <3 x float> [[TMP0]], i64 2 -; IR-NEXT: [[TMP4:%.*]] = bitcast float [[TMP1]] to i32 -; IR-NEXT: [[TMP5:%.*]] = bitcast float [[TMP2]] to i32 -; IR-NEXT: [[TMP6:%.*]] = bitcast float [[TMP3]] to i32 -; IR-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP4]] to float -; IR-NEXT: call void @lgc.output.export.generic.i32.i32.f32(i32 7, i32 0, float [[TMP7]]) #[[ATTR3:[0-9]+]] -; IR-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP5]] to float -; IR-NEXT: [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP8]], i64 0 -; IR-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP6]] to float -; IR-NEXT: [[TMP11:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP10]], i64 1 -; IR-NEXT: call void @lgc.output.export.generic.i32.i32.v2f32(i32 8, i32 0, <2 x float> [[TMP11]]) #[[ATTR3]] +; IR-NEXT: call void @lgc.output.export.generic.i32.i32.f32(i32 7, i32 0, float [[TMP1]]) #[[ATTR3:[0-9]+]] +; IR-NEXT: [[TMP4:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i64 0 +; IR-NEXT: [[TMP5:%.*]] = insertelement <2 x float> [[TMP4]], float [[TMP3]], i64 1 +; IR-NEXT: call void @lgc.output.export.generic.i32.i32.v2f32(i32 8, i32 0, <2 x float> [[TMP5]]) #[[ATTR3]] ; IR-NEXT: ret void ; .entry: - %0 = call <3 x float> (...) @lgc.create.read.generic.input__v3f32(i32 1, i32 0, i32 0, i32 0, i32 0, i32 poison) + %0 = call <3 x float> (...) @lgc.load.vertex.input__v3f32(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 poison, i32 poison) %1 = extractelement <3 x float> %0, i64 0 %2 = extractelement <3 x float> %0, i64 1 @@ -71,8 +63,8 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ret void } -; Function Attrs: nounwind {{readonly willreturn|willreturn memory\(read\)}} -declare <3 x float> @lgc.create.read.generic.input__v3f32(...) local_unnamed_addr #1 +; Function Attrs: nounwind willreturn +declare <3 x float> @lgc.load.vertex.input__v3f32(...) local_unnamed_addr #1 ; Function Attrs: nounwind declare void @lgc.create.write.generic.output(...) local_unnamed_addr #0 @@ -112,7 +104,7 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; IR-NEXT: [[TMP18:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[TMP17]], [[TMP0]] ; IR-NEXT: [[TMP19:%.*]] = insertelement <4 x float> poison, float [[TMP18]], i64 0 ; IR-NEXT: [[TMP20:%.*]] = shufflevector <4 x float> [[TMP19]], <4 x float> poison, <4 x i32> zeroinitializer -; IR-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 0, i32 0, <4 x float> [[TMP20]]) #[[ATTR3]] +; IR-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 0, i32 0, <4 x float> [[TMP20]]) #[[ATTR3:[0-9]+]] ; IR-NEXT: ret void ; .entry: diff --git a/lgc/test/IntToPtrWithAdd.lgc b/lgc/test/IntToPtrWithAdd.lgc index 3193ceee02..d8337a9226 100644 --- a/lgc/test/IntToPtrWithAdd.lgc +++ b/lgc/test/IntToPtrWithAdd.lgc @@ -1,13 +1,13 @@ ; Change inttoptr ( add x, const ) -> gep ( inttoptr x, const ) -; RUN: lgc -mcpu=gfx1010 -print-after=lgc-patch-peephole-opt -o - 2>&1 - <%s | FileCheck --check-prefixes=CHECK %s +; RUN: lgc -mcpu=gfx1010 -print-after=lgc-peephole-optimization -o - 2>&1 - <%s | FileCheck --check-prefixes=CHECK %s target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7" target triple = "amdgcn--amdpal" ; Function Attrs: nounwind define dllexport spir_func void @lgc.shader.CS.main(i64 %0, <4 x i32> addrspace(1)* %1) local_unnamed_addr #0 !lgc.shaderstage !10 { -; CHECK: IR Dump After Patch LLVM for peephole optimizations +; CHECK: IR Dump After Peephole optimizations ; CHECK: [[INTTOPTR:%[0-9]+]] = inttoptr i64 %[[#]] to ptr addrspace(1) ; CHECK: [[LOAD:%[0-9]+]] = load i32, ptr addrspace(1) [[INTTOPTR]], align 4 ; CHECK: [[INSERTELEMENT:%[0-9]+]] = insertelement <4 x i32> {{poison|undef}}, i32 [[LOAD]], i{{32|64}} 0 diff --git a/lgc/test/NGGPassthrough.lgc b/lgc/test/NggInPassthroughMode.lgc similarity index 100% rename from lgc/test/NGGPassthrough.lgc rename to lgc/test/NggInPassthroughMode.lgc diff --git a/lgc/test/PartPipeline.lgc b/lgc/test/PartPipeline.lgc index d368f9394c..26636e4f3b 100644 --- a/lgc/test/PartPipeline.lgc +++ b/lgc/test/PartPipeline.lgc @@ -151,9 +151,9 @@ target triple = "amdgcn--amdpal" define dllexport void @lgc.shader.VS.main() !lgc.shaderstage !22 { entry: %TEXCOORD1 = alloca <2 x float>, align 8, addrspace(5) - %TEXCOORD = call <2 x float> (...) @lgc.create.read.generic.input.v2f32(i32 1, i32 0, i32 0, i32 1, i32 16, i32 poison) + %TEXCOORD = call <2 x float> (...) @lgc.load.vertex.input__v2f32(i1 false, i32 1, i32 0, i32 0, i32 1, i32 16, i32 poison) %SV_Position = alloca <4 x float>, align 16, addrspace(5) - %POSITION = call <3 x float> (...) @lgc.create.read.generic.input.v3f32(i32 0, i32 0, i32 0, i32 1, i32 16, i32 poison) + %POSITION = call <3 x float> (...) @lgc.load.vertex.input__v3f32(i1 false, i32 0, i32 0, i32 0, i32 1, i32 16, i32 poison) %posx = extractelement <3 x float> %POSITION, i32 0 %posxi = fptoui float %posx to i32 @@ -193,13 +193,13 @@ entry: } ; Function Attrs: nounwind readonly willreturn -declare <3 x float> @lgc.create.read.generic.input.v3f32(...) #2 +declare <3 x float> @lgc.load.vertex.input__v3f32(...) #2 ; Function Attrs: nounwind declare void @lgc.create.write.builtin.output(...) #1 ; Function Attrs: nounwind readonly willreturn -declare <2 x float> @lgc.create.read.generic.input.v2f32(...) #2 +declare <2 x float> @lgc.load.vertex.input__v2f32(...) #2 ; Function Attrs: nounwind declare void @lgc.create.write.generic.output(...) #1 diff --git a/lgc/test/PatchInvalidImageDescriptor.lgc b/lgc/test/PatchInvalidImageDescriptor.lgc index e79b7bd696..562d1296f8 100644 --- a/lgc/test/PatchInvalidImageDescriptor.lgc +++ b/lgc/test/PatchInvalidImageDescriptor.lgc @@ -1,8 +1,8 @@ ; Test that invalid image descriptor patching is applied where required. -; RUN: lgc -mcpu=gfx1010 -print-after=lgc-patch-workarounds -o - - <%s 2>&1 | FileCheck --check-prefixes=CHECK,GFX1010 %s +; RUN: lgc -mcpu=gfx1010 -print-after=lgc-apply-workarounds -o - - <%s 2>&1 | FileCheck --check-prefixes=CHECK,GFX1010 %s -; CHECK-LABEL: IR Dump After Patch LLVM for workarounds +; CHECK-LABEL: IR Dump After Apply workarounds ; GFX1010: extractelement <8 x i32> %{{[0-9]+}}, i64 3 ; GFX1010: icmp sge i32 ; GFX1010-NEXT: and i32 diff --git a/lgc/test/PeepholeOptPhiWithIdenticalLoad.lgc b/lgc/test/PeepholeOptPhiWithIdenticalLoad.lgc index 8b87a4814f..d9a66b26e1 100644 --- a/lgc/test/PeepholeOptPhiWithIdenticalLoad.lgc +++ b/lgc/test/PeepholeOptPhiWithIdenticalLoad.lgc @@ -1,6 +1,6 @@ ; Test that PHI with incoming value that may read from memory should not be optimized. -; RUN: lgc -mcpu=gfx1010 -print-after=lgc-patch-peephole-opt -o - - <%s 2>&1 | FileCheck --check-prefixes=CHECK %s +; RUN: lgc -mcpu=gfx1010 -print-after=lgc-peephole-optimization -o - - <%s 2>&1 | FileCheck --check-prefixes=CHECK %s ; CHECK: [[LOAD:%[0-9a-z]*]] = load i32, ptr addrspace(3) @lds, align 16 ; CHECK: [[PHI:%[0-9a-z]*]] = phi i32 [ [[LOAD]], %.entry ], [ [[INC:%[0-9a-z]*]], %.block2 ] diff --git a/lgc/test/PhiWithArgument.lgc b/lgc/test/PhiWithArgument.lgc index f7faddbcf5..89a8b06cb8 100644 --- a/lgc/test/PhiWithArgument.lgc +++ b/lgc/test/PhiWithArgument.lgc @@ -8,7 +8,7 @@ target triple = "amdgcn--amdpal" define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !lgc.shaderstage !10 { .entry: %0 = call [76 x i8] addrspace(4)* (...) @lgc.create.load.push.constants.ptr.p4a76i8() - %1 = call <3 x float> (...) @lgc.create.read.generic.input.v3f32(i32 2, i32 0, i32 0, i32 0, i32 0, i32 undef) + %1 = call <3 x float> (...) @lgc.load.vertex.input__v3f32(i1 false, i32 2, i32 0, i32 0, i32 poison, i32 poison, i32 poison) %__llpc_input_proxy_.0.vec.extract = extractelement <3 x float> %1, i32 0 %2 = fcmp oeq float %__llpc_input_proxy_.0.vec.extract, 1.000000e+00 br i1 %2, label %3, label %7 @@ -29,7 +29,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !lgc declare [76 x i8] addrspace(4)* @lgc.create.load.push.constants.ptr.p4a76i8(...) local_unnamed_addr #0 ; Function Attrs: nounwind readonly -declare <3 x float> @lgc.create.read.generic.input.v3f32(...) local_unnamed_addr #1 +declare <3 x float> @lgc.load.vertex.input__v3f32(...) local_unnamed_addr #1 ; Function Attrs: nounwind declare void @lgc.create.write.generic.output(...) local_unnamed_addr #0 diff --git a/lgc/test/ScalarizeInputWithDynamicIndexUser.lgc b/lgc/test/ScalarizeInputWithDynamicIndexUser.lgc index 3800da232d..ce47085bb8 100644 --- a/lgc/test/ScalarizeInputWithDynamicIndexUser.lgc +++ b/lgc/test/ScalarizeInputWithDynamicIndexUser.lgc @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --function lgc.shader.FS.main ; Check that if the generic input has an extract instruction user whose index is dynamic, the input should be scalarized for each component. -; RUN: lgc -mcpu=gfx1010 -stop-after=lgc-patch-resource-collect %s -o=- | FileCheck %s +; RUN: lgc -mcpu=gfx1010 -stop-after=lgc-collect-resource-usage %s -o=- | FileCheck %s ; ModuleID = 'lgcPipeline' source_filename = "lgcPipeline" @@ -10,9 +10,9 @@ target triple = "amdgcn--amdpal" ; Function Attrs: nounwind define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !lgc.shaderstage !15 { .entry: - %0 = call <4 x float> (...) @lgc.create.read.generic.input__v4f32(i32 2, i32 0, i32 0, i32 0, i32 0, i32 poison) - %1 = call <4 x float> (...) @lgc.create.read.generic.input__v4f32(i32 1, i32 0, i32 0, i32 0, i32 0, i32 poison) - %2 = call <4 x float> (...) @lgc.create.read.generic.input__v4f32(i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) + %0 = call <4 x float> (...) @lgc.load.vertex.input__v4f32(i1 false, i32 2, i32 0, i32 0, i32 poison, i32 poison, i32 poison) + %1 = call <4 x float> (...) @lgc.load.vertex.input__v4f32(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 poison, i32 poison) + %2 = call <4 x float> (...) @lgc.load.vertex.input__v4f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 poison, i32 poison) call void (...) @lgc.create.write.generic.output(<4 x float> %2, i32 0, i32 0, i32 0, i32 0, i32 0, i32 undef) call void (...) @lgc.create.write.generic.output(<4 x float> %1, i32 1, i32 0, i32 0, i32 0, i32 0, i32 undef) call void (...) @lgc.create.write.generic.output(<4 x float> %0, i32 2, i32 0, i32 0, i32 0, i32 0, i32 undef) @@ -20,7 +20,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !lgc } ; Function Attrs: nounwind readonly willreturn -declare <4 x float> @lgc.create.read.generic.input__v4f32(...) local_unnamed_addr #1 +declare <4 x float> @lgc.load.vertex.input__v4f32(...) local_unnamed_addr #1 ; Function Attrs: nounwind declare void @lgc.create.write.generic.output(...) local_unnamed_addr #0 @@ -58,11 +58,15 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !lgc ; Function Attrs: nounwind readnone declare i32 @lgc.create.extract.bit.field__i32(...) local_unnamed_addr #3 +; Function Attrs: nounwind readonly willreturn +declare <4 x float> @lgc.create.read.generic.input__v4f32(...) local_unnamed_addr #5 + attributes #0 = { nounwind } attributes #1 = { nounwind readonly willreturn } attributes #2 = { argmemonly nofree nosync nounwind willreturn } attributes #3 = { nounwind readnone } attributes #4 = { nofree nosync nounwind readnone speculatable willreturn } +attributes #5 = { nounwind readonly willreturn } !llpc.shader.mode.VS = !{!0} !llpc.shader.mode.FS = !{!0} diff --git a/lgc/test/TaskShaderOps.lgc b/lgc/test/TaskShaderOps.lgc index 65b1862ae0..b660de8feb 100644 --- a/lgc/test/TaskShaderOps.lgc +++ b/lgc/test/TaskShaderOps.lgc @@ -42,8 +42,8 @@ ; CHECK-NEXT: [[newDescWord1:%[0-9]*]] = or {{(disjoint )?}}i32 [[newDescWord1Tmp]], [[newBaseAddrHi]] ; CHECK-NEXT: [[newPayloadRingDescTmp:%[0-9]*]] = insertelement <4 x i32> [[payloadRingDesc]], i32 [[newDescWord0]], i64 0 ; CHECK-NEXT: [[newPayloadRingDesc:%[0-9]*]] = insertelement <4 x i32> [[newPayloadRingDescTmp]], i32 [[newDescWord1]], i64 1 -; CHECK: %{{[0-9]*}} = call i32 @llvm.amdgcn.raw.atomic.buffer.load.i32(<4 x i32> [[newPayloadRingDesc]], i32 %{{.*}}, i32 0, i32 5) -; CHECK: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}}, <4 x i32> [[newPayloadRingDesc]], i32 %{{.*}}, i32 0, i32 1) +; CHECK: %{{[0-9]*}} = call i32 @llvm.amdgcn.raw.atomic.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[newPayloadRingDesc]], i32 %{{.*}}, i32 0, i32 5) +; CHECK: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> [[newPayloadRingDesc]], i32 %{{.*}}, i32 0, i32 1) ; CHECK: br i1 %{{[0-9]*}}, label %.emitMeshTasks, label %.endEmitMeshTasks ; ; CHECK: .emitMeshTasks: @@ -57,13 +57,13 @@ ; CHECK-NEXT: [[wrapMask:%[0-9]*]] = add nuw nsw i32 [[numEntries]], 268435455 ; CHECK-NEXT: [[wrappedEntryIndex:%[0-9]*]] = and i32 [[entryIndex]], [[wrapMask]] ; CHECK-NEXT: [[entryOffset:%[0-9]*]] = shl i32 [[wrappedEntryIndex]], 4 -; CHECK-NEXT: call void @llvm.amdgcn.raw.buffer.store.v3i32(<3 x i32> , <4 x i32> [[drawDataRingDesc]], i32 0, i32 [[entryOffset]], i32 0) +; CHECK-NEXT: call void @llvm.amdgcn.raw.buffer.store.v3i32{{(\.v4i32)?}}(<3 x i32> , <4 x i32> [[drawDataRingDesc]], i32 0, i32 [[entryOffset]], i32 0) ; CHECK: [[ringSize:%[0-9]*]] = extractelement <4 x i32> [[drawDataRingDesc]], i64 2 ; CHECK-NEXT: [[numEntries:%[0-9]*]] = lshr i32 [[ringSize]], 4 ; CHECK-NEXT: [[checkReadyBit:%[0-9]*]] = and i32 [[entryIndex]], [[numEntries]] ; CHECK-NEXT: [[readyBit:%[0-9]*]] = icmp ne i32 [[checkReadyBit]], 0 ; CHECK-NEXT: [[readyBit8:%[0-9]*]] = zext i1 [[readyBit]] to i8 -; CHECK-NEXT: call void @llvm.amdgcn.raw.buffer.store.i8(i8 [[readyBit8]], <4 x i32> [[drawDataRingDesc]], i32 12, i32 [[entryOffset]], i32 0) +; CHECK-NEXT: call void @llvm.amdgcn.raw.buffer.store.i8{{(\.v4i32)?}}(i8 [[readyBit8]], <4 x i32> [[drawDataRingDesc]], i32 12, i32 [[entryOffset]], i32 0) ; CHECK-NEXT: br label %.endEmitMeshTasks ; ; CHECK: .endEmitMeshTasks: diff --git a/lgc/test/TestWaterfallLoopForStruct.lgc b/lgc/test/TestWaterfallLoopForStruct.lgc index d4e8f34c44..809e54e68a 100644 --- a/lgc/test/TestWaterfallLoopForStruct.lgc +++ b/lgc/test/TestWaterfallLoopForStruct.lgc @@ -8,7 +8,7 @@ target triple = "amdgcn--amdpal" ; Function Attrs: nounwind define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spirv.ExecutionModel !11 !lgc.shaderstage !1 { .entry: - %0 = call i32 (...) @lgc.create.read.generic.input__i32(i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) + %0 = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) %1 = call ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) %2 = call i32 (...) @lgc.create.get.desc.stride__i32(i32 1, i32 1, i64 0, i32 0) %3 = insertvalue { ptr addrspace(4), i32, i32, i32 } poison, i32 %2, 1 @@ -42,7 +42,7 @@ declare spir_func void @spirv.NonUniform.a3v8i32([3 x <8 x i32>]) local_unnamed_ declare { <4 x float>, i32 } @"lgc.create.image.load.s[v4f32,i32]"(...) local_unnamed_addr #2 ; Function Attrs: nounwind willreturn memory(read) -declare i32 @lgc.create.read.generic.input__i32(...) local_unnamed_addr #2 +declare i32 @lgc.load.vertex.input__i32(...) local_unnamed_addr #2 ; Function Attrs: nounwind declare void @lgc.create.write.generic.output(...) local_unnamed_addr #0 @@ -77,7 +77,7 @@ attributes #2 = { nounwind willreturn memory(read) } ; CHECK-NEXT: .entry: ; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() ; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> -; CHECK-NEXT: [[TMP2:%.*]] = call i32 @lgc.input.import.generic__i32(i1 false, i32 0, i32 0, i32 0, i32 poison) +; CHECK-NEXT: [[TMP2:%.*]] = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) ; CHECK-NEXT: [[TMP3:%.*]] = call i32 @lgc.load.user.data__i32(i32 0) ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 diff --git a/lgc/test/Transforms/CombineCooperativeMatrix/packed-accumulators.lgc b/lgc/test/Transforms/CombineCooperativeMatrix/packed-accumulators.lgc index 29fa46b2bb..b37fc39acb 100644 --- a/lgc/test/Transforms/CombineCooperativeMatrix/packed-accumulators.lgc +++ b/lgc/test/Transforms/CombineCooperativeMatrix/packed-accumulators.lgc @@ -362,7 +362,7 @@ define void @matmul_f16_pack_scalar_same(ptr %out0, ptr %out1, <8 x float> %a, < ; GFX11-NEXT: [[TMP0:%.*]] = call <8 x float> (...) @lgc.cooperative.matrix.pack__v8f32(<8 x float> [[C0]], <8 x float> [[C1]]) ; GFX11-NEXT: [[MULADDLO:%.*]] = call <8 x float> (...) @lgc.cooperative.matrix.muladd__v8f32(<8 x float> [[A]], <8 x float> [[B]], <8 x float> [[TMP0]], i1 true, i1 true, i1 false, i1 true, i32 1, i32 1, i32 1) ; GFX11-NEXT: [[MULADDHI:%.*]] = call <8 x float> (...) @lgc.cooperative.matrix.muladd__v8f32(<8 x float> [[A]], <8 x float> [[B]], <8 x float> [[MULADDLO]], i1 true, i1 true, i1 true, i1 true, i32 1, i32 1, i32 1) -; GFX11-NEXT: [[TMP1:%.*]] = call <8 x float> (...) @lgc.cooperative.matrix.times.scalar__v8f32(<8 x float> [[MULADDHI]], <2 x half> , i32 6, i32 1) +; GFX11-NEXT: [[TMP1:%.*]] = call <8 x float> (...) @lgc.cooperative.matrix.times.scalar__v8f32(<8 x float> [[MULADDHI]], <2 x half> {{(splat \(half 0xH310F\))|()}}, i32 6, i32 1) ; GFX11-NEXT: [[TMP2:%.*]] = call <8 x float> (...) @lgc.cooperative.matrix.unpack__v8f32(<8 x float> [[TMP1]], i1 false) ; GFX11-NEXT: call void (...) @lgc.cooperative.matrix.store(ptr [[OUT0]], i32 4, i1 true, i32 1, i32 0, i32 0, i32 16, <8 x float> [[TMP2]]) ; GFX11-NEXT: [[TMP3:%.*]] = call <8 x float> (...) @lgc.cooperative.matrix.unpack__v8f32(<8 x float> [[TMP1]], i1 true) diff --git a/lgc/test/Transforms/Continufy/simple.lgc b/lgc/test/Transforms/Continufy/simple.lgc index 31e0f40330..35d1dc7cf3 100644 --- a/lgc/test/Transforms/Continufy/simple.lgc +++ b/lgc/test/Transforms/Continufy/simple.lgc @@ -36,7 +36,7 @@ define spir_func i32 @chs(i32 %x) !lgc.shaderstage !{i32 7} !continufy.stage !{i ; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[FN]] to i32 ; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], 2 ; CHECK-NEXT: [[TMP3:%.*]] = call i32 (...) @lgc.cps.await__i32(i32 [[TMP2]], i32 4, i32 poison, i32 [[X]]), !continuation.returnedRegistercount [[META3]] -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, i32 [[TMP3]]) +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR]], i32 8, i32 poison, i32 poison, i32 poison, i32 [[TMP3]]) ; CHECK-NEXT: unreachable ; %pushconst = call ptr addrspace(4) @lgc.user.data(i32 24) diff --git a/lgc/test/Transforms/CpsLowering/continuation-basic.lgc b/lgc/test/Transforms/CpsLowering/continuation-basic.lgc index d5d9442fe1..8c56b0d423 100644 --- a/lgc/test/Transforms/CpsLowering/continuation-basic.lgc +++ b/lgc/test/Transforms/CpsLowering/continuation-basic.lgc @@ -1,107 +1,117 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --function-signature ; RUN: lgc -mcpu=gfx1030 -o - -passes="require,lgc-mutate-entry-point" %s | FileCheck --check-prefixes=CHECK %s -declare void @lgc.cps.jump(i32 %target, i32 %levels, {i32} %state, ...) noreturn +declare void @lgc.cps.jump(...) #0 -define void @test({i32} %state, i32 %arg, ptr %table) !lgc.cps !0 !lgc.shaderstage !{i32 7} { +define void @test(i32 %cspInit, i32 %arg, ptr %table, i32 %rcr) !lgc.cps !1 !lgc.shaderstage !2 !continuation !3 !continuation.state !4 { ; CHECK-LABEL: define {{[^@]+}}@test -; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP:%.*]], i32 [[ARG:%.*]], ptr [[TABLE:%.*]]) #[[ATTR1:[0-9]+]] align 64 !lgc.cps [[META2:![0-9]+]] !lgc.shaderstage [[META3:![0-9]+]] { +; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[CSPINIT:%.*]], i32 [[ARG:%.*]], ptr [[TABLE:%.*]], i32 [[RCR:%.*]]) #[[ATTR1:[0-9]+]] align 64 !lgc.cps [[META3:![0-9]+]] !lgc.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.state [[META6:![0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[TMP1]] to <2 x i32> -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[TMP6]] to <2 x i32> -; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr addrspace(5) [[VSP]], i32 -4 -; CHECK-NEXT: [[CPS_STATE:%.*]] = load { i32 }, ptr addrspace(5) [[TMP8]], align 4, !amdgpu.last.use [[META4:![0-9]+]] -; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr addrspace(5) [[TMP8]] to i32 -; CHECK-NEXT: store i32 [[TMP9]], ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[V:%.*]] = extractvalue { i32 } [[CPS_STATE]], 0 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 ; CHECK-NEXT: [[TABLE_0:%.*]] = getelementptr i32, ptr [[TABLE]], i32 0 ; CHECK-NEXT: [[CR_THEN:%.*]] = load i32, ptr [[TABLE_0]], align 4 ; CHECK-NEXT: [[THEN_ARG:%.*]] = add i32 [[ARG]], 1 -; CHECK-NEXT: [[V_THEN:%.*]] = mul i32 [[V]], 2 -; CHECK-NEXT: [[STATE_THEN:%.*]] = insertvalue { i32 } poison, i32 [[V_THEN]], 0 -; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(5) -; CHECK-NEXT: store { i32 } [[STATE_THEN]], ptr addrspace(5) [[TMP11]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP11]], i32 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP14:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP13]], i32 [[CR_THEN]], 1 -; CHECK-NEXT: [[TMP15:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP14]], ptr addrspace(5) [[TMP12]], 2 -; CHECK-NEXT: [[TMP16:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP15]], i32 [[THEN_ARG]], 3 -; CHECK-NEXT: [[TMP17:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP16]], 1 -; CHECK-NEXT: [[TMP18:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP17]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP19:%.*]] = and i32 [[TMP18]], 7 +; CHECK-NEXT: [[TMP8:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP9:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP8]], i32 [[CR_THEN]], 1 +; CHECK-NEXT: [[TMP10:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP9]], i32 [[TMP7]], 2 +; CHECK-NEXT: [[TMP11:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP10]], i32 [[RCR]], 3 +; CHECK-NEXT: [[TMP12:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP11]], i32 [[THEN_ARG]], 4 +; CHECK-NEXT: [[TMP13:%.*]] = extractvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP12]], 1 +; CHECK-NEXT: [[TMP14:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP13]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP15:%.*]] = and i32 [[TMP14]], 7 +; CHECK-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 +; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP16]]) +; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP15]], 3 +; CHECK-NEXT: [[TMP19:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP18]]) ; CHECK-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0 -; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP20]]) -; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i32 [[TMP19]], 3 +; CHECK-NEXT: [[TMP21:%.*]] = select i1 [[TMP20]], i32 [[TMP19]], i32 [[TMP17]] +; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i32 [[TMP15]], 2 ; CHECK-NEXT: [[TMP23:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP22]]) ; CHECK-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 ; CHECK-NEXT: [[TMP25:%.*]] = select i1 [[TMP24]], i32 [[TMP23]], i32 [[TMP21]] -; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i32 [[TMP19]], 2 +; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i32 [[TMP15]], 1 ; CHECK-NEXT: [[TMP27:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP26]]) ; CHECK-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 ; CHECK-NEXT: [[TMP29:%.*]] = select i1 [[TMP28]], i32 [[TMP27]], i32 [[TMP25]] -; CHECK-NEXT: [[TMP30:%.*]] = icmp eq i32 [[TMP19]], 1 -; CHECK-NEXT: [[TMP31:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP30]]) -; CHECK-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 -; CHECK-NEXT: [[TMP33:%.*]] = select i1 [[TMP32]], i32 [[TMP31]], i32 [[TMP29]] -; CHECK-NEXT: [[TMP34:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP33]], i1 true) -; CHECK-NEXT: [[TMP35:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP18]], i32 [[TMP34]]) -; CHECK-NEXT: [[TMP36:%.*]] = icmp eq i32 [[TMP18]], [[TMP35]] -; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP36]]) -; CHECK-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP35]]) -; CHECK-NEXT: [[TMP39:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP37]]) -; CHECK-NEXT: [[TMP40:%.*]] = and i32 [[TMP38]], -64 -; CHECK-NEXT: [[TMP41:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP40]], i64 0 -; CHECK-NEXT: [[TMP42:%.*]] = bitcast <2 x i32> [[TMP41]] to i64 -; CHECK-NEXT: [[TMP43:%.*]] = inttoptr i64 [[TMP42]] to ptr -; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP45:%.*]] = bitcast i64 [[TMP44]] to <2 x i32> -; CHECK-NEXT: [[TMP46:%.*]] = extractelement <2 x i32> [[TMP45]], i64 0 -; CHECK-NEXT: [[TMP47:%.*]] = extractelement <2 x i32> [[TMP45]], i64 1 -; CHECK-NEXT: [[TMP48:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP49:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP50:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP51:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP52:%.*]] = insertelement <20 x i32> [[TMP51]], i32 [[TMP46]], i64 1 -; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> [[TMP52]], i32 [[TMP47]], i64 2 -; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[PAD0]], i64 3 -; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> [[TMP54]], i32 [[PAD1]], i64 4 -; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[PAD2]], i64 5 -; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[PAD3]], i64 6 -; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[TMP48]], i64 16 -; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[TMP49]], i64 17 -; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[TMP50]], i64 18 -; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5), i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5i32s(ptr inreg [[TMP43]], i32 inreg [[TMP39]], <20 x i32> inreg [[TMP70]], { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP16]], i32 0) +; CHECK-NEXT: [[TMP30:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP29]], i1 true) +; CHECK-NEXT: [[TMP31:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP14]], i32 [[TMP30]]) +; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i32 [[TMP14]], [[TMP31]] +; CHECK-NEXT: [[TMP33:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP32]]) +; CHECK-NEXT: [[TMP34:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP31]]) +; CHECK-NEXT: [[TMP35:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP33]]) +; CHECK-NEXT: [[TMP36:%.*]] = and i32 [[TMP34]], -64 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP36]], i64 0 +; CHECK-NEXT: [[TMP38:%.*]] = bitcast <2 x i32> [[TMP37]] to i64 +; CHECK-NEXT: [[TMP39:%.*]] = inttoptr i64 [[TMP38]] to ptr +; CHECK-NEXT: [[TMP40:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP41:%.*]] = bitcast i64 [[TMP40]] to <2 x i32> +; CHECK-NEXT: [[TMP42:%.*]] = extractelement <2 x i32> [[TMP41]], i64 0 +; CHECK-NEXT: [[TMP43:%.*]] = extractelement <2 x i32> [[TMP41]], i64 1 +; CHECK-NEXT: [[TMP44:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP45:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP46:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP47:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP48:%.*]] = insertelement <20 x i32> [[TMP47]], i32 [[TMP42]], i64 1 +; CHECK-NEXT: [[TMP49:%.*]] = insertelement <20 x i32> [[TMP48]], i32 [[TMP43]], i64 2 +; CHECK-NEXT: [[TMP50:%.*]] = insertelement <20 x i32> [[TMP49]], i32 [[PAD0]], i64 3 +; CHECK-NEXT: [[TMP51:%.*]] = insertelement <20 x i32> [[TMP50]], i32 [[PAD1]], i64 4 +; CHECK-NEXT: [[TMP52:%.*]] = insertelement <20 x i32> [[TMP51]], i32 [[PAD2]], i64 5 +; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> [[TMP52]], i32 [[PAD3]], i64 6 +; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[PAD4]], i64 7 +; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> [[TMP54]], i32 [[PAD5]], i64 8 +; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[TMP44]], i64 16 +; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[TMP45]], i64 17 +; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[TMP46]], i64 18 +; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32i32i32s(ptr inreg [[TMP39]], i32 inreg [[TMP35]], <20 x i32> inreg [[TMP66]], { <3 x i32>, i32, i32, i32, i32 } [[TMP12]], i32 0) ; CHECK-NEXT: unreachable ; entry: - %v = extractvalue {i32} %state, 0 + %csp = alloca i32, align 4 + store i32 %cspInit, ptr %csp, align 4 %table.0 = getelementptr i32, ptr %table, i32 0 - %cr.then = load i32, ptr %table.0 + %cr.then = load i32, ptr %table.0, align 4 %then.arg = add i32 %arg, 1 - %v.then = mul i32 %v, 2 - %state.then = insertvalue {i32} poison, i32 %v.then, 0 - call void (i32, i32, { i32 }, ...) @lgc.cps.jump(i32 %cr.then, i32 2, {i32} %state.then, i32 poison, i32 %then.arg) + %0 = load i32, ptr %csp, align 4 + call void (...) @lgc.cps.jump(i32 %cr.then, i32 2, i32 %0, i32 %rcr, i32 %then.arg) unreachable } -!0 = !{i32 1} ; level 1 -; +declare !continuation !3 { ptr, ptr } @continuation.prototype.test(ptr, i1) + +declare ptr @continuation.malloc(i32) + +declare void @continuation.free(ptr) + +declare token @llvm.coro.id.retcon(i32, i32, ptr, ptr, ptr, ptr) #1 + +declare ptr @llvm.coro.begin(token, ptr writeonly) #1 + +attributes #0 = { noreturn } +attributes #1 = { nounwind } + +!continuation.stackAddrspace = !{!0} + +!0 = !{i32 5} +!1 = !{i32 1} +!2 = !{i32 7} +!3 = !{ptr @test} +!4 = !{i32 0} diff --git a/lgc/test/Transforms/CpsLowering/cps-entry-point.lgc b/lgc/test/Transforms/CpsLowering/cps-entry-point.lgc index 9e6f8bd5c9..81b3d94c7c 100644 --- a/lgc/test/Transforms/CpsLowering/cps-entry-point.lgc +++ b/lgc/test/Transforms/CpsLowering/cps-entry-point.lgc @@ -1,126 +1,117 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --function-signature ; RUN: lgc -mcpu=gfx1030 -o - -passes="require,lgc-mutate-entry-point" %s | FileCheck --check-prefixes=CHECK %s -declare void @lgc.cps.jump(i32, i32, { i32 }, ...) #0 +declare void @lgc.cps.jump(...) #0 declare void @lgc.cps.set.vsp(ptr addrspace(32)) #1 declare ptr addrspace(32) @lgc.cps.get.vsp() #2 -define dllexport spir_func void @lgc.shader.CS.main() local_unnamed_addr #0 !lgc.shaderstage !3 { +define dllexport spir_func void @lgc.shader.CS.main() local_unnamed_addr #0 !lgc.shaderstage !3 !lgc.rt.shaderstage !3 { ; CHECK-LABEL: define {{[^@]+}}@lgc.shader.CS.main -; CHECK-SAME: (i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[PAD4:%.*]], i32 inreg noundef [[PAD5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], <3 x i32> noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR3:[0-9]+]] !lgc.shaderstage [[META4:![0-9]+]] { +; CHECK-SAME: (i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[PAD4:%.*]], i32 inreg noundef [[PAD5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], <3 x i32> noundef [[LOCALINVOCATIONID:%.*]]) +; CHECK-SAME: #[[ATTR3:[0-9]+]] !lgc.shaderstage [[META5:![0-9]+]] !lgc.rt.shaderstage [[META5]] { ; CHECK-NEXT: .entry: -; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[TMP1]] to <2 x i32> -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[TMP6]] to <2 x i32> -; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> poison, i32 [[USERDATA0]], i64 0 -; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[USERDATA1]], i64 1 -; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[USERDATA2]], i64 2 -; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP10]], i32 [[USERDATA3]], i64 3 -; CHECK-NEXT: [[PTR:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP11]]) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[USERDATA0]], i64 0 +; CHECK-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[USERDATA1]], i64 1 +; CHECK-NEXT: [[TMP9:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[USERDATA2]], i64 2 +; CHECK-NEXT: [[TMP10:%.*]] = insertelement <4 x i32> [[TMP9]], i32 [[USERDATA3]], i64 3 +; CHECK-NEXT: [[PTR:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP10]]) ; CHECK-NEXT: [[P0:%.*]] = getelementptr i32, ptr addrspace(7) [[PTR]], i32 0 ; CHECK-NEXT: [[I_VSP:%.*]] = load i32, ptr addrspace(7) [[P0]], align 4 -; CHECK-NEXT: store i32 [[I_VSP]], ptr addrspace(5) [[TMP0]], align 4 +; CHECK-NEXT: store i32 [[I_VSP]], ptr [[CSP]], align 4 ; CHECK-NEXT: [[P1:%.*]] = getelementptr i32, ptr addrspace(7) [[PTR]], i32 1 ; CHECK-NEXT: [[CR:%.*]] = load i32, ptr addrspace(7) [[P1]], align 4 ; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, ptr addrspace(7) [[PTR]], i32 2 ; CHECK-NEXT: [[ARG:%.*]] = load i32, ptr addrspace(7) [[P2]], align 4 -; CHECK-NEXT: [[STATE:%.*]] = insertvalue { i32 } poison, i32 [[ARG]], 0 -; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP13]] to ptr addrspace(5) -; CHECK-NEXT: store { i32 } [[STATE]], ptr addrspace(5) [[TMP14]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP14]], i32 4 +; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP16:%.*]] = insertvalue { i32, ptr addrspace(5), i32, i32 } poison, i32 [[CR]], 0 -; CHECK-NEXT: [[TMP17:%.*]] = insertvalue { i32, ptr addrspace(5), i32, i32 } [[TMP16]], ptr addrspace(5) [[TMP15]], 1 -; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { i32, ptr addrspace(5), i32, i32 } [[TMP17]], i32 [[ARG]], 2 -; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { i32, ptr addrspace(5), i32, i32 } [[TMP18]], i32 [[TMP12]], 3 -; CHECK-NEXT: [[TMP20:%.*]] = extractvalue { i32, ptr addrspace(5), i32, i32 } [[TMP19]], 0 -; CHECK-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0 -; CHECK-NEXT: [[TMP22:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP21]]) -; CHECK-NEXT: [[TMP23:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP22]], i1 true) -; CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP20]], i32 [[TMP23]]) -; CHECK-NEXT: [[TMP25:%.*]] = icmp eq i32 [[TMP20]], [[TMP24]] -; CHECK-NEXT: [[TMP26:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP25]]) -; CHECK-NEXT: [[TMP27:%.*]] = and i32 [[TMP24]], -64 -; CHECK-NEXT: [[TMP28:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP27]], i64 0 -; CHECK-NEXT: [[TMP29:%.*]] = bitcast <2 x i32> [[TMP28]] to i64 -; CHECK-NEXT: [[TMP30:%.*]] = inttoptr i64 [[TMP29]] to ptr -; CHECK-NEXT: [[TMP31:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP32:%.*]] = bitcast i64 [[TMP31]] to <2 x i32> -; CHECK-NEXT: [[TMP33:%.*]] = extractelement <2 x i32> [[TMP32]], i64 0 -; CHECK-NEXT: [[TMP34:%.*]] = extractelement <2 x i32> [[TMP32]], i64 1 -; CHECK-NEXT: [[TMP35:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP36:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP37:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP38:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP39:%.*]] = insertelement <20 x i32> [[TMP38]], i32 [[TMP33]], i64 1 -; CHECK-NEXT: [[TMP40:%.*]] = insertelement <20 x i32> [[TMP39]], i32 [[TMP34]], i64 2 -; CHECK-NEXT: [[TMP41:%.*]] = insertelement <20 x i32> [[TMP40]], i32 [[USERDATA0]], i64 3 -; CHECK-NEXT: [[TMP42:%.*]] = insertelement <20 x i32> [[TMP41]], i32 [[USERDATA1]], i64 4 -; CHECK-NEXT: [[TMP43:%.*]] = insertelement <20 x i32> [[TMP42]], i32 [[USERDATA2]], i64 5 -; CHECK-NEXT: [[TMP44:%.*]] = insertelement <20 x i32> [[TMP43]], i32 [[USERDATA3]], i64 6 -; CHECK-NEXT: [[TMP45:%.*]] = insertelement <20 x i32> [[TMP44]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP46:%.*]] = insertelement <20 x i32> [[TMP45]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP47:%.*]] = insertelement <20 x i32> [[TMP46]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP48:%.*]] = insertelement <20 x i32> [[TMP47]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP49:%.*]] = insertelement <20 x i32> [[TMP48]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP50:%.*]] = insertelement <20 x i32> [[TMP49]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP51:%.*]] = insertelement <20 x i32> [[TMP50]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP52:%.*]] = insertelement <20 x i32> [[TMP51]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> [[TMP52]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[TMP35]], i64 16 -; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> [[TMP54]], i32 [[TMP36]], i64 17 -; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[TMP37]], i64 18 -; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { i32, ptr addrspace(5), i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_i32p5i32i32s(ptr inreg [[TMP30]], i32 inreg [[TMP26]], <20 x i32> inreg [[TMP57]], { i32, ptr addrspace(5), i32, i32 } [[TMP19]], i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = insertvalue { i32, i32, i32, i32, i32 } poison, i32 [[CR]], 0 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { i32, i32, i32, i32, i32 } [[TMP12]], i32 [[TMP11]], 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertvalue { i32, i32, i32, i32, i32 } [[TMP13]], i32 poison, 2 +; CHECK-NEXT: [[TMP15:%.*]] = insertvalue { i32, i32, i32, i32, i32 } [[TMP14]], i32 [[ARG]], 3 +; CHECK-NEXT: [[TMP16:%.*]] = insertvalue { i32, i32, i32, i32, i32 } [[TMP15]], i32 [[TMP11]], 4 +; CHECK-NEXT: [[TMP17:%.*]] = extractvalue { i32, i32, i32, i32, i32 } [[TMP16]], 0 +; CHECK-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0 +; CHECK-NEXT: [[TMP19:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP18]]) +; CHECK-NEXT: [[TMP20:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP19]], i1 true) +; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP17]], i32 [[TMP20]]) +; CHECK-NEXT: [[TMP22:%.*]] = icmp eq i32 [[TMP17]], [[TMP21]] +; CHECK-NEXT: [[TMP23:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP22]]) +; CHECK-NEXT: [[TMP24:%.*]] = and i32 [[TMP21]], -64 +; CHECK-NEXT: [[TMP25:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP24]], i64 0 +; CHECK-NEXT: [[TMP26:%.*]] = bitcast <2 x i32> [[TMP25]] to i64 +; CHECK-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP26]] to ptr +; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP29:%.*]] = bitcast i64 [[TMP28]] to <2 x i32> +; CHECK-NEXT: [[TMP30:%.*]] = extractelement <2 x i32> [[TMP29]], i64 0 +; CHECK-NEXT: [[TMP31:%.*]] = extractelement <2 x i32> [[TMP29]], i64 1 +; CHECK-NEXT: [[TMP32:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP33:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP34:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP35:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP36:%.*]] = insertelement <20 x i32> [[TMP35]], i32 [[TMP30]], i64 1 +; CHECK-NEXT: [[TMP37:%.*]] = insertelement <20 x i32> [[TMP36]], i32 [[TMP31]], i64 2 +; CHECK-NEXT: [[TMP38:%.*]] = insertelement <20 x i32> [[TMP37]], i32 [[USERDATA0]], i64 3 +; CHECK-NEXT: [[TMP39:%.*]] = insertelement <20 x i32> [[TMP38]], i32 [[USERDATA1]], i64 4 +; CHECK-NEXT: [[TMP40:%.*]] = insertelement <20 x i32> [[TMP39]], i32 [[USERDATA2]], i64 5 +; CHECK-NEXT: [[TMP41:%.*]] = insertelement <20 x i32> [[TMP40]], i32 [[USERDATA3]], i64 6 +; CHECK-NEXT: [[TMP42:%.*]] = insertelement <20 x i32> [[TMP41]], i32 [[PAD4]], i64 7 +; CHECK-NEXT: [[TMP43:%.*]] = insertelement <20 x i32> [[TMP42]], i32 [[PAD5]], i64 8 +; CHECK-NEXT: [[TMP44:%.*]] = insertelement <20 x i32> [[TMP43]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP45:%.*]] = insertelement <20 x i32> [[TMP44]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP46:%.*]] = insertelement <20 x i32> [[TMP45]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP47:%.*]] = insertelement <20 x i32> [[TMP46]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP48:%.*]] = insertelement <20 x i32> [[TMP47]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP49:%.*]] = insertelement <20 x i32> [[TMP48]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP50:%.*]] = insertelement <20 x i32> [[TMP49]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP51:%.*]] = insertelement <20 x i32> [[TMP50]], i32 [[TMP32]], i64 16 +; CHECK-NEXT: [[TMP52:%.*]] = insertelement <20 x i32> [[TMP51]], i32 [[TMP33]], i64 17 +; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> [[TMP52]], i32 [[TMP34]], i64 18 +; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { i32, i32, i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_i32i32i32i32i32s(ptr inreg [[TMP27]], i32 inreg [[TMP23]], <20 x i32> inreg [[TMP54]], { i32, i32, i32, i32, i32 } [[TMP16]], i32 0) ; CHECK-NEXT: unreachable ; .entry: + %csp = alloca i32, align 4 %desc = call <4 x i32> @lgc.load.user.data__v4i32(i32 0) %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) %p0 = getelementptr i32, ptr addrspace(7) %ptr, i32 0 %i_vsp = load i32, ptr addrspace(7) %p0, align 4 - %vsp = inttoptr i32 %i_vsp to ptr addrspace(32) - call void @lgc.cps.set.vsp(ptr addrspace(32) %vsp) - + store i32 %i_vsp, ptr %csp, align 4 %p1 = getelementptr i32, ptr addrspace(7) %ptr, i32 1 %cr = load i32, ptr addrspace(7) %p1, align 4 - %p2 = getelementptr i32, ptr addrspace(7) %ptr, i32 2 %arg = load i32, ptr addrspace(7) %p2, align 4 - - %state = insertvalue { i32 } poison, i32 %arg, 0 - - %p32 = call ptr addrspace(32) @lgc.cps.get.vsp() - - call void (i32, i32, { i32 }, ...) @lgc.cps.jump(i32 %cr, i32 1, {i32} %state, i32 poison, i32 %arg, ptr addrspace(32) %p32) + %0 = load i32, ptr %csp, align 4 + call void (...) @lgc.cps.jump(i32 %cr, i32 1, i32 %0, i32 poison, i32 %arg, i32 %0) unreachable } -declare <4 x i32> @lgc.load.user.data__v4i32(i32) #4 +declare <4 x i32> @lgc.load.user.data__v4i32(i32) #3 -declare ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32>) #5 +declare ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32>) #4 attributes #0 = { nounwind } attributes #1 = { nounwind willreturn memory(inaccessiblemem: write) } attributes #2 = { nounwind willreturn memory(inaccessiblemem: read) } -attributes #4 = { nounwind memory(none) } -attributes #5 = { nounwind willreturn memory(none) } +attributes #3 = { nounwind memory(none) } +attributes #4 = { nounwind willreturn memory(none) } -!lgc.user.data.nodes = !{!1} -!llpc.compute.mode = !{!2} +!lgc.user.data.nodes = !{!0} +!llpc.compute.mode = !{!1} +!continuation.stackAddrspace = !{!2} -!1 = !{!"DescriptorBuffer", i32 6, i32 6, i32 0, i32 4, i64 0, i32 0, i32 4} -!2 = !{i32 8, i32 4, i32 1, i32 0, i32 0, i32 1} +!0 = !{!"DescriptorBuffer", i32 6, i32 6, i32 0, i32 4, i64 0, i32 0, i32 4} +!1 = !{i32 8, i32 4, i32 1, i32 0, i32 0, i32 1} +!2 = !{i32 5} !3 = !{i32 7} - -; diff --git a/lgc/test/Transforms/CpsLowering/cps-from-continufy.lgc b/lgc/test/Transforms/CpsLowering/cps-from-continufy.lgc index 833e7518cf..22085927e9 100644 --- a/lgc/test/Transforms/CpsLowering/cps-from-continufy.lgc +++ b/lgc/test/Transforms/CpsLowering/cps-from-continufy.lgc @@ -1,362 +1,384 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --version 4 ; RUN: lgc -mcpu=gfx1030 -o - -passes="require,lgc-mutate-entry-point" %s | FileCheck --check-prefixes=CHECK %s -%_rgen_1.Frame = type { ptr addrspace(7), ptr addrspace(7), i32 } - -; Function Attrs: alwaysinline nounwind -define spir_func void @_rgen_1({} %state, i32 %rcr) #0 !spirv.ExecutionModel !15 !lgc.shaderstage !16 !continuation !18 !lgc.cps !17 { +define spir_func void @_rgen_1(i32 %cspInit, i32 %rcr) #0 !spirv.ExecutionModel !16 !lgc.shaderstage !17 !continuation !18 !lgc.cps !19 !continuation.state !20 { ; CHECK-LABEL: define amdgpu_cs_chain void @_rgen_1( -; CHECK-SAME: i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[USERDATA0:%.*]], i32 inreg [[USERDATA1:%.*]], i32 inreg [[USERDATA2:%.*]], i32 inreg [[USERDATA3:%.*]], i32 inreg [[USERDATA4:%.*]], i32 inreg [[USERDATA5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP:%.*]], i32 [[RCR:%.*]]) #[[ATTR0:[0-9]+]] align 64 !spirv.ExecutionModel [[META15:![0-9]+]] !lgc.shaderstage [[META16:![0-9]+]] !continuation [[META17:![0-9]+]] !lgc.cps [[META18:![0-9]+]] { +; CHECK-SAME: i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[USERDATA0:%.*]], i32 inreg [[USERDATA1:%.*]], i32 inreg [[USERDATA2:%.*]], i32 inreg [[USERDATA3:%.*]], i32 inreg [[USERDATA4:%.*]], i32 inreg [[USERDATA5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[CSPINIT:%.*]], i32 [[RCR:%.*]]) #[[ATTR0:[0-9]+]] align 64 !spirv.ExecutionModel [[META16:![0-9]+]] !lgc.shaderstage [[META17:![0-9]+]] !continuation [[META18:![0-9]+]] !lgc.cps [[META19:![0-9]+]] !continuation.state [[META20:![0-9]+]] { ; CHECK-NEXT: .entry: -; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[TMP1]] to <2 x i32> -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[TMP6]] to <2 x i32> -; CHECK-NEXT: [[TMP8:%.*]] = ptrtoint ptr addrspace(5) [[VSP]] to i32 -; CHECK-NEXT: store i32 [[TMP8]], ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], 96 -; CHECK-NEXT: store i32 [[TMP10]], ptr addrspace(5) [[TMP0]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], 96 +; CHECK-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP10:%.*]] = bitcast i64 [[TMP9]] to <2 x i32> ; CHECK-NEXT: [[TMP11:%.*]] = call i64 @llvm.amdgcn.s.getpc() ; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[TMP11]] to <2 x i32> ; CHECK-NEXT: [[TMP13:%.*]] = call i64 @llvm.amdgcn.s.getpc() ; CHECK-NEXT: [[TMP14:%.*]] = bitcast i64 [[TMP13]] to <2 x i32> -; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP16:%.*]] = bitcast i64 [[TMP15]] to <2 x i32> -; CHECK-NEXT: [[TMP17:%.*]] = insertelement <2 x i32> [[TMP16]], i32 [[USERDATA5]], i64 0 -; CHECK-NEXT: [[TMP18:%.*]] = bitcast <2 x i32> [[TMP17]] to i64 -; CHECK-NEXT: [[TMP19:%.*]] = inttoptr i64 [[TMP18]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP19]], i32 0 -; CHECK-NEXT: [[TMP21:%.*]] = load <2 x i32>, ptr addrspace(4) [[TMP20]], align 8 -; CHECK-NEXT: [[TMP22:%.*]] = extractelement <2 x i32> [[TMP21]], i64 0 -; CHECK-NEXT: [[TMP23:%.*]] = extractelement <2 x i32> [[TMP21]], i64 1 -; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> poison, i32 [[TMP22]], i64 0 -; CHECK-NEXT: [[TMP25:%.*]] = and i32 [[TMP23]], 65535 -; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> [[TMP24]], i32 [[TMP25]], i64 1 -; CHECK-NEXT: [[TMP27:%.*]] = insertelement <4 x i32> [[TMP26]], i32 -1, i64 2 -; CHECK-NEXT: [[TMP28:%.*]] = insertelement <4 x i32> [[TMP27]], i32 553734060, i64 3 -; CHECK-NEXT: [[TMP29:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP28]]) -; CHECK-NEXT: [[TMP30:%.*]] = insertelement <2 x i32> [[TMP14]], i32 [[USERDATA0]], i64 0 -; CHECK-NEXT: [[TMP31:%.*]] = bitcast <2 x i32> [[TMP30]] to i64 -; CHECK-NEXT: [[TMP32:%.*]] = inttoptr i64 [[TMP31]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP32]], i32 32 -; CHECK-NEXT: [[TMP34:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP33]], align 16 -; CHECK-NEXT: [[TMP35:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP34]]) -; CHECK-NEXT: [[TMP36:%.*]] = inttoptr i32 [[TMP9]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP36]], i32 0 -; CHECK-NEXT: store ptr addrspace(7) [[TMP35]], ptr addrspace(5) [[TMP37]], align 32 -; CHECK-NEXT: [[TMP38:%.*]] = insertelement <2 x i32> [[TMP12]], i32 [[USERDATA0]], i64 0 -; CHECK-NEXT: [[TMP39:%.*]] = bitcast <2 x i32> [[TMP38]] to i64 -; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i64 [[TMP39]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP40]], i32 48 -; CHECK-NEXT: [[TMP42:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP41]], align 16 -; CHECK-NEXT: [[TMP43:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP42]]) -; CHECK-NEXT: [[TMP44:%.*]] = add i32 [[TMP9]], 32 -; CHECK-NEXT: [[TMP45:%.*]] = inttoptr i32 [[TMP44]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP46:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP45]], i32 0 -; CHECK-NEXT: store ptr addrspace(7) [[TMP43]], ptr addrspace(5) [[TMP46]], align 32 -; CHECK-NEXT: [[TMP47:%.*]] = load volatile i32, ptr addrspace(7) [[TMP43]], align 4 -; CHECK-NEXT: [[TMP48:%.*]] = add i32 [[TMP9]], 64 -; CHECK-NEXT: [[TMP49:%.*]] = inttoptr i32 [[TMP48]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP49]], i32 0 -; CHECK-NEXT: store i32 [[TMP47]], ptr addrspace(5) [[TMP50]], align 4 -; CHECK-NEXT: [[TMP51:%.*]] = add i32 [[TMP47]], -37 -; CHECK-NEXT: [[TMP52:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP29]], i32 52 -; CHECK-NEXT: [[TMP53:%.*]] = load i64, ptr addrspace(7) [[TMP52]], align 8 -; CHECK-NEXT: [[TMP54:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP29]], i32 60 -; CHECK-NEXT: [[TMP55:%.*]] = load i32, ptr addrspace(7) [[TMP54]], align 4 -; CHECK-NEXT: [[TMP56:%.*]] = mul i32 [[TMP51]], [[TMP55]] -; CHECK-NEXT: [[TMP57:%.*]] = inttoptr i64 [[TMP53]] to ptr addrspace(1) -; CHECK-NEXT: [[TMP58:%.*]] = sext i32 [[TMP56]] to i64 -; CHECK-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(1) [[TMP57]], i64 [[TMP58]] -; CHECK-NEXT: [[TMP60:%.*]] = load i64, ptr addrspace(1) [[TMP59]], align 8 -; CHECK-NEXT: [[TMP61:%.*]] = inttoptr i64 [[TMP60]] to ptr -; CHECK-NEXT: [[TMP62:%.*]] = ptrtoint ptr [[TMP61]] to i32 -; CHECK-NEXT: [[TMP63:%.*]] = or i32 [[TMP62]], 1 -; CHECK-NEXT: [[TMP64:%.*]] = inttoptr i32 [[TMP63]] to ptr -; CHECK-NEXT: [[TMP65:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[TMP66:%.*]] = inttoptr i32 [[TMP65]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x i32> [[TMP14]], i32 [[USERDATA5]], i64 0 +; CHECK-NEXT: [[TMP16:%.*]] = bitcast <2 x i32> [[TMP15]] to i64 +; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP17]], i32 0 +; CHECK-NEXT: [[TMP19:%.*]] = load <2 x i32>, ptr addrspace(4) [[TMP18]], align 8 +; CHECK-NEXT: [[TMP20:%.*]] = extractelement <2 x i32> [[TMP19]], i64 0 +; CHECK-NEXT: [[TMP21:%.*]] = extractelement <2 x i32> [[TMP19]], i64 1 +; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> poison, i32 [[TMP20]], i64 0 +; CHECK-NEXT: [[TMP23:%.*]] = and i32 [[TMP21]], 65535 +; CHECK-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP22]], i32 [[TMP23]], i64 1 +; CHECK-NEXT: [[TMP25:%.*]] = insertelement <4 x i32> [[TMP24]], i32 -1, i64 2 +; CHECK-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> [[TMP25]], i32 553734060, i64 3 +; CHECK-NEXT: [[TMP27:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP26]]) +; CHECK-NEXT: [[TMP28:%.*]] = insertelement <2 x i32> [[TMP12]], i32 [[USERDATA0]], i64 0 +; CHECK-NEXT: [[TMP29:%.*]] = bitcast <2 x i32> [[TMP28]] to i64 +; CHECK-NEXT: [[TMP30:%.*]] = inttoptr i64 [[TMP29]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP30]], i32 32 +; CHECK-NEXT: [[TMP32:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP31]], align 16 +; CHECK-NEXT: [[TMP33:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP32]]) +; CHECK-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP34]], i32 0 +; CHECK-NEXT: store ptr addrspace(7) [[TMP33]], ptr addrspace(5) [[TMP35]], align 32 +; CHECK-NEXT: [[TMP36:%.*]] = insertelement <2 x i32> [[TMP10]], i32 [[USERDATA0]], i64 0 +; CHECK-NEXT: [[TMP37:%.*]] = bitcast <2 x i32> [[TMP36]] to i64 +; CHECK-NEXT: [[TMP38:%.*]] = inttoptr i64 [[TMP37]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP38]], i32 48 +; CHECK-NEXT: [[TMP40:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP39]], align 16 +; CHECK-NEXT: [[TMP41:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP40]]) +; CHECK-NEXT: [[TMP42:%.*]] = add i32 [[TMP7]], 8 +; CHECK-NEXT: [[TMP43:%.*]] = inttoptr i32 [[TMP42]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP43]], i32 0 +; CHECK-NEXT: store ptr addrspace(7) [[TMP41]], ptr addrspace(5) [[TMP44]], align 32 +; CHECK-NEXT: [[TMP45:%.*]] = load volatile i32, ptr addrspace(7) [[TMP41]], align 4 +; CHECK-NEXT: [[TMP46:%.*]] = add i32 [[TMP7]], 16 +; CHECK-NEXT: [[TMP47:%.*]] = inttoptr i32 [[TMP46]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP48:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP47]], i32 0 +; CHECK-NEXT: store i32 [[TMP45]], ptr addrspace(5) [[TMP48]], align 4 +; CHECK-NEXT: [[TMP49:%.*]] = add i32 [[TMP45]], -37 +; CHECK-NEXT: [[TMP50:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP27]], i32 52 +; CHECK-NEXT: [[TMP51:%.*]] = load i64, ptr addrspace(7) [[TMP50]], align 8 +; CHECK-NEXT: [[TMP52:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP27]], i32 60 +; CHECK-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(7) [[TMP52]], align 4 +; CHECK-NEXT: [[TMP54:%.*]] = mul i32 [[TMP49]], [[TMP53]] +; CHECK-NEXT: [[TMP55:%.*]] = inttoptr i64 [[TMP51]] to ptr addrspace(1) +; CHECK-NEXT: [[TMP56:%.*]] = sext i32 [[TMP54]] to i64 +; CHECK-NEXT: [[TMP57:%.*]] = getelementptr i8, ptr addrspace(1) [[TMP55]], i64 [[TMP56]] +; CHECK-NEXT: [[TMP58:%.*]] = load i64, ptr addrspace(1) [[TMP57]], align 8 +; CHECK-NEXT: [[TMP59:%.*]] = inttoptr i64 [[TMP58]] to ptr +; CHECK-NEXT: [[TMP60:%.*]] = ptrtoint ptr [[TMP59]] to i32 +; CHECK-NEXT: [[TMP61:%.*]] = or i32 [[TMP60]], 1 +; CHECK-NEXT: [[TMP62:%.*]] = inttoptr i32 [[TMP61]] to ptr +; CHECK-NEXT: [[TMP63:%.*]] = load i32, ptr [[CSP]], align 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP67:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP68:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32, i32 } [[TMP67]], i32 [[TMP63]], 1 -; CHECK-NEXT: [[TMP69:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32, i32 } [[TMP68]], ptr addrspace(5) [[TMP66]], 2 -; CHECK-NEXT: [[TMP70:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32, i32 } [[TMP69]], i32 add (i32 ptrtoint (ptr @_rgen_1.resume.0 to i32), i32 1), 3 -; CHECK-NEXT: [[TMP71:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32, i32 } [[TMP70]], i32 undef, 4 -; CHECK-NEXT: [[TMP72:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32, i32 } [[TMP71]], i32 [[TMP51]], 5 -; CHECK-NEXT: [[TMP73:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32, i32 } [[TMP72]], 1 -; CHECK-NEXT: [[TMP74:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP73]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP75:%.*]] = and i32 [[TMP74]], 7 -; CHECK-NEXT: [[TMP76:%.*]] = icmp ne i32 [[TMP75]], 0 +; CHECK-NEXT: [[TMP64:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP65:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP64]], i32 [[TMP61]], 1 +; CHECK-NEXT: [[TMP66:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP65]], i32 [[TMP63]], 2 +; CHECK-NEXT: [[TMP67:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP66]], i32 add (i32 ptrtoint (ptr @_rgen_1.resume.0 to i32), i32 1), 3 +; CHECK-NEXT: [[TMP68:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP67]], i32 undef, 4 +; CHECK-NEXT: [[TMP69:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP68]], i32 [[TMP49]], 5 +; CHECK-NEXT: [[TMP71:%.*]] = extractvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP69]], 1 +; CHECK-NEXT: [[TMP72:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP71]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP73:%.*]] = and i32 [[TMP72]], 7 +; CHECK-NEXT: [[TMP74:%.*]] = icmp ne i32 [[TMP73]], 0 +; CHECK-NEXT: [[TMP75:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP74]]) +; CHECK-NEXT: [[TMP76:%.*]] = icmp eq i32 [[TMP73]], 3 ; CHECK-NEXT: [[TMP77:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP76]]) -; CHECK-NEXT: [[TMP78:%.*]] = icmp eq i32 [[TMP75]], 3 -; CHECK-NEXT: [[TMP79:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP78]]) -; CHECK-NEXT: [[TMP80:%.*]] = icmp ne i32 [[TMP79]], 0 -; CHECK-NEXT: [[TMP81:%.*]] = select i1 [[TMP80]], i32 [[TMP79]], i32 [[TMP77]] -; CHECK-NEXT: [[TMP82:%.*]] = icmp eq i32 [[TMP75]], 2 -; CHECK-NEXT: [[TMP83:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP82]]) -; CHECK-NEXT: [[TMP84:%.*]] = icmp ne i32 [[TMP83]], 0 -; CHECK-NEXT: [[TMP85:%.*]] = select i1 [[TMP84]], i32 [[TMP83]], i32 [[TMP81]] -; CHECK-NEXT: [[TMP86:%.*]] = icmp eq i32 [[TMP75]], 1 -; CHECK-NEXT: [[TMP87:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP86]]) -; CHECK-NEXT: [[TMP88:%.*]] = icmp ne i32 [[TMP87]], 0 -; CHECK-NEXT: [[TMP89:%.*]] = select i1 [[TMP88]], i32 [[TMP87]], i32 [[TMP85]] -; CHECK-NEXT: [[TMP90:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP89]], i1 true) -; CHECK-NEXT: [[TMP91:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP74]], i32 [[TMP90]]) -; CHECK-NEXT: [[TMP92:%.*]] = icmp eq i32 [[TMP74]], [[TMP91]] -; CHECK-NEXT: [[TMP93:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP92]]) -; CHECK-NEXT: [[TMP94:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP91]]) -; CHECK-NEXT: [[TMP95:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP93]]) -; CHECK-NEXT: [[TMP96:%.*]] = and i32 [[TMP94]], -64 -; CHECK-NEXT: [[TMP97:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP96]], i64 0 -; CHECK-NEXT: [[TMP98:%.*]] = bitcast <2 x i32> [[TMP97]] to i64 -; CHECK-NEXT: [[TMP99:%.*]] = inttoptr i64 [[TMP98]] to ptr -; CHECK-NEXT: [[TMP100:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP101:%.*]] = bitcast i64 [[TMP100]] to <2 x i32> -; CHECK-NEXT: [[TMP102:%.*]] = extractelement <2 x i32> [[TMP101]], i64 0 -; CHECK-NEXT: [[TMP103:%.*]] = extractelement <2 x i32> [[TMP101]], i64 1 -; CHECK-NEXT: [[TMP104:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP105:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP106:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP107:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP108:%.*]] = insertelement <20 x i32> [[TMP107]], i32 [[TMP102]], i64 1 -; CHECK-NEXT: [[TMP109:%.*]] = insertelement <20 x i32> [[TMP108]], i32 [[TMP103]], i64 2 -; CHECK-NEXT: [[TMP110:%.*]] = insertelement <20 x i32> [[TMP109]], i32 [[USERDATA0]], i64 3 -; CHECK-NEXT: [[TMP111:%.*]] = insertelement <20 x i32> [[TMP110]], i32 [[USERDATA1]], i64 4 -; CHECK-NEXT: [[TMP112:%.*]] = insertelement <20 x i32> [[TMP111]], i32 [[USERDATA2]], i64 5 -; CHECK-NEXT: [[TMP113:%.*]] = insertelement <20 x i32> [[TMP112]], i32 [[USERDATA3]], i64 6 -; CHECK-NEXT: [[TMP114:%.*]] = insertelement <20 x i32> [[TMP113]], i32 [[USERDATA4]], i64 7 -; CHECK-NEXT: [[TMP115:%.*]] = insertelement <20 x i32> [[TMP114]], i32 [[USERDATA5]], i64 8 -; CHECK-NEXT: [[TMP116:%.*]] = insertelement <20 x i32> [[TMP115]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP117:%.*]] = insertelement <20 x i32> [[TMP116]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP118:%.*]] = insertelement <20 x i32> [[TMP117]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP119:%.*]] = insertelement <20 x i32> [[TMP118]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP120:%.*]] = insertelement <20 x i32> [[TMP119]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP121:%.*]] = insertelement <20 x i32> [[TMP120]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP122:%.*]] = insertelement <20 x i32> [[TMP121]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP123:%.*]] = insertelement <20 x i32> [[TMP122]], i32 [[TMP104]], i64 16 -; CHECK-NEXT: [[TMP124:%.*]] = insertelement <20 x i32> [[TMP123]], i32 [[TMP105]], i64 17 -; CHECK-NEXT: [[TMP125:%.*]] = insertelement <20 x i32> [[TMP124]], i32 [[TMP106]], i64 18 -; CHECK-NEXT: [[TMP126:%.*]] = insertelement <20 x i32> [[TMP125]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5), i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5i32i32i32s(ptr inreg [[TMP99]], i32 inreg [[TMP95]], <20 x i32> inreg [[TMP126]], { <3 x i32>, i32, ptr addrspace(5), i32, i32, i32 } [[TMP72]], i32 0) +; CHECK-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0 +; CHECK-NEXT: [[TMP79:%.*]] = select i1 [[TMP78]], i32 [[TMP77]], i32 [[TMP75]] +; CHECK-NEXT: [[TMP80:%.*]] = icmp eq i32 [[TMP73]], 2 +; CHECK-NEXT: [[TMP81:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP80]]) +; CHECK-NEXT: [[TMP82:%.*]] = icmp ne i32 [[TMP81]], 0 +; CHECK-NEXT: [[TMP83:%.*]] = select i1 [[TMP82]], i32 [[TMP81]], i32 [[TMP79]] +; CHECK-NEXT: [[TMP84:%.*]] = icmp eq i32 [[TMP73]], 1 +; CHECK-NEXT: [[TMP85:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP84]]) +; CHECK-NEXT: [[TMP86:%.*]] = icmp ne i32 [[TMP85]], 0 +; CHECK-NEXT: [[TMP87:%.*]] = select i1 [[TMP86]], i32 [[TMP85]], i32 [[TMP83]] +; CHECK-NEXT: [[TMP88:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP87]], i1 true) +; CHECK-NEXT: [[TMP89:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP72]], i32 [[TMP88]]) +; CHECK-NEXT: [[TMP90:%.*]] = icmp eq i32 [[TMP72]], [[TMP89]] +; CHECK-NEXT: [[TMP91:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP90]]) +; CHECK-NEXT: [[TMP92:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP89]]) +; CHECK-NEXT: [[TMP93:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP91]]) +; CHECK-NEXT: [[TMP94:%.*]] = and i32 [[TMP92]], -64 +; CHECK-NEXT: [[TMP95:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP94]], i64 0 +; CHECK-NEXT: [[TMP96:%.*]] = bitcast <2 x i32> [[TMP95]] to i64 +; CHECK-NEXT: [[TMP97:%.*]] = inttoptr i64 [[TMP96]] to ptr +; CHECK-NEXT: [[TMP98:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP99:%.*]] = bitcast i64 [[TMP98]] to <2 x i32> +; CHECK-NEXT: [[TMP100:%.*]] = extractelement <2 x i32> [[TMP99]], i64 0 +; CHECK-NEXT: [[TMP101:%.*]] = extractelement <2 x i32> [[TMP99]], i64 1 +; CHECK-NEXT: [[TMP102:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP103:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP104:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP105:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP106:%.*]] = insertelement <20 x i32> [[TMP105]], i32 [[TMP100]], i64 1 +; CHECK-NEXT: [[TMP107:%.*]] = insertelement <20 x i32> [[TMP106]], i32 [[TMP101]], i64 2 +; CHECK-NEXT: [[TMP108:%.*]] = insertelement <20 x i32> [[TMP107]], i32 [[USERDATA0]], i64 3 +; CHECK-NEXT: [[TMP109:%.*]] = insertelement <20 x i32> [[TMP108]], i32 [[USERDATA1]], i64 4 +; CHECK-NEXT: [[TMP110:%.*]] = insertelement <20 x i32> [[TMP109]], i32 [[USERDATA2]], i64 5 +; CHECK-NEXT: [[TMP111:%.*]] = insertelement <20 x i32> [[TMP110]], i32 [[USERDATA3]], i64 6 +; CHECK-NEXT: [[TMP112:%.*]] = insertelement <20 x i32> [[TMP111]], i32 [[USERDATA4]], i64 7 +; CHECK-NEXT: [[TMP113:%.*]] = insertelement <20 x i32> [[TMP112]], i32 [[USERDATA5]], i64 8 +; CHECK-NEXT: [[TMP114:%.*]] = insertelement <20 x i32> [[TMP113]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP115:%.*]] = insertelement <20 x i32> [[TMP114]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP116:%.*]] = insertelement <20 x i32> [[TMP115]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP117:%.*]] = insertelement <20 x i32> [[TMP116]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP118:%.*]] = insertelement <20 x i32> [[TMP117]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP119:%.*]] = insertelement <20 x i32> [[TMP118]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP120:%.*]] = insertelement <20 x i32> [[TMP119]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP121:%.*]] = insertelement <20 x i32> [[TMP120]], i32 [[TMP102]], i64 16 +; CHECK-NEXT: [[TMP122:%.*]] = insertelement <20 x i32> [[TMP121]], i32 [[TMP103]], i64 17 +; CHECK-NEXT: [[TMP123:%.*]] = insertelement <20 x i32> [[TMP122]], i32 [[TMP104]], i64 18 +; CHECK-NEXT: [[TMP124:%.*]] = insertelement <20 x i32> [[TMP123]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32, i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32i32i32i32s(ptr inreg [[TMP97]], i32 inreg [[TMP93]], <20 x i32> inreg [[TMP124]], { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP69]], i32 0) ; CHECK-NEXT: unreachable ; .entry: - %0 = call ptr addrspace(32) @lgc.cps.alloc(i32 96) - %1 = call i64 @llvm.amdgcn.s.getpc() - %2 = bitcast i64 %1 to <2 x i32> - %3 = call i64 @llvm.amdgcn.s.getpc() - %4 = bitcast i64 %3 to <2 x i32> - %5 = call i64 @llvm.amdgcn.s.getpc() - %6 = bitcast i64 %5 to <2 x i32> - %7 = call i32 @lgc.load.user.data__i32(i32 20) - %8 = insertelement <2 x i32> %6, i32 %7, i64 0 - %9 = bitcast <2 x i32> %8 to i64 - %10 = inttoptr i64 %9 to ptr addrspace(4) - %11 = getelementptr i8, ptr addrspace(4) %10, i32 0 - %12 = load <2 x i32>, ptr addrspace(4) %11, align 8 - %13 = extractelement <2 x i32> %12, i64 0 - %14 = extractelement <2 x i32> %12, i64 1 - %15 = insertelement <4 x i32> poison, i32 %13, i64 0 - %16 = and i32 %14, 65535 - %17 = insertelement <4 x i32> %15, i32 %16, i64 1 - %18 = insertelement <4 x i32> %17, i32 -1, i64 2 - %19 = insertelement <4 x i32> %18, i32 553734060, i64 3 - %20 = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %19) - %21 = call i32 @lgc.load.user.data__i32(i32 0) - %22 = insertelement <2 x i32> %4, i32 %21, i64 0 - %23 = bitcast <2 x i32> %22 to i64 - %24 = inttoptr i64 %23 to ptr addrspace(4) - %25 = getelementptr i8, ptr addrspace(4) %24, i32 32 - %26 = load <4 x i32>, ptr addrspace(4) %25, align 16 - %27 = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %26) - %28 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %0, i32 0, i32 0 - store ptr addrspace(7) %27, ptr addrspace(32) %28, align 32 - %29 = call i32 @lgc.load.user.data__i32(i32 0) - %30 = insertelement <2 x i32> %2, i32 %29, i64 0 - %31 = bitcast <2 x i32> %30 to i64 - %32 = inttoptr i64 %31 to ptr addrspace(4) - %33 = getelementptr i8, ptr addrspace(4) %32, i32 48 - %34 = load <4 x i32>, ptr addrspace(4) %33, align 16 - %35 = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %34) - %36 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %0, i32 0, i32 1 - store ptr addrspace(7) %35, ptr addrspace(32) %36, align 32 - %37 = load volatile i32, ptr addrspace(7) %35, align 4 - %38 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %0, i32 0, i32 2 - store i32 %37, ptr addrspace(32) %38, align 4 - %39 = add i32 %37, -37 - %40 = getelementptr inbounds i8, ptr addrspace(7) %20, i32 52 - %41 = load i64, ptr addrspace(7) %40, align 8 - %42 = getelementptr inbounds i8, ptr addrspace(7) %20, i32 60 - %43 = load i32, ptr addrspace(7) %42, align 4 - %44 = mul i32 %39, %43 - %45 = inttoptr i64 %41 to ptr addrspace(1) - %46 = sext i32 %44 to i64 - %47 = getelementptr i8, ptr addrspace(1) %45, i64 %46 - %48 = load i64, ptr addrspace(1) %47, align 8 - %49 = inttoptr i64 %48 to ptr - %50 = ptrtoint ptr %49 to i32 - %51 = or i32 %50, 1 - %52 = inttoptr i32 %51 to ptr - %53 = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @_rgen_1.resume.0) - call void (...) @lgc.cps.jump(i32 %51, i32 2, {} poison, i32 poison, i32 %53, [1 x i32] undef, i32 %39) + %csp = alloca i32, align 4 + store i32 %cspInit, ptr %csp, align 4 + %0 = load i32, ptr %csp, align 4 + %1 = add i32 %0, 96 + store i32 %1, ptr %csp, align 4 + %2 = call i64 @llvm.amdgcn.s.getpc() + %3 = bitcast i64 %2 to <2 x i32> + %4 = call i64 @llvm.amdgcn.s.getpc() + %5 = bitcast i64 %4 to <2 x i32> + %6 = call i64 @llvm.amdgcn.s.getpc() + %7 = bitcast i64 %6 to <2 x i32> + %8 = call i32 @lgc.load.user.data__i32(i32 20) + %9 = insertelement <2 x i32> %7, i32 %8, i64 0 + %10 = bitcast <2 x i32> %9 to i64 + %11 = inttoptr i64 %10 to ptr addrspace(4) + %12 = getelementptr i8, ptr addrspace(4) %11, i32 0 + %13 = load <2 x i32>, ptr addrspace(4) %12, align 8 + %14 = extractelement <2 x i32> %13, i64 0 + %15 = extractelement <2 x i32> %13, i64 1 + %16 = insertelement <4 x i32> poison, i32 %14, i64 0 + %17 = and i32 %15, 65535 + %18 = insertelement <4 x i32> %16, i32 %17, i64 1 + %19 = insertelement <4 x i32> %18, i32 -1, i64 2 + %20 = insertelement <4 x i32> %19, i32 553734060, i64 3 + %21 = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %20) + %22 = call i32 @lgc.load.user.data__i32(i32 0) + %23 = insertelement <2 x i32> %5, i32 %22, i64 0 + %24 = bitcast <2 x i32> %23 to i64 + %25 = inttoptr i64 %24 to ptr addrspace(4) + %26 = getelementptr i8, ptr addrspace(4) %25, i32 32 + %27 = load <4 x i32>, ptr addrspace(4) %26, align 16 + %28 = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %27) + %29 = inttoptr i32 %0 to ptr addrspace(5) + %30 = getelementptr i8, ptr addrspace(5) %29, i32 0 + store ptr addrspace(7) %28, ptr addrspace(5) %30, align 32 + %31 = call i32 @lgc.load.user.data__i32(i32 0) + %32 = insertelement <2 x i32> %3, i32 %31, i64 0 + %33 = bitcast <2 x i32> %32 to i64 + %34 = inttoptr i64 %33 to ptr addrspace(4) + %35 = getelementptr i8, ptr addrspace(4) %34, i32 48 + %36 = load <4 x i32>, ptr addrspace(4) %35, align 16 + %37 = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %36) + %38 = add i32 %0, 8 + %39 = inttoptr i32 %38 to ptr addrspace(5) + %40 = getelementptr i8, ptr addrspace(5) %39, i32 0 + store ptr addrspace(7) %37, ptr addrspace(5) %40, align 32 + %41 = load volatile i32, ptr addrspace(7) %37, align 4 + %42 = add i32 %0, 16 + %43 = inttoptr i32 %42 to ptr addrspace(5) + %44 = getelementptr i8, ptr addrspace(5) %43, i32 0 + store i32 %41, ptr addrspace(5) %44, align 4 + %45 = add i32 %41, -37 + %46 = getelementptr inbounds i8, ptr addrspace(7) %21, i32 52 + %47 = load i64, ptr addrspace(7) %46, align 8 + %48 = getelementptr inbounds i8, ptr addrspace(7) %21, i32 60 + %49 = load i32, ptr addrspace(7) %48, align 4 + %50 = mul i32 %45, %49 + %51 = inttoptr i64 %47 to ptr addrspace(1) + %52 = sext i32 %50 to i64 + %53 = getelementptr i8, ptr addrspace(1) %51, i64 %52 + %54 = load i64, ptr addrspace(1) %53, align 8 + %55 = inttoptr i64 %54 to ptr + %56 = ptrtoint ptr %55 to i32 + %57 = or i32 %56, 1 + %58 = inttoptr i32 %57 to ptr + %59 = call i32 (...) @lgc.cps.as.continuation.reference(ptr @_rgen_1.resume.0) + %60 = load i32, ptr %csp, align 4 + call void (...) @lgc.cps.jump(i32 %57, i32 2, i32 %60, i32 %59, [1 x i32] undef, i32 %45) unreachable } -define void @_rgen_1.resume.0({} %0, i32 %1, [1 x i32] %2) !spirv.ExecutionModel !15 !lgc.shaderstage !16 !continuation !18 !lgc.cps !17 { +define void @_rgen_1.resume.0(i32 %cspInit, i32 %0, [1 x i32] %1) !spirv.ExecutionModel !16 !lgc.shaderstage !17 !continuation !21 !lgc.cps !19 !continuation.state !20 { ; CHECK-LABEL: define amdgpu_cs_chain void @_rgen_1.resume.0( -; CHECK-SAME: i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[USERDATA0:%.*]], i32 inreg [[USERDATA1:%.*]], i32 inreg [[USERDATA2:%.*]], i32 inreg [[USERDATA3:%.*]], i32 inreg [[USERDATA4:%.*]], i32 inreg [[USERDATA5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP:%.*]], i32 [[TMP0:%.*]], [1 x i32] [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] align 64 !spirv.ExecutionModel [[META15]] !lgc.shaderstage [[META16]] !continuation [[META17]] !lgc.cps [[META18]] { +; CHECK-SAME: i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[USERDATA0:%.*]], i32 inreg [[USERDATA1:%.*]], i32 inreg [[USERDATA2:%.*]], i32 inreg [[USERDATA3:%.*]], i32 inreg [[USERDATA4:%.*]], i32 inreg [[USERDATA5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], [1 x i32] [[TMP1:%.*]]) #[[ATTR1:[0-9]+]] align 64 !spirv.ExecutionModel [[META16]] !lgc.shaderstage [[META17]] !continuation [[META21:![0-9]+]] !lgc.cps [[META19]] !continuation.state [[META20]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP2:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP4:%.*]] = bitcast i64 [[TMP3]] to <2 x i32> -; CHECK-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> [[TMP4]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP6:%.*]] = bitcast <2 x i32> [[TMP5]] to i64 -; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP9:%.*]] = bitcast i64 [[TMP8]] to <2 x i32> -; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr addrspace(5) [[VSP]] to i32 -; CHECK-NEXT: store i32 [[TMP10]], ptr addrspace(5) [[TMP2]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(5) [[TMP2]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP11]], -96 -; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], 64 -; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP13]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP14]], i32 0 -; CHECK-NEXT: [[DOTRELOAD6:%.*]] = load i32, ptr addrspace(5) [[TMP15]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = add i32 [[TMP12]], 32 -; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i32 [[TMP16]] to ptr addrspace(5) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to <2 x i32> +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], -96 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], 16 +; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP11]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP12]], i32 0 +; CHECK-NEXT: [[DOTRELOAD6:%.*]] = load i32, ptr addrspace(5) [[TMP13]], align 4 +; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP10]], 8 +; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP15]], i32 0 +; CHECK-NEXT: [[DOTRELOAD3:%.*]] = load ptr addrspace(7), ptr addrspace(5) [[TMP16]], align 32 +; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(5) ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP17]], i32 0 -; CHECK-NEXT: [[DOTRELOAD3:%.*]] = load ptr addrspace(7), ptr addrspace(5) [[TMP18]], align 32 -; CHECK-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP12]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP19]], i32 0 -; CHECK-NEXT: [[DOTRELOAD:%.*]] = load ptr addrspace(7), ptr addrspace(5) [[TMP20]], align 32 -; CHECK-NEXT: [[TMP21:%.*]] = mul i32 [[USERDATA5]], 96 -; CHECK-NEXT: [[TMP22:%.*]] = add i32 [[TMP12]], [[TMP21]] -; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP22]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP23]], i32 0 -; CHECK-NEXT: [[DUMMY_RELOAD:%.*]] = load ptr addrspace(7), ptr addrspace(5) [[TMP24]], align 32 -; CHECK-NEXT: [[TMP25:%.*]] = load volatile i32, ptr addrspace(7) [[DOTRELOAD3]], align 4 -; CHECK-NEXT: [[TMP26:%.*]] = icmp eq i32 [[DOTRELOAD6]], [[TMP25]] -; CHECK-NEXT: [[TMP27:%.*]] = zext i1 [[TMP26]] to i32 -; CHECK-NEXT: store i32 [[TMP27]], ptr addrspace(7) [[DOTRELOAD]], align 4 +; CHECK-NEXT: [[DOTRELOAD:%.*]] = load ptr addrspace(7), ptr addrspace(5) [[TMP18]], align 32 +; CHECK-NEXT: [[TMP19:%.*]] = mul i32 [[USERDATA5]], 24 +; CHECK-NEXT: [[TMP20:%.*]] = add i32 [[TMP10]], [[TMP19]] +; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP20]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP21]], i32 0 +; CHECK-NEXT: [[DUMMY_RELOAD:%.*]] = load ptr addrspace(7), ptr addrspace(5) [[TMP22]], align 32 +; CHECK-NEXT: [[TMP23:%.*]] = load volatile i32, ptr addrspace(7) [[DOTRELOAD3]], align 4 +; CHECK-NEXT: [[TMP24:%.*]] = icmp eq i32 [[DOTRELOAD6]], [[TMP23]] +; CHECK-NEXT: [[TMP25:%.*]] = zext i1 [[TMP24]] to i32 +; CHECK-NEXT: store i32 [[TMP25]], ptr addrspace(7) [[DOTRELOAD]], align 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP28]], i32 0, 1 -; CHECK-NEXT: [[TMP30:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP29]], ptr addrspace(5) poison, 2 -; CHECK-NEXT: [[TMP31:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP30]], 1 -; CHECK-NEXT: [[TMP32:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP31]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP33:%.*]] = and i32 [[TMP32]], 7 -; CHECK-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 +; CHECK-NEXT: [[TMP26:%.*]] = insertvalue { <3 x i32>, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <3 x i32>, i32, i32 } [[TMP26]], i32 0, 1 +; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <3 x i32>, i32, i32 } [[TMP27]], i32 poison, 2 +; CHECK-NEXT: [[TMP29:%.*]] = extractvalue { <3 x i32>, i32, i32 } [[TMP28]], 1 +; CHECK-NEXT: [[TMP30:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP29]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP31:%.*]] = and i32 [[TMP30]], 7 +; CHECK-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 +; CHECK-NEXT: [[TMP33:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP32]]) +; CHECK-NEXT: [[TMP34:%.*]] = icmp eq i32 [[TMP31]], 3 ; CHECK-NEXT: [[TMP35:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP34]]) -; CHECK-NEXT: [[TMP36:%.*]] = icmp eq i32 [[TMP33]], 3 -; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP36]]) -; CHECK-NEXT: [[TMP38:%.*]] = icmp ne i32 [[TMP37]], 0 -; CHECK-NEXT: [[TMP39:%.*]] = select i1 [[TMP38]], i32 [[TMP37]], i32 [[TMP35]] -; CHECK-NEXT: [[TMP40:%.*]] = icmp eq i32 [[TMP33]], 2 -; CHECK-NEXT: [[TMP41:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP40]]) -; CHECK-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 -; CHECK-NEXT: [[TMP43:%.*]] = select i1 [[TMP42]], i32 [[TMP41]], i32 [[TMP39]] -; CHECK-NEXT: [[TMP44:%.*]] = icmp eq i32 [[TMP33]], 1 -; CHECK-NEXT: [[TMP45:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP44]]) -; CHECK-NEXT: [[TMP46:%.*]] = icmp ne i32 [[TMP45]], 0 -; CHECK-NEXT: [[TMP47:%.*]] = select i1 [[TMP46]], i32 [[TMP45]], i32 [[TMP43]] -; CHECK-NEXT: [[TMP48:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP47]], i1 true) -; CHECK-NEXT: [[TMP49:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP32]], i32 [[TMP48]]) -; CHECK-NEXT: [[TMP50:%.*]] = icmp eq i32 [[TMP32]], [[TMP49]] -; CHECK-NEXT: [[TMP51:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP50]]) -; CHECK-NEXT: [[TMP52:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP49]]) -; CHECK-NEXT: [[TMP53:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP51]]) -; CHECK-NEXT: [[TMP54:%.*]] = icmp eq i32 [[TMP52]], 0 -; CHECK-NEXT: br i1 [[TMP54]], label [[RET_BLOCK:%.*]], label [[CHAIN_BLOCK:%.*]] +; CHECK-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 +; CHECK-NEXT: [[TMP37:%.*]] = select i1 [[TMP36]], i32 [[TMP35]], i32 [[TMP33]] +; CHECK-NEXT: [[TMP38:%.*]] = icmp eq i32 [[TMP31]], 2 +; CHECK-NEXT: [[TMP39:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP38]]) +; CHECK-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 +; CHECK-NEXT: [[TMP41:%.*]] = select i1 [[TMP40]], i32 [[TMP39]], i32 [[TMP37]] +; CHECK-NEXT: [[TMP42:%.*]] = icmp eq i32 [[TMP31]], 1 +; CHECK-NEXT: [[TMP43:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP42]]) +; CHECK-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 +; CHECK-NEXT: [[TMP45:%.*]] = select i1 [[TMP44]], i32 [[TMP43]], i32 [[TMP41]] +; CHECK-NEXT: [[TMP46:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP45]], i1 true) +; CHECK-NEXT: [[TMP47:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP30]], i32 [[TMP46]]) +; CHECK-NEXT: [[TMP48:%.*]] = icmp eq i32 [[TMP30]], [[TMP47]] +; CHECK-NEXT: [[TMP49:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP48]]) +; CHECK-NEXT: [[TMP50:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP47]]) +; CHECK-NEXT: [[TMP51:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP49]]) +; CHECK-NEXT: [[TMP52:%.*]] = icmp eq i32 [[TMP50]], 0 +; CHECK-NEXT: br i1 [[TMP52]], label [[RET_BLOCK:%.*]], label [[CHAIN_BLOCK:%.*]] ; CHECK: chain.block: -; CHECK-NEXT: [[TMP55:%.*]] = and i32 [[TMP52]], -64 -; CHECK-NEXT: [[TMP56:%.*]] = insertelement <2 x i32> [[TMP9]], i32 [[TMP55]], i64 0 -; CHECK-NEXT: [[TMP57:%.*]] = bitcast <2 x i32> [[TMP56]] to i64 -; CHECK-NEXT: [[TMP58:%.*]] = inttoptr i64 [[TMP57]] to ptr -; CHECK-NEXT: [[TMP59:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP60:%.*]] = bitcast i64 [[TMP59]] to <2 x i32> -; CHECK-NEXT: [[TMP61:%.*]] = extractelement <2 x i32> [[TMP60]], i64 0 -; CHECK-NEXT: [[TMP62:%.*]] = extractelement <2 x i32> [[TMP60]], i64 1 -; CHECK-NEXT: [[TMP63:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP64:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP65:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[TMP61]], i64 1 -; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[TMP62]], i64 2 -; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[USERDATA0]], i64 3 -; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[USERDATA1]], i64 4 -; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[USERDATA2]], i64 5 -; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[USERDATA3]], i64 6 -; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[USERDATA4]], i64 7 -; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[USERDATA5]], i64 8 -; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP76:%.*]] = insertelement <20 x i32> [[TMP75]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP77:%.*]] = insertelement <20 x i32> [[TMP76]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP78:%.*]] = insertelement <20 x i32> [[TMP77]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP79:%.*]] = insertelement <20 x i32> [[TMP78]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP80:%.*]] = insertelement <20 x i32> [[TMP79]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP81:%.*]] = insertelement <20 x i32> [[TMP80]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP82:%.*]] = insertelement <20 x i32> [[TMP81]], i32 [[TMP63]], i64 16 -; CHECK-NEXT: [[TMP83:%.*]] = insertelement <20 x i32> [[TMP82]], i32 [[TMP64]], i64 17 -; CHECK-NEXT: [[TMP84:%.*]] = insertelement <20 x i32> [[TMP83]], i32 [[TMP65]], i64 18 -; CHECK-NEXT: [[TMP85:%.*]] = insertelement <20 x i32> [[TMP84]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5) }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5s(ptr inreg [[TMP58]], i32 inreg [[TMP53]], <20 x i32> inreg [[TMP85]], { <3 x i32>, i32, ptr addrspace(5) } [[TMP30]], i32 0) +; CHECK-NEXT: [[TMP53:%.*]] = and i32 [[TMP50]], -64 +; CHECK-NEXT: [[TMP54:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[TMP53]], i64 0 +; CHECK-NEXT: [[TMP55:%.*]] = bitcast <2 x i32> [[TMP54]] to i64 +; CHECK-NEXT: [[TMP56:%.*]] = inttoptr i64 [[TMP55]] to ptr +; CHECK-NEXT: [[TMP57:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP58:%.*]] = bitcast i64 [[TMP57]] to <2 x i32> +; CHECK-NEXT: [[TMP59:%.*]] = extractelement <2 x i32> [[TMP58]], i64 0 +; CHECK-NEXT: [[TMP60:%.*]] = extractelement <2 x i32> [[TMP58]], i64 1 +; CHECK-NEXT: [[TMP61:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP62:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP63:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[TMP59]], i64 1 +; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[TMP60]], i64 2 +; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[USERDATA0]], i64 3 +; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[USERDATA1]], i64 4 +; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[USERDATA2]], i64 5 +; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[USERDATA3]], i64 6 +; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[USERDATA4]], i64 7 +; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[USERDATA5]], i64 8 +; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP76:%.*]] = insertelement <20 x i32> [[TMP75]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP77:%.*]] = insertelement <20 x i32> [[TMP76]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP78:%.*]] = insertelement <20 x i32> [[TMP77]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP79:%.*]] = insertelement <20 x i32> [[TMP78]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP80:%.*]] = insertelement <20 x i32> [[TMP79]], i32 [[TMP61]], i64 16 +; CHECK-NEXT: [[TMP81:%.*]] = insertelement <20 x i32> [[TMP80]], i32 [[TMP62]], i64 17 +; CHECK-NEXT: [[TMP82:%.*]] = insertelement <20 x i32> [[TMP81]], i32 [[TMP63]], i64 18 +; CHECK-NEXT: [[TMP83:%.*]] = insertelement <20 x i32> [[TMP82]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32s(ptr inreg [[TMP56]], i32 inreg [[TMP51]], <20 x i32> inreg [[TMP83]], { <3 x i32>, i32, i32 } [[TMP28]], i32 0) ; CHECK-NEXT: unreachable ; CHECK: ret.block: ; CHECK-NEXT: ret void ; entryresume.0: - %3 = call ptr addrspace(32) @lgc.cps.peek(i32 96) - %4 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %3, i32 0, i32 2 - %.reload6 = load i32, ptr addrspace(32) %4, align 4 - %5 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %3, i32 0, i32 1 - %.reload3 = load ptr addrspace(7), ptr addrspace(32) %5, align 32 - %6 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %3, i32 0, i32 0 - %.reload = load ptr addrspace(7), ptr addrspace(32) %6, align 32 + %csp = alloca i32, align 4 + store i32 %cspInit, ptr %csp, align 4 + %2 = load i32, ptr %csp, align 4 + %3 = add i32 %2, -96 + %4 = add i32 %3, 16 + %5 = inttoptr i32 %4 to ptr addrspace(5) + %6 = getelementptr i8, ptr addrspace(5) %5, i32 0 + %.reload6 = load i32, ptr addrspace(5) %6, align 4 + %7 = add i32 %3, 8 + %8 = inttoptr i32 %7 to ptr addrspace(5) + %9 = getelementptr i8, ptr addrspace(5) %8, i32 0 + %.reload3 = load ptr addrspace(7), ptr addrspace(5) %9, align 32 + %10 = inttoptr i32 %3 to ptr addrspace(5) + %11 = getelementptr i8, ptr addrspace(5) %10, i32 0 + %.reload = load ptr addrspace(7), ptr addrspace(5) %11, align 32 %dummy.udata = call i32 @lgc.load.user.data__i32(i32 20) - %dummy.gep = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %3, i32 %dummy.udata, i32 0 - %dummy.reload = load ptr addrspace(7), ptr addrspace(32) %dummy.gep, align 32 - %7 = load volatile i32, ptr addrspace(7) %.reload3, align 4 - %8 = icmp eq i32 %.reload6, %7 - %9 = zext i1 %8 to i32 - store i32 %9, ptr addrspace(7) %.reload, align 4 + %12 = mul i32 %dummy.udata, 24 + %13 = add i32 %3, %12 + %14 = inttoptr i32 %13 to ptr addrspace(5) + %15 = getelementptr i8, ptr addrspace(5) %14, i32 0 + %dummy.reload = load ptr addrspace(7), ptr addrspace(5) %15, align 32 + %16 = load volatile i32, ptr addrspace(7) %.reload3, align 4 + %17 = icmp eq i32 %.reload6, %16 + %18 = zext i1 %17 to i32 + store i32 %18, ptr addrspace(7) %.reload, align 4 ret void } -; Function Attrs: nounwind willreturn memory(none) declare i32 @lgc.load.user.data__i32(i32) #1 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.amdgcn.s.getpc() #2 +declare noundef i64 @llvm.amdgcn.s.getpc() #2 -; Function Attrs: nounwind willreturn memory(none) declare ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32>) #1 -; Function Attrs: nounwind willreturn memory(inaccessiblemem: readwrite) -declare ptr addrspace(32) @lgc.cps.alloc(i32) #6 +declare ptr addrspace(32) @lgc.cps.alloc(i32) #3 -; Function Attrs: nounwind willreturn -declare i32 @lgc.cps.as.continuation.reference__i32(...) #3 +declare i32 @lgc.cps.as.continuation.reference(...) #4 -; Function Attrs: noreturn declare void @lgc.cps.jump(...) #5 -; Function Attrs: nounwind willreturn memory(inaccessiblemem: read) -declare ptr addrspace(32) @lgc.cps.peek(i32) #7 +declare ptr addrspace(32) @lgc.cps.peek(i32) #6 + +declare void @lgc.cps.complete() + +declare !continuation !18 { ptr, ptr } @continuation.prototype._rgen_1(ptr, i1) + +declare ptr @continuation.malloc(i32) + +declare void @continuation.free(ptr) + +declare token @llvm.coro.id.retcon(i32, i32, ptr, ptr, ptr, ptr) #7 + +declare ptr @llvm.coro.begin(token, ptr writeonly) #7 + +declare !continuation !21 { ptr, ptr } @continuation.prototype._rgen_1.resume.0(ptr, i1) attributes #0 = { alwaysinline nounwind "target-features"=",+wavefrontsize32" } attributes #1 = { nounwind willreturn memory(none) } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } -attributes #3 = { nounwind willreturn } -attributes #4 = { nounwind } +attributes #3 = { nounwind willreturn memory(inaccessiblemem: readwrite) } +attributes #4 = { nounwind willreturn } attributes #5 = { noreturn } -attributes #6 = { nounwind willreturn memory(inaccessiblemem: readwrite) } -attributes #7 = { nounwind willreturn memory(inaccessiblemem: read) } +attributes #6 = { nounwind willreturn memory(inaccessiblemem: read) } +attributes #7 = { nounwind } !llpc.compute.mode = !{!0} !lgc.client = !{!1} @@ -364,6 +386,7 @@ attributes #7 = { nounwind willreturn memory(inaccessiblemem: read) } !lgc.options.CS = !{!3} !lgc.user.data.nodes = !{!4, !5, !6, !7, !8, !9, !10, !11, !12, !13} !amdgpu.pal.metadata.msgpack = !{!14} +!continuation.stackAddrspace = !{!15} !0 = !{i32 8, i32 4, i32 1} !1 = !{!"Vulkan"} @@ -380,17 +403,18 @@ attributes #7 = { nounwind willreturn memory(inaccessiblemem: read) } !12 = !{!"DescriptorBuffer", i32 6, i32 0, i32 2, i32 4, i64 93, i32 0, i32 4} !13 = !{!"DescriptorBuffer", i32 6, i32 0, i32 6, i32 4, i64 93, i32 1, i32 4} !14 = !{!"\82\B0amdpal.pipelines\91\83\B0.spill_threshold\CD\FF\FF\B0.user_data_limit\00\AF.xgl_cache_info\82\B3.128_bit_cache_hash\92\CF\C4jyX\05\E6M\0F\CF\03b\DD\05\C5\B6\DB\B9\AD.llpc_version\A467.0\AEamdpal.version\92\03\00"} -!15 = !{i32 5313} -!16 = !{i32 7} -!17 = !{i32 1} +!15 = !{i32 5} +!16 = !{i32 5313} +!17 = !{i32 7} !18 = !{ptr @_rgen_1} - -; -; -; +!19 = !{i32 1} +!20 = !{i32 0} +!21 = !{ptr @_rgen_1.resume.0} ;. -; CHECK: [[META15]] = !{i32 5313} -; CHECK: [[META16]] = !{i32 7} -; CHECK: [[META17]] = !{ptr @_rgen_1} -; CHECK: [[META18]] = !{i32 1} +; CHECK: [[META16]] = !{i32 5313} +; CHECK: [[META17]] = !{i32 7} +; CHECK: [[META18]] = !{ptr @_rgen_1} +; CHECK: [[META19]] = !{i32 1} +; CHECK: [[META20]] = !{i32 0} +; CHECK: [[META21]] = !{ptr @_rgen_1.resume.0} ;. diff --git a/lgc/test/Transforms/CpsLowering/cps-stack-lowering.lgc b/lgc/test/Transforms/CpsLowering/cps-stack-lowering.lgc index b3937b9a27..ac26052e02 100644 --- a/lgc/test/Transforms/CpsLowering/cps-stack-lowering.lgc +++ b/lgc/test/Transforms/CpsLowering/cps-stack-lowering.lgc @@ -1,669 +1,621 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --function-signature ; RUN: lgc -mcpu=gfx1030 -o - -passes="require,lgc-mutate-entry-point" %s | FileCheck --check-prefixes=CHECK %s -declare void @lgc.cps.jump(...) noreturn +declare void @lgc.cps.jump(...) #0 + declare ptr addrspace(32) @lgc.cps.alloc(i32) + declare void @lgc.cps.free(i32) -declare i32 @lgc.cps.as.continuation.reference__i32(ptr) -declare i64 @lgc.cps.as.continuation.reference__i64(ptr) + +declare i32 @lgc.cps.as.continuation.reference(ptr) + declare ptr addrspace(32) @lgc.cps.peek(i32) + declare ptr addrspace(32) @lgc.cps.get.vsp() + declare i32 @lgc.cps.get.dummy.index(i32) -%_rgen_1.Frame = type { ptr addrspace(5), ptr addrspace(5), i32 } +declare void @lgc.cps.complete() -define void @test.0({} %unused) !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} { +define void @test.0(i32 %cspInit) !lgc.cps !1 !lgc.shaderstage !2 !continuation !3 !continuation.state !4 { ; CHECK-LABEL: define {{[^@]+}}@test.0 -; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP:%.*]]) #[[ATTR1:[0-9]+]] align 64 !lgc.cps [[META2:![0-9]+]] !lgc.shaderstage [[META3:![0-9]+]] { -; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to <2 x i32> -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 -; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr addrspace(5) [[VSP]] to i32 -; CHECK-NEXT: store i32 [[TMP9]], ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], 12 -; CHECK-NEXT: store i32 [[TMP11]], ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(5) +; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[CSPINIT:%.*]]) #[[ATTR1:[0-9]+]] align 64 !lgc.cps [[META3:![0-9]+]] !lgc.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.state [[META6:![0-9]+]] { +; CHECK-NEXT: AllocaSpillBB: +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], 12 +; CHECK-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP9]], i32 0 +; CHECK-NEXT: store i32 333, ptr addrspace(5) [[TMP10]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP7]], 4 +; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP11]] to ptr addrspace(5) ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP12]], i32 0 -; CHECK-NEXT: store i32 333, ptr addrspace(5) [[TMP13]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP10]], 4 +; CHECK-NEXT: store i32 111, ptr addrspace(5) [[TMP13]], align 4 +; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP7]], 9 ; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(5) ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP15]], i32 0 -; CHECK-NEXT: store i32 111, ptr addrspace(5) [[TMP16]], align 4 -; CHECK-NEXT: [[TMP17:%.*]] = add i32 [[TMP10]], 9 -; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP17]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP18]], i32 0 -; CHECK-NEXT: store i8 99, ptr addrspace(5) [[TMP19]], align 1 -; CHECK-NEXT: [[STATE:%.*]] = insertvalue { i32 } poison, i32 [[TMP17]], 0 -; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP20]] to ptr addrspace(5) -; CHECK-NEXT: store { i32 } [[STATE]], ptr addrspace(5) [[TMP21]], align 4 -; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP21]], i32 4 +; CHECK-NEXT: store i8 99, ptr addrspace(5) [[TMP16]], align 1 +; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr [[CSP]], align 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP23:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP24:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP23]], i32 add (i32 ptrtoint (ptr @test.1 to i32), i32 1), 1 -; CHECK-NEXT: [[TMP25:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP24]], ptr addrspace(5) [[TMP22]], 2 -; CHECK-NEXT: [[TMP26:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP25]], i32 [[TMP17]], 3 -; CHECK-NEXT: [[TMP27:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP26]], i32 [[TMP14]], 4 -; CHECK-NEXT: [[TMP28:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP27]], 1 -; CHECK-NEXT: [[TMP29:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP28]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP30:%.*]] = and i32 [[TMP29]], 7 +; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP18]], i32 add (i32 ptrtoint (ptr @test.1 to i32), i32 1), 1 +; CHECK-NEXT: [[TMP20:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP19]], i32 [[TMP17]], 2 +; CHECK-NEXT: [[TMP21:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP20]], i32 poison, 3 +; CHECK-NEXT: [[TMP22:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP21]], i32 [[TMP14]], 4 +; CHECK-NEXT: [[TMP23:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP22]], i32 [[TMP11]], 5 +; CHECK-NEXT: [[TMP24:%.*]] = extractvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP23]], 1 +; CHECK-NEXT: [[TMP25:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP24]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP26:%.*]] = and i32 [[TMP25]], 7 +; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 +; CHECK-NEXT: [[TMP28:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP27]]) +; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i32 [[TMP26]], 3 +; CHECK-NEXT: [[TMP30:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP29]]) ; CHECK-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 -; CHECK-NEXT: [[TMP32:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP31]]) -; CHECK-NEXT: [[TMP33:%.*]] = icmp eq i32 [[TMP30]], 3 +; CHECK-NEXT: [[TMP32:%.*]] = select i1 [[TMP31]], i32 [[TMP30]], i32 [[TMP28]] +; CHECK-NEXT: [[TMP33:%.*]] = icmp eq i32 [[TMP26]], 2 ; CHECK-NEXT: [[TMP34:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP33]]) ; CHECK-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 ; CHECK-NEXT: [[TMP36:%.*]] = select i1 [[TMP35]], i32 [[TMP34]], i32 [[TMP32]] -; CHECK-NEXT: [[TMP37:%.*]] = icmp eq i32 [[TMP30]], 2 +; CHECK-NEXT: [[TMP37:%.*]] = icmp eq i32 [[TMP26]], 1 ; CHECK-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP37]]) ; CHECK-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0 ; CHECK-NEXT: [[TMP40:%.*]] = select i1 [[TMP39]], i32 [[TMP38]], i32 [[TMP36]] -; CHECK-NEXT: [[TMP41:%.*]] = icmp eq i32 [[TMP30]], 1 -; CHECK-NEXT: [[TMP42:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP41]]) -; CHECK-NEXT: [[TMP43:%.*]] = icmp ne i32 [[TMP42]], 0 -; CHECK-NEXT: [[TMP44:%.*]] = select i1 [[TMP43]], i32 [[TMP42]], i32 [[TMP40]] -; CHECK-NEXT: [[TMP45:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP44]], i1 true) -; CHECK-NEXT: [[TMP46:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP29]], i32 [[TMP45]]) -; CHECK-NEXT: [[TMP47:%.*]] = icmp eq i32 [[TMP29]], [[TMP46]] -; CHECK-NEXT: [[TMP48:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP47]]) -; CHECK-NEXT: [[TMP49:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP46]]) -; CHECK-NEXT: [[TMP50:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP48]]) -; CHECK-NEXT: [[TMP51:%.*]] = and i32 [[TMP49]], -64 -; CHECK-NEXT: [[TMP52:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[TMP51]], i64 0 -; CHECK-NEXT: [[TMP53:%.*]] = bitcast <2 x i32> [[TMP52]] to i64 -; CHECK-NEXT: [[TMP54:%.*]] = inttoptr i64 [[TMP53]] to ptr -; CHECK-NEXT: [[TMP55:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP56:%.*]] = bitcast i64 [[TMP55]] to <2 x i32> -; CHECK-NEXT: [[TMP57:%.*]] = extractelement <2 x i32> [[TMP56]], i64 0 -; CHECK-NEXT: [[TMP58:%.*]] = extractelement <2 x i32> [[TMP56]], i64 1 -; CHECK-NEXT: [[TMP59:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP60:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP61:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[TMP57]], i64 1 -; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[TMP58]], i64 2 -; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD0]], i64 3 -; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD1]], i64 4 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD2]], i64 5 -; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[PAD3]], i64 6 -; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP76:%.*]] = insertelement <20 x i32> [[TMP75]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP77:%.*]] = insertelement <20 x i32> [[TMP76]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP78:%.*]] = insertelement <20 x i32> [[TMP77]], i32 [[TMP59]], i64 16 -; CHECK-NEXT: [[TMP79:%.*]] = insertelement <20 x i32> [[TMP78]], i32 [[TMP60]], i64 17 -; CHECK-NEXT: [[TMP80:%.*]] = insertelement <20 x i32> [[TMP79]], i32 [[TMP61]], i64 18 -; CHECK-NEXT: [[TMP81:%.*]] = insertelement <20 x i32> [[TMP80]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5), i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5i32i32s(ptr inreg [[TMP54]], i32 inreg [[TMP50]], <20 x i32> inreg [[TMP81]], { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP27]], i32 0) +; CHECK-NEXT: [[TMP41:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP40]], i1 true) +; CHECK-NEXT: [[TMP42:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP25]], i32 [[TMP41]]) +; CHECK-NEXT: [[TMP43:%.*]] = icmp eq i32 [[TMP25]], [[TMP42]] +; CHECK-NEXT: [[TMP44:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP43]]) +; CHECK-NEXT: [[TMP45:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP42]]) +; CHECK-NEXT: [[TMP46:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP44]]) +; CHECK-NEXT: [[TMP47:%.*]] = and i32 [[TMP45]], -64 +; CHECK-NEXT: [[TMP48:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP47]], i64 0 +; CHECK-NEXT: [[TMP49:%.*]] = bitcast <2 x i32> [[TMP48]] to i64 +; CHECK-NEXT: [[TMP50:%.*]] = inttoptr i64 [[TMP49]] to ptr +; CHECK-NEXT: [[TMP51:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP52:%.*]] = bitcast i64 [[TMP51]] to <2 x i32> +; CHECK-NEXT: [[TMP53:%.*]] = extractelement <2 x i32> [[TMP52]], i64 0 +; CHECK-NEXT: [[TMP54:%.*]] = extractelement <2 x i32> [[TMP52]], i64 1 +; CHECK-NEXT: [[TMP55:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP56:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP57:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[TMP53]], i64 1 +; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[TMP54]], i64 2 +; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD0]], i64 3 +; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD1]], i64 4 +; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD2]], i64 5 +; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD3]], i64 6 +; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD4]], i64 7 +; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD5]], i64 8 +; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[TMP55]], i64 16 +; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[TMP56]], i64 17 +; CHECK-NEXT: [[TMP76:%.*]] = insertelement <20 x i32> [[TMP75]], i32 [[TMP57]], i64 18 +; CHECK-NEXT: [[TMP77:%.*]] = insertelement <20 x i32> [[TMP76]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32, i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32i32i32i32s(ptr inreg [[TMP50]], i32 inreg [[TMP46]], <20 x i32> inreg [[TMP77]], { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP23]], i32 0) ; CHECK-NEXT: unreachable ; - %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) ; round up to 12 during lowering - - store i32 333, ptr addrspace(32) %mem - - %p1 = getelementptr i32, ptr addrspace(32) %mem, i32 1 - store i32 111, ptr addrspace(32) %p1 - - %p2 = getelementptr i8, ptr addrspace(32) %mem, i32 9 - store i8 99, ptr addrspace(32) %p2 - - %q1 = ptrtoint ptr addrspace(32) %p1 to i32 - - %state = insertvalue { ptr addrspace(32) } poison, ptr addrspace(32) %p2, 0 - - %cr = call i32 @lgc.cps.as.continuation.reference__i32(ptr @test.1) - call void (...) @lgc.cps.jump(i32 %cr, i32 2, { ptr addrspace(32) } %state, i32 poison, ptr addrspace(32) %p2, i32 %q1) +AllocaSpillBB: + %csp = alloca i32, align 4 + store i32 %cspInit, ptr %csp, align 4 + %0 = load i32, ptr %csp, align 4 + %1 = add i32 %0, 12 + store i32 %1, ptr %csp, align 4 + %2 = inttoptr i32 %0 to ptr addrspace(5) + %3 = getelementptr i8, ptr addrspace(5) %2, i32 0 + store i32 333, ptr addrspace(5) %3, align 4 + %4 = add i32 %0, 4 + %5 = inttoptr i32 %4 to ptr addrspace(5) + %6 = getelementptr i8, ptr addrspace(5) %5, i32 0 + store i32 111, ptr addrspace(5) %6, align 4 + %7 = add i32 %0, 9 + %8 = inttoptr i32 %7 to ptr addrspace(5) + %9 = getelementptr i8, ptr addrspace(5) %8, i32 0 + store i8 99, ptr addrspace(5) %9, align 1 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + %10 = load i32, ptr %csp, align 4 + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 %10, i32 poison, i32 %7, i32 %4) unreachable } -define void @test.1({} %no_state, ptr addrspace(32) %p2, i32 %q1) !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} { +define void @test.1(i32 %cspInit, i32 %p2, i32 %q1) !lgc.cps !1 !lgc.shaderstage !2 !continuation !5 !continuation.state !4 { ; CHECK-LABEL: define {{[^@]+}}@test.1 -; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP:%.*]], i32 [[P2:%.*]], i32 [[Q1:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META2]] !lgc.shaderstage [[META3]] { -; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to <2 x i32> -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 -; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr addrspace(5) [[VSP]] to i32 -; CHECK-NEXT: store i32 [[TMP9]], ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i32 [[Q1]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP10]], i32 0 -; CHECK-NEXT: [[N111:%.*]] = load i32, ptr addrspace(5) [[TMP11]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i32 [[P2]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP12]], i32 0 -; CHECK-NEXT: [[N99:%.*]] = load i8, ptr addrspace(5) [[TMP13]], align 1 -; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(5) +; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[CSPINIT:%.*]], i32 [[P2:%.*]], i32 [[Q1:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META3]] !lgc.shaderstage [[META4]] !continuation [[META7:![0-9]+]] !continuation.state [[META6]] { +; CHECK-NEXT: AllocaSpillBB: +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i32 [[Q1]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP7]], i32 0 +; CHECK-NEXT: [[N111:%.*]] = load i32, ptr addrspace(5) [[TMP8]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i32 [[P2]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP9]], i32 0 +; CHECK-NEXT: [[N99:%.*]] = load i8, ptr addrspace(5) [[TMP10]], align 1 +; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP16:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP17:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP16]], i32 add (i32 ptrtoint (ptr @test.2 to i32), i32 1), 1 -; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP17]], ptr addrspace(5) [[TMP15]], 2 -; CHECK-NEXT: [[TMP19:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP18]], 1 -; CHECK-NEXT: [[TMP20:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP19]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP21:%.*]] = and i32 [[TMP20]], 7 -; CHECK-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 -; CHECK-NEXT: [[TMP23:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP22]]) -; CHECK-NEXT: [[TMP24:%.*]] = icmp eq i32 [[TMP21]], 3 -; CHECK-NEXT: [[TMP25:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP24]]) -; CHECK-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 -; CHECK-NEXT: [[TMP27:%.*]] = select i1 [[TMP26]], i32 [[TMP25]], i32 [[TMP23]] -; CHECK-NEXT: [[TMP28:%.*]] = icmp eq i32 [[TMP21]], 2 -; CHECK-NEXT: [[TMP29:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP28]]) -; CHECK-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 -; CHECK-NEXT: [[TMP31:%.*]] = select i1 [[TMP30]], i32 [[TMP29]], i32 [[TMP27]] -; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i32 [[TMP21]], 1 -; CHECK-NEXT: [[TMP33:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP32]]) -; CHECK-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 -; CHECK-NEXT: [[TMP35:%.*]] = select i1 [[TMP34]], i32 [[TMP33]], i32 [[TMP31]] -; CHECK-NEXT: [[TMP36:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP35]], i1 true) -; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP20]], i32 [[TMP36]]) -; CHECK-NEXT: [[TMP38:%.*]] = icmp eq i32 [[TMP20]], [[TMP37]] -; CHECK-NEXT: [[TMP39:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP38]]) -; CHECK-NEXT: [[TMP40:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP37]]) -; CHECK-NEXT: [[TMP41:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP39]]) -; CHECK-NEXT: [[TMP42:%.*]] = and i32 [[TMP40]], -64 -; CHECK-NEXT: [[TMP43:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[TMP42]], i64 0 -; CHECK-NEXT: [[TMP44:%.*]] = bitcast <2 x i32> [[TMP43]] to i64 -; CHECK-NEXT: [[TMP45:%.*]] = inttoptr i64 [[TMP44]] to ptr -; CHECK-NEXT: [[TMP46:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP47:%.*]] = bitcast i64 [[TMP46]] to <2 x i32> -; CHECK-NEXT: [[TMP48:%.*]] = extractelement <2 x i32> [[TMP47]], i64 0 -; CHECK-NEXT: [[TMP49:%.*]] = extractelement <2 x i32> [[TMP47]], i64 1 -; CHECK-NEXT: [[TMP50:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP51:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP52:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[TMP48]], i64 1 -; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> [[TMP54]], i32 [[TMP49]], i64 2 -; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[PAD0]], i64 3 -; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[PAD1]], i64 4 -; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[PAD2]], i64 5 -; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD3]], i64 6 -; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[TMP50]], i64 16 -; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[TMP51]], i64 17 -; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[TMP52]], i64 18 -; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5) }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5s(ptr inreg [[TMP45]], i32 inreg [[TMP41]], <20 x i32> inreg [[TMP72]], { <3 x i32>, i32, ptr addrspace(5) } [[TMP18]], i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = insertvalue { <3 x i32>, i32, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { <3 x i32>, i32, i32, i32 } [[TMP12]], i32 add (i32 ptrtoint (ptr @test.2 to i32), i32 1), 1 +; CHECK-NEXT: [[TMP14:%.*]] = insertvalue { <3 x i32>, i32, i32, i32 } [[TMP13]], i32 [[TMP11]], 2 +; CHECK-NEXT: [[TMP15:%.*]] = insertvalue { <3 x i32>, i32, i32, i32 } [[TMP14]], i32 poison, 3 +; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { <3 x i32>, i32, i32, i32 } [[TMP15]], 1 +; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP16]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP18:%.*]] = and i32 [[TMP17]], 7 +; CHECK-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 +; CHECK-NEXT: [[TMP20:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP19]]) +; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i32 [[TMP18]], 3 +; CHECK-NEXT: [[TMP22:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP21]]) +; CHECK-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 +; CHECK-NEXT: [[TMP24:%.*]] = select i1 [[TMP23]], i32 [[TMP22]], i32 [[TMP20]] +; CHECK-NEXT: [[TMP25:%.*]] = icmp eq i32 [[TMP18]], 2 +; CHECK-NEXT: [[TMP26:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP25]]) +; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 +; CHECK-NEXT: [[TMP28:%.*]] = select i1 [[TMP27]], i32 [[TMP26]], i32 [[TMP24]] +; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i32 [[TMP18]], 1 +; CHECK-NEXT: [[TMP30:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP29]]) +; CHECK-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 +; CHECK-NEXT: [[TMP32:%.*]] = select i1 [[TMP31]], i32 [[TMP30]], i32 [[TMP28]] +; CHECK-NEXT: [[TMP33:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP32]], i1 true) +; CHECK-NEXT: [[TMP34:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP17]], i32 [[TMP33]]) +; CHECK-NEXT: [[TMP35:%.*]] = icmp eq i32 [[TMP17]], [[TMP34]] +; CHECK-NEXT: [[TMP36:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP35]]) +; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP34]]) +; CHECK-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP36]]) +; CHECK-NEXT: [[TMP39:%.*]] = and i32 [[TMP37]], -64 +; CHECK-NEXT: [[TMP40:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP39]], i64 0 +; CHECK-NEXT: [[TMP41:%.*]] = bitcast <2 x i32> [[TMP40]] to i64 +; CHECK-NEXT: [[TMP42:%.*]] = inttoptr i64 [[TMP41]] to ptr +; CHECK-NEXT: [[TMP43:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP44:%.*]] = bitcast i64 [[TMP43]] to <2 x i32> +; CHECK-NEXT: [[TMP45:%.*]] = extractelement <2 x i32> [[TMP44]], i64 0 +; CHECK-NEXT: [[TMP46:%.*]] = extractelement <2 x i32> [[TMP44]], i64 1 +; CHECK-NEXT: [[TMP47:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP48:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP49:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP50:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP51:%.*]] = insertelement <20 x i32> [[TMP50]], i32 [[TMP45]], i64 1 +; CHECK-NEXT: [[TMP52:%.*]] = insertelement <20 x i32> [[TMP51]], i32 [[TMP46]], i64 2 +; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> [[TMP52]], i32 [[PAD0]], i64 3 +; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[PAD1]], i64 4 +; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> [[TMP54]], i32 [[PAD2]], i64 5 +; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[PAD3]], i64 6 +; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[PAD4]], i64 7 +; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[PAD5]], i64 8 +; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[TMP47]], i64 16 +; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[TMP48]], i64 17 +; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[TMP49]], i64 18 +; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32i32s(ptr inreg [[TMP42]], i32 inreg [[TMP38]], <20 x i32> inreg [[TMP69]], { <3 x i32>, i32, i32, i32 } [[TMP15]], i32 0) ; CHECK-NEXT: unreachable ; - %p1 = inttoptr i32 %q1 to ptr addrspace(32) - %n111 = load i32, ptr addrspace(32) %p1 - %n99 = load i8, ptr addrspace(32) %p2 - - %cr = call i32 @lgc.cps.as.continuation.reference__i32(ptr @test.2) - call void (...) @lgc.cps.jump(i32 %cr, i32 2, {} poison, i32 poison) +AllocaSpillBB: + %csp = alloca i32, align 4 + store i32 %cspInit, ptr %csp, align 4 + %0 = inttoptr i32 %q1 to ptr addrspace(5) + %1 = getelementptr i8, ptr addrspace(5) %0, i32 0 + %n111 = load i32, ptr addrspace(5) %1, align 4 + %2 = inttoptr i32 %p2 to ptr addrspace(5) + %3 = getelementptr i8, ptr addrspace(5) %2, i32 0 + %n99 = load i8, ptr addrspace(5) %3, align 1 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.2) + %4 = load i32, ptr %csp, align 4 + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 %4, i32 poison) unreachable } -define void @test.2({ ptr addrspace(32) } %state) !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} { +define void @test.2(i32 %cspInit) !lgc.cps !1 !lgc.shaderstage !2 !continuation !6 !continuation.state !4 { ; CHECK-LABEL: define {{[^@]+}}@test.2 -; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META2]] !lgc.shaderstage [[META3]] { -; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to <2 x i32> -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 -; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr addrspace(5) [[VSP]], i32 -4 -; CHECK-NEXT: [[CPS_STATE:%.*]] = load { i32 }, ptr addrspace(5) [[TMP9]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = ptrtoint ptr addrspace(5) [[TMP9]] to i32 -; CHECK-NEXT: store i32 [[TMP10]], ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 +; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[CSPINIT:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META3]] !lgc.shaderstage [[META4]] !continuation [[META8:![0-9]+]] !continuation.state [[META6]] { +; CHECK-NEXT: AllocaSpillBB: +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], -12 +; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP9]], i32 0 +; CHECK-NEXT: [[N333:%.*]] = load i32, ptr addrspace(5) [[TMP10]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 ; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP11]], -12 -; CHECK-NEXT: [[P2:%.*]] = extractvalue { i32 } [[CPS_STATE]], 0 -; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP12]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP13]], i32 0 -; CHECK-NEXT: [[N333:%.*]] = load i32, ptr addrspace(5) [[TMP14]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i32 [[P2]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP15]], i32 0 -; CHECK-NEXT: [[N99:%.*]] = load i8, ptr addrspace(5) [[TMP16]], align 1 -; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP18:%.*]] = add i32 [[TMP17]], -12 -; CHECK-NEXT: store i32 [[TMP18]], ptr addrspace(5) [[TMP1]], align 4 +; CHECK-NEXT: store i32 [[TMP12]], ptr [[CSP]], align 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP20:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP19]], i32 0, 1 -; CHECK-NEXT: [[TMP21:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP20]], ptr addrspace(5) poison, 2 -; CHECK-NEXT: [[TMP22:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP21]], 1 -; CHECK-NEXT: [[TMP23:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP22]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP24:%.*]] = and i32 [[TMP23]], 7 -; CHECK-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { <3 x i32>, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP14:%.*]] = insertvalue { <3 x i32>, i32, i32 } [[TMP13]], i32 0, 1 +; CHECK-NEXT: [[TMP15:%.*]] = insertvalue { <3 x i32>, i32, i32 } [[TMP14]], i32 poison, 2 +; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { <3 x i32>, i32, i32 } [[TMP15]], 1 +; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP16]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP18:%.*]] = and i32 [[TMP17]], 7 +; CHECK-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 +; CHECK-NEXT: [[TMP20:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP19]]) +; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i32 [[TMP18]], 3 +; CHECK-NEXT: [[TMP22:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP21]]) +; CHECK-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 +; CHECK-NEXT: [[TMP24:%.*]] = select i1 [[TMP23]], i32 [[TMP22]], i32 [[TMP20]] +; CHECK-NEXT: [[TMP25:%.*]] = icmp eq i32 [[TMP18]], 2 ; CHECK-NEXT: [[TMP26:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP25]]) -; CHECK-NEXT: [[TMP27:%.*]] = icmp eq i32 [[TMP24]], 3 -; CHECK-NEXT: [[TMP28:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP27]]) -; CHECK-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 -; CHECK-NEXT: [[TMP30:%.*]] = select i1 [[TMP29]], i32 [[TMP28]], i32 [[TMP26]] -; CHECK-NEXT: [[TMP31:%.*]] = icmp eq i32 [[TMP24]], 2 -; CHECK-NEXT: [[TMP32:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP31]]) -; CHECK-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 -; CHECK-NEXT: [[TMP34:%.*]] = select i1 [[TMP33]], i32 [[TMP32]], i32 [[TMP30]] -; CHECK-NEXT: [[TMP35:%.*]] = icmp eq i32 [[TMP24]], 1 +; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 +; CHECK-NEXT: [[TMP28:%.*]] = select i1 [[TMP27]], i32 [[TMP26]], i32 [[TMP24]] +; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i32 [[TMP18]], 1 +; CHECK-NEXT: [[TMP30:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP29]]) +; CHECK-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 +; CHECK-NEXT: [[TMP32:%.*]] = select i1 [[TMP31]], i32 [[TMP30]], i32 [[TMP28]] +; CHECK-NEXT: [[TMP33:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP32]], i1 true) +; CHECK-NEXT: [[TMP34:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP17]], i32 [[TMP33]]) +; CHECK-NEXT: [[TMP35:%.*]] = icmp eq i32 [[TMP17]], [[TMP34]] ; CHECK-NEXT: [[TMP36:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP35]]) -; CHECK-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 -; CHECK-NEXT: [[TMP38:%.*]] = select i1 [[TMP37]], i32 [[TMP36]], i32 [[TMP34]] -; CHECK-NEXT: [[TMP39:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP38]], i1 true) -; CHECK-NEXT: [[TMP40:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP23]], i32 [[TMP39]]) -; CHECK-NEXT: [[TMP41:%.*]] = icmp eq i32 [[TMP23]], [[TMP40]] -; CHECK-NEXT: [[TMP42:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP41]]) -; CHECK-NEXT: [[TMP43:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP40]]) -; CHECK-NEXT: [[TMP44:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP42]]) -; CHECK-NEXT: [[TMP45:%.*]] = icmp eq i32 [[TMP43]], 0 -; CHECK-NEXT: br i1 [[TMP45]], label [[RET_BLOCK:%.*]], label [[CHAIN_BLOCK:%.*]] +; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP34]]) +; CHECK-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP36]]) +; CHECK-NEXT: [[TMP39:%.*]] = icmp eq i32 [[TMP37]], 0 +; CHECK-NEXT: br i1 [[TMP39]], label [[RET_BLOCK:%.*]], label [[CHAIN_BLOCK:%.*]] ; CHECK: chain.block: -; CHECK-NEXT: [[TMP46:%.*]] = and i32 [[TMP43]], -64 -; CHECK-NEXT: [[TMP47:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[TMP46]], i64 0 -; CHECK-NEXT: [[TMP48:%.*]] = bitcast <2 x i32> [[TMP47]] to i64 -; CHECK-NEXT: [[TMP49:%.*]] = inttoptr i64 [[TMP48]] to ptr -; CHECK-NEXT: [[TMP50:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP51:%.*]] = bitcast i64 [[TMP50]] to <2 x i32> -; CHECK-NEXT: [[TMP52:%.*]] = extractelement <2 x i32> [[TMP51]], i64 0 -; CHECK-NEXT: [[TMP53:%.*]] = extractelement <2 x i32> [[TMP51]], i64 1 -; CHECK-NEXT: [[TMP54:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP55:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP56:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[TMP52]], i64 1 -; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[TMP53]], i64 2 -; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD0]], i64 3 -; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD1]], i64 4 -; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD2]], i64 5 -; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD3]], i64 6 -; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[TMP54]], i64 16 -; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[TMP55]], i64 17 -; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[TMP56]], i64 18 -; CHECK-NEXT: [[TMP76:%.*]] = insertelement <20 x i32> [[TMP75]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5) }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5s(ptr inreg [[TMP49]], i32 inreg [[TMP44]], <20 x i32> inreg [[TMP76]], { <3 x i32>, i32, ptr addrspace(5) } [[TMP21]], i32 0) +; CHECK-NEXT: [[TMP40:%.*]] = and i32 [[TMP37]], -64 +; CHECK-NEXT: [[TMP41:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP40]], i64 0 +; CHECK-NEXT: [[TMP42:%.*]] = bitcast <2 x i32> [[TMP41]] to i64 +; CHECK-NEXT: [[TMP43:%.*]] = inttoptr i64 [[TMP42]] to ptr +; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP45:%.*]] = bitcast i64 [[TMP44]] to <2 x i32> +; CHECK-NEXT: [[TMP46:%.*]] = extractelement <2 x i32> [[TMP45]], i64 0 +; CHECK-NEXT: [[TMP47:%.*]] = extractelement <2 x i32> [[TMP45]], i64 1 +; CHECK-NEXT: [[TMP48:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP49:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP50:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP51:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP52:%.*]] = insertelement <20 x i32> [[TMP51]], i32 [[TMP46]], i64 1 +; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> [[TMP52]], i32 [[TMP47]], i64 2 +; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[PAD0]], i64 3 +; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> [[TMP54]], i32 [[PAD1]], i64 4 +; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[PAD2]], i64 5 +; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[PAD3]], i64 6 +; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[PAD4]], i64 7 +; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD5]], i64 8 +; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[TMP48]], i64 16 +; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[TMP49]], i64 17 +; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[TMP50]], i64 18 +; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32s(ptr inreg [[TMP43]], i32 inreg [[TMP38]], <20 x i32> inreg [[TMP70]], { <3 x i32>, i32, i32 } [[TMP15]], i32 0) ; CHECK-NEXT: unreachable ; CHECK: ret.block: ; CHECK-NEXT: ret void ; - %mem = call ptr addrspace(32) @lgc.cps.peek(i32 10) ; round up to 12 during lowering - %p2 = extractvalue { ptr addrspace(32) } %state, 0 - - %n333 = load i32, ptr addrspace(32) %mem - %n99 = load i8, ptr addrspace(32) %p2 - - call void @lgc.cps.free(i32 10) ; round up to 12 during lowering +AllocaSpillBB: + %csp = alloca i32, align 4 + store i32 %cspInit, ptr %csp, align 4 + %0 = load i32, ptr %csp, align 4 + %1 = add i32 %0, -12 + %2 = inttoptr i32 %1 to ptr addrspace(5) + %3 = getelementptr i8, ptr addrspace(5) %2, i32 0 + %n333 = load i32, ptr addrspace(5) %3, align 4 + %4 = load i32, ptr %csp, align 4 + %5 = add i32 %4, -12 + store i32 %5, ptr %csp, align 4 ret void } -; Dummy test to show behavior with lowering of non-constant GEP indices. -define void @test.gep({} %unused) !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} { +define void @test.gep(i32 %cspInit) !lgc.cps !1 !lgc.shaderstage !2 !continuation !7 !continuation.state !4 { ; CHECK-LABEL: define {{[^@]+}}@test.gep -; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP1:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META2]] !lgc.shaderstage [[META3]] { -; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to <2 x i32> -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 -; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr addrspace(5) [[VSP1]] to i32 -; CHECK-NEXT: store i32 [[TMP9]], ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], 12 -; CHECK-NEXT: store i32 [[TMP11]], ptr addrspace(5) [[TMP1]], align 4 +; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[CSPINIT:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META3]] !lgc.shaderstage [[META4]] !continuation [[META9:![0-9]+]] !continuation.state [[META6]] { +; CHECK-NEXT: AllocaSpillBB: +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], 12 +; CHECK-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 ; CHECK-NEXT: [[STACK_EL0:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 0) -; CHECK-NEXT: [[TMP12:%.*]] = mul i32 [[STACK_EL0]], 12 -; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP10]], [[TMP12]] -; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP13]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP15]], i32 0 -; CHECK-NEXT: store i32 [[TMP14]], ptr addrspace(5) [[TMP16]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[STACK_EL0]], 24 +; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP7]], [[TMP9]] +; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP12]], i32 0 +; CHECK-NEXT: store i32 [[TMP11]], ptr addrspace(5) [[TMP13]], align 4 ; CHECK-NEXT: [[STACK_EL1:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 1) -; CHECK-NEXT: [[TMP17:%.*]] = mul i32 [[STACK_EL1]], 12 -; CHECK-NEXT: [[TMP18:%.*]] = add i32 [[TMP10]], [[TMP17]] -; CHECK-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP20:%.*]] = add i32 [[TMP19]], -4 -; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP18]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP21]], i32 0 -; CHECK-NEXT: store i32 [[TMP20]], ptr addrspace(5) [[TMP22]], align 4 +; CHECK-NEXT: [[TMP14:%.*]] = mul i32 [[STACK_EL1]], 24 +; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP7]], [[TMP14]] +; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP17:%.*]] = add i32 [[TMP16]], -4 +; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP15]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP18]], i32 0 +; CHECK-NEXT: store i32 [[TMP17]], ptr addrspace(5) [[TMP19]], align 4 ; CHECK-NEXT: [[STACK_EL2:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 2) ; CHECK-NEXT: [[STACK_EL2_DIV:%.*]] = sdiv i32 [[STACK_EL2]], 2 -; CHECK-NEXT: [[TMP23:%.*]] = add i32 [[TMP10]], 4 -; CHECK-NEXT: [[TMP24:%.*]] = mul i32 [[STACK_EL2_DIV]], 12 -; CHECK-NEXT: [[TMP25:%.*]] = add i32 [[TMP23]], [[TMP24]] -; CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP27:%.*]] = add i32 [[TMP26]], -8 -; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP25]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP28]], i32 0 -; CHECK-NEXT: store i32 [[TMP27]], ptr addrspace(5) [[TMP29]], align 4 -; CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP30]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP20:%.*]] = add i32 [[TMP7]], 8 +; CHECK-NEXT: [[TMP21:%.*]] = mul i32 [[STACK_EL2_DIV]], 24 +; CHECK-NEXT: [[TMP22:%.*]] = add i32 [[TMP20]], [[TMP21]] +; CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP24:%.*]] = add i32 [[TMP23]], -8 +; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP22]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP25]], i32 0 +; CHECK-NEXT: store i32 [[TMP24]], ptr addrspace(5) [[TMP26]], align 4 +; CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[CSP]], align 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP32:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP33:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP32]], i32 add (i32 ptrtoint (ptr @test.1 to i32), i32 1), 1 -; CHECK-NEXT: [[TMP34:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP33]], ptr addrspace(5) [[TMP31]], 2 -; CHECK-NEXT: [[TMP35:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP34]], i32 [[TMP27]], 3 -; CHECK-NEXT: [[TMP36:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP35]], i32 [[TMP27]], 4 -; CHECK-NEXT: [[TMP37:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP36]], 1 -; CHECK-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP37]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP39:%.*]] = and i32 [[TMP38]], 7 -; CHECK-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 -; CHECK-NEXT: [[TMP41:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP40]]) -; CHECK-NEXT: [[TMP42:%.*]] = icmp eq i32 [[TMP39]], 3 -; CHECK-NEXT: [[TMP43:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP42]]) -; CHECK-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 -; CHECK-NEXT: [[TMP45:%.*]] = select i1 [[TMP44]], i32 [[TMP43]], i32 [[TMP41]] -; CHECK-NEXT: [[TMP46:%.*]] = icmp eq i32 [[TMP39]], 2 -; CHECK-NEXT: [[TMP47:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP46]]) -; CHECK-NEXT: [[TMP48:%.*]] = icmp ne i32 [[TMP47]], 0 -; CHECK-NEXT: [[TMP49:%.*]] = select i1 [[TMP48]], i32 [[TMP47]], i32 [[TMP45]] -; CHECK-NEXT: [[TMP50:%.*]] = icmp eq i32 [[TMP39]], 1 -; CHECK-NEXT: [[TMP51:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP50]]) -; CHECK-NEXT: [[TMP52:%.*]] = icmp ne i32 [[TMP51]], 0 -; CHECK-NEXT: [[TMP53:%.*]] = select i1 [[TMP52]], i32 [[TMP51]], i32 [[TMP49]] -; CHECK-NEXT: [[TMP54:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP53]], i1 true) -; CHECK-NEXT: [[TMP55:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP38]], i32 [[TMP54]]) -; CHECK-NEXT: [[TMP56:%.*]] = icmp eq i32 [[TMP38]], [[TMP55]] -; CHECK-NEXT: [[TMP57:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP56]]) -; CHECK-NEXT: [[TMP58:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP55]]) -; CHECK-NEXT: [[TMP59:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP57]]) -; CHECK-NEXT: [[TMP60:%.*]] = and i32 [[TMP58]], -64 -; CHECK-NEXT: [[TMP61:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[TMP60]], i64 0 -; CHECK-NEXT: [[TMP62:%.*]] = bitcast <2 x i32> [[TMP61]] to i64 -; CHECK-NEXT: [[TMP63:%.*]] = inttoptr i64 [[TMP62]] to ptr -; CHECK-NEXT: [[TMP64:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP65:%.*]] = bitcast i64 [[TMP64]] to <2 x i32> -; CHECK-NEXT: [[TMP66:%.*]] = extractelement <2 x i32> [[TMP65]], i64 0 -; CHECK-NEXT: [[TMP67:%.*]] = extractelement <2 x i32> [[TMP65]], i64 1 -; CHECK-NEXT: [[TMP68:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP69:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP70:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[TMP66]], i64 1 -; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[TMP67]], i64 2 -; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[PAD0]], i64 3 -; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[PAD1]], i64 4 -; CHECK-NEXT: [[TMP76:%.*]] = insertelement <20 x i32> [[TMP75]], i32 [[PAD2]], i64 5 -; CHECK-NEXT: [[TMP77:%.*]] = insertelement <20 x i32> [[TMP76]], i32 [[PAD3]], i64 6 -; CHECK-NEXT: [[TMP78:%.*]] = insertelement <20 x i32> [[TMP77]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP79:%.*]] = insertelement <20 x i32> [[TMP78]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP80:%.*]] = insertelement <20 x i32> [[TMP79]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP81:%.*]] = insertelement <20 x i32> [[TMP80]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP82:%.*]] = insertelement <20 x i32> [[TMP81]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP83:%.*]] = insertelement <20 x i32> [[TMP82]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP84:%.*]] = insertelement <20 x i32> [[TMP83]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP85:%.*]] = insertelement <20 x i32> [[TMP84]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP86:%.*]] = insertelement <20 x i32> [[TMP85]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP87:%.*]] = insertelement <20 x i32> [[TMP86]], i32 [[TMP68]], i64 16 -; CHECK-NEXT: [[TMP88:%.*]] = insertelement <20 x i32> [[TMP87]], i32 [[TMP69]], i64 17 -; CHECK-NEXT: [[TMP89:%.*]] = insertelement <20 x i32> [[TMP88]], i32 [[TMP70]], i64 18 -; CHECK-NEXT: [[TMP90:%.*]] = insertelement <20 x i32> [[TMP89]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5), i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5i32i32s(ptr inreg [[TMP63]], i32 inreg [[TMP59]], <20 x i32> inreg [[TMP90]], { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP36]], i32 0) +; CHECK-NEXT: [[TMP28:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP29:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP28]], i32 add (i32 ptrtoint (ptr @test.1 to i32), i32 1), 1 +; CHECK-NEXT: [[TMP30:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP29]], i32 [[TMP27]], 2 +; CHECK-NEXT: [[TMP31:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP30]], i32 poison, 3 +; CHECK-NEXT: [[TMP32:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP31]], i32 [[TMP24]], 4 +; CHECK-NEXT: [[TMP33:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP32]], i32 [[TMP24]], 5 +; CHECK-NEXT: [[TMP34:%.*]] = extractvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP33]], 1 +; CHECK-NEXT: [[TMP35:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP34]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP36:%.*]] = and i32 [[TMP35]], 7 +; CHECK-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 +; CHECK-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP37]]) +; CHECK-NEXT: [[TMP39:%.*]] = icmp eq i32 [[TMP36]], 3 +; CHECK-NEXT: [[TMP40:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP39]]) +; CHECK-NEXT: [[TMP41:%.*]] = icmp ne i32 [[TMP40]], 0 +; CHECK-NEXT: [[TMP42:%.*]] = select i1 [[TMP41]], i32 [[TMP40]], i32 [[TMP38]] +; CHECK-NEXT: [[TMP43:%.*]] = icmp eq i32 [[TMP36]], 2 +; CHECK-NEXT: [[TMP44:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP43]]) +; CHECK-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], 0 +; CHECK-NEXT: [[TMP46:%.*]] = select i1 [[TMP45]], i32 [[TMP44]], i32 [[TMP42]] +; CHECK-NEXT: [[TMP47:%.*]] = icmp eq i32 [[TMP36]], 1 +; CHECK-NEXT: [[TMP48:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP47]]) +; CHECK-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0 +; CHECK-NEXT: [[TMP50:%.*]] = select i1 [[TMP49]], i32 [[TMP48]], i32 [[TMP46]] +; CHECK-NEXT: [[TMP51:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP50]], i1 true) +; CHECK-NEXT: [[TMP52:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP35]], i32 [[TMP51]]) +; CHECK-NEXT: [[TMP53:%.*]] = icmp eq i32 [[TMP35]], [[TMP52]] +; CHECK-NEXT: [[TMP54:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP53]]) +; CHECK-NEXT: [[TMP55:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP52]]) +; CHECK-NEXT: [[TMP56:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP54]]) +; CHECK-NEXT: [[TMP57:%.*]] = and i32 [[TMP55]], -64 +; CHECK-NEXT: [[TMP58:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP57]], i64 0 +; CHECK-NEXT: [[TMP59:%.*]] = bitcast <2 x i32> [[TMP58]] to i64 +; CHECK-NEXT: [[TMP60:%.*]] = inttoptr i64 [[TMP59]] to ptr +; CHECK-NEXT: [[TMP61:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP62:%.*]] = bitcast i64 [[TMP61]] to <2 x i32> +; CHECK-NEXT: [[TMP63:%.*]] = extractelement <2 x i32> [[TMP62]], i64 0 +; CHECK-NEXT: [[TMP64:%.*]] = extractelement <2 x i32> [[TMP62]], i64 1 +; CHECK-NEXT: [[TMP65:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP66:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP67:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[TMP63]], i64 1 +; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[TMP64]], i64 2 +; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[PAD0]], i64 3 +; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[PAD1]], i64 4 +; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[PAD2]], i64 5 +; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[PAD3]], i64 6 +; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[PAD4]], i64 7 +; CHECK-NEXT: [[TMP76:%.*]] = insertelement <20 x i32> [[TMP75]], i32 [[PAD5]], i64 8 +; CHECK-NEXT: [[TMP77:%.*]] = insertelement <20 x i32> [[TMP76]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP78:%.*]] = insertelement <20 x i32> [[TMP77]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP79:%.*]] = insertelement <20 x i32> [[TMP78]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP80:%.*]] = insertelement <20 x i32> [[TMP79]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP81:%.*]] = insertelement <20 x i32> [[TMP80]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP82:%.*]] = insertelement <20 x i32> [[TMP81]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP83:%.*]] = insertelement <20 x i32> [[TMP82]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP84:%.*]] = insertelement <20 x i32> [[TMP83]], i32 [[TMP65]], i64 16 +; CHECK-NEXT: [[TMP85:%.*]] = insertelement <20 x i32> [[TMP84]], i32 [[TMP66]], i64 17 +; CHECK-NEXT: [[TMP86:%.*]] = insertelement <20 x i32> [[TMP85]], i32 [[TMP67]], i64 18 +; CHECK-NEXT: [[TMP87:%.*]] = insertelement <20 x i32> [[TMP86]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32, i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32i32i32i32s(ptr inreg [[TMP60]], i32 inreg [[TMP56]], <20 x i32> inreg [[TMP87]], { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP33]], i32 0) ; CHECK-NEXT: unreachable ; - %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) ; round up to 12 during lowering - +AllocaSpillBB: + %csp = alloca i32, align 4 + store i32 %cspInit, ptr %csp, align 4 + %0 = load i32, ptr %csp, align 4 + %1 = add i32 %0, 12 + store i32 %1, ptr %csp, align 4 %stack.el0 = call i32 @lgc.cps.get.dummy.index(i32 0) - %1 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el0 - %vsp = call ptr addrspace(32) @lgc.cps.get.vsp() - %vsp.i = ptrtoint ptr addrspace(32) %vsp to i32 - store i32 %vsp.i, ptr addrspace(32) %1 - + %2 = mul i32 %stack.el0, 24 + %3 = add i32 %0, %2 + %4 = load i32, ptr %csp, align 4 + %5 = inttoptr i32 %3 to ptr addrspace(5) + %6 = getelementptr i8, ptr addrspace(5) %5, i32 0 + store i32 %4, ptr addrspace(5) %6, align 4 %stack.el1 = call i32 @lgc.cps.get.dummy.index(i32 1) - %2 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el1 - %vsp.2 = call ptr addrspace(32) @lgc.cps.peek(i32 4) - %vsp.2.i = ptrtoint ptr addrspace(32) %vsp.2 to i32 - store i32 %vsp.2.i, ptr addrspace(32) %2 - + %7 = mul i32 %stack.el1, 24 + %8 = add i32 %0, %7 + %9 = load i32, ptr %csp, align 4 + %10 = add i32 %9, -4 + %11 = inttoptr i32 %8 to ptr addrspace(5) + %12 = getelementptr i8, ptr addrspace(5) %11, i32 0 + store i32 %10, ptr addrspace(5) %12, align 4 %stack.el2 = call i32 @lgc.cps.get.dummy.index(i32 2) %stack.el2.div = sdiv i32 %stack.el2, 2 - %3 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el2.div, i32 1 - %vsp.3 = call ptr addrspace(32) @lgc.cps.peek(i32 8) - %vsp.3.i = ptrtoint ptr addrspace(32) %vsp.3 to i32 - store i32 %vsp.3.i, ptr addrspace(32) %3 - - %cr = call i32 @lgc.cps.as.continuation.reference__i32(ptr @test.1) - call void (...) @lgc.cps.jump(i32 %cr, i32 2, {} poison, i32 poison, ptr addrspace(32) %vsp.3, i32 %vsp.3.i) + %13 = add i32 %0, 8 + %14 = mul i32 %stack.el2.div, 24 + %15 = add i32 %13, %14 + %16 = load i32, ptr %csp, align 4 + %17 = add i32 %16, -8 + %18 = inttoptr i32 %15 to ptr addrspace(5) + %19 = getelementptr i8, ptr addrspace(5) %18, i32 0 + store i32 %17, ptr addrspace(5) %19, align 4 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + %20 = load i32, ptr %csp, align 4 + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 %20, i32 poison, i32 %17, i32 %17) unreachable } -; Dummy test to show behavior with lowering of nested GEPs. -define void @test.nested.gep({} %unused) !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} { +define void @test.nested.gep(i32 %cspInit) !lgc.cps !1 !lgc.shaderstage !2 !continuation !8 !continuation.state !4 { ; CHECK-LABEL: define {{[^@]+}}@test.nested.gep -; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP1:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META2]] !lgc.shaderstage [[META3]] { -; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to <2 x i32> -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 -; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr addrspace(5) [[VSP1]] to i32 -; CHECK-NEXT: store i32 [[TMP9]], ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], 12 -; CHECK-NEXT: store i32 [[TMP11]], ptr addrspace(5) [[TMP1]], align 4 +; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[CSPINIT:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META3]] !lgc.shaderstage [[META4]] !continuation [[META10:![0-9]+]] !continuation.state [[META6]] { +; CHECK-NEXT: AllocaSpillBB: +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], 12 +; CHECK-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 ; CHECK-NEXT: [[STACK_EL0:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 0) -; CHECK-NEXT: [[TMP12:%.*]] = mul i32 [[STACK_EL0]], 12 -; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP10]], [[TMP12]] -; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP13]], 8 -; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP16]], i32 0 -; CHECK-NEXT: store i32 [[TMP15]], ptr addrspace(5) [[TMP17]], align 4 -; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP18]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = mul i32 [[STACK_EL0]], 24 +; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP7]], [[TMP9]] +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], 16 +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP11]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP13]], i32 0 +; CHECK-NEXT: store i32 [[TMP12]], ptr addrspace(5) [[TMP14]], align 4 +; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP20:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP21:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP20]], i32 add (i32 ptrtoint (ptr @test.1 to i32), i32 1), 1 -; CHECK-NEXT: [[TMP22:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP21]], ptr addrspace(5) [[TMP19]], 2 -; CHECK-NEXT: [[TMP23:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP22]], i32 [[TMP15]], 3 -; CHECK-NEXT: [[TMP24:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP23]], i32 [[TMP15]], 4 -; CHECK-NEXT: [[TMP25:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP24]], 1 -; CHECK-NEXT: [[TMP26:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP25]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP27:%.*]] = and i32 [[TMP26]], 7 -; CHECK-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 -; CHECK-NEXT: [[TMP29:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP28]]) -; CHECK-NEXT: [[TMP30:%.*]] = icmp eq i32 [[TMP27]], 3 -; CHECK-NEXT: [[TMP31:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP30]]) -; CHECK-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 -; CHECK-NEXT: [[TMP33:%.*]] = select i1 [[TMP32]], i32 [[TMP31]], i32 [[TMP29]] -; CHECK-NEXT: [[TMP34:%.*]] = icmp eq i32 [[TMP27]], 2 -; CHECK-NEXT: [[TMP35:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP34]]) -; CHECK-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 -; CHECK-NEXT: [[TMP37:%.*]] = select i1 [[TMP36]], i32 [[TMP35]], i32 [[TMP33]] -; CHECK-NEXT: [[TMP38:%.*]] = icmp eq i32 [[TMP27]], 1 -; CHECK-NEXT: [[TMP39:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP38]]) -; CHECK-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 -; CHECK-NEXT: [[TMP41:%.*]] = select i1 [[TMP40]], i32 [[TMP39]], i32 [[TMP37]] -; CHECK-NEXT: [[TMP42:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP41]], i1 true) -; CHECK-NEXT: [[TMP43:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP26]], i32 [[TMP42]]) -; CHECK-NEXT: [[TMP44:%.*]] = icmp eq i32 [[TMP26]], [[TMP43]] -; CHECK-NEXT: [[TMP45:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP44]]) -; CHECK-NEXT: [[TMP46:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP43]]) -; CHECK-NEXT: [[TMP47:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP45]]) -; CHECK-NEXT: [[TMP48:%.*]] = and i32 [[TMP46]], -64 -; CHECK-NEXT: [[TMP49:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[TMP48]], i64 0 -; CHECK-NEXT: [[TMP50:%.*]] = bitcast <2 x i32> [[TMP49]] to i64 -; CHECK-NEXT: [[TMP51:%.*]] = inttoptr i64 [[TMP50]] to ptr -; CHECK-NEXT: [[TMP52:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP53:%.*]] = bitcast i64 [[TMP52]] to <2 x i32> -; CHECK-NEXT: [[TMP54:%.*]] = extractelement <2 x i32> [[TMP53]], i64 0 -; CHECK-NEXT: [[TMP55:%.*]] = extractelement <2 x i32> [[TMP53]], i64 1 -; CHECK-NEXT: [[TMP56:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP57:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP58:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[TMP54]], i64 1 -; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[TMP55]], i64 2 -; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD0]], i64 3 -; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD1]], i64 4 -; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD2]], i64 5 -; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD3]], i64 6 -; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[TMP56]], i64 16 -; CHECK-NEXT: [[TMP76:%.*]] = insertelement <20 x i32> [[TMP75]], i32 [[TMP57]], i64 17 -; CHECK-NEXT: [[TMP77:%.*]] = insertelement <20 x i32> [[TMP76]], i32 [[TMP58]], i64 18 -; CHECK-NEXT: [[TMP78:%.*]] = insertelement <20 x i32> [[TMP77]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5), i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5i32i32s(ptr inreg [[TMP51]], i32 inreg [[TMP47]], <20 x i32> inreg [[TMP78]], { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP24]], i32 0) +; CHECK-NEXT: [[TMP16:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP17:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP16]], i32 add (i32 ptrtoint (ptr @test.1 to i32), i32 1), 1 +; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP17]], i32 [[TMP15]], 2 +; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP18]], i32 poison, 3 +; CHECK-NEXT: [[TMP20:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP19]], i32 [[TMP12]], 4 +; CHECK-NEXT: [[TMP21:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP20]], i32 [[TMP12]], 5 +; CHECK-NEXT: [[TMP22:%.*]] = extractvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP21]], 1 +; CHECK-NEXT: [[TMP23:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP22]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP24:%.*]] = and i32 [[TMP23]], 7 +; CHECK-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 +; CHECK-NEXT: [[TMP26:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP25]]) +; CHECK-NEXT: [[TMP27:%.*]] = icmp eq i32 [[TMP24]], 3 +; CHECK-NEXT: [[TMP28:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP27]]) +; CHECK-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 +; CHECK-NEXT: [[TMP30:%.*]] = select i1 [[TMP29]], i32 [[TMP28]], i32 [[TMP26]] +; CHECK-NEXT: [[TMP31:%.*]] = icmp eq i32 [[TMP24]], 2 +; CHECK-NEXT: [[TMP32:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP31]]) +; CHECK-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 +; CHECK-NEXT: [[TMP34:%.*]] = select i1 [[TMP33]], i32 [[TMP32]], i32 [[TMP30]] +; CHECK-NEXT: [[TMP35:%.*]] = icmp eq i32 [[TMP24]], 1 +; CHECK-NEXT: [[TMP36:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP35]]) +; CHECK-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0 +; CHECK-NEXT: [[TMP38:%.*]] = select i1 [[TMP37]], i32 [[TMP36]], i32 [[TMP34]] +; CHECK-NEXT: [[TMP39:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP38]], i1 true) +; CHECK-NEXT: [[TMP40:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP23]], i32 [[TMP39]]) +; CHECK-NEXT: [[TMP41:%.*]] = icmp eq i32 [[TMP23]], [[TMP40]] +; CHECK-NEXT: [[TMP42:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP41]]) +; CHECK-NEXT: [[TMP43:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP40]]) +; CHECK-NEXT: [[TMP44:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP42]]) +; CHECK-NEXT: [[TMP45:%.*]] = and i32 [[TMP43]], -64 +; CHECK-NEXT: [[TMP46:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP45]], i64 0 +; CHECK-NEXT: [[TMP47:%.*]] = bitcast <2 x i32> [[TMP46]] to i64 +; CHECK-NEXT: [[TMP48:%.*]] = inttoptr i64 [[TMP47]] to ptr +; CHECK-NEXT: [[TMP49:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP50:%.*]] = bitcast i64 [[TMP49]] to <2 x i32> +; CHECK-NEXT: [[TMP51:%.*]] = extractelement <2 x i32> [[TMP50]], i64 0 +; CHECK-NEXT: [[TMP52:%.*]] = extractelement <2 x i32> [[TMP50]], i64 1 +; CHECK-NEXT: [[TMP53:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP54:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP55:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[TMP51]], i64 1 +; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[TMP52]], i64 2 +; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD0]], i64 3 +; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD1]], i64 4 +; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD2]], i64 5 +; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD3]], i64 6 +; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD4]], i64 7 +; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD5]], i64 8 +; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[TMP53]], i64 16 +; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[TMP54]], i64 17 +; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[TMP55]], i64 18 +; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32, i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32i32i32i32s(ptr inreg [[TMP48]], i32 inreg [[TMP44]], <20 x i32> inreg [[TMP75]], { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP21]], i32 0) ; CHECK-NEXT: unreachable ; - %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) ; round up to 12 during lowering - +AllocaSpillBB: + %csp = alloca i32, align 4 + store i32 %cspInit, ptr %csp, align 4 + %0 = load i32, ptr %csp, align 4 + %1 = add i32 %0, 12 + store i32 %1, ptr %csp, align 4 %stack.el0 = call i32 @lgc.cps.get.dummy.index(i32 0) - %gep.base = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el0 - %1 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %gep.base, i32 0, i32 2 - %vsp = call ptr addrspace(32) @lgc.cps.get.vsp() - %vsp.i = ptrtoint ptr addrspace(32) %vsp to i32 - store i32 %vsp.i, ptr addrspace(32) %1 - - %cr = call i32 @lgc.cps.as.continuation.reference__i32(ptr @test.1) - call void (...) @lgc.cps.jump(i32 %cr, i32 2, {} poison, i32 poison, ptr addrspace(32) %vsp, i32 %vsp.i) + %2 = mul i32 %stack.el0, 24 + %3 = add i32 %0, %2 + %4 = add i32 %3, 16 + %5 = load i32, ptr %csp, align 4 + %6 = inttoptr i32 %4 to ptr addrspace(5) + %7 = getelementptr i8, ptr addrspace(5) %6, i32 0 + store i32 %5, ptr addrspace(5) %7, align 4 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + %8 = load i32, ptr %csp, align 4 + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 %8, i32 poison, i32 %5, i32 %5) unreachable } -define void @test.i64.reference({} %no_state, ptr addrspace(32) %p2, i32 %q1) !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} { -; CHECK-LABEL: define {{[^@]+}}@test.i64.reference -; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP:%.*]], i32 [[P2:%.*]], i32 [[Q1:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META2]] !lgc.shaderstage [[META3]] { -; CHECK-NEXT: [[TMP1:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to <2 x i32> -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 -; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP7:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> -; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr addrspace(5) [[VSP]] to i32 -; CHECK-NEXT: store i32 [[TMP9]], ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i32 [[Q1]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP10]], i32 0 -; CHECK-NEXT: [[N111:%.*]] = load i32, ptr addrspace(5) [[TMP11]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i32 [[P2]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP12]], i32 0 -; CHECK-NEXT: [[N99:%.*]] = load i8, ptr addrspace(5) [[TMP13]], align 1 -; CHECK-NEXT: [[CR:%.*]] = trunc i64 add (i64 ptrtoint (ptr @test.2 to i64), i64 1) to i32 -; CHECK-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 -; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(5) -; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] -; CHECK: tail.block: -; CHECK-NEXT: [[TMP16:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP17:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP16]], i32 [[CR]], 1 -; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP17]], ptr addrspace(5) [[TMP15]], 2 -; CHECK-NEXT: [[TMP19:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5) } [[TMP18]], 1 -; CHECK-NEXT: [[TMP20:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP19]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP21:%.*]] = and i32 [[TMP20]], 7 -; CHECK-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 -; CHECK-NEXT: [[TMP23:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP22]]) -; CHECK-NEXT: [[TMP24:%.*]] = icmp eq i32 [[TMP21]], 3 -; CHECK-NEXT: [[TMP25:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP24]]) -; CHECK-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 -; CHECK-NEXT: [[TMP27:%.*]] = select i1 [[TMP26]], i32 [[TMP25]], i32 [[TMP23]] -; CHECK-NEXT: [[TMP28:%.*]] = icmp eq i32 [[TMP21]], 2 -; CHECK-NEXT: [[TMP29:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP28]]) -; CHECK-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 -; CHECK-NEXT: [[TMP31:%.*]] = select i1 [[TMP30]], i32 [[TMP29]], i32 [[TMP27]] -; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i32 [[TMP21]], 1 -; CHECK-NEXT: [[TMP33:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP32]]) -; CHECK-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 -; CHECK-NEXT: [[TMP35:%.*]] = select i1 [[TMP34]], i32 [[TMP33]], i32 [[TMP31]] -; CHECK-NEXT: [[TMP36:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP35]], i1 true) -; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP20]], i32 [[TMP36]]) -; CHECK-NEXT: [[TMP38:%.*]] = icmp eq i32 [[TMP20]], [[TMP37]] -; CHECK-NEXT: [[TMP39:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP38]]) -; CHECK-NEXT: [[TMP40:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP37]]) -; CHECK-NEXT: [[TMP41:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP39]]) -; CHECK-NEXT: [[TMP42:%.*]] = and i32 [[TMP40]], -64 -; CHECK-NEXT: [[TMP43:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[TMP42]], i64 0 -; CHECK-NEXT: [[TMP44:%.*]] = bitcast <2 x i32> [[TMP43]] to i64 -; CHECK-NEXT: [[TMP45:%.*]] = inttoptr i64 [[TMP44]] to ptr -; CHECK-NEXT: [[TMP46:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP47:%.*]] = bitcast i64 [[TMP46]] to <2 x i32> -; CHECK-NEXT: [[TMP48:%.*]] = extractelement <2 x i32> [[TMP47]], i64 0 -; CHECK-NEXT: [[TMP49:%.*]] = extractelement <2 x i32> [[TMP47]], i64 1 -; CHECK-NEXT: [[TMP50:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP51:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP52:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[TMP48]], i64 1 -; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> [[TMP54]], i32 [[TMP49]], i64 2 -; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[PAD0]], i64 3 -; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[PAD1]], i64 4 -; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[PAD2]], i64 5 -; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD3]], i64 6 -; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[TMP50]], i64 16 -; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[TMP51]], i64 17 -; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[TMP52]], i64 18 -; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5) }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5s(ptr inreg [[TMP45]], i32 inreg [[TMP41]], <20 x i32> inreg [[TMP72]], { <3 x i32>, i32, ptr addrspace(5) } [[TMP18]], i32 0) -; CHECK-NEXT: unreachable -; - %p1 = inttoptr i32 %q1 to ptr addrspace(32) - %n111 = load i32, ptr addrspace(32) %p1 - %n99 = load i8, ptr addrspace(32) %p2 +declare !continuation !3 { ptr, ptr } @continuation.prototype.test.0(ptr, i1) - %cr64 = call i64 @lgc.cps.as.continuation.reference__i64(ptr @test.2) - %cr = trunc i64 %cr64 to i32 - call void (...) @lgc.cps.jump(i32 %cr, i32 2, {} poison, i32 poison) - unreachable -} +declare ptr @continuation.malloc(i32) -; -; -; -; -; -; -; -; -; -; -; +declare void @continuation.free(ptr) + +declare token @llvm.coro.id.retcon(i32, i32, ptr, ptr, ptr, ptr) #1 + +declare ptr @llvm.coro.begin(token, ptr writeonly) #1 + +declare !continuation !5 { ptr, ptr } @continuation.prototype.test.1(ptr, i1) + +declare !continuation !6 { ptr, ptr } @continuation.prototype.test.2(ptr, i1) + +declare !continuation !7 { ptr, ptr } @continuation.prototype.test.gep(ptr, i1) + +declare !continuation !8 { ptr, ptr } @continuation.prototype.test.nested.gep(ptr, i1) + +attributes #0 = { noreturn } +attributes #1 = { nounwind } + +!continuation.stackAddrspace = !{!0} + +!0 = !{i32 5} +!1 = !{i32 1} +!2 = !{i32 7} +!3 = !{ptr @test.0} +!4 = !{i32 0} +!5 = !{ptr @test.1} +!6 = !{ptr @test.2} +!7 = !{ptr @test.gep} +!8 = !{ptr @test.nested.gep} diff --git a/lgc/test/Transforms/CpsLowering/cps-unify-exits.lgc b/lgc/test/Transforms/CpsLowering/cps-unify-exits.lgc index e38b780fe7..6b9eba1f1c 100644 --- a/lgc/test/Transforms/CpsLowering/cps-unify-exits.lgc +++ b/lgc/test/Transforms/CpsLowering/cps-unify-exits.lgc @@ -1,256 +1,231 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --function-signature ; RUN: lgc -mcpu=gfx1030 -o - -passes="require,lgc-mutate-entry-point" %s | FileCheck --check-prefixes=CHECK %s -declare void @lgc.cps.jump(...) noreturn +declare void @lgc.cps.jump(...) #0 -define void @unify_jumps({i32} %state, i32 %arg, ptr %table) !lgc.cps !0 !lgc.shaderstage !{i32 7} { +define void @unify_jumps(i32 %arg, ptr %table) !lgc.cps !1 !lgc.shaderstage !2 { ; CHECK-LABEL: define {{[^@]+}}@unify_jumps -; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP:%.*]], i32 [[ARG:%.*]], ptr [[TABLE:%.*]]) #[[ATTR1:[0-9]+]] align 64 !lgc.cps [[META2:![0-9]+]] !lgc.shaderstage [[META3:![0-9]+]] { +; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[ARG:%.*]], ptr [[TABLE:%.*]]) #[[ATTR1:[0-9]+]] align 64 !lgc.cps [[META3:![0-9]+]] !lgc.shaderstage [[META4:![0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[TMP1]] to <2 x i32> -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[TMP6]] to <2 x i32> -; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr addrspace(5) [[VSP]], i32 -4 -; CHECK-NEXT: [[CPS_STATE:%.*]] = load { i32 }, ptr addrspace(5) [[TMP8]], align 4, !amdgpu.last.use [[META4:![0-9]+]] -; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr addrspace(5) [[TMP8]] to i32 -; CHECK-NEXT: store i32 [[TMP9]], ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[V:%.*]] = extractvalue { i32 } [[CPS_STATE]], 0 -; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[V]], 3 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ARG]], 3 ; CHECK-NEXT: br i1 [[COND]], label [[THEN:%.*]], label [[ELSE:%.*]] ; CHECK: then: ; CHECK-NEXT: [[TABLE_0:%.*]] = getelementptr i32, ptr [[TABLE]], i32 0 ; CHECK-NEXT: [[CR_THEN:%.*]] = load i32, ptr [[TABLE_0]], align 4 ; CHECK-NEXT: [[THEN_ARG:%.*]] = add i32 [[ARG]], 1 -; CHECK-NEXT: [[V_THEN:%.*]] = mul i32 [[V]], 2 -; CHECK-NEXT: [[STATE_THEN:%.*]] = insertvalue { i32 } poison, i32 [[V_THEN]], 0 -; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(5) -; CHECK-NEXT: store { i32 } [[STATE_THEN]], ptr addrspace(5) [[TMP11]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP11]], i32 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: else: ; CHECK-NEXT: [[TABLE_1:%.*]] = getelementptr i32, ptr [[TABLE]], i32 1 ; CHECK-NEXT: [[CR_ELSE:%.*]] = load i32, ptr [[TABLE_1]], align 4 ; CHECK-NEXT: [[ELSE_ARG:%.*]] = uitofp i32 [[ARG]] to float -; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP13]] to ptr addrspace(5) -; CHECK-NEXT: [[TMP15:%.*]] = bitcast float [[ELSE_ARG]] to i32 +; CHECK-NEXT: [[TMP7:%.*]] = bitcast float [[ELSE_ARG]] to i32 ; CHECK-NEXT: br label [[TAIL_BLOCK]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP16:%.*]] = phi i32 [ [[CR_ELSE]], [[ELSE]] ], [ [[CR_THEN]], [[THEN]] ] -; CHECK-NEXT: [[TMP17:%.*]] = phi ptr addrspace(5) [ [[TMP14]], [[ELSE]] ], [ [[TMP12]], [[THEN]] ] -; CHECK-NEXT: [[TMP18:%.*]] = phi i32 [ [[TMP15]], [[ELSE]] ], [ [[THEN_ARG]], [[THEN]] ] -; CHECK-NEXT: [[TMP19:%.*]] = phi i32 [ 5, [[ELSE]] ], [ poison, [[THEN]] ] -; CHECK-NEXT: [[TMP20:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP21:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP20]], i32 [[TMP16]], 1 -; CHECK-NEXT: [[TMP22:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP21]], ptr addrspace(5) [[TMP17]], 2 -; CHECK-NEXT: [[TMP23:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP22]], i32 [[TMP18]], 3 -; CHECK-NEXT: [[TMP24:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP23]], i32 [[TMP19]], 4 -; CHECK-NEXT: [[TMP25:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP24]], 1 -; CHECK-NEXT: [[TMP26:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP25]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP27:%.*]] = and i32 [[TMP26]], 7 -; CHECK-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0 +; CHECK-NEXT: [[TMP8:%.*]] = phi i32 [ [[CR_ELSE]], [[ELSE]] ], [ [[CR_THEN]], [[THEN]] ] +; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ poison, [[ELSE]] ], [ poison, [[THEN]] ] +; CHECK-NEXT: [[TMP10:%.*]] = phi i32 [ poison, [[ELSE]] ], [ poison, [[THEN]] ] +; CHECK-NEXT: [[TMP11:%.*]] = phi i32 [ [[TMP7]], [[ELSE]] ], [ [[THEN_ARG]], [[THEN]] ] +; CHECK-NEXT: [[TMP12:%.*]] = phi i32 [ 5, [[ELSE]] ], [ poison, [[THEN]] ] +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP14:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP13]], i32 [[TMP8]], 1 +; CHECK-NEXT: [[TMP15:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP14]], i32 [[TMP9]], 2 +; CHECK-NEXT: [[TMP16:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP15]], i32 [[TMP10]], 3 +; CHECK-NEXT: [[TMP17:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP16]], i32 [[TMP11]], 4 +; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP17]], i32 [[TMP12]], 5 +; CHECK-NEXT: [[TMP19:%.*]] = extractvalue { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP18]], 1 +; CHECK-NEXT: [[TMP20:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP19]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP21:%.*]] = and i32 [[TMP20]], 7 +; CHECK-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 +; CHECK-NEXT: [[TMP23:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP22]]) +; CHECK-NEXT: [[TMP24:%.*]] = icmp eq i32 [[TMP21]], 3 +; CHECK-NEXT: [[TMP25:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP24]]) +; CHECK-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 +; CHECK-NEXT: [[TMP27:%.*]] = select i1 [[TMP26]], i32 [[TMP25]], i32 [[TMP23]] +; CHECK-NEXT: [[TMP28:%.*]] = icmp eq i32 [[TMP21]], 2 ; CHECK-NEXT: [[TMP29:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP28]]) -; CHECK-NEXT: [[TMP30:%.*]] = icmp eq i32 [[TMP27]], 3 -; CHECK-NEXT: [[TMP31:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP30]]) -; CHECK-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 -; CHECK-NEXT: [[TMP33:%.*]] = select i1 [[TMP32]], i32 [[TMP31]], i32 [[TMP29]] -; CHECK-NEXT: [[TMP34:%.*]] = icmp eq i32 [[TMP27]], 2 -; CHECK-NEXT: [[TMP35:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP34]]) -; CHECK-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0 -; CHECK-NEXT: [[TMP37:%.*]] = select i1 [[TMP36]], i32 [[TMP35]], i32 [[TMP33]] -; CHECK-NEXT: [[TMP38:%.*]] = icmp eq i32 [[TMP27]], 1 +; CHECK-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0 +; CHECK-NEXT: [[TMP31:%.*]] = select i1 [[TMP30]], i32 [[TMP29]], i32 [[TMP27]] +; CHECK-NEXT: [[TMP32:%.*]] = icmp eq i32 [[TMP21]], 1 +; CHECK-NEXT: [[TMP33:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP32]]) +; CHECK-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0 +; CHECK-NEXT: [[TMP35:%.*]] = select i1 [[TMP34]], i32 [[TMP33]], i32 [[TMP31]] +; CHECK-NEXT: [[TMP36:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP35]], i1 true) +; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP20]], i32 [[TMP36]]) +; CHECK-NEXT: [[TMP38:%.*]] = icmp eq i32 [[TMP20]], [[TMP37]] ; CHECK-NEXT: [[TMP39:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP38]]) -; CHECK-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0 -; CHECK-NEXT: [[TMP41:%.*]] = select i1 [[TMP40]], i32 [[TMP39]], i32 [[TMP37]] -; CHECK-NEXT: [[TMP42:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP41]], i1 true) -; CHECK-NEXT: [[TMP43:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP26]], i32 [[TMP42]]) -; CHECK-NEXT: [[TMP44:%.*]] = icmp eq i32 [[TMP26]], [[TMP43]] -; CHECK-NEXT: [[TMP45:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP44]]) -; CHECK-NEXT: [[TMP46:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP43]]) -; CHECK-NEXT: [[TMP47:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP45]]) -; CHECK-NEXT: [[TMP48:%.*]] = and i32 [[TMP46]], -64 -; CHECK-NEXT: [[TMP49:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP48]], i64 0 -; CHECK-NEXT: [[TMP50:%.*]] = bitcast <2 x i32> [[TMP49]] to i64 -; CHECK-NEXT: [[TMP51:%.*]] = inttoptr i64 [[TMP50]] to ptr -; CHECK-NEXT: [[TMP52:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP53:%.*]] = bitcast i64 [[TMP52]] to <2 x i32> -; CHECK-NEXT: [[TMP54:%.*]] = extractelement <2 x i32> [[TMP53]], i64 0 -; CHECK-NEXT: [[TMP55:%.*]] = extractelement <2 x i32> [[TMP53]], i64 1 -; CHECK-NEXT: [[TMP56:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP57:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP58:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[TMP54]], i64 1 -; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[TMP55]], i64 2 -; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD0]], i64 3 -; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD1]], i64 4 -; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD2]], i64 5 -; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD3]], i64 6 -; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP75:%.*]] = insertelement <20 x i32> [[TMP74]], i32 [[TMP56]], i64 16 -; CHECK-NEXT: [[TMP76:%.*]] = insertelement <20 x i32> [[TMP75]], i32 [[TMP57]], i64 17 -; CHECK-NEXT: [[TMP77:%.*]] = insertelement <20 x i32> [[TMP76]], i32 [[TMP58]], i64 18 -; CHECK-NEXT: [[TMP78:%.*]] = insertelement <20 x i32> [[TMP77]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5), i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5i32i32s(ptr inreg [[TMP51]], i32 inreg [[TMP47]], <20 x i32> inreg [[TMP78]], { <3 x i32>, i32, ptr addrspace(5), i32, i32 } [[TMP24]], i32 0) +; CHECK-NEXT: [[TMP40:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP37]]) +; CHECK-NEXT: [[TMP41:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP39]]) +; CHECK-NEXT: [[TMP42:%.*]] = and i32 [[TMP40]], -64 +; CHECK-NEXT: [[TMP43:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP42]], i64 0 +; CHECK-NEXT: [[TMP44:%.*]] = bitcast <2 x i32> [[TMP43]] to i64 +; CHECK-NEXT: [[TMP45:%.*]] = inttoptr i64 [[TMP44]] to ptr +; CHECK-NEXT: [[TMP46:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP47:%.*]] = bitcast i64 [[TMP46]] to <2 x i32> +; CHECK-NEXT: [[TMP48:%.*]] = extractelement <2 x i32> [[TMP47]], i64 0 +; CHECK-NEXT: [[TMP49:%.*]] = extractelement <2 x i32> [[TMP47]], i64 1 +; CHECK-NEXT: [[TMP50:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP51:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP52:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[TMP48]], i64 1 +; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> [[TMP54]], i32 [[TMP49]], i64 2 +; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[PAD0]], i64 3 +; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[PAD1]], i64 4 +; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[PAD2]], i64 5 +; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD3]], i64 6 +; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD4]], i64 7 +; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD5]], i64 8 +; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[TMP50]], i64 16 +; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[TMP51]], i64 17 +; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[TMP52]], i64 18 +; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32, i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32i32i32i32s(ptr inreg [[TMP45]], i32 inreg [[TMP41]], <20 x i32> inreg [[TMP72]], { <3 x i32>, i32, i32, i32, i32, i32 } [[TMP18]], i32 0) ; CHECK-NEXT: unreachable ; entry: - %v = extractvalue {i32} %state, 0 - %cond = icmp ult i32 %v, 3 + %cond = icmp ult i32 %arg, 3 br i1 %cond, label %then, label %else -then: +then: ; preds = %entry %table.0 = getelementptr i32, ptr %table, i32 0 - %cr.then = load i32, ptr %table.0 + %cr.then = load i32, ptr %table.0, align 4 %then.arg = add i32 %arg, 1 - %v.then = mul i32 %v, 2 - %state.then = insertvalue {i32} poison, i32 %v.then, 0 - call void (...) @lgc.cps.jump(i32 %cr.then, i32 2, {i32} %state.then, i32 poison, i32 %then.arg) + call void (...) @lgc.cps.jump(i32 %cr.then, i32 2, i32 poison, i32 poison, i32 %then.arg) unreachable -else: +else: ; preds = %entry %table.1 = getelementptr i32, ptr %table, i32 1 - %cr.else = load i32, ptr %table.1 + %cr.else = load i32, ptr %table.1, align 4 %else.arg = uitofp i32 %arg to float - call void (...) @lgc.cps.jump(i32 %cr.else, i32 2, {} poison, i32 poison, float %else.arg, i32 5) + call void (...) @lgc.cps.jump(i32 %cr.else, i32 2, i32 poison, i32 poison, float %else.arg, i32 5) unreachable } -define void @unify_jump_ret({i32} %state, i32 %arg, ptr %table) !lgc.cps !0 !lgc.shaderstage !{i32 7} { +define void @unify_jump_ret(i32 %arg, ptr %table) !lgc.cps !1 !lgc.shaderstage !2 { ; CHECK-LABEL: define {{[^@]+}}@unify_jump_ret -; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], ptr addrspace(5) [[VSP:%.*]], i32 [[ARG:%.*]], ptr [[TABLE:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META2]] !lgc.shaderstage [[META3]] { +; CHECK-SAME: (i32 inreg [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg [[NUMWORKGROUPSPTR:%.*]], i32 inreg [[PAD0:%.*]], i32 inreg [[PAD1:%.*]], i32 inreg [[PAD2:%.*]], i32 inreg [[PAD3:%.*]], i32 inreg [[PAD4:%.*]], i32 inreg [[PAD5:%.*]], i32 inreg [[PAD6:%.*]], i32 inreg [[PAD7:%.*]], i32 inreg [[PAD8:%.*]], i32 inreg [[PAD9:%.*]], i32 inreg [[PAD10:%.*]], i32 inreg [[PAD11:%.*]], i32 inreg [[SPILLTABLE:%.*]], <3 x i32> inreg [[WORKGROUPID:%.*]], i32 inreg [[MULTIDISPATCHINFO:%.*]], <3 x i32> [[LOCALINVOCATIONID:%.*]], i32 [[VCR:%.*]], i32 [[ARG:%.*]], ptr [[TABLE:%.*]]) #[[ATTR1]] align 64 !lgc.cps [[META3]] !lgc.shaderstage [[META4]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4, addrspace(5) -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP2:%.*]] = bitcast i64 [[TMP1]] to <2 x i32> -; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[SPILLTABLE]], i64 0 -; CHECK-NEXT: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to i64 -; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr addrspace(4) -; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[TMP6]] to <2 x i32> -; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr addrspace(5) [[VSP]], i32 -4 -; CHECK-NEXT: [[CPS_STATE:%.*]] = load { i32 }, ptr addrspace(5) [[TMP8]], align 4, !amdgpu.last.use [[META4]] -; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr addrspace(5) [[TMP8]] to i32 -; CHECK-NEXT: store i32 [[TMP9]], ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[V:%.*]] = extractvalue { i32 } [[CPS_STATE]], 0 -; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[V]], 3 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; CHECK-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i64 [[TMP5]] to <2 x i32> +; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ARG]], 3 ; CHECK-NEXT: br i1 [[COND]], label [[THEN:%.*]], label [[ELSE:%.*]] ; CHECK: then: ; CHECK-NEXT: [[TABLE_0:%.*]] = getelementptr i32, ptr [[TABLE]], i32 0 ; CHECK-NEXT: [[CR_THEN:%.*]] = load i32, ptr [[TABLE_0]], align 4 ; CHECK-NEXT: [[THEN_ARG:%.*]] = add i32 [[ARG]], 1 -; CHECK-NEXT: [[V_THEN:%.*]] = mul i32 [[V]], 2 -; CHECK-NEXT: [[STATE_THEN:%.*]] = insertvalue { i32 } poison, i32 [[V_THEN]], 0 -; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(5) [[TMP0]], align 4 -; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(5) -; CHECK-NEXT: store { i32 } [[STATE_THEN]], ptr addrspace(5) [[TMP11]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP11]], i32 4 ; CHECK-NEXT: br label [[TAIL_BLOCK:%.*]] ; CHECK: else: ; CHECK-NEXT: br label [[TAIL_BLOCK]] ; CHECK: tail.block: -; CHECK-NEXT: [[TMP13:%.*]] = phi i32 [ [[CR_THEN]], [[THEN]] ], [ 0, [[ELSE]] ] -; CHECK-NEXT: [[TMP14:%.*]] = phi ptr addrspace(5) [ [[TMP12]], [[THEN]] ], [ poison, [[ELSE]] ] -; CHECK-NEXT: [[TMP15:%.*]] = phi i32 [ [[THEN_ARG]], [[THEN]] ], [ poison, [[ELSE]] ] -; CHECK-NEXT: [[TMP16:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 -; CHECK-NEXT: [[TMP17:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP16]], i32 [[TMP13]], 1 -; CHECK-NEXT: [[TMP18:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP17]], ptr addrspace(5) [[TMP14]], 2 -; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP18]], i32 [[TMP15]], 3 -; CHECK-NEXT: [[TMP20:%.*]] = extractvalue { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP19]], 1 -; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP20]], i32 [[VCR]]) -; CHECK-NEXT: [[TMP22:%.*]] = and i32 [[TMP21]], 7 +; CHECK-NEXT: [[TMP7:%.*]] = phi i32 [ [[CR_THEN]], [[THEN]] ], [ 0, [[ELSE]] ] +; CHECK-NEXT: [[TMP8:%.*]] = phi i32 [ poison, [[THEN]] ], [ poison, [[ELSE]] ] +; CHECK-NEXT: [[TMP9:%.*]] = phi i32 [ poison, [[THEN]] ], [ poison, [[ELSE]] ] +; CHECK-NEXT: [[TMP10:%.*]] = phi i32 [ [[THEN_ARG]], [[THEN]] ], [ poison, [[ELSE]] ] +; CHECK-NEXT: [[TMP11:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } poison, <3 x i32> [[LOCALINVOCATIONID]], 0 +; CHECK-NEXT: [[TMP12:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP11]], i32 [[TMP7]], 1 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP12]], i32 [[TMP8]], 2 +; CHECK-NEXT: [[TMP14:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP13]], i32 [[TMP9]], 3 +; CHECK-NEXT: [[TMP15:%.*]] = insertvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP14]], i32 [[TMP10]], 4 +; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { <3 x i32>, i32, i32, i32, i32 } [[TMP15]], 1 +; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.amdgcn.set.inactive.chain.arg.i32(i32 [[TMP16]], i32 [[VCR]]) +; CHECK-NEXT: [[TMP18:%.*]] = and i32 [[TMP17]], 7 +; CHECK-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 +; CHECK-NEXT: [[TMP20:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP19]]) +; CHECK-NEXT: [[TMP21:%.*]] = icmp eq i32 [[TMP18]], 3 +; CHECK-NEXT: [[TMP22:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP21]]) ; CHECK-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 -; CHECK-NEXT: [[TMP24:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP23]]) -; CHECK-NEXT: [[TMP25:%.*]] = icmp eq i32 [[TMP22]], 3 +; CHECK-NEXT: [[TMP24:%.*]] = select i1 [[TMP23]], i32 [[TMP22]], i32 [[TMP20]] +; CHECK-NEXT: [[TMP25:%.*]] = icmp eq i32 [[TMP18]], 2 ; CHECK-NEXT: [[TMP26:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP25]]) ; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 ; CHECK-NEXT: [[TMP28:%.*]] = select i1 [[TMP27]], i32 [[TMP26]], i32 [[TMP24]] -; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i32 [[TMP22]], 2 +; CHECK-NEXT: [[TMP29:%.*]] = icmp eq i32 [[TMP18]], 1 ; CHECK-NEXT: [[TMP30:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP29]]) ; CHECK-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 ; CHECK-NEXT: [[TMP32:%.*]] = select i1 [[TMP31]], i32 [[TMP30]], i32 [[TMP28]] -; CHECK-NEXT: [[TMP33:%.*]] = icmp eq i32 [[TMP22]], 1 -; CHECK-NEXT: [[TMP34:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP33]]) -; CHECK-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 -; CHECK-NEXT: [[TMP36:%.*]] = select i1 [[TMP35]], i32 [[TMP34]], i32 [[TMP32]] -; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP36]], i1 true) -; CHECK-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP21]], i32 [[TMP37]]) -; CHECK-NEXT: [[TMP39:%.*]] = icmp eq i32 [[TMP21]], [[TMP38]] -; CHECK-NEXT: [[TMP40:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP39]]) -; CHECK-NEXT: [[TMP41:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP38]]) -; CHECK-NEXT: [[TMP42:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP40]]) -; CHECK-NEXT: [[TMP43:%.*]] = icmp eq i32 [[TMP41]], 0 -; CHECK-NEXT: br i1 [[TMP43]], label [[RET_BLOCK:%.*]], label [[CHAIN_BLOCK:%.*]] +; CHECK-NEXT: [[TMP33:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP32]], i1 true) +; CHECK-NEXT: [[TMP34:%.*]] = call i32 @llvm.amdgcn.readlane.i32(i32 [[TMP17]], i32 [[TMP33]]) +; CHECK-NEXT: [[TMP35:%.*]] = icmp eq i32 [[TMP17]], [[TMP34]] +; CHECK-NEXT: [[TMP36:%.*]] = call i32 @llvm.amdgcn.ballot.i32(i1 [[TMP35]]) +; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP34]]) +; CHECK-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.wwm.i32(i32 [[TMP36]]) +; CHECK-NEXT: [[TMP39:%.*]] = icmp eq i32 [[TMP37]], 0 +; CHECK-NEXT: br i1 [[TMP39]], label [[RET_BLOCK:%.*]], label [[CHAIN_BLOCK:%.*]] ; CHECK: chain.block: -; CHECK-NEXT: [[TMP44:%.*]] = and i32 [[TMP41]], -64 -; CHECK-NEXT: [[TMP45:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP44]], i64 0 -; CHECK-NEXT: [[TMP46:%.*]] = bitcast <2 x i32> [[TMP45]] to i64 -; CHECK-NEXT: [[TMP47:%.*]] = inttoptr i64 [[TMP46]] to ptr -; CHECK-NEXT: [[TMP48:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 -; CHECK-NEXT: [[TMP49:%.*]] = bitcast i64 [[TMP48]] to <2 x i32> -; CHECK-NEXT: [[TMP50:%.*]] = extractelement <2 x i32> [[TMP49]], i64 0 -; CHECK-NEXT: [[TMP51:%.*]] = extractelement <2 x i32> [[TMP49]], i64 1 -; CHECK-NEXT: [[TMP52:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 -; CHECK-NEXT: [[TMP53:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 -; CHECK-NEXT: [[TMP54:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 -; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 -; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[TMP50]], i64 1 -; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[TMP51]], i64 2 -; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[PAD0]], i64 3 -; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD1]], i64 4 -; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD2]], i64 5 -; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD3]], i64 6 -; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD4]], i64 7 -; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD5]], i64 8 -; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD6]], i64 9 -; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD7]], i64 10 -; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[PAD8]], i64 11 -; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[PAD9]], i64 12 -; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[PAD10]], i64 13 -; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[PAD11]], i64 14 -; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[SPILLTABLE]], i64 15 -; CHECK-NEXT: [[TMP71:%.*]] = insertelement <20 x i32> [[TMP70]], i32 [[TMP52]], i64 16 -; CHECK-NEXT: [[TMP72:%.*]] = insertelement <20 x i32> [[TMP71]], i32 [[TMP53]], i64 17 -; CHECK-NEXT: [[TMP73:%.*]] = insertelement <20 x i32> [[TMP72]], i32 [[TMP54]], i64 18 -; CHECK-NEXT: [[TMP74:%.*]] = insertelement <20 x i32> [[TMP73]], i32 [[MULTIDISPATCHINFO]], i64 19 -; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, ptr addrspace(5), i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32p5i32s(ptr inreg [[TMP47]], i32 inreg [[TMP42]], <20 x i32> inreg [[TMP74]], { <3 x i32>, i32, ptr addrspace(5), i32 } [[TMP19]], i32 0) +; CHECK-NEXT: [[TMP40:%.*]] = and i32 [[TMP37]], -64 +; CHECK-NEXT: [[TMP41:%.*]] = insertelement <2 x i32> [[TMP6]], i32 [[TMP40]], i64 0 +; CHECK-NEXT: [[TMP42:%.*]] = bitcast <2 x i32> [[TMP41]] to i64 +; CHECK-NEXT: [[TMP43:%.*]] = inttoptr i64 [[TMP42]] to ptr +; CHECK-NEXT: [[TMP44:%.*]] = ptrtoint ptr addrspace(4) [[NUMWORKGROUPSPTR]] to i64 +; CHECK-NEXT: [[TMP45:%.*]] = bitcast i64 [[TMP44]] to <2 x i32> +; CHECK-NEXT: [[TMP46:%.*]] = extractelement <2 x i32> [[TMP45]], i64 0 +; CHECK-NEXT: [[TMP47:%.*]] = extractelement <2 x i32> [[TMP45]], i64 1 +; CHECK-NEXT: [[TMP48:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 0 +; CHECK-NEXT: [[TMP49:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 1 +; CHECK-NEXT: [[TMP50:%.*]] = extractelement <3 x i32> [[WORKGROUPID]], i64 2 +; CHECK-NEXT: [[TMP51:%.*]] = insertelement <20 x i32> poison, i32 [[GLOBALTABLE]], i64 0 +; CHECK-NEXT: [[TMP52:%.*]] = insertelement <20 x i32> [[TMP51]], i32 [[TMP46]], i64 1 +; CHECK-NEXT: [[TMP53:%.*]] = insertelement <20 x i32> [[TMP52]], i32 [[TMP47]], i64 2 +; CHECK-NEXT: [[TMP54:%.*]] = insertelement <20 x i32> [[TMP53]], i32 [[PAD0]], i64 3 +; CHECK-NEXT: [[TMP55:%.*]] = insertelement <20 x i32> [[TMP54]], i32 [[PAD1]], i64 4 +; CHECK-NEXT: [[TMP56:%.*]] = insertelement <20 x i32> [[TMP55]], i32 [[PAD2]], i64 5 +; CHECK-NEXT: [[TMP57:%.*]] = insertelement <20 x i32> [[TMP56]], i32 [[PAD3]], i64 6 +; CHECK-NEXT: [[TMP58:%.*]] = insertelement <20 x i32> [[TMP57]], i32 [[PAD4]], i64 7 +; CHECK-NEXT: [[TMP59:%.*]] = insertelement <20 x i32> [[TMP58]], i32 [[PAD5]], i64 8 +; CHECK-NEXT: [[TMP60:%.*]] = insertelement <20 x i32> [[TMP59]], i32 [[PAD6]], i64 9 +; CHECK-NEXT: [[TMP61:%.*]] = insertelement <20 x i32> [[TMP60]], i32 [[PAD7]], i64 10 +; CHECK-NEXT: [[TMP62:%.*]] = insertelement <20 x i32> [[TMP61]], i32 [[PAD8]], i64 11 +; CHECK-NEXT: [[TMP63:%.*]] = insertelement <20 x i32> [[TMP62]], i32 [[PAD9]], i64 12 +; CHECK-NEXT: [[TMP64:%.*]] = insertelement <20 x i32> [[TMP63]], i32 [[PAD10]], i64 13 +; CHECK-NEXT: [[TMP65:%.*]] = insertelement <20 x i32> [[TMP64]], i32 [[PAD11]], i64 14 +; CHECK-NEXT: [[TMP66:%.*]] = insertelement <20 x i32> [[TMP65]], i32 [[SPILLTABLE]], i64 15 +; CHECK-NEXT: [[TMP67:%.*]] = insertelement <20 x i32> [[TMP66]], i32 [[TMP48]], i64 16 +; CHECK-NEXT: [[TMP68:%.*]] = insertelement <20 x i32> [[TMP67]], i32 [[TMP49]], i64 17 +; CHECK-NEXT: [[TMP69:%.*]] = insertelement <20 x i32> [[TMP68]], i32 [[TMP50]], i64 18 +; CHECK-NEXT: [[TMP70:%.*]] = insertelement <20 x i32> [[TMP69]], i32 [[MULTIDISPATCHINFO]], i64 19 +; CHECK-NEXT: call void (ptr, i32, <20 x i32>, { <3 x i32>, i32, i32, i32, i32 }, i32, ...) @llvm.amdgcn.cs.chain.p0.i32.v20i32.sl_v3i32i32i32i32i32s(ptr inreg [[TMP43]], i32 inreg [[TMP38]], <20 x i32> inreg [[TMP70]], { <3 x i32>, i32, i32, i32, i32 } [[TMP15]], i32 0) ; CHECK-NEXT: unreachable ; CHECK: ret.block: ; CHECK-NEXT: ret void ; entry: - %v = extractvalue {i32} %state, 0 - %cond = icmp ult i32 %v, 3 + %cond = icmp ult i32 %arg, 3 br i1 %cond, label %then, label %else -then: +then: ; preds = %entry %table.0 = getelementptr i32, ptr %table, i32 0 - %cr.then = load i32, ptr %table.0 + %cr.then = load i32, ptr %table.0, align 4 %then.arg = add i32 %arg, 1 - %v.then = mul i32 %v, 2 - %state.then = insertvalue {i32} poison, i32 %v.then, 0 - call void (...) @lgc.cps.jump(i32 %cr.then, i32 2, {i32} %state.then, i32 poison, i32 %then.arg) + call void (...) @lgc.cps.jump(i32 %cr.then, i32 2, i32 poison, i32 poison, i32 %then.arg) unreachable -else: +else: ; preds = %entry ret void } -!0 = !{i32 1} ; level 1 -; -; -; +attributes #0 = { noreturn } + +!continuation.stackAddrspace = !{!0} + +!0 = !{i32 5} +!1 = !{i32 1} +!2 = !{i32 7} diff --git a/lgc/test/Transforms/LowerCooperativeMatrix/convert.lgc b/lgc/test/Transforms/LowerCooperativeMatrix/convert.lgc index 3cbc07b42d..05b2f71539 100644 --- a/lgc/test/Transforms/LowerCooperativeMatrix/convert.lgc +++ b/lgc/test/Transforms/LowerCooperativeMatrix/convert.lgc @@ -8,7 +8,7 @@ define <8 x float> @convert_f16_to_accumulator(<8 x float> %fact) { ; CHECK-NEXT: [[TMP3:%.*]] = and i32 [[TMP2]], 1 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0 ; CHECK-NEXT: [[TMP5:%.*]] = bitcast <8 x float> [[FACT:%.*]] to <8 x i32> -; CHECK-NEXT: [[TMP6:%.*]] = select i1 [[TMP4]], <8 x i32> zeroinitializer, <8 x i32> +; CHECK-NEXT: [[TMP6:%.*]] = select i1 [[TMP4]], <8 x i32> zeroinitializer, <8 x i32> {{(splat \(i32 16\))|()}} ; CHECK-NEXT: [[ACCUM1:%.*]] = lshr <8 x i32> [[TMP5]], [[TMP6]] ; CHECK-NEXT: [[ACCUM2:%.*]] = bitcast <8 x i32> [[ACCUM1]] to <8 x float> ; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <8 x float> [[ACCUM2]], <8 x float> poison, <8 x i32> @@ -60,8 +60,8 @@ define <8 x float> @convert_f16_to_factor(<8 x float> %accum) { ; CHECK-NEXT: [[TMP38:%.*]] = insertelement <8 x i32> [[TMP37]], i32 [[TMP30]], i64 7 ; CHECK-NEXT: [[TMP39:%.*]] = select i1 [[TMP5]], <8 x i32> [[TMP6]], <8 x i32> [[TMP38]] ; CHECK-NEXT: [[TMP40:%.*]] = select i1 [[TMP5]], <8 x i32> [[TMP38]], <8 x i32> [[TMP6]] -; CHECK-NEXT: [[TMP41:%.*]] = and <8 x i32> [[TMP39]], -; CHECK-NEXT: [[TMP42:%.*]] = shl <8 x i32> [[TMP40]], +; CHECK-NEXT: [[TMP41:%.*]] = and <8 x i32> [[TMP39]], {{(splat \(i32 65535\))|()}} +; CHECK-NEXT: [[TMP42:%.*]] = shl <8 x i32> [[TMP40]], {{(splat \(i32 16\))|()}} ; CHECK-NEXT: [[TMP43:%.*]] = or <8 x i32> [[TMP41]], [[TMP42]] ; CHECK-NEXT: [[TMP44:%.*]] = bitcast <8 x i32> [[TMP43]] to <8 x float> ; CHECK-NEXT: ret <8 x float> [[TMP44]] diff --git a/lgc/test/Transforms/PatchBufferOp/buffer.atomic.ops.lgc b/lgc/test/Transforms/PatchBufferOp/buffer.atomic.ops.lgc index a8624aead7..a1928468ae 100644 --- a/lgc/test/Transforms/PatchBufferOp/buffer.atomic.ops.lgc +++ b/lgc/test/Transforms/PatchBufferOp/buffer.atomic.ops.lgc @@ -3,7 +3,7 @@ define amdgpu_gfx void @raw_atomic_load(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomic_load( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.raw.atomic.buffer.load.i32(<4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 5) +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.raw.atomic.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 5) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -13,7 +13,7 @@ define amdgpu_gfx void @raw_atomic_load(<4 x i32> inreg %desc) !lgc.shaderstage define amdgpu_gfx void @raw_atomicrmw_xchg(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_xchg( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.swap.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.swap.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -23,7 +23,7 @@ define amdgpu_gfx void @raw_atomicrmw_xchg(<4 x i32> inreg %desc) !lgc.shadersta define amdgpu_gfx void @raw_atomicrmw_add(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_add( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.add.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.add.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -33,7 +33,7 @@ define amdgpu_gfx void @raw_atomicrmw_add(<4 x i32> inreg %desc) !lgc.shaderstag define amdgpu_gfx void @raw_atomicrmw_sub(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_sub( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.sub.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.sub.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -43,7 +43,7 @@ define amdgpu_gfx void @raw_atomicrmw_sub(<4 x i32> inreg %desc) !lgc.shaderstag define amdgpu_gfx void @raw_atomicrmw_and(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_and( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.and.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.and.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -53,7 +53,7 @@ define amdgpu_gfx void @raw_atomicrmw_and(<4 x i32> inreg %desc) !lgc.shaderstag define amdgpu_gfx void @raw_atomicrmw_or(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_or( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.or.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.or.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -63,7 +63,7 @@ define amdgpu_gfx void @raw_atomicrmw_or(<4 x i32> inreg %desc) !lgc.shaderstage define amdgpu_gfx void @raw_atomicrmw_xor(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_xor( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.xor.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.xor.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -73,7 +73,7 @@ define amdgpu_gfx void @raw_atomicrmw_xor(<4 x i32> inreg %desc) !lgc.shaderstag define amdgpu_gfx void @raw_atomicrmw_smax(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_smax( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.smax.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.smax.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -83,7 +83,7 @@ define amdgpu_gfx void @raw_atomicrmw_smax(<4 x i32> inreg %desc) !lgc.shadersta define amdgpu_gfx void @raw_atomicrmw_smin(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_smin( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.smin.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.smin.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -93,7 +93,7 @@ define amdgpu_gfx void @raw_atomicrmw_smin(<4 x i32> inreg %desc) !lgc.shadersta define amdgpu_gfx void @raw_atomicrmw_umax(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_umax( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.umax.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.umax.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -103,7 +103,7 @@ define amdgpu_gfx void @raw_atomicrmw_umax(<4 x i32> inreg %desc) !lgc.shadersta define amdgpu_gfx void @raw_atomicrmw_umin(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_umin( -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.umin.i64(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.amdgcn.raw.buffer.atomic.umin.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -113,7 +113,7 @@ define amdgpu_gfx void @raw_atomicrmw_umin(<4 x i32> inreg %desc) !lgc.shadersta define amdgpu_gfx void @raw_atomicrmw_fadd(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_fadd( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.raw.buffer.atomic.fadd.f32(float 1.000000e+00, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.raw.buffer.atomic.fadd.f32{{(\.v4i32)?}}(float 1.000000e+00, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -123,7 +123,7 @@ define amdgpu_gfx void @raw_atomicrmw_fadd(<4 x i32> inreg %desc) !lgc.shadersta define amdgpu_gfx void @raw_atomicrmw_fmax(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_fmax( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.raw.buffer.atomic.fmax.f32(float 1.000000e+00, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.raw.buffer.atomic.fmax.f32{{(\.v4i32)?}}(float 1.000000e+00, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -133,7 +133,7 @@ define amdgpu_gfx void @raw_atomicrmw_fmax(<4 x i32> inreg %desc) !lgc.shadersta define amdgpu_gfx void @raw_atomicrmw_fmin(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @raw_atomicrmw_fmin( -; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.raw.buffer.atomic.fmin.f32(float 1.000000e+00, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.amdgcn.raw.buffer.atomic.fmin.f32{{(\.v4i32)?}}(float 1.000000e+00, <4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -154,7 +154,7 @@ define amdgpu_gfx void @struct_atomic_load(<4 x i32> inreg %desc, i32 %index) !l ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.amdgcn.struct.atomic.buffer.load.i32(<4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 5) +; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.amdgcn.struct.atomic.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 5) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -177,7 +177,7 @@ define amdgpu_gfx void @struct_atomicrmw_xchg(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.swap.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.swap.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -200,7 +200,7 @@ define amdgpu_gfx void @struct_atomicrmw_add(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.add.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.add.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -223,7 +223,7 @@ define amdgpu_gfx void @struct_atomicrmw_sub(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.sub.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.sub.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -246,7 +246,7 @@ define amdgpu_gfx void @struct_atomicrmw_and(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.and.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.and.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -269,7 +269,7 @@ define amdgpu_gfx void @struct_atomicrmw_or(<4 x i32> inreg %desc, i32 %index) ! ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.or.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.or.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -292,7 +292,7 @@ define amdgpu_gfx void @struct_atomicrmw_xor(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.xor.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.xor.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -315,7 +315,7 @@ define amdgpu_gfx void @struct_atomicrmw_smax(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.smax.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.smax.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -338,7 +338,7 @@ define amdgpu_gfx void @struct_atomicrmw_smin(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.smin.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.smin.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -361,7 +361,7 @@ define amdgpu_gfx void @struct_atomicrmw_umax(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.umax.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.umax.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -384,7 +384,7 @@ define amdgpu_gfx void @struct_atomicrmw_umin(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.umin.i64(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call i64 @llvm.amdgcn.struct.buffer.atomic.umin.i64{{(\.v4i32)?}}(i64 1, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -407,7 +407,7 @@ define amdgpu_gfx void @struct_atomicrmw_fadd(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call float @llvm.amdgcn.struct.buffer.atomic.fadd.f32(float 1.000000e+00, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call float @llvm.amdgcn.struct.buffer.atomic.fadd.f32{{(\.v4i32)?}}(float 1.000000e+00, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -430,7 +430,7 @@ define amdgpu_gfx void @struct_atomicrmw_fmax(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call float @llvm.amdgcn.struct.buffer.atomic.fmax.f32(float 1.000000e+00, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call float @llvm.amdgcn.struct.buffer.atomic.fmax.f32{{(\.v4i32)?}}(float 1.000000e+00, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) @@ -453,7 +453,7 @@ define amdgpu_gfx void @struct_atomicrmw_fmin(<4 x i32> inreg %desc, i32 %index) ; CHECK-NEXT: [[TMP9:%.*]] = and i32 [[TMP8]], -805306369 ; CHECK-NEXT: [[TMP10:%.*]] = or i32 [[TMP9]], 268435456 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP7]], i32 [[TMP10]], i64 3 -; CHECK-NEXT: [[TMP12:%.*]] = call float @llvm.amdgcn.struct.buffer.atomic.fmin.f32(float 1.000000e+00, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP12:%.*]] = call float @llvm.amdgcn.struct.buffer.atomic.fmin.f32{{(\.v4i32)?}}(float 1.000000e+00, <4 x i32> [[TMP11]], i32 [[INDEX:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: ret void ; %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) diff --git a/lgc/test/Transforms/PatchBufferOp/simple.lgc b/lgc/test/Transforms/PatchBufferOp/simple.lgc index 4f12d40c60..8bab179202 100644 --- a/lgc/test/Transforms/PatchBufferOp/simple.lgc +++ b/lgc/test/Transforms/PatchBufferOp/simple.lgc @@ -3,7 +3,7 @@ define amdgpu_gfx float @simple(<4 x i32> inreg %desc) !lgc.shaderstage !0 { ; CHECK-LABEL: @simple( -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC:%.*]], i32 0, i32 0, i32 0) ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float ; CHECK-NEXT: ret float [[TMP2]] ; @@ -15,7 +15,7 @@ define amdgpu_gfx float @simple(<4 x i32> inreg %desc) !lgc.shaderstage !0 { define amdgpu_gfx float @uniform_select(<4 x i32> inreg %desc0, <4 x i32> inreg %desc1, i1 inreg %sel) !lgc.shaderstage !0 { ; CHECK-LABEL: @uniform_select( ; CHECK-NEXT: [[PTR_0:%.*]] = select i1 [[SEL:%.*]], <4 x i32> [[DESC0:%.*]], <4 x i32> [[DESC1:%.*]] -; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> [[PTR_0]], i32 0, i32 0, i32 0) +; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[PTR_0]], i32 0, i32 0, i32 0) ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float ; CHECK-NEXT: ret float [[TMP2]] ; @@ -97,7 +97,7 @@ define amdgpu_gfx void @divergent_phi_uniform_desc(<4 x i32> inreg %desc0, i32 % ; CHECK-NEXT: [[PTR_PHI_1:%.*]] = phi ptr addrspace(6) [ null, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[CTR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[CTR_NEXT:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr addrspace(6) [[PTR_PHI_1]] to i32 -; CHECK-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32(i32 0, <4 x i32> [[DESC0:%.*]], i32 [[TMP0]], i32 0, i32 0) +; CHECK-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 0, <4 x i32> [[DESC0:%.*]], i32 [[TMP0]], i32 0, i32 0) ; CHECK-NEXT: [[TMP1]] = getelementptr i32, ptr addrspace(6) [[PTR_PHI_1]], i32 [[STRIDE:%.*]] ; CHECK-NEXT: [[CTR_NEXT]] = add i32 [[CTR]], 1 ; CHECK-NEXT: [[CC:%.*]] = icmp ne i32 [[CTR_NEXT]], 1024 diff --git a/lgc/test/Transforms/PatchBufferOp/strided-buffer-ops.lgc b/lgc/test/Transforms/PatchBufferOp/strided-buffer-ops.lgc index 623c0f6208..6e207d81c3 100644 --- a/lgc/test/Transforms/PatchBufferOp/strided-buffer-ops.lgc +++ b/lgc/test/Transforms/PatchBufferOp/strided-buffer-ops.lgc @@ -5,7 +5,7 @@ define amdgpu_kernel void @strided_buffer_desc_to_ptr(<4 x i32> inreg %desc, ptr ; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_desc_to_ptr ; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0:[0-9]+]] { ; GFX11-NEXT: entry: -; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[DESC]], i32 0, i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC]], i32 0, i32 0, i32 0, i32 0) ; GFX11-NEXT: [[TMP1:%.*]] = bitcast i32 [[TMP0]] to float ; GFX11-NEXT: store float [[TMP1]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void @@ -21,7 +21,7 @@ define amdgpu_kernel void @strided_buffer_desc_to_ptr_index(<4 x i32> inreg %des ; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_desc_to_ptr_index ; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: -; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[DESC]], i32 [[INDEX]], i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC]], i32 [[INDEX]], i32 0, i32 0, i32 0) ; GFX11-NEXT: [[TMP1:%.*]] = bitcast i32 [[TMP0]] to float ; GFX11-NEXT: store float [[TMP1]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void @@ -38,7 +38,7 @@ define amdgpu_kernel void @strided_buffer_desc_to_ptr_index_offset(<4 x i32> inr ; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_desc_to_ptr_index_offset ; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: -; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[DESC]], i32 [[INDEX]], i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 0, i32 0) +; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC]], i32 [[INDEX]], i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 0, i32 0) ; GFX11-NEXT: [[TMP1:%.*]] = bitcast i32 [[TMP0]] to float ; GFX11-NEXT: store float [[TMP1]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void @@ -56,7 +56,7 @@ define amdgpu_kernel void @strided_buffer_desc_to_ptr_index_add_zero(<4 x i32> i ; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_desc_to_ptr_index_add_zero ; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: -; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[DESC]], i32 0, i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC]], i32 0, i32 0, i32 0, i32 0) ; GFX11-NEXT: [[TMP1:%.*]] = bitcast i32 [[TMP0]] to float ; GFX11-NEXT: store float [[TMP1]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void @@ -74,7 +74,7 @@ define amdgpu_kernel void @strided_buffer_desc_to_ptr_index_add_twice(<4 x i32> ; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: ; GFX11-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], [[INDEX]] -; GFX11-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[DESC]], i32 [[TMP0]], i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC]], i32 [[TMP0]], i32 0, i32 0, i32 0) ; GFX11-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float ; GFX11-NEXT: store float [[TMP2]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void @@ -93,7 +93,7 @@ define amdgpu_kernel void @strided_buffer_desc_to_ptr_index_add_twice_constant_n ; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: ; GFX11-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 4 -; GFX11-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[DESC]], i32 [[TMP0]], i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC]], i32 [[TMP0]], i32 0, i32 0, i32 0) ; GFX11-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float ; GFX11-NEXT: store float [[TMP2]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void @@ -112,7 +112,7 @@ define amdgpu_kernel void @strided_buffer_desc_to_ptr_index_add_twice_constant_o ; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: ; GFX11-NEXT: [[TMP0:%.*]] = add i32 4, [[INDEX]] -; GFX11-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[DESC]], i32 [[TMP0]], i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC]], i32 [[TMP0]], i32 0, i32 0, i32 0) ; GFX11-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float ; GFX11-NEXT: store float [[TMP2]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void @@ -130,7 +130,7 @@ define amdgpu_kernel void @strided_buffer_desc_to_ptr_index_add_twice_constant_b ; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_desc_to_ptr_index_add_twice_constant_both ; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: -; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[DESC]], i32 6, i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC]], i32 6, i32 0, i32 0, i32 0) ; GFX11-NEXT: [[TMP1:%.*]] = bitcast i32 [[TMP0]] to float ; GFX11-NEXT: store float [[TMP1]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void @@ -148,7 +148,7 @@ define amdgpu_kernel void @strided_buffer_desc_to_ptr_offset_index(<4 x i32> inr ; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_desc_to_ptr_offset_index ; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: -; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[DESC]], i32 [[INDEX]], i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 0, i32 0) +; GFX11-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[DESC]], i32 [[INDEX]], i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 0, i32 0) ; GFX11-NEXT: [[TMP1:%.*]] = bitcast i32 [[TMP0]] to float ; GFX11-NEXT: store float [[TMP1]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void @@ -162,9 +162,9 @@ entry: ret void } -define float @addr_and_stride_to_ptr(i64 %addr, i32 %stride) { +define float @addr_and_stride_to_ptr(i64 inreg %addr, i32 %stride) { ; GFX11-LABEL: define amdgpu_gfx float @addr_and_stride_to_ptr -; GFX11-SAME: (i64 [[ADDR:%.*]], i32 [[STRIDE:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { +; GFX11-SAME: (i64 inreg [[ADDR:%.*]], i32 [[STRIDE:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: ; GFX11-NEXT: [[TMP0:%.*]] = bitcast i64 [[ADDR]] to <2 x i32> ; GFX11-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[TMP0]], i64 0 @@ -175,7 +175,7 @@ define float @addr_and_stride_to_ptr(i64 %addr, i32 %stride) { ; GFX11-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[TMP5]], i64 1 ; GFX11-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 -1, i64 2 ; GFX11-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 536956844, i64 3 -; GFX11-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[TMP8]], i32 0, i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP8]], i32 0, i32 0, i32 0, i32 0) ; GFX11-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float ; GFX11-NEXT: ret float [[TMP10]] ; @@ -185,9 +185,9 @@ entry: ret float %res } -define float @addr_and_stride_to_ptr_index(i64 %addr, i32 %index, i32 %stride) { +define float @addr_and_stride_to_ptr_index(i64 inreg %addr, i32 inreg %index, i32 %stride) { ; GFX11-LABEL: define amdgpu_gfx float @addr_and_stride_to_ptr_index -; GFX11-SAME: (i64 [[ADDR:%.*]], i32 [[INDEX:%.*]], i32 [[STRIDE:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { +; GFX11-SAME: (i64 inreg [[ADDR:%.*]], i32 inreg [[INDEX:%.*]], i32 [[STRIDE:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: ; GFX11-NEXT: [[TMP0:%.*]] = bitcast i64 [[ADDR]] to <2 x i32> ; GFX11-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[TMP0]], i64 0 @@ -198,7 +198,7 @@ define float @addr_and_stride_to_ptr_index(i64 %addr, i32 %index, i32 %stride) { ; GFX11-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[TMP5]], i64 1 ; GFX11-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 -1, i64 2 ; GFX11-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 536956844, i64 3 -; GFX11-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[TMP8]], i32 [[INDEX]], i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP8]], i32 [[INDEX]], i32 0, i32 0, i32 0) ; GFX11-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float ; GFX11-NEXT: ret float [[TMP10]] ; @@ -209,9 +209,9 @@ entry: ret float %res } -define float @addr_and_stride_to_ptr_index_offset(i64 %addr, i32 %index, i32 %stride) { +define float @addr_and_stride_to_ptr_index_offset(i64 inreg %addr, i32 inreg %index, i32 %stride) { ; GFX11-LABEL: define amdgpu_gfx float @addr_and_stride_to_ptr_index_offset -; GFX11-SAME: (i64 [[ADDR:%.*]], i32 [[INDEX:%.*]], i32 [[STRIDE:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { +; GFX11-SAME: (i64 inreg [[ADDR:%.*]], i32 inreg [[INDEX:%.*]], i32 [[STRIDE:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: ; GFX11-NEXT: [[TMP0:%.*]] = bitcast i64 [[ADDR]] to <2 x i32> ; GFX11-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[TMP0]], i64 0 @@ -222,7 +222,7 @@ define float @addr_and_stride_to_ptr_index_offset(i64 %addr, i32 %index, i32 %st ; GFX11-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[TMP5]], i64 1 ; GFX11-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 -1, i64 2 ; GFX11-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 536956844, i64 3 -; GFX11-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[TMP8]], i32 [[INDEX]], i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 0, i32 0) +; GFX11-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP8]], i32 [[INDEX]], i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 0, i32 0) ; GFX11-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float ; GFX11-NEXT: ret float [[TMP10]] ; @@ -234,9 +234,9 @@ entry: ret float %res } -define float @addr_and_stride_to_ptr_offset_index(i64 %addr, i32 %index, i32 %stride) { +define float @addr_and_stride_to_ptr_offset_index(i64 inreg %addr, i32 inreg %index, i32 %stride) { ; GFX11-LABEL: define amdgpu_gfx float @addr_and_stride_to_ptr_offset_index -; GFX11-SAME: (i64 [[ADDR:%.*]], i32 [[INDEX:%.*]], i32 [[STRIDE:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { +; GFX11-SAME: (i64 inreg [[ADDR:%.*]], i32 inreg [[INDEX:%.*]], i32 [[STRIDE:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR0]] { ; GFX11-NEXT: entry: ; GFX11-NEXT: [[TMP0:%.*]] = bitcast i64 [[ADDR]] to <2 x i32> ; GFX11-NEXT: [[TMP1:%.*]] = extractelement <2 x i32> [[TMP0]], i64 0 @@ -247,7 +247,7 @@ define float @addr_and_stride_to_ptr_offset_index(i64 %addr, i32 %index, i32 %st ; GFX11-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[TMP5]], i64 1 ; GFX11-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 -1, i64 2 ; GFX11-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[TMP7]], i32 536956844, i64 3 -; GFX11-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[TMP8]], i32 [[INDEX]], i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 0, i32 0) +; GFX11-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP8]], i32 [[INDEX]], i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 0, i32 0) ; GFX11-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float ; GFX11-NEXT: ret float [[TMP10]] ; @@ -279,14 +279,9 @@ define amdgpu_kernel void @constant_strided_buffer_desc_to_ptr_index(<4 x i32> i ; GFX11-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP12]], i64 1 ; GFX11-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 -1, i64 2 ; GFX11-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP14]], i32 536956844, i64 3 -; GFX11-NEXT: [[TMP16:%.*]] = extractelement <4 x i32> [[TMP15]], i64 1 -; GFX11-NEXT: [[TMP17:%.*]] = lshr i32 [[TMP16]], 16 -; GFX11-NEXT: [[TMP18:%.*]] = and i32 [[TMP17]], 16383 -; GFX11-NEXT: [[TMP19:%.*]] = mul i32 24, [[TMP18]] -; GFX11-NEXT: [[TMP20:%.*]] = add i32 0, [[TMP19]] -; GFX11-NEXT: [[TMP21:%.*]] = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> [[TMP15]], i32 [[TMP20]], i32 0), !invariant.load [[META7:![0-9]+]] -; GFX11-NEXT: [[TMP22:%.*]] = bitcast i32 [[TMP21]] to float -; GFX11-NEXT: store float [[TMP22]], ptr [[OUT]], align 4 +; GFX11-NEXT: [[TMP16:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP15]], i32 24, i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP16]] to float +; GFX11-NEXT: store float [[TMP17]], ptr [[OUT]], align 4 ; GFX11-NEXT: ret void ; entry: @@ -298,6 +293,308 @@ entry: ret void } +define amdgpu_kernel void @strided_buffer_uniform_strided_load(<4 x i32> %desc, ptr %out) #0 !lgc.shaderstage !4 { +; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_uniform_strided_load +; GFX11-SAME: (<4 x i32> [[DESC:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR1]] !lgc.shaderstage [[META6]] { +; GFX11-NEXT: entry: +; GFX11-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; GFX11-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; GFX11-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; GFX11-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; GFX11-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; GFX11-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[USERDATA4]], i64 0 +; GFX11-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[USERDATA5]], i64 1 +; GFX11-NEXT: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to i64 +; GFX11-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> +; GFX11-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP8]], i64 0 +; GFX11-NEXT: [[TMP10:%.*]] = extractelement <2 x i32> [[TMP8]], i64 1 +; GFX11-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP9]], i64 0 +; GFX11-NEXT: [[TMP12:%.*]] = or i32 [[TMP10]], 1048576 +; GFX11-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP12]], i64 1 +; GFX11-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 -1, i64 2 +; GFX11-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP14]], i32 536956844, i64 3 +; GFX11-NEXT: [[TMP16:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP15]], i32 24, i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP16]] to float +; GFX11-NEXT: store float [[TMP17]], ptr [[OUT]], align 4 +; GFX11-NEXT: ret void +; +entry: + %buf = call ptr addrspace(9) @lgc.load.strided.buffer.desc(i64 8589934592, i32 0, i32 0, i32 4, i32 16) + %146 = call ptr @llvm.invariant.start.p9(i64 -1, ptr addrspace(9) %buf) + %buf.idx = call ptr addrspace(9) @lgc.strided.index.add(ptr addrspace(9) %buf, i32 24) + %res = load float, ptr addrspace(9) %buf.idx, align 16 + store float %res, ptr %out, align 4 + ret void +} + +define amdgpu_kernel void @strided_buffer_convert_uniform_strided_load(<4 x i32> inreg %desc, ptr %out) #0 !lgc.shaderstage !4 { +; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_convert_uniform_strided_load +; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR1]] !lgc.shaderstage [[META6]] { +; GFX11-NEXT: entry: +; GFX11-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; GFX11-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; GFX11-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; GFX11-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; GFX11-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; GFX11-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[DESC]], i64 1 +; GFX11-NEXT: [[TMP6:%.*]] = and i32 [[TMP5]], -1073676289 +; GFX11-NEXT: [[TMP7:%.*]] = or i32 [[TMP6]], 786432 +; GFX11-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[DESC]], i32 [[TMP7]], i64 1 +; GFX11-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP8]], i64 2 +; GFX11-NEXT: [[TMP10:%.*]] = udiv i32 [[TMP9]], 12 +; GFX11-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP10]], i64 2 +; GFX11-NEXT: [[TMP12:%.*]] = extractelement <4 x i32> [[TMP11]], i64 3 +; GFX11-NEXT: [[TMP13:%.*]] = and i32 [[TMP12]], -805306369 +; GFX11-NEXT: [[TMP14:%.*]] = or i32 [[TMP13]], 268435456 +; GFX11-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP14]], i64 3 +; GFX11-NEXT: [[TMP16:%.*]] = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> [[DESC]], i32 add (i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 288), i32 0), !invariant.load [[META7:![0-9]+]] +; GFX11-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP16]] to float +; GFX11-NEXT: store float [[TMP17]], ptr [[OUT]], align 4 +; GFX11-NEXT: ret void +; +entry: + %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) + %146 = call ptr @llvm.invariant.start.p7(i64 -1, ptr addrspace(7) %ptr) + %buf.off = getelementptr inbounds i8, ptr addrspace(7) %ptr, i32 8 + %buf.cnv = call ptr addrspace(9) @lgc.convert.to.strided.buffer.pointer(ptr addrspace(7) %buf.off, i32 12) + %buf.idx = call ptr addrspace(9) @lgc.strided.index.add(ptr addrspace(9) %buf.cnv, i32 24) + %res = load float, ptr addrspace(9) %buf.idx, align 4 + store float %res, ptr %out, align 4 + ret void +} + +define amdgpu_kernel void @strided_buffer_divergent_idx_strided_load(<4 x i32> %desc, i32 %index, ptr %out) #0 !lgc.shaderstage !4 { +; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_divergent_idx_strided_load +; GFX11-SAME: (<4 x i32> [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR1]] !lgc.shaderstage [[META6]] { +; GFX11-NEXT: entry: +; GFX11-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; GFX11-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; GFX11-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[PAD11]], i64 0 +; GFX11-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; GFX11-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; GFX11-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[USERDATA3]], i64 0 +; GFX11-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[USERDATA4]], i64 1 +; GFX11-NEXT: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to i64 +; GFX11-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> +; GFX11-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP8]], i64 0 +; GFX11-NEXT: [[TMP10:%.*]] = extractelement <2 x i32> [[TMP8]], i64 1 +; GFX11-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP9]], i64 0 +; GFX11-NEXT: [[TMP12:%.*]] = or i32 [[TMP10]], 1048576 +; GFX11-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP12]], i64 1 +; GFX11-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 -1, i64 2 +; GFX11-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP14]], i32 536956844, i64 3 +; GFX11-NEXT: [[TMP16:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP15]], i32 [[INDEX]], i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP16]] to float +; GFX11-NEXT: store float [[TMP17]], ptr [[OUT]], align 4 +; GFX11-NEXT: ret void +; +entry: + %buf = call ptr addrspace(9) @lgc.load.strided.buffer.desc(i64 8589934592, i32 0, i32 0, i32 4, i32 16) + %146 = call ptr @llvm.invariant.start.p9(i64 -1, ptr addrspace(9) %buf) + %buf.idx = call ptr addrspace(9) @lgc.strided.index.add(ptr addrspace(9) %buf, i32 %index) + %res = load float, ptr addrspace(9) %buf.idx, align 16 + store float %res, ptr %out, align 4 + ret void +} + +define amdgpu_kernel void @strided_buffer_convert_divergent_idx_strided_load(<4 x i32> inreg %desc, i32 %index, ptr %out) #0 !lgc.shaderstage !4 { +; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_convert_divergent_idx_strided_load +; GFX11-SAME: (<4 x i32> inreg [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR1]] !lgc.shaderstage [[META6]] { +; GFX11-NEXT: entry: +; GFX11-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; GFX11-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; GFX11-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[PAD11]], i64 0 +; GFX11-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; GFX11-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; GFX11-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[DESC]], i64 1 +; GFX11-NEXT: [[TMP6:%.*]] = and i32 [[TMP5]], -1073676289 +; GFX11-NEXT: [[TMP7:%.*]] = or i32 [[TMP6]], 786432 +; GFX11-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[DESC]], i32 [[TMP7]], i64 1 +; GFX11-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP8]], i64 2 +; GFX11-NEXT: [[TMP10:%.*]] = udiv i32 [[TMP9]], 12 +; GFX11-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP10]], i64 2 +; GFX11-NEXT: [[TMP12:%.*]] = extractelement <4 x i32> [[TMP11]], i64 3 +; GFX11-NEXT: [[TMP13:%.*]] = and i32 [[TMP12]], -805306369 +; GFX11-NEXT: [[TMP14:%.*]] = or i32 [[TMP13]], 268435456 +; GFX11-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP14]], i64 3 +; GFX11-NEXT: [[TMP16:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP15]], i32 [[INDEX]], i32 ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32), i32 0, i32 0) +; GFX11-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP16]] to float +; GFX11-NEXT: store float [[TMP17]], ptr [[OUT]], align 4 +; GFX11-NEXT: ret void +; +entry: + %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) + %146 = call ptr @llvm.invariant.start.p7(i64 -1, ptr addrspace(7) %ptr) + %buf.off = getelementptr inbounds i8, ptr addrspace(7) %ptr, i32 8 + %buf.cnv = call ptr addrspace(9) @lgc.convert.to.strided.buffer.pointer(ptr addrspace(7) %buf.off, i32 12) + %buf.idx = call ptr addrspace(9) @lgc.strided.index.add(ptr addrspace(9) %buf.cnv, i32 %index) + %res = load float, ptr addrspace(9) %buf.idx, align 4 + store float %res, ptr %out, align 4 + ret void +} + +define amdgpu_kernel void @strided_buffer_divergent_ptr_strided_load(<4 x i32> %desc, ptr %out) #0 !lgc.shaderstage !4 { +; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_divergent_ptr_strided_load +; GFX11-SAME: (<4 x i32> [[DESC:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR1]] !lgc.shaderstage [[META6]] { +; GFX11-NEXT: entry: +; GFX11-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; GFX11-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; GFX11-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[SPILLTABLE]], i64 0 +; GFX11-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; GFX11-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; GFX11-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[USERDATA4]], i64 0 +; GFX11-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[USERDATA5]], i64 1 +; GFX11-NEXT: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to i64 +; GFX11-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> +; GFX11-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP8]], i64 0 +; GFX11-NEXT: [[TMP10:%.*]] = extractelement <2 x i32> [[TMP8]], i64 1 +; GFX11-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP9]], i64 0 +; GFX11-NEXT: [[TMP12:%.*]] = or i32 [[TMP10]], 1048576 +; GFX11-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP12]], i64 1 +; GFX11-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 -1, i64 2 +; GFX11-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP14]], i32 536956844, i64 3 +; GFX11-NEXT: [[TMP16:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP15]], i32 24, i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP16]] to float +; GFX11-NEXT: store float [[TMP17]], ptr [[OUT]], align 4 +; GFX11-NEXT: ret void +; +entry: + %buf = call ptr addrspace(9) @lgc.load.strided.buffer.desc(i64 8589934592, i32 0, i32 0, i32 4, i32 16) + %buf.idx = call ptr addrspace(9) @lgc.strided.index.add(ptr addrspace(9) %buf, i32 24) + %res = load float, ptr addrspace(9) %buf.idx, align 16 + store float %res, ptr %out, align 4 + ret void +} + +define amdgpu_kernel void @strided_buffer_convert_divergent_ptr_strided_load(<4 x i32> %desc, i32 inreg %index, ptr %out) #0 !lgc.shaderstage !4 { +; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_convert_divergent_ptr_strided_load +; GFX11-SAME: (<4 x i32> [[DESC:%.*]], i32 inreg [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR1]] !lgc.shaderstage [[META6]] { +; GFX11-NEXT: entry: +; GFX11-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; GFX11-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; GFX11-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[PAD11]], i64 0 +; GFX11-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; GFX11-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; GFX11-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[DESC]], i64 1 +; GFX11-NEXT: [[TMP6:%.*]] = and i32 [[TMP5]], -1073676289 +; GFX11-NEXT: [[TMP7:%.*]] = or i32 [[TMP6]], 786432 +; GFX11-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[DESC]], i32 [[TMP7]], i64 1 +; GFX11-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP8]], i64 2 +; GFX11-NEXT: [[TMP10:%.*]] = udiv i32 [[TMP9]], 12 +; GFX11-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP10]], i64 2 +; GFX11-NEXT: [[TMP12:%.*]] = extractelement <4 x i32> [[TMP11]], i64 3 +; GFX11-NEXT: [[TMP13:%.*]] = and i32 [[TMP12]], -805306369 +; GFX11-NEXT: [[TMP14:%.*]] = or i32 [[TMP13]], 268435456 +; GFX11-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP14]], i64 3 +; GFX11-NEXT: [[TMP16:%.*]] = extractelement <4 x i32> [[TMP15]], i64 2 +; GFX11-NEXT: [[TMP17:%.*]] = extractelement <4 x i32> [[TMP15]], i64 1 +; GFX11-NEXT: [[TMP18:%.*]] = lshr i32 [[TMP17]], 16 +; GFX11-NEXT: [[TMP19:%.*]] = and i32 [[TMP18]], 16383 +; GFX11-NEXT: [[TMP20:%.*]] = mul i32 [[TMP16]], [[TMP19]] +; GFX11-NEXT: [[TMP21:%.*]] = mul i32 24, [[TMP19]] +; GFX11-NEXT: [[TMP22:%.*]] = add i32 [[TMP21]], ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32) +; GFX11-NEXT: [[TMP23:%.*]] = icmp ult i32 [[TMP22]], [[TMP20]] +; GFX11-NEXT: [[TMP24:%.*]] = shufflevector <4 x i32> [[TMP15]], <4 x i32> poison, <2 x i32> +; GFX11-NEXT: [[TMP25:%.*]] = and <2 x i32> [[TMP24]], +; GFX11-NEXT: [[TMP26:%.*]] = bitcast <2 x i32> [[TMP25]] to i64 +; GFX11-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP26]] to ptr addrspace(1) +; GFX11-NEXT: [[TMP28:%.*]] = select i1 [[TMP23]], i32 [[TMP22]], i32 0 +; GFX11-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(1) [[TMP27]], i32 [[TMP28]] +; GFX11-NEXT: [[TMP30:%.*]] = load float, ptr addrspace(1) [[TMP29]], align 4 +; GFX11-NEXT: store float [[TMP30]], ptr [[OUT]], align 4 +; GFX11-NEXT: ret void +; +entry: + %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) + %buf.off = getelementptr inbounds i8, ptr addrspace(7) %ptr, i32 8 + %buf.cnv = call ptr addrspace(9) @lgc.convert.to.strided.buffer.pointer(ptr addrspace(7) %buf.off, i32 12) + %buf.idx = call ptr addrspace(9) @lgc.strided.index.add(ptr addrspace(9) %buf.cnv, i32 24) + %res = load float, ptr addrspace(9) %buf.idx, align 4 + store float %res, ptr %out, align 4 + ret void +} + +define amdgpu_kernel void @strided_buffer_divergent_strided_load(<4 x i32> %desc, i32 %index, ptr %out) #0 !lgc.shaderstage !4 { +; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_divergent_strided_load +; GFX11-SAME: (<4 x i32> [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR1]] !lgc.shaderstage [[META6]] { +; GFX11-NEXT: entry: +; GFX11-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; GFX11-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; GFX11-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[PAD11]], i64 0 +; GFX11-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; GFX11-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; GFX11-NEXT: [[TMP5:%.*]] = insertelement <2 x i32> poison, i32 [[USERDATA3]], i64 0 +; GFX11-NEXT: [[TMP6:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[USERDATA4]], i64 1 +; GFX11-NEXT: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to i64 +; GFX11-NEXT: [[TMP8:%.*]] = bitcast i64 [[TMP7]] to <2 x i32> +; GFX11-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP8]], i64 0 +; GFX11-NEXT: [[TMP10:%.*]] = extractelement <2 x i32> [[TMP8]], i64 1 +; GFX11-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> poison, i32 [[TMP9]], i64 0 +; GFX11-NEXT: [[TMP12:%.*]] = or i32 [[TMP10]], 1048576 +; GFX11-NEXT: [[TMP13:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP12]], i64 1 +; GFX11-NEXT: [[TMP14:%.*]] = insertelement <4 x i32> [[TMP13]], i32 -1, i64 2 +; GFX11-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP14]], i32 536956844, i64 3 +; GFX11-NEXT: [[TMP16:%.*]] = call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP15]], i32 [[INDEX]], i32 0, i32 0, i32 0) +; GFX11-NEXT: [[TMP17:%.*]] = bitcast i32 [[TMP16]] to float +; GFX11-NEXT: store float [[TMP17]], ptr [[OUT]], align 4 +; GFX11-NEXT: ret void +; +entry: + %buf = call ptr addrspace(9) @lgc.load.strided.buffer.desc(i64 8589934592, i32 0, i32 0, i32 4, i32 16) + %buf.idx = call ptr addrspace(9) @lgc.strided.index.add(ptr addrspace(9) %buf, i32 %index) + %res = load float, ptr addrspace(9) %buf.idx, align 16 + store float %res, ptr %out, align 4 + ret void +} + +define amdgpu_kernel void @strided_buffer_convert_divergent_strided_load(<4 x i32> %desc, i32 %index, ptr %out) #0 !lgc.shaderstage !4 { +; GFX11-LABEL: define amdgpu_gfx void @strided_buffer_convert_divergent_strided_load +; GFX11-SAME: (<4 x i32> [[DESC:%.*]], i32 [[INDEX:%.*]], ptr [[OUT:%.*]], i32 inreg noundef [[GLOBALTABLE:%.*]], ptr addrspace(4) inreg noundef [[NUMWORKGROUPSPTR:%.*]], i32 inreg noundef [[USERDATA0:%.*]], i32 inreg noundef [[USERDATA1:%.*]], i32 inreg noundef [[USERDATA2:%.*]], i32 inreg noundef [[USERDATA3:%.*]], i32 inreg noundef [[USERDATA4:%.*]], i32 inreg noundef [[USERDATA5:%.*]], i32 inreg noundef [[PAD6:%.*]], i32 inreg noundef [[PAD7:%.*]], i32 inreg noundef [[PAD8:%.*]], i32 inreg noundef [[PAD9:%.*]], i32 inreg noundef [[PAD10:%.*]], i32 inreg noundef [[PAD11:%.*]], i32 inreg noundef [[SPILLTABLE:%.*]], <3 x i32> inreg noundef [[WORKGROUPID:%.*]], i32 inreg noundef [[MULTIDISPATCHINFO:%.*]], i32 noundef [[LOCALINVOCATIONID:%.*]]) #[[ATTR1]] !lgc.shaderstage [[META6]] { +; GFX11-NEXT: entry: +; GFX11-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; GFX11-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; GFX11-NEXT: [[TMP2:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[PAD11]], i64 0 +; GFX11-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[TMP2]] to i64 +; GFX11-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) +; GFX11-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[DESC]], i64 1 +; GFX11-NEXT: [[TMP6:%.*]] = and i32 [[TMP5]], -1073676289 +; GFX11-NEXT: [[TMP7:%.*]] = or i32 [[TMP6]], 786432 +; GFX11-NEXT: [[TMP8:%.*]] = insertelement <4 x i32> [[DESC]], i32 [[TMP7]], i64 1 +; GFX11-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP8]], i64 2 +; GFX11-NEXT: [[TMP10:%.*]] = udiv i32 [[TMP9]], 12 +; GFX11-NEXT: [[TMP11:%.*]] = insertelement <4 x i32> [[TMP8]], i32 [[TMP10]], i64 2 +; GFX11-NEXT: [[TMP12:%.*]] = extractelement <4 x i32> [[TMP11]], i64 3 +; GFX11-NEXT: [[TMP13:%.*]] = and i32 [[TMP12]], -805306369 +; GFX11-NEXT: [[TMP14:%.*]] = or i32 [[TMP13]], 268435456 +; GFX11-NEXT: [[TMP15:%.*]] = insertelement <4 x i32> [[TMP11]], i32 [[TMP14]], i64 3 +; GFX11-NEXT: [[TMP16:%.*]] = extractelement <4 x i32> [[TMP15]], i64 2 +; GFX11-NEXT: [[TMP17:%.*]] = extractelement <4 x i32> [[TMP15]], i64 1 +; GFX11-NEXT: [[TMP18:%.*]] = lshr i32 [[TMP17]], 16 +; GFX11-NEXT: [[TMP19:%.*]] = and i32 [[TMP18]], 16383 +; GFX11-NEXT: [[TMP20:%.*]] = mul i32 [[TMP16]], [[TMP19]] +; GFX11-NEXT: [[TMP21:%.*]] = mul i32 [[INDEX]], [[TMP19]] +; GFX11-NEXT: [[TMP22:%.*]] = add i32 [[TMP21]], ptrtoint (ptr addrspace(6) getelementptr inbounds (i8, ptr addrspace(6) null, i32 8) to i32) +; GFX11-NEXT: [[TMP23:%.*]] = icmp ult i32 [[TMP22]], [[TMP20]] +; GFX11-NEXT: [[TMP24:%.*]] = shufflevector <4 x i32> [[TMP15]], <4 x i32> poison, <2 x i32> +; GFX11-NEXT: [[TMP25:%.*]] = and <2 x i32> [[TMP24]], +; GFX11-NEXT: [[TMP26:%.*]] = bitcast <2 x i32> [[TMP25]] to i64 +; GFX11-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP26]] to ptr addrspace(1) +; GFX11-NEXT: [[TMP28:%.*]] = select i1 [[TMP23]], i32 [[TMP22]], i32 0 +; GFX11-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(1) [[TMP27]], i32 [[TMP28]] +; GFX11-NEXT: [[TMP30:%.*]] = load float, ptr addrspace(1) [[TMP29]], align 4 +; GFX11-NEXT: store float [[TMP30]], ptr [[OUT]], align 4 +; GFX11-NEXT: ret void +; +entry: + %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) + %buf.off = getelementptr inbounds i8, ptr addrspace(7) %ptr, i32 8 + %buf.cnv = call ptr addrspace(9) @lgc.convert.to.strided.buffer.pointer(ptr addrspace(7) %buf.off, i32 12) + %buf.idx = call ptr addrspace(9) @lgc.strided.index.add(ptr addrspace(9) %buf.cnv, i32 %index) + %res = load float, ptr addrspace(9) %buf.idx, align 4 + store float %res, ptr %out, align 4 + ret void +} + ; Function Attrs: nounwind willreturn memory(none) declare ptr addrspace(9) @lgc.strided.buffer.desc.to.ptr(<4 x i32>) #0 @@ -310,6 +607,12 @@ declare ptr addrspace(9) @lgc.strided.index.add(ptr addrspace(9), i32) #0 ; Function Attrs: nounwind willreturn memory(none) declare ptr addrspace(9) @lgc.load.strided.buffer.desc(i64, i32, i32, i32, i32) #0 +declare ptr addrspace(9) @lgc.convert.to.strided.buffer.pointer(ptr addrspace(7), i32) + +declare ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32>) nounwind readnone + +declare ptr addrspace(7) @lgc.buffer.load.desc.to.ptr(ptr addrspace(4), i1, i1) nounwind readnone + ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare ptr @llvm.invariant.start.p9(i64 immarg, ptr addrspace(9) nocapture) #1 @@ -326,3 +629,4 @@ attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: re !2 = !{!"DescriptorMutable", i32 17, i32 0, i32 0, i32 40, i64 4294967296, i32 0, i32 8} !3 = !{!"DescriptorConstBufferCompact", i32 15, i32 255, i32 4, i32 2, i64 8589934592, i32 0, i32 2} !4 = !{i32 7} +!5 = !{} diff --git a/lgc/test/Transforms/PeepholeOpt/PeepholeOptLog2Underflow.lgc b/lgc/test/Transforms/PeepholeOpt/PeepholeOptLog2Underflow.lgc index eec180b04a..2aa88733b7 100644 --- a/lgc/test/Transforms/PeepholeOpt/PeepholeOptLog2Underflow.lgc +++ b/lgc/test/Transforms/PeepholeOpt/PeepholeOptLog2Underflow.lgc @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --version 2 -; RUN: lgc -mcpu=gfx1010 -passes=lgc-patch-peephole-opt -o - %s | FileCheck --check-prefixes=CHECK %s +; RUN: lgc -mcpu=gfx1010 -passes=lgc-peephole-optimization -o - %s | FileCheck --check-prefixes=CHECK %s ; Test that log2 underflow transform is correctly applied. diff --git a/lgc/test/Transforms/ReadFirstLane/PatchReadLane.lgc b/lgc/test/Transforms/ReadFirstLane/PatchReadLane.lgc index 5bd599ad09..8e899c9b44 100644 --- a/lgc/test/Transforms/ReadFirstLane/PatchReadLane.lgc +++ b/lgc/test/Transforms/ReadFirstLane/PatchReadLane.lgc @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc -; RUN: lgc -o - -mcpu=gfx1010 -passes=lgc-patch-read-first-lane %s | FileCheck %s +; RUN: lgc -o - -mcpu=gfx1010 -passes=lgc-lower-read-first-lane %s | FileCheck %s ; ModuleID = 'lgcPipeline' source_filename = "llpccompute6" diff --git a/lgc/test/Transforms/ReadFirstLane/issue2746.lgc b/lgc/test/Transforms/ReadFirstLane/issue2746.lgc index 14c07cd6d3..38f1d06146 100644 --- a/lgc/test/Transforms/ReadFirstLane/issue2746.lgc +++ b/lgc/test/Transforms/ReadFirstLane/issue2746.lgc @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --version 3 -; RUN: lgc -o - -passes=lgc-patch-read-first-lane %s | FileCheck --check-prefixes=CHECK %s +; RUN: lgc -o - -passes=lgc-lower-read-first-lane %s | FileCheck --check-prefixes=CHECK %s define i32 @f() { ; CHECK-LABEL: define i32 @f() { diff --git a/lgc/test/Transforms/ReadFirstLane/simple.lgc b/lgc/test/Transforms/ReadFirstLane/simple.lgc index 5312b0e0c5..c6e215fcfa 100644 --- a/lgc/test/Transforms/ReadFirstLane/simple.lgc +++ b/lgc/test/Transforms/ReadFirstLane/simple.lgc @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc -; RUN: lgc -o - -passes=lgc-patch-read-first-lane %s | FileCheck --check-prefixes=CHECK %s +; RUN: lgc -o - -passes=lgc-lower-read-first-lane %s | FileCheck --check-prefixes=CHECK %s define i32 @simple(i32 %x) { ; CHECK-LABEL: @simple( diff --git a/lgc/test/UberFetchShader.lgc b/lgc/test/UberFetchShader.lgc index eba122466e..7951375e25 100644 --- a/lgc/test/UberFetchShader.lgc +++ b/lgc/test/UberFetchShader.lgc @@ -45,21 +45,21 @@ ; CHECK: and i32 [[attr]], 1048576 ; Load the whole vertex -; CHECK: call <4 x i32> @llvm.amdgcn.struct.buffer.load.format.v4i32(<4 x i32> +; CHECK: call <4 x i32> @llvm.amdgcn.struct.buffer.load.format.v4i32{{(\.v4i32)?}}(<4 x i32> ; Load per channel, 4 channels -; CHECK: call i32 @llvm.amdgcn.struct.buffer.load.format.i32(<4 x i32> -; CHECK: call i32 @llvm.amdgcn.struct.buffer.load.format.i32(<4 x i32> -; CHECK: call i32 @llvm.amdgcn.struct.buffer.load.format.i32(<4 x i32> -; CHECK: call i32 @llvm.amdgcn.struct.buffer.load.format.i32(<4 x i32> +; CHECK: call i32 @llvm.amdgcn.struct.buffer.load.format.i32{{(\.v4i32)?}}(<4 x i32> +; CHECK: call i32 @llvm.amdgcn.struct.buffer.load.format.i32{{(\.v4i32)?}}(<4 x i32> +; CHECK: call i32 @llvm.amdgcn.struct.buffer.load.format.i32{{(\.v4i32)?}}(<4 x i32> +; CHECK: call i32 @llvm.amdgcn.struct.buffer.load.format.i32{{(\.v4i32)?}}(<4 x i32> define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spirv.ExecutionModel !10 !lgc.shaderstage !11 { .entry: - %0 = call <4 x float> @lgc.input.import.generic__v4f32(i1 false, i32 0, i32 0, i32 0, i32 poison) #1 + %0 = call <4 x float> @lgc.load.vertex.input__v4f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 poison, i32 poison) #1 ret void } ; Function Attrs: nounwind readonly willreturn -declare <4 x float> @lgc.input.import.generic__v4f32(i1, i32, i32, i32, i32) #1 +declare <4 x float> @lgc.load.vertex.input__v4f32(i1, i32, i32, i32, i32, i32, i32) #1 ; Function Attrs: nounwind declare void @lgc.output.export.builtin.CullDistance.i32.a1f32(i32, [1 x float]) #0 diff --git a/lgc/test/lgcdis.lgc b/lgc/test/lgcdis.lgc index b90f44f093..6124595390 100644 --- a/lgc/test/lgcdis.lgc +++ b/lgc/test/lgcdis.lgc @@ -71,8 +71,8 @@ target triple = "amdgcn--amdpal" define dllexport void @lgc.shader.VS.main() !lgc.shaderstage !24 { entry: - %TEXCOORD = call <2 x float> (...) @lgc.create.read.generic.input.v2f32(i32 1, i32 0, i32 0, i32 1, i32 16, i32 poison) - %POSITION = call <3 x float> (...) @lgc.create.read.generic.input.v3f32(i32 0, i32 0, i32 0, i32 1, i32 16, i32 poison) + %TEXCOORD = call <2 x float> (...) @lgc.load.vertex.input__v2f32(i1 false, i32 1, i32 0, i32 0, i32 1, i32 16, i32 poison) + %POSITION = call <3 x float> (...) @lgc.load.vertex.input__v3f32(i1 false, i32 0, i32 0, i32 0, i32 1, i32 16, i32 poison) %posext = shufflevector <3 x float> %POSITION, <3 x float> , <4 x i32> call void (...) @lgc.create.write.builtin.output(<4 x float> %posext, i32 0, i32 0, i32 poison, i32 poison) call void (...) @lgc.create.write.generic.output(<2 x float> %TEXCOORD, i32 1, i32 0, i32 0, i32 1, i32 0, i32 poison) @@ -80,10 +80,10 @@ entry: } ; Function Attrs: nounwind readonly willreturn -declare <2 x float> @lgc.create.read.generic.input.v2f32(...) #0 +declare <2 x float> @lgc.load.vertex.input__v2f32(...) #0 ; Function Attrs: nounwind readonly willreturn -declare <3 x float> @lgc.create.read.generic.input.v3f32(...) #0 +declare <3 x float> @lgc.load.vertex.input__v3f32(...) #0 ; Function Attrs: nounwind declare void @lgc.create.write.builtin.output(...) #1 @@ -101,6 +101,9 @@ entry: ret void } +; Function Attrs: nounwind readonly willreturn +declare <2 x float> @lgc.create.read.generic.input.v2f32(...) #0 + ; Function Attrs: nounwind readnone declare <8 x i32> addrspace(4)* @lgc.create.get.desc.ptr.p4v8i32(...) #2 diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest1.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest1.lgc index f696a34067..34faf88508 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest1.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest1.lgc @@ -12,7 +12,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: .entry: ; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.amdgcn.s.getpc() ; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[TMP8]] to <2 x i32> -; CHECK-NEXT: [[TMP0:%.*]] = call i32 @lgc.input.import.generic__i32(i1 false, i32 0, i32 0, i32 0, i32 poison) +; CHECK-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) ; CHECK-NEXT: [[TMP3:%.*]] = call i32 @lgc.load.user.data__i32(i32 0) ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP12]], i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP19:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 @@ -44,7 +44,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: ret void ; .entry: - %0 = call i32 (...) @lgc.create.read.generic.input__i32(i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) + %0 = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) %1 = call ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) %2 = call i32 (...) @lgc.create.get.desc.stride__i32(i32 1, i32 1, i64 0, i32 0) %3 = mul i32 %0, %2 @@ -59,7 +59,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi } ; Function Attrs: nounwind willreturn memory(read) -declare i32 @lgc.create.read.generic.input__i32(...) local_unnamed_addr #1 +declare i32 @lgc.load.vertex.input__i32(...) local_unnamed_addr #1 ; Function Attrs: nounwind memory(none) declare ptr addrspace(4) @lgc.create.get.desc.ptr.p4(...) local_unnamed_addr #2 diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest12.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest12.lgc index ff849485d3..5fbe6ff84c 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest12.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest12.lgc @@ -33,7 +33,7 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[PHI_IND:%.*]] = phi i32 [ 0, [[DOTENTRY:%.*]] ], [ [[IND:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[PHI_IMG:%.*]] = phi <4 x float> [ , [[DOTENTRY]] ], [ [[I11:%.*]], [[LOOP]] ] +; CHECK-NEXT: [[PHI_IMG:%.*]] = phi <4 x float> [ {{(splat \(float 1\.000000e\+00\))|()}}, [[DOTENTRY]] ], [ [[I11:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[I3:%.*]] = mul i32 [[PHI_IND]], 48 ; CHECK-NEXT: [[I4:%.*]] = sext i32 [[I3]] to i64 ; CHECK-NEXT: [[I5:%.*]] = getelementptr i8, ptr addrspace(4) [[I1]], i64 [[I4]] @@ -52,7 +52,7 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: [[TMP19:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP18]], align 4, !invariant.load [[META10]] ; CHECK-NEXT: [[TMP20:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP16]], <4 x i32> [[TMP19]], i1 false, i32 0, i32 0) ; CHECK-NEXT: [[I11]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.waterfall.end.v4f32(i32 [[TMP12]], <4 x float> [[TMP20]]) -; CHECK-NEXT: [[I12:%.*]] = fadd <4 x float> [[PHI_IMG]], +; CHECK-NEXT: [[I12:%.*]] = fadd <4 x float> [[PHI_IMG]], {{(splat \(float 1\.000000e\+00\))|()}} ; CHECK-NEXT: [[IND]] = add i32 [[PHI_IND]], 1 ; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[IND]], 1000 ; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest14.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest14.lgc index b86e284665..1ed7731c3a 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest14.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest14.lgc @@ -34,7 +34,7 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[PHI_IND:%.*]] = phi i32 [ 0, [[DOTENTRY:%.*]] ], [ [[IND:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[PHI_IMG:%.*]] = phi <4 x float> [ , [[DOTENTRY]] ], [ [[I11:%.*]], [[LOOP]] ] +; CHECK-NEXT: [[PHI_IMG:%.*]] = phi <4 x float> [ {{(splat \(float 1\.000000e\+00\))|()}}, [[DOTENTRY]] ], [ [[I11:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[I3:%.*]] = mul i32 [[PHI_IND]], 48 ; CHECK-NEXT: [[I4:%.*]] = sext i32 [[I3]] to i64 ; CHECK-NEXT: [[I5:%.*]] = getelementptr i8, ptr addrspace(4) [[I1]], i64 [[I4]] @@ -53,7 +53,7 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: [[TMP19:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP18]], align 4, !invariant.load [[META10]] ; CHECK-NEXT: [[TMP20:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP16]], <4 x i32> [[TMP19]], i1 false, i32 0, i32 0) ; CHECK-NEXT: [[I11]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.waterfall.end.v4f32(i32 [[TMP12]], <4 x float> [[TMP20]]) -; CHECK-NEXT: [[I12:%.*]] = fadd <4 x float> [[PHI_IMG]], +; CHECK-NEXT: [[I12:%.*]] = fadd <4 x float> [[PHI_IMG]], {{(splat \(float 1\.000000e\+00\))|()}} ; CHECK-NEXT: [[IND]] = add i32 [[PHI_IND]], 1 ; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[IND]], 1000 ; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]] diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest15.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest15.lgc index f45f4e1820..2844ab68a2 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest15.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest15.lgc @@ -33,7 +33,7 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[PHI_IND:%.*]] = phi i32 [ 0, [[DOTENTRY:%.*]] ], [ [[IND:%.*]], [[LOOP]] ] -; CHECK-NEXT: [[PHI_IMG:%.*]] = phi <4 x float> [ , [[DOTENTRY]] ], [ [[I11:%.*]], [[LOOP]] ] +; CHECK-NEXT: [[PHI_IMG:%.*]] = phi <4 x float> [ {{(splat \(float 1\.000000e\+00\))|()}}, [[DOTENTRY]] ], [ [[I11:%.*]], [[LOOP]] ] ; CHECK-NEXT: [[I3:%.*]] = mul i32 [[PHI_IND]], 48 ; CHECK-NEXT: [[I4:%.*]] = sext i32 [[I3]] to i64 ; CHECK-NEXT: [[I5:%.*]] = getelementptr i8, ptr addrspace(4) [[I1]], i64 [[I4]] @@ -52,7 +52,7 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: [[TMP19:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP18]], align 4, !invariant.load [[META10]] ; CHECK-NEXT: [[TMP20:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP16]], <4 x i32> [[TMP19]], i1 false, i32 0, i32 0) ; CHECK-NEXT: [[I11]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.waterfall.end.v4f32(i32 [[TMP12]], <4 x float> [[TMP20]]) -; CHECK-NEXT: [[I12:%.*]] = fadd <4 x float> [[PHI_IMG]], +; CHECK-NEXT: [[I12:%.*]] = fadd <4 x float> [[PHI_IMG]], {{(splat \(float 1\.000000e\+00\))|()}} ; CHECK-NEXT: [[TMP27:%.*]] = load <8 x i32>, ptr addrspace(4) [[I8]], align 4, !invariant.load [[META10]] ; CHECK-NEXT: [[TMP21:%.*]] = call i32 @llvm.amdgcn.waterfall.begin.i32(i32 0, i32 [[I6]]) ; CHECK-NEXT: [[TMP22:%.*]] = call i32 @llvm.amdgcn.waterfall.readfirstlane.i32.i32(i32 [[TMP21]], i32 [[I6]]) diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest2.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest2.lgc index db32092deb..4967e35e9e 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest2.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest2.lgc @@ -12,7 +12,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: .entry: ; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.amdgcn.s.getpc() ; CHECK-NEXT: [[TMP16:%.*]] = bitcast i64 [[TMP15]] to <2 x i32> -; CHECK-NEXT: [[TMP0:%.*]] = call i32 @lgc.input.import.generic__i32(i1 false, i32 0, i32 0, i32 0, i32 poison) +; CHECK-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) ; CHECK-NEXT: [[TMP3:%.*]] = call i32 @lgc.load.user.data__i32(i32 0) ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP16]], i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 @@ -36,7 +36,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: ret void ; .entry: - %0 = call i32 (...) @lgc.create.read.generic.input__i32(i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) + %0 = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) %1 = call ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) %2 = call i32 (...) @lgc.create.get.desc.stride__i32(i32 1, i32 1, i64 0, i32 0) %3 = mul i32 %0, %2 @@ -49,7 +49,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi } ; Function Attrs: nounwind willreturn memory(read) -declare i32 @lgc.create.read.generic.input__i32(...) local_unnamed_addr #1 +declare i32 @lgc.load.vertex.input__i32(...) local_unnamed_addr #1 ; Function Attrs: nounwind memory(none) declare ptr addrspace(4) @lgc.create.get.desc.ptr.p4(...) local_unnamed_addr #2 diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest3.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest3.lgc index 26cc80c901..bfe917e808 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest3.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest3.lgc @@ -10,49 +10,51 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ; CHECK-LABEL: define dllexport spir_func void @lgc.shader.VS.main( ; CHECK-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] !spirv.ExecutionModel [[META14:![0-9]+]] !lgc.shaderstage [[META15:![0-9]+]] { ; CHECK-NEXT: .entry: -; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.amdgcn.s.getpc() -; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[TMP8]] to <2 x i32> -; CHECK-NEXT: [[TMP0:%.*]] = call i32 @lgc.input.import.generic__i32(i1 false, i32 0, i32 0, i32 0, i32 poison) +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64 [[TMP0]] to <2 x i32> +; CHECK-NEXT: [[TMP2:%.*]] = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) ; CHECK-NEXT: [[TMP3:%.*]] = call i32 @lgc.load.user.data__i32(i32 0) -; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP12]], i32 [[TMP3]], i64 0 -; CHECK-NEXT: [[TMP16:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 -; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr addrspace(4) -; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) [[TMP17]], i32 4), "dereferenceable"(ptr addrspace(4) [[TMP17]], i32 -1) ] -; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP17]], i32 0 -; CHECK-NEXT: [[TMP1:%.*]] = mul i32 [[TMP0]], 16 -; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64 -; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP7]], i64 [[TMP2]] -; CHECK-NEXT: [[TMP20:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP18]], align 16, !invariant.load [[META16:![0-9]+]] -; CHECK-NEXT: [[TMP5:%.*]] = mul i32 [[TMP0]], 16 -; CHECK-NEXT: [[TMP6:%.*]] = sext i32 [[TMP5]] to i64 -; CHECK-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP7]], i64 [[TMP6]] -; CHECK-NEXT: [[TMP22:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP21]], align 4, !invariant.load [[META16]] -; CHECK-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.waterfall.begin.i32(i32 0, i32 [[TMP5]]) -; CHECK-NEXT: [[TMP10:%.*]] = call i32 @llvm.amdgcn.waterfall.readfirstlane.i32.i32(i32 [[TMP9]], i32 [[TMP5]]) -; CHECK-NEXT: [[TMP11:%.*]] = sext i32 [[TMP10]] to i64 -; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP7]], i64 [[TMP11]] -; CHECK-NEXT: [[TMP13:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP19]], align 4, !invariant.load [[META16]] -; CHECK-NEXT: [[TMP14:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP13]], <4 x i32> , i1 false, i32 0, i32 0) -; CHECK-NEXT: [[TMP15:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.waterfall.end.v4f32(i32 [[TMP9]], <4 x float> [[TMP14]]) +; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP1]], i32 [[TMP3]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(4) +; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) [[TMP6]], i32 4), "dereferenceable"(ptr addrspace(4) [[TMP6]], i32 -1) ] +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP6]], i32 0 +; CHECK-NEXT: [[TMP8:%.*]] = mul i32 [[TMP2]], 16 +; CHECK-NEXT: [[TMP9:%.*]] = sext i32 [[TMP8]] to i64 +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP7]], i64 [[TMP9]] +; CHECK-NEXT: [[TMP11:%.*]] = mul i32 [[TMP2]], 16 +; CHECK-NEXT: [[TMP12:%.*]] = sext i32 [[TMP11]] to i64 +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP7]], i64 [[TMP12]] +; CHECK-NEXT: [[TMP14:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP13]], align 4, !invariant.load [[META16:![0-9]+]] +; CHECK-NEXT: [[TMP15:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP10]], align 4, !invariant.load [[META16]] +; CHECK-NEXT: [[TMP16:%.*]] = call i32 @llvm.amdgcn.waterfall.begin.i32(i32 0, i32 [[TMP11]]) +; CHECK-NEXT: [[TMP17:%.*]] = call i32 @llvm.amdgcn.waterfall.readfirstlane.i32.i32(i32 [[TMP16]], i32 [[TMP11]]) +; CHECK-NEXT: [[TMP18:%.*]] = sext i32 [[TMP17]] to i64 +; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP7]], i64 [[TMP18]] +; CHECK-NEXT: [[TMP20:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP19]], align 4, !invariant.load [[META16]] +; CHECK-NEXT: [[TMP21:%.*]] = sext i32 [[TMP17]] to i64 +; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP7]], i64 [[TMP21]] +; CHECK-NEXT: [[TMP23:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP22]], align 4, !invariant.load [[META16]] +; CHECK-NEXT: [[TMP24:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32.v8i32.v4i32(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP20]], <4 x i32> [[TMP23]], i1 false, i32 0, i32 0) +; CHECK-NEXT: [[TMP25:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.waterfall.end.v4f32(i32 [[TMP16]], <4 x float> [[TMP24]]) ; CHECK-NEXT: ret void ; .entry: - %0 = call i32 (...) @lgc.create.read.generic.input__i32(i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) + %0 = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) %1 = call ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) %2 = call i32 (...) @lgc.create.get.desc.stride__i32(i32 1, i32 1, i64 0, i32 0) %3 = mul i32 %0, %2 %4 = sext i32 %3 to i64 %5 = getelementptr i8, ptr addrspace(4) %1, i64 %4 - %6 = load <4 x i32>, ptr addrspace(4) %5, align 16, !invariant.load !16 %7 = mul i32 %0, %2 %8 = sext i32 %7 to i64 %9 = getelementptr i8, ptr addrspace(4) %1, i64 %8 - %11 = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 24, ptr addrspace(4) %9, <4 x i32> , i32 1, <2 x float> zeroinitializer) + %11 = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 24, ptr addrspace(4) %9, ptr addrspace(4) %5, i32 1, <2 x float> zeroinitializer) ret void } ; Function Attrs: nounwind willreturn memory(read) -declare i32 @lgc.create.read.generic.input__i32(...) local_unnamed_addr #1 +declare i32 @lgc.load.vertex.input__i32(...) local_unnamed_addr #1 ; Function Attrs: nounwind memory(none) declare ptr addrspace(4) @lgc.create.get.desc.ptr.p4(...) local_unnamed_addr #2 diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest4.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest4.lgc index 269dc0163d..5db2a1feb9 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest4.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest4.lgc @@ -5,7 +5,7 @@ source_filename = "lgcPipeline" target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8-p32:32:32" target triple = "amdgcn--amdpal" -declare <4 x i32> @foo1(i32 %V) +declare ptr addrspace(4) @foo1(i32 %V) ; Function Attrs: nounwind define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spirv.ExecutionModel !14 !lgc.shaderstage !15 { @@ -14,7 +14,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: .entry: ; CHECK-NEXT: [[TMP19:%.*]] = call i64 @llvm.amdgcn.s.getpc() ; CHECK-NEXT: [[TMP20:%.*]] = bitcast i64 [[TMP19]] to <2 x i32> -; CHECK-NEXT: [[TMP0:%.*]] = call i32 @lgc.input.import.generic__i32(i1 false, i32 0, i32 0, i32 0, i32 poison) +; CHECK-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 poison, i32 poison) ; CHECK-NEXT: [[TMP3:%.*]] = call i32 @lgc.load.user.data__i32(i32 0) ; CHECK-NEXT: [[TMP4:%.*]] = insertelement <2 x i32> [[TMP20]], i32 [[TMP3]], i64 0 ; CHECK-NEXT: [[TMP21:%.*]] = bitcast <2 x i32> [[TMP4]] to i64 @@ -43,7 +43,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: ret void ; .entry: - %0 = call i32 (...) @lgc.create.read.generic.input__i32(i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) + %0 = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 poison, i32 poison) %1 = call ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) %2 = call i32 (...) @lgc.create.get.desc.stride__i32(i32 1, i32 1, i64 0, i32 0) %3 = mul i32 %0, %2 @@ -59,7 +59,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi } ; Function Attrs: nounwind willreturn memory(read) -declare i32 @lgc.create.read.generic.input__i32(...) local_unnamed_addr #1 +declare i32 @lgc.load.vertex.input__i32(...) local_unnamed_addr #1 ; Function Attrs: nounwind memory(none) declare ptr addrspace(4) @lgc.create.get.desc.ptr.p4(...) local_unnamed_addr #2 diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest5.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest5.lgc index 3e6944dcd9..53805e6421 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest5.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest5.lgc @@ -12,7 +12,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP8:%.*]] = call i64 @llvm.amdgcn.s.getpc() ; CHECK-NEXT: [[TMP12:%.*]] = bitcast i64 [[TMP8]] to <2 x i32> -; CHECK-NEXT: [[TMP0:%.*]] = call i32 @lgc.input.import.generic__i32(i1 false, i32 0, i32 0, i32 0, i32 poison) +; CHECK-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) ; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP0]], 0 ; CHECK-NEXT: br i1 [[DOTNOT]], label [[RET:%.*]], label [[BB:%.*]] ; CHECK: bb: @@ -49,7 +49,7 @@ define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: ret void ; entry: - %0 = call i32 (...) @lgc.create.read.generic.input__i32(i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) + %0 = call i32 (...) @lgc.load.vertex.input__i32(i1 false, i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison) %.not = icmp eq i32 %0, 0 br i1 %.not, label %ret, label %bb @@ -71,7 +71,7 @@ ret: ; preds = %bb, %entry } ; Function Attrs: nounwind willreturn memory(read) -declare i32 @lgc.create.read.generic.input__i32(...) local_unnamed_addr #1 +declare i32 @lgc.load.vertex.input__i32(...) local_unnamed_addr #1 ; Function Attrs: nounwind memory(none) declare ptr addrspace(4) @lgc.create.get.desc.ptr.p4(...) local_unnamed_addr #2 diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest6.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest6.lgc index 9c6d5c8f0c..d250aee16f 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest6.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest6.lgc @@ -37,7 +37,7 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) [[TMP17]], i32 4), "dereferenceable"(ptr addrspace(4) [[TMP17]], i32 -1) ] ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP17]], i32 0 ; CHECK-NEXT: [[TMP19:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP18]], align 4, !invariant.load [[META24:![0-9]+]] -; CHECK-NEXT: [[TMP20:%.*]] = call <4 x i32> @llvm.amdgcn.image.load.1d.v4i32.i32{{(\.v8i32)?}}(i32 15, i32 [[DOT0]], <8 x i32> [[TMP19]], i32 0, i32 0), !invariant.load [[META24]] +; CHECK-NEXT: [[TMP20:%.*]] = call <4 x i32> @llvm.amdgcn.image.load.1d.v4i32.i32.v8i32(i32 15, i32 [[DOT0]], <8 x i32> [[TMP19]], i32 0, i32 0), !invariant.load [[META24]] ; CHECK-NEXT: [[TMP21:%.*]] = extractelement <4 x i32> [[TMP20]], i64 0 ; CHECK-NEXT: [[TMP22:%.*]] = call i32 @lgc.load.user.data__i32(i32 36) ; CHECK-NEXT: [[TMP23:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[TMP22]], i64 0 @@ -54,42 +54,45 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: [[TMP34:%.*]] = inttoptr i64 [[TMP33]] to ptr addrspace(4) ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) [[TMP34]], i32 4), "dereferenceable"(ptr addrspace(4) [[TMP34]], i32 -1) ] ; CHECK-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP34]], i32 0 -; CHECK-NEXT: [[TMP52:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP29]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP41:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP29]], align 4, !invariant.load [[META24]] ; CHECK-NEXT: [[TMP36:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP35]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP47:%.*]] = call <4 x i32> @llvm.amdgcn.readfirstlane.v4i32(<4 x i32> [[TMP36]]) ; CHECK-NEXT: [[TMP37:%.*]] = call i32 @llvm.amdgcn.waterfall.begin.i32(i32 0, i32 [[TMP27]]) ; CHECK-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.waterfall.readfirstlane.i32.i32(i32 [[TMP37]], i32 [[TMP27]]) ; CHECK-NEXT: [[TMP39:%.*]] = sext i32 [[TMP38]] to i64 ; CHECK-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP26]], i64 [[TMP39]] -; CHECK-NEXT: [[TMP41:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP40]], align 4, !invariant.load [[META24]] -; CHECK-NEXT: [[TMP42:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP41]], <4 x i32> [[TMP36]], i1 false, i32 0, i32 0) +; CHECK-NEXT: [[TMP52:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP40]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP42:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32.v8i32.v4i32(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP52]], <4 x i32> [[TMP47]], i1 false, i32 0, i32 0) ; CHECK-NEXT: [[TMP43:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.waterfall.end.v4f32(i32 [[TMP37]], <4 x float> [[TMP42]]) ; CHECK-NEXT: [[TMP44:%.*]] = mul i32 [[TMP7]], 32 ; CHECK-NEXT: [[TMP45:%.*]] = sext i32 [[TMP44]] to i64 ; CHECK-NEXT: [[TMP46:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP26]], i64 [[TMP45]] -; CHECK-NEXT: [[TMP47:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP46]], align 4, !invariant.load [[META24]] -; CHECK-NEXT: [[TMP59:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP35]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP67:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP46]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP68:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP35]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP69:%.*]] = call <4 x i32> @llvm.amdgcn.readfirstlane.v4i32(<4 x i32> [[TMP68]]) ; CHECK-NEXT: [[TMP48:%.*]] = call i32 @llvm.amdgcn.waterfall.begin.i32(i32 0, i32 [[TMP44]]) ; CHECK-NEXT: [[TMP49:%.*]] = call i32 @llvm.amdgcn.waterfall.readfirstlane.i32.i32(i32 [[TMP48]], i32 [[TMP44]]) ; CHECK-NEXT: [[TMP50:%.*]] = sext i32 [[TMP49]] to i64 ; CHECK-NEXT: [[TMP51:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP26]], i64 [[TMP50]] -; CHECK-NEXT: [[TMP67:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP51]], align 4, !invariant.load [[META24]] -; CHECK-NEXT: [[TMP53:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP67]], <4 x i32> [[TMP59]], i1 false, i32 0, i32 0) +; CHECK-NEXT: [[TMP70:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP51]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP53:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32.v8i32.v4i32(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP70]], <4 x i32> [[TMP69]], i1 false, i32 0, i32 0) ; CHECK-NEXT: [[TMP54:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.waterfall.end.v4f32(i32 [[TMP48]], <4 x float> [[TMP53]]) -; CHECK-NEXT: [[TMP68:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP29]], align 4, !invariant.load [[META24]] -; CHECK-NEXT: [[TMP69:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP35]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP71:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP29]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP59:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP35]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP72:%.*]] = call <4 x i32> @llvm.amdgcn.readfirstlane.v4i32(<4 x i32> [[TMP59]]) ; CHECK-NEXT: [[TMP55:%.*]] = call i32 @llvm.amdgcn.waterfall.begin.i32(i32 0, i32 [[TMP27]]) ; CHECK-NEXT: [[TMP56:%.*]] = call i32 @llvm.amdgcn.waterfall.readfirstlane.i32.i32(i32 [[TMP55]], i32 [[TMP27]]) ; CHECK-NEXT: [[TMP57:%.*]] = sext i32 [[TMP56]] to i64 ; CHECK-NEXT: [[TMP58:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP26]], i64 [[TMP57]] -; CHECK-NEXT: [[TMP70:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP58]], align 4, !invariant.load [[META24]] -; CHECK-NEXT: [[TMP60:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP70]], <4 x i32> [[TMP69]], i1 false, i32 0, i32 0) +; CHECK-NEXT: [[TMP73:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP58]], align 4, !invariant.load [[META24]] +; CHECK-NEXT: [[TMP60:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32.v8i32.v4i32(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP73]], <4 x i32> [[TMP72]], i1 false, i32 0, i32 0) ; CHECK-NEXT: [[TMP61:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.waterfall.end.v4f32(i32 [[TMP55]], <4 x float> [[TMP60]]) ; CHECK-NEXT: [[TMP62]] = fadd reassoc nnan nsz arcp contract afn <4 x float> [[DOT09]], [[TMP61]] ; CHECK-NEXT: [[TMP63:%.*]] = fadd reassoc nnan nsz arcp contract afn <4 x float> [[TMP43]], [[TMP54]] ; CHECK-NEXT: [[TMP64]] = fadd reassoc nnan nsz arcp contract afn <4 x float> [[DOT010]], [[TMP63]] ; CHECK-NEXT: [[TMP65]] = add i32 [[DOT0]], 1 ; CHECK-NEXT: br label [[TMP9]], !llvm.loop [[LOOP25:![0-9]+]] -; CHECK: 69: +; CHECK: 72: ; CHECK-NEXT: ret void ; .entry: diff --git a/lgc/test/scalarizationOfDescriptorLoadsTest7.lgc b/lgc/test/scalarizationOfDescriptorLoadsTest7.lgc index 1da3d84680..d0239817ac 100644 --- a/lgc/test/scalarizationOfDescriptorLoadsTest7.lgc +++ b/lgc/test/scalarizationOfDescriptorLoadsTest7.lgc @@ -41,16 +41,17 @@ define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !spi ; CHECK-NEXT: [[I10:%.*]] = getelementptr i8, ptr addrspace(4) [[I3]], i64 [[I9]] ; CHECK-NEXT: br label [[BB3:%.*]] ; CHECK: bb3: -; CHECK-NEXT: [[TMP14:%.*]] = load <8 x i32>, ptr addrspace(4) [[I7]], align 4, !invariant.load [[META10:![0-9]+]] -; CHECK-NEXT: [[TMP19:%.*]] = load <4 x i32>, ptr addrspace(4) [[I3]], align 4, !invariant.load [[META10]] +; CHECK-NEXT: [[TMP15:%.*]] = load <8 x i32>, ptr addrspace(4) [[I7]], align 4, !invariant.load [[META10:![0-9]+]] +; CHECK-NEXT: [[TMP16:%.*]] = load <4 x i32>, ptr addrspace(4) [[I3]], align 4, !invariant.load [[META10]] +; CHECK-NEXT: [[TMP14:%.*]] = call <4 x i32> @llvm.amdgcn.readfirstlane.v4i32(<4 x i32> [[TMP16]]) ; CHECK-NEXT: [[TMP12:%.*]] = call i32 @llvm.amdgcn.waterfall.begin.i32(i32 0, i32 [[I5]]) ; CHECK-NEXT: [[TMP13:%.*]] = call i32 @llvm.amdgcn.waterfall.readfirstlane.i32.i32(i32 [[TMP12]], i32 [[I5]]) ; CHECK-NEXT: [[TMP17:%.*]] = sext i32 [[TMP13]] to i64 ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(4) [[I1]], i64 [[TMP17]] -; CHECK-NEXT: [[TMP16:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP18]], align 4, !invariant.load [[META10]] -; CHECK-NEXT: [[TMP20:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP16]], <4 x i32> [[TMP19]], i1 false, i32 0, i32 0) +; CHECK-NEXT: [[TMP19:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP18]], align 4, !invariant.load [[META10]] +; CHECK-NEXT: [[TMP20:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32.v8i32.v4i32(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP19]], <4 x i32> [[TMP14]], i1 false, i32 0, i32 0) ; CHECK-NEXT: [[I13:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.amdgcn.waterfall.end.v4f32(i32 [[TMP12]], <4 x float> [[TMP20]]) -; CHECK-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 0, i32 0, <4 x float> [[I13]]) #[[ATTR6:[0-9]+]] +; CHECK-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 0, i32 0, <4 x float> [[I13]]) #[[ATTR7:[0-9]+]] ; CHECK-NEXT: ret void ; .entry: diff --git a/lgc/tool/lgc/lgc.cpp b/lgc/tool/lgc/lgc.cpp index e42ec5447a..8375067b17 100644 --- a/lgc/tool/lgc/lgc.cpp +++ b/lgc/tool/lgc/lgc.cpp @@ -36,7 +36,7 @@ #include "lgc/LgcIlCpsDialect.h" #include "lgc/PassManager.h" #include "lgc/Pipeline.h" -#include "lgc/patch/Patch.h" +#include "lgc/patch/LgcLowering.h" #include "lgc/state/PipelineShaders.h" #include "lgc/state/PipelineState.h" #include "llvm-dialects/Dialect/Dialect.h" @@ -46,13 +46,7 @@ #include "llvm/Bitcode/BitcodeWriterPass.h" #include "llvm/CodeGen/CommandFlags.h" #include "llvm/IR/Verifier.h" -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 442438 -// Old version of the code -#include "llvm/IR/IRPrintingPasses.h" -#else -// New version of the code (also handles unknown version, which we treat as latest) #include "llvm/IRPrinter/IRPrintingPasses.h" -#endif #include "llvm/Passes/PassBuilder.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Path.h" @@ -160,20 +154,6 @@ static bool runPassPipeline(Pipeline &pipeline, Module &module, raw_pwrite_strea passMgr->addPass(VerifierPass()); passMgr->addPass(PipelineStateRecorder()); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - switch (codegen::getFileType()) { - case CGFT_AssemblyFile: - passMgr->addPass(PrintModulePass(outStream)); - break; - case CGFT_ObjectFile: - passMgr->addPass(BitcodeWriterPass(outStream)); - break; - case CGFT_Null: - break; - } -#else - // New version of the code (also handles unknown version, which we treat as latest) switch (codegen::getFileType()) { case CodeGenFileType::AssemblyFile: passMgr->addPass(PrintModulePass(outStream)); @@ -184,7 +164,6 @@ static bool runPassPipeline(Pipeline &pipeline, Module &module, raw_pwrite_strea case CodeGenFileType::Null: break; } -#endif passMgr->run(module); return true; @@ -256,23 +235,11 @@ int main(int argc, char **argv) { assert(optIterator != cl::getRegisteredOptions().end()); cl::Option *opt = optIterator->second; if (opt->getNumOccurrences() == 0) -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - *static_cast *>(opt) = CGFT_AssemblyFile; -#else - // New version of the code (also handles unknown version, which we treat as latest) *static_cast *>(opt) = CodeGenFileType::AssemblyFile; -#endif } // Create the LgcContext. -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - std::unique_ptr targetMachine(LgcContext::createTargetMachine(gpuName, CodeGenOpt::Level::Default)); -#else - // New version of the code (also handles unknown version, which we treat as latest) std::unique_ptr targetMachine(LgcContext::createTargetMachine(gpuName, CodeGenOptLevel::Default)); -#endif if (!targetMachine) { errs() << progName << ": GPU type '" << gpuName << "' not recognized\n"; return 1; diff --git a/lgc/unittests/interface/OptLevelTest.cpp b/lgc/unittests/interface/OptLevelTest.cpp index ae080771c1..370b9dc74a 100644 --- a/lgc/unittests/interface/OptLevelTest.cpp +++ b/lgc/unittests/interface/OptLevelTest.cpp @@ -41,15 +41,9 @@ TEST(LgcInterfaceTests, DefaultOptLevel) { unsigned palAbiVersion = 0xFFFFFFFF; StringRef gpuName = "gfx1010"; -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - for (auto optLevel : {Level::None, Level::Less, Level::Default, Level::Aggressive}) { -#else - // New version of the code (also handles unknown version, which we treat as latest) // Returns the optimization level for the context. for (auto optLevel : {CodeGenOptLevel::None, CodeGenOptLevel::Less, CodeGenOptLevel::Default, CodeGenOptLevel::Aggressive}) { -#endif std::unique_ptr targetMachine = LgcContext::createTargetMachine(gpuName, optLevel); std::unique_ptr lgcContext(LgcContext::create(&*targetMachine, context, palAbiVersion)); EXPECT_EQ(lgcContext->getOptimizationLevel(), optLevel); diff --git a/lgc/unittests/internal/CMakeLists.txt b/lgc/unittests/internal/CMakeLists.txt index 49bb249584..79b95b0c6d 100644 --- a/lgc/unittests/internal/CMakeLists.txt +++ b/lgc/unittests/internal/CMakeLists.txt @@ -28,6 +28,7 @@ add_lgc_unittest(LgcInternalTests ) target_link_libraries(LgcInternalTests PRIVATE + LLVMBinaryFormat LLVMCore LLVMlgc ) diff --git a/lgc/util/Internal.cpp b/lgc/util/Internal.cpp index 327b1b3e1c..f67d0004a9 100644 --- a/lgc/util/Internal.cpp +++ b/lgc/util/Internal.cpp @@ -251,9 +251,7 @@ llvm::Function *createFunctionHelper(llvm::FunctionType *ty, llvm::GlobalValue:: llvm::Function *func = Function::Create(ty, linkage, name); -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 489715 func->setIsNewDbgInfoFormat(module->IsNewDbgInfoFormat); -#endif if (createDbgInfo) { DIBuilder debugBuilder(*module); diff --git a/lgc/util/PassManager.cpp b/lgc/util/PassManager.cpp index b33b8e0b6e..fc4ba3328e 100644 --- a/lgc/util/PassManager.cpp +++ b/lgc/util/PassManager.cpp @@ -29,19 +29,13 @@ *********************************************************************************************************************** */ #include "lgc/PassManager.h" +#include "compilerutils/MbStandardInstrumentations.h" #include "lgc/LgcContext.h" -#include "lgc/MbStandardInstrumentations.h" #include "lgc/util/Debug.h" #include "llvm/Analysis/CFGPrinter.h" #include "llvm/IR/PrintPasses.h" #include "llvm/IR/Verifier.h" -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 442438 -// Old version of the code -#include "llvm/IR/IRPrintingPasses.h" -#else -// New version of the code (also handles unknown version, which we treat as latest) #include "llvm/IRPrinter/IRPrintingPasses.h" -#endif #include "llvm/Passes/PassBuilder.h" #include "llvm/Support/CommandLine.h" @@ -208,13 +202,8 @@ LegacyPassManagerImpl::LegacyPassManagerImpl() : LegacyPassManager() { // ===================================================================================================================== PassManagerImpl::PassManagerImpl(TargetMachine *targetMachine, LLVMContext &context) : PassManager(), m_targetMachine(targetMachine), - m_instrumentationStandard( -#if !LLVM_MAIN_REVISION || LLVM_MAIN_REVISION >= 442861 - // New version of the code (also handles unknown version, which we treat as latest) - context, -#endif - cl::DebugPassManager, cl::DebugPassManager || cl::VerifyIr, - /*PrintPassOpts=*/{true, false, true}) { + m_instrumentationStandard(context, cl::DebugPassManager, cl::DebugPassManager || cl::VerifyIr, + /*PrintPassOpts=*/{true, false, true}) { auto &options = cl::getRegisteredOptions(); diff --git a/lgc/util/RegStackUsage.cpp b/lgc/util/RegStackUsage.cpp index 167e1c9c9a..90c7d71c5c 100644 --- a/lgc/util/RegStackUsage.cpp +++ b/lgc/util/RegStackUsage.cpp @@ -169,6 +169,7 @@ class RegStackUsageImpl { void writeMetadata(Module &module) const; void merge(const RegStackUsageImpl &shaderUsage); void finalizeAndUpdate(SmallVectorImpl &elfBuffer, size_t startOffset, unsigned frontendGlobalAlignment); + const Usage &getUsage() const { return m_usage; } private: // Construct from PAL metadata blob. This is only used internally for the "Re-scan the new blob to check it" code. diff --git a/llpc/CMakeLists.txt b/llpc/CMakeLists.txt index 74935e3b07..dc17862d8a 100644 --- a/llpc/CMakeLists.txt +++ b/llpc/CMakeLists.txt @@ -42,96 +42,9 @@ if(ICD_BUILD_LLPC) set(AMDLLPC_DIR ${CMAKE_CURRENT_BINARY_DIR}) endif() -### Set Options and build LLVM ######################################################################################### +### Link against LLVM and the components we build as LLVM external projects ############################################ if(ICD_BUILD_LLPC) - # Add LGC and its dependencies as LLVM external projects. - include("../cmake/lgc.cmake") - add_lgc_projects() - - # Set other LLVM settings. - set(LLVMRAYTRACING_BUILD_TESTS ${LLPC_BUILD_TESTS}) - set(LLVM_TARGETS_TO_BUILD AMDGPU CACHE STRING "LLVM targets to build") - set(LLVM_BUILD_TESTS OFF CACHE BOOL "LLVM build tests") - set(LLVM_BUILD_TOOLS ${LLPC_BUILD_LLVM_TOOLS} CACHE BOOL "LLVM build tools") - set(LLVM_BUILD_UTILS OFF CACHE BOOL "LLVM build utils") - set(LLVM_INCLUDE_DOCS OFF CACHE BOOL "LLVM include docs") - set(LLVM_INCLUDE_EXAMPLES OFF CACHE BOOL "LLVM include examples") - set(LLVM_INCLUDE_GO_TESTS OFF CACHE BOOL "LLVM include go tests") - set(LLVM_INCLUDE_TESTS ${LLPC_BUILD_TESTS} CACHE BOOL "LLVM include tests") - set(LLVM_INCLUDE_TOOLS ON CACHE BOOL "LLVM include tools") - set(LLVM_INCLUDE_UTILS ON CACHE BOOL "LLVM include utils") - set(LLVM_ENABLE_TERMINFO OFF CACHE BOOL "LLVM enable terminfo") - set(LLVM_RAM_PER_TABLEGEN_JOB 4000 CACHE STRING "LLVM RAM per tablegen job") - set(LLVM_RAM_PER_LINK_JOB 5000 CACHE STRING "LLVM RAM per link job") - if(CMAKE_BUILD_TYPE_DEBUG) - # Build optimized version of llvm-tblgen even in debug builds, for faster build times. - set(LLVM_OPTIMIZED_TABLEGEN ON CACHE BOOL "Build optimized llvm-tblgen") -#if _WIN32 - if(LLVM_OPTIMIZED_TABLEGEN AND WIN32 AND (CMAKE_GENERATOR MATCHES "Ninja")) - # LLVM implements the Release build of llvm-tblgen as a cross-compile target, which fails to find - # our DK-based toolchain (created with amd_generate_msvc_toolchain). However, we can inject the toolchain - # argument into LLVM's add_custom_target that sets up this cross-compile build. - # See: llvm-project/llvm/cmake/modules/CrossCompile.cmake - set(CROSS_TOOLCHAIN_FLAGS_NATIVE "-DCMAKE_TOOLCHAIN_FILE=${CMAKE_TOOLCHAIN_FILE}" CACHE STRING - "Toolchain flags for native build" FORCE) - endif() -#endif - endif() - - # This will greatly speed up debug builds because we won't be listing all the symbols with llvm-nm. - set(LLVM_BUILD_LLVM_C_DYLIB OFF CACHE BOOL "LLVM build LLVM-C dylib") - - if(EXISTS ${PROJECT_SOURCE_DIR}/../../../imported/llvm-project/llvm) - set(XGL_LLVM_SRC_PATH ${PROJECT_SOURCE_DIR}/../../../imported/llvm-project/llvm CACHE PATH "Specify the path to the LLVM.") - elseif(EXISTS ${PROJECT_SOURCE_DIR}/../../llvm-project/llvm) - set(XGL_LLVM_SRC_PATH ${PROJECT_SOURCE_DIR}/../../llvm-project/llvm CACHE PATH "Specify the path to the LLVM.") - endif() - - add_subdirectory(${XGL_LLVM_SRC_PATH} ${PROJECT_BINARY_DIR}/llvm) - set(XGL_LLVM_BUILD_PATH ${PROJECT_BINARY_DIR}/llvm) - # Export the LLVM build path so that it's available in XGL. - set(XGL_LLVM_BUILD_PATH ${XGL_LLVM_BUILD_PATH} PARENT_SCOPE) - - if (LLVM_LINK_LLVM_DYLIB) - # Link dynamically against libLLVM-${version}.so - target_link_libraries(llpcinternal PUBLIC LLVM) - else() - # Link statically against the required component libraries - llvm_map_components_to_libnames(llvm_libs - AMDGPUAsmParser - AMDGPUCodeGen - AMDGPUDisassembler - AMDGPUInfo - Analysis - BinaryFormat - Core - Coroutines - LTO - ipo - BitReader - BitWriter - CodeGen - InstCombine - IRPrinter - IRReader - Linker - MC - Passes - ScalarOpts - Support - Target - TransformUtils - ) - # Some of the games using old versions of the tcmalloc lib are crashing - # when allocating aligned memory. C++17 enables aligned new by default, - # so we need to disable it to prevent those crashes. - if(NOT WIN32) - foreach (lib ${llvm_libs}) - target_compile_options(${lib} PRIVATE "-fno-aligned-new") - endforeach() - endif() - target_link_libraries(llpcinternal PUBLIC ${llvm_libs}) - endif() + target_link_libraries(llpcinternal PUBLIC ${LLPC_LLVM_LIBS}) # Always link statically against libLLVMlgc llvm_map_components_to_libnames(extra_llvm_libs lgc Raytracing) @@ -173,10 +86,6 @@ endif() ### Defines/Includes/Sources ########################################################################################### if(ICD_BUILD_LLPC) - list(APPEND CMAKE_MODULE_PATH - "${XGL_LLVM_BUILD_PATH}/lib/cmake/llvm" - "${XGL_LLVM_BUILD_PATH}/${CMAKE_CFG_INTDIR}/lib/cmake/llvm" # Workaround for VS generator with older LLVM. - ) include(LLVMConfig) message(STATUS "LLVM executables: " ${LLVM_TOOLS_BINARY_DIR}) message(STATUS "LLVM libraries: " ${LLVM_BUILD_LIBRARY_DIR}) @@ -194,12 +103,6 @@ if(ICD_BUILD_LLPC) target_compile_definitions(llpcinternal PRIVATE ICD_BUILD_LLPC) endif() -if(ICD_BUILD_LLPC) - if(XGL_LLVM_UPSTREAM) - target_compile_definitions(llpcinternal PRIVATE XGL_LLVM_UPSTREAM) - endif() -endif() - #if _WIN32 if(WIN32) target_compile_definitions(llpcinternal PRIVATE @@ -388,9 +291,11 @@ target_link_libraries(llpcinternal PUBLIC khronos_spirv_interface ) -if(VKI_RAY_TRACING AND NOT LLPC_IS_STANDALONE) +#if LLPC_RAY_TRACING +if(LLPC_RAY_TRACING AND NOT LLPC_IS_STANDALONE) target_link_libraries(llpcinternal PRIVATE vkgc_gpurtshim) endif() +#endif set(THREADS_PREFER_PTHREAD_FLAG ON) find_package(Threads REQUIRED) diff --git a/llpc/context/llpcCompiler.cpp b/llpc/context/llpcCompiler.cpp index fa1a0dcd0f..8371aef8b7 100644 --- a/llpc/context/llpcCompiler.cpp +++ b/llpc/context/llpcCompiler.cpp @@ -58,6 +58,8 @@ #include "vkgcDefs.h" #include "vkgcElfReader.h" #include "vkgcPipelineDumper.h" +#include "llvmraytracing/Continuations.h" +#include "llvmraytracing/GpurtContext.h" #include "lgc/Builder.h" #include "lgc/ElfLinker.h" #include "lgc/EnumIterator.h" @@ -77,18 +79,10 @@ #include "llvm/IR/DiagnosticInfo.h" #include "llvm/IR/DiagnosticPrinter.h" #include "llvm/IR/IRPrintingPasses.h" -#include "llvm/Support/ErrorHandling.h" - -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 442438 -// Old version of the code -#else -// New version of the code (also handles unknown version, which we treat as latest) #include "llvm/IRPrinter/IRPrintingPasses.h" -#endif -#include "llvmraytracing/Continuations.h" -#include "llvmraytracing/GpurtContext.h" #include "llvm/Linker/Linker.h" #include "llvm/Support/CommandLine.h" +#include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Format.h" #include "llvm/Support/ManagedStatic.h" #include "llvm/Support/Mutex.h" @@ -257,9 +251,6 @@ std::condition_variable_any Compiler::m_helperThreadConditionVariable; // @param genCrashDiag : Whether diagnostic should be generated static void fatalErrorHandler(void *userData, const char *reason, bool genCrashDiag) { LLPC_ERRS("LLVM FATAL ERROR: " << reason << "\n"); -#if LLPC_ENABLE_EXCEPTION - throw("LLVM fatal error"); -#endif } // ===================================================================================================================== @@ -335,9 +326,6 @@ class LlpcDiagnosticHandler : public DiagnosticHandler { diagInfo.print(printStream); printStream << "\n"; errs().flush(); -#if LLPC_ENABLE_EXCEPTION - throw("LLVM fatal error"); -#endif abort(); } @@ -1971,11 +1959,7 @@ Result Compiler::buildPipelineInternal(Context *context, ArrayRefrun(*modules[shaderIndex]); // If this is TCS, set inputVertices from patchControlPoints in the pipeline state. if (entryStage == ShaderStageTessControl || @@ -2012,11 +1996,7 @@ Result Compiler::buildPipelineInternal(Context *context, ArrayRefrun(*modules[shaderIndex]); context->getBuilder()->SetCurrentDebugLocation(nullptr); @@ -2066,26 +2046,13 @@ Result Compiler::buildPipelineInternal(Context *context, ArrayRefgenerate(std::move(pipelineModule), elfStream, checkShaderCacheFunc, timers); -#if LLPC_ENABLE_EXCEPTION - result = Result::Success; -#endif - } -#if LLPC_ENABLE_EXCEPTION - catch (const char *) { - } -#endif + pipeline->generate(std::move(pipelineModule), elfStream, checkShaderCacheFunc, timers); } if (checkPerStageCache) { // For graphics, update shader caches with results of compile, and merge ELF outputs if necessary. @@ -2930,9 +2897,7 @@ Result Compiler::buildRayTracingPipelineElf(Context *context, std::unique_ptraddPass(createModuleToFunctionPassAdaptor(SROAPass(llvm::SROAOptions::ModifyCFG))); passMgr->addPass(SpecializeDriverShadersPass()); - bool success = runPasses(&*passMgr, module.get()); - assert(success); - (void(success)); // unused + passMgr->run(*module); auto moduleStateOrErr = llvmraytracing::PipelineState::fromModuleMetadata(*module); if (auto err = moduleStateOrErr.takeError()) { @@ -2978,23 +2943,13 @@ Result Compiler::generatePipeline(Context *context, unsigned moduleIndex, std::u raw_svector_ostream elfStream(pipelineElf); -#if LLPC_ENABLE_EXCEPTION - try -#endif - { - Timer *timers[] = { - timerProfiler.getTimer(TimerPatch), - timerProfiler.getTimer(TimerOpt), - timerProfiler.getTimer(TimerCodeGen), - }; + Timer *timers[] = { + timerProfiler.getTimer(TimerPatch), + timerProfiler.getTimer(TimerOpt), + timerProfiler.getTimer(TimerCodeGen), + }; - pipeline->generate(std::move(pipelineModule), elfStream, nullptr, timers); - } -#if LLPC_ENABLE_EXCEPTION - catch (const char *) { - return Result::ErrorInvalidShader; - } -#endif + pipeline->generate(std::move(pipelineModule), elfStream, nullptr, timers); return Result::Success; } @@ -3202,11 +3157,7 @@ Result Compiler::buildRayTracingPipelineInternal(RayTracingContext &rtContext, lowerPassMgr->addPass(AlwaysInlinerPass()); // Run the passes. - bool success = runPasses(&*lowerPassMgr, modules[shaderIndex].get()); - if (!success) { - LLPC_ERRS("Failed to translate SPIR-V or run per-shader passes\n"); - return Result::ErrorInvalidShader; - } + lowerPassMgr->run(*modules[shaderIndex]); } // Step 2: Set up traversal module and kernel entry @@ -3291,11 +3242,7 @@ Result Compiler::buildRayTracingPipelineInternal(RayTracingContext &rtContext, if (isContinuationsMode) { passMgr->addPass(PrepareContinuations()); } - bool success = runPasses(&*passMgr, module); - if (!success) { - LLPC_ERRS("Failed to translate SPIR-V or run per-shader passes\n"); - return Result::ErrorInvalidShader; - } + passMgr->run(*module); } // Step 4: Link module if necessary @@ -3307,11 +3254,7 @@ Result Compiler::buildRayTracingPipelineInternal(RayTracingContext &rtContext, } std::unique_ptr passMgr(lgc::PassManager::Create(builderContext)); passMgr->addPass(AlwaysInlinerPass()); - bool success = runPasses(&*passMgr, mainModule.get()); - if (!success) { - LLPC_ERRS("Failed to translate SPIR-V or run per-shader passes\n"); - return Result::ErrorInvalidShader; - } + passMgr->run(*mainModule); clearNonEntryFunctions(mainModule.get(), "main"); newModules.erase(newModules.begin() + 1, newModules.end()); } @@ -3617,28 +3560,6 @@ Context *Compiler::acquireContext() const { return freeContext; } -// ===================================================================================================================== -// Run pass manager's passes on a module, catching any LLVM fatal error and returning a success indication -// -// @param passMgr : Pass manager -// @param [in/out] module : Module -bool Compiler::runPasses(lgc::PassManager *passMgr, Module *module) const { - bool success = false; -#if LLPC_ENABLE_EXCEPTION - try -#endif - { - passMgr->run(*module); - success = true; - } -#if LLPC_ENABLE_EXCEPTION - catch (const char *) { - success = false; - } -#endif - return success; -} - // ===================================================================================================================== // Releases LLPC context. // diff --git a/llpc/context/llpcCompiler.h b/llpc/context/llpcCompiler.h index 03fdd9f54b..d020769684 100644 --- a/llpc/context/llpcCompiler.h +++ b/llpc/context/llpcCompiler.h @@ -188,7 +188,6 @@ class Compiler : public ICompiler { Result validatePipelineShaderInfo(const PipelineShaderInfo *shaderInfo) const; - bool runPasses(lgc::PassManager *passMgr, llvm::Module *module) const; bool linkRelocatableShaderElf(ElfPackage *shaderElfs, ElfPackage *pipelineElf, Context *context); bool canUseRelocatableGraphicsShaderElf(const llvm::ArrayRef &shaderInfo, const GraphicsPipelineBuildInfo *pipelineInfo); diff --git a/llpc/context/llpcContext.cpp b/llpc/context/llpcContext.cpp index 97e73f0016..0b51686af8 100644 --- a/llpc/context/llpcContext.cpp +++ b/llpc/context/llpcContext.cpp @@ -131,33 +131,6 @@ LgcContext *Context::getLgcContext() { return &*m_builderContext; } -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 -// Old version of the code -// ===================================================================================================================== -// Get optimization level. Also resets what getLastOptimizationLevel() returns. -// -// @returns: the optimization level for the context. -CodeGenOpt::Level Context::getOptimizationLevel() { - uint32_t optLevel = static_cast(CodeGenOpt::Level::Default); - - optLevel = getPipelineContext()->getPipelineOptions()->optimizationLevel; - if (optLevel > 3) - optLevel = 3; - else if (optLevel == 0) // Workaround for noopt bugs in the AMDGPU backend in LLVM. - optLevel = 1; - m_lastOptLevel = CodeGenOpt::Level(optLevel); - return *m_lastOptLevel; -} - -// ===================================================================================================================== -// Get the optimization level returned by the last getOptimizationLevel(). -CodeGenOpt::Level Context::getLastOptimizationLevel() const { - return *m_lastOptLevel; -} - -#else -// New version of the code (also handles unknown version, which we treat as latest) - // ===================================================================================================================== // Get optimization level. Also resets what getLastOptimizationLevel() returns. // @@ -180,8 +153,6 @@ CodeGenOptLevel Context::getLastOptimizationLevel() const { return *m_lastOptLevel; } -#endif - // ===================================================================================================================== // Loads library from external LLVM library. // diff --git a/llpc/context/llpcContext.h b/llpc/context/llpcContext.h index 9b3448d14b..ff8cda583b 100644 --- a/llpc/context/llpcContext.h +++ b/llpc/context/llpcContext.h @@ -84,15 +84,8 @@ class Context : public llvm::LLVMContext { // Get (create if necessary) LgcContext lgc::LgcContext *getLgcContext(); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - llvm::CodeGenOpt::Level getOptimizationLevel(); - llvm::CodeGenOpt::Level getLastOptimizationLevel() const; -#else - // New version of the code (also handles unknown version, which we treat as latest) llvm::CodeGenOptLevel getOptimizationLevel(); llvm::CodeGenOptLevel getLastOptimizationLevel() const; -#endif std::unique_ptr loadLibrary(const BinaryData *lib); @@ -138,13 +131,7 @@ class Context : public llvm::LLVMContext { std::unique_ptr m_targetMachine; // Target machine for LGC context std::unique_ptr m_builderContext; // LGC context -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - std::optional m_lastOptLevel{}; // What getOptimizationLevel() last returned -#else - // New version of the code (also handles unknown version, which we treat as latest) std::optional m_lastOptLevel{}; // What getOptimizationLevel() last returned -#endif std::unique_ptr m_dialectContext; diff --git a/llpc/context/llpcPipelineContext.cpp b/llpc/context/llpcPipelineContext.cpp index 605f35772d..ba52048883 100644 --- a/llpc/context/llpcPipelineContext.cpp +++ b/llpc/context/llpcPipelineContext.cpp @@ -712,6 +712,7 @@ ShaderOptions PipelineContext::computeShaderOptions(const PipelineShaderInfo &sh "Mismatch"); shaderOptions.aggressiveInvariantLoads = static_cast(shaderInfo.options.aggressiveInvariantLoads); + shaderOptions.viewIndexFromDeviceIndex = shaderInfo.options.viewIndexFromDeviceIndex; return shaderOptions; } diff --git a/llpc/docs/amdllpc.md b/llpc/docs/amdllpc.md index 3ab778104c..825f2963d5 100644 --- a/llpc/docs/amdllpc.md +++ b/llpc/docs/amdllpc.md @@ -4,8 +4,8 @@ LLPC can be built into a standalone offline compiler (amdllpc). It supports GLSL ## Build instructions -LLPC is normally built as part of the [AMD Open Source Driver for Vulkan](https://github.com/GPUOpen-Drivers/AMDVLK/blob/dev/README.md). The build includes standalone `lgc` and `amdllpc` (**Note:** You need to add the option `-DXGL_BUILD_TOOLS=ON` in the AMDVLK cmake command before building `amdllpc`). -You can build `lgc amdllpc` only or build `check-lgc check-lgc-units check-amdllpc check-amdllpc-units check-llvmraytracing check-llvmraytracing-units` to run local tests besides the build (**Note:** You need to add the option `-DXGL_BUILD_TESTS=ON` in the AMDVLK cmake command before building these local test targets). +LLPC is normally built as part of the [AMD Open Source Driver for Vulkan](https://github.com/GPUOpen-Drivers/AMDVLK/blob/dev/README.md). The build includes standalone `lgc` and `amdllpc` (**Note:** You need to add the option `-DVKI_BUILD_TOOLS=ON` in the AMDVLK cmake command before building `amdllpc`). +You can build `lgc amdllpc` only or build `check-lgc check-lgc-units check-amdllpc check-amdllpc-units check-llvmraytracing check-llvmraytracing-units` to run local tests besides the build (**Note:** You need to add the option `-DVKI_BUILD_TESTS=ON` in the AMDVLK cmake command before building these local test targets). ``` cmake --build xgl/builds/Release64 --target lgc amdllpc ``` @@ -53,7 +53,7 @@ cmake --build build --target check-lgc check-lgc-units check-amdllpc check-amdll See above if this gives an error due to not finding an include file from glslang or SPIRV-Tools. If you want to make amdllpc compatible with driver, you could get `` from the -`ICD_PAL_CLIENT_MAJOR_VERSION` defined in `xgl/cmake/XglVersions.cmake` and add it in the build option. +`VKI_PAL_CLIENT_MAJOR_VERSION` defined in `xgl/cmake/XglVersions.cmake` and add it in the build option. If the build option is not added, the latest PAL interface version will be used. ## Usage diff --git a/llpc/lowering/LowerGlCompatibility.cpp b/llpc/lowering/LowerGlCompatibility.cpp index bcef28181c..37982f849e 100644 --- a/llpc/lowering/LowerGlCompatibility.cpp +++ b/llpc/lowering/LowerGlCompatibility.cpp @@ -200,40 +200,6 @@ void LowerGlCompatibility::decodeInOutMetaRecursivelyByIndex(llvm::Type *valueTy } } -// ===================================================================================================================== -// Get in/out meta data recursively. -// -// @param [in] valueTy : The metadata's embellish type. -// @param [in] mds : The metadata constant of InOut Global variable to be decode. -// @param [out] out : Use to output the element's metadatas of the InOut Global variable. -void LowerGlCompatibility::decodeInOutMetaRecursively(llvm::Type *valueTy, llvm::Constant *mds, - llvm::SmallVector &out) { - ShaderInOutMetadata md = {}; - if (valueTy->isSingleValueType()) { - // Single type's metadata:{uint64, uint64} - assert(mds->getType() == StructType::get(*m_context, {m_builder->getInt64Ty(), m_builder->getInt64Ty()})); - md.U64All[0] = cast(mds->getOperand(0))->getZExtValue(); - md.U64All[1] = cast(mds->getOperand(1))->getZExtValue(); - out.push_back(md); - } else if (valueTy->isArrayTy()) { - // Array type's metadata:{uint32, {element metadata type}, uint64, uint64} - assert(mds->getType()->getStructNumElements() == 4); - decodeInOutMetaRecursively(valueTy->getArrayElementType(), cast(mds->getOperand(1)), out); - md.U64All[0] = cast(mds->getOperand(2))->getZExtValue(); - md.U64All[1] = cast(mds->getOperand(3))->getZExtValue(); - out.push_back(md); - } else if (valueTy->isStructTy()) { - // Structure type's metadata:[{element metadata type}, ...] - auto elementCount = valueTy->getStructNumElements(); - assert(elementCount == mds->getType()->getStructNumElements()); - for (signed opIdx = 0; opIdx < elementCount; opIdx++) { - decodeInOutMetaRecursively(valueTy->getStructElementType(opIdx), cast(mds->getOperand(opIdx)), out); - } - } else { - llvm_unreachable("The Type can't be handle in decodeInOutMetaRecursively."); - } -} - // ===================================================================================================================== // Collect "Return" instructions and replace those instructions with a branch instruction point to "ReturnBlock". // @@ -329,6 +295,8 @@ void LowerGlCompatibility::collectEmulationResource() { auto valueType = global.getValueType(); bool isStructureOrArrayOfStructure = (valueType->isStructTy() || (valueType->isArrayTy() && valueType->getArrayElementType()->isStructTy())); + assert(!isStructureOrArrayOfStructure); + decodeInOutMetaRecursively(valueType, inOutMetaConst, mds); if (m_shaderStage == ShaderStageFragment) { for (auto md : mds) { @@ -376,10 +344,7 @@ void LowerGlCompatibility::collectEmulationResource() { } } else if (md.IsBuiltIn) { if (md.Value == spv::BuiltInClipDistance) { - if (isStructureOrArrayOfStructure) - m_out = &global; - else - m_clipDistance = &global; + m_clipDistance = &global; } if (md.Value == spv::BuiltInFrontFacing) m_frontFacing = &global; diff --git a/llpc/lowering/LowerGlCompatibility.h b/llpc/lowering/LowerGlCompatibility.h index 6bfd8e2513..6b7154879d 100644 --- a/llpc/lowering/LowerGlCompatibility.h +++ b/llpc/lowering/LowerGlCompatibility.h @@ -52,8 +52,6 @@ class LowerGlCompatibility : public SpirvLower, public llvm::PassInfoMixin index, llvm::SmallVector &out); - void decodeInOutMetaRecursively(llvm::Type *valueTy, llvm::Constant *mds, - llvm::SmallVector &out); void unifyFunctionReturn(Function *func); void collectEmitInst(); void collectEmulationResource(); diff --git a/llpc/lowering/LowerGlobals.cpp b/llpc/lowering/LowerGlobals.cpp index 74775d06b2..2c66feabb2 100644 --- a/llpc/lowering/LowerGlobals.cpp +++ b/llpc/lowering/LowerGlobals.cpp @@ -61,6 +61,16 @@ using namespace lgc::rt; namespace Llpc { +// Enumerates transform vertex shader function parameters +enum TransformShaderFunParam { + TransformVertexId = 0, + TransformInstanceId = 1, + TransformDrawId = 2, + TransformBaseVertex = 3, + TransformBaseInstance = 4, + TransformParamCount = 5, +}; + // The code here relies on the SPIR-V built-in kind being the same as the Builder built-in kind. static_assert(lgc::BuiltInBaryCoord == static_cast(spv::BuiltInBaryCoordKHR), @@ -210,6 +220,12 @@ PreservedAnalyses LowerGlobals::run(Module &module, ModuleAnalysisManager &analy if (m_shaderStage == ShaderStageFragment) handleCallInst(false, true); + if (m_shaderStage == ShaderStageVertex) { + m_transformVertex = static_cast(m_context->getPipelineContext()) + ->getPipelineShaderInfo(m_shaderStage) + ->options.enableTransformShader; + } + // Preparations for output lowering m_unifiedReturn = nullptr; @@ -217,7 +233,7 @@ PreservedAnalyses LowerGlobals::run(Module &module, ModuleAnalysisManager &analy // Collect "emit" calls handleCallInst(true, false); } else if (m_shaderStage < ShaderStageGfxCount) { - ensureUnifiedReturn(); + m_unifiedReturn = CompilerUtils::unifyReturns(*m_entryPoint, *m_builder); } // Preparations for XFB handling @@ -269,7 +285,7 @@ PreservedAnalyses LowerGlobals::run(Module &module, ModuleAnalysisManager &analy m_emitCalls.clear(); // Do further lowering operations - if (m_shaderStage == ShaderStageVertex) + if (m_shaderStage == ShaderStageVertex && !m_transformVertex) lowerEdgeFlag(); lowerBufferBlock(); @@ -303,45 +319,15 @@ void LowerGlobals::lowerEdgeFlag() { Value *zeroValue = m_builder->getInt32(0); lgc::InOutInfo inOutInfo; - Value *edgeflagValue = m_builder->CreateReadGenericInput(int32Ty, edgeflagInputLocation, zeroValue, zeroValue, 0, - inOutInfo, nullptr); + Value *edgeflagValue = m_builder->create( + int32Ty, false, edgeflagInputLocation, zeroValue, zeroValue, PoisonValue::get(int32Ty), + PoisonValue::get(int32Ty), PoisonValue::get(int32Ty)); m_builder->CreateWriteBuiltInOutput(edgeflagValue, lgc::BuiltInEdgeFlag, inOutInfo, nullptr, nullptr); return; } } } -// ===================================================================================================================== -// Ensure that there is exactly one "ret" instruction. This is used for writing output variables for many shader types. -void LowerGlobals::ensureUnifiedReturn() { - SmallVector retInsts; - - for (BasicBlock &block : *m_entryPoint) { - if (auto *retInst = dyn_cast(block.getTerminator())) - retInsts.push_back(retInst); - } - - if (retInsts.size() == 1) { - m_unifiedReturn = retInsts[0]; - return; - } - - // There are more than 2 returns; create a unified return block. - // - // Also create a "unified return block" if there are no returns at all. Such a shader will surely hang or otherwise - // trigger UB if it is ever executed, but we still need to compile it correctly in case it never runs. - BasicBlock *retBlock = BasicBlock::Create(*m_context, "", m_entryPoint); - - for (ReturnInst *retInst : retInsts) { - m_builder->SetInsertPoint(retInst); - m_builder->CreateBr(retBlock); - retInst->eraseFromParent(); - } - - m_builder->SetInsertPoint(retBlock); - m_unifiedReturn = m_builder->CreateRetVoid(); -} - // ===================================================================================================================== // Handle "call" instructions. // @@ -405,6 +391,9 @@ void LowerGlobals::handleCallInst(bool checkEmitCall, bool checkInterpCall) { } else { gv = cast(loadSrc); } + lgc::Builder::FastMathFlagGuard guard(*m_builder); + if (isa(callInst)) + m_builder->setFastMathFlags(callInst->getFastMathFlags()); Value *result = interpolateInputElement(callInst->getType(), interpLoc, auxInterpValue, gv, indexOperands); callInst->replaceAllUsesWith(result); callInst->eraseFromParent(); @@ -539,7 +528,11 @@ void LowerGlobals::lowerInOut(llvm::GlobalVariable *globalVar) { m_shaderStage == ShaderStageFragment) { m_builder->SetInsertPoint(m_unifiedReturn); Value *outputValue = m_builder->CreateLoad(ty, proxy); - addCallInstForOutputExport(outputValue, meta, nullptr, 0, 0, 0, nullptr, nullptr, InvalidValue); + + // Don't need to generate instructions for output variables for transform vertex shader, because transform + // vertex shader will be inlined in a compute shader, it is invalid to export variables in a compute shader + if (!m_transformVertex) + addCallInstForOutputExport(outputValue, meta, nullptr, 0, 0, 0, nullptr, nullptr, InvalidValue); } else { assert(m_shaderStage == ShaderStageGeometry); @@ -972,12 +965,38 @@ Value *LowerGlobals::addCallInstForInOutImport(Type *inOutTy, unsigned addrSpace inOutInfo.setInterpMode(inOutMeta.InterpMode); inOutInfo.setPerPrimitive(inOutMeta.PerPrimitive); } - if (isPerVertexDimension) + + if (isPerVertexDimension) { inOutValue = m_builder->CreateReadPerVertexInput(inOutTy, inOutMeta.Value, locOffset, elemIdx, maxLocOffset, inOutInfo, vertexIdx); - else - inOutValue = m_builder->CreateReadGenericInput(inOutTy, inOutMeta.Value, locOffset, elemIdx, maxLocOffset, - inOutInfo, vertexIdx); + } else { + if (m_shaderStage == ShaderStageVertex) { + if (vertexIdx == nullptr) + vertexIdx = PoisonValue::get(m_builder->getInt32Ty()); + Value *instanceIdx = PoisonValue::get(m_builder->getInt32Ty()); + Value *arrayIdx = PoisonValue::get(m_builder->getInt32Ty()); + + if (m_transformVertex) { + assert(TransformParamCount == m_entryPoint->arg_size()); + vertexIdx = m_builder->CreateAdd(m_entryPoint->getArg(TransformVertexId), + m_entryPoint->getArg(TransformBaseVertex)); + instanceIdx = m_builder->CreateAdd(m_entryPoint->getArg(TransformInstanceId), + m_entryPoint->getArg(TransformBaseInstance)); + } + + // Fold constant locationOffset into location. + uint32_t location = (uint32_t)inOutMeta.Value; + if (isa(locOffset)) { + auto vtxLocOffset = cast(locOffset)->getZExtValue(); + location += vtxLocOffset; + } + inOutValue = m_builder->create(inOutTy, false, location, m_builder->getInt32(0), + elemIdx, arrayIdx, vertexIdx, instanceIdx); + } else { + inOutValue = m_builder->CreateReadGenericInput(inOutTy, inOutMeta.Value, locOffset, elemIdx, maxLocOffset, + inOutInfo, vertexIdx); + } + } } else { inOutValue = m_builder->CreateReadGenericOutput(inOutTy, inOutMeta.Value, locOffset, elemIdx, maxLocOffset, inOutInfo, vertexIdx); @@ -2328,10 +2347,15 @@ void LowerGlobals::changeRtFunctionSignature() { Type *pointerTy = PointerType::get(*m_context, SPIRAS_Private); switch (m_shaderStage) { case ShaderStageRayTracingIntersect: - // We don't have hit attribute in argument for IS in continuations mode. - if (rayTracingContext->isContinuationsMode()) + if (rayTracingContext->isContinuationsMode()) { + // We don't have any argument for IS in continuations mode. break; - LLVM_FALLTHROUGH; // Fall through: Legacy RT still requires hit attribute in argument + } else { + // For non-continuations, we only have payload in argument for IS. + argTys.push_back(pointerTy); + setShaderPaq(m_entryPoint, getPaqFromSize(*m_context, rayTracingContext->getPayloadSizeInBytes())); + break; + } case ShaderStageRayTracingAnyHit: case ShaderStageRayTracingClosestHit: // Hit attribute diff --git a/llpc/lowering/LowerGlobals.h b/llpc/lowering/LowerGlobals.h index f4fc2c5b3d..dd1b692f81 100644 --- a/llpc/lowering/LowerGlobals.h +++ b/llpc/lowering/LowerGlobals.h @@ -66,8 +66,6 @@ class LowerGlobals : public SpirvLower, public llvm::PassInfoMixin void lowerInOutUsersInPlace(llvm::GlobalVariable *globalVar, llvm::Value *current, SmallVectorImpl &indexStack); - void ensureUnifiedReturn(); - void lowerBufferBlock(); void lowerTaskPayload(); void lowerPushConsts(); @@ -117,8 +115,9 @@ class LowerGlobals : public SpirvLower, public llvm::PassInfoMixin llvm::DenseMap m_builtInXfbMap; // Map built-in to XFB output info specified by API interface llvm::DenseMap - m_genericXfbMap; // Map generic location to XFB output info specified by API interface - bool m_printedXfbInfo = false; // It marks if the XFB info has not been printed yet + m_genericXfbMap; // Map generic location to XFB output info specified by API interface + bool m_printedXfbInfo = false; // It marks if the XFB info has not been printed yet + bool m_transformVertex = false; // Indicate whether the current stage is a transform vertex shader }; } // namespace Llpc diff --git a/llpc/lowering/LowerMath.cpp b/llpc/lowering/LowerMath.cpp index a097d0dbc9..b5986bdf51 100644 --- a/llpc/lowering/LowerMath.cpp +++ b/llpc/lowering/LowerMath.cpp @@ -164,13 +164,14 @@ static void disableFastMath(Value *value, bool clearAll) { auto it = workSet.begin(); while (!workSet.empty()) { if (isa(*it)) { - // Reset fast math flags to default, but maintain nsz and nnan as required. + // Reset fast math flags to default, but maintain nsz, nnan and afn as required. auto inst = cast(*it); FastMathFlags newFmf; if (!clearAll) { FastMathFlags instFmf = inst->getFastMathFlags(); newFmf.setNoSignedZeros(instFmf.noSignedZeros()); newFmf.setNoNaNs(instFmf.noNaNs()); + newFmf.setApproxFunc(instFmf.approxFunc()); } inst->copyFastMathFlags(newFmf); } diff --git a/llpc/lowering/LowerMemoryOp.cpp b/llpc/lowering/LowerMemoryOp.cpp index 2a4e3b2799..5ec48a11a9 100644 --- a/llpc/lowering/LowerMemoryOp.cpp +++ b/llpc/lowering/LowerMemoryOp.cpp @@ -103,9 +103,9 @@ void LowerMemoryOp::visitExtractElementInst(ExtractElementInst &extractElementIn if (addrSpace == SPIRAS_Local || addrSpace == SPIRAS_Uniform) { Value *idxs[] = {ConstantInt::get(Type::getInt32Ty(*m_context), 0), extractElementInst.getOperand(1)}; - auto elementPtr = GetElementPtrInst::Create(src->getType(), loadPtr, idxs, "", &extractElementInst); + auto elementPtr = GetElementPtrInst::Create(src->getType(), loadPtr, idxs, "", extractElementInst.getIterator()); auto elementTy = elementPtr->getResultElementType(); - auto newLoad = new LoadInst(elementTy, elementPtr, "", &extractElementInst); + auto newLoad = new LoadInst(elementTy, elementPtr, "", extractElementInst.getIterator()); extractElementInst.replaceAllUsesWith(newLoad); m_preRemoveInsts.insert(&extractElementInst); @@ -266,15 +266,15 @@ void LowerMemoryOp::expandLoadInst(LoadInst *loadInst, ArrayRefgetType()->getPrimitiveSizeInBits() == 64); auto loadTy = loadInst->getType(); - Instruction *firstLoadValue = new LoadInst(loadTy, getElemPtrs[0], "", false, loadInst); + Instruction *firstLoadValue = new LoadInst(loadTy, getElemPtrs[0], "", false, loadInst->getIterator()); for (unsigned i = 1, getElemPtrCount = getElemPtrs.size(); i < getElemPtrCount; ++i) { auto constIndex = isType64 ? ConstantInt::get(Type::getInt64Ty(*m_context), i) : ConstantInt::get(Type::getInt32Ty(*m_context), i); - auto secondLoadValue = new LoadInst(loadTy, getElemPtrs[i], "", false, loadInst); - auto cond = new ICmpInst(loadInst, ICmpInst::ICMP_EQ, dynIndex, constIndex); - firstLoadValue = SelectInst::Create(cond, secondLoadValue, firstLoadValue, "", loadInst); + auto secondLoadValue = new LoadInst(loadTy, getElemPtrs[i], "", false, loadInst->getIterator()); + auto cond = new ICmpInst(loadInst->getIterator(), ICmpInst::ICMP_EQ, dynIndex, constIndex); + firstLoadValue = SelectInst::Create(cond, secondLoadValue, firstLoadValue, "", loadInst->getIterator()); } loadInst->replaceAllUsesWith(firstLoadValue); @@ -347,15 +347,8 @@ void LowerMemoryOp::expandStoreInst(StoreInst *storeInst, ArrayRefsplitBasicBlock(storeInst); auto endStoreBlock = storeBlock->splitBasicBlock(storeInst); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 445640 - // Old version of the code - Instruction *checkStoreInsertPos = &checkStoreBlock->getInstList().back(); - Instruction *storeInsertPos = &storeBlock->getInstList().front(); -#else - // New version of the code (also handles unknown version, which we treat as latest) - Instruction *checkStoreInsertPos = &checkStoreBlock->back(); - Instruction *storeInsertPos = &storeBlock->front(); -#endif + BasicBlock::iterator checkStoreInsertPos = checkStoreBlock->back().getIterator(); + BasicBlock::iterator storeInsertPos = storeBlock->begin(); auto getElemPtrCountVal = isType64 ? ConstantInt::get(Type::getInt64Ty(*m_context), getElemPtrCount) : ConstantInt::get(Type::getInt32Ty(*m_context), getElemPtrCount); @@ -404,8 +397,8 @@ void LowerMemoryOp::expandStoreInst(StoreInst *storeInst, ArrayRefgetIterator(), ICmpInst::ICMP_EQ, dynIndex, constIndex); + firstStoreDest = SelectInst::Create(cond, secondStoreDest, firstStoreDest, "", storeInst->getIterator()); } storeInst->setOperand(1, firstStoreDest); diff --git a/llpc/lowering/LowerRayTracing.cpp b/llpc/lowering/LowerRayTracing.cpp index e4fc9a50b9..9b93a47208 100644 --- a/llpc/lowering/LowerRayTracing.cpp +++ b/llpc/lowering/LowerRayTracing.cpp @@ -343,8 +343,12 @@ void SpirvLowerRayTracing::visitReportHitOp(ReportHitOp &inst) { SmallVector args; args.push_back(shaderIdentifier); args.push_back(m_shaderRecordIndex); - for (unsigned i = 0; i < TraceParam::Count; ++i) - args.push_back(m_traceParams[i]); + for (unsigned i = 0; i < TraceParam::Count; ++i) { + if (i == TraceParam::HitAttributes) + args.push_back(inst.getAttributes()); + else + args.push_back(m_traceParams[i]); + } createAnyHitFunc(shaderIdentifier, m_shaderRecordIndex); m_builder->CreateNamedCall(RtName::CallAnyHitShader, m_builder->getVoidTy(), args, @@ -362,6 +366,17 @@ void SpirvLowerRayTracing::visitReportHitOp(ReportHitOp &inst) { Value *endRay = m_builder->CreateOr(endFromAhs, endFromRayFlags); { + IRBuilderBase::InsertPointGuard ipg(*m_builder); + // Snapshot hit attribute, so that CHS sees the same value as the AHS that accepted the hit. + Instruction *endAccepted = SplitBlockAndInsertIfThen(accepted, m_builder->GetInsertPoint(), false); + m_builder->SetInsertPoint(endAccepted); + + m_builder->CreateMemCpy(m_traceParams[TraceParam::HitAttributes], Align(4), inst.getAttributes(), Align(4), + inst.getSize()); + } + + { + IRBuilderBase::InsertPointGuard ipg(*m_builder); // Accept the hit and end the ray for one reason or another. Immediately return from the IS. Instruction *endEndRay = SplitBlockAndInsertIfThen(endRay, m_builder->GetInsertPoint(), true); m_builder->SetInsertPoint(endEndRay); @@ -371,7 +386,6 @@ void SpirvLowerRayTracing::visitReportHitOp(ReportHitOp &inst) { m_builder->CreateRetVoid(); endEndRay->eraseFromParent(); // erase `unreachable` } - m_builder->SetInsertPoint(endThitAccept); // also reset the insert block // Restore the old committed hit if the candidate wasn't accepted Value *newTCurrent = @@ -1158,6 +1172,7 @@ void SpirvLowerRayTracing::createRayGenEntryFunc() { auto endBlock = BasicBlock::Create(*m_context, ".end", func); lgc::Pipeline::markShaderEntryPoint(func, lgc::ShaderStage::Compute); + lgc::rt::setLgcRtShaderStage(func, lgc::rt::RayTracingShaderStage::KernelEntry); // Construct entry block guard the launchId from launchSize m_builder->SetInsertPoint(entryBlock); @@ -1515,7 +1530,6 @@ void SpirvLowerRayTracing::inlineTraceRay(llvm::CallInst *callInst, ModuleAnalys auto &psi = analysisManager.getResult(*m_module); auto calleeFunc = callInst->getCalledFunction(); auto callingFunc = callInst->getCaller(); -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 489715 // Check if conversion to NewDbgFormat is needed for calleeFunc. // If we are inside PassManger then m_module and all its Functions and BB may be converted (depending if feature is // turned on) to new Debug Info format. Since calleeFunc is a new function which will be added/inlined into m_module, @@ -1526,7 +1540,6 @@ void SpirvLowerRayTracing::inlineTraceRay(llvm::CallInst *callInst, ModuleAnalys bool shouldConvert = m_module->IsNewDbgInfoFormat && !calleeFunc->IsNewDbgInfoFormat; if (shouldConvert) calleeFunc->convertToNewDbgValues(); -#endif InlineFunctionInfo IFI(getAssumptionCache, &psi, &getBFI(*callingFunc), &getBFI(*calleeFunc)); InlineResult res = InlineFunction(*callInst, IFI, /*MergeAttributes=*/true, &getAAR(*calleeFunc), true); (void(res)); // unused @@ -1738,9 +1751,7 @@ Instruction *SpirvLowerRayTracing::createEntryFunc(Function *func) { createTraceParams(func); func->getArg(0)->replaceAllUsesWith(m_traceParams[TraceParam::Payload]); setShaderPaq(newFunc, getShaderPaq(func)); - if (m_shaderStage != ShaderStageRayTracingMiss) { - assert((m_shaderStage == ShaderStageRayTracingIntersect) || (m_shaderStage == ShaderStageRayTracingAnyHit) || - (m_shaderStage == ShaderStageRayTracingClosestHit)); + if ((m_shaderStage == ShaderStageRayTracingAnyHit) || (m_shaderStage == ShaderStageRayTracingClosestHit)) { func->getArg(1)->replaceAllUsesWith(m_traceParams[TraceParam::HitAttributes]); setShaderHitAttributeSize(newFunc, getShaderHitAttributeSize(func).value_or(0)); } @@ -2913,28 +2924,6 @@ void SpirvLowerRayTracing::visitShaderRecordBufferOp(lgc::rt::ShaderRecordBuffer const unsigned shaderIdsSize = sizeof(Vkgc::RayTracingShaderIdentifier); Value *shaderIdsSizeVal = m_builder->getInt32(shaderIdsSize); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 484034 - // Old version without the strided buffer pointers - - // Byte offset = (tableStride * tableIndex) + shaderIdsSize - Value *offset = m_builder->CreateMul(tableIndex, tableStride); - offset = m_builder->CreateAdd(offset, shaderIdsSizeVal); - - // Zero-extend offset value to 64 bit - offset = m_builder->CreateZExt(offset, m_builder->getInt64Ty()); - - // Final addr - tableAddr = m_builder->CreateAdd(tableAddr, offset); - - Type *gpuAddrAsPtrTy = PointerType::get(m_builder->getContext(), SPIRAS_Global); - tableAddr = m_builder->CreateIntToPtr(tableAddr, gpuAddrAsPtrTy); - - inst.replaceAllUsesWith(tableAddr); - - m_callsToLower.push_back(&inst); - m_funcsToLower.insert(inst.getCalledFunction()); -#else - // New version of the code with strided buffer pointers (also handles unknown version, which we treat as latest) tableAddr = m_builder->CreateAdd(tableAddr, m_builder->CreateZExt(shaderIdsSizeVal, m_builder->getInt64Ty())); tableAddr = m_builder->create(tableAddr, tableStride); tableAddr = m_builder->create(tableAddr, tableIndex); @@ -2945,7 +2934,6 @@ void SpirvLowerRayTracing::visitShaderRecordBufferOp(lgc::rt::ShaderRecordBuffer for (auto *I : reverse(toRemove)) I->eraseFromParent(); -#endif } // ===================================================================================================================== diff --git a/llpc/lowering/LowerTerminator.cpp b/llpc/lowering/LowerTerminator.cpp index 8e88d9c758..1d41655690 100644 --- a/llpc/lowering/LowerTerminator.cpp +++ b/llpc/lowering/LowerTerminator.cpp @@ -128,9 +128,9 @@ void LowerTerminator::visitCallInst(CallInst &callInst) { auto returnType = parentBlock->getParent()->getReturnType(); if (returnType && !returnType->isVoidTy()) { auto returnValue = PoisonValue::get(returnType); - ReturnInst::Create(*m_context, returnValue, &*instIter); + ReturnInst::Create(*m_context, returnValue, instIter); } else { - ReturnInst::Create(*m_context, nullptr, &*instIter); + ReturnInst::Create(*m_context, nullptr, instIter); } // Mark all other instructions for removal diff --git a/llpc/lowering/Lowering.cpp b/llpc/lowering/Lowering.cpp index 5e19b88650..53ac3a9bdf 100644 --- a/llpc/lowering/Lowering.cpp +++ b/llpc/lowering/Lowering.cpp @@ -56,13 +56,7 @@ #include "llvm/IR/PassManager.h" #include "llvm/IR/ReplaceConstant.h" #include "llvm/IR/Verifier.h" - -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 442438 -// Old version of the code -#else -// New version of the code (also handles unknown version, which we treat as latest) #include "llvm/IRPrinter/IRPrintingPasses.h" -#endif #include "llvm/Support/FileSystem.h" #include "llvm/Transforms/AggressiveInstCombine/AggressiveInstCombine.h" #include "llvm/Transforms/IPO.h" @@ -152,13 +146,7 @@ void SpirvLower::addPasses(Context *context, ShaderStage stage, lgc::PassManager // Remove redundant load/store operations and do minimal optimization // It is required by SpirvLowerImageOp. -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 444780 - // Old version of the code - passMgr.addPass(createModuleToFunctionPassAdaptor(SROAPass())); -#else - // New version of the code (also handles unknown version, which we treat as latest) passMgr.addPass(createModuleToFunctionPassAdaptor(SROAPass(SROAOptions::ModifyCFG))); -#endif // Lower SPIR-V precision / adjust fast math flags. // Must be done before instruction combining pass to prevent incorrect contractions. @@ -168,13 +156,7 @@ void SpirvLower::addPasses(Context *context, ShaderStage stage, lgc::PassManager passMgr.addPass(GlobalOptPass()); passMgr.addPass(createModuleToFunctionPassAdaptor(ADCEPass())); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 452298 - // Old version of the code - unsigned instCombineOpt = 2; -#else - // New version of the code (also handles unknown version, which we treat as latest) auto instCombineOpt = InstCombineOptions().setMaxIterations(2); -#endif passMgr.addPass(createModuleToFunctionPassAdaptor(InstCombinePass(instCombineOpt))); passMgr.addPass(createModuleToFunctionPassAdaptor(SimplifyCFGPass())); passMgr.addPass(createModuleToFunctionPassAdaptor(EarlyCSEPass())); diff --git a/llpc/lowering/LoweringUtil.cpp b/llpc/lowering/LoweringUtil.cpp index 4ab23c0ed2..a05f4bc48a 100644 --- a/llpc/lowering/LoweringUtil.cpp +++ b/llpc/lowering/LoweringUtil.cpp @@ -147,4 +147,35 @@ void clearNonEntryFunctions(Module *module, StringRef entryName) { } } +// ===================================================================================================================== +// Get in/out meta data recursively. +// +// @param [in] valueTy : The metadata's embellish type. +// @param [in] mds : The metadata constant of InOut Global variable to be decode. +// @param [out] out : Use to output the element's metadatas of the InOut Global variable. +void decodeInOutMetaRecursively(llvm::Type *valueTy, llvm::Constant *mds, llvm::SmallVector &out) { + ShaderInOutMetadata md = {}; + if (valueTy->isSingleValueType()) { + // Single type's metadata:{uint64, uint64} + md.U64All[0] = cast(mds->getOperand(0))->getZExtValue(); + md.U64All[1] = cast(mds->getOperand(1))->getZExtValue(); + out.push_back(md); + } else if (valueTy->isArrayTy()) { + // Array type's metadata:{uint32, {element metadata type}, uint64, uint64} + assert(mds->getType()->getStructNumElements() == 4); + decodeInOutMetaRecursively(valueTy->getArrayElementType(), cast(mds->getOperand(1)), out); + md.U64All[0] = cast(mds->getOperand(2))->getZExtValue(); + md.U64All[1] = cast(mds->getOperand(3))->getZExtValue(); + out.push_back(md); + } else if (valueTy->isStructTy()) { + // Structure type's metadata:[{element metadata type}, ...] + auto elementCount = valueTy->getStructNumElements(); + assert(elementCount == mds->getType()->getStructNumElements()); + for (signed opIdx = 0; opIdx < elementCount; opIdx++) { + decodeInOutMetaRecursively(valueTy->getStructElementType(opIdx), cast(mds->getOperand(opIdx)), out); + } + } else { + llvm_unreachable("The Type can't be handle in decodeInOutMetaRecursively."); + } +} } // namespace Llpc diff --git a/llpc/lowering/LoweringUtil.h b/llpc/lowering/LoweringUtil.h index a4411fd6f6..aa40d7867c 100644 --- a/llpc/lowering/LoweringUtil.h +++ b/llpc/lowering/LoweringUtil.h @@ -30,6 +30,7 @@ */ #pragma once +#include "SPIRVInternal.h" #include "llpc.h" namespace llvm { @@ -77,4 +78,6 @@ llvm::BasicBlock *clearBlock(llvm::Function *func); // Clear non entry external functions void clearNonEntryFunctions(llvm::Module *module, llvm::StringRef entryName); +// Get in/out meta data recursively. +void decodeInOutMetaRecursively(llvm::Type *valueTy, llvm::Constant *mds, llvm::SmallVector &out); } // namespace Llpc diff --git a/llpc/lowering/PrepareContinuations.cpp b/llpc/lowering/PrepareContinuations.cpp index 0599760a2b..8213f24bc7 100644 --- a/llpc/lowering/PrepareContinuations.cpp +++ b/llpc/lowering/PrepareContinuations.cpp @@ -65,6 +65,7 @@ PreservedAnalyses PrepareContinuations::run(Module &module, ModuleAnalysisManage mode.noLocalInvocationIdInCalls = true; Pipeline::setComputeShaderMode(module, mode); module.getOrInsertNamedMetadata(ContHelper::MDLgcCpsModuleName); + ContHelper::setStackAddrspace(module, ContStackAddrspace::ScratchLLPC); if (module.getName().starts_with("main")) { m_shaderStage = ShaderStageRayTracingRayGen; diff --git a/llpc/lowering/ProcessGpuRtLibrary.cpp b/llpc/lowering/ProcessGpuRtLibrary.cpp index 38de3cab2a..065bb32bbd 100644 --- a/llpc/lowering/ProcessGpuRtLibrary.cpp +++ b/llpc/lowering/ProcessGpuRtLibrary.cpp @@ -984,8 +984,7 @@ void ProcessGpuRtLibrary::createEnqueue(Function *func) { } // TODO: pass the levelMask correctly. - m_builder->create(addr, -1, PoisonValue::get(StructType::get(*m_context, {})), - PoisonValue::get(m_builder->getInt32Ty()), retAddr, tailArgs); + m_builder->create(addr, -1, PoisonValue::get(m_builder->getInt32Ty()), retAddr, tailArgs); m_builder->CreateUnreachable(); // Clear the name so that earlyGpurtTransform doesn't try to handle the function. diff --git a/llpc/test/lit.site.cfg.py.in b/llpc/test/lit.site.cfg.py.in index 31bd7a41b8..0496a39ffe 100644 --- a/llpc/test/lit.site.cfg.py.in +++ b/llpc/test/lit.site.cfg.py.in @@ -14,7 +14,7 @@ config.gfxip = "@AMDLLPC_DEFAULT_TARGET@" # Propagate CMake options used in lit feature tests. config.llvm_assertions = "@LLVM_ENABLE_ASSERTIONS@" -config.xgl_sanitizers = "@XGL_USE_SANITIZER@" +config.xgl_sanitizers = "@LLPC_USE_SANITIZER@" config.llpc_is_standalone = "@LLPC_IS_STANDALONE@" for d in "@LIT_DEFINITIONS@".split(";"): diff --git a/llpc/test/shaderdb/core/OpAccessChain_TestOutBlockMemberLocUnspecified_lit.vert b/llpc/test/shaderdb/core/OpAccessChain_TestOutBlockMemberLocUnspecified_lit.vert index 079708dadb..95e716d11d 100644 --- a/llpc/test/shaderdb/core/OpAccessChain_TestOutBlockMemberLocUnspecified_lit.vert +++ b/llpc/test/shaderdb/core/OpAccessChain_TestOutBlockMemberLocUnspecified_lit.vert @@ -29,7 +29,7 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: icmp eq i32 %{{[0-9]*}}, 1 ; SHADERTEST: select i1 %{{[0-9]*}}, ptr addrspace({{.*}}) %{{.*}}, ptr addrspace({{.*}}) %{{.*}} -; SHADERTEST: store <3 x double> , ptr addrspace({{.*}}) %{{[0-9]*}} +; SHADERTEST: store <3 x double> {{(splat \(double 5\.000000e\-01\))|()}}, ptr addrspace({{.*}}) %{{[0-9]*}} ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/core/OpAny_TestBvec2_lit.frag b/llpc/test/shaderdb/core/OpAny_TestBvec2_lit.frag index 2cad305b54..fbed87825f 100644 --- a/llpc/test/shaderdb/core/OpAny_TestBvec2_lit.frag +++ b/llpc/test/shaderdb/core/OpAny_TestBvec2_lit.frag @@ -31,7 +31,7 @@ void main() // CHECK-NEXT: [[TMP5:%.*]] = or i32 [[TMP3]], [[TMP4]] // CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[TMP5]] // CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[DOTFR]], 0 -// CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[DOTNOT]], <4 x float> , <4 x float> +// CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[DOTNOT]], <4 x float> {{(splat \(float 5\.000000e\-01\))|()}}, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[SPEC_SELECT]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void // diff --git a/llpc/test/shaderdb/core/OpAtomicCompareExchange_TestStrongCompare.spvasm b/llpc/test/shaderdb/core/OpAtomicCompareExchange_TestStrongCompare.spvasm index 0a4f0e2dcc..bb88eec9b5 100644 --- a/llpc/test/shaderdb/core/OpAtomicCompareExchange_TestStrongCompare.spvasm +++ b/llpc/test/shaderdb/core/OpAtomicCompareExchange_TestStrongCompare.spvasm @@ -1,7 +1,7 @@ ; BEGIN_SHADERTEST ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: %[[RESULT:[0-9]*]] = call i32 @llvm.amdgcn.raw.buffer.atomic.cmpswap.i32(i32 %{{[0-9]*}}, i32 %[[COMPARE:[0-9]*]] +; SHADERTEST: %[[RESULT:[0-9]*]] = call i32 @llvm.amdgcn.raw.buffer.atomic.cmpswap.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, i32 %[[COMPARE:[0-9]*]] ; SHADERTEST: %[[IS_EQUAL:[0-9]*]] = icmp eq i32 %[[RESULT]], %[[COMPARE]] ; SHADERTEST: %[[INS1:[0-9]*]] = insertvalue { i32, i1 } %{{[0-9]*}}, i1 %[[IS_EQUAL]], 1 ; SHADERTEST: %[[FR:.*]] = freeze { i32, i1 } %[[INS1]] diff --git a/llpc/test/shaderdb/core/OpAtomicIDecrement_TestStorageBlock_lit.spvasm b/llpc/test/shaderdb/core/OpAtomicIDecrement_TestStorageBlock_lit.spvasm index 9ac11f98e1..797740d65b 100644 --- a/llpc/test/shaderdb/core/OpAtomicIDecrement_TestStorageBlock_lit.spvasm +++ b/llpc/test/shaderdb/core/OpAtomicIDecrement_TestStorageBlock_lit.spvasm @@ -6,8 +6,8 @@ ; SHADERTEST: store i32 ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.sub.i32(i32 1, <4 x i32> %{{[0-9]*}}, i32 24, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.sub.i32{{(\.v4i32)?}}(i32 1, <4 x i32> %{{[0-9]*}}, i32 24, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/core/OpAtomicIIncrement_TestStorageBlock_lit.spvasm b/llpc/test/shaderdb/core/OpAtomicIIncrement_TestStorageBlock_lit.spvasm index 71865c568c..4b6446796a 100644 --- a/llpc/test/shaderdb/core/OpAtomicIIncrement_TestStorageBlock_lit.spvasm +++ b/llpc/test/shaderdb/core/OpAtomicIIncrement_TestStorageBlock_lit.spvasm @@ -6,8 +6,8 @@ ; SHADERTEST: atomicrmw add ptr ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32(i32 1, <4 x i32> %{{[0-9]*}}, i32 24, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32{{(\.v4i32)?}}(i32 1, <4 x i32> %{{[0-9]*}}, i32 24, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/core/OpAtomicIIncrement_TestVariablePointer_lit.spvasm b/llpc/test/shaderdb/core/OpAtomicIIncrement_TestVariablePointer_lit.spvasm index be8119ab37..5e59fa2953 100644 --- a/llpc/test/shaderdb/core/OpAtomicIIncrement_TestVariablePointer_lit.spvasm +++ b/llpc/test/shaderdb/core/OpAtomicIIncrement_TestVariablePointer_lit.spvasm @@ -4,7 +4,7 @@ ; SHADERTEST; call i32 @lgc.buffer.atomic.iincrement.i32(<4 x i32> %{{[0-9]*}}, i32 0, i32 0, i1 false) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32(i32 1, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32{{(\.v4i32)?}}(i32 1, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/core/OpAtomicStore_TestStorageBlock_lit.spvasm b/llpc/test/shaderdb/core/OpAtomicStore_TestStorageBlock_lit.spvasm index 0d2be2cb42..a6a0db5cc4 100644 --- a/llpc/test/shaderdb/core/OpAtomicStore_TestStorageBlock_lit.spvasm +++ b/llpc/test/shaderdb/core/OpAtomicStore_TestStorageBlock_lit.spvasm @@ -6,7 +6,7 @@ ; SHADERTEST: store atomic i32 %{{.*}}, ptr addrspace({{.*}}7) %{{.*}} monotonic ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{.*}}, <4 x i32> %{{.*}}, i32 %{{.*}}, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{.*}}, <4 x i32> %{{.*}}, i32 %{{.*}}, i32 0, i32 1) ; SHADERTEST: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/core/OpAtomicXXX_TestImageDimension_lit.comp b/llpc/test/shaderdb/core/OpAtomicXXX_TestImageDimension_lit.comp index 138b3ccfe5..fe4376bc13 100644 --- a/llpc/test/shaderdb/core/OpAtomicXXX_TestImageDimension_lit.comp +++ b/llpc/test/shaderdb/core/OpAtomicXXX_TestImageDimension_lit.comp @@ -125,86 +125,86 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 0, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 10, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 8, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 6, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 7, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 0, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 10, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 8, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 6, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 7, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 0, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 10, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 8, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 6, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 7, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 0, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 10, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 8, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 6, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 7, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 0, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 10, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 8, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 6, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 7, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 0, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 10, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 8, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 6, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 7, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 0, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 3, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 10, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 4, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 5, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 8, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 6, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 7, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <4 x i32> , i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 0, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 7, i32 9, i32 3) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9, i32 3) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> , i32 9, i32 3) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9, i32 3) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9, i32 3) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 2, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <3 x i32> {{(splat \(i32 7\))|()}}, i32 9, i32 3) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 9, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9, i32 3) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 3, i32 512, i32 0, ptr addrspace(4) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 10, i32 512, i32 0, ptr addrspace(4) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 4, i32 512, i32 0, ptr addrspace(4) @@ -219,7 +219,7 @@ void main() ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.add.3d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.add.2d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.add.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.add.i32(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.add.i32{{(\.v4i32)?}}(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.add.1darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.add.2darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.add.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) @@ -230,7 +230,7 @@ void main() ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smin.3d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smin.2d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smin.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.smin.i32(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.smin.i32{{(\.v4i32)?}}(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smin.1darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smin.2darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smin.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) @@ -241,7 +241,7 @@ void main() ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smax.3d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smax.2d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smax.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.smax.i32(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.smax.i32{{(\.v4i32)?}}(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smax.1darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smax.2darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.smax.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) @@ -252,7 +252,7 @@ void main() ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.and.3d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.and.2d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.and.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.and.i32(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.and.i32{{(\.v4i32)?}}(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.and.1darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.and.2darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.and.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) @@ -263,7 +263,7 @@ void main() ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.or.3d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.or.2d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.or.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.or.i32(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.or.i32{{(\.v4i32)?}}(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.or.1darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.or.2darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.or.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) @@ -274,7 +274,7 @@ void main() ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.xor.3d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.xor.2d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.xor.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.xor.i32(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.xor.i32{{(\.v4i32)?}}(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.xor.1darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.xor.2darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.xor.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) @@ -285,7 +285,7 @@ void main() ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.swap.3d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.swap.2d.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.swap.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.swap.i32(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.swap.i32{{(\.v4i32)?}}(i32 9, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.swap.1darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.swap.2darray.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.swap.cube.i32.i16{{(\.v8i32)?}}(i32 9, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) @@ -296,7 +296,7 @@ void main() ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.cmpswap.3d.i32.i16{{(\.v8i32)?}}(i32 9, i32 3, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.cmpswap.2d.i32.i16{{(\.v8i32)?}}(i32 9, i32 3, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.cmpswap.cube.i32.i16{{(\.v8i32)?}}(i32 9, i32 3, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.cmpswap.i32(i32 9, i32 3, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.cmpswap.i32{{(\.v4i32)?}}(i32 9, i32 3, <4 x i32> %{{[0-9]*}}, i32 7, i32 0, i32 0 ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.cmpswap.1darray.i32.i16{{(\.v8i32)?}}(i32 9, i32 3, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.cmpswap.2darray.i32.i16{{(\.v8i32)?}}(i32 9, i32 3, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.cmpswap.cube.i32.i16{{(\.v8i32)?}}(i32 9, i32 3, i16 7, i16 7, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpAtomicXXX_TestImageMemoryQualifier_lit.comp b/llpc/test/shaderdb/core/OpAtomicXXX_TestImageMemoryQualifier_lit.comp index 966f5f2496..b1c29c82d8 100644 --- a/llpc/test/shaderdb/core/OpAtomicXXX_TestImageMemoryQualifier_lit.comp +++ b/llpc/test/shaderdb/core/OpAtomicXXX_TestImageMemoryQualifier_lit.comp @@ -16,9 +16,9 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 513, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 515, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 5\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 513, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 5\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 515, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 5\))|()}}, i32 9) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.add.2d.i32.i16{{(\.v8i32)?}}(i32 9, i16 5, i16 5, <8 x i32> %{{.*}}, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.comp b/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.comp index 8eea7b86cf..b6d56db32d 100644 --- a/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.comp +++ b/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.comp @@ -46,13 +46,13 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) -; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> , i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 4, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 6, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 8, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 9, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 10, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) +; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 0, i32 1, i32 512, i32 0, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 9) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.compare.swap.i32(i32 1, i32 512, i32 0, ptr addrspace(4) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 1, i32 512, i32 0, ptr addrspace(4) ; SHADERTEST: call i32 (...) @lgc.create.image.atomic.i32(i32 5, i32 1, i32 512, i32 0, ptr addrspace(4) diff --git a/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.elf b/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.elf new file mode 100644 index 0000000000..6814fa96dd Binary files /dev/null and b/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.elf differ diff --git a/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.frag b/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.frag index 9caf8ecd70..76fb5d19dc 100644 --- a/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.frag +++ b/llpc/test/shaderdb/core/OpAtomicXXX_TestImage_lit.frag @@ -76,8 +76,8 @@ void main() ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.swap.1d.i32.i16{{(\.v8i32)?}}(i32 %{{.*}}, i16 1, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.cmpswap.1d.i32.i16{{(\.v8i32)?}}(i32 %{{.*}}, i32 28, i16 1, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.add.cube.i32.i16{{(\.v8i32)?}}(i32 %{{.*}}, i16 1, i16 1, i16 1, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.umin.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 2, i32 0, i32 0 -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.umax.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 1, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.umin.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 2, i32 0, i32 0 +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.atomic.umax.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 1, i32 0, i32 0 ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.and.2darraymsaa.i32.i16{{(\.v8i32)?}}(i32 %{{.*}}, i16 2, i16 2, i16 2, i16 5, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.or.cube.i32.i16{{(\.v8i32)?}}(i32 %{{.*}}, i16 1, i16 1, i16 1, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.image.atomic.xor.cube.i32.i16{{(\.v8i32)?}}(i32 %{{.*}}, i16 2, i16 2, i16 2, <8 x i32> %{{.*}}, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpAtomicXXX_TestStorageBlockAndSharedWithData64_lit.comp b/llpc/test/shaderdb/core/OpAtomicXXX_TestStorageBlockAndSharedWithData64_lit.comp index b7727a2673..aa5a3c0651 100644 --- a/llpc/test/shaderdb/core/OpAtomicXXX_TestStorageBlockAndSharedWithData64_lit.comp +++ b/llpc/test/shaderdb/core/OpAtomicXXX_TestStorageBlockAndSharedWithData64_lit.comp @@ -107,17 +107,17 @@ void main () ; SHADERTEST: cmpxchg ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @{{.*}}, i32 96), i64 78187493520, i64 %{{[0-9]*}} monotonic ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.umin.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.umax.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 8, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.and.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 16, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.or.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 24, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.xor.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 32, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.smin.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 40, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.smax.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 48, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.and.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 56, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.or.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 64, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.xor.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 72, i32 0, i32 0) -; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.add.i64(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 80, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.umin.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.umax.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 8, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.and.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 16, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.or.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 24, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.xor.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 32, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.smin.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 40, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.smax.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 48, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.and.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 56, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.or.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 64, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.xor.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 72, i32 0, i32 0) +; SHADERTEST: call i64 @llvm.amdgcn.raw.buffer.atomic.add.i64{{(\.v4i32)?}}(i64 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 80, i32 0, i32 0) ; SHADERTEST: atomicrmw umin ptr addrspace(3) @{{.*}} i64 %{{[0-9]*}} monotonic ; SHADERTEST: atomicrmw umax ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @{{.*}}, i32 8), i64 %{{[0-9]*}} monotonic ; SHADERTEST: atomicrmw and ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @{{.*}}, i32 16), i64 %{{[0-9]*}} monotonic diff --git a/llpc/test/shaderdb/core/OpAtomicXXX_TestStorageBlock_lit.frag b/llpc/test/shaderdb/core/OpAtomicXXX_TestStorageBlock_lit.frag index 76230a4bde..0f99246bb1 100644 --- a/llpc/test/shaderdb/core/OpAtomicXXX_TestStorageBlock_lit.frag +++ b/llpc/test/shaderdb/core/OpAtomicXXX_TestStorageBlock_lit.frag @@ -64,22 +64,22 @@ void main() ; SHADERTEST: cmpxchg ptr {{.*}} monotonic monotonic ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.smin.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.smax.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.and.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.or.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.xor.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.swap.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.cmpswap.i32(i32 %{{[0-9]*}}, i32 28, <4 x i32> %{{[0-9a-z.]*}}, i32 0, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 4, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.umin.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 8, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.umax.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 12, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.and.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 16, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.or.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 %{{[0-9a-z.]*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.xor.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 %{{[0-9a-z.]*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.swap.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 %{{[0-9a-z.]*}}, i32 0, i32 0) -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.cmpswap.i32(i32 %{{[0-9]*}}, i32 16, <4 x i32> %{{[0-9]*}}, i32 %{{[0-9a-z.]*}}, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.smin.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.smax.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.and.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.or.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.xor.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.swap.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.cmpswap.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, i32 28, <4 x i32> %{{[0-9a-z.]*}}, i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 4, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.umin.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 8, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.umax.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 12, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.and.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 16, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.or.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 %{{[0-9a-z.]*}}, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.xor.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 %{{[0-9a-z.]*}}, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.swap.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 %{{[0-9a-z.]*}}, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.atomic.cmpswap.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, i32 16, <4 x i32> %{{[0-9]*}}, i32 %{{[0-9a-z.]*}}, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/core/OpDecorationGroup_TestGroupAndGroupMember_lit.spvasm b/llpc/test/shaderdb/core/OpDecorationGroup_TestGroupAndGroupMember_lit.spvasm index 24dcb427ef..4e6f615de2 100644 --- a/llpc/test/shaderdb/core/OpDecorationGroup_TestGroupAndGroupMember_lit.spvasm +++ b/llpc/test/shaderdb/core/OpDecorationGroup_TestGroupAndGroupMember_lit.spvasm @@ -6,7 +6,7 @@ ; SHADERTEST: %{{[0-9]+}} = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0), !invariant.load !{{[0-9]+}} ; SHADERTEST: %{{[0-9]+}} = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0), !invariant.load !{{[0-9]+}} ; SHADERTEST: %{{[0-9]+}} = call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0), !invariant.load !{{[0-9]+}} -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %37, <4 x i32> %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %37, <4 x i32> %{{[0-9]+}}, i32 %{{[0-9]+}}, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/core/OpFOrdEqual_TestVec3_lit.frag b/llpc/test/shaderdb/core/OpFOrdEqual_TestVec3_lit.frag index b7e84aefe6..99ec7f73f0 100644 --- a/llpc/test/shaderdb/core/OpFOrdEqual_TestVec3_lit.frag +++ b/llpc/test/shaderdb/core/OpFOrdEqual_TestVec3_lit.frag @@ -33,7 +33,7 @@ void main() // CHECK-NEXT: [[TMP13:%.*]] = fcmp oeq float [[TMP11]], [[TMP12]] // CHECK-NEXT: [[TMP14:%.*]] = and i1 [[TMP7]], [[TMP10]] // CHECK-NEXT: [[TMP15:%.*]] = and i1 [[TMP14]], [[TMP13]] -// CHECK-NEXT: [[TMP16:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP15]], <4 x float> , <4 x float> +// CHECK-NEXT: [[TMP16:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP15]], <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <4 x float> {{(splat \(float 5\.000000e\-01\))|()}} // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP16]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void // diff --git a/llpc/test/shaderdb/core/OpFOrdNotEqual_TestVec3_lit.frag b/llpc/test/shaderdb/core/OpFOrdNotEqual_TestVec3_lit.frag index 0732bda8cb..6920927633 100644 --- a/llpc/test/shaderdb/core/OpFOrdNotEqual_TestVec3_lit.frag +++ b/llpc/test/shaderdb/core/OpFOrdNotEqual_TestVec3_lit.frag @@ -33,7 +33,7 @@ void main() // CHECK-NEXT: [[TMP13:%.*]] = fcmp une float [[TMP11]], [[TMP12]] // CHECK-NEXT: [[TMP14:%.*]] = or i1 [[TMP7]], [[TMP10]] // CHECK-NEXT: [[TMP15:%.*]] = or i1 [[TMP14]], [[TMP13]] -// CHECK-NEXT: [[TMP16:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP15]], <4 x float> , <4 x float> +// CHECK-NEXT: [[TMP16:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP15]], <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <4 x float> {{(splat \(float 5\.000000e\-01\))|()}} // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP16]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void // diff --git a/llpc/test/shaderdb/core/OpIEqual_TestIvec2_lit.frag b/llpc/test/shaderdb/core/OpIEqual_TestIvec2_lit.frag index 1ce6abbbbc..500ed47cee 100644 --- a/llpc/test/shaderdb/core/OpIEqual_TestIvec2_lit.frag +++ b/llpc/test/shaderdb/core/OpIEqual_TestIvec2_lit.frag @@ -29,7 +29,7 @@ void main() // SHADERTEST-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP4]], i64 1 // SHADERTEST-NEXT: [[TMP10:%.*]] = icmp eq i32 [[TMP8]], [[TMP9]] // SHADERTEST-NEXT: [[TMP11:%.*]] = and i1 [[TMP7]], [[TMP10]] -// SHADERTEST-NEXT: [[TMP12:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP11]], <4 x float> , <4 x float> +// SHADERTEST-NEXT: [[TMP12:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP11]], <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <4 x float> {{(splat \(float 5\.000000e\-01\))|()}} // SHADERTEST-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP12]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // SHADERTEST-NEXT: ret void // diff --git a/llpc/test/shaderdb/core/OpINotEqual_TestIvec2_lit.frag b/llpc/test/shaderdb/core/OpINotEqual_TestIvec2_lit.frag index 3fedb0e70d..80260c4e03 100644 --- a/llpc/test/shaderdb/core/OpINotEqual_TestIvec2_lit.frag +++ b/llpc/test/shaderdb/core/OpINotEqual_TestIvec2_lit.frag @@ -29,7 +29,7 @@ void main() // SHADERTEST-NEXT: [[TMP9:%.*]] = extractelement <2 x i32> [[TMP4]], i64 1 // SHADERTEST-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP8]], [[TMP9]] // SHADERTEST-NEXT: [[TMP11:%.*]] = or i1 [[TMP7]], [[TMP10]] -// SHADERTEST-NEXT: [[TMP12:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP11]], <4 x float> , <4 x float> +// SHADERTEST-NEXT: [[TMP12:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP11]], <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <4 x float> {{(splat \(float 5\.000000e\-01\))|()}} // SHADERTEST-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP12]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // SHADERTEST-NEXT: ret void // diff --git a/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGatherOffset_lit.frag b/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGatherOffset_lit.frag index 4210d31dbb..d49ced5b53 100644 --- a/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGatherOffset_lit.frag +++ b/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGatherOffset_lit.frag @@ -28,7 +28,7 @@ void main() ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 2, i32 2, i64 0, i32 0) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, ptr addrspace(4) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, ptr addrspace(4) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, ptr addrspace(4) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results diff --git a/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGatherOffsets_lit.frag b/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGatherOffsets_lit.frag index 98213c8300..dcb6ba8e97 100644 --- a/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGatherOffsets_lit.frag +++ b/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGatherOffsets_lit.frag @@ -33,9 +33,9 @@ void main() ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 1, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 0, i32 0) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, {{.*}}, i32 801, <2 x float> , float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> , <2 x i32> , <2 x i32> , <2 x i32> ], float 0x3FECCCCCC0000000) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, {{.*}}, i32 801, <3 x float> , float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> , <2 x i32> , <2 x i32> , <2 x i32> ], float 0x3FE99999A0000000) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, {{.*}}, i32 801, <2 x float> , float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> , <2 x i32> , <2 x i32> , <2 x i32> ], float 0x3FE6666660000000) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, {{.*}}, i32 801, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> {{(splat \(i32 1\))|()}}, <2 x i32> {{(splat \(i32 2\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}, <2 x i32> {{(splat \(i32 4\))|()}}], float 0x3FECCCCCC0000000) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, {{.*}}, i32 801, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> {{(splat \(i32 1\))|()}}, <2 x i32> {{(splat \(i32 2\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}, <2 x i32> {{(splat \(i32 4\))|()}}], float 0x3FE99999A0000000) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, {{.*}}, i32 801, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> {{(splat \(i32 1\))|()}}, <2 x i32> {{(splat \(i32 2\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}, <2 x i32> {{(splat \(i32 4\))|()}}], float 0x3FE6666660000000) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.gather4.c.lz.o.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 1, i32 257, float 0x3FECCCCCC0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, <8 x i32> %{{[-0-9A-Za0z_.]+}}, <4 x i32> %{{[-0-9A-Za0z_.]+}}, i1 false, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGather_lit.frag b/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGather_lit.frag index b9e530a0ce..fffba1c055 100644 --- a/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGather_lit.frag +++ b/llpc/test/shaderdb/core/OpImageDrefGather_TestTextureGather_lit.frag @@ -32,9 +32,9 @@ void main() ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 1, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 0, i32 0) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, {{.*}}, i32 545, <2 x float> , float 0.000000e+00, float 0x3FECCCCCC0000000) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, {{.*}}, i32 545, <3 x float> , float 0.000000e+00, float 0x3FE99999A0000000) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 545, <2 x float> , float 0.000000e+00, float 0x3FE6666660000000) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, {{.*}}, i32 545, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, float 0.000000e+00, float 0x3FECCCCCC0000000) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, {{.*}}, i32 545, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, float 0.000000e+00, float 0x3FE99999A0000000) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 545, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}, float 0.000000e+00, float 0x3FE6666660000000) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.gather4.c.lz.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 1, float 0x3FECCCCCC0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, <8 x i32> %{{[-0-9A-Za0z_.]+}}, <4 x i32> %{{[-0-9A-Za0z_.]+}}, i1 false, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpImageFetch_TestBuffer_lit.comp b/llpc/test/shaderdb/core/OpImageFetch_TestBuffer_lit.comp index c97da7dea4..b8dd37df79 100644 --- a/llpc/test/shaderdb/core/OpImageFetch_TestBuffer_lit.comp +++ b/llpc/test/shaderdb/core/OpImageFetch_TestBuffer_lit.comp @@ -22,7 +22,7 @@ void main() ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 10, i32 1536, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 3) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32({{.*}}, i32 3, i32 0, i32 0, i32 0), !invariant.load +; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32{{(\.v4i32)?}}({{.*}}, i32 3, i32 0, i32 0, i32 0), !invariant.load ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/core/OpImageFetch_TestTexelFetchOffset_lit.frag b/llpc/test/shaderdb/core/OpImageFetch_TestTexelFetchOffset_lit.frag index 4c1cd88342..ef5d358b95 100644 --- a/llpc/test/shaderdb/core/OpImageFetch_TestTexelFetchOffset_lit.frag +++ b/llpc/test/shaderdb/core/OpImageFetch_TestTexelFetchOffset_lit.frag @@ -44,9 +44,9 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0 ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0 ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 0, i32 1536, {{.*}}, i32 6, i32 3) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 1664, {{.*}}, <2 x i32> , i32 6) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 2, i32 1536, {{.*}}, <3 x i32> , i32 2) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 9, i32 1536, {{.*}}, <2 x i32> ) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 1664, {{.*}}, <2 x i32> {{(splat \(i32 12\))|()}}, i32 6) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 2, i32 1536, {{.*}}, <3 x i32> {{(splat \(i32 4\))|()}}, i32 2) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 9, i32 1536, {{.*}}, <2 x i32> {{(splat \(i32 9\))|()}}) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 4, i32 1536, {{.*}}, <2 x i32> , i32 6) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 5, i32 1664, {{.*}}, <3 x i32> , i32 2) diff --git a/llpc/test/shaderdb/core/OpImageFetch_TestTexelFetch_lit.frag b/llpc/test/shaderdb/core/OpImageFetch_TestTexelFetch_lit.frag index 34346a5f11..95039c2e91 100644 --- a/llpc/test/shaderdb/core/OpImageFetch_TestTexelFetch_lit.frag +++ b/llpc/test/shaderdb/core/OpImageFetch_TestTexelFetch_lit.frag @@ -34,16 +34,16 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0 ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0 ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 0, i32 1536, {{.*}}, i32 2, i32 2) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 1664, {{.*}}, <2 x i32> , i32 8) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 9, i32 1536, {{.*}}, <2 x i32> ) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 1664, {{.*}}, <2 x i32> {{(splat \(i32 7\))|()}}, i32 8) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 9, i32 1536, {{.*}}, <2 x i32> {{(splat \(i32 3\))|()}}) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 10, i32 1536, {{.*}}, i32 5) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.with.fmask.v4f32(i32 6, i32 1664, {{.*}}, {{.*}}, <2 x i32> , i32 4) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.with.fmask.v4f32(i32 6, i32 1664, {{.*}}, {{.*}}, <2 x i32> {{(splat \(i32 6\))|()}}, i32 4) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.load.mip.1d.v4f32.i16{{(\.v8i32)?}}(i32 15, i16 2, i16 2, <8 x i32> %{{.*}}, i32 0, i32 0), !invariant.load !{{.*}} ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.load.mip.2d.v4f32.i16{{(\.v8i32)?}}(i32 15, i16 7, i16 7, i16 8, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16{{(\.v8i32)?}}(i32 15, i16 3, i16 3, <8 x i32> %{{.*}}, i32 0, i32 0), !invariant.load !{{.*}} -; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32({{.*}}, i32 5, i32 0, i32 0, i32 0), !invariant.load +; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32{{(\.v4i32)?}}({{.*}}, i32 5, i32 0, i32 0, i32 0), !invariant.load ; SHADERTEST: call i32 @llvm.amdgcn.image.load.2d.i32.i16{{(\.v8i32)?}}(i32 1, i16 6, i16 6, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i32{{(\.v8i32)?}}(i32 15, i32 6, i32 6,{{.*}},{{.*}}, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/core/OpImageGather_TestIntegerSampler.frag b/llpc/test/shaderdb/core/OpImageGather_TestIntegerSampler.frag index defe38dfa3..cfa4de744c 100644 --- a/llpc/test/shaderdb/core/OpImageGather_TestIntegerSampler.frag +++ b/llpc/test/shaderdb/core/OpImageGather_TestIntegerSampler.frag @@ -27,10 +27,10 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 2, i32 2, i64 0, i32 0 ; SHADERTEST: call <4 x i32> (...) @lgc.create.image.gather.v4i32(i32 1, i32 516, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <2 x float> , i32 0, float 0.000000e+00) ; SHADERTEST: call <4 x i32> (...) @lgc.create.image.gather.v4i32(i32 1, i32 516, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> , i32 0, float 0.000000e+00, <2 x i32> ) -; SHADERTEST: call <4 x i32> (...) @lgc.create.image.gather.v4i32(i32 1, i32 516, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> , i32 0, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> , <2 x i32> , <2 x i32> , <2 x i32> ]) +; SHADERTEST: call <4 x i32> (...) @lgc.create.image.gather.v4i32(i32 1, i32 516, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> , i32 0, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> {{(splat \(i32 1\))|()}}, <2 x i32> {{(splat \(i32 2\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}, <2 x i32> {{(splat \(i32 4\))|()}}]) ; SHADERTEST: call <4 x i32> (...) @lgc.create.image.gather.v4i32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <2 x float> , i32 0, float 0.000000e+00) ; SHADERTEST: call <4 x i32> (...) @lgc.create.image.gather.v4i32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> , i32 0, float 0.000000e+00, <2 x i32> ) -; SHADERTEST: call <4 x i32> (...) @lgc.create.image.gather.v4i32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> , i32 0, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> , <2 x i32> , <2 x i32> , <2 x i32> ]) +; SHADERTEST: call <4 x i32> (...) @lgc.create.image.gather.v4i32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> , i32 0, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> {{(splat \(i32 1\))|()}}, <2 x i32> {{(splat \(i32 2\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}, <2 x i32> {{(splat \(i32 4\))|()}}]) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call <4 x float> @llvm.amdgcn.image.gather4.lz.2d.v4f32.f16{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 1, half 0xH0000, half 0xH3C00, <8 x i32> %{{.*}}, <4 x i32> %{{.*}}, i1 false, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherBiasLod_lit.frag b/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherBiasLod_lit.frag index 9d42fa96ed..33e6f1ea86 100644 --- a/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherBiasLod_lit.frag +++ b/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherBiasLod_lit.frag @@ -67,16 +67,16 @@ void main() ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 8, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 69, <4 x {{.*}}, i32 3, {{.*}}) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 325, <2 x {{.*}}, i32 0, {{.*}}, <2 x i32> zeroinitializer) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 325, <3 x {{.*}}, i32 1, {{.*}}, <2 x i32> ) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 325, <2 x {{.*}}, i32 0, {{.*}}, [4 x <2 x i32>] [<2 x i32> zeroinitializer, <2 x i32> , <2 x i32> , <2 x i32> ]) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 325, <3 x {{.*}}, i32 1, {{.*}}, [4 x <2 x i32>] [<2 x i32> zeroinitializer, <2 x i32> , <2 x i32> , <2 x i32> ]) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 325, <2 x {{.*}}, i32 0, {{.*}}, [4 x <2 x i32>] [<2 x i32> zeroinitializer, <2 x i32> , <2 x i32> , <2 x i32> {{(splat \(i32 1\))|()}}]) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 325, <3 x {{.*}}, i32 1, {{.*}}, [4 x <2 x i32>] [<2 x i32> zeroinitializer, <2 x i32> , <2 x i32> , <2 x i32> {{(splat \(i32 1\))|()}}]) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <2 x {{.*}}, i32 0, {{.*}}) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <3 x {{.*}}, i32 1, {{.*}}) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 3, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <3 x {{.*}}, i32 2, {{.*}}) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 8, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <4 x {{.*}}, i32 3, {{.*}}) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x {{.*}}, i32 0, {{.*}}, <2 x i32> zeroinitializer) ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <3 x {{.*}}, i32 1, {{.*}}, <2 x i32> ) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x {{.*}}, i32 0, {{.*}}, [4 x <2 x i32>] [<2 x i32> zeroinitializer, <2 x i32> , <2 x i32> , <2 x i32> ]) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <3 x {{.*}}, i32 1, {{.*}}, [4 x <2 x i32>] [<2 x i32> zeroinitializer, <2 x i32> , <2 x i32> , <2 x i32> ]) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x {{.*}}, i32 0, {{.*}}, [4 x <2 x i32>] [<2 x i32> zeroinitializer, <2 x i32> , <2 x i32> , <2 x i32> {{(splat \(i32 1\))|()}}]) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <3 x {{.*}}, i32 1, {{.*}}, [4 x <2 x i32>] [<2 x i32> zeroinitializer, <2 x i32> , <2 x i32> , <2 x i32> {{(splat \(i32 1\))|()}}]) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.gather4.b.2d.v4f32.f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 1,{{.*}},{{.*}},{{.*}},{{.*}},{{.*}}, i1 false, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherOffset_lit.frag b/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherOffset_lit.frag index 8f889cb668..7ae73d63cb 100644 --- a/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherOffset_lit.frag +++ b/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherOffset_lit.frag @@ -31,9 +31,9 @@ void main() ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 1, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 0, i32 0) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> , i32 2, float 0.000000e+00, <2 x {{.*}}) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <3 x float> , i32 3, float 0.000000e+00, <2 x {{.*}}) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> , i32 0, float 0.000000e+00, <2 x i32> ) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, i32 2, float 0.000000e+00, <2 x {{.*}}) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, i32 3, float 0.000000e+00, <2 x {{.*}}) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 293, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}, i32 0, float 0.000000e+00, <2 x i32> {{(splat \(i32 1\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.gather4.lz.o.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 4,{{.*}}, float 0x3FB99999A0000000, float 0x3FB99999A0000000,{{.*}}, i1 false, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherOffsets_lit.frag b/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherOffsets_lit.frag index d839413a06..a042e92e14 100644 --- a/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherOffsets_lit.frag +++ b/llpc/test/shaderdb/core/OpImageGather_TestTextureGatherOffsets_lit.frag @@ -32,9 +32,9 @@ void main() ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 1, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 0, i32 0) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 293, <2 x float> , i32 2, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> , <2 x i32> , <2 x i32> , <2 x i32> ]) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, {{.*}}, {{.*}}, i32 293, <3 x float> , i32 3, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> , <2 x i32> , <2 x i32> , <2 x i32> ]) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, {{.*}}, {{.*}}, i32 293, <2 x float> , i32 0, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> , <2 x i32> , <2 x i32> , <2 x i32> ]) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 293, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, i32 2, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> {{(splat \(i32 1\))|()}}, <2 x i32> {{(splat \(i32 2\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}, <2 x i32> {{(splat \(i32 4\))|()}}]) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, {{.*}}, {{.*}}, i32 293, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, i32 3, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> {{(splat \(i32 1\))|()}}, <2 x i32> {{(splat \(i32 2\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}, <2 x i32> {{(splat \(i32 4\))|()}}]) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, {{.*}}, {{.*}}, i32 293, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}, i32 0, float 0.000000e+00, [4 x <2 x i32>] [<2 x i32> {{(splat \(i32 1\))|()}}, <2 x i32> {{(splat \(i32 2\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}, <2 x i32> {{(splat \(i32 4\))|()}}]) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.gather4.lz.o.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 4, i32 257, float 0x3FB99999A0000000, float 0x3FB99999A0000000, <8 x i32> %{{[-0-9A-Za0z_.]+}}, <4 x i32> %{{[-0-9A-Za0z_.]+}}, i1 false, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpImageGather_TestTextureGather_lit.frag b/llpc/test/shaderdb/core/OpImageGather_TestTextureGather_lit.frag index 41456de283..863c9a18aa 100644 --- a/llpc/test/shaderdb/core/OpImageGather_TestTextureGather_lit.frag +++ b/llpc/test/shaderdb/core/OpImageGather_TestTextureGather_lit.frag @@ -30,9 +30,9 @@ void main() ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 1, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 0, i32 0) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <2 x float> , i32 2, float 0.000000e+00) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <3 x float> , i32 3, float 0.000000e+00) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <2 x float> , i32 0, float 0.000000e+00) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, i32 2, float 0.000000e+00) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 5, i32 896, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, i32 3, float 0.000000e+00) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.gather.v4f32(i32 9, i32 512, ptr addrspace(4) {{.*}}, ptr addrspace(4) {{.*}}, i32 37, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}, i32 0, float 0.000000e+00) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.gather4.lz.2d.v4f32.f32{{(\.v8i32)?}}{{(\.v4i32)?}}(i32 4, float 0x3FB99999A0000000, float 0x3FB99999A0000000, <8 x i32> %{{[-0-9A-Za0z_.]+}}, <4 x i32> %{{[-0-9A-Za0z_.]+}}, i1 false, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpImageQueryLevels_TestTextureQueryLevels_lit.frag b/llpc/test/shaderdb/core/OpImageQueryLevels_TestTextureQueryLevels_lit.frag index 25d69a8a83..e16c00fa22 100644 --- a/llpc/test/shaderdb/core/OpImageQueryLevels_TestTextureQueryLevels_lit.frag +++ b/llpc/test/shaderdb/core/OpImageQueryLevels_TestTextureQueryLevels_lit.frag @@ -31,9 +31,9 @@ void main() ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call i32 (...) @lgc.create.image.query.levels.i32(i32 0, i32 512, ptr addrspace(4) {{.*}}) -; SHADERTEST: call i32 (...) @lgc.create.image.query.levels.i32(i32 1, i32 640, ptr addrspace(4) {{.*}}) +; SHADERTEST: call i32 (...) @lgc.create.image.query.levels.i32(i32 1, i32 640, ptr addrspace(4) {{.*}}) ; SHADERTEST: call i32 (...) @lgc.create.image.query.levels.i32(i32 1, i32 512, ptr addrspace(4) {{.*}}) -; SHADERTEST: call i32 (...) @lgc.create.image.query.levels.i32(i32 8, i32 640, ptr addrspace(4) {{.*}}) +; SHADERTEST: call i32 (...) @lgc.create.image.query.levels.i32(i32 8, i32 640, ptr addrspace(4) {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/core/OpImageQueryLod_TestTextureQueryLod_lit.frag b/llpc/test/shaderdb/core/OpImageQueryLod_TestTextureQueryLod_lit.frag index 9cec111ffb..b89ebda5e4 100644 --- a/llpc/test/shaderdb/core/OpImageQueryLod_TestTextureQueryLod_lit.frag +++ b/llpc/test/shaderdb/core/OpImageQueryLod_TestTextureQueryLod_lit.frag @@ -37,10 +37,10 @@ void main() ; SHADERTEST: select reassoc nnan nsz arcp contract afn i1 [[ZERO]], <2 x float> [[LOD2]], <2 x float> [[LOD1]] ; 2D -; SHADERTEST: [[LOD1:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.image.get.lod.v2f32(i32 1, i32 896, {{.*}}, {{.*}}, <2 x float> ) -; SHADERTEST: [[DPX:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.derivative.v2f32(<2 x float> , i1 false, i1 true) +; SHADERTEST: [[LOD1:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.image.get.lod.v2f32(i32 1, i32 896, {{.*}}, {{.*}}, <2 x float> {{(splat \(float 5\.000000e\-01\))|()}}) +; SHADERTEST: [[DPX:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.derivative.v2f32(<2 x float> {{(splat \(float 5\.000000e\-01\))|()}}, i1 false, i1 true) ; SHADERTEST: [[ABSDPX:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[DPX]]) -; SHADERTEST: [[DPY:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.derivative.v2f32(<2 x float> , i1 true, i1 true) +; SHADERTEST: [[DPY:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.derivative.v2f32(<2 x float> {{(splat \(float 5\.000000e\-01\))|()}}, i1 true, i1 true) ; SHADERTEST: [[ABSDPY:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> @llvm.fabs.v2f32(<2 x float> [[DPY]]) ; SHADERTEST: [[SUM:%[0-9]*]] = fadd reassoc nnan nsz arcp contract afn <2 x float> [[ABSDPX]], [[ABSDPY]] ; SHADERTEST: [[ZERO:%[0-9]*]] = fcmp reassoc nnan nsz arcp contract afn oeq <2 x float> [[SUM]], zeroinitializer @@ -52,10 +52,10 @@ void main() ; SHADERTEST: select reassoc nnan nsz arcp contract afn i1 [[CMP2]], <2 x float> [[LOD2]], <2 x float> [[LOD1]] ; 3D -; SHADERTEST: [[LOD1:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.image.get.lod.v2f32(i32 2, i32 512, {{.*}}, {{.*}}, <3 x float> ) -; SHADERTEST: [[DPX:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <3 x float> (...) @lgc.create.derivative.v3f32(<3 x float> , i1 false, i1 true) +; SHADERTEST: [[LOD1:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.image.get.lod.v2f32(i32 2, i32 512, {{.*}}, {{.*}}, <3 x float> {{(splat \(float 0x3FE6666660000000\))|()}}) +; SHADERTEST: [[DPX:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <3 x float> (...) @lgc.create.derivative.v3f32(<3 x float> {{(splat \(float 0x3FE6666660000000\))|()}}, i1 false, i1 true) ; SHADERTEST: [[ABSDPX:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[DPX]]) -; SHADERTEST: [[DPY:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <3 x float> (...) @lgc.create.derivative.v3f32(<3 x float> , i1 true, i1 true) +; SHADERTEST: [[DPY:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <3 x float> (...) @lgc.create.derivative.v3f32(<3 x float> {{(splat \(float 0x3FE6666660000000\))|()}}, i1 true, i1 true) ; SHADERTEST: [[ABSDPY:%[0-9]*]] = call reassoc nnan nsz arcp contract afn <3 x float> @llvm.fabs.v3f32(<3 x float> [[DPY]]) ; SHADERTEST: [[SUM:%[0-9]*]] = fadd reassoc nnan nsz arcp contract afn <3 x float> [[ABSDPX]], [[ABSDPY]] ; SHADERTEST: [[ZERO:%[0-9]*]] = fcmp reassoc nnan nsz arcp contract afn oeq <3 x float> [[SUM]], zeroinitializer diff --git a/llpc/test/shaderdb/core/OpImageQuerySamples_TestImageSamples_lit.frag b/llpc/test/shaderdb/core/OpImageQuerySamples_TestImageSamples_lit.frag index 7a65d1a88b..e9b0ea3f21 100644 --- a/llpc/test/shaderdb/core/OpImageQuerySamples_TestImageSamples_lit.frag +++ b/llpc/test/shaderdb/core/OpImageQuerySamples_TestImageSamples_lit.frag @@ -25,7 +25,7 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 1) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.query.samples.i32(i32 6, i32 512, {{.*}}) -; SHADERTEST: call {{.*}} @lgc.create.image.query.samples.i32(i32 7, i32 640, {{.*}}) +; SHADERTEST: call {{.*}} @lgc.create.image.query.samples.i32(i32 7, i32 640, {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/core/OpImageQuerySamples_TestTextureSamples_lit.frag b/llpc/test/shaderdb/core/OpImageQuerySamples_TestTextureSamples_lit.frag index cbc347099e..92284a7c9a 100644 --- a/llpc/test/shaderdb/core/OpImageQuerySamples_TestTextureSamples_lit.frag +++ b/llpc/test/shaderdb/core/OpImageQuerySamples_TestTextureSamples_lit.frag @@ -25,7 +25,7 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 1) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.query.samples.i32(i32 6, i32 512, {{.*}}) -; SHADERTEST: call {{.*}} @lgc.create.image.query.samples.i32(i32 7, i32 640, {{.*}}) +; SHADERTEST: call {{.*}} @lgc.create.image.query.samples.i32(i32 7, i32 640, {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/core/OpImageQuerySizeLod_TestTextureSize_lit.frag b/llpc/test/shaderdb/core/OpImageQuerySizeLod_TestTextureSize_lit.frag index 5fbaac5d96..22043ede5c 100644 --- a/llpc/test/shaderdb/core/OpImageQuerySizeLod_TestTextureSize_lit.frag +++ b/llpc/test/shaderdb/core/OpImageQuerySizeLod_TestTextureSize_lit.frag @@ -26,7 +26,7 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 5) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 4) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v2i32(i32 1, i32 640, {{.*}}, i32 3) +; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v2i32(i32 1, i32 640, {{.*}}, i32 3) ; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v2i32(i32 1, i32 512, {{.*}}, i32 4) ; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v3i32(i32 2, i32 512, {{.*}}, i32 5) diff --git a/llpc/test/shaderdb/core/OpImageQuerySize_TestImageSize_lit.frag b/llpc/test/shaderdb/core/OpImageQuerySize_TestImageSize_lit.frag index 966d5e5668..f04b11590a 100644 --- a/llpc/test/shaderdb/core/OpImageQuerySize_TestImageSize_lit.frag +++ b/llpc/test/shaderdb/core/OpImageQuerySize_TestImageSize_lit.frag @@ -36,8 +36,8 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.image.query.size.i32(i32 0, i32 512, {{.*}}, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v2i32(i32 9, i32 512, {{.*}}, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v2i32(i32 6, i32 512, {{.*}}, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.query.size.i32(i32 10, i32 640, {{.*}}, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v3i32(i32 8, i32 640, {{.*}}, i32 0) +; SHADERTEST: call {{.*}} @lgc.create.image.query.size.i32(i32 10, i32 640, {{.*}}, i32 0) +; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v3i32(i32 8, i32 640, {{.*}}, i32 0) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/core/OpImageQuerySize_TestTextureSize_lit.frag b/llpc/test/shaderdb/core/OpImageQuerySize_TestTextureSize_lit.frag index f8dc691e98..b193bade07 100644 --- a/llpc/test/shaderdb/core/OpImageQuerySize_TestTextureSize_lit.frag +++ b/llpc/test/shaderdb/core/OpImageQuerySize_TestTextureSize_lit.frag @@ -29,9 +29,9 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 1) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v2i32(i32 9, i32 512, {{.*}}, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.query.size.i32(i32 10, i32 640, {{.*}}, i32 0) +; SHADERTEST: call {{.*}} @lgc.create.image.query.size.i32(i32 10, i32 640, {{.*}}, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v2i32(i32 6, i32 512, {{.*}}, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v3i32(i32 7, i32 640, {{.*}}, i32 0) +; SHADERTEST: call {{.*}} @lgc.create.image.query.size.v3i32(i32 7, i32 640, {{.*}}, i32 0) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/core/OpImageReadWrite_TestImageLoadStoreLod_lit.comp b/llpc/test/shaderdb/core/OpImageReadWrite_TestImageLoadStoreLod_lit.comp index cf780094e9..9344c70ec6 100644 --- a/llpc/test/shaderdb/core/OpImageReadWrite_TestImageLoadStoreLod_lit.comp +++ b/llpc/test/shaderdb/core/OpImageReadWrite_TestImageLoadStoreLod_lit.comp @@ -42,18 +42,18 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 1) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 0, i32 516, {{.*}}, i32 9, i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 1, i32 516, {{.*}}, <2 x i32> , i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 2, i32 516, {{.*}}, <3 x i32> , i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 3, i32 516, {{.*}}, <3 x i32> , i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 4, i32 516, {{.*}}, <2 x i32> , i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 5, i32 516, {{.*}}, <3 x i32> , i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 1, i32 516, {{.*}}, <2 x i32> {{(splat \(i32 9\))|()}}, i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 2, i32 516, {{.*}}, <3 x i32> {{(splat \(i32 9\))|()}}, i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 3, i32 516, {{.*}}, <3 x i32> {{(splat \(i32 9\))|()}}, i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 4, i32 516, {{.*}}, <2 x i32> {{(splat \(i32 9\))|()}}, i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 5, i32 516, {{.*}}, <3 x i32> {{(splat \(i32 9\))|()}}, i32 7) ; SHADERTEST: call {{.*}} @lgc.create.image.load.v4i32(i32 8, i32 516, {{.*}}, <4 x i32> , i32 7) ; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 0, i32 516, {{.*}}, i32 9, i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 1, i32 516, {{.*}}, <2 x i32> , i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 2, i32 516, {{.*}}, <3 x i32> , i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 3, i32 516, {{.*}}, <3 x i32> , i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 4, i32 516, {{.*}}, <2 x i32> , i32 7) -; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 5, i32 516, {{.*}}, <3 x i32> , i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 1, i32 516, {{.*}}, <2 x i32> {{(splat \(i32 9\))|()}}, i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 2, i32 516, {{.*}}, <3 x i32> {{(splat \(i32 9\))|()}}, i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 3, i32 516, {{.*}}, <3 x i32> {{(splat \(i32 9\))|()}}, i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 4, i32 516, {{.*}}, <2 x i32> {{(splat \(i32 9\))|()}}, i32 7) +; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 5, i32 516, {{.*}}, <3 x i32> {{(splat \(i32 9\))|()}}, i32 7) ; SHADERTEST: call {{.*}} @lgc.create.image.store({{.*}}, i32 8, i32 516, {{.*}}, <4 x i32> , i32 7) ; SHADERTEST-LABEL: LLPC pipeline patching results diff --git a/llpc/test/shaderdb/core/OpImageRead_TestBuffer_lit.comp b/llpc/test/shaderdb/core/OpImageRead_TestBuffer_lit.comp index 048f86a7ab..d3347f0928 100644 --- a/llpc/test/shaderdb/core/OpImageRead_TestBuffer_lit.comp +++ b/llpc/test/shaderdb/core/OpImageRead_TestBuffer_lit.comp @@ -22,7 +22,7 @@ void main() ; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 10, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 3) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32({{.*}}, i32 3, i32 0, i32 0, i32 0) +; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32{{(\.v4i32)?}}({{.*}}, i32 3, i32 0, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/core/OpImageRead_TestImageLoad_lit.frag b/llpc/test/shaderdb/core/OpImageRead_TestImageLoad_lit.frag index 760528d619..d924b3aec8 100644 --- a/llpc/test/shaderdb/core/OpImageRead_TestImageLoad_lit.frag +++ b/llpc/test/shaderdb/core/OpImageRead_TestImageLoad_lit.frag @@ -35,14 +35,14 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.load.v4f32(i32 0, i32 512, {{.*}}, i32 1) ; SHADERTEST: call {{.*}} @lgc.create.image.load.v4f32(i32 9, i32 512, {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v4f32(i32 10, i32 640, {{.*}}, i32 4) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v4f32(i32 8, i32 640, {{.*}}, <4 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v4f32(i32 10, i32 640, {{.*}}, i32 4) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v4f32(i32 8, i32 640, {{.*}}, <4 x i32> ) ; SHADERTEST: call {{.*}} @lgc.create.image.load.v4f32(i32 6, i32 512, {{.*}}, <3 x i32> ) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i16{{(\.v8i32)?}}(i32 15, i16 1, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16{{(\.v8i32)?}}(i32 15, i16 2, i16 3, <8 x i32> %{{.*}}, i32 0, i32 0) -; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32({{.*}}, i32 4, i32 0, i32 0, i32 0) +; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.struct.buffer.load.format.v4f32{{(\.v4i32)?}}({{.*}}, i32 4, i32 0, i32 0, i32 0) ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.load.cube.v4f32.i16{{(\.v8i32)?}}(i32 15, i16 5, i16 6, i16 7, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.load.2dmsaa.v4f32.i16{{(\.v8i32)?}}(i32 15, i16 8, i16 9, i16 2, <8 x i32> %{{.*}}, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/core/OpImageRead_TestMemoryQualifier_lit.comp b/llpc/test/shaderdb/core/OpImageRead_TestMemoryQualifier_lit.comp index 5bb6ae687d..261dc2e394 100644 --- a/llpc/test/shaderdb/core/OpImageRead_TestMemoryQualifier_lit.comp +++ b/llpc/test/shaderdb/core/OpImageRead_TestMemoryQualifier_lit.comp @@ -27,10 +27,10 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 2 ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 1 ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0 -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> ) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> ) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 513, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> ) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 515, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> ) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 1\))|()}}) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 513, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 3\))|()}}) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.load.v4f32(i32 1, i32 515, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, <2 x i32> {{(splat \(i32 4\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} <4 x float> @llvm.amdgcn.image.load.2d.v4f32.i16{{(\.v8i32)?}}(i32 15, i16 1, i16 1, <8 x i32> %{{.*}}, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpImageRead_TestNonVec4Data_lit.spvasm b/llpc/test/shaderdb/core/OpImageRead_TestNonVec4Data_lit.spvasm index 172be262f4..298068ef0b 100644 --- a/llpc/test/shaderdb/core/OpImageRead_TestNonVec4Data_lit.spvasm +++ b/llpc/test/shaderdb/core/OpImageRead_TestNonVec4Data_lit.spvasm @@ -8,13 +8,13 @@ ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.load.i32(i32 1, i32 512, {{.*}}, <2 x i32> zeroinitializer) ; SHADERTEST: call {{.*}} @lgc.create.image.load.v2i32(i32 1, i32 512, {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v3i32(i32 1, i32 512, {{.*}}, <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v3i32(i32 1, i32 512, {{.*}}, <2 x i32> {{(splat \(i32 1\))|()}}) ; SHADERTEST: call {{.*}} @lgc.create.image.load.i32(i32 1, i32 512, {{.*}}, <2 x i32> zeroinitializer) ; SHADERTEST: call {{.*}} @lgc.create.image.load.v2i32(i32 1, i32 512, {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v3i32(i32 1, i32 512, {{.*}}, <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v3i32(i32 1, i32 512, {{.*}}, <2 x i32> {{(splat \(i32 1\))|()}}) ; SHADERTEST: call {{.*}} @lgc.create.image.load.f32(i32 1, i32 512, {{.*}}, <2 x i32> zeroinitializer) ; SHADERTEST: call {{.*}} @lgc.create.image.load.v2f32(i32 1, i32 512, {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.load.v3f32(i32 1, i32 512, {{.*}}, <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.load.v3f32(i32 1, i32 512, {{.*}}, <2 x i32> {{(splat \(i32 1\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call i32 @llvm.amdgcn.image.load.2d.i32.i16{{(\.v8i32)?}}(i32 1, i16 0, i16 0, <8 x i32> %{{.*}}, i32 0, i32 0) diff --git a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGradClamp_lit.frag b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGradClamp_lit.frag index 26c2d819f4..c303738876 100644 --- a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGradClamp_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGradClamp_lit.frag @@ -39,18 +39,18 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 153, <2 x float> , <2 x float> , <2 x float> , {{.*}}) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 153, <3 x float> , <3 x float> , <3 x float> , {{.*}}) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 409, <2 x float> , <2 x float> , <2 x float> , {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> , <3 x float> , <3 x float> , {{.*}}, <3 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 153, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 0x3FF19999A0000000\))|()}}, {{.*}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 153, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <3 x float> {{(splat \(float 0x3FF3333340000000\))|()}}, <3 x float> {{(splat \(float 0x3FF4CCCCC0000000\))|()}}, {{.*}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 409, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 0x3FF19999A0000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <3 x float> {{(splat \(float 0x3FF3333340000000\))|()}}, <3 x float> {{(splat \(float 0x3FF4CCCCC0000000\))|()}}, {{.*}}, <3 x i32> {{(splat \(i32 3\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 153, <2 x float> , <2 x float> , <2 x float> , {{.*}}) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 153, <3 x float> , <3 x float> , <3 x float> , {{.*}}) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 409, <2 x float> , <2 x float> , <2 x float> , {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> , <3 x float> , <3 x float> , {{.*}}, <3 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 153, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 0x3FF19999A0000000\))|()}}, {{.*}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 153, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <3 x float> {{(splat \(float 0x3FF3333340000000\))|()}}, <3 x float> {{(splat \(float 0x3FF4CCCCC0000000\))|()}}, {{.*}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 409, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 0x3FF19999A0000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <3 x float> {{(splat \(float 0x3FF3333340000000\))|()}}, <3 x float> {{(splat \(float 0x3FF4CCCCC0000000\))|()}}, {{.*}}, <3 x i32> {{(splat \(i32 3\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: load <8 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGradOffset_lit.frag b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGradOffset_lit.frag index 82829090d9..e8cce64d41 100644 --- a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGradOffset_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGradOffset_lit.frag @@ -26,13 +26,13 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 281, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 281, <2 x float> , <2 x float> , <2 x float> , <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 281, <2 x float> {{(splat \(float 4\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 5\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 6\.000000e\+00\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 281, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 281, <2 x float> , <2 x float> , <2 x float> , <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 281, <2 x float> {{(splat \(float 4\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 5\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 6\.000000e\+00\))|()}}, <2 x i32> {{(splat \(i32 3\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: load <4 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGrad_lit.frag b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGrad_lit.frag index 451809ce01..b9f26fa406 100644 --- a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGrad_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureGrad_lit.frag @@ -26,13 +26,13 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 25, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 25, <2 x float> , <2 x float> , <2 x float> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 25, <2 x float> {{(splat \(float 4\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 5\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 6\.000000e\+00\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 25, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 25, <2 x float> , <2 x float> , <2 x float> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 25, <2 x float> {{(splat \(float 4\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 5\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 6\.000000e\+00\))|()}}) ; SHADERTEST-LABEL: pipeline patching results ; SHADERTEST: load <4 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureLodOffset_lit.frag b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureLodOffset_lit.frag index b594b9a6ae..1b1a4c3cb6 100644 --- a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureLodOffset_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureLodOffset_lit.frag @@ -26,13 +26,13 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 289, float 5.000000e-01, float 0x3FD99999A0000000, i32 6) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 289, <2 x float> , float 0x3FE6666660000000, <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 289, <2 x float> {{(splat \(float 0x3FE3333340000000\))|()}}, float 0x3FE6666660000000, <2 x i32> {{(splat \(i32 5\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 289, float 5.000000e-01, float 0x3FD99999A0000000, i32 6) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 289, <2 x float> , float 0x3FE6666660000000, <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 289, <2 x float> {{(splat \(float 0x3FE3333340000000\))|()}}, float 0x3FE6666660000000, <2 x i32> {{(splat \(i32 5\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: load <4 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureLod_lit.frag b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureLod_lit.frag index 2567074f9e..1f96388f2b 100644 --- a/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureLod_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleExplicitLod_TestTextureLod_lit.frag @@ -26,13 +26,13 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 33, float 5.000000e-01, float 0x3FD99999A0000000) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 33, <2 x float> , float 0x3FE6666660000000) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 33, <2 x float> {{(splat \(float 0x3FE3333340000000\))|()}}, float 0x3FE6666660000000) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 33, float 5.000000e-01, float 0x3FD99999A0000000) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 33, <2 x float> , float 0x3FE6666660000000) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 33, <2 x float> {{(splat \(float 0x3FE3333340000000\))|()}}, float 0x3FE6666660000000) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: load <4 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestArrayDirectAccess_lit.frag b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestArrayDirectAccess_lit.frag index fe880adb9c..53ae5327b4 100644 --- a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestArrayDirectAccess_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestArrayDirectAccess_lit.frag @@ -14,11 +14,11 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 1, <2 x float> ) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 1, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 1, <2 x float> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 1, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: load <4 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestMultiDimArrayDirectAccess_lit.frag b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestMultiDimArrayDirectAccess_lit.frag index d467efd21e..37d4778cf3 100644 --- a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestMultiDimArrayDirectAccess_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestMultiDimArrayDirectAccess_lit.frag @@ -14,11 +14,11 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 1, <2 x float> ) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 512, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, ptr addrspace(4) %{{[-0-9A-Za0z_.]+}}, i32 1, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 1, <2 x float> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 1, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST-LABEL: load <4 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureGradOffsetClamp_lit.frag b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureGradOffsetClamp_lit.frag index 39a9f49448..b1c2c186d9 100644 --- a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureGradOffsetClamp_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureGradOffsetClamp_lit.frag @@ -42,11 +42,11 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 2, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 896, {{.*}}, {{.*}}, i32 409, float 0x3FB99999A0000000, float 0x3FC99999A0000000, float 0x3FD3333340000000, {{.*}}, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 409, <2 x float> , <2 x float> , <2 x float> , {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> , <3 x float> , <3 x float> , {{.*}}, <3 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 4, i32 512, {{.*}}, {{.*}}, i32 409, <2 x float> , float 0x3FC99999A0000000, float 0x3FD3333340000000, {{.*}}, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 5, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> , <2 x float> , <2 x float> , {{.*}}, <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 896, {{.*}}, {{.*}}, i32 409, float 0x3FB99999A0000000, float 0x3FC99999A0000000, float 0x3FD3333340000000, {{.*}}, i32 2) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 409, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <2 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <2 x float> {{(splat \(float 0x3FD3333340000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <3 x float> {{(splat \(float 0x3FD3333340000000\))|()}}, {{.*}}, <3 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 4, i32 512, {{.*}}, {{.*}}, i32 409, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, float 0x3FC99999A0000000, float 0x3FD3333340000000, {{.*}}, i32 2) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 5, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <2 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <2 x float> {{(splat \(float 0x3FD3333340000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 5, i32 0) @@ -54,11 +54,11 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 2, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 896, {{.*}}, {{.*}}, i32 409, float 0x3FB99999A0000000, float 0x3FC99999A0000000, float 0x3FD3333340000000, {{.*}}, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 409, <2 x float> , <2 x float> , <2 x float> , {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> , <3 x float> , <3 x float> , {{.*}}, <3 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 4, i32 512, {{.*}}, {{.*}}, i32 409, <2 x float> , float 0x3FC99999A0000000, float 0x3FD3333340000000, {{.*}}, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 5, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> , <2 x float> , <2 x float> , {{.*}}, <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 896, {{.*}}, {{.*}}, i32 409, float 0x3FB99999A0000000, float 0x3FC99999A0000000, float 0x3FD3333340000000, {{.*}}, i32 2) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 409, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <2 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <2 x float> {{(splat \(float 0x3FD3333340000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <3 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <3 x float> {{(splat \(float 0x3FD3333340000000\))|()}}, {{.*}}, <3 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 4, i32 512, {{.*}}, {{.*}}, i32 409, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, float 0x3FC99999A0000000, float 0x3FD3333340000000, {{.*}}, i32 2) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 5, i32 512, {{.*}}, {{.*}}, i32 409, <3 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <2 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <2 x float> {{(splat \(float 0x3FD3333340000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: load <8 x i32>, ptr addrspace(4) %{{.*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureOffsetClamp_lit.frag b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureOffsetClamp_lit.frag index 45c4eedda1..9b72a6da84 100644 --- a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureOffsetClamp_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureOffsetClamp_lit.frag @@ -42,11 +42,11 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 2, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 896, {{.*}}, {{.*}}, i32 385, float 0x3FB99999A0000000, {{.*}}, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 385, <2 x float> , {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 385, <3 x float> , {{.*}}, <3 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 4, i32 512, {{.*}}, {{.*}}, i32 385, <2 x float> , {{.*}}, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 5, i32 512, {{.*}}, {{.*}}, i32 385, <3 x float> , {{.*}}, <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 896, {{.*}}, {{.*}}, i32 385, float 0x3FB99999A0000000, {{.*}}, i32 2) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 385, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 385, <3 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, {{.*}}, <3 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 4, i32 512, {{.*}}, {{.*}}, i32 385, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, {{.*}}, i32 2) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 5, i32 512, {{.*}}, {{.*}}, i32 385, <3 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 5, i32 0) @@ -54,11 +54,11 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 2, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 896, {{.*}}, {{.*}}, i32 385, float 0x3FB99999A0000000, {{.*}}, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 385, <2 x float> , {{.*}}, <2 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 385, <3 x float> , {{.*}}, <3 x i32> ) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 4, i32 512, {{.*}}, {{.*}}, i32 385, <2 x float> , {{.*}}, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 5, i32 512, {{.*}}, {{.*}}, i32 385, <3 x float> , {{.*}}, <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 896, {{.*}}, {{.*}}, i32 385, float 0x3FB99999A0000000, {{.*}}, i32 2) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 385, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 2, i32 512, {{.*}}, {{.*}}, i32 385, <3 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, {{.*}}, <3 x i32> {{(splat \(i32 2\))|()}}) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 4, i32 512, {{.*}}, {{.*}}, i32 385, <2 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, {{.*}}, i32 2) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 5, i32 512, {{.*}}, {{.*}}, i32 385, <3 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, {{.*}}, <2 x i32> {{(splat \(i32 2\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: load <8 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureOffset_lit.frag b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureOffset_lit.frag index 2dbebcdfb2..68da7d1e4e 100644 --- a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureOffset_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTextureOffset_lit.frag @@ -25,13 +25,13 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 321, float 1.000000e+00, float 0x3FD99999A0000000, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 257, <2 x float> , <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 257, <2 x float> {{(splat \(float 5\.000000e\-01\))|()}}, <2 x i32> {{(splat \(i32 5\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 321, float 1.000000e+00, float 0x3FD99999A0000000, i32 2) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 257, <2 x float> , <2 x i32> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 257, <2 x float> {{(splat \(float 5\.000000e\-01\))|()}}, <2 x i32> {{(splat \(i32 5\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: load <4 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTexture_lit.frag b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTexture_lit.frag index 005016da61..4289ed2cfd 100644 --- a/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTexture_lit.frag +++ b/llpc/test/shaderdb/core/OpImageSampleImplicitLod_TestTexture_lit.frag @@ -26,13 +26,13 @@ void main() ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 65, float 1.000000e+00, float 0x3FD99999A0000000) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 1, <2 x float> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 1, <2 x float> {{(splat \(float 5\.000000e\-01\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 1, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 0, i32 512, {{.*}}, {{.*}}, i32 65, float 1.000000e+00, float 0x3FD99999A0000000) -; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 1, <2 x float> ) +; SHADERTEST: call {{.*}} @lgc.create.image.sample.v4f32(i32 1, i32 896, {{.*}}, {{.*}}, i32 1, <2 x float> {{(splat \(float 5\.000000e\-01\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: load <4 x i32>, ptr addrspace(4) %{{[0-9]*}} diff --git a/llpc/test/shaderdb/core/OpLogicalNotEqual_TestGeneral_lit.frag b/llpc/test/shaderdb/core/OpLogicalNotEqual_TestGeneral_lit.frag index 8f5321288a..4e349b7e9d 100644 --- a/llpc/test/shaderdb/core/OpLogicalNotEqual_TestGeneral_lit.frag +++ b/llpc/test/shaderdb/core/OpLogicalNotEqual_TestGeneral_lit.frag @@ -37,7 +37,7 @@ void main() // SHADERTEST-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(7) [[TMP6]], align 4 // SHADERTEST-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP2]], [[TMP7]] // SHADERTEST-NEXT: [[TMP9:%.*]] = and i1 [[TMP8]], [[TMP5]] -// SHADERTEST-NEXT: [[TMP10:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP9]], <4 x float> zeroinitializer, <4 x float> +// SHADERTEST-NEXT: [[TMP10:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP9]], <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} // SHADERTEST-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP10]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // SHADERTEST-NEXT: ret void // diff --git a/llpc/test/shaderdb/core/OpSLessThanEqual_TestSignedAndUnsigned_lit.frag b/llpc/test/shaderdb/core/OpSLessThanEqual_TestSignedAndUnsigned_lit.frag index 21dfa067ef..234befc7b1 100644 --- a/llpc/test/shaderdb/core/OpSLessThanEqual_TestSignedAndUnsigned_lit.frag +++ b/llpc/test/shaderdb/core/OpSLessThanEqual_TestSignedAndUnsigned_lit.frag @@ -30,7 +30,7 @@ void main() // SHADERTEST-NEXT: [[TMP5:%.*]] = extractelement <2 x i32> [[TMP2]], i64 0 // SHADERTEST-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[TMP4]], i64 0 // SHADERTEST-NEXT: [[DOTNOT:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] -// SHADERTEST-NEXT: [[TMP7:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[DOTNOT]], <4 x float> , <4 x float> +// SHADERTEST-NEXT: [[TMP7:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[DOTNOT]], <4 x float> {{(splat \(float 5\.000000e\-01\))|()}}, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} // SHADERTEST-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP7]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // SHADERTEST-NEXT: ret void // diff --git a/llpc/test/shaderdb/core/OpSLessThan_TestSignedAndUnsigned_lit.frag b/llpc/test/shaderdb/core/OpSLessThan_TestSignedAndUnsigned_lit.frag index 357603eba2..19462f89ea 100644 --- a/llpc/test/shaderdb/core/OpSLessThan_TestSignedAndUnsigned_lit.frag +++ b/llpc/test/shaderdb/core/OpSLessThan_TestSignedAndUnsigned_lit.frag @@ -30,7 +30,7 @@ void main() // SHADERTEST-NEXT: [[TMP5:%.*]] = extractelement <2 x i32> [[TMP2]], i64 0 // SHADERTEST-NEXT: [[TMP6:%.*]] = extractelement <2 x i32> [[TMP4]], i64 0 // SHADERTEST-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP5]], [[TMP6]] -// SHADERTEST-NEXT: [[TMP8:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP7]], <4 x float> , <4 x float> +// SHADERTEST-NEXT: [[TMP8:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP7]], <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <4 x float> {{(splat \(float 5\.000000e\-01\))|()}} // SHADERTEST-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP8]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // SHADERTEST-NEXT: ret void // diff --git a/llpc/test/shaderdb/core/OpUndef_TestUndefImage_lit.spvasm b/llpc/test/shaderdb/core/OpUndef_TestUndefImage_lit.spvasm index 13da05843f..bda0faf484 100644 --- a/llpc/test/shaderdb/core/OpUndef_TestUndefImage_lit.spvasm +++ b/llpc/test/shaderdb/core/OpUndef_TestUndefImage_lit.spvasm @@ -3,7 +3,7 @@ ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4{{.*}}(i32 2, i32 2, i64 0, i32 1) -; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 1, <2 x float> ) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 512, {{.*}}, {{.*}}, i32 1, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}) ; SHADERTEST: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/core/OpVectorShuffle_TestDvec_lit.frag b/llpc/test/shaderdb/core/OpVectorShuffle_TestDvec_lit.frag index 0ffea36feb..fee3741f37 100644 --- a/llpc/test/shaderdb/core/OpVectorShuffle_TestDvec_lit.frag +++ b/llpc/test/shaderdb/core/OpVectorShuffle_TestDvec_lit.frag @@ -41,7 +41,7 @@ void main() // SHADERTEST-NEXT: [[TMP9:%.*]] = or i1 [[TMP4]], [[TMP6]] // SHADERTEST-NEXT: [[TMP10:%.*]] = or i1 [[TMP9]], [[TMP8]] // SHADERTEST-NEXT: [[COND_FREEZE:%.*]] = freeze i1 [[TMP10]] -// SHADERTEST-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[COND_FREEZE]], <4 x float> , <4 x float> +// SHADERTEST-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[COND_FREEZE]], <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <4 x float> {{(splat \(float 5\.000000e\-01\))|()}} // SHADERTEST-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[SPEC_SELECT]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // SHADERTEST-NEXT: ret void // diff --git a/llpc/test/shaderdb/core/OpVectorTimesScalar_TestVec3xConstFloat_lit.frag b/llpc/test/shaderdb/core/OpVectorTimesScalar_TestVec3xConstFloat_lit.frag index faa15d7e3b..ca585f5f54 100644 --- a/llpc/test/shaderdb/core/OpVectorTimesScalar_TestVec3xConstFloat_lit.frag +++ b/llpc/test/shaderdb/core/OpVectorTimesScalar_TestVec3xConstFloat_lit.frag @@ -18,7 +18,7 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{.*}} = fmul reassoc nnan nsz arcp contract afn <3 x float> %{{.*}}, +; SHADERTEST: %{{.*}} = fmul reassoc nnan nsz arcp contract afn <3 x float> %{{.*}}, {{(splat \(float 1\.000000e\+00\))|()}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/core/TestEnableImplicitInvariantExports.vert b/llpc/test/shaderdb/core/TestEnableImplicitInvariantExports.vert index 0c83b70f46..60c5e7f1c8 100644 --- a/llpc/test/shaderdb/core/TestEnableImplicitInvariantExports.vert +++ b/llpc/test/shaderdb/core/TestEnableImplicitInvariantExports.vert @@ -22,8 +22,8 @@ void main() ; RUN: amdllpc -v --enable-implicit-invariant-exports=1 %gfxip %s | FileCheck -check-prefix=WITHOUT_IIE %s ; WITHOUT_IIE-LABEL: {{^// LLPC}} pipeline before-patching results ; WITHOUT_IIE: %[[val:.*]] = extractvalue [4 x <4 x float>] %{{.*}}, 3 -; WITHOUT_IIE: %[[mul:.*]] = fmul nnan nsz <4 x float> %[[val]], %{{.*}} -; WITHOUT_IIE: %[[arg:.*]] = fadd nnan nsz <4 x float> %{{.*}}, %[[mul]] +; WITHOUT_IIE: %[[mul:.*]] = fmul nnan nsz afn <4 x float> %[[val]], %{{.*}} +; WITHOUT_IIE: %[[arg:.*]] = fadd nnan nsz afn <4 x float> %{{.*}}, %[[mul]] ; WITHOUT_IIE-NEXT: call void @lgc.output.export.builtin.Position.i32.v4f32(i32 0, <4 x float> %[[arg]]) ; WITHOUT_IIE: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/core/TestXfbStateMetadata.vert b/llpc/test/shaderdb/core/TestXfbStateMetadata.vert index d30af81417..26a9197000 100644 --- a/llpc/test/shaderdb/core/TestXfbStateMetadata.vert +++ b/llpc/test/shaderdb/core/TestXfbStateMetadata.vert @@ -20,8 +20,8 @@ void main() // CHECK-LABEL: define {{[^@]+}}@lgc.shader.VS.main // CHECK-SAME: () local_unnamed_addr #[[ATTR0:[0-9]+]] !spirv.ExecutionModel !10 !lgc.shaderstage !1 !lgc.xfb.state !11 { // CHECK-NEXT: .entry: -// CHECK-NEXT: [[TMP0:%.*]] = call float (...) @lgc.create.read.generic.input.f32(i32 1, i32 0, i32 0, i32 0, i32 0, i32 poison) -// CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> (...) @lgc.create.read.generic.input.v4f32(i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) +// CHECK-NEXT: [[TMP0:%.*]] = call float @lgc.load.vertex.input__f32(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 poison, i32 poison) +// CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> @lgc.load.vertex.input__v4f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 poison, i32 poison) // CHECK-NEXT: call void (...) @lgc.create.write.builtin.output(<4 x float> [[TMP1]], i32 0, i32 0, i32 poison, i32 poison) // CHECK-NEXT: call void (...) @lgc.create.write.xfb.output(float [[TMP0]], i1 true, i32 1, i32 0, i32 4, i32 0, i32 0) // CHECK-NEXT: call void (...) @lgc.create.write.builtin.output(float [[TMP0]], i32 1, i32 0, i32 poison, i32 poison) @@ -29,8 +29,6 @@ void main() // //. // CHECK: attributes #[[ATTR0]] = { alwaysinline nounwind "denormal-fp-math-f32"="preserve-sign" } -// CHECK: attributes #[[ATTR1:[0-9]+]] = { nounwind willreturn memory(read) } -// CHECK: attributes #[[ATTR2:[0-9]+]] = {{{.*}} nounwind } +// CHECK: attributes #[[ATTR1:[0-9]+]] = { nounwind willreturn memory(none) } +// CHECK: attributes #[[ATTR2:[0-9]+]] = { nodivergencesource nounwind } //. -// CHECK: [[META0:![0-9]+]] = !{!"Vulkan"} -// CHECK: [[META1:![0-9]+]] = !{i32 1} diff --git a/llpc/test/shaderdb/debug_info/PipelineGsTess_TestVsTesGsMergeShader.pipe b/llpc/test/shaderdb/debug_info/PipelineGsTess_TestVsTesGsMergeShader.pipe index 444dca1613..0fd9d59bef 100644 --- a/llpc/test/shaderdb/debug_info/PipelineGsTess_TestVsTesGsMergeShader.pipe +++ b/llpc/test/shaderdb/debug_info/PipelineGsTess_TestVsTesGsMergeShader.pipe @@ -748,52 +748,50 @@ attribute[2].offset = 0 ; SHADERTEST-NEXT: [[TMP17:%.*]] = and i32 [[TMP16]], 31 ; SHADERTEST-NEXT: [[DOTIDX:%.*]] = mul nuw nsw i32 [[TMP15]], 24, !dbg [[DBG111:![0-9]+]] ; SHADERTEST-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(3) @Lds.HS, i32 [[DOTIDX]], !dbg [[DBG111]] -; SHADERTEST-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP18]], i32 3072, !dbg [[DBG111]] -; SHADERTEST-NEXT: store i32 1073741824, ptr addrspace(3) [[TMP19]], align 4, !dbg [[DBG111]] -; SHADERTEST-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP18]], i32 3076, !dbg [[DBG112:![0-9]+]] -; SHADERTEST-NEXT: store i32 1073741824, ptr addrspace(3) [[TMP20]], align 4, !dbg [[DBG112]] -; SHADERTEST-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP18]], i32 3080, !dbg [[DBG113:![0-9]+]] -; SHADERTEST-NEXT: store i32 1073741824, ptr addrspace(3) [[TMP21]], align 4, !dbg [[DBG113]] -; SHADERTEST-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP18]], i32 3088, !dbg [[DBG114:![0-9]+]] -; SHADERTEST-NEXT: store i32 1082130432, ptr addrspace(3) [[TMP22]], align 4, !dbg [[DBG114]] -; SHADERTEST-NEXT: [[TMP23:%.*]] = mul nuw nsw i32 [[TMP15]], 3, !dbg [[DBG115:![0-9]+]] -; SHADERTEST-NEXT: [[TMP24:%.*]] = add nuw nsw i32 [[TMP23]], [[TMP17]], !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP25:%.*]] = shl nuw nsw i32 [[TMP24]], 2, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP26:%.*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 [[TMP25]], !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(3) [[TMP26]], align 4, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP28:%.*]] = or disjoint i32 [[TMP25]], 1, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP29:%.*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 [[TMP28]], !dbg [[DBG115]] +; SHADERTEST-NEXT: store i32 1073741824, ptr addrspace(3) [[TMP18]], align 4, !dbg [[DBG111]] +; SHADERTEST-NEXT: [[TMP19:%.*]] = mul nuw nsw i32 [[TMP15]], 6, !dbg [[DBG112:![0-9]+]] +; SHADERTEST-NEXT: [[TMP20:%.*]] = or disjoint i32 [[TMP19]], 1, !dbg [[DBG112]] +; SHADERTEST-NEXT: [[TMP21:%.*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 [[TMP20]], !dbg [[DBG112]] +; SHADERTEST-NEXT: store i32 1073741824, ptr addrspace(3) [[TMP21]], align 4, !dbg [[DBG112]] +; SHADERTEST-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP18]], i32 8, !dbg [[DBG113:![0-9]+]] +; SHADERTEST-NEXT: store i32 1073741824, ptr addrspace(3) [[TMP22]], align 4, !dbg [[DBG113]] +; SHADERTEST-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP18]], i32 16, !dbg [[DBG114:![0-9]+]] +; SHADERTEST-NEXT: store i32 1082130432, ptr addrspace(3) [[TMP23]], align 4, !dbg [[DBG114]] +; SHADERTEST-NEXT: [[TMP24:%.*]] = mul nuw nsw i32 [[TMP15]], 3, !dbg [[DBG115:![0-9]+]] +; SHADERTEST-NEXT: [[TMP25:%.*]] = add nuw nsw i32 [[TMP24]], [[TMP17]], !dbg [[DBG115]] +; SHADERTEST-NEXT: [[DOTIDX3:%.*]] = shl nuw nsw i32 [[TMP25]], 4, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(3) @Lds.HS, i32 [[DOTIDX3]], !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP26]], i32 1536, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP28:%.*]] = load i32, ptr addrspace(3) [[TMP27]], align 4, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP26]], i32 1540, !dbg [[DBG115]] ; SHADERTEST-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(3) [[TMP29]], align 4, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP31:%.*]] = or disjoint i32 [[TMP25]], 2, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP32:%.*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 [[TMP31]], !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(3) [[TMP32]], align 4, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP34:%.*]] = or disjoint i32 [[TMP25]], 3, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP35:%.*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 [[TMP34]], !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(3) [[TMP35]], align 4, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP37:%.*]] = shl nuw nsw i32 [[TMP17]], 4, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP38:%.*]] = mul nuw nsw i32 [[TMP15]], 48, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP39:%.*]] = add nuw nsw i32 [[TMP37]], [[TMP38]], !dbg [[DBG115]] -; SHADERTEST-NEXT: [[DOTUPTO010:%.*]] = insertelement <4 x i32> poison, i32 [[TMP27]], i64 0, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP26]], i32 1544, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP32:%.*]] = load i32, ptr addrspace(3) [[TMP31]], align 4, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP26]], i32 1548, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP34:%.*]] = load i32, ptr addrspace(3) [[TMP33]], align 4, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP35:%.*]] = shl nuw nsw i32 [[TMP17]], 4, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP36:%.*]] = mul nuw nsw i32 [[TMP15]], 48, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP37:%.*]] = add nuw nsw i32 [[TMP35]], [[TMP36]], !dbg [[DBG115]] +; SHADERTEST-NEXT: [[DOTUPTO010:%.*]] = insertelement <4 x i32> poison, i32 [[TMP28]], i64 0, !dbg [[DBG115]] ; SHADERTEST-NEXT: [[DOTUPTO111:%.*]] = insertelement <4 x i32> [[DOTUPTO010]], i32 [[TMP30]], i64 1, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[DOTUPTO212:%.*]] = insertelement <4 x i32> [[DOTUPTO111]], i32 [[TMP33]], i64 2, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP40:%.*]] = insertelement <4 x i32> [[DOTUPTO212]], i32 [[TMP36]], i64 3, !dbg [[DBG115]] -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.v4i32(<4 x i32> [[TMP40]], <4 x i32> [[TMP14]], i32 [[TMP39]], i32 [[OFFCHIPLDSBASE:%.*]], i32 immarg 77, i32 immarg 1) #[[ATTR12:[0-9]+]], !dbg [[DBG115]] +; SHADERTEST-NEXT: [[DOTUPTO212:%.*]] = insertelement <4 x i32> [[DOTUPTO111]], i32 [[TMP32]], i64 2, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP38:%.*]] = insertelement <4 x i32> [[DOTUPTO212]], i32 [[TMP34]], i64 3, !dbg [[DBG115]] +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> [[TMP38]], <4 x i32> [[TMP14]], i32 [[TMP37]], i32 [[OFFCHIPLDSBASE:%.*]], i32 immarg 77, i32 immarg 1) #[[ATTR12:[0-9]+]], !dbg [[DBG115]] ; SHADERTEST-NEXT: fence syncscope("workgroup") release, !dbg [[DBG115]] ; SHADERTEST-NEXT: call void @llvm.amdgcn.s.barrier(), !dbg [[DBG115]] ; SHADERTEST-NEXT: fence syncscope("workgroup") acquire, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP41:%.*]] = mul i32 [[TMP0]], 6, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP42:%.*]] = add i32 [[TMP41]], 768, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP43:%.*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 [[TMP42]], !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP44:%.*]] = load <3 x float>, ptr addrspace(3) [[TMP43]], align 4, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP45:%.*]] = mul i32 [[TMP0]], 6, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP46:%.*]] = add i32 [[TMP45]], 772, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP47:%.*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 [[TMP46]], !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP48:%.*]] = load <1 x float>, ptr addrspace(3) [[TMP47]], align 4, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP49:%.*]] = mul i32 [[TMP0]], 16, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP50:%.*]] = shufflevector <3 x float> [[TMP44]], <3 x float> poison, <4 x i32> , !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP51:%.*]] = extractelement <1 x float> [[TMP48]], i64 0, !dbg [[DBG115]] -; SHADERTEST-NEXT: [[TMP52:%.*]] = insertelement <4 x float> [[TMP50]], float [[TMP51]], i64 3, !dbg [[DBG115]] -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.v4f32(<4 x float> [[TMP52]], <4 x i32> [[TMP7]], i32 [[TMP49]], i32 [[TFBUFFERBASE:%.*]], i32 77, i32 1), !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP39:%.*]] = mul i32 [[TMP0]], 6, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP40:%.*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 [[TMP39]], !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP41:%.*]] = load <3 x float>, ptr addrspace(3) [[TMP40]], align 4, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP42:%.*]] = mul i32 [[TMP0]], 6, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP43:%.*]] = add i32 [[TMP42]], 4, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP44:%.*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 [[TMP43]], !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP45:%.*]] = load <1 x float>, ptr addrspace(3) [[TMP44]], align 4, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP46:%.*]] = mul i32 [[TMP0]], 16, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP47:%.*]] = shufflevector <3 x float> [[TMP41]], <3 x float> poison, <4 x i32> , !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP48:%.*]] = extractelement <1 x float> [[TMP45]], i64 0, !dbg [[DBG115]] +; SHADERTEST-NEXT: [[TMP49:%.*]] = insertelement <4 x float> [[TMP47]], float [[TMP48]], i64 3, !dbg [[DBG115]] +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.v4f32{{(\.v4i32)?}}(<4 x float> [[TMP49]], <4 x i32> [[TMP7]], i32 [[TMP46]], i32 [[TFBUFFERBASE:%.*]], i32 77, i32 1), !dbg [[DBG115]] ; SHADERTEST-NEXT: ret void, !dbg [[DBG115]] ; ; @@ -814,7 +812,7 @@ attribute[2].offset = 0 ; SHADERTEST-NEXT: #dbg_value(float [[TESSCOORDY]], !119, !DIExpression(), !122) ; SHADERTEST-NEXT: #dbg_value(float [[TMP1]], !120, !DIExpression(), !122) ; SHADERTEST-NEXT: [[TMP11:%.*]] = mul i32 [[RELPATCHID:%.*]], 48, !dbg [[DBG121]] -; SHADERTEST-NEXT: [[TMP12:%.*]] = call <4 x i32> @llvm.amdgcn.raw.tbuffer.load.v4i32(<4 x i32> [[TMP8]], i32 [[TMP11]], i32 [[OFFCHIPLDSBASE:%.*]], i32 immarg 77, i32 immarg 5) #[[ATTR8:[0-9]+]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[TMP12:%.*]] = call <4 x i32> @llvm.amdgcn.raw.tbuffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> [[TMP8]], i32 [[TMP11]], i32 [[OFFCHIPLDSBASE:%.*]], i32 immarg 77, i32 immarg 5) #[[ATTR8:[0-9]+]], !dbg [[DBG121]] ; SHADERTEST-NEXT: [[BC:%.*]] = bitcast <4 x i32> [[TMP12]] to <4 x float>, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[DOTI07:%.*]] = extractelement <4 x float> [[BC]], i64 0, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[BC56:%.*]] = bitcast <4 x i32> [[TMP12]] to <4 x float>, !dbg [[DBG121]] @@ -823,12 +821,12 @@ attribute[2].offset = 0 ; SHADERTEST-NEXT: [[DOTI29:%.*]] = extractelement <4 x float> [[BC57]], i64 2, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[BC58:%.*]] = bitcast <4 x i32> [[TMP12]] to <4 x float>, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[DOTI310:%.*]] = extractelement <4 x float> [[BC58]], i64 3, !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE_I0:%.*]] = fmul nnan nsz float [[TESSCOORDX]], [[DOTI07]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE_I1:%.*]] = fmul nnan nsz float [[TESSCOORDX]], [[DOTI18]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE_I2:%.*]] = fmul nnan nsz float [[TESSCOORDX]], [[DOTI29]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE_I3:%.*]] = fmul nnan nsz float [[TESSCOORDX]], [[DOTI310]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE_I0:%.*]] = fmul nnan nsz afn float [[TESSCOORDX]], [[DOTI07]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE_I1:%.*]] = fmul nnan nsz afn float [[TESSCOORDX]], [[DOTI18]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE_I2:%.*]] = fmul nnan nsz afn float [[TESSCOORDX]], [[DOTI29]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE_I3:%.*]] = fmul nnan nsz afn float [[TESSCOORDX]], [[DOTI310]], !dbg [[DBG121]] ; SHADERTEST-NEXT: [[TMP13:%.*]] = add i32 [[TMP11]], 16, !dbg [[DBG121]] -; SHADERTEST-NEXT: [[TMP14:%.*]] = call <4 x i32> @llvm.amdgcn.raw.tbuffer.load.v4i32(<4 x i32> [[TMP8]], i32 [[TMP13]], i32 [[OFFCHIPLDSBASE]], i32 immarg 77, i32 immarg 5) #[[ATTR8]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[TMP14:%.*]] = call <4 x i32> @llvm.amdgcn.raw.tbuffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> [[TMP8]], i32 [[TMP13]], i32 [[OFFCHIPLDSBASE]], i32 immarg 77, i32 immarg 5) #[[ATTR8]], !dbg [[DBG121]] ; SHADERTEST-NEXT: [[BC59:%.*]] = bitcast <4 x i32> [[TMP14]] to <4 x float>, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[DOTI012:%.*]] = extractelement <4 x float> [[BC59]], i64 0, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[BC60:%.*]] = bitcast <4 x i32> [[TMP14]] to <4 x float>, !dbg [[DBG121]] @@ -837,16 +835,16 @@ attribute[2].offset = 0 ; SHADERTEST-NEXT: [[DOTI216:%.*]] = extractelement <4 x float> [[BC61]], i64 2, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[BC62:%.*]] = bitcast <4 x i32> [[TMP14]] to <4 x float>, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[DOTI318:%.*]] = extractelement <4 x float> [[BC62]], i64 3, !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE2_I0:%.*]] = fmul nnan nsz float [[TESSCOORDY]], [[DOTI012]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE2_I1:%.*]] = fmul nnan nsz float [[TESSCOORDY]], [[DOTI114]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE2_I2:%.*]] = fmul nnan nsz float [[TESSCOORDY]], [[DOTI216]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE2_I3:%.*]] = fmul nnan nsz float [[TESSCOORDY]], [[DOTI318]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[DOTI019:%.*]] = fadd nnan nsz float [[SCALE_I0]], [[SCALE2_I0]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[DOTI120:%.*]] = fadd nnan nsz float [[SCALE_I1]], [[SCALE2_I1]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[DOTI221:%.*]] = fadd nnan nsz float [[SCALE_I2]], [[SCALE2_I2]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[DOTI322:%.*]] = fadd nnan nsz float [[SCALE_I3]], [[SCALE2_I3]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE2_I0:%.*]] = fmul nnan nsz afn float [[TESSCOORDY]], [[DOTI012]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE2_I1:%.*]] = fmul nnan nsz afn float [[TESSCOORDY]], [[DOTI114]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE2_I2:%.*]] = fmul nnan nsz afn float [[TESSCOORDY]], [[DOTI216]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE2_I3:%.*]] = fmul nnan nsz afn float [[TESSCOORDY]], [[DOTI318]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[DOTI019:%.*]] = fadd nnan nsz afn float [[SCALE_I0]], [[SCALE2_I0]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[DOTI120:%.*]] = fadd nnan nsz afn float [[SCALE_I1]], [[SCALE2_I1]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[DOTI221:%.*]] = fadd nnan nsz afn float [[SCALE_I2]], [[SCALE2_I2]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[DOTI322:%.*]] = fadd nnan nsz afn float [[SCALE_I3]], [[SCALE2_I3]], !dbg [[DBG121]] ; SHADERTEST-NEXT: [[TMP15:%.*]] = add i32 [[TMP11]], 32, !dbg [[DBG121]] -; SHADERTEST-NEXT: [[TMP16:%.*]] = call <4 x i32> @llvm.amdgcn.raw.tbuffer.load.v4i32(<4 x i32> [[TMP8]], i32 [[TMP15]], i32 [[OFFCHIPLDSBASE]], i32 immarg 77, i32 immarg 5) #[[ATTR8]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[TMP16:%.*]] = call <4 x i32> @llvm.amdgcn.raw.tbuffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> [[TMP8]], i32 [[TMP15]], i32 [[OFFCHIPLDSBASE]], i32 immarg 77, i32 immarg 5) #[[ATTR8]], !dbg [[DBG121]] ; SHADERTEST-NEXT: [[BC63:%.*]] = bitcast <4 x i32> [[TMP16]] to <4 x float>, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[DOTI024:%.*]] = extractelement <4 x float> [[BC63]], i64 0, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[BC64:%.*]] = bitcast <4 x i32> [[TMP16]] to <4 x float>, !dbg [[DBG121]] @@ -855,14 +853,14 @@ attribute[2].offset = 0 ; SHADERTEST-NEXT: [[DOTI228:%.*]] = extractelement <4 x float> [[BC65]], i64 2, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[BC66:%.*]] = bitcast <4 x i32> [[TMP16]] to <4 x float>, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[DOTI330:%.*]] = extractelement <4 x float> [[BC66]], i64 3, !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE4_I0:%.*]] = fmul nnan nsz float [[TMP1]], [[DOTI024]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE4_I1:%.*]] = fmul nnan nsz float [[TMP1]], [[DOTI126]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE4_I2:%.*]] = fmul nnan nsz float [[TMP1]], [[DOTI228]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[SCALE4_I3:%.*]] = fmul nnan nsz float [[TMP1]], [[DOTI330]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[DOTI031:%.*]] = fadd nnan nsz float [[DOTI019]], [[SCALE4_I0]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[DOTI132:%.*]] = fadd nnan nsz float [[DOTI120]], [[SCALE4_I1]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[DOTI233:%.*]] = fadd nnan nsz float [[DOTI221]], [[SCALE4_I2]], !dbg [[DBG121]] -; SHADERTEST-NEXT: [[DOTI334:%.*]] = fadd nnan nsz float [[DOTI322]], [[SCALE4_I3]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE4_I0:%.*]] = fmul nnan nsz afn float [[TMP1]], [[DOTI024]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE4_I1:%.*]] = fmul nnan nsz afn float [[TMP1]], [[DOTI126]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE4_I2:%.*]] = fmul nnan nsz afn float [[TMP1]], [[DOTI228]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[SCALE4_I3:%.*]] = fmul nnan nsz afn float [[TMP1]], [[DOTI330]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[DOTI031:%.*]] = fadd nnan nsz afn float [[DOTI019]], [[SCALE4_I0]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[DOTI132:%.*]] = fadd nnan nsz afn float [[DOTI120]], [[SCALE4_I1]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[DOTI233:%.*]] = fadd nnan nsz afn float [[DOTI221]], [[SCALE4_I2]], !dbg [[DBG121]] +; SHADERTEST-NEXT: [[DOTI334:%.*]] = fadd nnan nsz afn float [[DOTI322]], [[SCALE4_I3]], !dbg [[DBG121]] ; SHADERTEST-NEXT: [[DOTIDX:%.*]] = mul i32 [[TMP10]], 20, !dbg [[DBG121]] ; SHADERTEST-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(3) @Lds.GS, i32 [[DOTIDX]], !dbg [[DBG121]] ; SHADERTEST-NEXT: [[TMP18:%.*]] = getelementptr i32, ptr addrspace(3) [[TMP17]], i32 [[ESGSOFFSET:%.*]], !dbg [[DBG121]] @@ -921,22 +919,22 @@ attribute[2].offset = 0 ; SHADERTEST-NEXT: [[TMP34:%.*]] = or disjoint i32 [[TMP33]], 131072 ; SHADERTEST-NEXT: [[TMP35:%.*]] = insertelement <4 x i32> [[DOTUPTO210]], i32 [[TMP34]], i64 3 ; SHADERTEST-NEXT: #dbg_value(i32 0, !125, !DIExpression(), !128) -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP23]], <4 x i32> [[TMP35]], i32 0, i32 [[GSVSOFFSET:%.*]], i32 20, i32 11), !dbg !{{[0-9]+}} -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP22]], <4 x i32> [[TMP35]], i32 12, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP20]], <4 x i32> [[TMP35]], i32 24, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP18]], <4 x i32> [[TMP35]], i32 36, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP23]], <4 x i32> [[TMP35]], i32 0, i32 [[GSVSOFFSET:%.*]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP22]], <4 x i32> [[TMP35]], i32 12, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP20]], <4 x i32> [[TMP35]], i32 24, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP18]], <4 x i32> [[TMP35]], i32 36, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} ; SHADERTEST-NEXT: call void @llvm.amdgcn.s.sendmsg(i32 34, i32 [[GSWAVEID:%.*]]), !dbg !{{[0-9]+}} ; SHADERTEST-NEXT: #dbg_value(i32 1, !125, !DIExpression(), !128) -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP15]], <4 x i32> [[TMP35]], i32 4, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP14]], <4 x i32> [[TMP35]], i32 16, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP12]], <4 x i32> [[TMP35]], i32 28, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP10]], <4 x i32> [[TMP35]], i32 40, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP15]], <4 x i32> [[TMP35]], i32 4, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP14]], <4 x i32> [[TMP35]], i32 16, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP12]], <4 x i32> [[TMP35]], i32 28, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP10]], <4 x i32> [[TMP35]], i32 40, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} ; SHADERTEST-NEXT: call void @llvm.amdgcn.s.sendmsg(i32 34, i32 [[GSWAVEID]]), !dbg !{{[0-9]+}} ; SHADERTEST-NEXT: #dbg_value(i32 2, !125, !DIExpression(), !128) -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP7]], <4 x i32> [[TMP35]], i32 8, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP6]], <4 x i32> [[TMP35]], i32 20, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP4]], <4 x i32> [[TMP35]], i32 32, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32(i32 [[TMP2]], <4 x i32> [[TMP35]], i32 44, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP7]], <4 x i32> [[TMP35]], i32 8, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP6]], <4 x i32> [[TMP35]], i32 20, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP4]], <4 x i32> [[TMP35]], i32 32, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.i32{{(\.v4i32)?}}(i32 [[TMP2]], <4 x i32> [[TMP35]], i32 44, i32 [[GSVSOFFSET]], i32 20, i32 11), !dbg !{{[0-9]+}} ; SHADERTEST-NEXT: call void @llvm.amdgcn.s.sendmsg(i32 34, i32 [[GSWAVEID]]), !dbg !{{[0-9]+}} ; SHADERTEST-NEXT: #dbg_value(i32 3, !125, !DIExpression(), !128) ; SHADERTEST-NEXT: call void @llvm.amdgcn.s.sendmsg(i32 18, i32 [[GSWAVEID]]), !dbg !{{[0-9]+}} @@ -954,13 +952,13 @@ attribute[2].offset = 0 ; SHADERTEST-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP5]], i64 128 ; SHADERTEST-NEXT: [[TMP7:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP6]], align 16, !invariant.load !98 ; SHADERTEST-NEXT: [[TMP8:%.*]] = shl i32 [[VERTEXOFFSET:%.*]], 2 -; SHADERTEST-NEXT: [[TMP9:%.*]] = call float @llvm.amdgcn.raw.buffer.load.f32(<4 x i32> [[TMP7]], i32 [[TMP8]], i32 0, i32 3), !invariant.load !98 +; SHADERTEST-NEXT: [[TMP9:%.*]] = call float @llvm.amdgcn.raw.buffer.load.f32{{(\.v4i32)?}}(<4 x i32> [[TMP7]], i32 [[TMP8]], i32 0, i32 3), !invariant.load !98 ; SHADERTEST-NEXT: [[TMP10:%.*]] = add i32 [[TMP8]], 192 -; SHADERTEST-NEXT: [[TMP11:%.*]] = call float @llvm.amdgcn.raw.buffer.load.f32(<4 x i32> [[TMP7]], i32 [[TMP10]], i32 0, i32 3), !invariant.load !98 +; SHADERTEST-NEXT: [[TMP11:%.*]] = call float @llvm.amdgcn.raw.buffer.load.f32{{(\.v4i32)?}}(<4 x i32> [[TMP7]], i32 [[TMP10]], i32 0, i32 3), !invariant.load !98 ; SHADERTEST-NEXT: [[TMP12:%.*]] = add i32 [[TMP8]], 384 -; SHADERTEST-NEXT: [[TMP13:%.*]] = call float @llvm.amdgcn.raw.buffer.load.f32(<4 x i32> [[TMP7]], i32 [[TMP12]], i32 0, i32 3), !invariant.load !98 +; SHADERTEST-NEXT: [[TMP13:%.*]] = call float @llvm.amdgcn.raw.buffer.load.f32{{(\.v4i32)?}}(<4 x i32> [[TMP7]], i32 [[TMP12]], i32 0, i32 3), !invariant.load !98 ; SHADERTEST-NEXT: [[TMP14:%.*]] = add i32 [[TMP8]], 576 -; SHADERTEST-NEXT: [[TMP15:%.*]] = call float @llvm.amdgcn.raw.buffer.load.f32(<4 x i32> [[TMP7]], i32 [[TMP14]], i32 0, i32 3), !invariant.load !98 +; SHADERTEST-NEXT: [[TMP15:%.*]] = call float @llvm.amdgcn.raw.buffer.load.f32{{(\.v4i32)?}}(<4 x i32> [[TMP7]], i32 [[TMP14]], i32 0, i32 3), !invariant.load !98 ; SHADERTEST-NEXT: call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float [[TMP9]], float [[TMP11]], float [[TMP13]], float [[TMP15]], i1 true, i1 false) ; SHADERTEST-NEXT: ret void ; diff --git a/llpc/test/shaderdb/extensions/Ext16bitStorage_TestVsInput_lit.vert b/llpc/test/shaderdb/extensions/Ext16bitStorage_TestVsInput_lit.vert index 8fe19a4896..0cd181799b 100644 --- a/llpc/test/shaderdb/extensions/Ext16bitStorage_TestVsInput_lit.vert +++ b/llpc/test/shaderdb/extensions/Ext16bitStorage_TestVsInput_lit.vert @@ -24,10 +24,10 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST-DAG: call i16 @lgc.input.import.generic__i16{{.*}} -; SHADERTEST-DAG: call <3 x i16> @lgc.input.import.generic__v3i16{{.*}} -; SHADERTEST-DAG: call half @lgc.input.import.generic__f16{{.*}} -; SHADERTEST-DAG: call <3 x half> @lgc.input.import.generic__v3f16{{.*}} +; SHADERTEST-DAG: call i16 @lgc.load.vertex.input__i16{{.*}} +; SHADERTEST-DAG: call <3 x i16> @lgc.load.vertex.input__v3i16{{.*}} +; SHADERTEST-DAG: call half @lgc.load.vertex.input__f16{{.*}} +; SHADERTEST-DAG: call <3 x half> @lgc.load.vertex.input__v3f16{{.*}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/ExtExplicitVertexParam_TestInterpFunc_lit.frag b/llpc/test/shaderdb/extensions/ExtExplicitVertexParam_TestInterpFunc_lit.frag index 891ee11c98..0fb4bc6e10 100644 --- a/llpc/test/shaderdb/extensions/ExtExplicitVertexParam_TestInterpFunc_lit.frag +++ b/llpc/test/shaderdb/extensions/ExtExplicitVertexParam_TestInterpFunc_lit.frag @@ -18,11 +18,11 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: call {{.*}} <2 x float> @InterpolateAtVertexAMD.v2f32.p64.i32 -; SHADERTEST: call {{.*}} <2 x i32> @InterpolateAtVertexAMD.v2i32.p64.i32 +; SHADERTEST: call reassoc nnan nsz arcp contract afn <2 x float> @InterpolateAtVertexAMD.v2f32.p64.i32 +; SHADERTEST: call <2 x i32> @InterpolateAtVertexAMD.v2i32.p64.i32 ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: call <2 x float> (...) @lgc.input.import.interpolated__v2f32{{.*}} -; SHADERTEST: call <2 x i32> (...) @lgc.input.import.interpolated__v2i32{{.*}} +; SHADERTEST: call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.read.generic.input.v2f32{{.*}} +; SHADERTEST: call <2 x i32> (...) @lgc.create.read.generic.input.v2i32{{.*}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestAngleTrigFuncs_lit.frag b/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestAngleTrigFuncs_lit.frag index 8eead181b0..64016478cb 100644 --- a/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestAngleTrigFuncs_lit.frag +++ b/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestAngleTrigFuncs_lit.frag @@ -36,8 +36,8 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <3 x half> %{{.*}}, -; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <3 x half> %{{.*}}, +; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <3 x half> %{{.*}}, {{(splat \(half 0xH2478\))|()}} +; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <3 x half> %{{.*}}, {{(splat \(half 0xH5329\))|()}} ; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x half> @llvm.sin.v3f16( ; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x half> @llvm.cos.v3f16( ; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x half> (...) @lgc.create.tan.v3f16(<3 x half> diff --git a/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestArithmeticOp_lit.frag b/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestArithmeticOp_lit.frag index 7f5cc54ea2..4f57a44a33 100644 --- a/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestArithmeticOp_lit.frag +++ b/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestArithmeticOp_lit.frag @@ -31,7 +31,7 @@ void main() ; SHADERTEST: fadd reassoc nnan nsz arcp contract afn <4 x half> %{{[0-9]*}}, %{{[0-9]*}} ; SHADERTEST: fmul reassoc nnan nsz arcp contract afn <4 x half> %{{[0-9]*}}, %{{[0-9]*}} ; SHADERTEST: fsub reassoc nnan nsz arcp contract afn <4 x half> %{{[0-9]*}}, %{{[0-9]*}} -; SHADERTEST: fdiv reassoc nnan nsz arcp contract afn <4 x half> , +; SHADERTEST: fdiv reassoc nnan nsz arcp contract afn <4 x half> {{(splat \(half 0xH3C00\))|()}}, ; SHADERTEST: fmul reassoc nnan nsz arcp contract afn <4 x half> ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestInterpFuncs_lit.frag b/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestInterpFuncs_lit.frag index 0faaeccd45..6e1a81380b 100644 --- a/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestInterpFuncs_lit.frag +++ b/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestInterpFuncs_lit.frag @@ -19,10 +19,10 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: %{{[A-Za-z0-9]*}} = call <2 x float> @lgc.input.import.builtin.InterpPerspCentroid.v2f32.i32(i32 {{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x half> (...) @lgc.input.import.interpolated__v4f16(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: = call <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode +; SHADERTEST: %{{[A-Za-z0-9]*}} = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.InterpPerspCentroid.v2f32.i32(i32 {{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x half> (...) @lgc.input.import.interpolated__v4f16(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestRelationalFuncs_lit.frag b/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestRelationalFuncs_lit.frag index e1576ee13c..f8861d163b 100644 --- a/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestRelationalFuncs_lit.frag +++ b/llpc/test/shaderdb/extensions/ExtShaderFloat16_TestRelationalFuncs_lit.frag @@ -61,7 +61,7 @@ void main() // SHADERTEST-NEXT: [[TMP17:%.*]] = and i1 [[TMP15]], [[TMP16]] // SHADERTEST-NEXT: [[TMP18:%.*]] = fcmp oge half [[TMP7]], [[TMP8]] // SHADERTEST-NEXT: [[TMP19:%.*]] = or i1 [[TMP17]], [[TMP18]] -// SHADERTEST-NEXT: [[TMP20:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP19]], <3 x float> , <3 x float> zeroinitializer +// SHADERTEST-NEXT: [[TMP20:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP19]], <3 x float> {{(splat \(float 1\.000000e\+00\))|()}}, <3 x float> zeroinitializer // SHADERTEST-NEXT: call void (...) @lgc.create.write.generic.output(<3 x float> [[TMP20]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // SHADERTEST-NEXT: ret void // diff --git a/llpc/test/shaderdb/extensions/ExtShaderInt64_TestBitwiseOp_lit.frag b/llpc/test/shaderdb/extensions/ExtShaderInt64_TestBitwiseOp_lit.frag index 1928f0d078..fbf54e9695 100644 --- a/llpc/test/shaderdb/extensions/ExtShaderInt64_TestBitwiseOp_lit.frag +++ b/llpc/test/shaderdb/extensions/ExtShaderInt64_TestBitwiseOp_lit.frag @@ -28,7 +28,7 @@ void main() ; SHADERTEST: or <3 x i64> %{{[0-9]*}}, %{{[0-9]*}} ; SHADERTEST: and <3 x i64> %{{[0-9]*}}, %{{[0-9]*}} ; SHADERTEST: xor <3 x i64> %{{[0-9]*}}, %{{[0-9]*}} -; SHADERTEST: xor <3 x i64> %{{[0-9]*}}, +; SHADERTEST: xor <3 x i64> %{{[0-9]*}}, {{(splat \(i64 -1\))|()}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/ExtXfb_TestNoXfbExecutionMode.spvasm b/llpc/test/shaderdb/extensions/ExtXfb_TestNoXfbExecutionMode.spvasm index 1e3a0818fb..73523f21da 100644 --- a/llpc/test/shaderdb/extensions/ExtXfb_TestNoXfbExecutionMode.spvasm +++ b/llpc/test/shaderdb/extensions/ExtXfb_TestNoXfbExecutionMode.spvasm @@ -19,7 +19,7 @@ OpEntryPoint TessellationEvaluation %main "main" %DomainPoint %gl_PrimitiveID %o0xyzw %ipatch0y %gl_PointSize OpExecutionMode %main Quads OpExecutionMode %main SignedZeroInfNanPreserve 32 - %2 = OpString "VMware VMGI Translator (shader 21)" + %2 = OpString "VMGI Translator (shader 21)" %3 = OpString "DOMA" %71 = OpString "PROPERTY REFACTORING_ALLOWED" %72 = OpString "DCL INPUT_PATCH_CONSTANT[0].y" diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestFmaDouble_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestFmaDouble_lit.frag index ad76b1641c..97fc801be0 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestFmaDouble_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestFmaDouble_lit.frag @@ -37,7 +37,7 @@ void main() // CHECK-NEXT: [[TMP14:%.*]] = call reassoc nnan nsz arcp contract <3 x double> (...) @lgc.create.fma.v3f64(<3 x double> [[TMP9]], <3 x double> [[TMP11]], <3 x double> [[TMP13]]) // CHECK-NEXT: [[D3_0_0_VEC_EXTRACT:%.*]] = extractelement <3 x double> [[TMP14]], i64 0 // CHECK-NEXT: [[TMP15:%.*]] = fcmp une double [[D3_0_0_VEC_EXTRACT]], [[TMP7]] -// CHECK-NEXT: [[TMP16:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP15]], <4 x float> zeroinitializer, <4 x float> +// CHECK-NEXT: [[TMP16:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP15]], <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP16]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void // diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestFmaFloat_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestFmaFloat_lit.frag index 653bdff986..d47253d3fc 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestFmaFloat_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestFmaFloat_lit.frag @@ -37,7 +37,7 @@ void main() // CHECK-NEXT: [[TMP14:%.*]] = call reassoc nnan nsz arcp contract afn <3 x float> (...) @lgc.create.fma.v3f32(<3 x float> [[TMP9]], <3 x float> [[TMP11]], <3 x float> [[TMP13]]) // CHECK-NEXT: [[F3_0_0_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[TMP14]], i64 0 // CHECK-NEXT: [[TMP15:%.*]] = fcmp une float [[F3_0_0_VEC_EXTRACT]], [[TMP7]] -// CHECK-NEXT: [[TMP16:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP15]], <4 x float> zeroinitializer, <4 x float> +// CHECK-NEXT: [[TMP16:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP15]], <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP16]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void // diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestFmaVec4Const_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestFmaVec4Const_lit.frag index 0831660208..26bf15e98d 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestFmaVec4Const_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestFmaVec4Const_lit.frag @@ -19,7 +19,7 @@ void main() // CHECK-NEXT: [[TMP1:%.*]] = call <4 x float> (...) @lgc.create.read.generic.input.v4f32(i32 1, i32 0, i32 0, i32 0, i32 16, i32 poison) // CHECK-NEXT: [[TMP2:%.*]] = call <4 x float> (...) @lgc.create.read.generic.input.v4f32(i32 0, i32 0, i32 0, i32 0, i32 16, i32 poison) // CHECK-NEXT: [[TMP3:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.fma.v4f32(<4 x float> [[TMP2]], <4 x float> [[TMP1]], <4 x float> [[TMP0]]) -// CHECK-NEXT: [[TMP4:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.fma.v4f32(<4 x float> , <4 x float> , <4 x float> ) +// CHECK-NEXT: [[TMP4:%.*]] = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.fma.v4f32(<4 x float> {{(splat \(float 0x3FE6666660000000\))|()}}, <4 x float> {{(splat \(float 0x3FC99999A0000000\))|()}}, <4 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}) // CHECK-NEXT: [[TMP5:%.*]] = fadd reassoc nnan nsz arcp contract afn <4 x float> [[TMP3]], [[TMP4]] // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP5]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtCentroidNoPersp_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtCentroidNoPersp_lit.frag index c0225acb56..418249d4ae 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtCentroidNoPersp_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtCentroidNoPersp_lit.frag @@ -2,11 +2,11 @@ /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} float @interpolateAtCentroid.f32.p64(ptr addrspace(64) @{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtCentroid.v4f32.p64(ptr addrspace(64) @{{.*}}) -; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: %{{[A-Za-z0-9]*}} = call <2 x float> @lgc.input.import.builtin.InterpLinearCentroid.v2f32.i32(i32 268435462) -; SHADERTEST: %{{[A-Za-z0-9]*}} = call <2 x float> @lgc.input.import.builtin.InterpPerspCentroid.v2f32.i32(i32 268435458) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn float @interpolateAtCentroid.f32.p64(ptr addrspace(64) @{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtCentroid.v4f32.p64(ptr addrspace(64) @{{.*}}) +; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results +; SHADERTEST: %{{[A-Za-z0-9]*}} = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.InterpLinearCentroid.v2f32.i32(i32 268435462) +; SHADERTEST: %{{[A-Za-z0-9]*}} = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.InterpPerspCentroid.v2f32.i32(i32 268435458) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: %{{[0-9]*}} = call float @llvm.amdgcn.interp.p1(float %{{.*}}, i32 0, i32 0, i32 %{{.*}}) ; SHADERTEST: %{{[0-9]*}} = call float @llvm.amdgcn.interp.p2(float %{{.*}}, float %{{.*}}, i32 0, i32 0, i32 %{{.*}}) diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtCentroid_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtCentroid_lit.frag index 8ba1ddc40b..9548cf3593 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtCentroid_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtCentroid_lit.frag @@ -17,11 +17,11 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} float @interpolateAtCentroid.f32.p64(ptr addrspace(64) @{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtCentroid.v4f32.p64(ptr addrspace(64) @{{.*}}) -; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: %{{[A-Za-z0-9]*}} = call <2 x float> @lgc.input.import.builtin.InterpPerspCentroid.v2f32.i32(i32 268435458) -; SHADERTEST: %{{[A-Za-z0-9]*}} = call <2 x float> @lgc.input.import.builtin.InterpPerspCentroid.v2f32.i32(i32 268435458) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn float @interpolateAtCentroid.f32.p64(ptr addrspace(64) @{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtCentroid.v4f32.p64(ptr addrspace(64) @{{.*}}) +; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results +; SHADERTEST: %{{[A-Za-z0-9]*}} = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.InterpPerspCentroid.v2f32.i32(i32 268435458) +; SHADERTEST: %{{[A-Za-z0-9]*}} = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.InterpPerspCentroid.v2f32.i32(i32 268435458) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: %{{[0-9]*}} = call float @llvm.amdgcn.interp.p1(float %{{.*}}, i32 0, i32 0, i32 %{{.*}}) ; SHADERTEST: %{{[0-9]*}} = call float @llvm.amdgcn.interp.p2(float %{{.*}}, float %{{.*}}, i32 0, i32 0, i32 %{{.*}}) diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtOffset_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtOffset_lit.frag index 46cfb9a632..85685c4074 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtOffset_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtOffset_lit.frag @@ -20,18 +20,20 @@ void main() } // BEGIN_SHADERTEST /* -; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s +; RUN: amdllpc -v -gfxip=11.0.0 %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} float @interpolateAtOffset.f32.p64.v2f32(ptr addrspace(64) @{{.*}}, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) @{{.*}}, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn float @interpolateAtOffset.f32.p64.v2f32(ptr addrspace(64) @{{.*}}, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) @{{.*}}, <2 x float> %{{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST: = call float (...) @lgc.input.import.interpolated__f32( -; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: %{{[0-9]*}} = call float @llvm.amdgcn.interp.p1(float %{{.*}}, i32 0, i32 0, i32 %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call float @llvm.amdgcn.interp.p2(float %{{.*}}, float %{{.*}}, i32 0, i32 0, i32 %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call float @llvm.amdgcn.interp.mov(i32 {{.*}}2, i32 1, i32 1, i32 %{{.*}}) +; SHADERTEST: fmul reassoc nnan nsz arcp contract afn <3 x float> +; SHADERTEST: fadd reassoc nnan nsz arcp contract afn <3 x float> +; SHADERTEST: fmul reassoc nnan nsz arcp contract afn <3 x float> +; SHADERTEST: fadd reassoc nnan nsz arcp contract afn <3 x float> +; SHADERTEST: = call reassoc nnan nsz arcp contract afn float (...) @lgc.input.import.interpolated__f32( +; SHADERTEST-LABEL: _amdgpu_ps_main +; SHADERTEST-COUNT-6: v_fmac_f32_e32 ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtSample_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtSample_lit.frag index fa9b34d113..dcec685faf 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtSample_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateAtSample_lit.frag @@ -22,14 +22,14 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} float @interpolateAtSample.f32.p64.i32(ptr addrspace(64) @{{.*}}, i32 %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtSample.v4f32.p64.i32(ptr addrspace(64) @{{.*}}, i32 %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn float @interpolateAtSample.f32.p64.i32(ptr addrspace(64) @{{.*}}, i32 %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtSample.v4f32.p64.i32(ptr addrspace(64) @{{.*}}, i32 %{{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST-DAG: = call <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( -; SHADERTEST-DAG: = call <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32( +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32( ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST-DAG: = call float (...) @lgc.input.import.interpolated__f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 0, <2 x float> -; SHADERTEST-DAG: = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 1, i32 poison +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn float (...) @lgc.input.import.interpolated__f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 0, <2 x float> +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 1, i32 poison ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: %{{[0-9]*}} = call float @llvm.amdgcn.interp.p1(float %{{.*}}, i32 0, i32 0, i32 %{{.*}}) ; SHADERTEST: %{{[0-9]*}} = call float @llvm.amdgcn.interp.p2(float %{{.*}}, float %{{.*}}, i32 0, i32 0, i32 %{{.*}}) diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DArray.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DArray.frag index 37a74c8f82..5b0a9d7164 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DArray.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DArray.frag @@ -15,14 +15,14 @@ void main() /* ; RUN: amdllpc -verify-ir -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 17, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 18, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 19, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 20, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 17, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 18, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 19, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 20, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DArrayInStruct.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DArrayInStruct.frag index 833bf94d38..68a4490924 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DArrayInStruct.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DArrayInStruct.frag @@ -26,15 +26,15 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtOffset.v4f32.p64.v2f32({{<4 x float> addrspace\(64\)\*|ptr addrspace\(64\)}} %{{.*}}, <2 x float> {{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtOffset.v4f32.p64.v2f32({{<4 x float> addrspace\(64\)\*|ptr addrspace\(64\)}} %{{.*}}, <2 x float> {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 3, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 4, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 5, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 6, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 7, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 3, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 4, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 5, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 6, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 7, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DStructArray.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DStructArray.frag index 8232f9884e..6dab9318b3 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DStructArray.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx1DStructArray.frag @@ -26,13 +26,13 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 3, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 7, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST-DAG: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 11, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 3, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 7, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST-DAG: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 11, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DArrayInStruct.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DArrayInStruct.frag index dd893dd2b6..faf43e8552 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DArrayInStruct.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DArrayInStruct.frag @@ -28,16 +28,16 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 2, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 3, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 4, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 5, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 6, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 7, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 2, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 3, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 4, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 5, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 6, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 7, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DArrayInStructInArray.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DArrayInStructInArray.frag index 269ec31503..0e495c5865 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DArrayInStructInArray.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DArrayInStructInArray.frag @@ -27,22 +27,22 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 12, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 13, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 14, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 15, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 16, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 17, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 21, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 22, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 23, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 24, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 25, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 26, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 12, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 13, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 14, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 15, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 16, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 17, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 21, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 22, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 23, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 24, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 25, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 26, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DStructArray.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DStructArray.frag index c66f4ac4c6..5086ab3fab 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DStructArray.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx2DStructArray.frag @@ -25,16 +25,16 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 2, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 5, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 8, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 11, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 14, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 17, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 2, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 5, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 8, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 11, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 14, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 17, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx3DArray.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx3DArray.frag index 8638a7e063..49231000d4 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx3DArray.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdx3DArray.frag @@ -16,22 +16,22 @@ void main() // BEGIN_SHADERTEST /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s -; SHADERTEST: %{{[0-9]*}} = call {{.*}} <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> @interpolateAtOffset.v4f32.p64.v2f32(ptr addrspace(64) %{{.*}}, <2 x float> {{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 3, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 4, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 5, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 6, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 7, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 8, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 9, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 10, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 11, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 12, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 13, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) -; SHADERTEST: %{{[0-9]*}} = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 14, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 3, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 4, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 5, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 6, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 7, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 8, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 9, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 10, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 11, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 12, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 13, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) +; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 14, i32 0, i32 0, i32 poison, i32 0, <2 x float> %{{.*}}) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdxVector.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdxVector.frag index 868061bc8c..d762aaaf46 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdxVector.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestInterpolateDynIdxVector.frag @@ -16,20 +16,20 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST-COUNT-2: %{{[0-9]*}} = call {{.*}} float @interpolateAtSample.f32.p64.i32(ptr addrspace(64) %{{.*}}, i32 %{{.*}}) +; SHADERTEST-COUNT-2: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn float @interpolateAtSample.f32.p64.i32(ptr addrspace(64) %{{.*}}, i32 %{{.*}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST-DAG: = call <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( -; SHADERTEST-DAG: = call <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32( +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32( ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST-DAG: = call <2 x float> (...) @lgc.input.import.interpolated__v2f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 0, -; SHADERTEST-DAG: = call <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( -; SHADERTEST-DAG: = call <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32( +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.input.import.interpolated__v2f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 0, +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32( ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST-DAG: = call float (...) @lgc.input.import.interpolated__f32(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 0, <2 x float> -; SHADERTEST-DAG: = call <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( -; SHADERTEST-DAG: = call <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32( +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn float (...) @lgc.input.import.interpolated__f32(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 0, <2 x float> +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <2 x float> @lgc.input.import.builtin.SamplePosOffset.v2f32.i32.i32( +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32( ; SHADERTEST-COUNT-12: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 -; SHADERTEST-DAG: = call float (...) @lgc.input.import.interpolated__f32(i1 false, i32 2, i32 0, i32 0, i32 poison, i32 0, <2 x float> +; SHADERTEST-DAG: = call reassoc nnan nsz arcp contract afn float (...) @lgc.input.import.interpolated__f32(i1 false, i32 2, i32 0, i32 0, i32 poison, i32 0, <2 x float> ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectDouble_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectDouble_lit.frag index 3674cbd309..db02c3d2dd 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectDouble_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectDouble_lit.frag @@ -46,7 +46,7 @@ void main() // CHECK-NEXT: [[TMP16:%.*]] = extractelement <3 x double> [[TMP9]], i64 1 // CHECK-NEXT: [[TMP17:%.*]] = select reassoc nnan nsz arcp contract i1 [[DOTNOT2]], double [[TMP16]], double [[TMP15]] // CHECK-NEXT: [[TMP18:%.*]] = fcmp oeq double [[TMP17]], [[TMP7]] -// CHECK-NEXT: [[TMP19:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP18]], <4 x float> zeroinitializer, <4 x float> +// CHECK-NEXT: [[TMP19:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP18]], <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP19]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void // diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectFloat_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectFloat_lit.frag index f003075a6d..02dfc24143 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectFloat_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectFloat_lit.frag @@ -46,7 +46,7 @@ void main() // CHECK-NEXT: [[TMP16:%.*]] = extractelement <3 x float> [[TMP9]], i64 1 // CHECK-NEXT: [[TMP17:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[DOTNOT2]], float [[TMP16]], float [[TMP15]] // CHECK-NEXT: [[TMP18:%.*]] = fcmp oeq float [[TMP17]], [[TMP7]] -// CHECK-NEXT: [[TMP19:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP18]], <4 x float> zeroinitializer, <4 x float> +// CHECK-NEXT: [[TMP19:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP18]], <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP19]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void // diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectInt_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectInt_lit.frag index 03a4d7b21e..f229d3c386 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectInt_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectInt_lit.frag @@ -46,7 +46,7 @@ void main() // CHECK-NEXT: [[TMP16:%.*]] = extractelement <3 x i32> [[TMP9]], i64 1 // CHECK-NEXT: [[TMP17:%.*]] = select i1 [[DOTNOT2]], i32 [[TMP16]], i32 [[TMP15]] // CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP17]], [[TMP7]] -// CHECK-NEXT: [[TMP19:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP18]], <4 x float> zeroinitializer, <4 x float> +// CHECK-NEXT: [[TMP19:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP18]], <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP19]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void // diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectUint_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectUint_lit.frag index fb95138864..f65d21e5f0 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectUint_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestMixSelectUint_lit.frag @@ -46,7 +46,7 @@ void main() // CHECK-NEXT: [[TMP16:%.*]] = extractelement <3 x i32> [[TMP9]], i64 1 // CHECK-NEXT: [[TMP17:%.*]] = select i1 [[DOTNOT2]], i32 [[TMP16]], i32 [[TMP15]] // CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[TMP17]], [[TMP7]] -// CHECK-NEXT: [[TMP19:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP18]], <4 x float> zeroinitializer, <4 x float> +// CHECK-NEXT: [[TMP19:%.*]] = select reassoc nnan nsz arcp contract afn i1 [[TMP18]], <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} // CHECK-NEXT: call void (...) @lgc.create.write.generic.output(<4 x float> [[TMP19]], i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison) // CHECK-NEXT: ret void // diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestPackSnorm2x16_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestPackSnorm2x16_lit.frag index c0e29fa4e0..327662a2da 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestPackSnorm2x16_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestPackSnorm2x16_lit.frag @@ -17,8 +17,8 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %[[CLAMP:.*]] = call <2 x float> (...) @lgc.create.fclamp.v2f32(<2 x float> %{{.*}}, <2 x float> , <2 x float> ) -; SHADERTEST: %[[SCALE:.*]] = fmul <2 x float> %[[CLAMP]], +; SHADERTEST: %[[CLAMP:.*]] = call <2 x float> (...) @lgc.create.fclamp.v2f32(<2 x float> %{{.*}}, <2 x float> {{(splat \(float \-1\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}) +; SHADERTEST: %[[SCALE:.*]] = fmul <2 x float> %[[CLAMP]], {{(splat \(float 3\.276700e\+04\))|()}} ; SHADERTEST: %[[RINT:.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %[[SCALE]]) ; SHADERTEST: %[[CONV:.*]] = fptosi <2 x float> %[[RINT]] to <2 x i16> ; SHADERTEST: = bitcast <2 x i16> %[[CONV]] to i32 diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestPackSnorm4x8_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestPackSnorm4x8_lit.frag index f9f7e9df0f..67c41495c8 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestPackSnorm4x8_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestPackSnorm4x8_lit.frag @@ -17,8 +17,8 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %[[CLAMP:.*]] = call <4 x float> (...) @lgc.create.fclamp.v4f32(<4 x float> %{{.*}}, <4 x float> , <4 x float> ) -; SHADERTEST: %[[SCALE:.*]] = fmul <4 x float> %[[CLAMP]], +; SHADERTEST: %[[CLAMP:.*]] = call <4 x float> (...) @lgc.create.fclamp.v4f32(<4 x float> %{{.*}}, <4 x float> {{(splat \(float \-1\.000000e\+00\))|()}}, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}) +; SHADERTEST: %[[SCALE:.*]] = fmul <4 x float> %[[CLAMP]], {{(splat \(float 1\.270000e\+02\))|()}} ; SHADERTEST: %[[RINT:.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %[[SCALE]]) ; SHADERTEST: %[[CONV:.*]] = fptosi <4 x float> %[[RINT]] to <4 x i8> ; SHADERTEST: = bitcast <4 x i8> %[[CONV]] to i32 diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestPackUnorm2x16_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestPackUnorm2x16_lit.frag index b955214b8f..bd5e86d0f6 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestPackUnorm2x16_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestPackUnorm2x16_lit.frag @@ -17,8 +17,8 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %[[CLAMP:.*]] = call <2 x float> (...) @lgc.create.fclamp.v2f32(<2 x float> %{{[0-9]+}}, <2 x float> zeroinitializer, <2 x float> ) -; SHADERTEST: %[[SCALE:.*]] = fmul <2 x float> %[[CLAMP]], +; SHADERTEST: %[[CLAMP:.*]] = call <2 x float> (...) @lgc.create.fclamp.v2f32(<2 x float> %{{[0-9]+}}, <2 x float> zeroinitializer, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}) +; SHADERTEST: %[[SCALE:.*]] = fmul <2 x float> %[[CLAMP]], {{(splat \(float 6\.553500e\+04\))|()}} ; SHADERTEST: %[[RINT:.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %[[SCALE]]) ; SHADERTEST: %[[CONV:.*]] = fptoui <2 x float> %[[RINT]] to <2 x i16> ; SHADERTEST: = bitcast <2 x i16> %[[CONV]] to i32 diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestPackUnorm4x8_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestPackUnorm4x8_lit.frag index a0287e0cb5..7cae4837e8 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestPackUnorm4x8_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestPackUnorm4x8_lit.frag @@ -17,8 +17,8 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: %[[CLAMP:.*]] = call <4 x float> (...) @lgc.create.fclamp.v4f32(<4 x float> %{{.*}}, <4 x float> zeroinitializer, <4 x float> ) -; SHADERTEST: %[[SCALE:.*]] = fmul <4 x float> %[[CLAMP]], +; SHADERTEST: %[[CLAMP:.*]] = call <4 x float> (...) @lgc.create.fclamp.v4f32(<4 x float> %{{.*}}, <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}) +; SHADERTEST: %[[SCALE:.*]] = fmul <4 x float> %[[CLAMP]], {{(splat \(float 2\.550000e\+02\))|()}} ; SHADERTEST: %[[RINT:.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %[[SCALE]]) ; SHADERTEST: %[[CONV:.*]] = fptoui <4 x float> %[[RINT]] to <4 x i8> ; SHADERTEST: = bitcast <4 x i8> %[[CONV]] to i32 diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestRadiansVec4Const_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestRadiansVec4Const_lit.frag index 1f47e78210..896e4fb571 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestRadiansVec4Const_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestRadiansVec4Const_lit.frag @@ -13,7 +13,7 @@ void main() /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results -; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <4 x float> %{{.*}}, +; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <4 x float> %{{.*}}, {{(splat \(float 0x3F91DF46A0000000\))|()}} ; SHADERTEST: store float 0x3F9ACEEA00000000, ptr addrspace(5) %{{.*}} ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <4 x float> %{{.*}}, diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestRadians_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestRadians_lit.frag index 02260b7e59..2b2e3412b7 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestRadians_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestRadians_lit.frag @@ -21,7 +21,7 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn float %{{.*}}, 0x3F91DF46A0000000 -; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <3 x float> %{{[0-9]+}}, +; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <3 x float> %{{[0-9]+}}, {{(splat \(float 0x3F91DF46A0000000\))|()}} ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: %{{[0-9]*}} = fmul reassoc nnan nsz arcp contract afn float %{{.*}}, 0x3F91DF46A0000000 ; SHADERTEST: %{{.*}} = fmul reassoc nnan nsz arcp contract afn float %{{.*}}, 0x3F91DF46A0000000 diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestSignIvec4_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestSignIvec4_lit.frag index 2bf8f7786b..4f6b2dcfee 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestSignIvec4_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestSignIvec4_lit.frag @@ -15,9 +15,9 @@ void main() ; SHADERTEST: = call <4 x i32> (...) @lgc.create.ssign.v4i32(<4 x i32> ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results ; SHADERTEST: = icmp {{slt i32 %.*, 1|sgt <4 x i32> %.*, zeroinitializer}} -; SHADERTEST-DAG: = select {{i1 %.*, i32 %.*, i32 1|<4 x i1> %.*, <4 x i32> , <4 x i32> %.*}} +; SHADERTEST-DAG: = select {{i1 %.*, i32 %.*, i32 1|<4 x i1> %.*, <4 x i32> ((splat \(i32 1\))|()), <4 x i32> %.*}} ; SHADERTEST-DAG: = icmp {{sgt i32 %.*, -1|sge <4 x i32> %.*, zeroinitializer}} -; SHADERTEST-DAG: = select {{i1 %.*, i32 %.*, i32 -1|<4 x i1> %.*, <4 x i32> %.*, <4 x i32> }} +; SHADERTEST-DAG: = select {{i1 %.*, i32 %.*, i32 -1|<4 x i1> %.*, <4 x i32> %.*, <4 x i32> ((splat \(i32 -1\))|())}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestStepDouble_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestStepDouble_lit.frag index 36b2b8aefb..a26fb38f4f 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestStepDouble_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestStepDouble_lit.frag @@ -23,9 +23,9 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: = fcmp reassoc nnan nsz arcp contract olt <3 x double> -; SHADERTEST: = select reassoc nnan nsz arcp contract <3 x i1> %{{.*}}, <3 x double> zeroinitializer, <3 x double> +; SHADERTEST: = select reassoc nnan nsz arcp contract <3 x i1> %{{.*}}, <3 x double> zeroinitializer, <3 x double> {{(splat \(double 1\.000000e\+00\))|()}} ; SHADERTEST: = fcmp reassoc nnan nsz arcp contract olt <4 x double> -; SHADERTEST: = select reassoc nnan nsz arcp contract <4 x i1> %{{.*}}, <4 x double> zeroinitializer, <4 x double> +; SHADERTEST: = select reassoc nnan nsz arcp contract <4 x i1> %{{.*}}, <4 x double> zeroinitializer, <4 x double> {{(splat \(double 1\.000000e\+00\))|()}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestStepFloat_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestStepFloat_lit.frag index 86630ed6e5..5c3a5d7615 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestStepFloat_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestStepFloat_lit.frag @@ -23,9 +23,9 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: = fcmp reassoc nnan nsz arcp contract afn olt <3 x float> -; SHADERTEST: = select reassoc nnan nsz arcp contract afn <3 x i1> %{{.*}}, <3 x float> zeroinitializer, <3 x float> +; SHADERTEST: = select reassoc nnan nsz arcp contract afn <3 x i1> %{{.*}}, <3 x float> zeroinitializer, <3 x float> {{(splat \(float 1\.000000e\+00\))|()}} ; SHADERTEST: = fcmp reassoc nnan nsz arcp contract afn olt <4 x float> -; SHADERTEST: = select reassoc nnan nsz arcp contract afn <4 x i1> %{{.*}}, <4 x float> zeroinitializer, <4 x float> +; SHADERTEST: = select reassoc nnan nsz arcp contract afn <4 x i1> %{{.*}}, <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestStepVec4Const_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestStepVec4Const_lit.frag index 9da51db8ae..c6fe109e66 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestStepVec4Const_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestStepVec4Const_lit.frag @@ -16,7 +16,7 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: = fcmp reassoc nnan nsz arcp contract afn olt <4 x float> -; SHADERTEST: = select reassoc nnan nsz arcp contract afn <4 x i1> %{{.*}}, <4 x float> zeroinitializer, <4 x float> +; SHADERTEST: = select reassoc nnan nsz arcp contract afn <4 x i1> %{{.*}}, <4 x float> zeroinitializer, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestTanVec4Const_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestTanVec4Const_lit.frag index a8e4253666..e47336ba60 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestTanVec4Const_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestTanVec4Const_lit.frag @@ -17,7 +17,7 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results ; SHADERTEST: = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.sin.v4f32( ; SHADERTEST: = call reassoc nnan nsz arcp contract afn <4 x float> @llvm.cos.v4f32( -; SHADERTEST: = fdiv reassoc nnan nsz arcp contract afn <4 x float> {{(splat \(float 1\.000000e\+00\))|( ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestTan_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestTan_lit.frag index 3937c6c2db..c3cb3c70ac 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestTan_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestTan_lit.frag @@ -25,7 +25,7 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results ; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <3 x float> @llvm.sin.v3f32(<3 x float> ; SHADERTEST: %{{[0-9]*}} = call reassoc nnan nsz arcp contract afn <3 x float> @llvm.cos.v3f32(<3 x float> -; SHADERTEST: %{{[0-9]*}} = fdiv reassoc nnan nsz arcp contract afn <3 x float> , +; SHADERTEST: %{{[0-9]*}} = fdiv reassoc nnan nsz arcp contract afn <3 x float> {{(splat \(float 1\.000000e\+00\))|()}}, ; SHADERTEST: %{{[0-9]*}} = fmul reassoc nnan nsz arcp contract afn <3 x float> ; SHADERTEST: %{{[0-9]*}} = fcmp {{[ou]}}ne float %{{.*}}, %{{.*}} ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackSnorm2x16_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackSnorm2x16_lit.frag index 23e849a7fc..5e8a73ad96 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackSnorm2x16_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackSnorm2x16_lit.frag @@ -19,8 +19,8 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: %[[BITCAST:.*]] = bitcast i32 %{{.*}} to <2 x i16> ; SHADERTEST: %[[CONV:.*]] = sitofp <2 x i16> %[[BITCAST]] to <2 x float> -; SHADERTEST: %[[SCALE:.*]] = fmul reassoc nnan nsz arcp contract afn <2 x float> %[[CONV]], -; SHADERTEST: = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.fclamp.v2f32(<2 x float> %[[SCALE]], <2 x float> , <2 x float> ) +; SHADERTEST: %[[SCALE:.*]] = fmul reassoc nnan nsz arcp contract afn <2 x float> %[[CONV]], {{(splat \(float 0x3F00002000000000\))|()}} +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <2 x float> (...) @lgc.create.fclamp.v2f32(<2 x float> %[[SCALE]], <2 x float> {{(splat \(float \-1\.000000e\+00\))|()}}, <2 x float> {{(splat \(float 1\.000000e\+00\))|()}}) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackSnorm4x8_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackSnorm4x8_lit.frag index 7a12c4e8ad..f95d7ba755 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackSnorm4x8_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackSnorm4x8_lit.frag @@ -19,8 +19,8 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: %[[BITCAST:.*]] = bitcast i32 %{{[0-9]+}} to <4 x i8> ; SHADERTEST: %[[CONV:.*]] = sitofp <4 x i8> %[[BITCAST]] to <4 x float> -; SHADERTEST: %[[SCALE:.*]] = fmul reassoc nnan nsz arcp contract afn <4 x float> %[[CONV]], -; SHADERTEST: = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.fclamp.v4f32(<4 x float> %[[SCALE]], <4 x float> , <4 x float> ) +; SHADERTEST: %[[SCALE:.*]] = fmul reassoc nnan nsz arcp contract afn <4 x float> %[[CONV]], {{(splat \(float 0x3F80204080000000\))|()}} +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.create.fclamp.v4f32(<4 x float> %[[SCALE]], <4 x float> {{(splat \(float \-1\.000000e\+00\))|()}}, <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackUnorm2x16_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackUnorm2x16_lit.frag index fd099ecc8e..4fb9d34c4d 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackUnorm2x16_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackUnorm2x16_lit.frag @@ -19,7 +19,7 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: %[[BITCAST:.*]] = bitcast i32 %{{[0-9]+}} to <2 x i16> ; SHADERTEST: %[[CONV:.*]] = uitofp <2 x i16> %[[BITCAST]] to <2 x float> -; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <2 x float> %[[CONV]], +; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <2 x float> %[[CONV]], {{(splat \(float 0x3EF0001000000000\))|()}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackUnorm4x8_lit.frag b/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackUnorm4x8_lit.frag index b61c3fe84a..cd382a542e 100644 --- a/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackUnorm4x8_lit.frag +++ b/llpc/test/shaderdb/extensions/OpExtInst_TestUnpackUnorm4x8_lit.frag @@ -19,7 +19,7 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: %[[BITCAST:.*]] = bitcast i32 %{{.*}} to <4 x i8> ; SHADERTEST: %[[CONV:.*]] = uitofp <4 x i8> %[[BITCAST]] to <4 x float> -; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <4 x float> %[[CONV]], +; SHADERTEST: = fmul reassoc nnan nsz arcp contract afn <4 x float> %[[CONV]], {{(splat \(float 0x3F70101020000000\))|()}} ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/general/CantOptimizePointSizeWrite.pipe b/llpc/test/shaderdb/general/CantOptimizePointSizeWrite.pipe new file mode 100644 index 0000000000..bf2520339d --- /dev/null +++ b/llpc/test/shaderdb/general/CantOptimizePointSizeWrite.pipe @@ -0,0 +1,102 @@ +; This test is to verify the optimization of PointSize write cannot be performed. When the write value of PointSize is +; not uniformly 1.0, we should disable the optimization. In such case, PointSize normally takes different values. The +; missing writes of 1.0 is not semantically correct. + +; RUN: amdllpc -emit-llvm -print-after=lgc-collect-resource-usage %gfxip %s 2>&1 | FileCheck -check-prefix=SHADERTEST %s + +; SHADERTEST-LABEL: @lgc.shader.GS.main() +; SHADERTEST: call void @lgc.output.export.builtin.PointSize.i32.i32.f32(i32 1, i32 1, float 1.000000e+00) +; SHADERTEST: call void @lgc.output.export.builtin.PointSize.i32.i32.f32(i32 1, i32 1, float 2.000000e+00) + +[Version] +version = 75 + +[VsGlsl] +#version 450 + +void main(void) +{ +} + +[VsInfo] +entryPoint = main + +[GsGlsl] +#version 450 + +layout(points) in; +layout(points, max_vertices = 16) out; +layout(stream = 1) out; +layout(location = 0) out vec4 color; + +layout(stream = 1) out gl_PerVertex +{ + vec4 gl_Position; + float gl_PointSize; +}; + +void main(void) +{ + // Color constants + vec4 g = vec4(0.0, 1.0, 0.0, 1.0); + vec4 m = vec4(1.0, 0.0, 1.0, 1.0); + // Coordinate constants: leftmost column + vec4 a = vec4(-1.0,-1.0, 0.0, 1.0); + vec4 b = vec4(-1.0, 0.0, 0.0, 1.0); + vec4 c = vec4(-1.0, 1.0, 0.0, 1.0); + // Coordinate constants: middle column + vec4 i = vec4( 0.0,-1.0, 0.0, 1.0); + vec4 j = vec4( 0.0, 0.0, 0.0, 1.0); + vec4 k = vec4( 0.0, 1.0, 0.0, 1.0); + // Coordinate constants: rightmost column + vec4 x = vec4( 1.0,-1.0, 0.0, 1.0); + vec4 y = vec4( 1.0, 0.0, 0.0, 1.0); + vec4 z = vec4( 1.0, 1.0, 0.0, 1.0); + + if (gl_PrimitiveIDIn == 0) + { + color = g; gl_Position = (a + j) / 2.0f; gl_PointSize = 1.0f; EmitStreamVertex(0); + EndStreamPrimitive(0); + color = m; gl_Position = (b + k) / 2.0f; gl_PointSize = 1.0f; EmitStreamVertex(1); + EndStreamPrimitive(1); + } + else + { + color = g; gl_Position = (j + x) / 2.0f; gl_PointSize = 2.0f; EmitStreamVertex(0); + EndStreamPrimitive(0); + color = m; gl_Position = (k + y) / 2.0f; gl_PointSize = 2.0f; EmitStreamVertex(1); + EndStreamPrimitive(1); + } +} + +[GsInfo] +entryPoint = main + +[FsGlsl] +#version 450 + +layout(location = 0) in vec4 i_color; +layout(location = 0) out vec4 o_color; + +void main(void) +{ + o_color = i_color; +} + +[FsInfo] +entryPoint = main + +[ResourceMapping] +[GraphicsPipelineState] +topology = VK_PRIMITIVE_TOPOLOGY_POINT_LIST +provokingVertexMode = VK_PROVOKING_VERTEX_MODE_FIRST_VERTEX_EXT +depthClipEnable = 1 +rasterStream = 1 +numSamples = 1 +rasterStream = 1 +colorBuffer[0].format = VK_FORMAT_R8G8B8A8_UNORM +colorBuffer[0].channelWriteMask = 15 +colorBuffer[0].blendEnable = 0 +colorBuffer[0].blendSrcAlphaToColor = 0 +options.optimizationLevel = 2 +options.optimizePointSizeWrite = 1 diff --git a/llpc/test/shaderdb/general/CoherentArray.frag b/llpc/test/shaderdb/general/CoherentArray.frag index e00e85d17b..d45ca2f47b 100644 --- a/llpc/test/shaderdb/general/CoherentArray.frag +++ b/llpc/test/shaderdb/general/CoherentArray.frag @@ -13,18 +13,18 @@ void main() /* ; RUN: amdllpc -v --verify-ir %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 0, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 4, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 8, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 12, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 16, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 20, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 24, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 28, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 32, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 36, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 40, i32 0, i32 1) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1109917696, <4 x i32> %5, i32 44, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 0, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 4, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 8, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 12, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 16, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 20, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 24, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 28, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 32, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 36, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 40, i32 0, i32 1) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1109917696, <4 x i32> %5, i32 44, i32 0, i32 1) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/general/CoherentVector.frag b/llpc/test/shaderdb/general/CoherentVector.frag index 204ccb280e..048e33ceee 100644 --- a/llpc/test/shaderdb/general/CoherentVector.frag +++ b/llpc/test/shaderdb/general/CoherentVector.frag @@ -14,9 +14,9 @@ void main() ; RUN: amdllpc -v --verify-ir %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: store atomic float 4.200000e+01, ptr addrspace(7) @0 unordered, align 4 -; SHADERTEST: store atomic float 4.200000e+01, ptr addrspace(7) getelementptr ([4 x float], ptr addrspace(7) @0, i32 0, i32 1) unordered, align 4 -; SHADERTEST: store atomic float 4.200000e+01, ptr addrspace(7) getelementptr ([4 x float], ptr addrspace(7) @0, i32 0, i32 2) unordered, align 4 -; SHADERTEST: store atomic float 4.200000e+01, ptr addrspace(7) getelementptr ([4 x float], ptr addrspace(7) @0, i32 0, i32 3) unordered, align 4 +; SHADERTEST: store atomic float 4.200000e+01, ptr addrspace(7) getelementptr inbounds ([4 x float], ptr addrspace(7) @0, i32 0, i32 1) unordered, align 4 +; SHADERTEST: store atomic float 4.200000e+01, ptr addrspace(7) getelementptr inbounds ([4 x float], ptr addrspace(7) @0, i32 0, i32 2) unordered, align 4 +; SHADERTEST: store atomic float 4.200000e+01, ptr addrspace(7) getelementptr inbounds ([4 x float], ptr addrspace(7) @0, i32 0, i32 3) unordered, align 4 ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/general/NggInCullingMode.pipe b/llpc/test/shaderdb/general/NggInCullingMode.pipe new file mode 100644 index 0000000000..d2118773ac --- /dev/null +++ b/llpc/test/shaderdb/general/NggInCullingMode.pipe @@ -0,0 +1,106 @@ +; This test is to verify NGG culling mode is enabled as expected. + +; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s + +; SHADERTEST-LABEL: .vgt_shader_stages_en +; SHADERTEST: .primgen_en: 1 +; SHADERTEST: .primgen_passthru_en: 0 + +[Version] +version = 75 + +[VsGlsl] +#version 430 + +layout(location = 0) in vec4 in_position; +layout(location = 1) in vec4 in_color; +layout(location = 2) in int in_refVertexIndex; + +layout(location = 0) out vec4 out_color; + +void main() { + gl_Position = in_position; + if (gl_VertexIndex == in_refVertexIndex) + out_color = in_color; + else + out_color = vec4(1.0, 0.0, 0.0, 1.0); +} + +[VsInfo] +entryPoint = main + +[FsGlsl] +#version 430 + +layout(location = 0) in vec4 in_color; +layout(location = 0) out vec4 out_color; + +void main() { + out_color = in_color; +} + +[FsInfo] +entryPoint = main + +[ResourceMapping] +userDataNode[0].visibility = 2 +userDataNode[0].type = IndirectUserDataVaPtr +userDataNode[0].offsetInDwords = 0 +userDataNode[0].sizeInDwords = 1 +userDataNode[0].indirectUserDataCount = 4 +userDataNode[1].visibility = 66 +userDataNode[1].type = DescriptorTableVaPtr +userDataNode[1].offsetInDwords = 6 +userDataNode[1].sizeInDwords = 1 +userDataNode[1].next[0].type = DescriptorConstBufferCompact +userDataNode[1].next[0].offsetInDwords = 0 +userDataNode[1].next[0].sizeInDwords = 2 +userDataNode[1].next[0].set = 0x0000005D +userDataNode[1].next[0].binding = 17 +userDataNode[1].next[0].strideInDwords = 0 +userDataNode[1].next[1].type = DescriptorConstBuffer +userDataNode[1].next[1].offsetInDwords = 2 +userDataNode[1].next[1].sizeInDwords = 8 +userDataNode[1].next[1].set = 0x0000005D +userDataNode[1].next[1].binding = 0 +userDataNode[1].next[1].strideInDwords = 0 +userDataNode[1].next[2].type = DescriptorBuffer +userDataNode[1].next[2].offsetInDwords = 10 +userDataNode[1].next[2].sizeInDwords = 8 +userDataNode[1].next[2].set = 0x0000005D +userDataNode[1].next[2].binding = 1 +userDataNode[1].next[2].strideInDwords = 0 +userDataNode[2].visibility = 4 +userDataNode[2].type = StreamOutTableVaPtr +userDataNode[2].offsetInDwords = 2 +userDataNode[2].sizeInDwords = 1 + +[GraphicsPipelineState] +topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST +colorBuffer[0].format = VK_FORMAT_R8G8B8A8_UNORM +colorBuffer[0].channelWriteMask = 15 +colorBuffer[0].blendEnable = 0 +colorBuffer[0].blendSrcAlphaToColor = 0 +nggState.enableNgg = 1 +nggState.forceCullingMode = 1 +nggState.compactVertex = 1 + +[VertexInputState] +binding[0].binding = 0 +binding[0].stride = 36 +binding[0].inputRate = VK_VERTEX_INPUT_RATE_VERTEX +attribute[0].location = 0 +attribute[0].binding = 0 +attribute[0].format = VK_FORMAT_R32G32B32A32_SFLOAT +attribute[0].offset = 0 +attribute[0].vbAddressLowBits = 0 +attribute[1].location = 1 +attribute[1].binding = 0 +attribute[1].format = VK_FORMAT_R32G32B32A32_SFLOAT +attribute[1].offset = 16 +attribute[1].vbAddressLowBits = 0 +attribute[2].location = 2 +attribute[2].binding = 0 +attribute[2].format = VK_FORMAT_R32_SINT +attribute[2].offset = 32 +attribute[2].vbAddressLowBits = 0 diff --git a/llpc/test/shaderdb/general/PipelineTess_TestInOutPacking.pipe b/llpc/test/shaderdb/general/PipelineTess_TestInOutPacking.pipe index 02aa21c359..be9989bb8e 100644 --- a/llpc/test/shaderdb/general/PipelineTess_TestInOutPacking.pipe +++ b/llpc/test/shaderdb/general/PipelineTess_TestInOutPacking.pipe @@ -2,31 +2,35 @@ ; RUN: amdllpc -enable-part-pipeline=0 -v %gfxip %s | FileCheck -check-prefix=SHADERTEST_PP0 %s ; SHADERTEST_PP0-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST_PP0: [[VERTEX_BASE:%[0-9a-zA-Z.]+]] = mul i32 %{{[0-9]*}}, 48 +; SHADERTEST_PP0: [[VERTEX_BASE:%[0-9a-zA-Z.]+]] = mul i32 %{{[0-9]*}}, 192 ; SHADERTEST_PP0: [[P0:%[0-9a-zA-Z.]+]] = getelementptr {{i8|i32}}, ptr addrspace(3) {{.*}}, i32 [[VERTEX_BASE]] -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(44|176)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(45|180)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(46|184)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(47|188)}} -; SHADERTEST_PP0: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 1 -; SHADERTEST_PP0: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 4 -; SHADERTEST_PP0: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 5 -; SHADERTEST_PP0: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 8 -; SHADERTEST_PP0: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 9 -; SHADERTEST_PP0: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 10 -; SHADERTEST_PP0: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 12 -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(28|112)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(29|116)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(30|120)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(31|124)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(32|128)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(33|132)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(36|144)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(37|148)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(38|152)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(39|156)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(40|160)}} -; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(41|164)}} +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1536 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1540 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1552 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1556 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1568 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1572 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1576 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1584 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1600 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1616 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1632 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1648 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1652 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1656 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1660 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1664 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1668 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1680 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1684 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1688 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1692 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1696 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1700 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1712 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1716 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1720 +; SHADERTEST_PP0: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1724 ; SHADERTEST_PP0: call void @llvm.amdgcn.exp.f32(i32 {{.*}}32, i32 {{.*}}15, float %{{[^,]*}}, float %{{[^,]*}}, float %{{[^,]*}}, float %{{[^,]*}}, i1 {{.*}}false, i1 {{.*}}false) ; SHADERTEST_PP0: call void @llvm.amdgcn.exp.f32(i32 {{.*}}33, i32 {{.*}}3, float %{{[^,]*}}, float %{{[^,]*}}, float poison, float poison, i1 {{.*}}false, i1 {{.*}}false) ; SHADERTEST_PP0: call float @llvm.amdgcn.interp.p1(float %{{[^,]*}}, i32 1, i32 1, i32 %PrimMask) @@ -50,31 +54,35 @@ ; SHADERTEST_PP1: call float @llvm.amdgcn.interp.p1(float %{{[^,]*}}, i32 1, i32 0, i32 %PrimMask) ; Pre-rasterization part-pipeline: ; SHADERTEST_PP1-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST_PP1: [[VERTEX_BASE:%[0-9a-zA-Z.]+]] = mul i32 %{{[0-9]*}}, 48 -; SHADERTEST_PP1: [[P0:%[0-9a-zA-Z.]+]] = getelementptr i32, ptr addrspace(3) {{.*}}, i32 [[VERTEX_BASE]] -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(44|176)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(45|180)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(46|184)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(47|188)}} -; SHADERTEST_PP1: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 1 -; SHADERTEST_PP1: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 4 -; SHADERTEST_PP1: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 5 -; SHADERTEST_PP1: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 8 -; SHADERTEST_PP1: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 9 -; SHADERTEST_PP1: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 10 -; SHADERTEST_PP1: %{{[0-9]*}} = {{add|or}} {{.*}}i32 [[VERTEX_BASE]], 12 -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(28|112)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(29|116)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(30|120)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(31|124)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(32|128)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(33|132)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(36|144)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(37|148)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(38|152)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(39|156)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(40|160)}} -; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8|i32}}, ptr addrspace(3) [[P0]], i32 {{(41|164)}} +; SHADERTEST_PP1: [[VERTEX_BASE:%[0-9a-zA-Z.]+]] = mul i32 %{{[0-9]*}}, 192 +; SHADERTEST_PP1: [[P0:%[0-9a-zA-Z.]+]] = getelementptr i8, ptr addrspace(3) {{.*}}, i32 [[VERTEX_BASE]] +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1536 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1540 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1552 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1556 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1568 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1572 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1576 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1584 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1600 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1616 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1632 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1648 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1652 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1656 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1660 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1664 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1668 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1680 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1684 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1688 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1692 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1696 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1700 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1712 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1716 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1720 +; SHADERTEST_PP1: %{{[0-9]*}} = getelementptr {{i8}}, ptr addrspace(3) [[P0]], i32 1724 ; SHADERTEST_PP1: call void @llvm.amdgcn.exp.f32(i32 {{.*}}32, i32 {{.*}}15, float %{{[^,]*}}, float %{{[^,]*}}, float %{{[^,]*}}, float %{{[^,]*}}, i1 {{.*}}false, i1 {{.*}}false) ; SHADERTEST_PP1: call void @llvm.amdgcn.exp.f32(i32 {{.*}}33, i32 {{.*}}3, float %{{[^,]*}}, float %{{[^,]*}}, float poison, float poison, i1 {{.*}}false, i1 {{.*}}false) ; SHADERTEST_PP1: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/general/PipelineTess_XfbWithManyComponents.pipe b/llpc/test/shaderdb/general/PipelineTess_XfbWithManyComponents.pipe index 4533eca767..db7235010b 100644 --- a/llpc/test/shaderdb/general/PipelineTess_XfbWithManyComponents.pipe +++ b/llpc/test/shaderdb/general/PipelineTess_XfbWithManyComponents.pipe @@ -31,28 +31,28 @@ ; SHADERTEST-NEXT: [[v4:%[0-9]*]] = load float, ptr addrspace(3) [[ldsPtr1]], align 4 ; SHADERTEST-NEXT: [[offset1:%[0-9]*]] = mul i32 %threadIdInSubgroup, 1536 ; SHADERTEST-NEXT: [[offset2:%[0-9]*]] = or disjoint i32 [[offset1]], 508 -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.f32(float [[v4]], <4 x i32> %{{[0-9]*}}, i32 [[offset2]], i32 %{{[0-9]*}}, i32 22, i32 3) +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.f32{{(\.v4i32)?}}(float [[v4]], <4 x i32> %{{[0-9]*}}, i32 [[offset2]], i32 %{{[0-9]*}}, i32 22, i32 3) ; Read v3[31] <- LDS ; SHADERTEST: [[ldsPtr2:%[0-9]*]] = getelementptr i8, ptr addrspace(3) %{{[0-9]*}}, i32 128 ; SHADERTEST-NEXT: [[v3:%[0-9]*]] = load float, ptr addrspace(3) [[ldsPtr2]], align 4 ; SHADERTEST-NEXT: [[offset3:%[0-9]*]] = mul i32 %threadIdInSubgroup, 1536 ; SHADERTEST-NEXT: [[offset4:%[0-9]*]] = or disjoint i32 [[offset3]], 380 -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.f32(float [[v3]], <4 x i32> %{{[0-9]*}}, i32 [[offset4]], i32 %{{[0-9]*}}, i32 22, i32 3) +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.f32{{(\.v4i32)?}}(float [[v3]], <4 x i32> %{{[0-9]*}}, i32 [[offset4]], i32 %{{[0-9]*}}, i32 22, i32 3) ; Read v2[31] <- LDS ; SHADERTEST: [[ldsPtr3:%[0-9]*]] = getelementptr i8, ptr addrspace(3) %{{[0-9]*}}, i32 256 ; SHADERTEST-NEXT: [[v2:%[0-9]*]] = load float, ptr addrspace(3) [[ldsPtr3]], align 4 ; SHADERTEST-NEXT: [[offset5:%[0-9]*]] = mul i32 %threadIdInSubgroup, 1536 ; SHADERTEST-NEXT: [[offset6:%[0-9]*]] = or disjoint i32 [[offset5]], 252 -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.f32(float [[v2]], <4 x i32> %{{[0-9]*}}, i32 [[offset6]], i32 %{{[0-9]*}}, i32 22, i32 3) +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.f32{{(\.v4i32)?}}(float [[v2]], <4 x i32> %{{[0-9]*}}, i32 [[offset6]], i32 %{{[0-9]*}}, i32 22, i32 3) : Read v1[31] <- LDS ; SHADERTEST: [[ldsPtr4:%[0-9]*]] = getelementptr i8, ptr addrspace(3) %{{[0-9]*}}, i32 384 ; SHADERTEST-NEXT: [[v1:%[0-9]*]] = load float, ptr addrspace(3) [[ldsPtr4]], align 4 ; SHADERTEST-NEXT: [[offset7:%[0-9]*]] = mul i32 %threadIdInSubgroup, 1536 ; SHADERTEST-NEXT: [[offset8:%[0-9]*]] = or disjoint i32 [[offset7]], 124 -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.f32(float [[v1]], <4 x i32> %{{[0-9]*}}, i32 [[offset8]], i32 %{{[0-9]*}}, i32 22, i32 3) +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.f32{{(\.v4i32)?}}(float [[v1]], <4 x i32> %{{[0-9]*}}, i32 [[offset8]], i32 %{{[0-9]*}}, i32 22, i32 3) ; SHADERTEST: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/general/PipelineVsFs_DynamicSampleInfo.pipe b/llpc/test/shaderdb/general/PipelineVsFs_DynamicSampleInfo.pipe index 61e32230f7..53d387a973 100644 --- a/llpc/test/shaderdb/general/PipelineVsFs_DynamicSampleInfo.pipe +++ b/llpc/test/shaderdb/general/PipelineVsFs_DynamicSampleInfo.pipe @@ -87,9 +87,9 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) ; SHADERTEST-NEXT: [[TMP5:%.*]] = getelementptr <4 x i32>, ptr addrspace(4) [[TMP4]], i64 0 ; SHADERTEST-NEXT: [[TMP6:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP5]], align 16, !invariant.load !14 -; SHADERTEST-NEXT: [[TMP7:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32(<4 x i32> [[TMP6]], i32 [[VERTEXINDEX]], i32 16, i32 0, i32 22, i32 0) +; SHADERTEST-NEXT: [[TMP7:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP6]], i32 [[VERTEXINDEX]], i32 16, i32 0, i32 22, i32 0) ; SHADERTEST-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i64 0 -; SHADERTEST-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32(<4 x i32> [[TMP6]], i32 [[VERTEXINDEX]], i32 20, i32 0, i32 22, i32 0) +; SHADERTEST-NEXT: [[TMP9:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP6]], i32 [[VERTEXINDEX]], i32 20, i32 0, i32 22, i32 0) ; SHADERTEST-NEXT: [[TMP10:%.*]] = insertelement <2 x i32> [[TMP8]], i32 [[TMP9]], i64 1 ; SHADERTEST-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[TMP10]], i32 0 ; SHADERTEST-NEXT: [[TMP12:%.*]] = insertelement <2 x i32> poison, i32 [[TMP11]], i32 0 @@ -98,13 +98,13 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[VERTEX1_0:%.*]] = bitcast <2 x i32> [[TMP14]] to <2 x float> ; SHADERTEST-NEXT: [[TMP15:%.*]] = getelementptr <4 x i32>, ptr addrspace(4) [[TMP4]], i64 0 ; SHADERTEST-NEXT: [[TMP16:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP15]], align 16, !invariant.load !14 -; SHADERTEST-NEXT: [[TMP17:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32(<4 x i32> [[TMP16]], i32 [[VERTEXINDEX]], i32 0, i32 0, i32 22, i32 0) +; SHADERTEST-NEXT: [[TMP17:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP16]], i32 [[VERTEXINDEX]], i32 0, i32 0, i32 22, i32 0) ; SHADERTEST-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> poison, i32 [[TMP17]], i64 0 -; SHADERTEST-NEXT: [[TMP19:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32(<4 x i32> [[TMP16]], i32 [[VERTEXINDEX]], i32 4, i32 0, i32 22, i32 0) +; SHADERTEST-NEXT: [[TMP19:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP16]], i32 [[VERTEXINDEX]], i32 4, i32 0, i32 22, i32 0) ; SHADERTEST-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> [[TMP18]], i32 [[TMP19]], i64 1 -; SHADERTEST-NEXT: [[TMP21:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32(<4 x i32> [[TMP16]], i32 [[VERTEXINDEX]], i32 8, i32 0, i32 22, i32 0) +; SHADERTEST-NEXT: [[TMP21:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP16]], i32 [[VERTEXINDEX]], i32 8, i32 0, i32 22, i32 0) ; SHADERTEST-NEXT: [[TMP22:%.*]] = insertelement <4 x i32> [[TMP20]], i32 [[TMP21]], i64 2 -; SHADERTEST-NEXT: [[TMP23:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32(<4 x i32> [[TMP16]], i32 [[VERTEXINDEX]], i32 12, i32 0, i32 22, i32 0) +; SHADERTEST-NEXT: [[TMP23:%.*]] = call i32 @llvm.amdgcn.struct.tbuffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[TMP16]], i32 [[VERTEXINDEX]], i32 12, i32 0, i32 22, i32 0) ; SHADERTEST-NEXT: [[TMP24:%.*]] = insertelement <4 x i32> [[TMP22]], i32 [[TMP23]], i64 3 ; SHADERTEST-NEXT: [[TMP25:%.*]] = extractelement <4 x i32> [[TMP24]], i32 0 ; SHADERTEST-NEXT: [[TMP26:%.*]] = insertelement <4 x i32> poison, i32 [[TMP25]], i32 0 @@ -119,25 +119,17 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[TMP34:%.*]] = extractelement <2 x float> [[VERTEX1_0]], i64 1 ; SHADERTEST-NEXT: [[TMP35:%.*]] = extractelement <2 x float> [[VERTEX1_0]], i64 0 ; SHADERTEST-NEXT: [[TMP36:%.*]] = extractelement <2 x float> [[VERTEX1_0]], i64 1 -; SHADERTEST-NEXT: [[TMP37:%.*]] = bitcast float [[TMP33]] to i32 -; SHADERTEST-NEXT: [[TMP38:%.*]] = bitcast float [[TMP34]] to i32 -; SHADERTEST-NEXT: [[TMP39:%.*]] = bitcast float [[TMP35]] to i32 -; SHADERTEST-NEXT: [[TMP40:%.*]] = bitcast float [[TMP36]] to i32 -; SHADERTEST-NEXT: [[TMP41:%.*]] = bitcast i32 [[TMP37]] to float -; SHADERTEST-NEXT: [[TMP42:%.*]] = insertelement <4 x float> poison, float [[TMP41]], i64 0 -; SHADERTEST-NEXT: [[TMP43:%.*]] = bitcast i32 [[TMP38]] to float -; SHADERTEST-NEXT: [[TMP44:%.*]] = insertelement <4 x float> [[TMP42]], float [[TMP43]], i64 1 -; SHADERTEST-NEXT: [[TMP45:%.*]] = bitcast i32 [[TMP39]] to float -; SHADERTEST-NEXT: [[TMP46:%.*]] = insertelement <4 x float> [[TMP44]], float [[TMP45]], i64 2 -; SHADERTEST-NEXT: [[TMP47:%.*]] = bitcast i32 [[TMP40]] to float -; SHADERTEST-NEXT: [[TMP48:%.*]] = insertelement <4 x float> [[TMP46]], float [[TMP47]], i64 3 -; SHADERTEST-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 0, i32 0, <4 x float> [[TMP48]]) #[[ATTR7:[0-9]+]] +; SHADERTEST-NEXT: [[TMP37:%.*]] = insertelement <4 x float> poison, float [[TMP33]], i64 0 +; SHADERTEST-NEXT: [[TMP38:%.*]] = insertelement <4 x float> [[TMP37]], float [[TMP34]], i64 1 +; SHADERTEST-NEXT: [[TMP39:%.*]] = insertelement <4 x float> [[TMP38]], float [[TMP35]], i64 2 +; SHADERTEST-NEXT: [[TMP40:%.*]] = insertelement <4 x float> [[TMP39]], float [[TMP36]], i64 3 +; SHADERTEST-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 0, i32 0, <4 x float> [[TMP40]]) #[[ATTR7:[0-9]+]] ; SHADERTEST-NEXT: call void @lgc.output.export.builtin.Position.i32.v4f32(i32 0, <4 x float> [[VERTEX0_0]]) #[[ATTR7]] ; SHADERTEST-NEXT: ret void ; ; ; SHADERTEST-LABEL: define {{[^@]+}}@lgc.shader.FS.main -; SHADERTEST-SAME: (i32 inreg noundef [[GLOBALTABLE:%.*]], i32 inreg noundef [[SAMPLEINFO:%.*]], i32 inreg noundef [[PRIMMASK:%.*]], <2 x float> noundef [[PERSPINTERPSAMPLE:%.*]], <2 x float> noundef [[PERSPINTERPCENTER:%.*]], <2 x float> noundef [[PERSPINTERPCENTROID:%.*]], <3 x float> noundef [[PERSPINTERPPULLMODE:%.*]], <2 x float> noundef [[LINEARINTERPSAMPLE:%.*]], <2 x float> noundef [[LINEARINTERPCENTER:%.*]], <2 x float> noundef [[LINEARINTERPCENTROID:%.*]], float noundef [[LINESTIPPLE:%.*]], float noundef [[FRAGCOORDX:%.*]], float noundef [[FRAGCOORDY:%.*]], float noundef [[FRAGCOORDZ:%.*]], float noundef [[FRAGCOORDW:%.*]], i32 noundef [[FRONTFACING:%.*]], i32 noundef [[ANCILLARY:%.*]], i32 noundef [[SAMPLECOVERAGE:%.*]], i32 noundef [[FIXEDXY:%.*]]) #[[ATTR1:[0-9]+]] !spirv.ExecutionModel !15 !lgc.shaderstage !16 { +; SHADERTEST-SAME: (i32 inreg noundef [[GLOBALTABLE:%.*]], i32 inreg noundef [[COMPOSITEDATA:%.*]], i32 inreg noundef [[PRIMMASK:%.*]], <2 x float> noundef [[PERSPINTERPSAMPLE:%.*]], <2 x float> noundef [[PERSPINTERPCENTER:%.*]], <2 x float> noundef [[PERSPINTERPCENTROID:%.*]], <3 x float> noundef [[PERSPINTERPPULLMODE:%.*]], <2 x float> noundef [[LINEARINTERPSAMPLE:%.*]], <2 x float> noundef [[LINEARINTERPCENTER:%.*]], <2 x float> noundef [[LINEARINTERPCENTROID:%.*]], float noundef [[LINESTIPPLE:%.*]], float noundef [[FRAGCOORDX:%.*]], float noundef [[FRAGCOORDY:%.*]], float noundef [[FRAGCOORDZ:%.*]], float noundef [[FRAGCOORDW:%.*]], i32 noundef [[FRONTFACING:%.*]], i32 noundef [[ANCILLARY:%.*]], i32 noundef [[SAMPLECOVERAGE:%.*]], i32 noundef [[FIXEDXY:%.*]]) #[[ATTR1:[0-9]+]] !spirv.ExecutionModel !15 !lgc.shaderstage !16 { ; SHADERTEST-NEXT: .entry: ; SHADERTEST-NEXT: [[INTERPPERSPSAMPLE:%.*]] = call <2 x float> @lgc.input.import.builtin.InterpPerspSample.v2f32.i32(i32 268435456) #[[ATTR3:[0-9]+]] ; SHADERTEST-NEXT: [[TMP0:%.*]] = call float (...) @lgc.input.import.interpolated__f32(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 0, <2 x float> [[INTERPPERSPSAMPLE]]) @@ -145,8 +137,8 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[TMP2:%.*]] = call float (...) @lgc.input.import.interpolated__f32(i1 false, i32 1, i32 0, i32 1, i32 poison, i32 0, <2 x float> [[INTERPPERSPSAMPLE]]) ; SHADERTEST-NEXT: [[TMP3:%.*]] = insertelement <2 x float> [[TMP1]], float [[TMP2]], i64 1 ; SHADERTEST-NEXT: [[SAMPLEPOSITION:%.*]] = call <2 x float> @lgc.input.import.builtin.SamplePosition.v2f32.i32(i32 19) #[[ATTR3]] -; SHADERTEST-NEXT: [[TMP4:%.*]] = fadd reassoc nnan nsz arcp contract afn <2 x float> [[SAMPLEPOSITION]], -; SHADERTEST-NEXT: [[INTERPPULLMODE:%.*]] = call <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32(i32 268435459) #[[ATTR3]] +; SHADERTEST-NEXT: [[TMP4:%.*]] = fadd reassoc nnan nsz arcp contract afn <2 x float> [[SAMPLEPOSITION]], {{(splat \(float \-5\.000000e\-01\))|()}} +; SHADERTEST-NEXT: [[INTERPPULLMODE:%.*]] = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32(i32 268435459) #[[ATTR3]] ; SHADERTEST-NEXT: [[TMP5:%.*]] = extractelement <2 x float> [[TMP4]], i64 0 ; SHADERTEST-NEXT: [[TMP6:%.*]] = extractelement <2 x float> [[TMP4]], i64 1 ; SHADERTEST-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <3 x float> poison, float [[TMP5]], i64 0 @@ -159,8 +151,8 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float ; SHADERTEST-NEXT: [[TMP11:%.*]] = call i32 @llvm.amdgcn.mov.dpp.i32(i32 [[TMP8]], i32 160, i32 15, i32 15, i1 true) ; SHADERTEST-NEXT: [[TMP12:%.*]] = bitcast i32 [[TMP11]] to float -; SHADERTEST-NEXT: [[TMP13:%.*]] = fsub float [[TMP10]], [[TMP12]] -; SHADERTEST-NEXT: [[TMP14:%.*]] = call float @llvm.amdgcn.wqm.f32(float [[TMP13]]) +; SHADERTEST-NEXT: [[TMP13:%.*]] = fsub reassoc nnan nsz arcp contract afn float [[TMP10]], [[TMP12]] +; SHADERTEST-NEXT: [[TMP14:%.*]] = call reassoc nnan nsz arcp contract afn float @llvm.amdgcn.wqm.f32(float [[TMP13]]) ; SHADERTEST-NEXT: [[TMP15:%.*]] = insertelement <3 x float> poison, float [[TMP14]], i64 0 ; SHADERTEST-NEXT: [[TMP16:%.*]] = extractelement <3 x float> [[INTERPPULLMODE]], i64 1 ; SHADERTEST-NEXT: [[TMP17:%.*]] = bitcast float [[TMP16]] to i32 @@ -168,8 +160,8 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[TMP19:%.*]] = bitcast i32 [[TMP18]] to float ; SHADERTEST-NEXT: [[TMP20:%.*]] = call i32 @llvm.amdgcn.mov.dpp.i32(i32 [[TMP17]], i32 160, i32 15, i32 15, i1 true) ; SHADERTEST-NEXT: [[TMP21:%.*]] = bitcast i32 [[TMP20]] to float -; SHADERTEST-NEXT: [[TMP22:%.*]] = fsub float [[TMP19]], [[TMP21]] -; SHADERTEST-NEXT: [[TMP23:%.*]] = call float @llvm.amdgcn.wqm.f32(float [[TMP22]]) +; SHADERTEST-NEXT: [[TMP22:%.*]] = fsub reassoc nnan nsz arcp contract afn float [[TMP19]], [[TMP21]] +; SHADERTEST-NEXT: [[TMP23:%.*]] = call reassoc nnan nsz arcp contract afn float @llvm.amdgcn.wqm.f32(float [[TMP22]]) ; SHADERTEST-NEXT: [[TMP24:%.*]] = insertelement <3 x float> [[TMP15]], float [[TMP23]], i64 1 ; SHADERTEST-NEXT: [[TMP25:%.*]] = extractelement <3 x float> [[INTERPPULLMODE]], i64 2 ; SHADERTEST-NEXT: [[TMP26:%.*]] = bitcast float [[TMP25]] to i32 @@ -177,8 +169,8 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[TMP28:%.*]] = bitcast i32 [[TMP27]] to float ; SHADERTEST-NEXT: [[TMP29:%.*]] = call i32 @llvm.amdgcn.mov.dpp.i32(i32 [[TMP26]], i32 160, i32 15, i32 15, i1 true) ; SHADERTEST-NEXT: [[TMP30:%.*]] = bitcast i32 [[TMP29]] to float -; SHADERTEST-NEXT: [[TMP31:%.*]] = fsub float [[TMP28]], [[TMP30]] -; SHADERTEST-NEXT: [[TMP32:%.*]] = call float @llvm.amdgcn.wqm.f32(float [[TMP31]]) +; SHADERTEST-NEXT: [[TMP31:%.*]] = fsub reassoc nnan nsz arcp contract afn float [[TMP28]], [[TMP30]] +; SHADERTEST-NEXT: [[TMP32:%.*]] = call reassoc nnan nsz arcp contract afn float @llvm.amdgcn.wqm.f32(float [[TMP31]]) ; SHADERTEST-NEXT: [[TMP33:%.*]] = insertelement <3 x float> [[TMP24]], float [[TMP32]], i64 2 ; SHADERTEST-NEXT: [[TMP34:%.*]] = extractelement <3 x float> [[INTERPPULLMODE]], i64 0 ; SHADERTEST-NEXT: [[TMP35:%.*]] = bitcast float [[TMP34]] to i32 @@ -186,8 +178,8 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[TMP37:%.*]] = bitcast i32 [[TMP36]] to float ; SHADERTEST-NEXT: [[TMP38:%.*]] = call i32 @llvm.amdgcn.mov.dpp.i32(i32 [[TMP35]], i32 68, i32 15, i32 15, i1 true) ; SHADERTEST-NEXT: [[TMP39:%.*]] = bitcast i32 [[TMP38]] to float -; SHADERTEST-NEXT: [[TMP40:%.*]] = fsub float [[TMP37]], [[TMP39]] -; SHADERTEST-NEXT: [[TMP41:%.*]] = call float @llvm.amdgcn.wqm.f32(float [[TMP40]]) +; SHADERTEST-NEXT: [[TMP40:%.*]] = fsub reassoc nnan nsz arcp contract afn float [[TMP37]], [[TMP39]] +; SHADERTEST-NEXT: [[TMP41:%.*]] = call reassoc nnan nsz arcp contract afn float @llvm.amdgcn.wqm.f32(float [[TMP40]]) ; SHADERTEST-NEXT: [[TMP42:%.*]] = insertelement <3 x float> poison, float [[TMP41]], i64 0 ; SHADERTEST-NEXT: [[TMP43:%.*]] = extractelement <3 x float> [[INTERPPULLMODE]], i64 1 ; SHADERTEST-NEXT: [[TMP44:%.*]] = bitcast float [[TMP43]] to i32 @@ -195,8 +187,8 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[TMP46:%.*]] = bitcast i32 [[TMP45]] to float ; SHADERTEST-NEXT: [[TMP47:%.*]] = call i32 @llvm.amdgcn.mov.dpp.i32(i32 [[TMP44]], i32 68, i32 15, i32 15, i1 true) ; SHADERTEST-NEXT: [[TMP48:%.*]] = bitcast i32 [[TMP47]] to float -; SHADERTEST-NEXT: [[TMP49:%.*]] = fsub float [[TMP46]], [[TMP48]] -; SHADERTEST-NEXT: [[TMP50:%.*]] = call float @llvm.amdgcn.wqm.f32(float [[TMP49]]) +; SHADERTEST-NEXT: [[TMP49:%.*]] = fsub reassoc nnan nsz arcp contract afn float [[TMP46]], [[TMP48]] +; SHADERTEST-NEXT: [[TMP50:%.*]] = call reassoc nnan nsz arcp contract afn float @llvm.amdgcn.wqm.f32(float [[TMP49]]) ; SHADERTEST-NEXT: [[TMP51:%.*]] = insertelement <3 x float> [[TMP42]], float [[TMP50]], i64 1 ; SHADERTEST-NEXT: [[TMP52:%.*]] = extractelement <3 x float> [[INTERPPULLMODE]], i64 2 ; SHADERTEST-NEXT: [[TMP53:%.*]] = bitcast float [[TMP52]] to i32 @@ -204,19 +196,19 @@ attribute[1].offset = 16 ; SHADERTEST-NEXT: [[TMP55:%.*]] = bitcast i32 [[TMP54]] to float ; SHADERTEST-NEXT: [[TMP56:%.*]] = call i32 @llvm.amdgcn.mov.dpp.i32(i32 [[TMP53]], i32 68, i32 15, i32 15, i1 true) ; SHADERTEST-NEXT: [[TMP57:%.*]] = bitcast i32 [[TMP56]] to float -; SHADERTEST-NEXT: [[TMP58:%.*]] = fsub float [[TMP55]], [[TMP57]] -; SHADERTEST-NEXT: [[TMP59:%.*]] = call float @llvm.amdgcn.wqm.f32(float [[TMP58]]) +; SHADERTEST-NEXT: [[TMP58:%.*]] = fsub reassoc nnan nsz arcp contract afn float [[TMP55]], [[TMP57]] +; SHADERTEST-NEXT: [[TMP59:%.*]] = call reassoc nnan nsz arcp contract afn float @llvm.amdgcn.wqm.f32(float [[TMP58]]) ; SHADERTEST-NEXT: [[TMP60:%.*]] = insertelement <3 x float> [[TMP51]], float [[TMP59]], i64 2 -; SHADERTEST-NEXT: [[TMP61:%.*]] = fmul <3 x float> [[TMP33]], [[DOTSPLAT]] -; SHADERTEST-NEXT: [[TMP62:%.*]] = fadd <3 x float> [[INTERPPULLMODE]], [[TMP61]] -; SHADERTEST-NEXT: [[TMP63:%.*]] = fmul <3 x float> [[TMP60]], [[DOTSPLAT2]] -; SHADERTEST-NEXT: [[TMP64:%.*]] = fadd <3 x float> [[TMP62]], [[TMP63]] +; SHADERTEST-NEXT: [[TMP61:%.*]] = fmul reassoc nnan nsz arcp contract afn <3 x float> [[TMP33]], [[DOTSPLAT]] +; SHADERTEST-NEXT: [[TMP62:%.*]] = fadd reassoc nnan nsz arcp contract afn <3 x float> [[INTERPPULLMODE]], [[TMP61]] +; SHADERTEST-NEXT: [[TMP63:%.*]] = fmul reassoc nnan nsz arcp contract afn <3 x float> [[TMP60]], [[DOTSPLAT2]] +; SHADERTEST-NEXT: [[TMP64:%.*]] = fadd reassoc nnan nsz arcp contract afn <3 x float> [[TMP62]], [[TMP63]] ; SHADERTEST-NEXT: [[TMP65:%.*]] = shufflevector <3 x float> [[TMP64]], <3 x float> [[TMP64]], <2 x i32> ; SHADERTEST-NEXT: [[TMP66:%.*]] = extractelement <3 x float> [[TMP64]], i64 2 -; SHADERTEST-NEXT: [[TMP67:%.*]] = fdiv float 1.000000e+00, [[TMP66]] +; SHADERTEST-NEXT: [[TMP67:%.*]] = fdiv reassoc nnan nsz arcp contract afn float 1.000000e+00, [[TMP66]] ; SHADERTEST-NEXT: [[DOTSPLATINSERT3:%.*]] = insertelement <2 x float> poison, float [[TMP67]], i64 0 ; SHADERTEST-NEXT: [[DOTSPLAT4:%.*]] = shufflevector <2 x float> [[DOTSPLATINSERT3]], <2 x float> poison, <2 x i32> zeroinitializer -; SHADERTEST-NEXT: [[TMP68:%.*]] = fmul <2 x float> [[TMP65]], [[DOTSPLAT4]] +; SHADERTEST-NEXT: [[TMP68:%.*]] = fmul reassoc nnan nsz arcp contract afn <2 x float> [[TMP65]], [[DOTSPLAT4]] ; SHADERTEST-NEXT: [[TMP69:%.*]] = call float (...) @lgc.input.import.interpolated__f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 0, <2 x float> [[TMP68]]) ; SHADERTEST-NEXT: [[TMP70:%.*]] = insertelement <2 x float> poison, float [[TMP69]], i64 0 ; SHADERTEST-NEXT: [[TMP71:%.*]] = call float (...) @lgc.input.import.interpolated__f32(i1 false, i32 0, i32 0, i32 1, i32 poison, i32 0, <2 x float> [[TMP68]]) diff --git a/llpc/test/shaderdb/general/PipelineVsFs_GlPositionFMF.pipe b/llpc/test/shaderdb/general/PipelineVsFs_GlPositionFMF.pipe index fd4a2d1dd5..6c4ca8f77b 100644 --- a/llpc/test/shaderdb/general/PipelineVsFs_GlPositionFMF.pipe +++ b/llpc/test/shaderdb/general/PipelineVsFs_GlPositionFMF.pipe @@ -5,10 +5,13 @@ ; RUN: amdllpc --gfxip=10.3.0 -v %s | FileCheck -check-prefixes=SHADERTEST,OPT %s ; RUN: amdllpc --gfxip=10.3.0 --disable-gl-position-opt=1 -v %s | FileCheck -check-prefixes=SHADERTEST,NOOPT %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; OPT: fsub nnan nsz float 1.000000e+00, %__llpc_input_proxy_in_Pos.0.vec.extract +; OPT: fsub nnan nsz afn float 1.000000e+00, %__llpc_input_proxy_in_Pos.0.vec.extract +; OPT: call nnan nsz afn <4 x float> (...) @lgc.create.sqrt.v4f32 ; NOOPT: fsub float 1.000000e+00, %__llpc_input_proxy_in_Pos.0.vec.extract +; NOOPT: call <4 x float> (...) @lgc.create.sqrt.v4f32 ; SHADERTEST-LABEL: _amdgpu_vs_main: ; SHADERTEST: v_sub_f32_e32 v{{[0-9]+}}, 1.0, v{{[0-9]+}} +; OPT: v_sqrt_f32_e32 v{{[0-9]+}}, v{{[0-9]+}} ; END_SHADERTEST [Version] @@ -23,7 +26,7 @@ layout(location = 1) in vec4 in_Col; void main() { float t = (((1.0 - in_Pos.x) * 0.23529411852359771728515625) * (clamp(in_Pos.y * 0.125, 0.25, 1.0) * in_Pos.z)) + in_Pos.w; - gl_Position = vec4(t, 0, 0, 1.0); + gl_Position = sqrt(vec4(t, 0, 0, 1.0)); } [VsInfo] diff --git a/llpc/test/shaderdb/general/PipelineVsFs_PixelShaderSamplesZero.pipe b/llpc/test/shaderdb/general/PipelineVsFs_PixelShaderSamplesZero.pipe index 8317292c12..7f552f8686 100644 --- a/llpc/test/shaderdb/general/PipelineVsFs_PixelShaderSamplesZero.pipe +++ b/llpc/test/shaderdb/general/PipelineVsFs_PixelShaderSamplesZero.pipe @@ -26,7 +26,7 @@ version = 40 OpMemoryModel Logical GLSL450 OpEntryPoint Vertex %1 "main" %75 %gl_Position %77 OpExecutionMode %1 SignedZeroInfNanPreserve 32 - %2 = OpString "VMware VMGI Translator (shader 0)" + %2 = OpString "VMGI Translator (shader 0)" %3 = OpString "VERT" OpDecorate %75 Location 0 OpDecorate %gl_Position BuiltIn Position @@ -177,7 +177,7 @@ options.forwardPropagateNoContract = 1 OpEntryPoint Fragment %1 "main" %gl_SampleMask %79 %80 OpExecutionMode %1 OriginUpperLeft OpExecutionMode %1 SignedZeroInfNanPreserve 32 - %2 = OpString "VMware VMGI Translator (shader 1)" + %2 = OpString "VMGI Translator (shader 1)" %3 = OpString "FRAG" OpDecorate %_arr_int_int_1 ArrayStride 4 OpDecorate %gl_SampleMask BuiltIn SampleMask @@ -374,7 +374,7 @@ colorBuffer[0].blendSrcAlphaToColor = 0 nggState.enableNgg = 1 nggState.enableGsUse = 0 nggState.forceCullingMode = 0 -nggState.compactVertex = 0 +nggState.compactVertex = 1 nggState.enableBackfaceCulling = 1 nggState.enableFrustumCulling = 0 nggState.enableBoxFilterCulling = 0 diff --git a/llpc/test/shaderdb/general/PipelineVsFs_TestColorFormat_A8.pipe b/llpc/test/shaderdb/general/PipelineVsFs_TestColorFormat_A8.pipe new file mode 100644 index 0000000000..cd2a1d69e7 --- /dev/null +++ b/llpc/test/shaderdb/general/PipelineVsFs_TestColorFormat_A8.pipe @@ -0,0 +1,264 @@ +; NOTE: Assertions have been autogenerated by tool/update_llpc_test_checks.py UTC_ARGS: --check-pal-metadata +; Test color export format: VK_FORMAT_A8_UNORM_KHR which must contain alpha channel. + +; RUN: amdllpc -o - -filetype=asm %s | FileCheck -check-prefix=CHECK %s + +[Version] +version = 65 + +[VsGlsl] +#version 450 +layout(push_constant, std430) uniform PushConstants +{ + float texWidth; + float texHeight; +} pushc; + +layout(location = 0) in vec2 inPosition; +layout(location = 1) in vec2 inTexCoord; +layout(location = 0) out vec2 fragTexCoord; +void main() { + gl_Position = vec4(inPosition, 0.0, 1.0); + fragTexCoord = vec2(inTexCoord.x, inTexCoord.y); +} + +[VsInfo] +entryPoint = main + +[FsGlsl] +#version 450 +layout(set = 0, binding = 0) uniform sampler2D texSampler; +layout(location = 0) in vec2 fragTexCoord; +layout(location = 0) out vec4 outColor; +void main() { + outColor = texture(texSampler, fragTexCoord); +} + +[FsInfo] +entryPoint = main + +[ResourceMapping] +userDataNode[0].visibility = 64 +userDataNode[0].type = DescriptorTableVaPtr +userDataNode[0].offsetInDwords = 0 +userDataNode[0].sizeInDwords = 1 +userDataNode[0].next[0].type = DescriptorCombinedTexture +userDataNode[0].next[0].offsetInDwords = 0 +userDataNode[0].next[0].sizeInDwords = 12 +userDataNode[0].next[0].set = 0x00000000 +userDataNode[0].next[0].binding = 0 +userDataNode[0].next[0].strideInDwords = 0 +userDataNode[1].visibility = 66 +userDataNode[1].type = PushConst +userDataNode[1].offsetInDwords = 1 +userDataNode[1].sizeInDwords = 2 +userDataNode[1].set = 0xFFFFFFFF +userDataNode[1].binding = 0 +userDataNode[1].strideInDwords = 0 +userDataNode[2].visibility = 4 +userDataNode[2].type = StreamOutTableVaPtr +userDataNode[2].offsetInDwords = 3 +userDataNode[2].sizeInDwords = 1 +userDataNode[3].visibility = 2 +userDataNode[3].type = IndirectUserDataVaPtr +userDataNode[3].offsetInDwords = 4 +userDataNode[3].sizeInDwords = 1 +userDataNode[3].indirectUserDataCount = 4 + +[GraphicsPipelineState] +topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_LIST +colorBuffer[0].format = VK_FORMAT_A8_UNORM_KHR +colorBuffer[0].channelWriteMask = 15 +colorBuffer[0].blendEnable = 0 +colorBuffer[0].blendSrcAlphaToColor = 0 + +[VertexInputState] +binding[0].binding = 0 +binding[0].stride = 16 +binding[0].inputRate = VK_VERTEX_INPUT_RATE_VERTEX +attribute[0].location = 0 +attribute[0].binding = 0 +attribute[0].format = VK_FORMAT_R32G32_SFLOAT +attribute[0].offset = 0 +attribute[1].location = 1 +attribute[1].binding = 0 +attribute[1].format = VK_FORMAT_R32G32_SFLOAT +attribute[1].offset = 8 + +; CHECK-LABEL: amdgpu_vs_main: +; CHECK: s_getpc_b64 s[4:5] +; CHECK-NEXT: s_mov_b32 s0, s1 +; CHECK-NEXT: s_mov_b32 s1, s5 +; CHECK-NEXT: v_add_nc_u32_e32 v0, s2, v0 +; CHECK-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x0 +; CHECK-NEXT: v_mov_b32_e32 v4, 1.0 +; CHECK-NEXT: v_mov_b32_e32 v5, 0 +; CHECK-NEXT: s_waitcnt lgkmcnt(0) +; CHECK-NEXT: tbuffer_load_format_xyzw v[0:3], v0, s[4:7], 0 format:[BUF_FMT_32_32_32_32_FLOAT] idxen +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: exp pos0 v0, v1, v5, v4 done +; CHECK-NEXT: exp param0 v2, v3, off, off +; CHECK-NEXT: s_endpgm +; +; CHECK-LABEL: amdgpu_ps_main: +; CHECK: s_mov_b64 s[12:13], exec +; CHECK-NEXT: s_wqm_b64 exec, exec +; CHECK-NEXT: s_mov_b32 s8, s1 +; CHECK-NEXT: s_getpc_b64 s[0:1] +; CHECK-NEXT: s_mov_b32 m0, s2 +; CHECK-NEXT: s_mov_b32 s9, s1 +; CHECK-NEXT: s_clause 0x1 +; CHECK-NEXT: s_load_dwordx8 s[0:7], s[8:9], 0x0 +; CHECK-NEXT: s_load_dwordx4 s[8:11], s[8:9], 0x20 +; CHECK-NEXT: v_interp_p1_f32_e32 v2, v0, attr0.x +; CHECK-NEXT: v_interp_p1_f32_e32 v3, v0, attr0.y +; CHECK-NEXT: v_interp_p2_f32_e32 v2, v1, attr0.x +; CHECK-NEXT: v_interp_p2_f32_e32 v3, v1, attr0.y +; CHECK-NEXT: s_and_b64 exec, exec, s[12:13] +; CHECK-NEXT: s_waitcnt lgkmcnt(0) +; CHECK-NEXT: s_and_b32 s12, s3, 0xfffffff +; CHECK-NEXT: s_cmp_lt_i32 s3, 0 +; CHECK-NEXT: s_cselect_b32 s3, s3, s12 +; CHECK-NEXT: image_sample v[0:3], v[2:3], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D +; CHECK-NEXT: s_waitcnt vmcnt(0) +; CHECK-NEXT: v_cvt_pkrtz_f16_f32_e32 v0, v0, v1 +; CHECK-NEXT: v_cvt_pkrtz_f16_f32_e32 v1, v2, v3 +; CHECK-NEXT: exp mrt0 v0, v0, v1, v1 done compr vm +; CHECK-NEXT: s_endpgm +; +; CHECK-LABEL: .amdgpu_pal_metadata +; CHECK-NEXT: --- +; CHECK-NEXT: amdpal.pipelines: +; CHECK-NEXT: - .api: Vulkan +; CHECK-NEXT: .graphics_registers: +; CHECK-NEXT: .aa_coverage_to_shader_select: InputCoverage +; CHECK-NEXT: .cb_shader_mask: +; CHECK-NEXT: .output0_enable: 0xf +; CHECK-NEXT: .output1_enable: 0 +; CHECK-NEXT: .output2_enable: 0 +; CHECK-NEXT: .output3_enable: 0 +; CHECK-NEXT: .output4_enable: 0 +; CHECK-NEXT: .output5_enable: 0 +; CHECK-NEXT: .output6_enable: 0 +; CHECK-NEXT: .output7_enable: 0 +; CHECK-NEXT: .db_shader_control: +; CHECK-NEXT: .alpha_to_mask_disable: true +; CHECK-NEXT: .conservative_z_export: 0 +; CHECK-NEXT: .depth_before_shader: 0 +; CHECK-NEXT: .exec_on_hier_fail: false +; CHECK-NEXT: .exec_on_noop: false +; CHECK-NEXT: .kill_enable: false +; CHECK-NEXT: .mask_export_enable: false +; CHECK-NEXT: .pre_shader_depth_coverage_enable: 0 +; CHECK-NEXT: .primitive_ordered_pixel_shader: false +; CHECK-NEXT: .stencil_test_val_export_enable: 0 +; CHECK-NEXT: .z_export_enable: 0 +; CHECK-NEXT: .z_order: 0x1 +; CHECK-NEXT: .ia_multi_vgt_param: +; CHECK-NEXT: .primgroup_size: 0x7f +; CHECK-NEXT: .pa_cl_clip_cntl: +; CHECK-NEXT: .dx_linear_attr_clip_ena: true +; CHECK-NEXT: .rasterization_kill: false +; CHECK-NEXT: .vte_vport_provoke_disable: false +; CHECK-NEXT: .pa_cl_vte_cntl: +; CHECK-NEXT: .vtx_w0_fmt: true +; CHECK-NEXT: .x_offset_ena: true +; CHECK-NEXT: .x_scale_ena: true +; CHECK-NEXT: .y_offset_ena: true +; CHECK-NEXT: .y_scale_ena: true +; CHECK-NEXT: .z_offset_ena: true +; CHECK-NEXT: .z_scale_ena: true +; CHECK-NEXT: .pa_sc_shader_control: +; CHECK-NEXT: .wave_break_region_size: 0 +; CHECK-NEXT: .pa_su_vtx_cntl: +; CHECK-NEXT: .pix_center: 0x1 +; CHECK-NEXT: .quant_mode: 0x5 +; CHECK-NEXT: .round_mode: 0x2 +; CHECK-NEXT: .ps_extra_lds_size: 0 +; CHECK-NEXT: .ps_iter_sample: false +; CHECK-NEXT: .spi_baryc_cntl: +; CHECK-NEXT: .front_face_all_bits: true +; CHECK-NEXT: .pos_float_location: 0 +; CHECK-NEXT: .spi_ps_in_control: +; CHECK-NEXT: .num_interps: 0x1 +; CHECK-NEXT: .ps_w32_en: false +; CHECK-NEXT: .spi_ps_input_addr: +; CHECK-NEXT: .ancillary_ena: false +; CHECK-NEXT: .front_face_ena: false +; CHECK-NEXT: .line_stipple_tex_ena: false +; CHECK-NEXT: .linear_center_ena: false +; CHECK-NEXT: .linear_centroid_ena: false +; CHECK-NEXT: .linear_sample_ena: false +; CHECK-NEXT: .persp_center_ena: true +; CHECK-NEXT: .persp_centroid_ena: false +; CHECK-NEXT: .persp_pull_model_ena: false +; CHECK-NEXT: .persp_sample_ena: false +; CHECK-NEXT: .pos_fixed_pt_ena: false +; CHECK-NEXT: .pos_w_float_ena: false +; CHECK-NEXT: .pos_x_float_ena: false +; CHECK-NEXT: .pos_y_float_ena: false +; CHECK-NEXT: .pos_z_float_ena: false +; CHECK-NEXT: .sample_coverage_ena: false +; CHECK-NEXT: .spi_ps_input_cntl: +; CHECK-NEXT: - .attr0_valid: 0 +; CHECK-NEXT: .attr1_valid: 0 +; CHECK-NEXT: .flat_shade: false +; CHECK-NEXT: .fp16_interp_mode: false +; CHECK-NEXT: .offset: 0 +; CHECK-NEXT: .prim_attr: false +; CHECK-NEXT: .pt_sprite_tex: false +; CHECK-NEXT: .spi_ps_input_ena: +; CHECK-NEXT: .ancillary_ena: false +; CHECK-NEXT: .front_face_ena: false +; CHECK-NEXT: .line_stipple_tex_ena: false +; CHECK-NEXT: .linear_center_ena: false +; CHECK-NEXT: .linear_centroid_ena: false +; CHECK-NEXT: .linear_sample_ena: false +; CHECK-NEXT: .persp_center_ena: true +; CHECK-NEXT: .persp_centroid_ena: false +; CHECK-NEXT: .persp_pull_model_ena: false +; CHECK-NEXT: .persp_sample_ena: false +; CHECK-NEXT: .pos_fixed_pt_ena: false +; CHECK-NEXT: .pos_w_float_ena: false +; CHECK-NEXT: .pos_x_float_ena: false +; CHECK-NEXT: .pos_y_float_ena: false +; CHECK-NEXT: .pos_z_float_ena: false +; CHECK-NEXT: .sample_coverage_ena: false +; CHECK-NEXT: .spi_shader_col_format: +; CHECK-NEXT: .col_0_export_format: 0x4 +; CHECK-NEXT: .col_1_export_format: 0 +; CHECK-NEXT: .col_2_export_format: 0 +; CHECK-NEXT: .col_3_export_format: 0 +; CHECK-NEXT: .col_4_export_format: 0 +; CHECK-NEXT: .col_5_export_format: 0 +; CHECK-NEXT: .col_6_export_format: 0 +; CHECK-NEXT: .col_7_export_format: 0 +; CHECK-NEXT: .spi_shader_pos_format: +; CHECK-NEXT: - 0x4 +; CHECK-NEXT: - 0 +; CHECK-NEXT: - 0 +; CHECK-NEXT: - 0 +; CHECK-NEXT: - 0 +; CHECK-NEXT: .spi_vs_out_config: +; CHECK-NEXT: .vs_export_count: 0 +; CHECK-NEXT: .vgt_reuse_off: false +; CHECK-NEXT: .vgt_shader_stages_en: +; CHECK-NEXT: .max_primgroup_in_wave: 0x2 +; CHECK-NEXT: .vs_stage_en: 0 +; CHECK-NEXT: .vs_w32_en: true +; CHECK-NEXT: .vgt_strmout_buffer_config: +; CHECK-NEXT: .stream_0_buffer_en: 0 +; CHECK-NEXT: .stream_1_buffer_en: 0 +; CHECK-NEXT: .stream_2_buffer_en: 0 +; CHECK-NEXT: .stream_3_buffer_en: 0 +; CHECK-NEXT: .vgt_strmout_config: +; CHECK-NEXT: .streamout_0_en: false +; CHECK-NEXT: .streamout_1_en: false +; CHECK-NEXT: .streamout_2_en: false +; CHECK-NEXT: .streamout_3_en: false +; CHECK-NEXT: .vs_so_base0_en: false +; CHECK-NEXT: .vs_so_base1_en: false +; CHECK-NEXT: .vs_so_base2_en: false +; CHECK-NEXT: .vs_so_base3_en: false +; CHECK-NEXT: .vs_streamout_en: false +; diff --git a/llpc/test/shaderdb/general/PipelineVsFs_TestInterpAtCentriodBarycentric.pipe b/llpc/test/shaderdb/general/PipelineVsFs_TestInterpAtCentriodBarycentric.pipe index 2e35192415..771409b369 100644 --- a/llpc/test/shaderdb/general/PipelineVsFs_TestInterpAtCentriodBarycentric.pipe +++ b/llpc/test/shaderdb/general/PipelineVsFs_TestInterpAtCentriodBarycentric.pipe @@ -5,11 +5,11 @@ ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: @[[BaryCoord:[^ ]*]] = external addrspace(64) global <3 x float> -; SHADERTEST: call spir_func <3 x float> @interpolateAtCentroid.v3f32.p64(ptr addrspace(64) @[[BaryCoord]]) +; SHADERTEST: call reassoc nnan nsz arcp contract afn <3 x float> @interpolateAtCentroid.v3f32.p64(ptr addrspace(64) @[[BaryCoord]]) ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; The second argument (i32 32) respects that interpLoc is InterpLocCentroid. -; SHADERTEST: call <3 x float> (...) @lgc.create.read.bary.coord.v3f32(i32 5287, i32 35, +; SHADERTEST: call reassoc nnan nsz arcp contract afn <3 x float> (...) @lgc.create.read.bary.coord.v3f32(i32 5287, i32 35, ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: %[[InterpCenter0:[^ ]*]] = extractelement <2 x float> %LinearInterpCenter, i64 0 @@ -19,8 +19,8 @@ ; SHADERTEST: %[[CMP:[0-9]*]] = icmp slt i32 %PrimMask, 0 ; SHADERTEST: %[[ICoord:[^ ]*]] = select i1 %[[CMP]], float %[[InterpCenter0]], float %[[InterpCentroid0]] ; SHADERTEST: %[[JCoord:[^ ]*]] = select i1 %[[CMP]], float %[[InterpCenter1]], float %[[InterpCentroid1]] -; SHADERTEST: %{{[0-9]*}} = fsub float 1.000000e+00, %[[ICoord]] -; SHADERTEST: %{{[0-9]*}} = fsub float %{{[0-9]*}}, %[[JCoord]] +; SHADERTEST: %{{[0-9]*}} = fsub reassoc nnan nsz arcp contract afn float 1.000000e+00, %{{[0-9]*}} +; SHADERTEST: %{{[0-9]*}} = fsub reassoc nnan nsz arcp contract afn float %{{[0-9]*}}, %{{[0-9]*}} ; SHADERTEST: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/general/PipelineVsFs_TestPointerInOut.pipe b/llpc/test/shaderdb/general/PipelineVsFs_TestPointerInOut.pipe index e15a799463..4d6165eaa3 100644 --- a/llpc/test/shaderdb/general/PipelineVsFs_TestPointerInOut.pipe +++ b/llpc/test/shaderdb/general/PipelineVsFs_TestPointerInOut.pipe @@ -2,7 +2,7 @@ ; BEGIN_SHADERTEST ; RUN: amdllpc -enable-part-pipeline=0 -v %gfxip %s | FileCheck -check-prefix=SHADERTEST_PP0 %s ; SHADERTEST_PP0-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST_PP0: %{{[0-9]*}} = call i64 (...) @lgc.create.read.generic.input.i64(i32 1, i32 0, i32 0, i32 0, i32 0, i32 poison) +; SHADERTEST_PP0: %{{[0-9]*}} = call i64 @lgc.load.vertex.input__i64(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 poison, i32 poison) ; SHADERTEST_PP0: call void (...) @lgc.create.write.generic.output(i64 %{{[0-9]*}}, i32 1, i32 0, i32 0, i32 0, i32 0, i32 poison) ; SHADERTEST_PP0: %{{[0-9]*}} = call i64 (...) @lgc.create.read.generic.input.i64(i32 1, i32 0, i32 0, i32 0, i32 17, i32 poison) ; SHADERTEST_PP0: inttoptr i64 %{{[0-9]*}} to ptr addrspace(1) @@ -17,7 +17,7 @@ ; SHADERTEST_PP1: inttoptr i64 %{{[0-9]*}} to ptr addrspace(1) ; Pre-rasterization part-pipeline: ; SHADERTEST_PP1-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST_PP1: %{{[0-9]*}} = call i64 (...) @lgc.create.read.generic.input.i64(i32 1, i32 0, i32 0, i32 0, i32 0, i32 poison) +; SHADERTEST_PP1: %{{[0-9]*}} = call i64 @lgc.load.vertex.input__i64(i1 false, i32 1, i32 0, i32 0, i32 poison, i32 poison, i32 poison) ; SHADERTEST_PP1: call void (...) @lgc.create.write.generic.output(i64 %{{[0-9]*}}, i32 1, i32 0, i32 0, i32 0, i32 0, i32 poison) ; SHADERTEST_PP1: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/general/PipelineVsFs_TestVertexFetchWithR8G8.pipe b/llpc/test/shaderdb/general/PipelineVsFs_TestVertexFetchWithR8G8.pipe index 651d23fd09..19d7b5f904 100644 --- a/llpc/test/shaderdb/general/PipelineVsFs_TestVertexFetchWithR8G8.pipe +++ b/llpc/test/shaderdb/general/PipelineVsFs_TestVertexFetchWithR8G8.pipe @@ -5,7 +5,7 @@ ; BEGIN_SHADERTEST ; RUN: amdllpc %gfxip -v %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} final pipeline module info -; SHADERTEST: call i32 @llvm.amdgcn.struct.tbuffer.load.i32(<4 x i32> %{{.*}}, i32 %{{.*}}, i32 0, i32 0, i32 2, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.struct.tbuffer.load.i32{{(\.v4i32)?}}(<4 x i32> %{{.*}}, i32 %{{.*}}, i32 0, i32 0, i32 2, i32 0) ; SHADERTEST-LABEL: _amdgpu_vs_main: ; SHADERTEST: tbuffer_load_format_x v{{[0-9]*}}, v{{[0-9]*}}, s[{{[0-9]*:[0-9]*}}], 0 format:[BUF_FMT_8_SNORM] idxen ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/general/PipelineVsFs_Test_unused_outputs.pipe b/llpc/test/shaderdb/general/PipelineVsFs_Test_unused_outputs.pipe new file mode 100644 index 0000000000..f8c5ef348a --- /dev/null +++ b/llpc/test/shaderdb/general/PipelineVsFs_Test_unused_outputs.pipe @@ -0,0 +1,69 @@ +; NOTE: Assertions have been autogenerated by tool/update_llpc_test_checks.py +; RUN: amdllpc -v -gfxip 11.0 %s | FileCheck -check-prefix=CHECK %s + +[Version] +version = 72 + +[FsGlsl] +#version 450 + +layout(location = 0) out vec4 outColor[4]; + +void main() { + outColor[0] = vec4(1.0, 0.0, 1.0, 1.0); + outColor[3] = vec4(1.0, 0.0, 1.0, 1.0); +} + +[FsInfo] +entryPoint = main + +[GraphicsPipelineState] +colorBuffer[0].format = VK_FORMAT_R32G32B32A32_SFLOAT +colorBuffer[0].channelWriteMask = 15 +colorBuffer[0].blendEnable = 0 +colorBuffer[1].format = VK_FORMAT_R32G32B32A32_SFLOAT +colorBuffer[1].channelWriteMask = 15 +colorBuffer[1].blendEnable = 0 +colorBuffer[2].format = VK_FORMAT_R32G32B32A32_SFLOAT +colorBuffer[2].channelWriteMask = 15 +colorBuffer[2].blendEnable = 0 +colorBuffer[3].format = VK_FORMAT_R32G32B32A32_SFLOAT +colorBuffer[3].channelWriteMask = 15 +colorBuffer[3].blendEnable = 0 +enableColorExportShader = 1 +; CHECK-LABEL: @lgc.shader.FS.main( +; CHECK-NEXT: .entry: +; CHECK-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 0, i32 0, <4 x float> ) #[[ATTR1:[0-9]+]] +; CHECK-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 1, i32 0, <4 x float> poison) #[[ATTR1]] +; CHECK-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 2, i32 0, <4 x float> poison) #[[ATTR1]] +; CHECK-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 3, i32 0, <4 x float> ) #[[ATTR1]] +; CHECK-NEXT: ret void +; +; +; CHECK-LABEL: @_amdgpu_ps_main( +; CHECK-NEXT: .entry: +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[COMPOSITEDATA:%.*]], 7 +; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 1 +; CHECK-NEXT: [[TMP3:%.*]] = and i64 [[TMP0]], -4294967296 +; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[COLOREXPADDR:%.*]] to i64 +; CHECK-NEXT: [[TMP5:%.*]] = or disjoint i64 [[TMP3]], [[TMP4]] +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(4) +; CHECK-NEXT: call amdgpu_gfx addrspace(4) void [[TMP6]](<4 x float> , <4 x float> , i32 inreg [[TMP2]]) #[[ATTR2:[0-9]+]] +; CHECK-NEXT: unreachable +; +; +; CHECK-LABEL: @color_export_shader( +; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x float> [[TMP0:%.*]], i64 0 +; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x float> [[TMP0]], i64 1 +; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x float> [[TMP0]], i64 2 +; CHECK-NEXT: [[TMP7:%.*]] = extractelement <4 x float> [[TMP0]], i64 3 +; CHECK-NEXT: call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float [[TMP4]], float [[TMP5]], float [[TMP6]], float [[TMP7]], i1 false, i1 true) +; CHECK-NEXT: [[TMP8:%.*]] = extractelement <4 x float> [[TMP1:%.*]], i64 0 +; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x float> [[TMP1]], i64 1 +; CHECK-NEXT: [[TMP10:%.*]] = extractelement <4 x float> [[TMP1]], i64 2 +; CHECK-NEXT: [[TMP11:%.*]] = extractelement <4 x float> [[TMP1]], i64 3 +; CHECK-NEXT: call void @llvm.amdgcn.exp.f32(i32 1, i32 15, float [[TMP8]], float [[TMP9]], float [[TMP10]], float [[TMP11]], i1 true, i1 true) +; CHECK-NEXT: call void @llvm.amdgcn.endpgm() +; CHECK-NEXT: unreachable +; diff --git a/llpc/test/shaderdb/general/TestConstantImmStore_FunctionInline.frag b/llpc/test/shaderdb/general/TestConstantImmStore_FunctionInline.frag index bd36716062..8d2a1eea2d 100644 --- a/llpc/test/shaderdb/general/TestConstantImmStore_FunctionInline.frag +++ b/llpc/test/shaderdb/general/TestConstantImmStore_FunctionInline.frag @@ -7,10 +7,10 @@ // SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -// SHADERTEST: @{{.*}} = internal unnamed_addr addrspace(4) constant [16 x <2 x float>] [<2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> ] +// SHADERTEST: @{{.*}} = internal unnamed_addr addrspace(4) constant [16 x <2 x float>] [<2 x float> {{(splat \(float 6\.250000e\-02\))|()}}, <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> ] // SHADERTEST: @{{.*}} = internal unnamed_addr addrspace(4) constant [8 x <2 x float>] [<2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> , <2 x float> ] // SHADERTEST: @{{.*}} = internal unnamed_addr addrspace(4) constant [4 x <2 x float>] [<2 x float> , <2 x float> , <2 x float> , <2 x float> ] -// SHADERTEST: @{{.*}} = internal unnamed_addr addrspace(4) constant [2 x <2 x float>] [<2 x float> , <2 x float> ] +// SHADERTEST: @{{.*}} = internal unnamed_addr addrspace(4) constant [2 x <2 x float>] [<2 x float> {{(splat \(float 2\.500000e\-01\))|()}}, <2 x float> {{(splat \(float \-2\.500000e\-01\))|()}}] // SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/general/TestWorkgroupIdOpt.comp b/llpc/test/shaderdb/general/TestWorkgroupIdOpt.comp index e02065bd35..34a66b5b96 100644 --- a/llpc/test/shaderdb/general/TestWorkgroupIdOpt.comp +++ b/llpc/test/shaderdb/general/TestWorkgroupIdOpt.comp @@ -25,7 +25,7 @@ void main() // CHECK-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) // CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) [[TMP4]], i32 4), "dereferenceable"(ptr addrspace(4) [[TMP4]], i32 -1) ] // CHECK-NEXT: [[TMP5:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP4]], align 16 -// CHECK-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32(i32 [[WORKGROUPID1]], <4 x i32> [[TMP5]], i32 0, i32 0, i32 0) +// CHECK-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 [[WORKGROUPID1]], <4 x i32> [[TMP5]], i32 0, i32 0, i32 0) // CHECK-NEXT: ret void // //. diff --git a/llpc/test/shaderdb/general/WorkaroundStorageImageFormats.pipe b/llpc/test/shaderdb/general/WorkaroundStorageImageFormats.pipe index 2854fdab17..6402cdd457 100644 --- a/llpc/test/shaderdb/general/WorkaroundStorageImageFormats.pipe +++ b/llpc/test/shaderdb/general/WorkaroundStorageImageFormats.pipe @@ -28,6 +28,6 @@ userDataNode[0].next[0].binding = 0 ; CHECK-NEXT: .entry: ; CHECK-NEXT: [[TMP0:%.*]] = call ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i64 0, i32 0) ; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.create.get.desc.stride.i32(i32 1, i32 1, i64 0, i32 0) -; CHECK-NEXT: call void (...) @lgc.create.image.store(<4 x float> , i32 1, i32 512, ptr addrspace(4) [[TMP0]], <2 x i32> ) +; CHECK-NEXT: call void (...) @lgc.create.image.store(<4 x float> , i32 1, i32 512, ptr addrspace(4) [[TMP0]], <2 x i32> {{(splat \(i32 9\))|()}}) ; CHECK-NEXT: ret void ; diff --git a/llpc/test/shaderdb/general/WorkgroupSizeLiteral.spvasm b/llpc/test/shaderdb/general/WorkgroupSizeLiteral.spvasm index 790cb7c648..984514c015 100644 --- a/llpc/test/shaderdb/general/WorkgroupSizeLiteral.spvasm +++ b/llpc/test/shaderdb/general/WorkgroupSizeLiteral.spvasm @@ -2,7 +2,7 @@ ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results ; SHADERTEST: call <3 x i32> @lgc.shader.input.WorkgroupId(i32 0) #{{[0-9]*}} -; SHADERTEST: %{{[0-9]*}} = mul <3 x i32> %{{[0-9]*}}, +; SHADERTEST: %{{[0-9]*}} = mul <3 x i32> %{{[0-9]*}}, {{(splat \(i32 1\))|()}} ; SHADERTEST: AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/gfx11/AttributePrecedesPos.pipe b/llpc/test/shaderdb/gfx11/AttributePrecedesPos.pipe index 031e3ede4a..f631569161 100644 --- a/llpc/test/shaderdb/gfx11/AttributePrecedesPos.pipe +++ b/llpc/test/shaderdb/gfx11/AttributePrecedesPos.pipe @@ -2,7 +2,7 @@ ; RUN: amdllpc %gfxip %s -v | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: @_amdgpu_gs_main( -; SHADERTEST: call void @llvm.amdgcn.struct.buffer.store.v4f32(<4 x float> %{{.*}}, <4 x i32> %{{.*}}, i32 %{{.*}}, i32 0, i32 %{{.*}}, i32 1) +; SHADERTEST: call void @llvm.amdgcn.struct.buffer.store.v4f32{{(\.v4i32)?}}(<4 x float> %{{.*}}, <4 x i32> %{{.*}}, i32 %{{.*}}, i32 0, i32 %{{.*}}, i32 1) ; SHADERTEST: fence syncscope("agent") release ; SHADERTEST: call void @llvm.amdgcn.exp.f32(i32 12, i32 15, float %{{.*}}, float %{{.*}}, float %{{.*}}, float %{{.*}}, i1 false, i1 false) ; SHADERTEST: call void @llvm.amdgcn.exp.f32(i32 13, i32 1, float 1.000000e+00, float poison, float poison, float poison, i1 true, i1 false) diff --git a/llpc/test/shaderdb/gfx11/SgprUserDataInit_Cs.pipe b/llpc/test/shaderdb/gfx11/SgprUserDataInit_Cs.pipe index c1c9d7d665..55d22aff84 100644 --- a/llpc/test/shaderdb/gfx11/SgprUserDataInit_Cs.pipe +++ b/llpc/test/shaderdb/gfx11/SgprUserDataInit_Cs.pipe @@ -144,9 +144,7 @@ options.threadGroupSwizzleMode = Default ; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5 ; CHECK-NEXT: buffer_store_format_xy v[0:1], v2, s[0:3], 0 idxen -; CHECK-NEXT: s_nop 0 -; CHECK-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) -; CHECK-NEXT: s_endpgm +; CHECK: s_endpgm ; ; CHECK-LABEL: .amdgpu_pal_metadata ; CHECK-NEXT: --- diff --git a/llpc/test/shaderdb/gfx11/TessFactorStoreWithOpt.pipe b/llpc/test/shaderdb/gfx11/TessFactorStoreWithOpt.pipe index 25d6e37870..1242f626e8 100644 --- a/llpc/test/shaderdb/gfx11/TessFactorStoreWithOpt.pipe +++ b/llpc/test/shaderdb/gfx11/TessFactorStoreWithOpt.pipe @@ -5,7 +5,7 @@ ; SHADERTEST-LABEL: .distribHsPatchCount: ; SHADERTEST-NEXT: %[[HS_PATCH_COUNT_SHIFT:[^ ,]*]] = lshr i32 %mergeWaveInfo, 16 ; SHADERTEST-NEXT: %[[HS_PATCH_COUNT:[^ ,]*]] = and i32 %[[HS_PATCH_COUNT_SHIFT]], 255 -; SHADERTEST-NEXT: store i32 %[[HS_PATCH_COUNT]], ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @Lds.HS, i32 2560), align 4 +; SHADERTEST-NEXT: store i32 %[[HS_PATCH_COUNT]], ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @Lds.HS, i32 1536), align 4 ; SHADERTEST-NEXT: br label %.endDistribHsPatchCount ; SHADERTEST-LABEL: .endDistribHsPatchCount: @@ -16,7 +16,7 @@ ; SHADERTEST-NEXT: br i1 %validHsVert, label %.beginHs, label %.endHs ; SHADERTEST-LABEL: .endHs: -; SHADERTEST: %[[HS_PATCH_COUNT:[^ ,]*]] = load i32, ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @Lds.HS, i32 2560), align 4 +; SHADERTEST: %[[HS_PATCH_COUNT:[^ ,]*]] = load i32, ptr addrspace(3) getelementptr inbounds (i8, ptr addrspace(3) @Lds.HS, i32 1536), align 4 ; SHADERTEST: %hsPatchCount = call i32 @llvm.amdgcn.readfirstlane.i32(i32 %[[HS_PATCH_COUNT]]) ; SHADERTEST: %validHsPatch = icmp ult i32 %threadIdInGroup, %hsPatchCount ; SHADERTEST: br i1 %validHsPatch, label %.checkSpecialTfInWave, label %.endCheckSpecialTfInWave @@ -24,11 +24,10 @@ ; SHADERTEST-LABEL: .checkSpecialTfInWave: ; SHADERTEST-NEXT: %[[OUTER_TF_OFFSET_0:[^ ,]*]] = mul i32 %threadIdInGroup, 24 ; SHADERTEST-NEXT: %[[OUTER_TF_I_PTR:[^ ,]*]] = getelementptr i8, ptr addrspace(3) @Lds.HS, i32 %[[OUTER_TF_OFFSET_0]] -; SHADERTEST-NEXT: %[[OUTER_TF_PTR:[^ ,]*]] = getelementptr {{(i8|i32)}}, ptr addrspace(3) %[[OUTER_TF_I_PTR]], i32 {{(256|1024)}} -; SHADERTEST-NEXT: %[[OUTER_TF:[^ ,]*]] = load <4 x float>, ptr addrspace(3) %[[OUTER_TF_PTR]], align 4 +; SHADERTEST-NEXT: %[[OUTER_TF:[^ ,]*]] = load <4 x float>, ptr addrspace(3) %[[OUTER_TF_I_PTR]], align 4 ; SHADERTEST-NEXT: %[[INNER_TF_OFFSET_0:[^ ,]*]] = mul i32 %threadIdInGroup, 24 ; SHADERTEST-NEXT: %[[INNER_TF_I_PTR:[^ ,]*]] = getelementptr i8, ptr addrspace(3) @Lds.HS, i32 %[[INNER_TF_OFFSET_0]] -; SHADERTEST-NEXT: %[[INNER_TF_PTR:[^ ,]*]] = getelementptr {{(i8|i32)}}, ptr addrspace(3) %[[INNER_TF_I_PTR]], i32 {{(260|1040)}} +; SHADERTEST-NEXT: %[[INNER_TF_PTR:[^ ,]*]] = getelementptr {{(i8|i32)}}, ptr addrspace(3) %[[INNER_TF_I_PTR]], i32 {{(16|4)}} ; SHADERTEST-NEXT: %[[INNER_TF:[^ ,]*]] = load <2 x float>, ptr addrspace(3) %[[INNER_TF_PTR]], align 4 ; SHADERTEST-NEXT: %[[OUTER_TF_0:[^ ,]*]] = extractelement <4 x float> %[[OUTER_TF]], i64 0 ; SHADERTEST-NEXT: %[[IS_ONE_0:[^ ,]*]] = fcmp oeq float %[[OUTER_TF_0]], 1.000000e+00 @@ -77,13 +76,13 @@ ; SHADERTEST-LABEL: .handleMultiWave: ; SHADERTEST-NEXT: %hsPatchWaveCount = lshr i32 %[[HS_PATCH_COUNT_ADJUST]], 6 ; SHADERTEST-NEXT: %[[WAVE_ID_OFFSET:[^ ,]*]] = shl nuw nsw i32 %waveIdInGroup, 1 -; SHADERTEST-NEXT: %[[ALL_ONES_OFFSET:[^ ,]*]] = or {{.*}}i32 %[[WAVE_ID_OFFSET]], 641 +; SHADERTEST-NEXT: %[[ALL_ONES_OFFSET:[^ ,]*]] = or {{.*}}i32 %[[WAVE_ID_OFFSET]], 385 ; SHADERTEST-NEXT: %[[IS_ALL_ONES_TF:[^ ,]*]] = zext i1 %isAllOnesTfInWave to i32 ; SHADERTEST-NEXT: %[[ALL_ONES_PTR:[^ ,]*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 %[[ALL_ONES_OFFSET]] ; SHADERTEST-NEXT: store i32 %[[IS_ALL_ONES_TF]], ptr addrspace(3) %[[ALL_ONES_PTR]], align 4 ; SHADERTEST-NEXT: %[[IS_ALL_ZEROS_TF:[^ ,]*]] = zext i1 %isAllZerosTfInWave to i32 ; SHADERTEST-NEXT: %[[ALL_ZEROS_I_PTR:[^ ,]*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 %[[WAVE_ID_OFFSET]] -; SHADERTEST-NEXT: %[[ALL_ZEROS_PTR:[^ ,]*]] = getelementptr {{(i8|i32)}}, ptr addrspace(3) %[[ALL_ZEROS_I_PTR]], i32 {{(642|2568)}} +; SHADERTEST-NEXT: %[[ALL_ZEROS_PTR:[^ ,]*]] = getelementptr {{(i8|i32)}}, ptr addrspace(3) %[[ALL_ZEROS_I_PTR]], i32 {{(1544|386)}} ; SHADERTEST-NEXT: store i32 %[[IS_ALL_ZEROS_TF]], ptr addrspace(3) %[[ALL_ZEROS_PTR]], align 4 ; SHADERTEST-NEXT: fence syncscope("workgroup") release ; SHADERTEST-NEXT: call void @llvm.amdgcn.s.barrier() @@ -94,11 +93,11 @@ ; SHADERTEST-LABEL: .checkSpecialTfInGroup: ; SHADERTEST-NEXT: %[[THREAD_ID_OFFSET:[^ ,]*]] = shl i32 %threadIdInWave, 1 ; SHADERTEST-NEXT: %[[ALL_ONES_I_PTR:[^ ,]*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 %[[THREAD_ID_OFFSET]] -; SHADERTEST-NEXT: %[[ALL_ONES_PTR:[^ ,]*]] = getelementptr {{(i8|i32)}}, ptr addrspace(3) %[[ALL_ONES_I_PTR]], i32 {{(641|2564)}} +; SHADERTEST-NEXT: %[[ALL_ONES_PTR:[^ ,]*]] = getelementptr {{(i8|i32)}}, ptr addrspace(3) %[[ALL_ONES_I_PTR]], i32 {{(1540|385)}} ; SHADERTEST-NEXT: %[[IS_ALL_ONES_TF:[^ ,]*]] = load i32, ptr addrspace(3) %[[ALL_ONES_PTR]], align 4 ; SHADERTEST-NEXT: %[[ALL_ONES_VALUE:[^ ,]*]] = trunc i32 %[[IS_ALL_ONES_TF]] to i1 ; SHADERTEST-NEXT: %[[ALL_ZEROS_I_PTR:[^ ,]*]] = getelementptr i32, ptr addrspace(3) @Lds.HS, i32 %[[THREAD_ID_OFFSET]] -; SHADERTEST-NEXT: %[[ALL_ZEROS_PTR:[^ ,]*]] = getelementptr {{(i8|i32)}}, ptr addrspace(3) %[[ALL_ZEROS_I_PTR]], i32 {{(642|2568)}} +; SHADERTEST-NEXT: %[[ALL_ZEROS_PTR:[^ ,]*]] = getelementptr {{(i8|i32)}}, ptr addrspace(3) %[[ALL_ZEROS_I_PTR]], i32 {{(1544|386)}} ; SHADERTEST-NEXT: %[[IS_ALL_ZEROS_TF:[^ ,]*]] = load i32, ptr addrspace(3) %[[ALL_ZEROS_PTR]], align 4 ; SHADERTEST-NEXT: %[[ALL_ZERO_VALUE:[^ ,]*]] = trunc i32 %[[IS_ALL_ZEROS_TF]] to i1 ; SHADERTEST-NEXT: %[[BALLOT_MASK:[^ ,]*]] = call i64 @llvm.amdgcn.ballot.i64(i1 true) @@ -130,9 +129,9 @@ ; SHADERTEST: %tfBufferDescPtr = getelementptr {{i8|<4 x i32>}}, ptr addrspace(4) %globalTablePtr, i64 {{144|9}} ; SHADERTEST-NEXT: %tfBufferDesc = load <4 x i32>, ptr addrspace(4) %tfBufferDescPtr, align 16 ; SHADERTEST-NEXT: %[[OUTER_TF_OFFSET:[^ ,]*]] = mul i32 %threadIdInGroup, 24 -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.v4f32(<4 x float> %outerTf, <4 x i32> %tfBufferDesc, i32 %[[OUTER_TF_OFFSET]], i32 %tfBufferBase, i32 63, i32 1) +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.v4f32{{(\.v4i32)?}}(<4 x float> %outerTf, <4 x i32> %tfBufferDesc, i32 %[[OUTER_TF_OFFSET]], i32 %tfBufferBase, i32 63, i32 1) ; SHADERTEST-NEXT: %[[INNER_TF_OFFSET:[^ ,]*]] = add i32 %[[OUTER_TF_OFFSET]], 16 -; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.v2f32(<2 x float> %innerTf, <4 x i32> %tfBufferDesc, i32 %[[INNER_TF_OFFSET]], i32 %tfBufferBase, i32 50, i32 1) +; SHADERTEST-NEXT: call void @llvm.amdgcn.raw.tbuffer.store.v2f32{{(\.v4i32)?}}(<2 x float> %innerTf, <4 x i32> %tfBufferDesc, i32 %[[INNER_TF_OFFSET]], i32 %tfBufferBase, i32 50, i32 1) ; SHADERTEST-NEXT: br label %.endTryStoreTf ; SHADERTEST-LABEL: .endTryStoreTf: diff --git a/llpc/test/shaderdb/gfx11/lit.local.cfg b/llpc/test/shaderdb/gfx11/lit.local.cfg index ed4a4492da..457aad50b6 100644 --- a/llpc/test/shaderdb/gfx11/lit.local.cfg +++ b/llpc/test/shaderdb/gfx11/lit.local.cfg @@ -1,4 +1,4 @@ -if "vki_build_gfx11" not in config.available_features: +if "llpc_build_gfx11" not in config.available_features: config.unsupported = True # overwrite %gfxip in config.substitutions diff --git a/llpc/test/shaderdb/graphics_library/PipelineVsFs_TestGraphicsLibrary.pipe b/llpc/test/shaderdb/graphics_library/PipelineVsFs_TestGraphicsLibrary.pipe index 2c6c9de718..b9dacc3e36 100644 --- a/llpc/test/shaderdb/graphics_library/PipelineVsFs_TestGraphicsLibrary.pipe +++ b/llpc/test/shaderdb/graphics_library/PipelineVsFs_TestGraphicsLibrary.pipe @@ -14,18 +14,18 @@ colorExport=PipelineLibCes_TestColorExport.pipe ; SHADERTEST-NEXT: .entry: ; SHADERTEST-NEXT: [[TMP0:%.*]] = call ptr addrspace(7) @lgc.load.buffer.desc(i64 0, i32 0, i32 0, i32 0) ; SHADERTEST-NEXT: [[TMP1:%.*]] = call ptr @llvm.invariant.start.p7(i64 -1, ptr addrspace(7) [[TMP0]]) -; SHADERTEST-NEXT: [[TMP2:%.*]] = call <4 x float> @lgc.input.import.generic__v4f32(i1 false, i32 0, i32 0, i32 0, i32 poison) -; SHADERTEST-NEXT: [[TMP3:%.*]] = call i32 @lgc.special.user.data.BaseVertex(i32 268435459) #[[ATTR3:[0-9]+]] -; SHADERTEST-NEXT: [[TMP4:%.*]] = call i32 @lgc.shader.input.VertexId(i32 18) #[[ATTR3]] -; SHADERTEST-NEXT: [[VERTEXINDEX:%.*]] = add i32 [[TMP3]], [[TMP4]] +; SHADERTEST-NEXT: [[TMP2:%.*]] = call i32 @lgc.special.user.data.BaseVertex(i32 268435459) #[[ATTR4:[0-9]+]] +; SHADERTEST-NEXT: [[TMP3:%.*]] = call i32 @lgc.shader.input.VertexId(i32 18) #[[ATTR4]] +; SHADERTEST-NEXT: [[VERTEXINDEX:%.*]] = add i32 [[TMP2]], [[TMP3]] ; SHADERTEST-NEXT: [[DOTFR:%.*]] = freeze i32 [[VERTEXINDEX]] -; SHADERTEST-NEXT: [[TMP5:%.*]] = icmp slt i32 [[DOTFR]], 3 -; SHADERTEST-NEXT: [[TMP6:%.*]] = getelementptr {{(inbounds )?}}i8, ptr addrspace(7) [[TMP0]], i32 4 -; SHADERTEST-NEXT: [[DOT0_IN:%.*]] = select i1 [[TMP5]], ptr addrspace(7) [[TMP0]], ptr addrspace(7) [[TMP6]] +; SHADERTEST-NEXT: [[TMP4:%.*]] = icmp slt i32 [[DOTFR]], 3 +; SHADERTEST-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(7) [[TMP0]], i32 4 +; SHADERTEST-NEXT: [[DOT0_IN:%.*]] = select i1 [[TMP4]], ptr addrspace(7) [[TMP0]], ptr addrspace(7) [[TMP5]] ; SHADERTEST-NEXT: [[DOT0:%.*]] = load float, ptr addrspace(7) [[DOT0_IN]], align 4 -; SHADERTEST-NEXT: [[TMP7:%.*]] = insertelement <4 x float> [[TMP2]], float 1.000000e+00, i64 3 +; SHADERTEST-NEXT: [[TMP6:%.*]] = call <4 x float> @lgc.load.vertex.input__v4f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 poison, i32 poison) +; SHADERTEST-NEXT: [[TMP7:%.*]] = insertelement <4 x float> [[TMP6]], float 1.000000e+00, i64 3 ; SHADERTEST-NEXT: [[TMP8:%.*]] = insertelement <4 x float> [[TMP7]], float [[DOT0]], i64 2 -; SHADERTEST-NEXT: call void @lgc.output.export.builtin.Position.i32.v4f32(i32 0, <4 x float> [[TMP8]]) +; SHADERTEST-NEXT: call void @lgc.output.export.builtin.Position.i32.v4f32(i32 0, <4 x float> [[TMP8]]) #[[ATTR5:[0-9]+]] ; SHADERTEST-NEXT: ret void ; ; @@ -34,16 +34,16 @@ colorExport=PipelineLibCes_TestColorExport.pipe ; SHADERTEST-NEXT: .entry: ; SHADERTEST-NEXT: [[TMP0:%.*]] = call ptr addrspace(7) @lgc.load.buffer.desc(i64 1, i32 1, i32 0, i32 0) ; SHADERTEST-NEXT: [[TMP1:%.*]] = call ptr @llvm.invariant.start.p7(i64 -1, ptr addrspace(7) [[TMP0]]) -; SHADERTEST-NEXT: [[FRAGCOORD:%.*]] = call <4 x float> @lgc.input.import.builtin.FragCoord.v4f32.i32(i32 15) +; SHADERTEST-NEXT: [[FRAGCOORD:%.*]] = call <4 x float> @lgc.input.import.builtin.FragCoord.v4f32.i32(i32 15) #[[ATTR4]] ; SHADERTEST-NEXT: [[__LLPC_INPUT_PROXY_GL_FRAGCOORD_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[FRAGCOORD]], i64 1 ; SHADERTEST-NEXT: [[TMP2:%.*]] = fadd reassoc nnan nsz arcp contract afn float [[__LLPC_INPUT_PROXY_GL_FRAGCOORD_4_VEC_EXTRACT]], -5.000000e-01 ; SHADERTEST-NEXT: [[TMP3:%.*]] = fptosi float [[TMP2]] to i32 ; SHADERTEST-NEXT: [[DOTFR:%.*]] = freeze i32 [[TMP3]] ; SHADERTEST-NEXT: [[TMP4:%.*]] = icmp slt i32 [[DOTFR]], 8 -; SHADERTEST-NEXT: [[TMP5:%.*]] = getelementptr {{(inbounds )?}}i8, ptr addrspace(7) [[TMP0]], i32 16 +; SHADERTEST-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(7) [[TMP0]], i32 16 ; SHADERTEST-NEXT: [[DOT0_IN:%.*]] = select i1 [[TMP4]], ptr addrspace(7) [[TMP0]], ptr addrspace(7) [[TMP5]] ; SHADERTEST-NEXT: [[DOT0:%.*]] = load <4 x float>, ptr addrspace(7) [[DOT0_IN]], align 16 -; SHADERTEST-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 0, i32 0, <4 x float> [[DOT0]]) #[[ATTR3]] +; SHADERTEST-NEXT: call void @lgc.output.export.generic.i32.i32.v4f32(i32 0, i32 0, <4 x float> [[DOT0]]) #[[ATTR3:[0-9]+]] ; SHADERTEST-NEXT: ret void ; ; diff --git a/llpc/test/shaderdb/hlsl/Hlsl_TestStoreRowMajorMatrixInStruct.spvasm b/llpc/test/shaderdb/hlsl/Hlsl_TestStoreRowMajorMatrixInStruct.spvasm index 5ea3d6fabc..0888a944e0 100644 --- a/llpc/test/shaderdb/hlsl/Hlsl_TestStoreRowMajorMatrixInStruct.spvasm +++ b/llpc/test/shaderdb/hlsl/Hlsl_TestStoreRowMajorMatrixInStruct.spvasm @@ -1,7 +1,7 @@ ; BEGIN_SHADERTEST ; RUN: amdllpc -v %gfxip %s --validate-spirv=false | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 0, <4 x i32> %{{[0-9]*}}, i32 64, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 0, <4 x i32> %{{[0-9]*}}, i32 64, i32 0, i32 0) ; SHADERTEST : AMDLLPC SUCCESS ; END_SHADERTEST diff --git a/llpc/test/shaderdb/hlsl/Hlsl_TestStructuredBuffers.spvasm b/llpc/test/shaderdb/hlsl/Hlsl_TestStructuredBuffers.spvasm index 4596e98b2d..3cac157d45 100644 --- a/llpc/test/shaderdb/hlsl/Hlsl_TestStructuredBuffers.spvasm +++ b/llpc/test/shaderdb/hlsl/Hlsl_TestStructuredBuffers.spvasm @@ -1,16 +1,16 @@ ; BEGIN_SHADERTEST ; RUN: amdllpc -v %gfxip %s -validate-spirv=false | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.load.i32(<4 x i32> [[descriptor:%[0-9]+]], i32 [[index:%[0-9]+]], i32 32, i32 0, i32 0) -; SHADERTEST: call <4 x i32> @llvm.amdgcn.struct.buffer.load.v4i32(<4 x i32> [[descriptor]], i32 [[index]], i32 [[sink_idx:%.*]], i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.struct.buffer.store.v4i32(<4 x i32> {{%[0-9]+}}, <4 x i32> {{%[0-9]+}}, i32 [[index]], i32 0, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.struct.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> [[descriptor:%[0-9]+]], i32 [[index:%[0-9]+]], i32 32, i32 0, i32 0) +; SHADERTEST: call <4 x i32> @llvm.amdgcn.struct.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> [[descriptor]], i32 [[index]], i32 [[sink_idx:%.*]], i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.struct.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[0-9]+}}, <4 x i32> {{%[0-9]+}}, i32 [[index]], i32 0, i32 0, i32 0) ; SHADERTEST-NOT: mul i32 {{%[0-9]+}}, 48 ; SHADERTEST-NOT: add i32 {{%.*}}, 32 ; SHADERTEST-NOT: call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> {{%[0-9]+}}, i32 {{%.*}}, i32 0), !invariant.load !!{{[0-9]+}} ; SHADERTEST-NOT: call <4 x i32> @llvm.amdgcn.s.buffer.load.v4i32(<4 x i32> [[descriptor]], i32 {{%.*}}, i32 0), !invariant.load !!{{[0-9]+}} ; SHADERTEST-NOT: shl i32 [[index]], 4 -; SHADERTEST-NOT: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[0-9]+}}, <4 x i32> [[descriptor]], i32 {{%[0-9]+}}, i32 0, i32 0) +; SHADERTEST-NOT: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[0-9]+}}, <4 x i32> [[descriptor]], i32 {{%[0-9]+}}, i32 0, i32 0) ; END_SHADERTEST OpCapability Shader diff --git a/llpc/test/shaderdb/object/ObjConstant_TestStruct_lit.frag b/llpc/test/shaderdb/object/ObjConstant_TestStruct_lit.frag index e0a7117cdb..b253a2bb0b 100644 --- a/llpc/test/shaderdb/object/ObjConstant_TestStruct_lit.frag +++ b/llpc/test/shaderdb/object/ObjConstant_TestStruct_lit.frag @@ -31,7 +31,7 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: alloca <4 x float>,{{.*}} addrspace(5) ; SHADERTEST: alloca { [3 x <3 x float>], [3 x <3 x float>], i32, <2 x i32> },{{.*}} addrspace(5) -; SHADERTEST: store { [3 x <3 x float>], [3 x <3 x float>], i32, <2 x i32> } { [3 x <3 x float>] [<3 x float> , <3 x float> , <3 x float> ], [3 x <3 x float>] [<3 x float> , <3 x float> , <3 x float> ], i32 1, <2 x i32> }, ptr addrspace(5) %{{[0-9]*}} +; SHADERTEST: store { [3 x <3 x float>], [3 x <3 x float>], i32, <2 x i32> } { [3 x <3 x float>] [<3 x float> {{(splat \(float 0x3FB99999A0000000\))|()}}, <3 x float> {{(splat \(float 5\.000000e\-01\))|()}}, <3 x float> {{(splat \(float 1\.000000e\+00\))|()}}], [3 x <3 x float>] [<3 x float> , <3 x float> , <3 x float> ], i32 1, <2 x i32> {{(splat \(i32 5\))|()}} }, ptr addrspace(5) %{{[0-9]*}} ; SHADERTEST: load i32, ptr addrspace(5) %{{[0-9]*}} ; SHADERTEST: trunc i32 %{{[0-9]*}} to i1 ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results diff --git a/llpc/test/shaderdb/object/ObjInput_TestIndexingInterpOfInputArray_lit.frag b/llpc/test/shaderdb/object/ObjInput_TestIndexingInterpOfInputArray_lit.frag index dd62358058..dd20457bd0 100644 --- a/llpc/test/shaderdb/object/ObjInput_TestIndexingInterpOfInputArray_lit.frag +++ b/llpc/test/shaderdb/object/ObjInput_TestIndexingInterpOfInputArray_lit.frag @@ -38,7 +38,7 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results ; SHADERTEST-LABEL: {{^// LLPC}} pipeline before-patching results -; SHADERTEST: = call <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32(i32 268435459) +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <3 x float> @lgc.input.import.builtin.InterpPullMode.v3f32.i32(i32 268435459) ; SHADERTEST: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 %{{.*}}, i32 245, i32 15, i32 15, i1 true) ; SHADERTEST: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 %{{.*}}, i32 160, i32 15, i32 15, i1 true) ; SHADERTEST: call {{.*}}float @llvm.amdgcn.wqm.f32 @@ -57,7 +57,7 @@ void main() ; SHADERTEST: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 %{{.*}}, i32 238, i32 15, i32 15, i1 true) ; SHADERTEST: = call i32 @llvm.amdgcn.mov.dpp.i32(i32 %{{.*}}, i32 68, i32 15, i32 15, i1 true) ; SHADERTEST: call {{.*}}float @llvm.amdgcn.wqm.f32 -; SHADERTEST: = call <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 4, i32 0, i32 0, i32 poison, i32 0, <2 x float> +; SHADERTEST: = call reassoc nnan nsz arcp contract afn <4 x float> (...) @lgc.input.import.interpolated__v4f32(i1 false, i32 4, i32 0, i32 0, i32 poison, i32 0, <2 x float> ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call i32 @llvm.amdgcn.mov.dpp.i32 ; SHADERTEST: call i32 @llvm.amdgcn.mov.dpp.i32 @@ -85,18 +85,6 @@ void main() ; SHADERTEST: call float @llvm.amdgcn.interp.p2 ; SHADERTEST: call float @llvm.amdgcn.interp.p1 ; SHADERTEST: call float @llvm.amdgcn.interp.p2 -; SHADERTEST: call float @llvm.amdgcn.interp.p1 -; SHADERTEST: call float @llvm.amdgcn.interp.p2 -; SHADERTEST: call float @llvm.amdgcn.interp.p1 -; SHADERTEST: call float @llvm.amdgcn.interp.p2 -; SHADERTEST: call float @llvm.amdgcn.interp.p1 -; SHADERTEST: call float @llvm.amdgcn.interp.p2 -; SHADERTEST: call float @llvm.amdgcn.interp.p1 -; SHADERTEST: call float @llvm.amdgcn.interp.p2 -; SHADERTEST: call float @llvm.amdgcn.interp.p1 -; SHADERTEST: call float @llvm.amdgcn.interp.p2 -; SHADERTEST: call float @llvm.amdgcn.interp.p1 -; SHADERTEST-COUNT-3: call float @llvm.amdgcn.interp.p2 ; SHADERTEST-LABEL: {{^// LLPC}} final pipeline module info ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjInput_TestVsBasic_lit.vert b/llpc/test/shaderdb/object/ObjInput_TestVsBasic_lit.vert index 25972abdd7..ff3931a4a2 100644 --- a/llpc/test/shaderdb/object/ObjInput_TestVsBasic_lit.vert +++ b/llpc/test/shaderdb/object/ObjInput_TestVsBasic_lit.vert @@ -17,9 +17,9 @@ void main() ; RUN: amdllpc -auto-layout-desc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST-DAG: call <2 x i32> @lgc.input.import.generic__v2i32{{.*}} -; SHADERTEST-DAG: call i32 @lgc.input.import.generic{{.*}} -; SHADERTEST-DAG: call <4 x float> @lgc.input.import.generic__v4f32{{.*}} +; SHADERTEST-DAG: call <2 x i32> @lgc.load.vertex.input__v2i32{{.*}} +; SHADERTEST-DAG: call i32 @lgc.load.vertex.input{{.*}} +; SHADERTEST-DAG: call <4 x float> @lgc.load.vertex.input__v4f32{{.*}} ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST-COUNT-3: call {{.*}} @llvm.amdgcn.struct.tbuffer.load ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/object/ObjInput_TestVsCompSpecifier_lit.vert b/llpc/test/shaderdb/object/ObjInput_TestVsCompSpecifier_lit.vert index 835b6b6901..016d4a14ce 100644 --- a/llpc/test/shaderdb/object/ObjInput_TestVsCompSpecifier_lit.vert +++ b/llpc/test/shaderdb/object/ObjInput_TestVsCompSpecifier_lit.vert @@ -15,8 +15,8 @@ void main() ; RUN: amdllpc -auto-layout-desc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: call <2 x float> @lgc.input.import.generic__v2f32(i1 false, i32 0, i32 0, i32 1, i32 poison) -; SHADERTEST: call float @lgc.input.import.generic__f32(i1 false, i32 0, i32 0, i32 0, i32 poison) +; SHADERTEST: call <2 x float> @lgc.load.vertex.input__v2f32(i1 false, i32 0, i32 0, i32 1, i32 poison, i32 poison, i32 poison) +; SHADERTEST: call float @lgc.load.vertex.input__f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 poison, i32 poison) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call {{.*}} @llvm.amdgcn.struct.tbuffer.load ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/object/ObjInput_TestVsDouble_lit.vert b/llpc/test/shaderdb/object/ObjInput_TestVsDouble_lit.vert index a904d550f0..39b8c55ba7 100644 --- a/llpc/test/shaderdb/object/ObjInput_TestVsDouble_lit.vert +++ b/llpc/test/shaderdb/object/ObjInput_TestVsDouble_lit.vert @@ -22,13 +22,13 @@ void main() ; RUN: amdllpc -auto-layout-desc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST-DAG: call <4 x double> @lgc.input.import.generic__v4f64{{.*}} -; SHADERTEST-DAG: call <4 x double> @lgc.input.import.generic__v4f64{{.*}} -; SHADERTEST-DAG: call <4 x double> @lgc.input.import.generic__v4f64{{.*}} -; SHADERTEST-DAG: call <4 x double> @lgc.input.import.generic__v4f64{{.*}} -; SHADERTEST-DAG: call <4 x double> @lgc.input.import.generic__v4f64{{.*}} -; SHADERTEST-DAG: call <3 x double> @lgc.input.import.generic__v3f64{{.*}} -; SHADERTEST-DAG: call <3 x double> @lgc.input.import.generic__v3f64{{.*}} +; SHADERTEST-DAG: call <4 x double> @lgc.load.vertex.input__v4f64{{.*}} +; SHADERTEST-DAG: call <4 x double> @lgc.load.vertex.input__v4f64{{.*}} +; SHADERTEST-DAG: call <4 x double> @lgc.load.vertex.input__v4f64{{.*}} +; SHADERTEST-DAG: call <4 x double> @lgc.load.vertex.input__v4f64{{.*}} +; SHADERTEST-DAG: call <4 x double> @lgc.load.vertex.input__v4f64{{.*}} +; SHADERTEST-DAG: call <3 x double> @lgc.load.vertex.input__v3f64{{.*}} +; SHADERTEST-DAG: call <3 x double> @lgc.load.vertex.input__v3f64{{.*}} ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST-COUNT-12: call i32 @llvm.amdgcn.struct.tbuffer.load.i32 ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/object/ObjInput_TestVsVectorArray_lit.vert b/llpc/test/shaderdb/object/ObjInput_TestVsVectorArray_lit.vert index f4847a543f..7456d3e753 100644 --- a/llpc/test/shaderdb/object/ObjInput_TestVsVectorArray_lit.vert +++ b/llpc/test/shaderdb/object/ObjInput_TestVsVectorArray_lit.vert @@ -16,7 +16,7 @@ void main() ; RUN: amdllpc -auto-layout-desc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST-COUNT-2: call <4 x float> @lgc.input.import.generic__v4f32{{.*}} +; SHADERTEST-COUNT-2: call <4 x float> @lgc.load.vertex.input__v4f32{{.*}} ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST-COUNT-4: call i32 @llvm.amdgcn.struct.tbuffer.load.i32 ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/object/ObjOutput_TestGsCompSpecifier_lit.geom b/llpc/test/shaderdb/object/ObjOutput_TestGsCompSpecifier_lit.geom index 26bcf4f733..3fe2eb065b 100644 --- a/llpc/test/shaderdb/object/ObjOutput_TestGsCompSpecifier_lit.geom +++ b/llpc/test/shaderdb/object/ObjOutput_TestGsCompSpecifier_lit.geom @@ -23,7 +23,7 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: call void @lgc.output.export.generic{{.*}}v3f32(i32 0, i32 1, i32 0, <3 x float> ) +; SHADERTEST: call void @lgc.output.export.generic{{.*}}v3f32(i32 0, i32 1, i32 0, <3 x float> {{(splat \(float 3\.000000e\+00\))|()}}) ; SHADERTEST: call void @lgc.output.export.generic{{.*}}f32(i32 0, i32 0, i32 0, float 1.500000e+00) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjOutput_TestVsNoGeneric_lit.vert b/llpc/test/shaderdb/object/ObjOutput_TestVsNoGeneric_lit.vert index 2f294bbbeb..ef435c8b3e 100644 --- a/llpc/test/shaderdb/object/ObjOutput_TestVsNoGeneric_lit.vert +++ b/llpc/test/shaderdb/object/ObjOutput_TestVsNoGeneric_lit.vert @@ -9,7 +9,7 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: call void @lgc.output.export.builtin.Position.i32.v4f32(i32 0, <4 x float> ) +; SHADERTEST: call void @lgc.output.export.builtin.Position.i32.v4f32(i32 0, <4 x float> {{(splat \(float 5\.000000e\-01\))|()}}) ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results ; SHADERTEST: call void @llvm.amdgcn.exp.f32 ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestAlign_lit.frag b/llpc/test/shaderdb/object/ObjStorageBlock_TestAlign_lit.frag index f66f6dbe2e..e4f780bdf9 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestAlign_lit.frag +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestAlign_lit.frag @@ -39,12 +39,12 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC.*}} pipeline patching -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> {{%[^,]+}}, i32 16, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 64, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 64, i32 0, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> {{%[^,]+}}, i32 24, i32 0) ; SHADERTEST: call i32 @llvm.amdgcn.s.buffer.load.i32(<4 x i32> {{%[^,]+}}, i32 28, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 256, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32{{(\.v4i32)?}}(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 256, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestDirectIndex_lit.frag b/llpc/test/shaderdb/object/ObjStorageBlock_TestDirectIndex_lit.frag index aa59424318..f9735af23a 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestDirectIndex_lit.frag +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestDirectIndex_lit.frag @@ -24,19 +24,19 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 0, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 20, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 24, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1082130432, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1082130432, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1082130432, <4 x i32> {{%[^,]+}}, i32 40, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1082130432, <4 x i32> {{%[^,]+}}, i32 44, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1084227584, <4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1084227584, <4 x i32> {{%[^,]+}}, i32 52, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1084227584, <4 x i32> {{%[^,]+}}, i32 56, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1084227584, <4 x i32> {{%[^,]+}}, i32 60, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 0, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 20, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 24, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1082130432, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1082130432, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1082130432, <4 x i32> {{%[^,]+}}, i32 40, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1082130432, <4 x i32> {{%[^,]+}}, i32 44, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1084227584, <4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1084227584, <4 x i32> {{%[^,]+}}, i32 52, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1084227584, <4 x i32> {{%[^,]+}}, i32 56, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1084227584, <4 x i32> {{%[^,]+}}, i32 60, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestDouble_lit.frag b/llpc/test/shaderdb/object/ObjStorageBlock_TestDouble_lit.frag index 4514ae76b0..edbccc11fb 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestDouble_lit.frag +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestDouble_lit.frag @@ -26,14 +26,14 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> %{{[0-9]*}}, i32 32 -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> %{{[0-9]*}}, i32 48 -; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32(<4 x i32> %{{[0-9]*}}, i32 8 -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> {{%[^,]+}}, <4 x i32> %{{[0-9]*}}, i32 8 -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> %{{[0-9]*}}, i32 64 -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> %{{[0-9]*}}, i32 80 -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 96 -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 112 +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, i32 32 +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, i32 48 +; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, i32 8 +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32{{(\.v4i32)?}}(<2 x i32> {{%[^,]+}}, <4 x i32> %{{[0-9]*}}, i32 8 +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, i32 64 +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, i32 80 +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 96 +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 112 ; SHADERTEST: AMDLLPC SUCCESS diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt16.comp b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt16.comp index 3f173a3dee..68ccb7b578 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt16.comp +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt16.comp @@ -19,8 +19,8 @@ void main() { /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i16 @llvm.amdgcn.raw.buffer.load.i16( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i16( +; SHADERTEST: call i16 @llvm.amdgcn.raw.buffer.load.i16{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i16{{(\.v4i32)?}}( ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt32.comp b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt32.comp index cb83a1867d..913015b8cc 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt32.comp +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt32.comp @@ -17,38 +17,38 @@ void main() { /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}} ; SHADERTEST-LABEL: {{^// LLPC}} final pipeline module info ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt8.comp b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt8.comp index b958be7372..284ed7ea75 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt8.comp +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemCpyInt8.comp @@ -19,8 +19,8 @@ void main() { /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i8 @llvm.amdgcn.raw.buffer.load.i8( -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i8( +; SHADERTEST: call i8 @llvm.amdgcn.raw.buffer.load.i8{{(\.v4i32)?}}( +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i8{{(\.v4i32)?}}( ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt16.comp b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt16.comp index 40227d63cc..514d56199d 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt16.comp +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt16.comp @@ -18,7 +18,7 @@ void main() { /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i16(i16 0, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i16{{(\.v4i32)?}}(i16 0, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt32.comp b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt32.comp index b1f2a49594..035f9a4b9f 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt32.comp +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt32.comp @@ -16,7 +16,7 @@ void main() { /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST-COUNT-32: call void @llvm.amdgcn.raw.buffer.store.i32(i32 0, +; SHADERTEST-COUNT-32: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 0, ; SHADERTEST-LABEL: {{^// LLPC}} final pipeline module info ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt8.comp b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt8.comp index 1417d0d894..6d57dc1899 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt8.comp +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestMemSetInt8.comp @@ -18,7 +18,7 @@ void main() { /* ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i8(i8 0, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i8{{(\.v4i32)?}}(i8 0, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestMultiLevelAccessChain_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestMultiLevelAccessChain_lit.vert index 788af1911b..fc3aa10870 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestMultiLevelAccessChain_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestMultiLevelAccessChain_lit.vert @@ -29,7 +29,7 @@ void main() ; SHADERTEST: getelementptr {{(inbounds )?}}(<{ [3 x float], [4 x i8], <{ [4 x float] }> }>, ptr addrspace({{.*}}) @{{.*}}, i32 0, i32 2 ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: store <4 x float> , +; SHADERTEST: store <4 x float> {{(splat \(float 1\.000000e\+00\))|()}}, ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestOffset_lit.frag b/llpc/test/shaderdb/object/ObjStorageBlock_TestOffset_lit.frag index 14c80c289c..1087e08244 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestOffset_lit.frag +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestOffset_lit.frag @@ -39,9 +39,9 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC.*}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{[0-9]*}}, i32 128 -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 256 -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> %{{.*}}, <4 x i32> %{{[0-9]*}}, i32 512 +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> %{{.*}}, <4 x i32> %{{[0-9]*}}, i32 128 +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 256 +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32{{(\.v4i32)?}}(<2 x i32> %{{.*}}, <4 x i32> %{{[0-9]*}}, i32 512 ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestRowMajor_lit.frag b/llpc/test/shaderdb/object/ObjStorageBlock_TestRowMajor_lit.frag index 7c808639de..0658475e2d 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestRowMajor_lit.frag +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestRowMajor_lit.frag @@ -51,10 +51,10 @@ void main() // SHADERTEST-NEXT: [[TMP4:%.*]] = inttoptr i64 [[TMP3]] to ptr addrspace(4) // SHADERTEST-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) [[TMP4]], i32 4), "dereferenceable"(ptr addrspace(4) [[TMP4]], i32 -1) ] // SHADERTEST-NEXT: [[TMP5:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP4]], align 16 -// SHADERTEST-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1065353216, <4 x i32> [[TMP5]], i32 0, i32 0, i32 0) -// SHADERTEST-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1065353216, <4 x i32> [[TMP5]], i32 16, i32 0, i32 0) -// SHADERTEST-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1065353216, <4 x i32> [[TMP5]], i32 32, i32 0, i32 0) -// SHADERTEST-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1065353216, <4 x i32> [[TMP5]], i32 48, i32 0, i32 0) +// SHADERTEST-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1065353216, <4 x i32> [[TMP5]], i32 0, i32 0, i32 0) +// SHADERTEST-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1065353216, <4 x i32> [[TMP5]], i32 16, i32 0, i32 0) +// SHADERTEST-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1065353216, <4 x i32> [[TMP5]], i32 32, i32 0, i32 0) +// SHADERTEST-NEXT: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1065353216, <4 x i32> [[TMP5]], i32 48, i32 0, i32 0) // SHADERTEST-NEXT: call void @llvm.amdgcn.exp.f32(i32 0, i32 15, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, i1 true, i1 true) // SHADERTEST-NEXT: ret void // diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicDouble_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicDouble_lit.vert index 3a3363543d..9636a79cd4 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicDouble_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicDouble_lit.vert @@ -22,20 +22,20 @@ void main() ; RUN: amdllpc -enable-load-scalarizer=false -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32(<4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) -; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32(<4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> {{%[^,]+}}, i32 64, i32 0, i32 0) -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> {{%[^,]+}}, i32 80, i32 0, i32 0) +; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32{{(\.v4i32)?}}(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32{{(\.v4i32)?}}(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 64, i32 0, i32 0) +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 80, i32 0, i32 0) ; SHADERTEST: shufflevector <8 x i32> {{%[^,]+}}, <8 x i32> {{poison|undef}}, <4 x i32> ; SHADERTEST: shufflevector <8 x i32> {{%[^,]+}}, <8 x i32> {{poison|undef}}, <4 x i32> -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 64, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 80, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 64, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 80, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicFloat_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicFloat_lit.vert index 8ec5c7736b..3654ad56b8 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicFloat_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicFloat_lit.vert @@ -22,14 +22,14 @@ void main() ; RUN: amdllpc -enable-load-scalarizer=false -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) -; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32(<4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) -; SHADERTEST: call <3 x i32> @llvm.amdgcn.raw.buffer.load.v3i32(<4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v3i32(<3 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32{{(\.v4i32)?}}(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) +; SHADERTEST: call <3 x i32> @llvm.amdgcn.raw.buffer.load.v3i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v3i32{{(\.v4i32)?}}(<3 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicInt_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicInt_lit.vert index 1216729945..642ec27303 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicInt_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicInt_lit.vert @@ -22,14 +22,14 @@ void main() ; RUN: amdllpc -enable-load-scalarizer=false -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) -; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32(<4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) -; SHADERTEST: call <3 x i32> @llvm.amdgcn.raw.buffer.load.v3i32(<4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v3i32(<3 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32{{(\.v4i32)?}}(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) +; SHADERTEST: call <3 x i32> @llvm.amdgcn.raw.buffer.load.v3i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v3i32{{(\.v4i32)?}}(<3 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicUint_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicUint_lit.vert index cf2217e6bb..ea07102131 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicUint_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreBasicUint_lit.vert @@ -22,14 +22,14 @@ void main() ; RUN: amdllpc -enable-load-scalarizer=false -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32(<4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) -; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32(<4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) -; SHADERTEST: call <3 x i32> @llvm.amdgcn.raw.buffer.load.v3i32(<4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v3i32(<3 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32(<4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call i32 @llvm.amdgcn.raw.buffer.load.i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 0, i32 0, i32 0) +; SHADERTEST: call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v2i32{{(\.v4i32)?}}(<2 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 8, i32 0, i32 0) +; SHADERTEST: call <3 x i32> @llvm.amdgcn.raw.buffer.load.v3i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v3i32{{(\.v4i32)?}}(<3 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call <4 x i32> @llvm.amdgcn.raw.buffer.load.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMatrixArray_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMatrixArray_lit.vert index f88ded3030..73e4c32284 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMatrixArray_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMatrixArray_lit.vert @@ -21,14 +21,14 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> , <4 x i32> %{{[0-9]*}}, i32 16, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> , <4 x i32> %{{[0-9]*}}, i32 32, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 48, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 64, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 80, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 96, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> zeroinitializer, <4 x i32> %{{[0-9]*}}, i32 112, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> zeroinitializer, <4 x i32> %{{[0-9]*}}, i32 128, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{(splat \(i32 1065353216\))|()}}, <4 x i32> %{{[0-9]*}}, i32 16, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{(splat \(i32 1065353216\))|()}}, <4 x i32> %{{[0-9]*}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 48, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 64, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 80, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 96, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> zeroinitializer, <4 x i32> %{{[0-9]*}}, i32 112, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> zeroinitializer, <4 x i32> %{{[0-9]*}}, i32 128, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMatrix_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMatrix_lit.vert index 3b489b90d9..d6b4a03ef9 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMatrix_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMatrix_lit.vert @@ -19,10 +19,10 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 64, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 64, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMixedMatrixStyle_lit.frag b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMixedMatrixStyle_lit.frag index 3dd69dbeb5..3680489041 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMixedMatrixStyle_lit.frag +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreMixedMatrixStyle_lit.frag @@ -19,10 +19,10 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 20, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v3i32(<3 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 20, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v3i32{{(\.v4i32)?}}(<3 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 48, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreRowMajorMatrix_lit.frag b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreRowMajorMatrix_lit.frag index b2d0897c66..f98931778b 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreRowMajorMatrix_lit.frag +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreRowMajorMatrix_lit.frag @@ -19,12 +19,12 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1036831949, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1045220557, <4 x i32> {{%[^,]+}}, i32 24, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1050253722, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 20, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1036831949, <4 x i32> {{%[^,]+}}, i32 16, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1045220557, <4 x i32> {{%[^,]+}}, i32 24, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1050253722, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 20, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreScalarArray_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreScalarArray_lit.vert index 658b55de91..ce52f6fdde 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreScalarArray_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreScalarArray_lit.vert @@ -21,8 +21,8 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 4, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> %{{[0-9]*}}, i32 8, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 4, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> %{{[0-9]*}}, i32 8, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreStruct_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreStruct_lit.vert index 81f7977c4c..d123f39b0b 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreStruct_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreStruct_lit.vert @@ -24,12 +24,12 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 96, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 112, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 128, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 144, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 160, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 176, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 96, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 112, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 128, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 144, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 160, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 176, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToMatrixArray_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToMatrixArray_lit.vert index 6f21cf7d35..8ec88a46fb 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToMatrixArray_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToMatrixArray_lit.vert @@ -20,14 +20,14 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 256, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 260, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 264, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 268, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 256, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 260, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 264, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 268, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToMatrix_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToMatrix_lit.vert index 682ac90591..4466c39700 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToMatrix_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToMatrix_lit.vert @@ -19,14 +19,14 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 40, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 44, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 40, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 44, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToRowMajorMatrix_lit.frag b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToRowMajorMatrix_lit.frag index 5fbe159c4a..e7a46b8605 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToRowMajorMatrix_lit.frag +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToRowMajorMatrix_lit.frag @@ -17,10 +17,10 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 20, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 20, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 {{%[^,]+}}, <4 x i32> {{%[^,]+}}, i32 36, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 32, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToScalarVectorArray_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToScalarVectorArray_lit.vert index 9c98c06b4c..4e6c59c0c7 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToScalarVectorArray_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreToScalarVectorArray_lit.vert @@ -22,16 +22,16 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 23, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 45, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 96, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 100, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 104, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 108, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 23, <4 x i32> {{%[^,]+}}, i32 28, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 45, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 96, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 100, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 104, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1073741824, <4 x i32> {{%[^,]+}}, i32 108, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.i32{{(\.v4i32)?}}(i32 1077936128, <4 x i32> {{%[^,]+}}, i32 {{%[^,]+}}, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreVectorArray_lit.vert b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreVectorArray_lit.vert index f3af75438c..c29f47a8b2 100644 --- a/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreVectorArray_lit.vert +++ b/llpc/test/shaderdb/object/ObjStorageBlock_TestStoreVectorArray_lit.vert @@ -21,8 +21,8 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} pipeline patching results -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 16, i32 0, i32 0) -; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32(<4 x i32> , <4 x i32> %{{[0-9]*}}, i32 32, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> %{{[0-9]*}}, <4 x i32> %{{[0-9]*}}, i32 16, i32 0, i32 0) +; SHADERTEST: call void @llvm.amdgcn.raw.buffer.store.v4i32{{(\.v4i32)?}}(<4 x i32> {{(splat \(i32 1065353216\))|()}}, <4 x i32> %{{[0-9]*}}, i32 32, i32 0, i32 0) ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/object/ObjUniformBlock_TestLoadMatrixArray_lit.vert b/llpc/test/shaderdb/object/ObjUniformBlock_TestLoadMatrixArray_lit.vert index 0704a79593..9207cc6667 100644 --- a/llpc/test/shaderdb/object/ObjUniformBlock_TestLoadMatrixArray_lit.vert +++ b/llpc/test/shaderdb/object/ObjUniformBlock_TestLoadMatrixArray_lit.vert @@ -21,9 +21,9 @@ void main() ; SHADERTEST-LABEL: {{^// LLPC}} SPIRV-to-LLVM translation results ; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr {{(inbounds )?}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2), align 16 -; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr ([4 x %llpc.matrix.column], ptr addrspace(7) getelementptr {{(inbounds )?}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2), i32 0, i32 1, i32 0), align 16 -; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr ([4 x %llpc.matrix.column], ptr addrspace(7) getelementptr {{(inbounds )?}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2), i32 0, i32 2, i32 0), align 16 -; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr ([4 x %llpc.matrix.column], ptr addrspace(7) getelementptr {{(inbounds )?}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2), i32 0, i32 3, i32 0), align 16 +; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr {{(inbounds )?}}([4 x %llpc.matrix.column], ptr addrspace(7) getelementptr {{(inbounds )?}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2), i32 0, i32 1, i32 0), align 16 +; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr {{(inbounds )?}}([4 x %llpc.matrix.column], ptr addrspace(7) getelementptr {{(inbounds )?}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2), i32 0, i32 2, i32 0), align 16 +; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr {{(inbounds )?}}([4 x %llpc.matrix.column], ptr addrspace(7) getelementptr {{(inbounds )?}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2), i32 0, i32 3, i32 0), align 16 ; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr {{(inbounds )?}}{{.*}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2{{, i32 1|\), i32 0, i32 1}}), align 16 ; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr {{(inbounds )?}}{{.*}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2{{, i32 1, i32 1, i32 0|\), i32 0, i32 1\), i32 0, i32 1, i32 0}}), align 16 ; SHADERTEST: %{{[0-9]*}} = load <4 x float>, ptr addrspace(7) getelementptr {{(inbounds )?}}{{.*}}(<{ i32, [12 x i8], [2 x [4 x %{{[a-z.]*}}]] }>, ptr addrspace(7) @{{[a-z0-9]+}}, i32 0, i32 2{{, i32 1, i32 2, i32 0|\), i32 0, i32 1\), i32 0, i32 2, i32 0}}), align 16 diff --git a/llpc/test/shaderdb/object/ObjXfb_TestBasic_lit.vert b/llpc/test/shaderdb/object/ObjXfb_TestBasic_lit.vert index 97ae04ec8f..a6582f7697 100644 --- a/llpc/test/shaderdb/object/ObjXfb_TestBasic_lit.vert +++ b/llpc/test/shaderdb/object/ObjXfb_TestBasic_lit.vert @@ -14,7 +14,7 @@ void main() ; RUN: amdllpc -v %gfxip %s | FileCheck -check-prefix=SHADERTEST %s ; SHADERTEST-LABEL: {{^// LLPC}} SPIR-V lowering results -; SHADERTEST: call void @lgc.output.export.xfb.i32.i32.i32.v4f32(i32 0, i32 16, i32 0, <4 x float> ) +; SHADERTEST: call void @lgc.output.export.xfb.i32.i32.i32.v4f32(i32 0, i32 16, i32 0, <4 x float> {{(splat \(float 2\.000000e\+00\))|()}} ; SHADERTEST: AMDLLPC SUCCESS */ diff --git a/llpc/test/shaderdb/ray_tracing/PipelineRayquery.pipe b/llpc/test/shaderdb/ray_tracing/PipelineRayquery.pipe index 752d15aa95..fd929834c5 100644 --- a/llpc/test/shaderdb/ray_tracing/PipelineRayquery.pipe +++ b/llpc/test/shaderdb/ray_tracing/PipelineRayquery.pipe @@ -260,11 +260,11 @@ rtState.rtIpOverride = 0 ; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], [[__LLPC_INPUT_PROXY_GL_GLOBALINVOCATIONID_0_VEC_EXTRACT]] ; CHECK-NEXT: [[TMP10:%.*]] = call ptr addrspace(7) @lgc.buffer.index(ptr addrspace(7) [[TMP3]], i32 32, i32 [[TMP9]]) ; CHECK-NEXT: [[TMP11:%.*]] = load <3 x float>, ptr addrspace(7) [[TMP10]], align 4 -; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(7) [[TMP10]], i32 12 +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP10]], i32 12 ; CHECK-NEXT: [[TMP13:%.*]] = load float, ptr addrspace(7) [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(7) [[TMP10]], i32 16 +; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP10]], i32 16 ; CHECK-NEXT: [[TMP15:%.*]] = load <3 x float>, ptr addrspace(7) [[TMP14]], align 4 -; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(7) [[TMP10]], i32 28 +; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP10]], i32 28 ; CHECK-NEXT: [[TMP17:%.*]] = load float, ptr addrspace(7) [[TMP16]], align 4 ; CHECK-NEXT: [[TMP18:%.*]] = call ptr addrspace(5) (...) @lgc.rtq.gep.opaque([3 x i127] poison, i1 false, ptr addrspace(5) [[__LLPC_GLOBAL_PROXY_Q]], i32 0, i32 2) ; CHECK-NEXT: [[TMP19:%.*]] = load <2 x i32>, ptr addrspace(4) [[TMP1]], align 8 diff --git a/llpc/test/shaderdb/ray_tracing/PipelineRays_Continuations.pipe b/llpc/test/shaderdb/ray_tracing/PipelineRays_Continuations.pipe new file mode 100644 index 0000000000..09db5cfe81 --- /dev/null +++ b/llpc/test/shaderdb/ray_tracing/PipelineRays_Continuations.pipe @@ -0,0 +1,151 @@ +; Check that the ray tracing continuations mode is working. +; Generating the instruction 'image_bvh64_intersect_ray' indicates the trace ray library is linked correctly. + +; TODO: Change this to ISA / assembly output checks once the LLVM backend has settled + +; RUN: amdllpc -gfxip 11.0 -emit-llvm -o - %s | FileCheck -check-prefixes=CHECK %s + +; CHECK-LABEL: @_amdgpu_cs_main( +; CHECK: call void {{.*}} @llvm.amdgcn.cs.chain. + +; CHECK-LABEL: @_rgen_1( +; CHECK: call void {{.*}} @llvm.amdgcn.cs.chain. + +; CHECK-LABEL: @_rgen_1.resume.0( +; CHECK: call void {{.*}} @llvm.amdgcn.cs.chain. +; CHECK: unreachable +; CHECK: ret void + +; CHECK-LABEL: @_chit_2( +; CHECK: call void {{.*}} @llvm.amdgcn.cs.chain. + +; CHECK-LABEL: @_cs_( +; CHECK: call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray. +; CHECK-NOT: ret void +; CHECK: call void {{.*}} @llvm.amdgcn.cs.chain. +; CHECK-NOT: ret void + +[Version] +version = 69 + +[rgenGlsl] +#version 460 +#extension GL_EXT_ray_tracing : require + +struct RayPayload { + vec3 color; +}; + +layout(binding = 0, set = 0) uniform accelerationStructureEXT g_bvh; +layout(binding = 1, set = 0, rgba32f) uniform image2D g_dst; + +layout(location = 14) rayPayloadEXT RayPayload g_ray; + +void main() { + vec3 origin; + origin.x = gl_LaunchIDEXT.x; + origin.y = gl_LaunchIDEXT.y; + origin.z = 0; + + traceRayEXT(g_bvh, /* ray flags */ 0, /* cull mask */ 0xff, + /* sbt offset */ 0, /* sbt stride */ 1, /* miss index */ 0, + origin.xyz, /* tmin */ 0.0, /* direction */ vec3(1, 0, 0), + /* tmax */ 48.0, /* payload location */ 14); + + imageStore(g_dst, ivec2(gl_LaunchIDEXT.xy), vec4(g_ray.color, 0)); +} + +[rgenInfo] +entryPoint = main + +[chitGlsl] +#version 460 +#extension GL_EXT_ray_tracing : require + +struct RayPayload { + vec3 color; +}; + +layout(shaderRecordEXT, std430) buffer sbt { + float z; +}; + +hitAttributeEXT vec2 g_hit; +rayPayloadInEXT RayPayload g_ray; + +void main() { + g_ray.color.xy = g_hit; + g_ray.color.z = z; +} + +[chitInfo] +entryPoint = main + +[ResourceMapping] +userDataNode[0].visibility = 0xffffffff +userDataNode[0].type = DescriptorTableVaPtr +userDataNode[0].offsetInDwords = 0 +userDataNode[0].sizeInDwords = 1 +userDataNode[0].next[0].type = DescriptorConstBuffer +userDataNode[0].next[0].offsetInDwords = 0 +userDataNode[0].next[0].sizeInDwords = 4 +userDataNode[0].next[0].set = 0x00000000 +userDataNode[0].next[0].binding = 0 +userDataNode[0].next[1].type = DescriptorImage +userDataNode[0].next[1].offsetInDwords = 4 +userDataNode[0].next[1].sizeInDwords = 8 +userDataNode[0].next[1].set = 0x00000000 +userDataNode[0].next[1].binding = 1 +userDataNode[1].visibility = 0xffffffff +userDataNode[1].type = DescriptorTableVaPtr +userDataNode[1].offsetInDwords = 1 +userDataNode[1].sizeInDwords = 1 +userDataNode[1].next[0].type = DescriptorConstBufferCompact +userDataNode[1].next[0].offsetInDwords = 0 +userDataNode[1].next[0].sizeInDwords = 2 +userDataNode[1].next[0].set = 0x0000005D +userDataNode[1].next[0].binding = 17 +userDataNode[1].next[1].type = DescriptorConstBuffer +userDataNode[1].next[1].offsetInDwords = 2 +userDataNode[1].next[1].sizeInDwords = 4 +userDataNode[1].next[1].set = 0x0000005D +userDataNode[1].next[1].binding = 0 +userDataNode[1].next[2].type = DescriptorBuffer +userDataNode[1].next[2].offsetInDwords = 6 +userDataNode[1].next[2].sizeInDwords = 4 +userDataNode[1].next[2].set = 0x0000005D +userDataNode[1].next[2].binding = 1 + +[RayTracingPipelineState] +groups[0].type = VK_RAY_TRACING_SHADER_GROUP_TYPE_GENERAL_KHR +groups[0].generalShader = 0 +groups[0].closestHitShader = -1 +groups[0].anyHitShader = -1 +groups[0].intersectionShader = -1 +groups[1].type = VK_RAY_TRACING_SHADER_GROUP_TYPE_TRIANGLES_HIT_GROUP_KHR +groups[1].closestHitShader = 1 +maxRecursionDepth = 1 +indirectStageMask = 0xffffffff +mode = 3 +rtState.bvhResDescSize = 4 +rtState.bvhResDesc[0] = 0 +rtState.bvhResDesc[1] = 2197815296 +rtState.bvhResDesc[2] = 4294967295 +rtState.bvhResDesc[3] = 2164261887 +rtState.nodeStrideShift = 7 +rtState.threadGroupSizeX = 8 +rtState.threadGroupSizeY = 4 +rtState.threadGroupSizeZ = 1 +rtState.rayQueryCsSwizzle = 1 +rtState.ldsStackSize = 16 +rtState.dispatchRaysThreadGroupSize = 32 +rtState.ldsSizePerThreadGroup = 65536 +rtState.outerTileSize = 4 +rtState.dispatchDimSwizzleMode = 0 +rtState.enableDispatchRaysInnerSwizzle = 1 +rtState.enableDispatchRaysOuterSwizzle = 1 +rtState.enableOptimalLdsStackSizeForIndirect = 1 +rtState.enableOptimalLdsStackSizeForUnified = 1 +payloadSizeMaxInLib = 12 +attributeSizeMaxInLib = 8 +hasPipelineLibrary = 1 diff --git a/llpc/test/shaderdb/ray_tracing/TestHitAttribute.rint b/llpc/test/shaderdb/ray_tracing/TestHitAttribute.rint new file mode 100644 index 0000000000..1fe4112fc3 --- /dev/null +++ b/llpc/test/shaderdb/ray_tracing/TestHitAttribute.rint @@ -0,0 +1,18 @@ +// BEGIN_SHADERTEST +/* +; Check that a hit attribute value that is not reported is never written out. +; RUN: amdllpc -filetype=asm %gfxip -o - %s | FileCheck -check-prefix=CHECK %s +; CHECK: 0x12345678 +; CHECK-NOT: 0x87654321 +*/ +// END_SHADERTEST + +#version 460 +#extension GL_EXT_ray_tracing : require +hitAttributeEXT int attr; +void main() +{ + attr = 0x12345678; + reportIntersectionEXT(1.0f, 0); + attr = 0x87654321; +} diff --git a/llpc/test/shaderdb/ray_tracing/TestProcessGpuRtLibrary.rgen b/llpc/test/shaderdb/ray_tracing/TestProcessGpuRtLibrary.rgen new file mode 100644 index 0000000000..9cc5a5e406 --- /dev/null +++ b/llpc/test/shaderdb/ray_tracing/TestProcessGpuRtLibrary.rgen @@ -0,0 +1,16 @@ +// RUN: amdllpc %gfxip --print-after=lower-gpurt-library 2>&1 %s | FileCheck -check-prefix=CHECK %s +#version 460 +#extension GL_EXT_ray_tracing : enable + +void main() +{ +} +// Check these _Amd intrinsics's bodies are deleted. +// CHECK: declare dso_local spir_func i32 @_AmdGetShaderKind() +// CHECK: declare dso_local spir_func i32 @_AmdGetResumePointAddr() +// CHECK: declare dso_local spir_func {{.*}} @_AmdAwait{{.*}}( + +// Check these functions started with `_Amd` but are not intrinsics are preserved +// CHECK-NOT: declare dso_local spir_func {{.*}} @_AmdSystemData.{{.*}}( +// CHECK-NOT: declare dso_local spir_func {{.*}} @_AmdDispatchSystemData.{{.*}}( +// CHECK-NOT: declare dso_local spir_func {{.*}} @_AmdPrimitiveSystemState.{{.*}}( diff --git a/llpc/test/shaderdb/ray_tracing/standalone.rmiss b/llpc/test/shaderdb/ray_tracing/standalone.rmiss index f5c8e3af42..6252aa03a7 100644 --- a/llpc/test/shaderdb/ray_tracing/standalone.rmiss +++ b/llpc/test/shaderdb/ray_tracing/standalone.rmiss @@ -9,7 +9,6 @@ ; SHADERTEST: s_addc_u32 s[[shader_record_hi:[0-9]+]], s[[address_hi]], 0 ; SHADERTEST-NOT: v_mad_u64_u32 v{{[[0-9]+:[0-9]+]}}, null, [[stride]], v4, 32 ; SHADERTEST-NOT: global_load_dword v{{[0-9]}}, v{{[0-9]}}, s[[[address_lo]]:[[address_hi]]] -; SHADERTEST: buffer_load_dword v{{[0-9]+}}, v{{[0-9]+}}, s{{\[}}[[shader_record_lo]]:{{[0-9]+\]}}, {{[0-9]+}} idxen ; SHADERTEST: AMDLLPC SUCCESS */ // END_SHADERTEST diff --git a/llpc/test/shaderdb/relocatable_shaders/PipelineVsFs_EnableColorExport.pipe b/llpc/test/shaderdb/relocatable_shaders/PipelineVsFs_EnableColorExport.pipe index 5bdbe31d34..6471ed5c79 100644 --- a/llpc/test/shaderdb/relocatable_shaders/PipelineVsFs_EnableColorExport.pipe +++ b/llpc/test/shaderdb/relocatable_shaders/PipelineVsFs_EnableColorExport.pipe @@ -73,7 +73,7 @@ attribute[0].offset = 0 ; SHADERTEST-LABEL: @lgc.shader.VS.main( ; SHADERTEST-NEXT: .entry: -; SHADERTEST-NEXT: [[TMP0:%.*]] = call <2 x float> @lgc.input.import.generic__v2f32(i1 false, i32 0, i32 0, i32 0, i32 poison) +; SHADERTEST-NEXT: [[TMP0:%.*]] = call <2 x float> @lgc.load.vertex.input__v2f32(i1 false, i32 0, i32 0, i32 0, i32 poison, i32 poison, i32 poison) ; SHADERTEST-NEXT: call void @lgc.output.export.generic.i32.i32.v2f32(i32 0, i32 0, <2 x float> [[TMP0]]) #[[ATTR2:[0-9]+]] ; SHADERTEST-NEXT: ret void ; diff --git a/llpc/tool/amdllpc.cpp b/llpc/tool/amdllpc.cpp index 0bf253bbac..69fb031fb7 100644 --- a/llpc/tool/amdllpc.cpp +++ b/llpc/tool/amdllpc.cpp @@ -307,23 +307,12 @@ cl::opt DumpDuplicatePipelines( // `-opt` option in lgc. The reason for the second option is to be able to test the LLPC API. If both options are set // then `-opt` wins. -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 -// Old version of the code -cl::opt LlpcOptLevel("llpc-opt", cl::desc("The optimization level for amdllpc to pass to LLPC:"), - cl::init(CodeGenOpt::Default), - values(clEnumValN(CodeGenOpt::None, "none", "no optimizations"), - clEnumValN(CodeGenOpt::Less, "quick", "quick compilation time"), - clEnumValN(CodeGenOpt::Default, "default", "default optimizations"), - clEnumValN(CodeGenOpt::Aggressive, "fast", "fast execution time"))); -#else - // New version of the code (also handles unknown version, which we treat as latest) cl::opt LlpcOptLevel("llpc-opt", cl::desc("The optimization level for amdllpc to pass to LLPC:"), cl::init(CodeGenOptLevel::Default), values(clEnumValN(CodeGenOptLevel::None, "none", "no optimizations"), clEnumValN(CodeGenOptLevel::Less, "quick", "quick compilation time"), clEnumValN(CodeGenOptLevel::Default, "default", "default optimizations"), clEnumValN(CodeGenOptLevel::Aggressive, "fast", "fast execution time"))); -#endif // -resource-layout-scheme: specifies the layout scheme of the resource cl::opt LayoutScheme("resource-layout-scheme", cl::desc("The resource layout scheme:"), @@ -575,15 +564,8 @@ static void initCompileInfo(CompileInfo *compileInfo) { } // We want the default optimization level to be "Default" which is not 0. -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - compileInfo->gfxPipelineInfo.options.optimizationLevel = static_cast(CodeGenOpt::Level::Default); - compileInfo->compPipelineInfo.options.optimizationLevel = static_cast(CodeGenOpt::Level::Default); -#else - // New version of the code (also handles unknown version, which we treat as latest) compileInfo->gfxPipelineInfo.options.optimizationLevel = static_cast(CodeGenOptLevel::Default); compileInfo->compPipelineInfo.options.optimizationLevel = static_cast(CodeGenOptLevel::Default); -#endif compileInfo->gfxPipelineInfo.options.resourceLayoutScheme = LayoutScheme; compileInfo->compPipelineInfo.options.forceCsThreadIdSwizzling = ForceCsThreadIdSwizzling; @@ -665,6 +647,11 @@ static Error fixupRtState(RtState &rtState, std::vector &shaderLibraryStor rtState.gpurtShaderLibrary.codeSize = shaderLibraryStorage.size(); } + // BVH SRD is not set up, which could be result of a standalone compilation. Set size to a valid value to not crash + // compiler. + if (rtState.bvhResDesc.dataSizeInDwords == 0) + rtState.bvhResDesc.dataSizeInDwords = 4; + return Error::success(); } @@ -744,7 +731,6 @@ static Error processInputs(ICompiler *compiler, InputSpecGroup &inputSpecs, bool RtState &state = compileInfo.rayTracePipelineInfo.rtState; state.pipelineFlags = 0; state.nodeStrideShift = 7; - state.bvhResDesc.dataSizeInDwords = 4; state.threadGroupSizeX = 8; state.threadGroupSizeY = 4; state.threadGroupSizeZ = 1; diff --git a/llpc/tool/llpcCompilationUtils.h b/llpc/tool/llpcCompilationUtils.h index d7ea7ed403..14ce6bb15b 100644 --- a/llpc/tool/llpcCompilationUtils.h +++ b/llpc/tool/llpcCompilationUtils.h @@ -106,14 +106,8 @@ struct CompileInfo { optional_bool scratchAccessBoundsChecks; // Whether to enable scratch access bounds checks optional_bool enableImplicitInvariantExports; // Whether to enable implicit marking of position exports as invariant VfxPipelineType pipelineType; // Pipeline type -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - std::optional optimizationLevel; // The optimization level to pass the compiler -#else - // New version of the code (also handles unknown version, which we treat as latest) std::optional optimizationLevel; // The optimization level to pass the compiler -#endif - bool internalRtShaders; // Whether to enable intrinsics for internal RT shaders + bool internalRtShaders; // Whether to enable intrinsics for internal RT shaders bool enableColorExportShader; // Enable color export shader, only compile each stage of the pipeline without linking }; diff --git a/llpc/translator/lib/SPIRV/SPIRVReader.cpp b/llpc/translator/lib/SPIRV/SPIRVReader.cpp index b2d5937f95..b99db2ccc0 100644 --- a/llpc/translator/lib/SPIRV/SPIRVReader.cpp +++ b/llpc/translator/lib/SPIRV/SPIRVReader.cpp @@ -879,6 +879,13 @@ Type *SPIRVToLLVM::transTypeWithOpcode(SPIRVType *const spvTy hasSamplerOrNested = true; } else if (spvMemberType->getOpCode() == OpTypeStruct || spvMemberType->getOpCode() == OpTypeArray || spvMemberType->getOpCode() == OpTypeRuntimeArray) { + if (spvMemberType->isTypeArray()) { + if (spvMemberType->getArrayElementType()->isTypeSampledImage() || + spvMemberType->getArrayElementType()->isTypeImage() || + spvMemberType->getArrayElementType()->isTypeSampler()) { + memberType = emptyStructType; + } + } auto it = m_imageTypeMap.find(ctxMemberType.asTuple()); if (it != m_imageTypeMap.end()) { imageMemberType = static_cast(it->second); @@ -1286,6 +1293,7 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *bv, Function *f, BasicBlock *bb lgc::CooperativeMatrixLayout srcLayout = lgc::CooperativeMatrixLayout::InvalidLayout; lgc::CooperativeMatrixLayout dstLayout = lgc::CooperativeMatrixLayout::InvalidLayout; + bool isExt = dstType->getScalarSizeInBits() > srcType->getScalarSizeInBits(); if (bv->getType()->isTypeCooperativeMatrixKHR()) { auto srcCompType = static_cast(srcSpvType)->getCooperativeMatrixKHRComponentType(); srcElemTy = mapToBasicType(srcCompType); @@ -1298,7 +1306,6 @@ Value *SPIRVToLLVM::transConvertInst(SPIRVValue *bv, Function *f, BasicBlock *bb srcLayout = getCooperativeMatrixKHRLayout(static_cast(dstUse), srcElemTy, rows, columns); } - bool isExt = dstType->getScalarSizeInBits() > srcType->getScalarSizeInBits(); switch (bc->getOpCode()) { case OpSConvert: co = isExt ? Instruction::SExt : Instruction::Trunc; @@ -2015,8 +2022,8 @@ Value *SPIRVToLLVM::addLoadInstRecursively(SPIRVType *const spvType, Value *load SmallVector indices = {zero, getBuilder()->getInt32(memberIndex)}; - Value *memberLoadPointer = useSGep ? getBuilder()->create(loadPointer, loadType, false, indices) - : getBuilder()->CreateGEP(loadType, loadPointer, indices); + Value *memberLoadPointer = useSGep ? getBuilder()->create(loadPointer, loadType, true, indices) + : getBuilder()->CreateInBoundsGEP(loadType, loadPointer, indices); Type *memberLoadType = nullptr; @@ -2066,8 +2073,8 @@ Value *SPIRVToLLVM::addLoadInstRecursively(SPIRVType *const spvType, Value *load if (needsPad) indices.push_back(zero); - Value *elementLoadPointer = useSGep ? getBuilder()->create(loadPointer, loadType, false, indices) - : getBuilder()->CreateGEP(loadType, loadPointer, indices); + Value *elementLoadPointer = useSGep ? getBuilder()->create(loadPointer, loadType, true, indices) + : getBuilder()->CreateInBoundsGEP(loadType, loadPointer, indices); Type *const elementLoadType = GetElementPtrInst::getIndexedType(loadType, indices); Value *const elementLoad = addLoadInstRecursively(spvElementType, elementLoadPointer, elementLoadType, isVolatile, isCoherent, isNonTemporal); @@ -2083,7 +2090,7 @@ Value *SPIRVToLLVM::addLoadInstRecursively(SPIRVType *const spvType, Value *load Value *load = PoisonValue::get(VectorType::get(elementType, spvType->getVectorComponentCount(), false)); for (unsigned i = 0, elementCount = spvType->getVectorComponentCount(); i < elementCount; i++) { Value *const elementLoadPointer = - getBuilder()->CreateGEP(loadType, loadPointer, {zero, getBuilder()->getInt32(i)}); + getBuilder()->CreateInBoundsGEP(loadType, loadPointer, {zero, getBuilder()->getInt32(i)}); Value *const elementLoad = addLoadInstRecursively(spvElementType, elementLoadPointer, elementType, isVolatile, isCoherent, isNonTemporal); load = getBuilder()->CreateInsertElement(load, elementLoad, i); @@ -2169,8 +2176,8 @@ void SPIRVToLLVM::addStoreInstRecursively(SPIRVType *const spvType, Value *store const unsigned memberIndex = needsPad ? lookupRemappedTypeElements(spvType, i) : i; Value *indices[] = {zero, getBuilder()->getInt32(memberIndex)}; Value *const memberStorePointer = - useSGep ? getBuilder()->create(storePointer, storeType, false, indices) - : getBuilder()->CreateGEP(storeType, storePointer, indices); + useSGep ? getBuilder()->create(storePointer, storeType, true, indices) + : getBuilder()->CreateInBoundsGEP(storeType, storePointer, indices); Type *const memberStoreType = GetElementPtrInst::getIndexedType(storeType, indices); Value *const memberStoreValue = getBuilder()->CreateExtractValue(storeValue, i); addStoreInstRecursively(spvType->getStructMemberType(i), memberStorePointer, memberStoreType, memberStoreValue, @@ -2190,8 +2197,8 @@ void SPIRVToLLVM::addStoreInstRecursively(SPIRVType *const spvType, Value *store if (needsPad) indices.push_back(zero); Value *const elementStorePointer = - useSGep ? getBuilder()->create(storePointer, storeType, false, indices) - : getBuilder()->CreateGEP(storeType, storePointer, indices); + useSGep ? getBuilder()->create(storePointer, storeType, true, indices) + : getBuilder()->CreateInBoundsGEP(storeType, storePointer, indices); Type *const elementStoreType = GetElementPtrInst::getIndexedType(storeType, indices); Value *const elementStoreValue = getBuilder()->CreateExtractValue(storeValue, i); addStoreInstRecursively(spvElementType, elementStorePointer, elementStoreType, elementStoreValue, isVolatile, @@ -2203,7 +2210,7 @@ void SPIRVToLLVM::addStoreInstRecursively(SPIRVType *const spvType, Value *store for (unsigned i = 0, elementCount = spvType->getVectorComponentCount(); i < elementCount; i++) { Value *indices[] = {zero, getBuilder()->getInt32(i)}; - Value *const elementStorePointer = getBuilder()->CreateGEP(storeType, storePointer, indices); + Value *const elementStorePointer = getBuilder()->CreateInBoundsGEP(storeType, storePointer, indices); Type *const elementStoreType = GetElementPtrInst::getIndexedType(storeType, indices); Value *const elementStoreValue = getBuilder()->CreateExtractElement(storeValue, i); addStoreInstRecursively(spvElementType, elementStorePointer, elementStoreType, elementStoreValue, isVolatile, @@ -5912,7 +5919,7 @@ SmallVector SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *bv, Fu PHINode *phiNode = nullptr; if (bb->getFirstInsertionPt() != bb->end()) phiNode = PHINode::Create(transType(phi->getType()), phi->getPairs().size() / 2, phi->getName(), - &*bb->getFirstInsertionPt()); + bb->getFirstInsertionPt()); else phiNode = PHINode::Create(transType(phi->getType()), phi->getPairs().size() / 2, phi->getName(), bb); @@ -6067,7 +6074,7 @@ SmallVector SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *bv, Fu // inlining. Try to move those alloc instructions to the entry block. auto firstInst = bb->getParent()->getEntryBlock().getFirstInsertionPt(); if (firstInst != bb->getParent()->getEntryBlock().end()) - ai = new AllocaInst(at, m_m->getDataLayout().getAllocaAddrSpace(), "", &*firstInst); + ai = new AllocaInst(at, m_m->getDataLayout().getAllocaAddrSpace(), "", firstInst); else ai = new AllocaInst(at, m_m->getDataLayout().getAllocaAddrSpace(), "", bb); @@ -9073,7 +9080,6 @@ bool SPIRVToLLVM::transMetadata() { computeMode.workgroupSizeZ = workgroupSizeZ; } Pipeline::setComputeShaderMode(*m_m, computeMode); - } else llvm_unreachable("Invalid execution model"); @@ -9106,6 +9112,28 @@ bool SPIRVToLLVM::checkContains64BitType(SPIRVType *bt) { return false; } +// Function to remap output locations based on the location map +unsigned SPIRVToLLVM::remapOutputLocation(unsigned loc) { + unsigned remappedLocation = loc; + Vkgc::ShaderStage stage = convertToShaderStage(m_execModule); + assert(stage < ShaderStageGfxCount); + Llpc::Context *llpcContext = static_cast(m_context); + auto buildInfo = static_cast(llpcContext->getPipelineBuildInfo()); + auto outLocationMaps = buildInfo->outLocationMaps; + assert(outLocationMaps); + + if (outLocationMaps[stage].count > 0) { + for (unsigned j = 0; j < outLocationMaps[stage].count; j++) { + if (loc == outLocationMaps[stage].oldLocation[j]) { + remappedLocation = outLocationMaps[stage].newLocation[j]; + break; + } + } + } + + return remappedLocation; +} + bool SPIRVToLLVM::transDecoration(SPIRVValue *bv, ArrayRef values) { auto gv = dyn_cast(values[0]); // Some SPIR-V instructions (e.g. OpAccessChain) can become no-ops in LLVM IR, @@ -9145,7 +9173,10 @@ bool SPIRVToLLVM::transDecoration(SPIRVValue *bv, ArrayRef values) { SPIRVWord loc = SPIRVID_INVALID; if (bv->hasDecorate(DecorationLocation, 0, &loc)) { inOutDec.IsBuiltIn = false; - inOutDec.Value.Loc = loc; + if (getPipelineOptions()->getGlState().enableRemapLocation && as == SPIRAS_Output) + inOutDec.Value.Loc = remapOutputLocation(loc); + else + inOutDec.Value.Loc = loc; } SPIRVWord index = SPIRVID_INVALID; @@ -9427,7 +9458,7 @@ bool SPIRVToLLVM::transDecoration(SPIRVValue *bv, ArrayRef values) { // NOTE: For OpCopyObject, we use the operand value directly, which may be in another block that already has a // terminator. In this case, insert the call before the terminator. assert(bv->getOpCode() == OpCopyObject); - CallInst::Create(f, args, "", bb->getTerminator()); + CallInst::Create(f, args, "", bb->getTerminator()->getIterator()); } else { CallInst::Create(f, args, "", bb); } @@ -10659,10 +10690,7 @@ Value *SPIRVToLLVM::transGLSLBuiltinFromExtInst(SPIRVExtInst *bc, BasicBlock *bb if (isFuncNoUnwind()) func->addFnAttr(Attribute::NoUnwind); } - CallInst *call = CallInst::Create(func, args, bc->getName(), bb); - setCallingConv(call); - call->addFnAttr(Attribute::NoUnwind); - return call; + return getBuilder()->CreateCall(func, args, bc->getName()); } void SPIRVToLLVM::transMemFence(BasicBlock *bb, SPIRVWord memSema, SPIRVWord memScope) { diff --git a/llpc/translator/lib/SPIRV/SPIRVReader.h b/llpc/translator/lib/SPIRV/SPIRVReader.h index b8f6e4ea94..ef0e0c1fb3 100644 --- a/llpc/translator/lib/SPIRV/SPIRVReader.h +++ b/llpc/translator/lib/SPIRV/SPIRVReader.h @@ -147,6 +147,7 @@ class SPIRVToLLVM { Value *transGroupArithOp(lgc::Builder::GroupArithOp, SPIRVValue *); bool transDecoration(SPIRVValue *, ArrayRef); + unsigned remapOutputLocation(unsigned loc); bool checkContains64BitType(SPIRVType *bt); Constant *buildShaderInOutMetadata(SPIRVType *bt, ShaderInOutDecorate &inOutDec, Type *&metaTy, bool vs64bitsAttrib); Constant *buildShaderBlockMetadata(SPIRVType *bt, ShaderBlockDecorate &blockDec, Type *&mdTy, diff --git a/llpc/translator/lib/SPIRV/SPIRVToLLVMDbgTran.cpp b/llpc/translator/lib/SPIRV/SPIRVToLLVMDbgTran.cpp index 0a4907836a..caba0d13bb 100644 --- a/llpc/translator/lib/SPIRV/SPIRVToLLVMDbgTran.cpp +++ b/llpc/translator/lib/SPIRV/SPIRVToLLVMDbgTran.cpp @@ -238,13 +238,7 @@ DIType *SPIRVToLLVMDbgTran::transTypePointer(const SPIRVExtInst *DebugInst) { DIType *PointeeTy = nullptr; if (BM->getEntry(Ops[BaseTypeIdx])->getOpCode() != OpTypeVoid) PointeeTy = transDebugInst(BM->get(Ops[BaseTypeIdx])); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 444152 - // Old version of the code - Optional AS; -#else - // New version of the code (also handles unknown version, which we treat as latest) std::optional AS; -#endif auto storageClass = getConstant(Ops[StorageClassIdx]); if (storageClass != ~0U) { auto SC = static_cast(storageClass); @@ -330,11 +324,8 @@ DICompositeType *SPIRVToLLVMDbgTran::transTypeComposite(const SPIRVExtInst *Debu switch (getConstant(Ops[TagIdx])) { case SPIRVDebug::Class: CT = Builder.createClassType(ParentScope, Name, File, LineNo, Size, Align, 0, Flags, DerivedFrom, - DINodeArray() /*elements*/, -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 480873 - 0 /*RunTimeLang*/, -#endif - nullptr /*VTableHolder*/, nullptr /*TemplateParams*/, Identifier); + DINodeArray() /*elements*/, 0 /*RunTimeLang*/, nullptr /*VTableHolder*/, + nullptr /*TemplateParams*/, Identifier); break; case SPIRVDebug::Structure: CT = Builder.createStructType(ParentScope, Name, File, LineNo, Size, Align, Flags, DerivedFrom, @@ -376,15 +367,8 @@ DINode *SPIRVToLLVMDbgTran::transTypeMember(const SPIRVExtInst *DebugInst) { SPIRVValue *ConstVal = BM->get(Ops[ValueIdx]); assert(isConstantOpCode(ConstVal->getOpCode()) && "Static member must be a constant"); llvm::Value *Val = SPIRVReader->transValue(ConstVal, nullptr, nullptr); - return Builder.createStaticMemberType( - Scope, Name, File, LineNo, BaseType, Flags, - cast(Val) -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 480812 - // New version of the code (also handles unknown version, which we treat as latest) - , - llvm::dwarf::DW_TAG_member -#endif - ); + return Builder.createStaticMemberType(Scope, Name, File, LineNo, BaseType, Flags, cast(Val), + llvm::dwarf::DW_TAG_member); } uint64_t Size = getConstant(Ops[SizeIdx]); uint64_t Alignment = 0; @@ -420,10 +404,7 @@ DINode *SPIRVToLLVMDbgTran::transTypeEnum(const SPIRVExtInst *DebugInst) { if (!isa(E)) UnderlyingType = transDebugInst(static_cast(E)); return Builder.createEnumerationType(Scope, Name, File, LineNo, SizeInBits, AlignInBits, Enumerators, UnderlyingType, -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 480873 - 0 /*RunTimeLang*/, -#endif - "", UnderlyingType); + 0 /*RunTimeLang*/, "", UnderlyingType); } DINode *SPIRVToLLVMDbgTran::transTypeFunction(const SPIRVExtInst *DebugInst) { @@ -876,12 +857,7 @@ Instruction *SPIRVToLLVMDbgTran::transDebugIntrinsic(const SPIRVExtInst *DebugIn auto GetExpression = [&](SPIRVId Id) -> DIExpression * { return transDebugInst(BM->get(Id)); }; - using LLPCDbgInstPtr = -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 492382 - DbgInstPtr; -#else - Instruction *; -#endif + using LLPCDbgInstPtr = DbgInstPtr; SPIRVWordVec Ops = DebugInst->getArguments(); switch (DebugInst->getExtOp()) { case SPIRVDebug::Scope: @@ -921,7 +897,6 @@ Instruction *SPIRVToLLVMDbgTran::transDebugIntrinsic(const SPIRVExtInst *DebugIn DbgInst = Builder.insertDeclare(GetValue(Ops[VariableIdx]), LocalVar.first, GetExpression(Ops[ExpressionIdx]), LocalVar.second, BB); } -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 492382 // Debug Info Format is in transition phase right now. // If new Debug Info Format is turned ON then 'insertDeclare' will return DbgRecord. // If new Debug Info Format is turned OFF then 'insertDeclare' will return Instruction (Intrinsic) which we are @@ -932,24 +907,17 @@ Instruction *SPIRVToLLVMDbgTran::transDebugIntrinsic(const SPIRVExtInst *DebugIn } else { return nullptr; } -#else - return DbgInst; -#endif } case SPIRVDebug::Value: { using namespace SPIRVDebug::Operand::DebugValue; auto LocalVar = GetLocalVar(Ops[DebugLocalVarIdx]); LLPCDbgInstPtr DbgInst = Builder.insertDbgValueIntrinsic(GetValue(Ops[ValueIdx]), LocalVar.first, GetExpression(Ops[ExpressionIdx]), LocalVar.second, BB); -#if !defined(LLVM_MAIN_REVISION) || LLVM_MAIN_REVISION >= 492382 if (DbgInst.is()) { return DbgInst.get(); } else { return nullptr; } -#else - return DbgInst; -#endif } default: llvm_unreachable("Unknown debug intrinsic!"); diff --git a/llpc/translator/lib/SPIRV/libSPIRV/SPIRVInstruction.h b/llpc/translator/lib/SPIRV/libSPIRV/SPIRVInstruction.h index dcfce39db2..5bd63faef8 100644 --- a/llpc/translator/lib/SPIRV/libSPIRV/SPIRVInstruction.h +++ b/llpc/translator/lib/SPIRV/libSPIRV/SPIRVInstruction.h @@ -1560,7 +1560,7 @@ class SPIRVExtInst : public SPIRVFunctionCallGeneric { : ExtSetId(SPIRVWORD_MAX), ScopeId(SPIRVWORD_MAX), ExtOp(ExtOC), ExtSetKind(SetKind) {} void setExtSetId(unsigned Set) { ExtSetId = Set; } void setExtOp(unsigned ExtOC) { ExtOp = ExtOC; } - void setScope(unsigned scope) { ScopeId = scope; } + void setScopeId(unsigned scope) { ScopeId = scope; } SPIRVId getExtSetId() const { return ExtSetId; } SPIRVWord getExtOp() const { return ExtOp; } SPIRVWord getScope() const { return ScopeId; } @@ -1621,7 +1621,7 @@ class SPIRVExtInst : public SPIRVFunctionCallGeneric { // The parent Scope of the member is implicit from DebugTypeComposite lists. for (unsigned idx = FirstMemberIdx; idx < Args.size(); idx++) { auto member = static_cast(Module->getEntry(Args[idx])); - member->setScope(Args[ScopeIdx]); + member->setScopeId(Args[ScopeIdx]); } } } diff --git a/llpc/translator/lib/SPIRV/libSPIRV/spirvExt.h b/llpc/translator/lib/SPIRV/libSPIRV/spirvExt.h index 66c3f4c77f..f8837ddfe1 100644 --- a/llpc/translator/lib/SPIRV/libSPIRV/spirvExt.h +++ b/llpc/translator/lib/SPIRV/libSPIRV/spirvExt.h @@ -45,7 +45,7 @@ #include "khronos/spirv/NonSemanticDebugPrintf.h" #include "khronos/spirv/NonSemanticShaderDebugInfo100.h" namespace spv { -#include "GLSL.ext.AMD.h" +#include "khronos/spirv/GLSL.ext.AMD.h" static const LinkageType LinkageTypeInternal = static_cast(LinkageTypeImport + 1); diff --git a/llpc/unittests/context/testOptLevel.cpp b/llpc/unittests/context/testOptLevel.cpp index 6b83373b66..0c679bf298 100644 --- a/llpc/unittests/context/testOptLevel.cpp +++ b/llpc/unittests/context/testOptLevel.cpp @@ -48,15 +48,9 @@ TEST(LlpcContextTests, MatchPipelineOptLevel) { LgcContext::initialize(); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - for (auto optLevel : {Level::None, Level::Less, Level::Default, Level::Aggressive}) { -#else - // New version of the code (also handles unknown version, which we treat as latest) // Returns the optimization level for the context. for (auto optLevel : {CodeGenOptLevel::None, CodeGenOptLevel::Less, CodeGenOptLevel::Default, CodeGenOptLevel::Aggressive}) { -#endif Context context(GfxIp); @@ -67,14 +61,8 @@ TEST(LlpcContextTests, MatchPipelineOptLevel) { context.attachPipelineContext(&graphicsContext); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - if (optLevel == Level::None) { -#else - // New version of the code (also handles unknown version, which we treat as latest) // Returns the optimization level for the context. if (optLevel == CodeGenOptLevel::None) { -#endif // None might not be possible, so accept >= Level::None EXPECT_GE(context.getLgcContext()->getOptimizationLevel(), optLevel); } else { @@ -82,15 +70,9 @@ TEST(LlpcContextTests, MatchPipelineOptLevel) { } } -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - for (auto optLevel : {Level::None, Level::Less, Level::Default, Level::Aggressive}) { -#else - // New version of the code (also handles unknown version, which we treat as latest) // Returns the optimization level for the context. for (auto optLevel : {CodeGenOptLevel::None, CodeGenOptLevel::Less, CodeGenOptLevel::Default, CodeGenOptLevel::Aggressive}) { -#endif Context context(GfxIp); @@ -101,14 +83,8 @@ TEST(LlpcContextTests, MatchPipelineOptLevel) { context.attachPipelineContext(&computeContext); -#if LLVM_MAIN_REVISION && LLVM_MAIN_REVISION < 474768 - // Old version of the code - if (optLevel == Level::None) { -#else - // New version of the code (also handles unknown version, which we treat as latest) // Returns the optimization level for the context. if (optLevel == CodeGenOptLevel::None) { -#endif // None might not be possible, so accept >= Level::None EXPECT_GE(context.getLgcContext()->getOptimizationLevel(), optLevel); } else { diff --git a/llvmraytracing/CMakeLists.txt b/llvmraytracing/CMakeLists.txt index ecec8ad005..59693457a6 100644 --- a/llvmraytracing/CMakeLists.txt +++ b/llvmraytracing/CMakeLists.txt @@ -18,7 +18,7 @@ add_llvm_library(LLVMRaytracing lib/Continuations.cpp lib/ContinuationsLint.cpp lib/CpsStackLowering.cpp - lib/DXILContIntrinsicPrepare.cpp + lib/DXILContPrepareGpurtLibrary.cpp lib/DXILContLgcRtOpConverter.cpp lib/DXILContPostProcess.cpp lib/DXILSupport.cpp @@ -102,6 +102,12 @@ if(CONTINUATIONS_BUILD_TESTS) set(LLVMRAYTRACING_BUILD_TESTS ON) endif() if(LLVMRAYTRACING_BUILD_TESTS) + if (TARGET llpc_version) + get_target_property(LLVMRAYTRACING_LIT_DEFINITIONS LLVMRaytracing COMPILE_DEFINITIONS) + get_target_property(LIT_DEFINITIONS llpc_version INTERFACE_COMPILE_DEFINITIONS) + list(APPEND LIT_DEFINITIONS ${LLVMRAYTRACING_LIT_DEFINITIONS}) + endif() + add_subdirectory(test) add_subdirectory(unittests) diff --git a/llvmraytracing/include/lgc/LgcCpsDialect.h b/llvmraytracing/include/lgc/LgcCpsDialect.h index aa7f450913..c1f5f0d2f0 100644 --- a/llvmraytracing/include/lgc/LgcCpsDialect.h +++ b/llvmraytracing/include/lgc/LgcCpsDialect.h @@ -76,8 +76,6 @@ void setCpsFunctionLevel(llvm::Function &fn, CpsLevel level); CpsLevel getCpsLevelFromFunction(const llvm::Function &fn); CpsLevel getCpsLevelForShaderStage(lgc::rt::RayTracingShaderStage stage); uint8_t getPotentialCpsReturnLevels(lgc::rt::RayTracingShaderStage stage); -void pushStateToCpsStack(llvm_dialects::Builder &builder, lgc::cps::JumpOp &jumpOp); -llvm::Value *popStateFromCpsStack(llvm_dialects::Builder &builder, const llvm::DataLayout &DL, llvm::Type *stateType); llvm::Value *lowerAsContinuationReference(llvm::IRBuilder<> &Builder, lgc::cps::AsContinuationReferenceOp &AsCROp, llvm::Value *Relocation = nullptr); } // namespace lgc::cps diff --git a/llvmraytracing/include/lgc/LgcCpsDialect.td b/llvmraytracing/include/lgc/LgcCpsDialect.td index c671a0700c..0d63a9c9ca 100644 --- a/llvmraytracing/include/lgc/LgcCpsDialect.td +++ b/llvmraytracing/include/lgc/LgcCpsDialect.td @@ -39,11 +39,11 @@ class LgcCpsOp traits_> def StackPointer : TgConstant<(PointerType 32)>, Type; // A pointer to a CPS function, combined with additional metadata -def ContinuationReference : TgConstant<(or I32, I64)>, Type; +def ContinuationReference : TgConstant<(I32)>, Type; // ===================================================================================================================== def JumpOp : LgcCpsOp<"jump", [NoReturn]> { - let arguments = (ins ContinuationReference:$target, AttrI32:$levels, value:$state, I32:$csp, ContinuationReference:$rcr, varargs:$tail); + let arguments = (ins ContinuationReference:$target, AttrI32:$levels, I32:$csp, ContinuationReference:$rcr, varargs:$tail); let results = (outs); let summary = "Jump to a CPS function."; @@ -51,7 +51,6 @@ def JumpOp : LgcCpsOp<"jump", [NoReturn]> { Jump to a CPS function via: * target, the continuation reference * levels, a bitmask of levels in which target may run - * state, which is pushed to the continuation stack before jumping, * csp, continuation stack pointer, * rcr, a continuation reference the called function can potentially return to * an arbitrary set of arguments appended to the tail of the argument list. @@ -91,8 +90,6 @@ def AsContinuationReferenceOp : LgcCpsOp<"as.continuation.reference", [NoUnwind, let arguments = (ins PointerType:$fn); let results = (outs ContinuationReference:$ref); - let defaultBuilderHasExplicitResultType = true; - let summary = "Obtain a continuation reference from a function pointer."; let description = [{ Obtain a continuation reference from a constant function pointer, $fn. diff --git a/llvmraytracing/include/lgc/LgcIlCpsDialect.td b/llvmraytracing/include/lgc/LgcIlCpsDialect.td index e5ff5fb77b..05664270e6 100644 --- a/llvmraytracing/include/lgc/LgcIlCpsDialect.td +++ b/llvmraytracing/include/lgc/LgcIlCpsDialect.td @@ -54,7 +54,7 @@ def GetReturnValueOp : LgcIlCpsOp<"getReturnValue", [NoUnwind, WillReturn]> { } def ContinueOp : LgcIlCpsOp<"continue", [NoReturn]> { - let arguments = (ins I64:$shaderAddr, I32:$csp, I64:$returnAddr, varargs:$tail); + let arguments = (ins I64:$shaderAddr, I32:$csp, I32:$returnAddr, varargs:$tail); let results = (outs); let summary = @@ -73,7 +73,7 @@ def ContinueOp : LgcIlCpsOp<"continue", [NoReturn]> { } def WaitContinueOp : LgcIlCpsOp<"waitContinue", [NoReturn]> { - let arguments = (ins I64:$shaderAddr, I64:$waitMask, I32:$csp, I64:$returnAddr, varargs:$tail); + let arguments = (ins I64:$shaderAddr, I64:$waitMask, I32:$csp, I32:$returnAddr, varargs:$tail); let results = (outs); let summary = diff --git a/llvmraytracing/include/llvmraytracing/Continuations.h b/llvmraytracing/include/llvmraytracing/Continuations.h index 9563b9d154..65f770046e 100644 --- a/llvmraytracing/include/llvmraytracing/Continuations.h +++ b/llvmraytracing/include/llvmraytracing/Continuations.h @@ -124,7 +124,10 @@ uint64_t getInlineHitAttrsBytes(Module &M); /// Extract a function from a constant metadata node, ignoring any bitcasts. Function *extractFunctionOrNull(Metadata *N); -/// Based on the metadata of a function, check if this is a start function of a shader. +/// Based on the metadata of a function, get the start function of a continuation shader or resume function. +/// For non-resume functions, returns Func, even if Func is not a continuation shader. +Function *getStartFunc(Function *Func); +/// Returns whether getStartFunc(Func) == Func, see getStartFunc above. bool isStartFunc(Function *Func); /// Recurse into the first member of the given SystemData to find an object of @@ -134,13 +137,9 @@ Value *getDXILSystemData(IRBuilder<> &B, Value *SystemData, Type *SystemDataTy, /// Replace call to intrinsic (lgc.rt.*) with a call to the driver /// implementation (_cont_*). -CallInst *replaceIntrinsicCall(IRBuilder<> &B, Type *SystemDataTy, Value *SystemData, - lgc::rt::RayTracingShaderStage Kind, CallInst *Call, Module *GpurtLibrary, - CompilerUtils::CrossModuleInliner &Inliner); - -/// Terminate a shader by inserting a return instruction and taking care of -/// basic block splitting and preventing early returns. -void terminateShader(IRBuilder<> &Builder, CallInst *CompleteCall); +Value *replaceIntrinsicCall(IRBuilder<> &B, Type *SystemDataTy, Value *SystemData, lgc::rt::RayTracingShaderStage Kind, + CallInst *Call, Module *GpurtLibrary, CompilerUtils::CrossModuleInliner &Inliner, + bool KeepBuilderPos = false); /// Transformations that run early on the driver/gpurt module. /// @@ -160,23 +159,10 @@ void copyBytes(IRBuilder<> &B, Value *Dst, Value *Src, uint64_t NumBytes); class CleanupContinuationsPass : public llvm::PassInfoMixin { public: - CleanupContinuationsPass(bool Use64BitContinuationReferences = false) - : Use64BitContinuationReferences{Use64BitContinuationReferences} {} + CleanupContinuationsPass() {} llvm::PreservedAnalyses run(llvm::Module &Module, llvm::ModuleAnalysisManager &AnalysisManager); static llvm::StringRef name() { return "continuation cleanup"; } - -private: - bool Use64BitContinuationReferences; -}; - -// Define a wrapper pass that is used for CleanupContinuationsPass creating -// 64-bit lgc.cps.as.continuation.reference ops. -class DXILCleanupContinuationsPass : public CleanupContinuationsPass { -public: - DXILCleanupContinuationsPass() : CleanupContinuationsPass(true) {} - - static llvm::StringRef name() { return "DXIL cleanup continuations pass wrapper"; } }; // A pass that reports statistics from the continuations module. @@ -204,9 +190,9 @@ class LgcCpsJumpInlinerPass : public llvm::PassInfoMixin static llvm::StringRef name() { return "lgc.cps jump inliner pass"; } }; -class DXILContIntrinsicPreparePass : public llvm::PassInfoMixin { +class DXILContPrepareGpurtLibraryPass : public llvm::PassInfoMixin { public: - DXILContIntrinsicPreparePass(); + DXILContPrepareGpurtLibraryPass(); llvm::PreservedAnalyses run(llvm::Module &Module, llvm::ModuleAnalysisManager &AnalysisManager); static llvm::StringRef name() { return "DXIL continuation intrinsic preparation"; } diff --git a/llvmraytracing/include/llvmraytracing/ContinuationsUtil.h b/llvmraytracing/include/llvmraytracing/ContinuationsUtil.h index e40951662a..3d95f02157 100644 --- a/llvmraytracing/include/llvmraytracing/ContinuationsUtil.h +++ b/llvmraytracing/include/llvmraytracing/ContinuationsUtil.h @@ -85,13 +85,24 @@ const unsigned GlobalMaxHitAttributeBytes = 32; /// this pessimism. const unsigned MinimumContinuationStateBytes = 8; -constexpr uint32_t CpsArgIdxContState = 0; -constexpr uint32_t CpsArgIdxReturnAddr = 1; -constexpr uint32_t CpsArgIdxShaderIndex = 2; -constexpr uint32_t CpsArgIdxSystemData = 3; -constexpr uint32_t CpsArgIdxHitAttributes = 4; -constexpr uint32_t CpsArgIdxPadding = 5; -constexpr uint32_t CpsArgIdxPayload = 6; +struct CpsArgIdx { + static constexpr uint32_t ReturnAddr = 0; + static constexpr uint32_t ShaderIndex = 1; + static constexpr uint32_t SystemData = 2; + static constexpr uint32_t HitAttributes = 3; + static constexpr uint32_t Padding = 4; + static constexpr uint32_t Payload = 5; +}; + +struct CpsArgIdxWithStackPtr { + static constexpr uint32_t ReturnAddr = 0; + static constexpr uint32_t ShaderIndex = 1; + static constexpr uint32_t CspInit = 2; + static constexpr uint32_t SystemData = 3; + static constexpr uint32_t HitAttributes = 4; + static constexpr uint32_t Padding = 5; + static constexpr uint32_t Payload = 6; +}; struct DxRayIntrinsic { unsigned int Id; @@ -375,12 +386,11 @@ class ContHelper { auto AddrSpace = extractZExtI32Constant(MD->getOperand(0)); if (!AddrSpace) return {}; - assert((*AddrSpace == static_cast(ContStackAddrspace::Scratch) || - *AddrSpace == static_cast(ContStackAddrspace::Global) || - *AddrSpace == static_cast(ContStackAddrspace::ScratchLLPC) || - *AddrSpace == static_cast(ContStackAddrspace::GlobalLLPC)) && + ContStackAddrspace ContAddrSpace = static_cast(*AddrSpace); + assert((ContAddrSpace == ContStackAddrspace::Scratch || ContAddrSpace == ContStackAddrspace::Global || + ContAddrSpace == ContStackAddrspace::ScratchLLPC || ContAddrSpace == ContStackAddrspace::GlobalLLPC) && "Unexpected continuation stack address space"); - return static_cast(*AddrSpace); + return ContAddrSpace; }; static void setStackAddrspace(Module &M, ContStackAddrspace StackAddrspace) { diff --git a/llvmraytracing/include/llvmraytracing/CpsStackLowering.h b/llvmraytracing/include/llvmraytracing/CpsStackLowering.h index c30b36955a..16e0ab65e1 100644 --- a/llvmraytracing/include/llvmraytracing/CpsStackLowering.h +++ b/llvmraytracing/include/llvmraytracing/CpsStackLowering.h @@ -34,6 +34,7 @@ #include "lgc/LgcCpsDialect.h" #include "lgc/LgcIlCpsDialect.h" #include "llvm/ADT/SmallVector.h" +#include "llvm/Analysis/SimplifyQuery.h" #include "llvm/IR/IRBuilder.h" namespace llvm { @@ -56,12 +57,12 @@ constexpr unsigned ContinuationStackAlignment = 4; class CpsStackLowering { public: CpsStackLowering(llvm::LLVMContext &Context, unsigned LoweredCpsStackAddrSpace) - : TypeLower(Context), LoweredCpsStackAddrSpace{LoweredCpsStackAddrSpace} { + : TypeLower(Context), LoweredCpsStackAddrSpace{LoweredCpsStackAddrSpace}, Builder(Context) { BasePointer = llvm::ConstantPointerNull::get( llvm::PointerType::get(llvm::Type::getInt8Ty(Context), LoweredCpsStackAddrSpace)); } - llvm::Function *lowerCpsStackOps(llvm::Function *Func, llvm::Function *GetGlobalMemBase, bool RequiresIncomingCsp, - llvm::Value *CspStorage = nullptr); + + llvm::Function *lowerCpsStackOps(llvm::Function *Func, llvm::Function *GetGlobalMemBase, bool RequiresIncomingCsp); // Get continuation stack size (in bytes). unsigned getStackSizeInBytes() { return StackSizeInBytes; } @@ -83,6 +84,7 @@ class CpsStackLowering { void visitCpsPeek(lgc::cps::PeekOp &); void visitSetVsp(lgc::cps::SetVspOp &); void visitGetVsp(lgc::cps::GetVspOp &); + void visitJump(lgc::cps::JumpOp &); void visitGetElementPtr(llvm::GetElementPtrInst &); void visitPtrToIntInst(llvm::PtrToIntInst &); void visitIntToPtrInst(llvm::IntToPtrInst &); @@ -111,4 +113,6 @@ class CpsStackLowering { unsigned LoweredCpsStackAddrSpace; unsigned StackSizeInBytes = 0; llvm::Value *BasePointer = nullptr; + llvm_dialects::Builder Builder; + std::optional SQ; }; diff --git a/llvmraytracing/lib/CleanupContinuations.cpp b/llvmraytracing/lib/CleanupContinuations.cpp index 73c3691001..c58c2184b7 100644 --- a/llvmraytracing/lib/CleanupContinuations.cpp +++ b/llvmraytracing/lib/CleanupContinuations.cpp @@ -59,6 +59,7 @@ #include "compilerutils/CompilerUtils.h" #include "llvmraytracing/Continuations.h" #include "llvmraytracing/ContinuationsUtil.h" +#include "llvmraytracing/CpsStackLowering.h" #include "llvmraytracing/GpurtContext.h" #include "lgc/LgcCpsDialect.h" #include "lgc/LgcIlCpsDialect.h" @@ -67,6 +68,8 @@ #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringRef.h" +#include "llvm/Analysis/AssumptionCache.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/IR/DerivedTypes.h" #include "llvm/IR/Dominators.h" #include "llvm/IR/Module.h" @@ -81,8 +84,7 @@ namespace { class CleanupContinuationsPassImpl { public: - CleanupContinuationsPassImpl(llvm::Module &M, llvm::ModuleAnalysisManager &AM, - bool Use64BitContinuationReferences = false); + CleanupContinuationsPassImpl(llvm::Module &M, llvm::Module &GpurtLibrary, llvm::ModuleAnalysisManager &AM); PreservedAnalyses run(); @@ -110,19 +112,21 @@ class CleanupContinuationsPassImpl { void handleContinue(ContinuationData &Data, Instruction *Ret); void handleSingleContinue(ContinuationData &Data, CallInst *Call, Value *ResumeFun); void lowerIntrinsicCall(Function *F, ContinuationData &Data); + bool handleIntrinsics(llvm::ModuleAnalysisManager &AnalysisManager); + void handleContStackIntrinsic(FunctionAnalysisManager &FAM, Function &F); void lowerGetResumePoint(Module &Mod); bool lowerCompleteOp(Module &Mod); llvm::Module &Mod; llvm::ModuleAnalysisManager &AnalysisManager; - llvm_dialects::Builder *Builder = nullptr; + llvm_dialects::Builder Builder; Function *ContMalloc = nullptr; Function *ContFree = nullptr; MapVector ToProcess; uint32_t MaxContStateBytes; llvm::Module *GpurtLibrary = nullptr; - bool Use64BitContinuationReferences; - llvm::Type *ContinuationReferenceType = nullptr; + std::optional StackLowering; + Function *GetGlobalMemBase = nullptr; }; /// Find the original call that created the continuation token and the matching @@ -200,9 +204,13 @@ findTokenOrigin(BasicBlock *BB, Value *V, SmallVectorImpl &ToRemo } void CleanupContinuationsPassImpl::analyzeContinuation(Function &F, MDNode *MD) { + Function *EntryF = &F; + // Only analyze main continuation - auto *MDTup = cast(MD); - auto *EntryF = mdconst::extract(MDTup->getOperand(0)); + if (MD) { + auto *MDTup = cast(MD); + EntryF = mdconst::extract(MDTup->getOperand(0)); + } auto &Data = ToProcess[EntryF]; @@ -236,21 +244,21 @@ void CleanupContinuationsPassImpl::analyzeContinuation(Function &F, MDNode *MD) void CleanupContinuationsPassImpl::updateCpsStack(Function *F, Function *NewFunc, bool IsStart, ContinuationData &CpsInfo) { - Builder->SetInsertPoint(&*NewFunc->getEntryBlock().getFirstNonPHIOrDbgOrAlloca()); + Builder.SetInsertPointPastAllocas(NewFunc); Value *CpsStack = nullptr; if (IsStart) { - CpsStack = Builder->create(Builder->getInt32(CpsInfo.ContStateBytes)); + CpsStack = Builder.create(Builder.getInt32(CpsInfo.ContStateBytes)); CpsStack->setName("cont.state.stack.segment"); ContHelper::StackSize::setValue(NewFunc, CpsInfo.ContStateBytes); } else { - CpsStack = Builder->create(Builder->getInt32(CpsInfo.ContStateBytes)); + CpsStack = Builder.create(Builder.getInt32(CpsInfo.ContStateBytes)); } SmallVector ToBeRemoved; Value *ContFrame = getContinuationFramePtr(F, IsStart, CpsInfo, &ToBeRemoved); if (CpsInfo.ContStateBytes != 0) { - CompilerUtils::replaceAllPointerUses(Builder, ContFrame, CpsStack, ToBeRemoved); + CompilerUtils::replaceAllPointerUses(&Builder, ContFrame, CpsStack, ToBeRemoved); } else { // If there is no continuation state, replace it with a poison // value instead of a zero-sized stack allocation. @@ -273,9 +281,9 @@ static void updateFunctionArgs(Function *OldFunc, Function *NewFunc, const Small } static void buildArgInfos(Function *F, bool IsStart, SmallVector &AllArgTypes, - SmallVector &AllArgValues, SmallVector &ParamAttrs, - SmallVector &InstsToRemove) { - + SmallVector &AllArgValues, uint32_t &StartReturnArg, + SmallVector &ParamAttrs, SmallVector &InstsToRemove, + SmallVector &ReturnValueOps) { auto &Context = F->getContext(); AttributeList FAttrs = F->getAttributes(); if (IsStart) { @@ -290,28 +298,32 @@ static void buildArgInfos(Function *F, bool IsStart, SmallVector &AllArg ArgNo++; } } else { + // Add i32 %rcr here + Type *I32 = Type::getInt32Ty(Context); + AllArgTypes.push_back(I32); + AllArgValues.push_back(nullptr); if (lgc::cps::isCpsFunction(*F)) { - // Add extra arguments ({} %state, i32 %rcr, i32 %shader-index) for resume - // part. But for now, we always use continuation stack to pass continuation - // state. - Type *I32 = Type::getInt32Ty(Context); - AllArgTypes.push_back(StructType::get(Context, {})); - AllArgValues.push_back(nullptr); + // Add i32 %shader-index for resume part. AllArgTypes.push_back(I32); AllArgValues.push_back(nullptr); - AllArgTypes.push_back(I32); - AllArgValues.push_back(nullptr); - } else { - AllArgTypes.push_back(Type::getInt64Ty(Context)); // Dummy return address for resume functions - AllArgValues.push_back(nullptr); } // Find arguments from lgc.ilcps.getreturnvalue calls for (auto &I : F->getEntryBlock()) { if (auto *Intr = dyn_cast(&I)) { - AllArgTypes.push_back(Intr->getType()); - AllArgValues.push_back(Intr); + StartReturnArg = AllArgValues.size(); + + // The type is always a struct. Unfold it so we are able to use the same CpsArgIdx* indices as for non-resume + // functions. + auto *StructTy = cast(Intr->getType()); + + for (auto [Index, Ty] : llvm::enumerate(StructTy->elements())) { + AllArgTypes.push_back(Ty); + AllArgValues.push_back(nullptr); + } + InstsToRemove.push_back(Intr); + ReturnValueOps.push_back(Intr); } } } @@ -354,7 +366,7 @@ void CleanupContinuationsPassImpl::removeContFreeCall(Function *F, Function *Con void CleanupContinuationsPassImpl::freeCpsStack(Function *F, ContinuationData &CpsInfo) { struct VisitState { ContinuationData &CpsInfo; - llvm_dialects::Builder *Builder; + llvm_dialects::Builder &Builder; Function *F; }; VisitState State = {CpsInfo, Builder, F}; @@ -362,8 +374,8 @@ void CleanupContinuationsPassImpl::freeCpsStack(Function *F, ContinuationData &C llvm_dialects::VisitorBuilder() .addSet([](auto &State, auto &Instruction) { if (Instruction.getFunction() == State.F && State.CpsInfo.ContStateBytes) { - State.Builder->SetInsertPoint(&Instruction); - State.Builder->template create(State.Builder->getInt32(State.CpsInfo.ContStateBytes)); + State.Builder.SetInsertPoint(&Instruction); + State.Builder.template create(State.Builder.getInt32(State.CpsInfo.ContStateBytes)); } }) .build(); @@ -373,15 +385,15 @@ void CleanupContinuationsPassImpl::freeCpsStack(Function *F, ContinuationData &C /// Handle lgc.cps.complete calls. bool CleanupContinuationsPassImpl::lowerCompleteOp(Module &Mod) { struct VisitState { - llvm_dialects::Builder *Builder; + llvm_dialects::Builder &Builder; bool CompleteLowered; }; VisitState State = {Builder, false}; static auto Visitor = llvm_dialects::VisitorBuilder() .add([](VisitState &State, auto &Complete) { - State.Builder->SetInsertPoint(&Complete); - State.Builder->CreateRetVoid(); + State.Builder.SetInsertPoint(&Complete); + State.Builder.CreateRetVoid(); BasicBlock *BB = Complete.getParent(); BB->getTerminator()->eraseFromParent(); Complete.eraseFromParent(); @@ -440,6 +452,12 @@ void CleanupContinuationsPassImpl::processContinuations() { for (auto &FuncData : ToProcess) { LLVM_DEBUG(dbgs() << "Processing function: " << FuncData.first->getName() << "\n"); for (auto *F : FuncData.second.Functions) { + // Not a new function but we want to run stack lowering on KernelEntry + if (!F->hasMetadata(ContHelper::MDContinuationName)) { + FuncData.second.NewFunctions.push_back(F); + continue; + } + if (F != FuncData.first) { // Set same linkage as for start function F->setLinkage(FuncData.first->getLinkage()); @@ -462,8 +480,10 @@ void CleanupContinuationsPassImpl::processContinuations() { SmallVector AllArgValues; SmallVector ParamAttrs; SmallVector InstsToRemove; + SmallVector ReturnValueOps; + uint32_t StartReturnArg = 0; - buildArgInfos(F, IsStart, AllArgTypes, AllArgValues, ParamAttrs, InstsToRemove); + buildArgInfos(F, IsStart, AllArgTypes, AllArgValues, StartReturnArg, ParamAttrs, InstsToRemove, ReturnValueOps); if (ContFree) removeContFreeCall(F, ContFree); @@ -476,6 +496,17 @@ void CleanupContinuationsPassImpl::processContinuations() { Function *NewFunc = CompilerUtils::cloneFunctionHeader(*F, NewFuncTy, ParamAttrs); NewFunc->takeName(F); + // Create helper struct for return values and RAUW on them + for (lgc::ilcps::GetReturnValueOp *RetValOp : ReturnValueOps) { + Value *RetHelperStruct = PoisonValue::get(RetValOp->getType()); + Builder.SetInsertPointPastAllocas(RetValOp->getFunction()); + for (auto [Idx, RetArg] : + llvm::enumerate(llvm::make_range(NewFunc->arg_begin() + StartReturnArg, NewFunc->arg_end()))) + RetHelperStruct = Builder.CreateInsertValue(RetHelperStruct, &RetArg, Idx); + + RetValOp->replaceAllUsesWith(RetHelperStruct); + } + ToErase.push_back(F); FuncData.second.NewFunctions.push_back(NewFunc); @@ -566,7 +597,7 @@ void CleanupContinuationsPassImpl::processContinuations() { /// %cr = call i32 @lgc.cps.as.continuation.reference(ptr @callee) /// %cr2 = call i32 (...) @lgc.cps.as.continuation.reference(ptr /// @test.resume.0) -/// call void (...) @lgc.cps.jump(i32 %cr, i32 2, {} poison, +/// call void (...) @lgc.cps.jump(i32 %cr, i32 2, /// i32 %cr2, ...) /// /// Also handles cases where the token and resume function are behind a phi. @@ -596,7 +627,7 @@ void CleanupContinuationsPassImpl::handleContinue(ContinuationData &Data, Instru } void CleanupContinuationsPassImpl::handleSingleContinue(ContinuationData &Data, CallInst *Call, Value *ResumeFun) { - Builder->SetInsertPoint(Call); + Builder.SetInsertPoint(Call); SmallVector TailArgs; Value *ResumeAddr = nullptr; @@ -608,10 +639,10 @@ void CleanupContinuationsPassImpl::handleSingleContinue(ContinuationData &Data, SkipCount = ContHelper::isWaitAwaitCall(*Call) ? 3 : 2; if (lgc::rt::getLgcRtShaderStage(Call->getFunction()) != lgc::rt::RayTracingShaderStage::KernelEntry) { - ResumeAddr = Builder->create(ContinuationReferenceType, ResumeFun); + ResumeAddr = Builder.create(ResumeFun); } else { // For entry-point compute kernel, pass a poison %rcr. - ResumeAddr = PoisonValue::get(ContinuationReferenceType); + ResumeAddr = PoisonValue::get(Builder.getInt32Ty()); } CR = Call->getArgOperand(0); @@ -622,16 +653,14 @@ void CleanupContinuationsPassImpl::handleSingleContinue(ContinuationData &Data, LevelImm = cast(Level)->getZExtValue(); } - // TODO: Continuation state is passed through stack for now. - auto *State = PoisonValue::get(StructType::get(Builder->getContext(), {})); - auto *Csp = PoisonValue::get(Builder->getInt32Ty()); - auto *JumpCall = Builder->create(CR, LevelImm, State, Csp, ResumeAddr, TailArgs); + auto *Csp = PoisonValue::get(Builder.getInt32Ty()); + auto *JumpCall = Builder.create(CR, LevelImm, Csp, ResumeAddr, TailArgs); // Replace this instruction with a call to cps.jump. JumpCall->copyMetadata(*Call); // Remove instructions at the end of the block - Builder->SetInsertPoint(Call); - auto *Unreachable = Builder->CreateUnreachable(); + Builder.SetInsertPoint(Call); + auto *Unreachable = Builder.CreateUnreachable(); for (auto &I : make_early_inc_range(reverse(*JumpCall->getParent()))) { if (&I == Unreachable) break; @@ -649,35 +678,168 @@ void CleanupContinuationsPassImpl::lowerIntrinsicCall(Function *F, ContinuationD return; CompilerUtils::CrossModuleInliner CrossInliner; - // Signature of cps function: { state, rcr, shader-index, system-data} - const uint32_t SystemDataArgIdx = lgc::cps::isCpsFunction(*F) ? CpsArgIdxSystemData : 1; + // Signature of cps function: { rcr, shader-index, system-data} + const uint32_t SystemDataArgIdx = lgc::cps::isCpsFunction(*F) ? CpsArgIdx::SystemData : 1; Value *SystemDataArg = F->getArg(SystemDataArgIdx); Type *SystemDataTy = SystemDataArg->getType(); - // Extract the original system data from the { systemData, padding, payload } - // struct returned by await. - if (!Data.IsStart) - SystemDataTy = SystemDataTy->getStructElementType(0); - - Builder->SetInsertPointPastAllocas(F); - auto *SystemData = Builder->CreateAlloca(SystemDataTy); + Builder.SetInsertPointPastAllocas(F); + auto *SystemData = Builder.CreateAlloca(SystemDataTy); SystemData->setName("system.data.alloca"); + assert(SystemDataTy->isStructTy() && "SystemData should be struct type"); + + Builder.CreateStore(SystemDataArg, SystemData); - if (!Data.IsStart) - SystemDataArg = Builder->CreateExtractValue(SystemDataArg, 0); + // All intrinsics that we need to inline are rematerializable/constant, the others have been inlined + // by LowerRaytracingPipeline. + // Therefore it is enough to inline every used intrinsic once at the start of the function. This + // reduces the generated code size. - assert(SystemDataArg->getType()->isStructTy() && "SystemData should be struct type"); + // Map intrinsic function to value + SmallDenseMap CachedIntrinsics; - Builder->CreateStore(SystemDataArg, SystemData); while (!Data.CpsIntrinsicCalls.empty()) { // Ensure the list gets freed, since otherwise we will process the same calls twice by accident. auto *Call = Data.CpsIntrinsicCalls.pop_back_val(); - replaceIntrinsicCall(*Builder, SystemDataArg->getType(), SystemData, *Stage, Call, - GpurtLibrary ? GpurtLibrary : &Mod, CrossInliner); + assert(Call->arg_empty() && "Expect only calls without arguments"); + Value *&Cached = CachedIntrinsics[Call->getCalledFunction()]; + if (Cached != nullptr) { + Call->replaceAllUsesWith(Cached); + Call->eraseFromParent(); + } else { + Cached = replaceIntrinsicCall(Builder, SystemDataTy, SystemData, *Stage, Call, GpurtLibrary ? GpurtLibrary : &Mod, + CrossInliner, true); + } } } +bool CleanupContinuationsPassImpl::handleIntrinsics(llvm::ModuleAnalysisManager &AnalysisManager) { + bool Changed = false; + + for (auto &F : Mod.functions()) { + auto Name = F.getName(); + if (Name.starts_with("_AmdValueI32Count")) { + Changed = true; + ContHelper::handleValueI32Count(F, Builder); + } else if (Name.starts_with("_AmdValueGetI32")) { + Changed = true; + ContHelper::handleValueGetI32(F, Builder); + } else if (Name.starts_with("_AmdValueSetI32")) { + Changed = true; + ContHelper::handleValueSetI32(F, Builder); + } else if (F.getName().starts_with("_AmdContStack")) { + Changed = true; + + auto &FAM = AnalysisManager.getResult(Mod).getManager(); + + handleContStackIntrinsic(FAM, F); + } + } + + return Changed; +} + +// Replace calls to _AmdContStack* with calls to lgc.cps dialect ops. +// Do some simple constant propagation on the fly. +void CleanupContinuationsPassImpl::handleContStackIntrinsic(FunctionAnalysisManager &FAM, Function &F) { + // Check if the function is either of void return type or i32 return type and + // has no arguments or a single integer argument dividable by 32 (to allow + // storing and loading multiple dwords via AmdContStackLoad / + // AmdContStackStore). + Type *ReturnTy = F.getReturnType(); + (void)ReturnTy; + assert((ReturnTy->isVoidTy() || (ReturnTy->isIntegerTy() && (ReturnTy->getIntegerBitWidth() % 32 == 0))) && + "CleanupContinuationsPassImpl::handleContStackIntrinsic: Invalid " + "return type!"); + + Type *FuncTy = F.getFunctionType(); + (void)(FuncTy); + assert((FuncTy->getFunctionNumParams() == 0 || FuncTy->getFunctionParamType(0)->isIntegerTy()) && + "CleanupContinuationsPassImpl::handleContStackIntrinsic: Invalid " + "argument signature!"); + + StringRef FuncName = F.getName(); + FuncName.consume_front("_AmdContStack"); + + auto ConstantFoldInstruction = [&](Function *Parent, Value *SizeArg) -> Value * { + if (!isa(SizeArg)) + return SizeArg; + + if (auto *I = dyn_cast(SizeArg)) { + // Do some basic constant-propagation + // This is needed because this pass just replaced the ValueI32Count + // and ContPayloadRegistersI32Count intrinsics and the allocated size + // usually depends on these values. + auto &DT = FAM.getResult(*Parent); + auto &TLI = FAM.getResult(*Parent); + auto &AC = FAM.getResult(*Parent); + const SimplifyQuery SQ(Parent->getParent()->getDataLayout(), &TLI, &DT, &AC); + + if (auto *NewSize = simplifyInstruction(I, SQ)) + return NewSize; + } + + return SizeArg; + }; + + llvm::forEachCall(F, [&](CallInst &CInst) { + Value *Replacement = nullptr; + Builder.SetInsertPoint(&CInst); + + Type *DestTy = CInst.getType(); + + bool IsMemoryAccess = false; + if (FuncName.starts_with("Alloc")) { + Value *SizeArg = ConstantFoldInstruction(CInst.getFunction(), CInst.getArgOperand(0)); + Replacement = Builder.create(SizeArg); + + if (auto *Size = dyn_cast(SizeArg)) + ContHelper::StackSize::inc(CInst.getFunction(), Size->getSExtValue()); + } else if (FuncName.starts_with("Free")) { + Value *SizeArg = ConstantFoldInstruction(CInst.getFunction(), CInst.getArgOperand(0)); + Replacement = Builder.create(SizeArg); + } else if (FuncName.starts_with("SetPtr")) { + Value *Vsp = CInst.getArgOperand(0); + Replacement = Builder.create( + Builder.CreateIntToPtr(Vsp, PointerType::get(Builder.getInt8Ty(), lgc::cps::stackAddrSpace))); + } else if (FuncName.starts_with("GetPtr")) { + Replacement = Builder.create(); + } else if (FuncName.starts_with("Load")) { + Value *Addr = ConstantFoldInstruction(CInst.getFunction(), CInst.getArgOperand(0)); + Value *Ptr = Builder.CreateIntToPtr(Addr, CInst.getType()->getPointerTo(lgc::cps::stackAddrSpace)); + Replacement = Builder.CreateAlignedLoad(DestTy, Ptr, Align(CpsStackLowering::getContinuationStackAlignment())); + + if (FuncName.starts_with("LoadLastUse")) + CompilerUtils::setIsLastUseLoad(*cast(Replacement)); + + IsMemoryAccess = true; + } else if (FuncName.starts_with("Store")) { + assert(FuncTy->getFunctionNumParams() == 2 && "CleanupContinuationsPassImpl::handleContStackIntrinsic: Invalid " + "argument signature for AmdContStackStore!"); + + Value *Addr = ConstantFoldInstruction(CInst.getFunction(), CInst.getArgOperand(0)); + Value *Val = CInst.getArgOperand(1); + Value *Ptr = Builder.CreateIntToPtr(Addr, Val->getType()->getPointerTo(lgc::cps::stackAddrSpace)); + Builder.CreateAlignedStore(Val, Ptr, Align(CpsStackLowering::getContinuationStackAlignment())); + + IsMemoryAccess = true; + } else { + llvm_unreachable("CleanupContinuationsPassImpl::handleContStackIntrinsic: " + "Unknown intrinsic!"); + } + + if (Replacement) { + if (!DestTy->isVoidTy() && !IsMemoryAccess) + Replacement = Builder.CreatePtrToInt(Replacement, DestTy); + + CInst.replaceAllUsesWith(Replacement); + } + + CInst.eraseFromParent(); + }); +} + void CleanupContinuationsPassImpl::lowerGetResumePoint(Module &Mod) { for (auto &F : make_early_inc_range(Mod)) { auto FuncName = F.getName(); @@ -694,9 +856,8 @@ void CleanupContinuationsPassImpl::lowerGetResumePoint(Module &Mod) { assert(ResumeFn && isa(ResumeFn)); // We can always move this as.continuation.reference call. cast(ResumeFn)->moveBefore(GetResumeCall); - Builder->SetInsertPoint(GetResumeCall); - auto *ResumePtr = Builder->CreateZExt(ResumeFn, Builder->getInt64Ty()); - GetResumeCall->replaceAllUsesWith(ResumePtr); + Builder.SetInsertPoint(GetResumeCall); + GetResumeCall->replaceAllUsesWith(ResumeFn); GetResumeCall->eraseFromParent(); // Re-create the lgc.cps.jump call without the return address @@ -704,12 +865,12 @@ void CleanupContinuationsPassImpl::lowerGetResumePoint(Module &Mod) { if (!lgc::cps::isCpsFunction(*Jump->getFunction())) { SmallVector Args; for (unsigned I = 0; I < Jump->arg_size(); I++) { - if (I != 4) // Return address argument + if (I != 3) // Return address argument Args.push_back(Jump->getArgOperand(I)); } - Builder->SetInsertPoint(Jump); - auto *NewCall = Builder->CreateCall(Jump->getCalledFunction(), Args); + Builder.SetInsertPoint(Jump); + auto *NewCall = Builder.CreateCall(Jump->getCalledFunction(), Args); NewCall->copyMetadata(*Jump); Jump->eraseFromParent(); @@ -718,41 +879,31 @@ void CleanupContinuationsPassImpl::lowerGetResumePoint(Module &Mod) { } } -CleanupContinuationsPassImpl::CleanupContinuationsPassImpl(llvm::Module &M, llvm::ModuleAnalysisManager &AM, - bool Use64BitContinuationReferences) - : Mod(M), AnalysisManager(AM), Use64BitContinuationReferences{Use64BitContinuationReferences} { +CleanupContinuationsPassImpl::CleanupContinuationsPassImpl(llvm::Module &M, llvm::Module &GpurtLibrary, + llvm::ModuleAnalysisManager &AM) + : Mod(M), AnalysisManager(AM), Builder{Mod.getContext()}, ContMalloc{Mod.getFunction("continuation.malloc")}, + ContFree{Mod.getFunction("continuation.free")}, GpurtLibrary{&GpurtLibrary} { } llvm::PreservedAnalyses CleanupContinuationsPassImpl::run() { - LLVM_DEBUG(dbgs() << "Run the lgc-cleanup-continuations pass\n"); - AnalysisManager.getResult(Mod); auto &FAM = AnalysisManager.getResult(Mod).getManager(); - ToProcess.clear(); - MaxContStateBytes = 0; - ContMalloc = Mod.getFunction("continuation.malloc"); - ContFree = Mod.getFunction("continuation.free"); - GpurtLibrary = GpurtContext::get(Mod.getContext()).theModule; - - llvm_dialects::Builder B(Mod.getContext()); - Builder = &B; - - if (Use64BitContinuationReferences) - ContinuationReferenceType = Builder->getInt64Ty(); - else - ContinuationReferenceType = Builder->getInt32Ty(); - // Map the entry function of a continuation to the analysis result for (auto &F : Mod.functions()) { if (F.empty()) continue; - if (auto *MD = F.getMetadata(ContHelper::MDContinuationName)) + if (auto *MD = F.getMetadata(ContHelper::MDContinuationName)) { analyzeContinuation(F, MD); + } else if (lgc::rt::getLgcRtShaderStage(&F) == lgc::rt::RayTracingShaderStage::KernelEntry) { + analyzeContinuation(F, nullptr); + } } // Check if the continuation state is used in any function part for (auto &FuncData : ToProcess) { - if (!FuncData.second.MallocCall) { + // Kernel entry functions do not have FuncData.MD and we do not need to + // handle them here. + if (!FuncData.second.MallocCall && FuncData.second.MD) { for (auto *F : FuncData.second.Functions) { // If this is the continuation start part. bool IsStart = (F == FuncData.first); @@ -783,24 +934,47 @@ llvm::PreservedAnalyses CleanupContinuationsPassImpl::run() { // Try to do store->load forwarding here. for (auto &FuncData : ToProcess) { - for (auto *F : FuncData.second.Functions) { - auto &DT = FAM.getResult(*F); - // If this is the continuation start part. - bool IsStart = (F == FuncData.first); - Value *ContFrame = getContinuationFramePtr(F, IsStart, FuncData.second); - // Traversal the users to forward store to load instruction. - forwardContinuationFrameStoreToLoad(DT, ContFrame); + // Kernel entry functions do not have FuncData.MD and we do not need to + // handle them here. + if (FuncData.second.MD) { + for (auto *F : FuncData.second.Functions) { + auto &DT = FAM.getResult(*F); + // If this is the continuation start part. + bool IsStart = (F == FuncData.first); + Value *ContFrame = getContinuationFramePtr(F, IsStart, FuncData.second); + // Traversal the users to forward store to load instruction. + forwardContinuationFrameStoreToLoad(DT, ContFrame); + } } } bool Changed = false; if (!ToProcess.empty()) { + auto StackAddrspaceMD = ContHelper::tryGetStackAddrspace(Mod); + assert(StackAddrspaceMD.has_value() && "Missing continuation.stackAddrspace metadata"); + auto StackAddrspace = StackAddrspaceMD.value(); + + if (StackAddrspace == ContStackAddrspace::Global) + GetGlobalMemBase = getContinuationStackGlobalMemBase(*GpurtLibrary); + + StackLowering.emplace(Mod.getContext(), static_cast(StackAddrspace)); + processContinuations(); lowerGetResumePoint(Mod); Changed = true; } + Changed |= handleIntrinsics(AnalysisManager); + + // Run stack lowering + for (auto &FuncData : ToProcess) { + for (Function *F : FuncData.second.NewFunctions) { + bool RequiresIncomingCsp = lgc::rt::getLgcRtShaderStage(F) != lgc::rt::RayTracingShaderStage::KernelEntry; + StackLowering->lowerCpsStackOps(F, GetGlobalMemBase, RequiresIncomingCsp); + } + } + Changed |= lowerCompleteOp(Mod); return Changed ? PreservedAnalyses::none() : PreservedAnalyses::all(); @@ -811,6 +985,9 @@ llvm::PreservedAnalyses CleanupContinuationsPassImpl::run() { llvm::PreservedAnalyses CleanupContinuationsPass::run(llvm::Module &Mod, llvm::ModuleAnalysisManager &AnalysisManager) { LLVM_DEBUG(dbgs() << "Run the cleanup-continuations pass\n"); AnalysisManager.getResult(Mod); - CleanupContinuationsPassImpl Impl(Mod, AnalysisManager, Use64BitContinuationReferences); + + auto &GpurtContext = GpurtContext::get(Mod.getContext()); + Module &GpurtLibrary = GpurtContext.theModule ? *GpurtContext.theModule : Mod; + CleanupContinuationsPassImpl Impl(Mod, GpurtLibrary, AnalysisManager); return Impl.run(); } diff --git a/llvmraytracing/lib/Continuations.cpp b/llvmraytracing/lib/Continuations.cpp index 5e064228a7..2116d4fcea 100644 --- a/llvmraytracing/lib/Continuations.cpp +++ b/llvmraytracing/lib/Continuations.cpp @@ -334,7 +334,6 @@ void llvm::forwardContinuationFrameStoreToLoad(DominatorTree &DT, Value *FramePt const DataLayout &DL = Load->getModule()->getDataLayout(); unsigned LoadBytes = DL.getTypeStoreSize(Load->getType()); auto IntersectionsRight = StoreIntervals.getContaining(Offset + LoadBytes - 1); - assert(!IntersectionsRight.empty()); // Make sure the store we found fully covers the loaded range and is the // only one. if (IntersectionsRight.size() != 1 || IntersectionsRight.front()->value() != StoreInfo.value()) @@ -517,7 +516,7 @@ void ContHelper::addContinuationPasses(ModulePassManager &MPM) { MPM.addPass(createModuleToFunctionPassAdaptor(CoroElidePass())); MPM.addPass(CoroCleanupPass()); - MPM.addPass(DXILCleanupContinuationsPass()); + MPM.addPass(CleanupContinuationsPass()); MPM.addPass(ContinuationsStatsReportPass()); MPM.addPass(DXILContPostProcessPass()); @@ -572,7 +571,7 @@ void ContHelper::addDxilContinuationPasses(ModulePassManager &MPM, Module *Gpurt void ContHelper::addDxilGpurtLibraryPasses(ModulePassManager &MPM) { MPM.addPass(CompilerUtils::DxilToLlvmPass()); - MPM.addPass(llvm::DXILContIntrinsicPreparePass()); + MPM.addPass(llvm::DXILContPrepareGpurtLibraryPass()); MPM.addPass(AlwaysInlinerPass(/*InsertLifetimeIntrinsics=*/false)); // Run some light optimizations to remove code guarded by intrinsics that were @@ -709,12 +708,17 @@ Function *llvm::extractFunctionOrNull(Metadata *N) { return dyn_cast_or_null(C); } -bool llvm::isStartFunc(Function *Func) { +Function *llvm::getStartFunc(Function *Func) { if (auto *MD = dyn_cast_or_null(Func->getMetadata(ContHelper::MDContinuationName))) { - auto *EntryF = extractFunctionOrNull(MD->getOperand(0)); - return Func == EntryF; + Function *StartFunc = extractFunctionOrNull(MD->getOperand(0)); + if (StartFunc != nullptr) + return StartFunc; } - return false; + return Func; +} + +bool llvm::isStartFunc(Function *Func) { + return Func == getStartFunc(Func); } /// Recurse into the first member of the given SystemData to find an object of @@ -743,10 +747,11 @@ Value *llvm::getDXILSystemData(IRBuilder<> &B, Value *SystemData, Type *SystemDa return B.CreateInBoundsGEP(OrigSystemDataTy, SystemData, Indices); } -CallInst *llvm::replaceIntrinsicCall(IRBuilder<> &B, Type *SystemDataTy, Value *SystemData, - lgc::rt::RayTracingShaderStage Kind, CallInst *Call, Module *GpurtLibrary, - CompilerUtils::CrossModuleInliner &Inliner) { - B.SetInsertPoint(Call); +Value *llvm::replaceIntrinsicCall(IRBuilder<> &B, Type *SystemDataTy, Value *SystemData, + lgc::rt::RayTracingShaderStage Kind, CallInst *Call, Module *GpurtLibrary, + CompilerUtils::CrossModuleInliner &Inliner, bool KeepBuilderPos) { + if (!KeepBuilderPos) + B.SetInsertPoint(Call); auto IntrImplEntry = findIntrImplEntryByIntrinsicCall(Call); if (IntrImplEntry == std::nullopt) @@ -840,12 +845,23 @@ CallInst *llvm::replaceIntrinsicCall(IRBuilder<> &B, Type *SystemDataTy, Value * } LLVM_DEBUG(dbgs() << "Replacing " << *Call << " by " << *NewCall << "\n"); - if (!Call->getType()->isVoidTy()) + // Add a fake-use so we can get the replaced value afterwards + FreezeInst *FakeUse = nullptr; + if (!Call->getType()->isVoidTy()) { Call->replaceAllUsesWith(Replacement); + FakeUse = cast(B.CreateFreeze(Replacement)); + } Inliner.inlineCall(*NewCall); B.SetInsertPoint(&*B.GetInsertPoint()); Call->eraseFromParent(); - return NewCall; + // Inlined, so original replacement is now invalid + Replacement = nullptr; + + if (FakeUse) { + Replacement = FakeUse->getOperand(0); + FakeUse->eraseFromParent(); + } + return Replacement; } /// Transform enqueue intrinsics to continuation intrinsics @@ -874,10 +890,8 @@ static bool replaceEnqueueIntrinsic(Function &F) { // For DX, these arguments are unused right now and are just here to fulfill the `JumpOp`s requirements as being // defined in the LgcCpsDialect. const uint32_t DummyLevelsArg = -1; - Value *DummyContState = PoisonValue::get(StructType::get(B.getContext())); Value *DummyCsp = PoisonValue::get(B.getInt32Ty()); - NewCall = - B.create(CInst.getArgOperand(0), DummyLevelsArg, DummyContState, DummyCsp, RetAddr, TailArgs); + NewCall = B.create(CInst.getArgOperand(0), DummyLevelsArg, DummyCsp, RetAddr, TailArgs); if (WaitMask) { // The only supported wait mask is a constant -1. We don't enforce having a constant here because the SPIR-V @@ -901,6 +915,41 @@ static bool replaceEnqueueIntrinsic(Function &F) { return Changed; } +/// Remove wait mask from WaitAwait intrinsic calls and set waitmask metadata +static bool replaceAwaitIntrinsic(Function &F) { + StringRef FuncName = F.getName(); + + if (FuncName.contains("AmdAwait")) + return false; + + if (!FuncName.contains("AmdWaitAwait")) + report_fatal_error("replaceAwaitIntrinsic: Unexpected await call!"); + + IRBuilder<> B{F.getContext()}; + SmallVector ErasableAwaits; + + llvm::forEachCall(F, [&](CallInst &CInst) { + [[maybe_unused]] ConstantInt *WaitMask = cast(CInst.getArgOperand(1)); + assert(WaitMask->getSExtValue() == -1); + + SmallVector NewArgs{CInst.args()}; + NewArgs.erase(NewArgs.begin() + 1); + + B.SetInsertPoint(&CInst); + auto *NewCall = CompilerUtils::createNamedCall(B, "_AmdAwait", CInst.getType(), NewArgs, {}); + CInst.replaceAllUsesWith(NewCall); + ContHelper::setWaitMask(*NewCall); + + ErasableAwaits.push_back(&CInst); + }); + + // Cleanup old await calls + for (auto *OldAwait : ErasableAwaits) + OldAwait->eraseFromParent(); + + return !ErasableAwaits.empty(); +} + static void handleContinuationStackIsGlobal(Function &Func, ContStackAddrspace StackAddrspace) { assert(Func.arg_empty() // bool @@ -990,9 +1039,8 @@ void ContHelper::handleGetSetting(Function &F, ArrayRef Settings) { void ContHelper::handleGetFuncAddr(Function &F, llvm_dialects::Builder &Builder) { assert(F.arg_empty() - // returns i64 or i32 - && (F.getFunctionType()->getReturnType()->isIntegerTy(64) || - F.getFunctionType()->getReturnType()->isIntegerTy(32))); + // returns i32 + && F.getFunctionType()->getReturnType()->isIntegerTy(32)); auto Name = F.getName(); [[maybe_unused]] bool Consumed = Name.consume_front("_AmdGetFuncAddr"); @@ -1003,9 +1051,8 @@ void ContHelper::handleGetFuncAddr(Function &F, llvm_dialects::Builder &Builder) report_fatal_error(Twine("Did not find function '") + Name + "' requested by _AmdGetFuncAddr"); llvm::forEachCall(F, [&](llvm::CallInst &CInst) { - auto *RetTy = F.getReturnType(); Builder.SetInsertPoint(&CInst); - Value *AsContRef = Builder.create(RetTy, Impl); + Value *AsContRef = Builder.create(Impl); CInst.replaceAllUsesWith(AsContRef); CInst.eraseFromParent(); }); @@ -1064,37 +1111,6 @@ void ContHelper::handleValueSetI32(Function &F, IRBuilder<> &Builder) { }); } -void llvm::terminateShader(IRBuilder<> &Builder, CallInst *CompleteCall) { - Builder.SetInsertPoint(CompleteCall); - - [[maybe_unused]] Instruction *OldTerminator = CompleteCall->getParent()->getTerminator(); - Type *FuncRetTy = CompleteCall->getFunction()->getReturnType(); - // For functions returning a value, return a poison. Resume functions - // and other shaders will simply return a void value when this helper is being - // called from CleanupContinuations. These will be treated as - // continuation.complete by the translator. - ReturnInst *Ret = nullptr; - if (FuncRetTy->isVoidTy()) - Ret = Builder.CreateRetVoid(); - else - Ret = Builder.CreateRet(PoisonValue::get(FuncRetTy)); - - assert(OldTerminator != CompleteCall && "terminateShader: Invalid terminator instruction provided!"); - - // If there is some code after the call to _AmdComplete or the intended - // lgc.cps.return that aborts the shader, do the following: - // - Split everything after the completion call into a separate block - // - Remove the newly inserted unconditional branch to the split block - // - Remove the complete call. - // This is intended to work for _AmdComplete appearing in conditional code - // or the unreachable inserted by various passes before - // CleanupContinuations. - SplitBlock(CompleteCall->getParent(), CompleteCall); - // Remove the branch to the split block. - Ret->getParent()->getTerminator()->eraseFromParent(); - CompleteCall->eraseFromParent(); -} - bool llvm::earlyGpurtTransform(Module &M) { // Import StackAddrspace from metadata if set, otherwise from default auto StackAddrspaceMD = ContHelper::tryGetStackAddrspace(M); @@ -1112,6 +1128,8 @@ bool llvm::earlyGpurtTransform(Module &M) { if (Name.contains("Enqueue")) { Changed = replaceEnqueueIntrinsic(F); + } else if (Name.contains("Await")) { + Changed = replaceAwaitIntrinsic(F); } if (Name.starts_with("_AmdContinuationStackIsGlobal")) { diff --git a/llvmraytracing/lib/ContinuationsLint.cpp b/llvmraytracing/lib/ContinuationsLint.cpp index 68bdbc1ad1..cce8230015 100644 --- a/llvmraytracing/lib/ContinuationsLint.cpp +++ b/llvmraytracing/lib/ContinuationsLint.cpp @@ -32,6 +32,7 @@ #include "llvmraytracing/Continuations.h" #include "lgc/LgcCpsDialect.h" #include "llvm-dialects/Dialect/Visitor.h" +#include "llvm/ADT/SmallSet.h" #include "llvm/IR/Analysis.h" #include "llvm/IR/PassManager.h" @@ -62,8 +63,10 @@ class ContinuationsLintPassImpl final { Module &Mod; using JumpVecTy = SmallVector; + using AwaitFuncSetTy = SmallSet; JumpVecTy AllJumps; - void collectJumps(); + AwaitFuncSetTy FuncsWithAwaits; + void collectCallInfo(); void checkJumpTargets(); void checkSetLocalRootIndex(); @@ -101,7 +104,7 @@ ContinuationsLintPassImpl::ContinuationsLintPassImpl(Module &M) : Mod{M}, Messag void ContinuationsLintPassImpl::run() { LLVM_DEBUG(dbgs() << "Run the pass continuations-lint\n"); - collectJumps(); + collectCallInfo(); checkJumpTargets(); checkSetLocalRootIndex(); @@ -113,13 +116,22 @@ void ContinuationsLintPassImpl::run() { false); } -void ContinuationsLintPassImpl::collectJumps() { +void ContinuationsLintPassImpl::collectCallInfo() { + struct VisitorState { + JumpVecTy &Jumps; + AwaitFuncSetTy &FuncsWithAwaits; + }; + static const auto Visitor = - llvm_dialects::VisitorBuilder() - .add([](JumpVecTy &Jumps, lgc::cps::JumpOp &Op) { Jumps.push_back(&Op); }) + llvm_dialects::VisitorBuilder() + .add([](VisitorState &S, lgc::cps::JumpOp &Op) { S.Jumps.push_back(&Op); }) + .add( + [](VisitorState &S, lgc::cps::AwaitOp &Op) { S.FuncsWithAwaits.insert(Op.getFunction()); }) .build(); - Visitor.visit(AllJumps, Mod); + VisitorState S{AllJumps, FuncsWithAwaits}; + + Visitor.visit(S, Mod); } // Check that every possible jump candidate has a valid jump target @@ -141,6 +153,11 @@ void ContinuationsLintPassImpl::checkSetLocalRootIndex() { llvm::forEachCall(*SetF, [&](CallInst &CInst) { // Returns true if it is a new value Function *Func = CInst.getFunction(); + // It is allowed to have multiple setLocalRootIndex calls if the call resides in a function that was not yet + // split. + if (FuncsWithAwaits.contains(Func)) + return; + auto Inserted = HasSetF.insert(Func); Check(Inserted.second, "Found a function with more than one call to setLocalRootIndex", Func); }); diff --git a/llvmraytracing/lib/ContinuationsStatsReport.cpp b/llvmraytracing/lib/ContinuationsStatsReport.cpp index 4c4844c0ce..5c02a19c67 100644 --- a/llvmraytracing/lib/ContinuationsStatsReport.cpp +++ b/llvmraytracing/lib/ContinuationsStatsReport.cpp @@ -126,21 +126,7 @@ void ContinuationsStatsReportPassImpl::collectProcessableFunctions() { if (!Stage || Stage == RayTracingShaderStage::KernelEntry) continue; - if (!llvm::isStartFunc(&F)) { - FunctionData Data; - Data.Stage = Stage; - - // Extract the actual system data type from the { systemData, padding, - // payload } struct returned by await. - Data.SystemDataTy = F.getArg(F.arg_size() - 1)->getType()->getStructElementType(0); - - [[maybe_unused]] bool DidInsert = ToProcess.insert({&F, std::move(Data)}).second; - assert(DidInsert); - - continue; - } - - const uint32_t SystemDataArgumentIndex = lgc::cps::isCpsFunction(F) ? CpsArgIdxSystemData : 1; + const uint32_t SystemDataArgumentIndex = lgc::cps::isCpsFunction(F) ? CpsArgIdx::SystemData : 2; switch (Stage.value()) { case RayTracingShaderStage::RayGeneration: case RayTracingShaderStage::Intersection: diff --git a/llvmraytracing/lib/CpsStackLowering.cpp b/llvmraytracing/lib/CpsStackLowering.cpp index 02ba0569e5..d189770d7b 100644 --- a/llvmraytracing/lib/CpsStackLowering.cpp +++ b/llvmraytracing/lib/CpsStackLowering.cpp @@ -31,6 +31,7 @@ #include "lgc/LgcIlCpsDialect.h" #include "lgc/LgcRtDialect.h" #include "llvm-dialects/Dialect/Visitor.h" +#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/IR/IRBuilder.h" #include "llvm/IR/Instructions.h" #include "llvm/IR/Type.h" @@ -59,24 +60,18 @@ SmallVector CpsStackLowering::convertStackPtrToI32(TypeLowering &TypeLow // can be converted with ptrtoint. // @param RequiresIncomingCsp: Whether the CSP argument should be appended to // Func's signature. -// @param CpsStorage : the alloca used for the holding the latest continuation -// stack pointer. TODO Remove this argument. This function -// should be responsible for adding the alloca. // @return: The new function, if Function was mutated, or the Function argument. -Function *CpsStackLowering::lowerCpsStackOps(Function *Func, Function *GetGlobalMemBase, bool RequiresIncomingCsp, - llvm::Value *CspStorage) { +Function *CpsStackLowering::lowerCpsStackOps(Function *Func, Function *GetGlobalMemBase, bool RequiresIncomingCsp) { Mod = Func->getParent(); StackSizeInBytes = 0; - if (CspStorage) - CpsStackAlloca = cast(CspStorage); - else - Func = addOrInitCsp(Func, GetGlobalMemBase, RequiresIncomingCsp); + Func = addOrInitCsp(Func, GetGlobalMemBase, RequiresIncomingCsp); TypeLower.addRule( std::bind(&CpsStackLowering::convertStackPtrToI32, this, std::placeholders::_1, std::placeholders::_2)); if (lgc::cps::isCpsFunction(*Func)) Func = TypeLower.lowerFunctionArguments(*Func); + SQ.emplace(Func->getDataLayout()); static const auto Visitor = llvm_dialects::VisitorBuilder() .nest(&TypeLowering::registerVisitors) @@ -85,6 +80,7 @@ Function *CpsStackLowering::lowerCpsStackOps(Function *Func, Function *GetGlobal .add(&CpsStackLowering::visitCpsPeek) .add(&CpsStackLowering::visitSetVsp) .add(&CpsStackLowering::visitGetVsp) + .add(&CpsStackLowering::visitJump) .add(&CpsStackLowering::visitGetElementPtr) .add(&CpsStackLowering::visitPtrToIntInst) .add(&CpsStackLowering::visitIntToPtrInst) @@ -182,6 +178,28 @@ void CpsStackLowering::visitStore(llvm::StoreInst &Store) { Store.replaceUsesOfWith(Store.getPointerOperand(), Values[0]); } +// ===================================================================================================================== +// Lower lgc.cps.jump instruction +// +// @param JumpOp: the instruction +void CpsStackLowering::visitJump(lgc::cps::JumpOp &JumpOp) { + Builder.SetInsertPoint(&JumpOp); + Value *CSP = loadCsp(Builder); + + // Update previously lowered arguments + SmallVector TailArgs{JumpOp.getTail()}; + for (auto &Arg : TailArgs) { + SmallVector Mappings = TypeLower.getValueOptional(Arg); + if (!Mappings.empty()) { + assert(Mappings.size() == 1); + Arg = Mappings[0]; + } + } + + auto *NewJumpOp = JumpOp.replaceTail(TailArgs); + NewJumpOp->setCsp(CSP); +} + // ===================================================================================================================== // Add stack pointer to a lgc.ilcps.continue call // @@ -247,20 +265,29 @@ void CpsStackLowering::visitBitCastInst(llvm::BitCastInst &BC) { // @param AllocOp: the instruction void CpsStackLowering::visitCpsAlloc(lgc::cps::AllocOp &AllocOp) { IRBuilder<> Builder(&AllocOp); + Value *Size = AllocOp.getSize(); - Value *VSP = loadCsp(Builder); + if (Instruction *Inst = dyn_cast(Size)) + if (auto *NewSize = llvm::simplifyInstruction(Inst, *SQ)) + Size = NewSize; - Value *Size = AllocOp.getSize(); - int AlignedSize = cast(Size)->getSExtValue(); + Value *CSP = loadCsp(Builder); + + // align Size to ContinuationStackAlignment + ConstantInt *Const = cast(Size); + int AlignedSize = Const->getSExtValue(); assert(AlignedSize >= 0); - AlignedSize = alignTo(AlignedSize, ContinuationStackAlignment); - StackSizeInBytes += AlignedSize; + if (AlignedSize > 0) { + AlignedSize = alignTo(AlignedSize, ContinuationStackAlignment); + StackSizeInBytes += AlignedSize; + Size = Builder.getInt32(AlignedSize); + } + + Value *NewCSP = Builder.CreateAdd(CSP, Size); - // update stack pointer - Value *NewVSP = Builder.CreateAdd(VSP, Builder.getInt32(AlignedSize)); - Builder.CreateStore(NewVSP, CpsStackAlloca); + Builder.CreateStore(NewCSP, CpsStackAlloca); - TypeLower.replaceInstruction(&AllocOp, {VSP}); + TypeLower.replaceInstruction(&AllocOp, {CSP}); } // ===================================================================================================================== @@ -269,17 +296,26 @@ void CpsStackLowering::visitCpsAlloc(lgc::cps::AllocOp &AllocOp) { // @param FreeOp: the instruction void CpsStackLowering::visitCpsFree(lgc::cps::FreeOp &FreeOp) { IRBuilder<> Builder(&FreeOp); + Value *Size = FreeOp.getSize(); - Value *VSP = loadCsp(Builder); + if (Instruction *Inst = dyn_cast(Size)) + if (auto *NewSize = llvm::simplifyInstruction(Inst, *SQ)) + Size = NewSize; - Value *Size = FreeOp.getSize(); - int AlignedSize = cast(Size)->getSExtValue(); + Value *CSP = loadCsp(Builder); + + // align Size to ContinuationStackAlignment and subtract from CSP + ConstantInt *Const = cast(Size); + int AlignedSize = Const->getSExtValue(); assert(AlignedSize >= 0); - AlignedSize = alignTo(AlignedSize, ContinuationStackAlignment); - Value *Ptr = Builder.CreateAdd(VSP, Builder.getInt32(-AlignedSize)); + if (AlignedSize > 0) { + AlignedSize = alignTo(AlignedSize, ContinuationStackAlignment); + Size = Builder.getInt32(-AlignedSize); + CSP = Builder.CreateAdd(CSP, Size); + } // Assuming continuation stack grows upward. - Builder.CreateStore(Ptr, CpsStackAlloca); + Builder.CreateStore(CSP, CpsStackAlloca); TypeLower.replaceInstruction(&FreeOp, {}); } @@ -377,19 +413,18 @@ Function *CpsStackLowering::addOrInitCsp(Function *F, Function *GetGlobalMemBase auto *FTy = F->getFunctionType(); SmallVector NewArgTys{FTy->params()}; - const size_t CspArgIndex = lgc::cps::isCpsFunction(*F) ? 1 : 0; - NewArgTys.insert(NewArgTys.begin() + CspArgIndex, Builder.getInt32Ty()); + NewArgTys.insert(NewArgTys.begin(), Builder.getInt32Ty()); Function *NewFunc = CompilerUtils::mutateFunctionArguments(*F, F->getReturnType(), NewArgTys, F->getAttributes()); - Argument *CspArg = NewFunc->getArg(CspArgIndex); + Argument *CspArg = NewFunc->getArg(0); CspArg->setName("cspInit"); Initializer = CspArg; for (unsigned Idx = 0; Idx < F->arg_size(); ++Idx) { // Skip the CSP argument during remapping. Value *OldArg = F->getArg(Idx); - Value *NewArg = NewFunc->getArg(Idx >= CspArgIndex ? Idx + 1 : Idx); + Value *NewArg = NewFunc->getArg(Idx + 1); NewArg->takeName(OldArg); OldArg->replaceAllUsesWith(NewArg); } diff --git a/llvmraytracing/lib/DXILContPostProcess.cpp b/llvmraytracing/lib/DXILContPostProcess.cpp index cfd0073f1c..2320f2e32b 100644 --- a/llvmraytracing/lib/DXILContPostProcess.cpp +++ b/llvmraytracing/lib/DXILContPostProcess.cpp @@ -47,8 +47,6 @@ #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringRef.h" -#include "llvm/Analysis/AssumptionCache.h" -#include "llvm/Analysis/InstructionSimplify.h" #include "llvm/IR/Constants.h" #include "llvm/IR/Dominators.h" #include "llvm/IR/Function.h" @@ -70,7 +68,7 @@ class DXILContPostProcessPassImpl final { DXILContPostProcessPassImpl(Module &M, Module &GpurtLibrary); PreservedAnalyses run(ModuleAnalysisManager &AnalysisManager); - static constexpr unsigned SystemDataArgumentIndex = 1; + static constexpr unsigned SystemDataArgumentIndex = 2; struct FunctionData { DXILShaderKind Kind = DXILShaderKind::Invalid; /// Calls to hlsl intrinsics @@ -83,14 +81,11 @@ class DXILContPostProcessPassImpl final { }; private: - void handleContStackIntrinsic(FunctionAnalysisManager &FAM, Function &F); - void initializeProcessableFunctionData(); - bool handleContStackIntrinsics(llvm::ModuleAnalysisManager &AnalysisManager); bool lowerCpsOps(); + Value *ensure64BitAddr(Value *Packed32BitAddr); void lowerJumpOp(lgc::cps::JumpOp &JumpOp); void lowerAsContinuationReferenceOp(lgc::cps::AsContinuationReferenceOp &AsCrOp); - bool handleAmdInternals(); bool cleanupIncomingPayloadMetadata(Function &F); bool cleanupOutgoingPayloadMetadata(); @@ -99,10 +94,7 @@ class DXILContPostProcessPassImpl final { MapVector ToProcess; llvm_dialects::Builder Builder; std::optional StackAddrspace; - std::optional StackLowering; CompilerUtils::CrossModuleInliner CrossInliner; - - Function *GetGlobalMemBase = nullptr; }; // Removes outgoing payload metadata @@ -126,13 +118,12 @@ bool DXILContPostProcessPassImpl::cleanupOutgoingPayloadMetadata() { return S.Changed; } -static Function *getContinuationGetAddrAndMD(Module &M) { +static Function *getContinuationGetAddrAndMD(Module &M, Type *RetTy) { auto *Name = "continuation.getAddrAndMD"; if (auto *F = M.getFunction(Name)) return F; auto &C = M.getContext(); - auto *I64 = Type::getInt64Ty(C); - auto *FuncTy = FunctionType::get(I64, {PointerType::get(C, 0)}, false); + auto *FuncTy = FunctionType::get(RetTy, {PointerType::get(C, 0)}, false); return cast(M.getOrInsertFunction(Name, FuncTy).getCallee()); } @@ -152,107 +143,6 @@ static Function *getContinuationGetAddrAndMD(Module &M) { } } -// Replace calls to _AmdContStack* with calls to lgc.cps dialect ops. -// Do some simple constant propagation on the fly. -void DXILContPostProcessPassImpl::handleContStackIntrinsic(FunctionAnalysisManager &FAM, Function &F) { - - // Check if the function is either of void return type or i32 return type and - // has no arguments or a single integer argument dividable by 32 (to allow - // storing and loading multiple dwords via AmdContStackLoad / - // AmdContStackStore). - Type *ReturnTy = F.getReturnType(); - (void)ReturnTy; - assert((ReturnTy->isVoidTy() || (ReturnTy->isIntegerTy() && (ReturnTy->getIntegerBitWidth() % 32 == 0))) && - "DXILContPostProcessPassImpl::handleContStackIntrinsic: Invalid " - "return type!"); - - Type *FuncTy = F.getFunctionType(); - (void)(FuncTy); - assert((FuncTy->getFunctionNumParams() == 0 || FuncTy->getFunctionParamType(0)->isIntegerTy()) && - "DXILContPostProcessPassImpl::handleContStackIntrinsic: Invalid " - "argument signature!"); - - StringRef FuncName = F.getName(); - FuncName.consume_front("_AmdContStack"); - - auto ConstantFoldInstruction = [&](Function *Parent, Value *SizeArg) -> Value * { - if (!isa(SizeArg)) - return SizeArg; - - if (auto *I = dyn_cast(SizeArg)) { - // Do some basic constant-propagation - // This is needed because this pass just replaced the ValueI32Count - // and ContPayloadRegistersI32Count intrinsics and the allocated size - // usually depends on these values. - auto &DT = FAM.getResult(*Parent); - auto &TLI = FAM.getResult(*Parent); - auto &AC = FAM.getResult(*Parent); - const SimplifyQuery SQ(Parent->getParent()->getDataLayout(), &TLI, &DT, &AC); - - if (auto *NewSize = simplifyInstruction(I, SQ)) - return NewSize; - } - - return SizeArg; - }; - - llvm::forEachCall(F, [&](CallInst &CInst) { - Value *Replacement = nullptr; - Builder.SetInsertPoint(&CInst); - - Type *DestTy = CInst.getType(); - - bool IsMemoryAccess = false; - if (FuncName.starts_with("Alloc")) { - Value *SizeArg = ConstantFoldInstruction(CInst.getFunction(), CInst.getArgOperand(0)); - Replacement = Builder.create(SizeArg); - - if (auto *Size = dyn_cast(SizeArg)) - ContHelper::StackSize::inc(CInst.getFunction(), Size->getSExtValue()); - } else if (FuncName.starts_with("Free")) { - Value *SizeArg = ConstantFoldInstruction(CInst.getFunction(), CInst.getArgOperand(0)); - Replacement = Builder.create(SizeArg); - } else if (FuncName.starts_with("SetPtr")) { - Value *Vsp = CInst.getArgOperand(0); - Replacement = Builder.create( - Builder.CreateIntToPtr(Vsp, PointerType::get(Builder.getInt8Ty(), lgc::cps::stackAddrSpace))); - } else if (FuncName.starts_with("GetPtr")) { - Replacement = Builder.create(); - } else if (FuncName.starts_with("Load")) { - Value *Addr = ConstantFoldInstruction(CInst.getFunction(), CInst.getArgOperand(0)); - Value *Ptr = Builder.CreateIntToPtr(Addr, CInst.getType()->getPointerTo(lgc::cps::stackAddrSpace)); - Replacement = Builder.CreateAlignedLoad(DestTy, Ptr, Align(CpsStackLowering::getContinuationStackAlignment())); - - if (FuncName.starts_with("LoadLastUse")) - CompilerUtils::setIsLastUseLoad(*cast(Replacement)); - - IsMemoryAccess = true; - } else if (FuncName.starts_with("Store")) { - assert(FuncTy->getFunctionNumParams() == 2 && "DXILContPostProcessPassImpl::handleContStackIntrinsic: Invalid " - "argument signature for AmdContStackStore!"); - - Value *Addr = ConstantFoldInstruction(CInst.getFunction(), CInst.getArgOperand(0)); - Value *Val = CInst.getArgOperand(1); - Value *Ptr = Builder.CreateIntToPtr(Addr, Val->getType()->getPointerTo(lgc::cps::stackAddrSpace)); - Builder.CreateAlignedStore(Val, Ptr, Align(CpsStackLowering::getContinuationStackAlignment())); - - IsMemoryAccess = true; - } else { - llvm_unreachable("DXILContPostProcessPassImpl::handleContStackIntrinsic: " - "Unknown intrinsic!"); - } - - if (Replacement) { - if (!DestTy->isVoidTy() && !IsMemoryAccess) - Replacement = Builder.CreatePtrToInt(Replacement, DestTy); - - CInst.replaceAllUsesWith(Replacement); - } - - CInst.eraseFromParent(); - }); -} - void DXILContPostProcessPassImpl::initializeProcessableFunctionData() { for (Function &F : *Mod) { if (F.isDeclaration()) @@ -285,7 +175,7 @@ void DXILContPostProcessPassImpl::initializeProcessableFunctionData() { FunctionData Data; Data.Kind = Kind; - Data.SystemDataArgumentIndex = !IsCpsFunction ? SystemDataArgumentIndex : CpsArgIdxSystemData; + Data.SystemDataArgumentIndex = !IsCpsFunction ? SystemDataArgumentIndex : CpsArgIdxWithStackPtr::SystemData; Data.SystemDataTy = F.getFunctionType()->getParamType(Data.SystemDataArgumentIndex); @@ -301,7 +191,7 @@ void DXILContPostProcessPassImpl::initializeProcessableFunctionData() { FunctionData Data; Data.Kind = Kind; - Data.SystemDataArgumentIndex = !IsCpsFunction ? SystemDataArgumentIndex : CpsArgIdxSystemData; + Data.SystemDataArgumentIndex = !IsCpsFunction ? SystemDataArgumentIndex : CpsArgIdxWithStackPtr::SystemData; Data.SystemDataTy = F.getFunctionType()->getParamType(Data.SystemDataArgumentIndex); [[maybe_unused]] bool DidInsert = ToProcess.insert({&F, std::move(Data)}).second; assert(DidInsert); @@ -323,11 +213,10 @@ void DXILContPostProcessPassImpl::initializeProcessableFunctionData() { FunctionData Data = ToProcess[EntryF]; Data.IsStart = false; - Data.SystemDataArgumentIndex = !lgc::cps::isCpsFunction(F) ? SystemDataArgumentIndex : CpsArgIdxSystemData; + Data.SystemDataArgumentIndex = + !lgc::cps::isCpsFunction(F) ? SystemDataArgumentIndex : CpsArgIdxWithStackPtr::SystemData; - // Extract the actual system data type from the { systemData, padding, - // payload } struct returned by await. - Data.SystemDataTy = F.getArg(Data.SystemDataArgumentIndex)->getType()->getStructElementType(0); + Data.SystemDataTy = F.getArg(Data.SystemDataArgumentIndex)->getType(); [[maybe_unused]] bool DidInsert = ToProcess.insert({&F, std::move(Data)}).second; assert(DidInsert); } @@ -335,22 +224,6 @@ void DXILContPostProcessPassImpl::initializeProcessableFunctionData() { } } -bool DXILContPostProcessPassImpl::handleContStackIntrinsics(llvm::ModuleAnalysisManager &AnalysisManager) { - bool Changed = false; - - for (auto &F : Mod->functions()) { - if (F.getName().contains("ContStack")) { - Changed = true; - - auto &FAM = AnalysisManager.getResult(*Mod).getManager(); - - handleContStackIntrinsic(FAM, F); - } - } - - return Changed; -} - // // Entry point for all lgc.cps lowering. // @@ -383,62 +256,56 @@ bool DXILContPostProcessPassImpl::lowerCpsOps() { CpsVisitorState State{*this, Changed, Builder}; - struct CspCandidateInfo { - bool RequiresCspArgument = false; - Function *Func = nullptr; - }; - - SmallVector CandidateInfo; - for (Function &Func : *Mod) { if (Func.isDeclaration()) continue; - if (lgc::rt::getLgcRtShaderStage(&Func) == lgc::rt::RayTracingShaderStage::KernelEntry) { - CandidateInfo.push_back({false, &Func}); - continue; - } - - if (Func.hasMetadata(ContHelper::MDContinuationName)) { - CandidateInfo.push_back({true, &Func}); - continue; - } - - if (lgc::cps::isCpsFunction(Func)) { - CandidateInfo.push_back({true, &Func}); - continue; + if (lgc::rt::getLgcRtShaderStage(&Func) == lgc::rt::RayTracingShaderStage::KernelEntry || + Func.hasMetadata(ContHelper::MDContinuationName) || lgc::cps::isCpsFunction(Func)) { + // Lower lgc.cps.jump and lgc.cps.as.continuation.reference ops. + CpsVisitor.visit(State, Func); } } - for (auto &[RequiresCspArgument, F] : CandidateInfo) { - // Lower lgc.cps.jump and lgc.cps.as.continuation.reference ops. - CpsVisitor.visit(State, *F); + return Changed; +} - auto Data = std::move(ToProcess[F]); - ToProcess.erase(F); +Value *DXILContPostProcessPassImpl::ensure64BitAddr(Value *Src) { + Type *SrcTy = Src->getType(); + Type *I64 = Builder.getInt64Ty(); + if (SrcTy == I64) + return Src; - auto *NewFunc = StackLowering->lowerCpsStackOps(F, GetGlobalMemBase, RequiresCspArgument); + assert(SrcTy->isIntegerTy(32)); - ToProcess.insert({NewFunc, Data}); - } + Value *Addr64 = Builder.CreateZExt(Src, I64); + Addr64 = Builder.CreateAnd(Addr64, 0xFFFFFFC0); - return Changed; + Value *Priority = Builder.CreateAnd(Src, Builder.getInt32(0x7)); + // firstMetadataBit = 32 + // firstPriorityBitInMetadata = 16 + // vpc = vpc | (prio64 << (firstMetadataBit + firstPriorityBitInMetadata)) + Priority = Builder.CreateShl(Builder.CreateZExt(Priority, I64), 48); + Addr64 = Builder.CreateOr(Addr64, Priority); + + return Addr64; } void DXILContPostProcessPassImpl::lowerJumpOp(lgc::cps::JumpOp &JumpOp) { Builder.SetInsertPoint(&JumpOp); - Value *RCR = Builder.CreateZExt(JumpOp.getTarget(), Builder.getInt64Ty()); CallInst *ContinueOp = nullptr; SmallVector TailArgs{JumpOp.getTail()}; - Value *RetAddr = Builder.CreateZExt(JumpOp.getRcr(), Builder.getInt64Ty()); + + Value *JumpTarget = ensure64BitAddr(JumpOp.getTarget()); + Value *RetAddr = JumpOp.getRcr(); if (ContHelper::isWaitAwaitCall(JumpOp)) { - ContinueOp = - Builder.create(RCR, Builder.getInt64(-1), JumpOp.getCsp(), RetAddr, TailArgs); + ContinueOp = Builder.create(JumpTarget, Builder.getInt64(-1), JumpOp.getCsp(), RetAddr, + TailArgs); ContHelper::removeWaitMask(JumpOp); } else { - ContinueOp = Builder.create(RCR, JumpOp.getCsp(), RetAddr, TailArgs); + ContinueOp = Builder.create(JumpTarget, JumpOp.getCsp(), RetAddr, TailArgs); } ContinueOp->copyMetadata(JumpOp); @@ -447,79 +314,13 @@ void DXILContPostProcessPassImpl::lowerJumpOp(lgc::cps::JumpOp &JumpOp) { void DXILContPostProcessPassImpl::lowerAsContinuationReferenceOp(lgc::cps::AsContinuationReferenceOp &AsCrOp) { Builder.SetInsertPoint(&AsCrOp); - Value *AddrWithMD = Builder.CreateCall(getContinuationGetAddrAndMD(*Mod), {AsCrOp.getFn()}); - - if (AsCrOp.getType()->isIntegerTy(32)) { - // If we are using 32-bit compact VPC, extract metadata and encode it into VPC. - auto Vpc = Builder.CreateTruncOrBitCast(AddrWithMD, Builder.getInt32Ty()); - Vpc = Builder.CreateAnd(Vpc, 0xFFFFFFC0); - - // Encode shader priority. - auto RtStage = - lgc::rt::getLgcRtShaderStage(cast(AsCrOp.getFn())).value_or(lgc::rt::RayTracingShaderStage::Count); - - auto GetPriorityFromRtStage = [](lgc::rt::RayTracingShaderStage RtStage) { - // Shader priorities for continuation scheduling. Higher values mean higher scheduling precedence. - // Reserve priority 0 as invalid value. - enum SchedulingPriority : unsigned { - SchedulingPriorityInvalid = 0, - SchedulingPriorityRgs = 1, - SchedulingPriorityChs = 2, - SchedulingPriorityMiss = 2, - SchedulingPriorityTraversal = 3, - SchedulingPriorityAhs = 4, - SchedulingPriorityIs = 5, - SchedulingPriorityCallable = 6, - SchedulingPriorityMaxValid = 7 - }; - switch (RtStage) { - case lgc::rt::RayTracingShaderStage::RayGeneration: - return SchedulingPriorityRgs; - case lgc::rt::RayTracingShaderStage::ClosestHit: - return SchedulingPriorityChs; - case lgc::rt::RayTracingShaderStage::Miss: - return SchedulingPriorityMiss; - case lgc::rt::RayTracingShaderStage::Traversal: - return SchedulingPriorityTraversal; - case lgc::rt::RayTracingShaderStage::AnyHit: - return SchedulingPriorityAhs; - case lgc::rt::RayTracingShaderStage::Intersection: - return SchedulingPriorityIs; - case lgc::rt::RayTracingShaderStage::Callable: - return SchedulingPriorityCallable; - default: - report_fatal_error("Unknown ray tracing shader stage for resume function"); - } - }; - Vpc = Builder.CreateOr(Vpc, Builder.getInt32(GetPriorityFromRtStage(RtStage))); - AddrWithMD = Vpc; - } + Value *AddrWithMD = Builder.CreateCall(getContinuationGetAddrAndMD(*Mod, AsCrOp.getType()), {AsCrOp.getFn()}); AsCrOp.replaceAllUsesWith(AddrWithMD); AsCrOp.eraseFromParent(); } -bool DXILContPostProcessPassImpl::handleAmdInternals() { - bool Changed = false; - - for (auto &F : Mod->functions()) { - auto Name = F.getName(); - if (Name.starts_with("_AmdValueI32Count")) { - Changed = true; - ContHelper::handleValueI32Count(F, Builder); - } else if (Name.starts_with("_AmdValueGetI32")) { - Changed = true; - ContHelper::handleValueGetI32(F, Builder); - } else if (Name.starts_with("_AmdValueSetI32")) { - Changed = true; - ContHelper::handleValueSetI32(F, Builder); - } - } - - return Changed; -} - DXILContPostProcessPassImpl::DXILContPostProcessPassImpl(Module &M, Module &GpurtLibrary) : Mod{&M}, GpurtLibrary{&GpurtLibrary}, Builder{Mod->getContext()}, StackAddrspace{ ContHelper::tryGetStackAddrspace(*Mod)} { @@ -528,16 +329,8 @@ DXILContPostProcessPassImpl::DXILContPostProcessPassImpl(Module &M, Module &Gpur PreservedAnalyses DXILContPostProcessPassImpl::run(ModuleAnalysisManager &AnalysisManager) { bool Changed = false; - StackLowering.emplace(Mod->getContext(), static_cast(StackAddrspace.value())); - - if (*StackAddrspace == ContStackAddrspace::Global) - GetGlobalMemBase = getContinuationStackGlobalMemBase(*GpurtLibrary); - initializeProcessableFunctionData(); - Changed |= handleAmdInternals(); - Changed |= handleContStackIntrinsics(AnalysisManager); - for (auto &[Func, Data] : ToProcess) { ContHelper::IncomingRegisterCount::reset(Func); ContHelper::ContinuationStateByteCount::reset(Func); diff --git a/llvmraytracing/lib/DXILContIntrinsicPrepare.cpp b/llvmraytracing/lib/DXILContPrepareGpurtLibrary.cpp similarity index 93% rename from llvmraytracing/lib/DXILContIntrinsicPrepare.cpp rename to llvmraytracing/lib/DXILContPrepareGpurtLibrary.cpp index 6c3868e264..69a4a8f823 100644 --- a/llvmraytracing/lib/DXILContIntrinsicPrepare.cpp +++ b/llvmraytracing/lib/DXILContPrepareGpurtLibrary.cpp @@ -23,7 +23,7 @@ * **********************************************************************************************************************/ -//===- DXILContIntrinsicPrepare.cpp - Change signature of functions -------===// +//===- DXILContPrepareGpurtLibrary.cpp - Change signature of functions -------===// // // A pass that prepares driver implemented functions for later use. // @@ -43,13 +43,12 @@ #include "llvm/IR/Module.h" #include "llvm/IR/Type.h" #include -#include using namespace llvm; -#define DEBUG_TYPE "dxil-cont-intrinsic-prepare" +#define DEBUG_TYPE "dxil-cont-prepare-gpurt-library" -DXILContIntrinsicPreparePass::DXILContIntrinsicPreparePass() { +DXILContPrepareGpurtLibraryPass::DXILContPrepareGpurtLibraryPass() { } /// - Unmangle the function names to be more readable and to prevent confusion @@ -184,9 +183,9 @@ static void handleGetShaderRecordIndex(llvm_dialects::Builder &B, Function &Func }); } -llvm::PreservedAnalyses DXILContIntrinsicPreparePass::run(llvm::Module &M, - llvm::ModuleAnalysisManager &AnalysisManager) { - LLVM_DEBUG(dbgs() << "Run the dxil-cont-intrinsic-prepare pass\n"); +llvm::PreservedAnalyses DXILContPrepareGpurtLibraryPass::run(llvm::Module &M, + llvm::ModuleAnalysisManager &AnalysisManager) { + LLVM_DEBUG(dbgs() << "Run the dxil-cont-prepare-gpurt-library pass\n"); AnalysisManager.getResult(M); diff --git a/llvmraytracing/lib/DXILSupport.cpp b/llvmraytracing/lib/DXILSupport.cpp index 67e8354036..cb4a1c44de 100644 --- a/llvmraytracing/lib/DXILSupport.cpp +++ b/llvmraytracing/lib/DXILSupport.cpp @@ -66,6 +66,16 @@ static bool isInResources(Value *Handle, Metadata *MD) { return false; } +static bool isAnyDxilLoad(StringRef Name) { + static const char *const LoadFunctions[] = {"dx.op.bufferLoad", "dx.op.rawBufferLoad", "dx.op.sample", + "dx.op.textureLoad"}; + + for (const auto *LoadFunc : LoadFunctions) + if (Name.starts_with(LoadFunc)) + return true; + return false; +} + /// Check if a load comes from constant memory (SRV or CBV) and can be /// rematerialized. /// @@ -76,17 +86,7 @@ static bool isInResources(Value *Handle, Metadata *MD) { /// check that, so we rematerialize all constant loads. static bool isRematerializableDxilLoad(CallInst *CInst, StringRef CalledName) { // First, check if this is a dxil load - static const char *const LoadFunctions[] = {"dx.op.bufferLoad", "dx.op.rawBufferLoad", "dx.op.sample", - "dx.op.textureLoad"}; - - bool IsLoad = false; - for (const auto *LoadFunc : LoadFunctions) { - if (CalledName.starts_with(LoadFunc)) { - IsLoad = true; - break; - } - } - if (!IsLoad) + if (!isAnyDxilLoad(CalledName)) return false; // Get the buffer handle @@ -113,13 +113,43 @@ static bool isRematerializableDxilLoad(CallInst *CInst, StringRef CalledName) { // in SRVs or CBVs if (isInResources(Handle, MD->getOperand(0).get()) || isInResources(Handle, MD->getOperand(2).get())) return true; - } else { - // Failing the check in release mode is fine, but we still want to know - // cases where this does not match, so assert in that case. - assert(false && "A handle should originate from a load instruction"); + else + return false; } - // Not found in the lists, so not a constant buffer + // If we fail to match the above LoadInst then this is an unhandled pattern + // or a pattern we do not want to rematerialize. Note, it is always safe to + // return 'false' in the case of unhandled patterns. + + LLVM_DEBUG({ + auto IsDoNotRematerializeCase = [&]() { + // These patterns are recognized cases that we don't want to remat: + // + // Do not rematerialize an indirect handle load. Doing so would replace a + // store and N loads (from/to continuation state) by 2N loads (N is the + // number of resume functions using the value). 2N loads because every + // resume function would need to load the handle from cont state followed + // by the buffer load. For example: + // %284 = call %dx.types.ResRet.i32 @dx.op.rawBufferLoad.i32(i32 139, %dx.types.Handle %281, ... + // %285 = extractvalue %dx.types.ResRet.i32 %284, 0 + // %286 = call %dx.types.Handle @dx.op.createHandleFromHeap(i32 218, i32 %285, ... + // %287 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %286, ... + // %289 = call %dx.types.ResRet.i32 @dx.op.rawBufferLoad.i32(i32 139, %dx.types.Handle %287, ... + // Where %dx.types.ResRet.i32 is an aggregate like { i32, i32, i32, i32, ...} + if (auto *EV = dyn_cast(Handle)) + if (auto *HandleCall = dyn_cast(EV->getAggregateOperand())) + if (auto *BFCall = dyn_cast(HandleCall)) + if (BFCall->getCalledFunction()->getName().starts_with("dx.op.rawBufferLoad")) + return true; + return false; + }; + + if (!IsDoNotRematerializeCase()) { + dbgs() << "Warning: isRematerializableDxilLoad unhandled pattern: "; + Handle->dump(); + } + }); + return false; } diff --git a/llvmraytracing/lib/LgcCpsDialect.cpp b/llvmraytracing/lib/LgcCpsDialect.cpp index a7dcf202f7..d125fc370c 100644 --- a/llvmraytracing/lib/LgcCpsDialect.cpp +++ b/llvmraytracing/lib/LgcCpsDialect.cpp @@ -211,41 +211,6 @@ uint8_t lgc::cps::getPotentialCpsReturnLevels(RayTracingShaderStage stage) { return static_cast(CpsLevels.to_ulong()); } -// ===================================================================================================================== -// Push the state passed to a lgc::cps::jump op to the stack and return the new -// continuation stack pointer. Do nothing if there is no state to push. -void lgc::cps::pushStateToCpsStack(llvm_dialects::Builder &builder, lgc::cps::JumpOp &jumpOp) { - Value *State = jumpOp.getState(); - - Type *StateType = State->getType(); - if (StateType->isEmptyTy()) - return; - - const DataLayout &DL = jumpOp.getModule()->getDataLayout(); - builder.SetInsertPoint(&jumpOp); - - Value *NewCsp = - builder.create(builder.getInt32(static_cast(DL.getTypeStoreSize(StateType)))); - builder.CreateStore(State, NewCsp); -} - -// ===================================================================================================================== -// Load the CPS state from the CPS stack. Reduces the stack pointer by the -// corresponding state size. Returns the popped state if eligible. If nothing -// can to be popped, return nullptr. Assume that the builder has its insertion -// point set after the CSP initializer. -Value *lgc::cps::popStateFromCpsStack(llvm_dialects::Builder &builder, const DataLayout &DL, Type *stateType) { - if (stateType->isEmptyTy()) - return nullptr; - - ConstantInt *StateSize = builder.getInt32(static_cast(DL.getTypeStoreSize(stateType))); - Value *StatePtr = builder.create(StateSize); - Value *NewState = builder.CreateLoad(stateType, StatePtr); - builder.create(StateSize); - - return NewState; -} - // ===================================================================================================================== // Lower lgc.cps.as.continuation.reference operations into an integer // representation of the pointer or a passed relocation. Return the new diff --git a/llvmraytracing/lib/LgcCpsJumpInliner.cpp b/llvmraytracing/lib/LgcCpsJumpInliner.cpp index 3890117b02..4e10b3845f 100644 --- a/llvmraytracing/lib/LgcCpsJumpInliner.cpp +++ b/llvmraytracing/lib/LgcCpsJumpInliner.cpp @@ -92,15 +92,7 @@ PreservedAnalyses LgcCpsJumpInlinerPassImpl::run() { assert(JumpTargetFunc && !JumpTargetFunc->isDeclaration()); Builder.SetInsertPoint(Jump); - SmallVector ArgList; - assert(Jump->getState()->getType()->isEmptyTy()); - - if (isCpsFunction(*JumpTargetFunc)) { - // TODO: We need to ensure we properly pass in RCR and shader index. - ArgList.push_back(Jump->getState()); - } - - ArgList.push_back(Jump->getRcr()); + SmallVector ArgList{Jump->getRcr()}; ArgList.append(Jump->getTail().begin(), Jump->getTail().end()); diff --git a/llvmraytracing/lib/LgcRtDialect.cpp b/llvmraytracing/lib/LgcRtDialect.cpp index 377916aa11..1de0ea1744 100644 --- a/llvmraytracing/lib/LgcRtDialect.cpp +++ b/llvmraytracing/lib/LgcRtDialect.cpp @@ -44,7 +44,7 @@ class LLVMContext; namespace { // Shader stage metadata to identify the shader stage of a given function. -constexpr const char ShaderStageMetadata[] = "lgc.rt.shaderstage"; +constexpr const char RtShaderStageMetadata[] = "lgc.rt.shaderstage"; // PAQ (payload access qualifier) metadata on a shader function, with an array // of ints of the same form as the paq argument to the trace.ray dialect op, @@ -133,7 +133,7 @@ std::optional getMetadataNumericValue(const llvm::Module *module, String // Get the metadata IDs associated with the lgc.rt dialect, so the caller knows // which ones can be removed when the dialect is processed. void lgc::rt::getLgcRtMetadataIds(LLVMContext &context, SmallVectorImpl &ids) { - ids.push_back(context.getMDKindID(ShaderStageMetadata)); + ids.push_back(context.getMDKindID(RtShaderStageMetadata)); ids.push_back(context.getMDKindID(PaqMetadata)); ids.push_back(context.getMDKindID(ArgSizeMetadata)); ids.push_back(context.getMDKindID(AttributeSizeMetadata)); @@ -147,9 +147,9 @@ void lgc::rt::getLgcRtMetadataIds(LLVMContext &context, SmallVectorImpl stage) { if (stage.has_value()) - setMetadataNumericValue(func, ShaderStageMetadata, static_cast(stage.value())); + setMetadataNumericValue(func, RtShaderStageMetadata, static_cast(stage.value())); else - func->eraseMetadata(func->getContext().getMDKindID(ShaderStageMetadata)); + func->eraseMetadata(func->getContext().getMDKindID(RtShaderStageMetadata)); } // ============================================================================================== @@ -159,7 +159,7 @@ void lgc::rt::setLgcRtShaderStage(GlobalObject *func, std::optional lgc::rt::getLgcRtShaderStage(const GlobalObject *func) { - std::optional mdValue = getMetadataNumericValue(func, ShaderStageMetadata); + std::optional mdValue = getMetadataNumericValue(func, RtShaderStageMetadata); if (mdValue.has_value()) { return RayTracingShaderStage(*mdValue); } diff --git a/llvmraytracing/lib/LowerRaytracingPipeline.cpp b/llvmraytracing/lib/LowerRaytracingPipeline.cpp index 0c4116fd01..2f71a9394b 100644 --- a/llvmraytracing/lib/LowerRaytracingPipeline.cpp +++ b/llvmraytracing/lib/LowerRaytracingPipeline.cpp @@ -581,7 +581,6 @@ class LowerRaytracingPipelinePassImpl final { Type *HitMissDataTy; /// Dispatch system data type passed to RayGen and others Type *DispatchSystemDataTy; - Type *RcrTy; // Function definitions and declarations from HLSL // Driver implementation that returns if AcceptHitAndEndSearch was called @@ -646,6 +645,8 @@ void ModuleMetadataState::updateModuleMetadata() const { CallInst *LowerRaytracingPipelinePassImpl::insertCpsAwait(Type *ReturnTy, Value *ShaderAddr, Instruction *Call, ArrayRef Args, ContinuationCallType CallType, RayTracingShaderStage ShaderStage) { + assert(ShaderAddr->getType() == Builder.getInt32Ty()); + Builder.SetInsertPoint(Call); RayTracingShaderStage CallStage = RayTracingShaderStage::Count; @@ -659,8 +660,8 @@ CallInst *LowerRaytracingPipelinePassImpl::insertCpsAwait(Type *ReturnTy, Value assert(CallStage != RayTracingShaderStage::Count && "LowerRaytracingPipelinePassImpl::insertCpsAwait: Invalid " "call stage before inserting lgc.cps.await operation!"); - return Builder.create(ReturnTy, Builder.CreateTrunc(ShaderAddr, RcrTy), - 1 << static_cast(getCpsLevelForShaderStage(CallStage)), Args); + return Builder.create(ReturnTy, ShaderAddr, 1 << static_cast(getCpsLevelForShaderStage(CallStage)), + Args); } Function *llvm::getSetLocalRootIndex(Module &M) { @@ -922,14 +923,12 @@ void LowerRaytracingPipelinePassImpl::replaceContinuationCall(ContinuationCallTy SmallVector ArgTys; SmallVector Args; - bool IsWait = (Call->getCalledFunction()->getName().starts_with("_AmdWaitAwait")); - Value *RetAddr = nullptr; - if (MetadataState.isInLgcCpsMode()) { + const bool IsLgcCpsMode = MetadataState.isInLgcCpsMode(); + if (IsLgcCpsMode) { // For LgcCps, skip function-addr, the return address will be filled at late // stage of continuation transform. Add shader index so that the callee cps // function get correct shader-index being passed in. - ArgTys.push_back(I32); auto *ShaderIndex = CrossInliner .inlineCall(Builder, GetLocalRootIndex, @@ -944,14 +943,13 @@ void LowerRaytracingPipelinePassImpl::replaceContinuationCall(ContinuationCallTy // We want to avoid having the return address included in the padding // computation, since it is included nowhere else. This allows us to compute // padding only on the actual tail arguments, which is the only varying part - // of the final continue call at the end. WaitAwaitTraversal calls don't - // have a return address, so keep that in mind here. - uint32_t RetAddrArgIndex = IsWait ? 2 : 1; + // of the final continue call at the end. + uint32_t RetAddrArgIndex = 1; if (CallType == ContinuationCallType::Traversal) { - RetAddr = PoisonValue::get(Builder.getInt64Ty()); + RetAddr = PoisonValue::get(Builder.getInt32Ty()); } else { RetAddr = Call->getArgOperand(RetAddrArgIndex); - assert(RetAddr->getType()->isIntegerTy(32) || RetAddr->getType()->isIntegerTy(64)); + assert(RetAddr->getType()->isIntegerTy(32)); ++RetAddrArgIndex; } @@ -977,7 +975,6 @@ void LowerRaytracingPipelinePassImpl::replaceContinuationCall(ContinuationCallTy SmallVector ReturnedArgTys{Call->getType()}; - const bool IsLgcCpsMode = MetadataState.isInLgcCpsMode(); const bool HasPayload = Data.FirstPayloadArgumentDword.has_value(); // Add padding so that returned payload starts at a fixed dword. @@ -988,10 +985,6 @@ void LowerRaytracingPipelinePassImpl::replaceContinuationCall(ContinuationCallTy Args.push_back(Builder.CreateLoad(OutgoingPayloadTy, Data.PayloadStorage)); } - Value *WaitMask = nullptr; - if (IsWait) - WaitMask = Call->getArgOperand(1); - uint32_t PaddingOffset = 1; if (!IsLgcCpsMode) { // Compute padding for the resume function so that payload starts at a @@ -1011,12 +1004,7 @@ void LowerRaytracingPipelinePassImpl::replaceContinuationCall(ContinuationCallTy auto *NewRetTy = StructType::get(Builder.getContext(), ReturnedArgTys); auto *NewCall = insertCpsAwait(NewRetTy, ShaderAddr, Call, Args, CallType, Data.Kind); - - if (WaitMask) { - // The only supported wait mask is a constant -1. - assert(cast(WaitMask)->getSExtValue() == -1); - ContHelper::setWaitMask(*NewCall); - } + NewCall->copyMetadata(*Call); // Copy back returned payload to the payload serialization alloca as part of // the payload copying. @@ -1069,7 +1057,7 @@ void LowerRaytracingPipelinePassImpl::replaceShaderIndexCall(FunctionData &Data, } else { Value *ShaderIndex = nullptr; if (MetadataState.isInLgcCpsMode()) { - ShaderIndex = Call->getFunction()->getArg(CpsArgIdxShaderIndex); + ShaderIndex = Call->getFunction()->getArg(CpsArgIdx::ShaderIndex); } else { assert(Data.SystemDataFirstStore != nullptr); Builder.SetInsertPoint(&*++Data.SystemDataFirstStore->getIterator()); @@ -1145,8 +1133,7 @@ void LowerRaytracingPipelinePassImpl::handleGetCurrentFuncAddr(Function &Func) { llvm::forEachCall(Func, [&](llvm::CallInst &CInst) { auto *F = CInst.getFunction(); Builder.SetInsertPoint(&CInst); - Value *AsContRef = Builder.create(RcrTy, F); - AsContRef = MetadataState.isInLgcCpsMode() ? Builder.CreateZExt(AsContRef, Builder.getInt64Ty()) : AsContRef; + Value *AsContRef = Builder.create(F); CInst.replaceAllUsesWith(AsContRef); CInst.eraseFromParent(); }); @@ -1396,9 +1383,6 @@ void LowerRaytracingPipelinePassImpl::copyHitAttributes(FunctionData &Data, Valu } void LowerRaytracingPipelinePassImpl::setGpurtEntryRegisterCountMetadata() { - if (MetadataState.isInLgcCpsMode()) - return; - // Even if PreservedPayloadRegisterCount is set, there may be // additional shaders in the current module whose usage is recorded // in MaxUsedPayloadRegisterCount, to take the max with it. @@ -1643,8 +1627,7 @@ void LowerRaytracingPipelinePassImpl::processFunctionEnd(FunctionData &Data, Fun std::min(EData.OutgoingSerializationLayout->NumStorageI32s, MetadataState.getMaxPayloadRegisterCount()); } - Value *ReturnAddr = Parent->getArg(MetadataState.isInLgcCpsMode() ? CpsArgIdxReturnAddr : 0); - const uint32_t Levels = MetadataState.isInLgcCpsMode() ? getPotentialCpsReturnLevels(Data.Kind) : -1; + Value *ReturnAddr = Parent->getArg(CpsArgIdx::ReturnAddr); if (RetValue) PaddingArgs.push_back(RetValue); @@ -1655,9 +1638,9 @@ void LowerRaytracingPipelinePassImpl::processFunctionEnd(FunctionData &Data, Fun PayloadHelper.appendPaddingAndPayloadValues(PaddingArgs, TailArgList, OutgoingRegisterCount, Data.FirstPayloadArgumentDword, Data.PayloadStorage); - Instruction *Jump = - Builder.create(ReturnAddr, Levels, PoisonValue::get(StructType::get(Builder.getContext())), - PoisonValue::get(I32), PoisonValue::get(RcrTy), TailArgList); + Value *DummyI32 = PoisonValue::get(I32); + Instruction *Jump = Builder.create(ReturnAddr, getPotentialCpsReturnLevels(Data.Kind), DummyI32, + DummyI32, TailArgList); Builder.CreateUnreachable(); EData.Terminator->eraseFromParent(); @@ -1703,7 +1686,6 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData // Create the CPS function header. // A CPS function signature consists of: - // * State: {} // * Return continuation reference (RCR): i32 // * Shader index // * Remaining arguments (system data, optionally hit attributes) @@ -1713,10 +1695,9 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData // | returnAddr | shaderIndex | systemData | hitAttrs | padding | payload | // For systemData and hitAttrs, use the max possible sizes for calculation. - AllArgTypes.push_back(StructType::get(Mod->getContext())); AllArgTypes.push_back(Builder.getInt32Ty()); - SystemDataArgumentIndex = 3; + SystemDataArgumentIndex = 2; } else { // The overall layout is: // | returnAddr | systemData | (hitAttrs, remaining args) | padding | @@ -1806,8 +1787,8 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData const bool HasPayloadArgument = Data.Kind != RayTracingShaderStage::RayGeneration; if (HasPayloadArgument) { if (MetadataState.isInLgcCpsMode() && Data.Kind != RayTracingShaderStage::AnyHit) { - // Add a dummy argument for CpsArgIdxHitAttributes so that the arg index - // of payload matches CpsArgIdxPayload + // Add a dummy argument for CpsArgIdx::HitAttributes so that the arg index + // of payload matches CpsArgIdx::Payload AllArgTypes.push_back(StructType::get(*Context, {})); } @@ -1817,18 +1798,16 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData // Pass in the return address argument { - const uint32_t RetAddrSize = MetadataState.isInLgcCpsMode() ? 32 : 64; const uint32_t RetAddrPos = MetadataState.isInLgcCpsMode() ? 1 : 0; - AllArgTypes.insert(AllArgTypes.begin() + RetAddrPos, Builder.getIntNTy(RetAddrSize)); + AllArgTypes.insert(AllArgTypes.begin() + RetAddrPos, Builder.getInt32Ty()); } Data.PayloadSpillSize = computePayloadSpillSize(Data.MaxOutgoingPayloadI32s, MetadataState.getMaxPayloadRegisterCount()); assert(Data.PayloadSpillSize == 0 || Data.Kind != RayTracingShaderStage::Intersection); - auto *FunctionTypeRetTy = MetadataState.isInLgcCpsMode() ? Builder.getVoidTy() : NewRetTy; // Create new function to change signature - auto *NewFuncTy = FunctionType::get(FunctionTypeRetTy, AllArgTypes, false); + auto *NewFuncTy = FunctionType::get(Builder.getVoidTy(), AllArgTypes, false); Function *NewFunc = CompilerUtils::cloneFunctionHeader(*F, NewFuncTy, ArrayRef{}); NewFunc->takeName(F); // FIXME: Remove !pointeetypes metadata to workaround an llvm bug. If struct types @@ -1841,12 +1820,8 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData Data.SystemDataTy = cast(SystemDataTy); processFunctionEntry(Data, NewFunc->getArg(SystemDataArgumentIndex)); - uint64_t RetAddrArgIdx = 0; - if (MetadataState.isInLgcCpsMode()) { - NewFunc->getArg(CpsArgIdxContState)->setName("cont.state"); - RetAddrArgIdx = CpsArgIdxReturnAddr; - NewFunc->getArg(CpsArgIdxShaderIndex)->setName("shader.index"); + NewFunc->getArg(CpsArgIdx::ShaderIndex)->setName("shader.index"); // Mark as CPS function with the corresponding level. CpsLevel Level = getCpsLevelForShaderStage(Data.Kind); @@ -1855,8 +1830,8 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData if (Data.Kind != RayTracingShaderStage::RayGeneration) { if (MetadataState.isInLgcCpsMode()) { - NewFunc->getArg(CpsArgIdxSystemData)->setName("system.data"); - NewFunc->getArg(CpsArgIdxHitAttributes)->setName("hit.attrs"); + NewFunc->getArg(CpsArgIdx::SystemData)->setName("system.data"); + NewFunc->getArg(CpsArgIdx::HitAttributes)->setName("hit.attrs"); } NewFunc->getArg(NewFunc->arg_size() - 2)->setName("padding"); @@ -1891,16 +1866,15 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData if (NewSystemData) F->getArg(0)->replaceAllUsesWith(NewSystemData); - NewFunc->getArg(RetAddrArgIdx)->setName("returnAddr"); + NewFunc->getArg(CpsArgIdx::ReturnAddr)->setName("returnAddr"); FunctionEndData EData; if (Data.Kind == RayTracingShaderStage::RayGeneration) { - if (!MetadataState.isInLgcCpsMode()) { + if (!MetadataState.isInLgcCpsMode()) NewFunc->setMetadata(ContHelper::MDEntryName, MDTuple::get(*Context, {})); - // Entry functions have no incoming payload or continuation state - ContHelper::IncomingRegisterCount::setValue(NewFunc, 0); - } + // Entry functions have no incoming payload or continuation state + ContHelper::IncomingRegisterCount::setValue(NewFunc, 0); } else { // Ignore payload for intersection shaders, they don't touch payload Value *NewPayload = nullptr; @@ -1955,10 +1929,8 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData auto IncomingRegisterCount = std::min(IncomingSerializationLayout.NumStorageI32s, MetadataState.getMaxPayloadRegisterCount()); MetadataState.updateMaxUsedPayloadRegisterCount(IncomingRegisterCount); - if (!MetadataState.isInLgcCpsMode()) { - // Annotate function with the number of registers for incoming payload - ContHelper::IncomingRegisterCount::setValue(NewFunc, IncomingRegisterCount); - } + // Annotate function with the number of registers for incoming payload + ContHelper::IncomingRegisterCount::setValue(NewFunc, IncomingRegisterCount); // Copy global payload into local payload at start of shader if (IncomingSerializationLayout.NumStorageI32s) { @@ -1996,7 +1968,7 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData // Copy new hit attributes from argument: // Since the argument list of NewFunc ends with padding and payload, // subtract 3 to get the hit attributes. - unsigned HitAttributesIdx = MetadataState.isInLgcCpsMode() ? CpsArgIdxHitAttributes : NewFunc->arg_size() - 3; + unsigned HitAttributesIdx = MetadataState.isInLgcCpsMode() ? CpsArgIdx::HitAttributes : NewFunc->arg_size() - 3; Builder.CreateStore(NewFunc->getArg(HitAttributesIdx), HitAttrsAlloca); HitAttrs->replaceAllUsesWith(HitAttrsAlloca); } else if (Data.Kind == RayTracingShaderStage::ClosestHit) { @@ -2017,24 +1989,20 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData OrigHitAttrs->replaceAllUsesWith(NewHitAttrs); copyHitAttributes(Data, Data.SystemData, Data.SystemDataTy, NewHitAttrs, true, &IncomingSerializationLayout); } + } else if (Data.Kind == RayTracingShaderStage::Intersection) { + // Annotate intersection shader with the maximum number of registers + // used for payload + // TODO: When compiling a pipeline and not a library, we could figure + // out the pipeline-wide max (on a higher level than here) and + // use that instead. For a library compile, we can't know the + // max payload size of shaders in pipelines this shader is used + // in. + ContHelper::IncomingRegisterCount::setValue(NewFunc, MetadataState.getMaxPayloadRegisterCount()); + // Intentionally do NOT update MaxUsedPayloadRegisterCount } else { - if (!MetadataState.isInLgcCpsMode()) { - if (Data.Kind == RayTracingShaderStage::Intersection) { - // Annotate intersection shader with the maximum number of registers - // used for payload - // TODO: When compiling a pipeline and not a library, we could figure - // out the pipeline-wide max (on a higher level than here) and - // use that instead. For a library compile, we can't know the - // max payload size of shaders in pipelines this shader is used - // in. - ContHelper::IncomingRegisterCount::setValue(NewFunc, MetadataState.getMaxPayloadRegisterCount()); - // Intentionally do NOT update MaxUsedPayloadRegisterCount - } else { - assert(Data.Kind == RayTracingShaderStage::Traversal); - // Intentionally do nothing for Traversal. We explicitly add Traversal - // register count metadata elsewhere. - } - } + assert(Data.Kind == RayTracingShaderStage::Traversal); + // Intentionally do nothing for Traversal. We explicitly add Traversal + // register count metadata elsewhere. } EData.OutgoingSerializationLayout = OutgoingSerializationLayout; @@ -2114,12 +2082,17 @@ void LowerRaytracingPipelinePassImpl::processFunction(Function *F, FunctionData } #ifndef NDEBUG - if (!MetadataState.isInLgcCpsMode() && Data.Kind != RayTracingShaderStage::RayGeneration) { + if (Data.Kind != RayTracingShaderStage::RayGeneration) { // Check that all returns have registercount metadata for (const auto &BB : *F) { auto *Terminator = BB.getTerminator(); - if (Terminator->getOpcode() == Instruction::Ret && !ContHelper::OutgoingRegisterCount::tryGetValue(Terminator)) - report_fatal_error("Missing registercount metadata!"); + if (Terminator->getOpcode() == Instruction::Ret) { + // Traversal needs to end with jumps + unreachable + if (Data.Kind == RayTracingShaderStage::Traversal) + report_fatal_error("Disallowed return found in Traversal, all code paths need to end with an Enqueue"); + else if (!ContHelper::OutgoingRegisterCount::tryGetValue(Terminator)) + report_fatal_error("Missing registercount metadata!"); + } } } #endif @@ -2398,7 +2371,6 @@ LowerRaytracingPipelinePassImpl::LowerRaytracingPipelinePassImpl(llvm::Module &M : Mod{&M}, GpurtLibrary{&GpurtLibrary}, Context{&M.getContext()}, DL{&M.getDataLayout()}, Builder{Mod->getContext()}, MetadataState{*Mod}, PAQManager{Mod, &GpurtLibrary, MetadataState.getMaxPayloadRegisterCount()}, PayloadHelper{*Mod, *DL, Builder} { - RcrTy = MetadataState.isInLgcCpsMode() ? Builder.getInt32Ty() : Builder.getInt64Ty(); } PreservedAnalyses LowerRaytracingPipelinePassImpl::run() { diff --git a/llvmraytracing/lib/PassRegistry.inc b/llvmraytracing/lib/PassRegistry.inc index fa421a67eb..90f821dae1 100644 --- a/llvmraytracing/lib/PassRegistry.inc +++ b/llvmraytracing/lib/PassRegistry.inc @@ -49,11 +49,10 @@ CONT_MODULE_ANALYSIS("dialect-context-analysis", DialectContextAnalysis(NeedDial CONT_MODULE_PASS("cleanup-continuations", CleanupContinuationsPass()) CONT_MODULE_PASS("continuations-lint", ContinuationsLintPass()) CONT_MODULE_PASS("continuations-stats-report", ContinuationsStatsReportPass()) -CONT_MODULE_PASS("dxil-cleanup-continuations", DXILCleanupContinuationsPass()) -CONT_MODULE_PASS("dxil-cont-intrinsic-prepare", DXILContIntrinsicPreparePass()) CONT_MODULE_PASS("dxil-cont-lgc-rt-op-converter", DXILContLgcRtOpConverterPass()) CONT_MODULE_PASS("dxil-cont-post-hook", DXILContPostHookPass()) CONT_MODULE_PASS("dxil-cont-post-process", DXILContPostProcessPass()) +CONT_MODULE_PASS("dxil-cont-prepare-gpurt-library", DXILContPrepareGpurtLibraryPass()) CONT_MODULE_PASS("dxil-cont-pre-hook", DXILContPreHookPass()) CONT_MODULE_PASS("lgc-cps-jump-inliner", LgcCpsJumpInlinerPass()) CONT_MODULE_PASS("lower-await", LowerAwaitPass()) diff --git a/llvmraytracing/lib/SpecializeDriverShaders.cpp b/llvmraytracing/lib/SpecializeDriverShaders.cpp index 16d1ac7a5e..b625b41d32 100644 --- a/llvmraytracing/lib/SpecializeDriverShaders.cpp +++ b/llvmraytracing/lib/SpecializeDriverShaders.cpp @@ -42,12 +42,14 @@ using namespace llvm; using namespace CompilerUtils; #define DEBUG_TYPE "specialize-driver-shaders" +#ifndef NDEBUG // Normal debug output that is also used in testing is wrapped in LLVM_DEBUG // which can be enabled with --debug arguments. // // Even more detailed debug output is wrapped in DETAIL_DEBUG which can be enabled by changing EnableDetailDebugOutput. // This can be useful when debugging, for instance why a particular argument slot was not detected as preserved. static constexpr bool EnableDetailDebugOutput = false; +#endif #define DETAIL_DEBUG(BODY) \ LLVM_DEBUG({ \ if (EnableDetailDebugOutput) { \ @@ -466,14 +468,9 @@ struct JumpInfo { }; struct AwaitInfo : public JumpInfo { - // For awaits, we handle both lgc.cps.await and legacy awaits. + // Handle lgc.cps.await. // lgc.cps uses a single await call, like: // %result = call @lgc.cps.await(i32 %target, i32 %levels, args...) - // legacy mode uses *two* calls, first invoking target, and then awaiting the result: - // %handle = call ptr inttoptr (i32 %target to ptr)(args...) - // %result = call @await(ptr %handle) - // For legacy awaits, this is the second call that obtains the result value. - // For lgc.cps.await, it is the unique await call. CallInst *AwaitedResult = nullptr; }; @@ -513,15 +510,15 @@ struct SpecializeDriverShadersPassImpl { M.getContext())} { HadNonTrivialIncomingTraversalArgsInfo = !TraversalArgsInfo.ArgSlots.empty(); if (ContHelper::isLgcCpsModule(M)) { - // Ignore cont state, return addr, shaderRecIdx - FirstRelevantIncomingArgIdx = 3; - // Ignore: shaderAddr, levels, state, csp, returnAddr, shaderRecIdx - FirstRelevantOutgoingJumpArgIdx = 6; + // Ignore return addr, shaderRecIdx + FirstRelevantIncomingArgIdx = 2; + // Ignore: shaderAddr, levels, csp, returnAddr, shaderRecIdx + FirstRelevantOutgoingJumpArgIdx = 5; } else { // Ignore returnAddr FirstRelevantIncomingArgIdx = 1; - // Ignore: shaderAddr, levels, state, csp, returnAddr - FirstRelevantOutgoingJumpArgIdx = 5; + // Ignore: shaderAddr, levels, csp, returnAddr + FirstRelevantOutgoingJumpArgIdx = 4; } } @@ -627,32 +624,6 @@ struct SpecializeDriverShadersPassImpl { State S{*this}; Visitor.visit(S, M); - - // Also collect legacy awaits. - // Because there can be multiple overloads, we need to collect all functions starting with "await". - for (auto &F : M.functions()) { - if (F.getName().starts_with("await")) { - forEachCall(F, [&](CallInst &AwaitResult) { - Function *ContainingFunc = AwaitResult.getFunction(); - auto *It = ToProcess.find(ContainingFunc); - if (It == ToProcess.end()) - return; // ignore this call - - // Legacy awaits look like this: - // %awaitHandle = call ptr inttoptr (i32 %target to ptr)(args...) - // %awaitResult = call @await(ptr %awaitedResult) - assert(AwaitResult.arg_size() == 1); - auto *AwaitHandle = cast(AwaitResult.getArgOperand(0)); - assert(AwaitHandle->getType()->isPointerTy()); - FunctionData &Data = It->second; - // Legacy awaited calls have only normal args. - // The awaited function is indirectly called, and thus not an arg, - // and the optional wait mask is on metadata. - unsigned FirstRelevantArgIdx = 1; // ignore return address - Data.Awaits.push_back({{AwaitHandle, FirstRelevantArgIdx}, &AwaitResult}); - }); - } - } } const ArgumentLayoutInfo &getOrComputeArgumentLayoutInfo(Type *Ty) { @@ -1092,8 +1063,8 @@ struct SpecializeDriverShadersPassImpl { dbgs() << "[SDS] Specializing function, final args info:\n"; TraversalArgsInfo.printTable(dbgs(), "[SDS] "); }); - unsigned TotalNumToBeReplacedDwords = 0; - unsigned TotalNumReplacedDwords = 0; + [[maybe_unused]] unsigned TotalNumToBeReplacedDwords = 0; + [[maybe_unused]] unsigned TotalNumReplacedDwords = 0; unsigned AccumArgSlotIdx = 0; ValueSpecializer VS{*Func->getParent()}; diff --git a/llvmraytracing/test/dx/cleanup-continuations-malloc.ll b/llvmraytracing/test/dx/cleanup-continuations-malloc.ll index 2528908010..b193b2a50e 100644 --- a/llvmraytracing/test/dx/cleanup-continuations-malloc.ll +++ b/llvmraytracing/test/dx/cleanup-continuations-malloc.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint' -S %s --lint-abort-on-error | FileCheck %s target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" @@ -8,44 +8,60 @@ declare ptr @async_fun(i64, i32) declare void @lgc.cps.jump(...) declare void @lgc.cps.complete() -define <4 x i32> @simple_await(i64 %dummyRet, <4 x i32> %arg) !continuation.registercount !1 { +define <4 x i32> @simple_await(i32 %dummyRet, <4 x i32> %arg) !continuation.registercount !1 { ; CHECK-LABEL: define void @simple_await( -; CHECK-SAME: i64 [[DUMMYRET:%.*]], <4 x i32> [[ARG:%.*]]) !continuation.registercount [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRET:%.*]], <4 x i32> [[ARG:%.*]]) !continuation.registercount [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 24) -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store <4 x i32> [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[DUMMYRET_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: store i64 [[DUMMYRET]], ptr addrspace(32) [[DUMMYRET_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @simple_await.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], 20 +; CHECK-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CHECK-NEXT: store <4 x i32> [[ARG]], ptr addrspace(21) [[TMP3]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP7]], 16 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP5]], i32 0 +; CHECK-NEXT: store i32 [[DUMMYRET]], ptr addrspace(21) [[TMP6]], align 4 +; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @simple_await.resume.0) +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP9]], i32 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CHECK-NEXT: unreachable ; - %callee = ptrtoint ptr @async_fun to i64 - call void (...) @lgc.cps.await__void(i64 %callee, i32 3), !continuation.registercount !1, !continuation.returnedRegistercount !1 - call void (...) @lgc.cps.jump(i64 %dummyRet, i32 -1, {} poison, i64 poison, <4 x i32> %arg), !continuation.registercount !1 + %callee = ptrtoint ptr @async_fun to i32 + call void (...) @lgc.cps.await__void(i32 %callee, i32 3), !continuation.registercount !1, !continuation.returnedRegistercount !1 + call void (...) @lgc.cps.jump(i32 %dummyRet, i32 -1, i32 poison, i32 poison, <4 x i32> %arg), !continuation.registercount !1 unreachable } -define void @simple_await_entry(i64 %dummyRet, <4 x i32> %arg, <4 x i32> addrspace(1)* %mem) !continuation.entry !0 !continuation.registercount !1 { +define void @simple_await_entry(i32 %dummyRet, <4 x i32> %arg, <4 x i32> addrspace(1)* %mem) !continuation.entry !0 !continuation.registercount !1 { ; CHECK-LABEL: define void @simple_await_entry( -; CHECK-SAME: i64 [[DUMMYRET:%.*]], <4 x i32> [[ARG:%.*]], ptr addrspace(1) [[MEM:%.*]]) !continuation.registercount [[META1]] !continuation.entry [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRET:%.*]], <4 x i32> [[ARG:%.*]], ptr addrspace(1) [[MEM:%.*]]) !continuation.registercount [[META1]] !continuation.entry [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.stacksize [[META6:![0-9]+]] !continuation.state [[META6]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 24) -; CHECK-NEXT: [[MEM_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_ENTRY_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: store ptr addrspace(1) [[MEM]], ptr addrspace(32) [[MEM_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_ENTRY_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store <4 x i32> [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @simple_await_entry.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], 24 +; CHECK-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP7]], 16 +; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 +; CHECK-NEXT: store ptr addrspace(1) [[MEM]], ptr addrspace(21) [[TMP4]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP5]], i32 0 +; CHECK-NEXT: store <4 x i32> [[ARG]], ptr addrspace(21) [[TMP6]], align 4 +; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @simple_await_entry.resume.0) +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP9]], i32 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CHECK-NEXT: unreachable ; - %callee = ptrtoint ptr @async_fun to i64 - call void (...) @lgc.cps.await__void(i64 %callee, i32 3), !continuation.registercount !1, !continuation.returnedRegistercount !1 + %callee = ptrtoint ptr @async_fun to i32 + call void (...) @lgc.cps.await__void(i32 %callee, i32 3), !continuation.registercount !1, !continuation.returnedRegistercount !1 store <4 x i32> %arg, <4 x i32> addrspace(1)* %mem call void @lgc.cps.complete(), !continuation.registercount !1 unreachable diff --git a/llvmraytracing/test/dx/cleanup-continuations.ll b/llvmraytracing/test/dx/cleanup-continuations.ll index f13588003e..40e70f0ee6 100644 --- a/llvmraytracing/test/dx/cleanup-continuations.ll +++ b/llvmraytracing/test/dx/cleanup-continuations.ll @@ -1,79 +1,93 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals --version 3 -; RUN: opt --verify-each -passes='dxil-cleanup-continuations,lint,continuations-lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='cleanup-continuations,lint,continuations-lint' -S %s --lint-abort-on-error | FileCheck %s target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" %continuation.token = type { } -%await_with_ret_value.Frame = type { i64 } -%simple_await.Frame = type { i64 } +%await_with_ret_value.Frame = type { i32 } +%simple_await.Frame = type { i32 } %simple_await_entry.Frame = type { } %phi_of_cont_state.Frame = type { i32, i32 } declare %continuation.token* @async_fun() -declare i32 @lgc.ilcps.getReturnValue__i32() #0 +declare { i32 } @lgc.ilcps.getReturnValue__i32() #0 declare void @lgc.cps.complete() declare void @lgc.cps.jump(...) -define { i8*, %continuation.token* } @simple_await(i64 %dummyRet, i8* %0) !continuation !0 !continuation.registercount !4 { +define { i8*, %continuation.token* } @simple_await(i32 %dummyRet, i8* %0) !continuation !0 !continuation.registercount !4 { ; CHECK-LABEL: define void @simple_await( -; CHECK-SAME: i64 [[DUMMYRET:%.*]]) !continuation [[META1:![0-9]+]] !continuation.registercount [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRET:%.*]]) !continuation [[META1:![0-9]+]] !continuation.registercount [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CHECK-NEXT: [[FRAMEPTR:%.*]] = bitcast ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]] to ptr addrspace(32) -; CHECK-NEXT: [[DOTSPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME:%.*]], ptr addrspace(32) [[FRAMEPTR]], i32 0, i32 0 -; CHECK-NEXT: store i64 -1, ptr addrspace(32) [[DOTSPILL_ADDR]], align 4 -; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CHECK-NEXT: [[TMP0:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @simple_await.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP0]], i64 2), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP4]], 8 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CHECK-NEXT: store i32 -1, ptr addrspace(21) [[TMP3]], align 4 +; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CHECK-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @simple_await.resume.0) +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP5]], i32 [[TMP0]], i64 2), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] ; CHECK-NEXT: unreachable ; AllocaSpillBB: %FramePtr = bitcast i8* %0 to %simple_await.Frame* %.spill.addr = getelementptr inbounds %simple_await.Frame, %simple_await.Frame* %FramePtr, i32 0, i32 0 - store i64 -1, i64* %.spill.addr, align 4 - %callee = ptrtoint ptr @async_fun to i64 - %tok = call %continuation.token* @async_fun(i64 %callee, i64 1, i64 2), !continuation.registercount !4, !continuation.returnedRegistercount !4 + store i32 -1, i32* %.spill.addr, align 4 + %callee = ptrtoint ptr @async_fun to i32 + %tok = call %continuation.token* @async_fun(i32 %callee, i64 1, i64 2), !continuation.registercount !4, !continuation.returnedRegistercount !4 %1 = insertvalue { i8*, %continuation.token* } { i8* bitcast ({ i8*, %continuation.token* } (i8*, i1)* @simple_await.resume.0 to i8*), %continuation.token* undef }, %continuation.token* %tok, 1 ret { i8*, %continuation.token* } %1 } define internal { i8*, %continuation.token* } @simple_await.resume.0(i8* noalias nonnull align 16 dereferenceable(8) %0, i1 %1) !continuation !0 { ; CHECK-LABEL: define dso_local void @simple_await.resume.0( -; CHECK-SAME: i64 [[TMP0:%.*]]) !continuation [[META1]] !continuation.registercount [[META2]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]]) !continuation [[META1]] !continuation.registercount [[META2]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CHECK-NEXT: [[FRAMEPTR:%.*]] = bitcast ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]] to ptr addrspace(32) -; CHECK-NEXT: [[VFRAME:%.*]] = bitcast ptr addrspace(32) [[FRAMEPTR]] to ptr addrspace(32) -; CHECK-NEXT: [[DOTRELOAD_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME:%.*]], ptr addrspace(32) [[FRAMEPTR]], i32 0, i32 0 -; CHECK-NEXT: [[DOTRELOAD:%.*]] = load i64, ptr addrspace(32) [[DOTRELOAD_ADDR]], align 4 -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[DOTRELOAD]], i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount [[META2]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], -8 +; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 +; CHECK-NEXT: [[DOTRELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP4]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], -8 +; CHECK-NEXT: store i32 [[TMP6]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTRELOAD]], i32 -1, i32 [[TMP7]], i32 poison), !continuation.registercount [[META2]] ; CHECK-NEXT: unreachable ; entryresume.0: %FramePtr = bitcast i8* %0 to %simple_await.Frame* %vFrame = bitcast %simple_await.Frame* %FramePtr to i8* %.reload.addr = getelementptr inbounds %simple_await.Frame, %simple_await.Frame* %FramePtr, i32 0, i32 0 - %.reload = load i64, i64* %.reload.addr, align 4 - call void (...) @lgc.cps.jump(i64 %.reload, i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount !4 + %.reload = load i32, i32* %.reload.addr, align 4 + call void (...) @lgc.cps.jump(i32 %.reload, i32 -1, i32 poison, i32 poison), !continuation.registercount !4 unreachable } -define { i8*, %continuation.token* } @simple_await_entry(i64 %dummyRet, i8* %0) !continuation.entry !2 !continuation !3 !continuation.registercount !4 { +define { i8*, %continuation.token* } @simple_await_entry(i32 %dummyRet, i8* %0) !continuation.entry !2 !continuation !3 !continuation.registercount !4 { ; CHECK-LABEL: define void @simple_await_entry( -; CHECK-SAME: i64 [[DUMMYRET:%.*]]) !continuation [[META4:![0-9]+]] !continuation.registercount [[META2]] !continuation.entry [[META5:![0-9]+]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRET:%.*]]) !continuation [[META4:![0-9]+]] !continuation.registercount [[META2]] !continuation.entry [[META5:![0-9]+]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CHECK-NEXT: [[FRAMEPTR:%.*]] = bitcast ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]] to ptr addrspace(32) -; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CHECK-NEXT: [[TMP0:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @simple_await_entry.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP0]], i64 2), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP2]], 8 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CHECK-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @simple_await_entry.resume.0) +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP3]], i32 [[TMP0]], i64 2), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] ; CHECK-NEXT: unreachable ; AllocaSpillBB: %FramePtr = bitcast i8* %0 to %simple_await_entry.Frame* - %callee = ptrtoint ptr @async_fun to i64 - %tok = call %continuation.token* @async_fun(i64 %callee, i64 1, i64 2), !continuation.registercount !4, !continuation.returnedRegistercount !4 + %callee = ptrtoint ptr @async_fun to i32 + %tok = call %continuation.token* @async_fun(i32 %callee, i64 1, i64 2), !continuation.registercount !4, !continuation.returnedRegistercount !4 %1 = bitcast { i8*, %continuation.token* } (i8*, i1)* @simple_await_entry.resume.0 to i8* %2 = insertvalue { i8*, %continuation.token* } undef, i8* %1, 0 %3 = insertvalue { i8*, %continuation.token* } %2, %continuation.token* %tok, 1 @@ -82,12 +96,15 @@ AllocaSpillBB: define internal { i8*, %continuation.token* } @simple_await_entry.resume.0(i8* noalias nonnull align 16 dereferenceable(8) %0, i1 %1) !continuation.entry !2 !continuation !3 { ; CHECK-LABEL: define dso_local void @simple_await_entry.resume.0( -; CHECK-SAME: i64 [[TMP0:%.*]]) !continuation [[META4]] !continuation.registercount [[META2]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]]) !continuation [[META4]] !continuation.registercount [[META2]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CHECK-NEXT: [[FRAMEPTR:%.*]] = bitcast ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]] to ptr addrspace(32) -; CHECK-NEXT: [[VFRAME:%.*]] = bitcast ptr addrspace(32) [[FRAMEPTR]] to ptr addrspace(32) -; CHECK-NEXT: call void @lgc.cps.free(i32 8) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], -8 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -8 +; CHECK-NEXT: store i32 [[TMP4]], ptr [[CSP]], align 4 ; CHECK-NEXT: ret void ; entryresume.0: @@ -97,77 +114,97 @@ entryresume.0: unreachable } -define { i8*, %continuation.token* } @await_with_ret_value(i64 %dummyRet, i8* %0) !continuation !1 !continuation.registercount !4 { +define { i8*, %continuation.token* } @await_with_ret_value(i32 %dummyRet, i8* %0) !continuation !1 !continuation.registercount !4 { ; CHECK-LABEL: define void @await_with_ret_value( -; CHECK-SAME: i64 [[DUMMYRET:%.*]]) !continuation [[META6:![0-9]+]] !continuation.registercount [[META2]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CHECK-NEXT: [[FRAMEPTR:%.*]] = bitcast ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]] to ptr addrspace(32) -; CHECK-NEXT: [[DOTSPILL_ADDR:%.*]] = getelementptr inbounds [[AWAIT_WITH_RET_VALUE_FRAME:%.*]], ptr addrspace(32) [[FRAMEPTR]], i32 0, i32 0 -; CHECK-NEXT: store i64 -1, ptr addrspace(32) [[DOTSPILL_ADDR]], align 4 -; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CHECK-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @await_with_ret_value.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]], i64 2), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRET:%.*]]) !continuation [[META6:![0-9]+]] !continuation.registercount [[META2]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP5]], 8 +; CHECK-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 +; CHECK-NEXT: store i64 -1, ptr addrspace(21) [[TMP4]], align 4 +; CHECK-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @await_with_ret_value.resume.0) +; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP6]], i32 [[TMP1]], i64 2), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] ; CHECK-NEXT: unreachable ; %FramePtr = bitcast i8* %0 to %await_with_ret_value.Frame* %.spill.addr = getelementptr inbounds %await_with_ret_value.Frame, %await_with_ret_value.Frame* %FramePtr, i32 0, i32 0 store i64 -1, i64* %.spill.addr, align 4 - %callee = ptrtoint ptr @async_fun to i64 - %tok = call %continuation.token* @async_fun(i64 %callee, i64 1, i64 2), !continuation.registercount !4, !continuation.returnedRegistercount !4 + %callee = ptrtoint ptr @async_fun to i32 + %tok = call %continuation.token* @async_fun(i32 %callee, i64 1, i64 2), !continuation.registercount !4, !continuation.returnedRegistercount !4 %res = insertvalue { i8*, %continuation.token* } { i8* bitcast ({ i8*, %continuation.token* } (i8*, i1)* @await_with_ret_value.resume.0 to i8*), %continuation.token* undef }, %continuation.token* %tok, 1 ret { i8*, %continuation.token* } %res } define internal { i8*, %continuation.token* } @await_with_ret_value.resume.0(i8* noalias nonnull align 16 dereferenceable(8) %0, i1 %1) !continuation !1 { ; CHECK-LABEL: define dso_local void @await_with_ret_value.resume.0( -; CHECK-SAME: i64 [[TMP0:%.*]], i32 [[RES1:%.*]]) !continuation [[META6]] !continuation.registercount [[META2]] { -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CHECK-NEXT: [[FRAMEPTR:%.*]] = bitcast ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]] to ptr addrspace(32) -; CHECK-NEXT: [[VFRAME:%.*]] = bitcast ptr addrspace(32) [[FRAMEPTR]] to ptr addrspace(32) -; CHECK-NEXT: [[DOTRELOAD_ADDR:%.*]] = getelementptr inbounds [[AWAIT_WITH_RET_VALUE_FRAME:%.*]], ptr addrspace(32) [[FRAMEPTR]], i32 0, i32 0 -; CHECK-NEXT: [[DOTRELOAD:%.*]] = load i64, ptr addrspace(32) [[DOTRELOAD_ADDR]], align 4 -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[DOTRELOAD]], i32 -1, {} poison, i32 poison, i64 poison, i32 [[RES1]]), !continuation.registercount [[META2]] +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) !continuation [[META6]] !continuation.registercount [[META2]] { +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], -8 +; CHECK-NEXT: [[TMP9:%.*]] = insertvalue { i32 } poison, i32 [[TMP1]], 0 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 +; CHECK-NEXT: [[DOTRELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP5]], align 4 +; CHECK-NEXT: [[RES_2:%.*]] = extractvalue { i32 } [[TMP9]], 0 +; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], -8 +; CHECK-NEXT: store i32 [[TMP7]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTRELOAD]], i32 -1, i32 [[TMP8]], i32 poison, i32 [[RES_2]]), !continuation.registercount [[META2]] ; CHECK-NEXT: unreachable ; %FramePtr = bitcast i8* %0 to %await_with_ret_value.Frame* %vFrame = bitcast %await_with_ret_value.Frame* %FramePtr to i8* %.reload.addr = getelementptr inbounds %await_with_ret_value.Frame, %await_with_ret_value.Frame* %FramePtr, i32 0, i32 0 - %.reload = load i64, i64* %.reload.addr, align 4 - %res = call i32 @lgc.ilcps.getReturnValue__i32() - call void (...) @lgc.cps.jump(i64 %.reload, i32 -1, {} poison, i32 poison, i64 poison, i32 %res), !continuation.registercount !4 + %.reload = load i32, i32* %.reload.addr, align 4 + %res = call { i32 } @lgc.ilcps.getReturnValue__i32() + %res.2 = extractvalue { i32 } %res, 0 + call void (...) @lgc.cps.jump(i32 %.reload, i32 -1, i32 poison, i32 poison, i32 %res.2), !continuation.registercount !4 unreachable } ; unreachables in their own block added by switch case statements should be ignored -define { i8*, %continuation.token* } @switch_case_unreachable(i64 %dummyRet, i8* %0) !continuation !6 !continuation.registercount !4 { +define { i8*, %continuation.token* } @switch_case_unreachable(i32 %dummyRet, i8* %0) !continuation !6 !continuation.registercount !4 { ; CHECK-LABEL: define void @switch_case_unreachable( -; CHECK-SAME: i64 [[DUMMYRET:%.*]]) !continuation [[META7:![0-9]+]] !continuation.registercount [[META2]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CHECK-NEXT: [[FRAMEPTR:%.*]] = bitcast ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]] to ptr addrspace(32) -; CHECK-NEXT: [[DOTSPILL_ADDR:%.*]] = getelementptr inbounds [[AWAIT_WITH_RET_VALUE_FRAME:%.*]], ptr addrspace(32) [[FRAMEPTR]], i32 0, i32 0 -; CHECK-NEXT: store i64 -1, ptr addrspace(32) [[DOTSPILL_ADDR]], align 4 -; CHECK-NEXT: [[VAL:%.*]] = urem i64 [[DUMMYRET]], 2 -; CHECK-NEXT: switch i64 [[VAL]], label [[UNREACHABLE:%.*]] [ -; CHECK-NEXT: i64 0, label [[A:%.*]] -; CHECK-NEXT: i64 1, label [[B:%.*]] +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRET:%.*]]) !continuation [[META7:![0-9]+]] !continuation.registercount [[META2]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 8 +; CHECK-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 +; CHECK-NEXT: store i64 -1, ptr addrspace(21) [[TMP4]], align 4 +; CHECK-NEXT: [[VAL:%.*]] = urem i32 [[DUMMYRET]], 2 +; CHECK-NEXT: switch i32 [[VAL]], label [[UNREACHABLE:%.*]] [ +; CHECK-NEXT: i32 0, label [[A:%.*]] +; CHECK-NEXT: i32 1, label [[B:%.*]] ; CHECK-NEXT: ] ; CHECK: unreachable: ; CHECK-NEXT: unreachable ; CHECK: b: ; CHECK-NEXT: br label [[A]] ; CHECK: a: -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[DUMMYRET]], i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount [[META2]] +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], -8 +; CHECK-NEXT: store i32 [[TMP6]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[DUMMYRET]], i32 -1, i32 [[TMP7]], i32 poison), !continuation.registercount [[META2]] ; CHECK-NEXT: unreachable ; %FramePtr = bitcast i8* %0 to %await_with_ret_value.Frame* %.spill.addr = getelementptr inbounds %await_with_ret_value.Frame, %await_with_ret_value.Frame* %FramePtr, i32 0, i32 0 store i64 -1, i64* %.spill.addr, align 4 - %val = urem i64 %dummyRet, 2 - switch i64 %val, label %unreachable [ - i64 0, label %a - i64 1, label %b + %val = urem i32 %dummyRet, 2 + switch i32 %val, label %unreachable [ + i32 0, label %a + i32 1, label %b ] unreachable: @@ -177,31 +214,39 @@ b: br label %a a: - call void (...) @lgc.cps.jump(i64 %dummyRet, i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount !4 + call void (...) @lgc.cps.jump(i32 %dummyRet, i32 -1, i32 poison, i32 poison), !continuation.registercount !4 unreachable } ; Check that phis on the continuation state compile -define { i8*, %continuation.token* } @phi_of_cont_state(i64 %dummyRet, ptr %FramePtr) !continuation !7 !continuation.registercount !4 { +define { i8*, %continuation.token* } @phi_of_cont_state(i32 %dummyRet, ptr %FramePtr) !continuation !7 !continuation.registercount !4 { ; CHECK-LABEL: define void @phi_of_cont_state( -; CHECK-SAME: i64 [[DUMMYRET:%.*]]) !continuation [[META8:![0-9]+]] !continuation.registercount [[META2]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CHECK-NEXT: [[COND:%.*]] = trunc i64 [[DUMMYRET]] to i1 +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRET:%.*]]) !continuation [[META8:![0-9]+]] !continuation.registercount [[META2]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 8 +; CHECK-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[COND:%.*]] = trunc i32 [[DUMMYRET]] to i1 ; CHECK-NEXT: br i1 [[COND]], label [[LA:%.*]], label [[LB:%.*]] ; CHECK: la: -; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[PHI_OF_CONT_STATE_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 ; CHECK-NEXT: br label [[END:%.*]] ; CHECK: lb: -; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds [[PHI_OF_CONT_STATE_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP1]], 4 ; CHECK-NEXT: br label [[END]] ; CHECK: end: -; CHECK-NEXT: [[C:%.*]] = phi ptr addrspace(32) [ [[A]], [[LA]] ], [ [[B]], [[LB]] ] -; CHECK-NEXT: store i64 -1, ptr addrspace(32) [[C]], align 4 -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[DUMMYRET]], i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount [[META2]] +; CHECK-NEXT: [[C_0:%.*]] = phi i32 [ [[TMP1]], [[LA]] ], [ [[TMP3]], [[LB]] ] +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i32 [[C_0]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 +; CHECK-NEXT: store i32 -1, ptr addrspace(21) [[TMP5]], align 4 +; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], -8 +; CHECK-NEXT: store i32 [[TMP7]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[DUMMYRET]], i32 -1, i32 [[TMP8]], i32 poison), !continuation.registercount [[META2]] ; CHECK-NEXT: unreachable ; - %cond = trunc i64 %dummyRet to i1 + %cond = trunc i32 %dummyRet to i1 br i1 %cond, label %la, label %lb la: @@ -214,8 +259,8 @@ lb: end: %c = phi ptr [ %a, %la ], [ %b, %lb ] - store i64 -1, ptr %c, align 4 - call void (...) @lgc.cps.jump(i64 %dummyRet, i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount !4 + store i32 -1, ptr %c, align 4 + call void (...) @lgc.cps.jump(i32 %dummyRet, i32 -1, i32 poison, i32 poison), !continuation.registercount !4 unreachable } diff --git a/llvmraytracing/test/dx/closest-hit-procedural.ll b/llvmraytracing/test/dx/closest-hit-procedural.ll deleted file mode 100644 index db20264f2e..0000000000 --- a/llvmraytracing/test/dx/closest-hit-procedural.ll +++ /dev/null @@ -1,300 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS %s - -; Check a procedural closest hit shader with hit attributes that does not fit into system data alone - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float } -%struct.HitData = type { float, i32 } -%struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } -%struct.RayPayload = type { <4 x float> } -%struct.HitAttributes = type { <4 x float> } -%dx.types.ResourceProperties = type { i32, i32 } -%struct.RaytracingAccelerationStructure = type { i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?Scene@@3URaytracingAccelerationStructure@@A" = external constant %dx.types.Handle, align 4 -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i64 @_cont_GetTraversalAddr() #0 - -declare i32 @_cont_GetContinuationStackAddr() #0 - -declare !pointeetys !15 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #0 - -declare !pointeetys !17 void @_cont_SetTriangleHitAttributes(%struct.SystemData*, %struct.BuiltInTriangleIntersectionAttributes) #0 - -declare !pointeetys !18 i1 @_cont_IsEndSearch(%struct.TraversalData*) #0 - -declare %struct.DispatchSystemData @_cont_Traversal(%struct.TraversalData) #0 - -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #0 - -declare !pointeetys !20 %struct.HitData @_cont_GetCandidateState(%struct.AnyHitTraversalData*) #0 - -declare !pointeetys !22 %struct.HitData @_cont_GetCommittedState(%struct.SystemData*) #0 - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) #0 !pointeetys !23 { -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 5 -; -; DXILCONTPOSTPROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: ret i32 5 -; - ret i32 5 -} - -define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) #0 !pointeetys !25 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 - %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %newdata = call %struct.DispatchSystemData @_cont_Traversal(%struct.TraversalData %trav_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - ret void -} - -define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) #0 !pointeetys !26 { - %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) - store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 - ret i1 true -} - -; Function Attrs: nounwind memory(none) -declare !pointeetys !27 i32 @_cont_DispatchRaysIndex(%struct.DispatchSystemData* nocapture readnone, i32) #1 - -declare !pointeetys !27 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -; Function Attrs: nounwind memory(none) -declare !pointeetys !27 i32 @_cont_DispatchRaysDimensions(%struct.DispatchSystemData* nocapture readnone, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !28 float @_cont_WorldRayOrigin(%struct.DispatchSystemData* nocapture readnone, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !28 float @_cont_WorldRayDirection(%struct.DispatchSystemData* nocapture readnone, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !29 float @_cont_RayTMin(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(read) -declare !pointeetys !30 float @_cont_RayTCurrent(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !23 i32 @_cont_RayFlags(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !32 i32 @_cont_InstanceIndex(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !32 i32 @_cont_InstanceID(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !32 i32 @_cont_PrimitiveIndex(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !33 float @_cont_ObjectRayOrigin(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !33 float @_cont_ObjectRayDirection(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !34 float @_cont_ObjectToWorld(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !34 float @_cont_WorldToObject(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !35 i32 @_cont_HitKind(%struct.SystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind -define void @ClosestHit(%struct.RayPayload* noalias nocapture %payload, %struct.HitAttributes* nocapture readonly %attr) #3 !pointeetys !36 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @ClosestHit( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR4:[0-9]+]] !lgc.rt.shaderstage [[META19:![0-9]+]] !continuation [[META20:![0-9]+]] !continuation.registercount [[META16:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[HITATTRS:%.*]] = alloca [[STRUCT_HITATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [10 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP6]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP10]], ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP13]], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP16]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD_ATTR_MAX_8_I32S_LAYOUT_3_CLOSESTHIT_IN_PAYLOAD_ATTR_2_I32S:%.*]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP22]], ptr [[HITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP24]], ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP30]], ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[TMP19]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP26]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP27]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP33]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr [[TMP27]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP31]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP35]], ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[TMP31]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = load i32, ptr [[TMP34]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP42]], ptr [[TMP32]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, ptr [[TMP31]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP37]], ptr [[TMP41]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP38]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP39]], [19 x i32] poison, [10 x i32] [[TMP40]]), !continuation.registercount [[META16]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; DXILCONTPOSTPROCESS-LABEL: define void @ClosestHit( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR1:[0-9]+]] !lgc.rt.shaderstage [[META18:![0-9]+]] !continuation [[META19:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <3 x i32> [[DOTFCA_0_0_EXTRACT]], ptr [[DOTFCA_0_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP2]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_09_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = bitcast float [[DOTSROA_09_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_09_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast float [[DOTSROA_09_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP5]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT7:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP6]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT7]], [19 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; - ret void -} - -; Function Attrs: nounwind memory(read) -declare !pointeetys !39 void @dx.op.traceRay.struct.RayPayload(i32, %dx.types.Handle, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, %struct.RayPayload*) #2 - -; Function Attrs: nounwind memory(none) -declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types.ResourceProperties) #1 - -declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) - -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) -declare !pointeetys !40 void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #4 - -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) -declare !pointeetys !40 void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #4 - -attributes #0 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind memory(none) } -attributes #2 = { nounwind memory(read) } -attributes #3 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #4 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.resources = !{!3} -!dx.typeAnnotations = !{} -!dx.entryPoints = !{!10, !12} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{!4, !7, null, null} -!4 = !{!5} -!5 = !{i32 0, %struct.RaytracingAccelerationStructure* bitcast (%dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A" to %struct.RaytracingAccelerationStructure*), !"Scene", i32 0, i32 0, i32 1, i32 16, i32 0, !6} -!6 = !{i32 0, i32 4} -!7 = !{!8} -!8 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !9} -!9 = !{i32 0, i32 9} -!10 = !{null, !"", null, !3, !11} -!11 = !{i32 0, i64 65536} -!12 = !{void (%struct.RayPayload*, %struct.HitAttributes*)* @ClosestHit, !"ClosestHit", null, null, !13} -!13 = !{i32 8, i32 10, i32 5, !14} -!14 = !{i32 0} -!15 = !{%struct.SystemData poison} -!16 = !{i32 0, %struct.SystemData poison} -!17 = !{%struct.SystemData poison} -!18 = !{%struct.TraversalData poison} -!19 = !{i32 0, %struct.TraversalData poison} -!20 = !{%struct.AnyHitTraversalData poison} -!21 = !{i32 0, %struct.AnyHitTraversalData poison} -!22 = !{%struct.SystemData poison} -!23 = !{%struct.DispatchSystemData poison} -!24 = !{i32 0, %struct.DispatchSystemData poison} -!25 = !{%struct.DispatchSystemData poison} -!26 = !{%struct.AnyHitTraversalData poison} -!27 = !{%struct.DispatchSystemData poison} -!28 = !{%struct.DispatchSystemData poison} -!29 = !{%struct.DispatchSystemData poison} -!30 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!31 = !{i32 0, %struct.HitData poison} -!32 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!33 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!34 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!35 = !{null, %struct.SystemData poison, %struct.HitData poison} -!36 = !{null, %struct.RayPayload poison, %struct.HitAttributes poison} -!37 = !{i32 0, %struct.RayPayload poison} -!38 = !{i32 0, %struct.HitAttributes poison} -!39 = !{%struct.RayPayload poison} -!40 = !{i8 poison} -!41 = !{i32 0, i8 poison} diff --git a/llvmraytracing/test/dx/closest-hit-traceray.ll b/llvmraytracing/test/dx/closest-hit-traceray.ll deleted file mode 100644 index f0180e5b27..0000000000 --- a/llvmraytracing/test/dx/closest-hit-traceray.ll +++ /dev/null @@ -1,380 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float } -%struct.HitData = type { float, i32 } -%struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } -%struct.RayPayload = type { <4 x float> } -%dx.types.ResourceProperties = type { i32, i32 } -%struct.RaytracingAccelerationStructure = type { i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?Scene@@3URaytracingAccelerationStructure@@A" = external constant %dx.types.Handle, align 4 -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i64 @_cont_GetTraversalAddr() #0 - -declare i32 @_cont_GetContinuationStackAddr() #0 - -declare !pointeetys !15 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #0 - -declare !pointeetys !17 void @_cont_SetTriangleHitAttributes(%struct.SystemData*, %struct.BuiltInTriangleIntersectionAttributes) #0 - -declare !pointeetys !18 i1 @_cont_IsEndSearch(%struct.TraversalData*) #0 - -declare %struct.DispatchSystemData @amd.dx.Traversal(%struct.TraversalData) #0 - -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #0 - -declare !pointeetys !20 %struct.HitData @_cont_GetCandidateState(%struct.AnyHitTraversalData*) #0 - -declare !pointeetys !22 %struct.HitData @_cont_GetCommittedState(%struct.SystemData*) #0 - -declare !pointeetys !23 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) #0 !pointeetys !23 { -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 5 -; -; DXILCONTPOSTPROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: ret i32 5 -; - ret i32 5 -} - -define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) #0 !pointeetys !25 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 - %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %newdata = call %struct.DispatchSystemData @amd.dx.Traversal(%struct.TraversalData %trav_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - ret void -} - -define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) #0 !pointeetys !26 { - %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) - store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 - ret i1 true -} - -; Function Attrs: nounwind memory(none) -declare !pointeetys !27 i32 @_cont_DispatchRaysIndex(%struct.DispatchSystemData* nocapture readnone, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !27 i32 @_cont_DispatchRaysDimensions(%struct.DispatchSystemData* nocapture readnone, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !28 float @_cont_WorldRayOrigin(%struct.DispatchSystemData* nocapture readnone, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !28 float @_cont_WorldRayDirection(%struct.DispatchSystemData* nocapture readnone, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !29 float @_cont_RayTMin(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(read) -declare !pointeetys !30 float @_cont_RayTCurrent(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !23 i32 @_cont_RayFlags(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !32 i32 @_cont_InstanceIndex(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !32 i32 @_cont_InstanceID(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !32 i32 @_cont_PrimitiveIndex(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !33 float @_cont_ObjectRayOrigin(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !33 float @_cont_ObjectRayDirection(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !34 float @_cont_ObjectToWorld(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !34 float @_cont_WorldToObject(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32, i32) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !35 i32 @_cont_HitKind(%struct.SystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind -define void @ClosestHit(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readonly %attr) #3 !pointeetys !36 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @ClosestHit( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR5:[0-9]+]] !continuation [[META18:![0-9]+]] !lgc.rt.shaderstage [[META19:![0-9]+]] !continuation.registercount [[META16:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[HITATTRS:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [10 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP8]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP11]], ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP13]], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP16]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP17]], ptr [[HITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP22]], ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = alloca [[STRUCT_RAYPAYLOAD]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = bitcast ptr [[TMP31]] to ptr -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP32]]) #[[ATTR10:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP31]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> zeroinitializer, ptr [[TMP33]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP29]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP26]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP35]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[NEWDATA_I:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] @[[AMD_DX_TRAVERSAL:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]]([[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[NEWDATA_I]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = load i32, ptr [[TMP45]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP46]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr [[TMP45]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP48]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP34]], ptr [[TMP47]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP49:%.*]] = getelementptr inbounds i32, ptr [[TMP47]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = getelementptr inbounds i32, ptr [[TMP48]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = load i32, ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP40]], ptr [[TMP49]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[TMP47]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = getelementptr inbounds i32, ptr [[TMP48]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = load i32, ptr [[TMP41]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP42]], ptr [[TMP38]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP43]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP50:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP44]], [19 x i32] poison, [10 x i32] [[TMP50]]), !continuation.registercount [[META16]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; DXILCONTPOSTPROCESS-LABEL: define void @ClosestHit( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR2:[0-9]+]] !continuation [[META18:![0-9]+]] !lgc.rt.shaderstage [[META19:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <3 x i32> [[DOTFCA_0_0_EXTRACT]], ptr [[DOTFCA_0_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP2]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_08_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = bitcast float [[DOTSROA_08_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_08_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast float [[DOTSROA_08_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP5]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP7]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP8]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DIS_DATA_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP10]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DIS_DATA_I_FCA_0_LOAD:%.*]] = load <3 x i32>, ptr [[DIS_DATA_I_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DIS_DATA_I_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[NEWDATA_I:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] @[[AMD_DX_TRAVERSAL:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]]([[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]]) -; DXILCONTPOSTPROCESS-NEXT: [[NEWDATA_I_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[NEWDATA_I]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[NEWDATA_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP10]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <3 x i32> [[NEWDATA_I_FCA_0_EXTRACT]], ptr [[NEWDATA_I_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP11]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT6:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP12]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT6]], [19 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; - %1 = load %dx.types.Handle, %dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 - %2 = load %dx.types.Handle, %dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 - %3 = alloca %struct.RayPayload, align 4 - %4 = bitcast %struct.RayPayload* %3 to i8* - call void @llvm.lifetime.start.p0i8(i64 16, i8* %4) #2 - %5 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %3, i32 0, i32 0 - store <4 x float> zeroinitializer, <4 x float>* %5, align 4 - %6 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %1) - %7 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %6, %dx.types.ResourceProperties { i32 16, i32 0 }) - call void @dx.op.traceRay.struct.RayPayload(i32 157, %dx.types.Handle %7, i32 16, i32 -1, i32 0, i32 1, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0x3F50624DE0000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+04, %struct.RayPayload* nonnull %3) - ret void -} - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysDimensions.i32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysIndex.i32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayDirection.f32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayOrigin.f32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.worldRayDirection.f32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.worldRayOrigin.f32(i32, i8) #1 - -; Function Attrs: nounwind memory(read) -declare float @dx.op.rayTCurrent.f32(i32) #2 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.rayTMin.f32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.hitKind.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.primitiveIndex.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.instanceID.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.instanceIndex.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.rayFlags.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.worldToObject.f32(i32, i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectToWorld.f32(i32, i32, i8) #1 - -; Function Attrs: nounwind -declare !pointeetys !39 i1 @dx.op.reportHit.struct.BuiltInTriangleIntersectionAttributes(i32, float, i32, %struct.BuiltInTriangleIntersectionAttributes*) #4 - -; Function Attrs: nounwind memory(read) -declare !pointeetys !40 void @dx.op.traceRay.struct.RayPayload(i32, %dx.types.Handle, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, %struct.RayPayload*) #2 - -; Function Attrs: nounwind memory(none) -declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types.ResourceProperties) #1 - -declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) - -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) -declare !pointeetys !41 void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #5 - -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) -declare !pointeetys !41 void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #5 - -attributes #0 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind memory(none) } -attributes #2 = { nounwind memory(read) } -attributes #3 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #4 = { nounwind } -attributes #5 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.resources = !{!3} -!dx.typeAnnotations = !{} -!dx.entryPoints = !{!10, !12} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{!4, !7, null, null} -!4 = !{!5} -!5 = !{i32 0, %struct.RaytracingAccelerationStructure* bitcast (%dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A" to %struct.RaytracingAccelerationStructure*), !"Scene", i32 0, i32 0, i32 1, i32 16, i32 0, !6} -!6 = !{i32 0, i32 4} -!7 = !{!8} -!8 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !9} -!9 = !{i32 0, i32 9} -!10 = !{null, !"", null, !3, !11} -!11 = !{i32 0, i64 65536} -!12 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @ClosestHit, !"ClosestHit", null, null, !13} -!13 = !{i32 8, i32 10, i32 5, !14} -!14 = !{i32 0} -!15 = !{%struct.SystemData poison} -!16 = !{i32 0, %struct.SystemData poison} -!17 = !{%struct.SystemData poison} -!18 = !{%struct.TraversalData poison} -!19 = !{i32 0, %struct.TraversalData poison} -!20 = !{%struct.AnyHitTraversalData poison} -!21 = !{i32 0, %struct.AnyHitTraversalData poison} -!22 = !{%struct.SystemData poison} -!23 = !{%struct.DispatchSystemData poison} -!24 = !{i32 0, %struct.DispatchSystemData poison} -!25 = !{%struct.DispatchSystemData poison} -!26 = !{%struct.AnyHitTraversalData poison} -!27 = !{%struct.DispatchSystemData poison} -!28 = !{%struct.DispatchSystemData poison} -!29 = !{%struct.DispatchSystemData poison} -!30 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!31 = !{i32 0, %struct.HitData poison} -!32 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!33 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!34 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!35 = !{null, %struct.SystemData poison, %struct.HitData poison} -!36 = !{null, %struct.RayPayload poison, %struct.BuiltInTriangleIntersectionAttributes poison} -!37 = !{i32 0, %struct.RayPayload poison} -!38 = !{i32 0, %struct.BuiltInTriangleIntersectionAttributes poison} -!39 = !{%struct.BuiltInTriangleIntersectionAttributes poison} -!40 = !{%struct.RayPayload poison} -!41 = !{i8 poison} -!42 = !{i32 0, i8 poison} diff --git a/llvmraytracing/test/dx/closest-hit.ll b/llvmraytracing/test/dx/closest-hit.ll index d5246fbee9..f6fe484f10 100644 --- a/llvmraytracing/test/dx/closest-hit.ll +++ b/llvmraytracing/test/dx/closest-hit.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" @@ -23,7 +23,7 @@ declare !pointeetys !12 i1 @_cont_IsEndSearch(%struct.TraversalData*) #0 declare %struct.DispatchSystemData @_cont_Traversal(%struct.TraversalData) #0 -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #0 +declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32, %struct.AnyHitTraversalData, float, i32) #0 declare !pointeetys !14 %struct.HitData @_cont_GetCandidateState(%struct.AnyHitTraversalData*) #0 @@ -50,7 +50,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) #0 !pointeetys !20 { %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) + %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32 3, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 ret i1 true } @@ -102,8 +102,8 @@ declare !pointeetys !29 i32 @_cont_HitKind(%struct.SystemData* nocapture readnon ; Function Attrs: nounwind define void @ClosestHit(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readonly %attr) #3 !pointeetys !30 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @ClosestHit( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [8 x i32] [[PAYLOAD:%.*]]) #[[ATTR4:[0-9]+]] !lgc.rt.shaderstage [[META13:![0-9]+]] !continuation [[META14:![0-9]+]] !continuation.registercount [[META10:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-LABEL: define void @ClosestHit( +; LOWERRAYTRACINGPIPELINE-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [8 x i32] [[PAYLOAD:%.*]]) #[[ATTR5:[0-9]+]] !lgc.rt.shaderstage [[META13:![0-9]+]] !continuation [[META14:![0-9]+]] !continuation.registercount [[META10:![0-9]+]] { ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [8 x i32], align 4 @@ -142,7 +142,7 @@ define void @ClosestHit(%struct.RayPayload* noalias nocapture %payload, %struct. ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP26]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = load [8 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP27]], [19 x i32] poison, [8 x i32] [[TMP24]]), !continuation.registercount [[META10]] +; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP27]], [19 x i32] poison, [8 x i32] [[TMP24]]), !continuation.registercount [[META10]] ; LOWERRAYTRACINGPIPELINE-NEXT: unreachable ; %ptr = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %payload, i32 0, i32 0 diff --git a/llvmraytracing/test/dx/continuation-registercount.ll b/llvmraytracing/test/dx/continuation-registercount.ll index 92953103d4..8bb51b44d8 100644 --- a/llvmraytracing/test/dx/continuation-registercount.ll +++ b/llvmraytracing/test/dx/continuation-registercount.ll @@ -1,9 +1,10 @@ +; NOTE: Do not autogenerate ; RUN: grep -v MAX_REG_10 %s | \ -; RUN: opt --verify-each --report-payload-register-sizes=byjump -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,continuations-stats-report,remove-types-metadata' -S --lint-abort-on-error 2>&1 | \ +; RUN: opt --verify-each --report-payload-register-sizes=byjump -passes='dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint,continuations-stats-report,remove-types-metadata' -S --lint-abort-on-error 2>&1 | \ ; RUN: FileCheck -check-prefixes=COMMON,MAX30 %s ; ; RUN: grep -v MAX_REG_30 %s | \ -; RUN: opt --verify-each --report-payload-register-sizes=byjump -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,continuations-stats-report,remove-types-metadata' -S --lint-abort-on-error 2>&1 | \ +; RUN: opt --verify-each --report-payload-register-sizes=byjump -passes='dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint,continuations-stats-report,remove-types-metadata' -S --lint-abort-on-error 2>&1 | \ ; RUN: FileCheck -check-prefixes=COMMON,MAX10 %s ; The order of metadata on functions is non-deterministic, so make two different runs to match both of them. @@ -36,13 +37,13 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: declare i32 @_cont_GetContinuationStackAddr() #0 ; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #0 +declare %struct.DispatchSystemData @_AmdAwaitTraversal(i32, %struct.TraversalData) #0 ; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, i64, %struct.DispatchSystemData) #0 +declare %struct.DispatchSystemData @_AmdAwaitShader(i32, i32, %struct.DispatchSystemData) #0 ; Function Attrs: alwaysinline -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, i64, %struct.AnyHitTraversalData) #0 +declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32, i32, %struct.AnyHitTraversalData) #0 ; Function Attrs: nounwind memory(read) declare !pointeetys !24 i32 @_cont_HitKind(%struct.SystemData* nocapture readnone, %struct.HitData*) #1 @@ -95,7 +96,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i64 4, %struct.TraversalData %trav_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i32 4, %struct.TraversalData %trav_data) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void @@ -104,7 +105,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i ; Function Attrs: alwaysinline define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #0 !pointeetys !37 { %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, i64 poison, %struct.DispatchSystemData %dis_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i32 2, i32 poison, %struct.DispatchSystemData %dis_data) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void @@ -113,7 +114,7 @@ define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #0 !poi ; Function Attrs: alwaysinline define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) #0 !pointeetys !38 { %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, i64 poison, %struct.AnyHitTraversalData %trav_data) + %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32 3, i32 poison, %struct.AnyHitTraversalData %trav_data) store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 call void @_AmdRestoreSystemDataAnyHit(%struct.AnyHitTraversalData* %data) ret i1 true @@ -121,7 +122,7 @@ define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hi ; COMMON-DAG: Incoming payload VGPR size of "main" (raygeneration): 0 dwords ; COMMON-DAG: Outgoing payload VGPR size by jump: -; COMMON-DAG: call void (...) @lgc.cps.jump(i64 2, {{.*}} %struct.DispatchSystemData %{{.*}}: 10 dwords +; COMMON-DAG: call void (...) @lgc.cps.jump(i32 2, {{.*}} %struct.DispatchSystemData %{{.*}}: 10 dwords define void @main() { %params = alloca %struct.TheirParams, align 4 @@ -131,8 +132,8 @@ define void @main() { ; COMMON-DAG: Incoming payload VGPR size of "mainTrace" (raygeneration): 0 dwords ; COMMON-DAG: Outgoing payload VGPR size by jump: -; MAX10-DAG: call void (...) @lgc.cps.jump(i64 4, {{.*}} %struct.TraversalData %{{.*}}: 10 dwords -; MAX30-DAG: call void (...) @lgc.cps.jump(i64 4, {{.*}} %struct.TraversalData %{{.*}}: 15 dwords +; MAX10-DAG: call void (...) @lgc.cps.jump(i32 4, {{.*}} %struct.TraversalData %{{.*}}: 10 dwords +; MAX30-DAG: call void (...) @lgc.cps.jump(i32 4, {{.*}} %struct.TraversalData %{{.*}}: 15 dwords define void @mainTrace() { %1 = load %dx.types.Handle, %dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 %2 = load %dx.types.Handle, %dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 @@ -159,14 +160,14 @@ define void @called(%struct.MyParams* %arg) !pointeetys !39 { ; MAX10-DAG: Incoming payload VGPR size of "Intersection" (intersection): 10 dwords ; MAX30-DAG: Incoming payload VGPR size of "Intersection" (intersection): 30 dwords ; COMMON-DAG: Outgoing payload VGPR size by jump: -; MAX10-DAG: call void (...) @lgc.cps.jump(i64 3, {{.*}}: 10 dwords -; MAX30-DAG: call void (...) @lgc.cps.jump(i64 3, {{.*}}: 30 dwords +; MAX10-DAG: call void (...) @lgc.cps.jump(i32 3, {{.*}}: 10 dwords +; MAX30-DAG: call void (...) @lgc.cps.jump(i32 3, {{.*}}: 30 dwords ; MAX10-DAG: Incoming payload VGPR size of "Intersection.resume.0" (intersection): 10 dwords ; MAX30-DAG: Incoming payload VGPR size of "Intersection.resume.0" (intersection): 30 dwords ; COMMON-DAG: Outgoing payload VGPR size by jump: -; MAX10-DAG: call void (...) @lgc.cps.jump(i64 %returnAddr.reload{{.*}}: 10 dwords -; MAX30-DAG: call void (...) @lgc.cps.jump(i64 %returnAddr.reload{{.*}}: 30 dwords +; MAX10-DAG: call void (...) @lgc.cps.jump(i32 %returnAddr.reload{{.*}}: 10 dwords +; MAX30-DAG: call void (...) @lgc.cps.jump(i32 %returnAddr.reload{{.*}}: 30 dwords define void @Intersection() #3 { %a = alloca %struct.BuiltInTriangleIntersectionAttributes, align 4 @@ -194,7 +195,7 @@ define void @Miss16(%struct.PayloadWithI16* noalias nocapture %payload) !pointee ret void } -declare void @_AmdEnqueueAnyHit(i64, i64, %struct._AmdSystemData, <2 x float>) #0 +declare void @_AmdEnqueueAnyHit(i32, i32, %struct._AmdSystemData, <2 x float>) #0 ; MAX10-DAG: Incoming payload VGPR size of "_cont_Traversal" (compute): 10 dwords ; COMMON-DAG: Outgoing payload VGPR size by jump: @@ -204,7 +205,7 @@ declare void @_AmdEnqueueAnyHit(i64, i64, %struct._AmdSystemData, <2 x float>) # ; MAX30-DAG: call {{.*}} @lgc.cps.jump({{.*}}: 27 dwords define void @_cont_Traversal(%struct._AmdTraversalResultData* noalias nocapture sret(%struct._AmdTraversalResultData) %agg.result, %struct._AmdSystemData* noalias %data) !pointeetys !44 { - call void @_AmdEnqueueAnyHit(i64 0, i64 poison, %struct.BuiltInTriangleIntersectionAttributes undef, <2 x float> undef) + call void @_AmdEnqueueAnyHit(i32 0, i32 poison, %struct.BuiltInTriangleIntersectionAttributes undef, <2 x float> undef) unreachable } diff --git a/llvmraytracing/test/dx/continuation-stacksize.ll b/llvmraytracing/test/dx/continuation-stacksize.ll index 92a4b61ba1..fc84464f9b 100644 --- a/llvmraytracing/test/dx/continuation-stacksize.ll +++ b/llvmraytracing/test/dx/continuation-stacksize.ll @@ -1,6 +1,7 @@ -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' \ +; NOTE: Do not autogenerate +; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' \ ; RUN: -S %s --lint-abort-on-error | FileCheck -check-prefix=POSTPROCESS-STACKSIZE %s -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,remove-types-metadata' \ +; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint,remove-types-metadata' \ ; RUN: -S %s --lint-abort-on-error | FileCheck -check-prefix=CLEANUP-STATESIZE %s ; The order of metadata on functions is non-deterministic, so make two different runs to match both of them. @@ -28,10 +29,10 @@ declare i32 @_cont_GetContinuationStackAddr() #0 declare !pointeetys !33 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) ; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #0 +declare %struct.DispatchSystemData @_AmdAwaitTraversal(i32, %struct.TraversalData) #0 ; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, i64, %struct.DispatchSystemData) #0 +declare %struct.DispatchSystemData @_AmdAwaitShader(i32, i32, %struct.DispatchSystemData) #0 ; Function Attrs: alwaysinline declare !pointeetys !17 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #0 @@ -55,7 +56,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i64 4, %struct.TraversalData %trav_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i32 4, %struct.TraversalData %trav_data) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 ret void } @@ -63,7 +64,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i ; Function Attrs: alwaysinline define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #0 !pointeetys !23 { %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, i64 poison, %struct.DispatchSystemData %dis_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i32 2, i32 poison, %struct.DispatchSystemData %dis_data) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void @@ -109,9 +110,9 @@ define void @mainTrace() { ; LOWERRAYTRACINGPIPELINE-STACKSIZE-DAG: ![[called_stacksize]] = !{i32 144} ; CLEANUP-STACKSIZE-DAG: define void @called({{.*}}%struct.DispatchSystemData %0){{.*}} !continuation.stacksize ![[called_stacksize:[0-9]+]] -; CLEANUP-STACKSIZE-DAG: ![[called_stacksize]] = !{i32 348} +; CLEANUP-STACKSIZE-DAG: ![[called_stacksize]] = !{i32 344} ; CLEANUP-STATESIZE-DAG: define void @called{{.*}}%struct.DispatchSystemData{{.*}} !continuation.state ![[called_state:[0-9]+]] -; CLEANUP-STATESIZE-DAG: ![[called_state]] = !{i32 204} +; CLEANUP-STATESIZE-DAG: ![[called_state]] = !{i32 200} ; SAVESTATE-STACKSIZE-DAG: define void @called({{.*}}%struct.DispatchSystemData %0){{.*}} !continuation.stacksize ![[called_stacksize:[0-9]+]] ; SAVESTATE-STACKSIZE-DAG: ![[called_stacksize]] = !{i32 348} diff --git a/llvmraytracing/test/dx/continuation-state.ll b/llvmraytracing/test/dx/continuation-state.ll index e36891c69c..f3b23c7997 100644 --- a/llvmraytracing/test/dx/continuation-state.ll +++ b/llvmraytracing/test/dx/continuation-state.ll @@ -1,24 +1,24 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: opt --verify-each -passes='lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=CLEANUP %s +; RUN: opt --verify-each -passes='lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=CLEANUP %s target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" declare void @lgc.cps.await__void(...) declare i32 @_cont_GetContinuationStackAddr() -declare ptr @async_fun(i64, i32) +declare ptr @async_fun(i32, i32) declare void @lgc.cps.jump(...) declare void @lgc.cps.complete() -define <4 x i32> @simple_await(i64 %returnAddr, <4 x i32> %arg) !continuation.registercount !1 { - %callee = ptrtoint ptr @async_fun to i64 - call void (...) @lgc.cps.await__void(i64 %callee, i32 3), !continuation.registercount !1, !continuation.returnedRegistercount !1 - call void (...) @lgc.cps.jump(i64 %returnAddr, i32 -1, i64 poison, i64 poison, <4 x i32> %arg), !continuation.registercount !1 +define <4 x i32> @simple_await(i32 %returnAddr, <4 x i32> %arg) !continuation.registercount !1 { + %callee = ptrtoint ptr @async_fun to i32 + call void (...) @lgc.cps.await__void(i32 %callee, i32 3), !continuation.registercount !1, !continuation.returnedRegistercount !1 + call void (...) @lgc.cps.jump(i32 %returnAddr, i32 -1, i32 poison, i32 poison, <4 x i32> %arg), !continuation.registercount !1 unreachable } -define void @simple_await_entry(i64 %returnAddr, <4 x i32> %arg, <4 x i32> addrspace(1)* %mem) !continuation.entry !0 !continuation.registercount !1 { - %callee = ptrtoint ptr @async_fun to i64 - call void (...) @lgc.cps.await__void(i64 %callee, i32 3), !continuation.registercount !1, !continuation.returnedRegistercount !1 +define void @simple_await_entry(i32 %returnAddr, <4 x i32> %arg, <4 x i32> addrspace(1)* %mem) !continuation.entry !0 !continuation.registercount !1 { + %callee = ptrtoint ptr @async_fun to i32 + call void (...) @lgc.cps.await__void(i32 %callee, i32 3), !continuation.registercount !1, !continuation.returnedRegistercount !1 store <4 x i32> %arg, <4 x i32> addrspace(1)* %mem call void @lgc.cps.complete(), !continuation.registercount !1 unreachable @@ -32,57 +32,90 @@ define void @simple_await_entry(i64 %returnAddr, <4 x i32> %arg, <4 x i32> addrs !2 = !{i32 30} !3 = !{i32 21} ; CLEANUP-LABEL: define void @simple_await( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], <4 x i32> [[ARG:%.*]]) !continuation.registercount [[META2:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.stacksize [[META4:![0-9]+]] !continuation.state [[META4]] { +; CLEANUP-SAME: i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], <4 x i32> [[ARG:%.*]]) !continuation.registercount [[META2:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.stacksize [[META4:![0-9]+]] !continuation.state [[META4]] { ; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 24) -; CLEANUP-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: store <4 x i32> [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CLEANUP-NEXT: [[RETURNADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CLEANUP-NEXT: store i64 [[RETURNADDR]], ptr addrspace(32) [[RETURNADDR_SPILL_ADDR]], align 4 -; CLEANUP-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CLEANUP-NEXT: [[TMP0:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CLEANUP-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @simple_await.resume.0) -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]]), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] +; CLEANUP-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANUP-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], 20 +; CLEANUP-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(21) +; CLEANUP-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CLEANUP-NEXT: store <4 x i32> [[ARG]], ptr addrspace(21) [[TMP3]], align 4 +; CLEANUP-NEXT: [[TMP4:%.*]] = add i32 [[TMP7]], 16 +; CLEANUP-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(21) +; CLEANUP-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP5]], i32 0 +; CLEANUP-NEXT: store i32 [[RETURNADDR]], ptr addrspace(21) [[TMP6]], align 4 +; CLEANUP-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CLEANUP-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CLEANUP-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @simple_await.resume.0) +; CLEANUP-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP9]], i32 [[TMP1]]), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] ; CLEANUP-NEXT: unreachable ; ; ; CLEANUP-LABEL: define dso_local void @simple_await.resume.0( -; CLEANUP-SAME: i64 [[TMP0:%.*]]) !continuation.registercount [[META2]] !continuation [[META3]] { +; CLEANUP-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]]) !continuation.registercount [[META2]] !continuation [[META3]] { ; CLEANUP-NEXT: entryresume.0: -; CLEANUP-NEXT: [[TMP1:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 24) -; CLEANUP-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME:%.*]], ptr addrspace(32) [[TMP1]], i32 0, i32 0 -; CLEANUP-NEXT: [[ARG_RELOAD:%.*]] = load <4 x i32>, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CLEANUP-NEXT: [[RETURNADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME]], ptr addrspace(32) [[TMP1]], i32 0, i32 1 -; CLEANUP-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR]], align 4 -; CLEANUP-NEXT: call void @lgc.cps.free(i32 24) -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR_RELOAD]], i32 -1, i64 poison, i64 poison, <4 x i32> [[ARG_RELOAD]]), !continuation.registercount [[META2]] +; CLEANUP-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANUP-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], -20 +; CLEANUP-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) +; CLEANUP-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 +; CLEANUP-NEXT: [[ARG_RELOAD:%.*]] = load <4 x i32>, ptr addrspace(21) [[TMP4]], align 4 +; CLEANUP-NEXT: [[TMP5:%.*]] = add i32 [[TMP2]], 16 +; CLEANUP-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) +; CLEANUP-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP6]], i32 0 +; CLEANUP-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP7]], align 4 +; CLEANUP-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], -20 +; CLEANUP-NEXT: store i32 [[TMP9]], ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD]], i32 -1, i32 [[TMP10]], i32 poison, <4 x i32> [[ARG_RELOAD]]), !continuation.registercount [[META2]] ; CLEANUP-NEXT: unreachable ; ; ; CLEANUP-LABEL: define void @simple_await_entry( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], <4 x i32> [[ARG:%.*]], ptr addrspace(1) [[MEM:%.*]]) !continuation.registercount [[META2]] !continuation.entry [[META5:![0-9]+]] !continuation [[META6:![0-9]+]] !continuation.stacksize [[META4]] !continuation.state [[META4]] { +; CLEANUP-SAME: i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], <4 x i32> [[ARG:%.*]], ptr addrspace(1) [[MEM:%.*]]) !continuation.registercount [[META2]] !continuation.entry [[META5:![0-9]+]] !continuation [[META6:![0-9]+]] !continuation.stacksize [[META7:![0-9]+]] !continuation.state [[META7]] { ; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 24) -; CLEANUP-NEXT: [[MEM_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_ENTRY_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CLEANUP-NEXT: store ptr addrspace(1) [[MEM]], ptr addrspace(32) [[MEM_SPILL_ADDR]], align 4 -; CLEANUP-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_ENTRY_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: store <4 x i32> [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CLEANUP-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CLEANUP-NEXT: [[TMP0:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CLEANUP-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @simple_await_entry.resume.0) -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]]), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] +; CLEANUP-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANUP-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], 24 +; CLEANUP-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP2:%.*]] = add i32 [[TMP7]], 16 +; CLEANUP-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) +; CLEANUP-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 +; CLEANUP-NEXT: store ptr addrspace(1) [[MEM]], ptr addrspace(21) [[TMP4]], align 4 +; CLEANUP-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(21) +; CLEANUP-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP5]], i32 0 +; CLEANUP-NEXT: store <4 x i32> [[ARG]], ptr addrspace(21) [[TMP6]], align 4 +; CLEANUP-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CLEANUP-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CLEANUP-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @simple_await_entry.resume.0) +; CLEANUP-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP9]], i32 [[TMP1]]), !continuation.registercount [[META2]], !continuation.returnedRegistercount [[META2]] ; CLEANUP-NEXT: unreachable ; ; ; CLEANUP-LABEL: define dso_local void @simple_await_entry.resume.0( -; CLEANUP-SAME: i64 [[TMP0:%.*]]) !continuation.registercount [[META2]] !continuation [[META6]] { +; CLEANUP-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]]) !continuation.registercount [[META2]] !continuation [[META6]] { ; CLEANUP-NEXT: entryresume.0: -; CLEANUP-NEXT: [[TMP1:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 24) -; CLEANUP-NEXT: [[MEM_RELOAD_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_ENTRY_FRAME:%.*]], ptr addrspace(32) [[TMP1]], i32 0, i32 1 -; CLEANUP-NEXT: [[MEM_RELOAD:%.*]] = load ptr addrspace(1), ptr addrspace(32) [[MEM_RELOAD_ADDR]], align 4 -; CLEANUP-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_ENTRY_FRAME]], ptr addrspace(32) [[TMP1]], i32 0, i32 0 -; CLEANUP-NEXT: [[ARG_RELOAD:%.*]] = load <4 x i32>, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 +; CLEANUP-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANUP-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], -24 +; CLEANUP-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 16 +; CLEANUP-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) +; CLEANUP-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 +; CLEANUP-NEXT: [[MEM_RELOAD:%.*]] = load ptr addrspace(1), ptr addrspace(21) [[TMP5]], align 4 +; CLEANUP-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) +; CLEANUP-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP6]], i32 0 +; CLEANUP-NEXT: [[ARG_RELOAD:%.*]] = load <4 x i32>, ptr addrspace(21) [[TMP7]], align 4 ; CLEANUP-NEXT: store <4 x i32> [[ARG_RELOAD]], ptr addrspace(1) [[MEM_RELOAD]], align 4 -; CLEANUP-NEXT: call void @lgc.cps.free(i32 24) +; CLEANUP-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANUP-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], -24 +; CLEANUP-NEXT: store i32 [[TMP9]], ptr [[CSP]], align 4 ; CLEANUP-NEXT: ret void ; diff --git a/llvmraytracing/test/dx/continuation-without-await.ll b/llvmraytracing/test/dx/continuation-without-await.ll deleted file mode 100644 index 81b2cbf1f8..0000000000 --- a/llvmraytracing/test/dx/continuation-without-await.ll +++ /dev/null @@ -1,328 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,continuations-lint,remove-types-metadata' \ -; RUN: -S %s --lint-abort-on-error | FileCheck -check-prefix=CLEANUP %s -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' \ -; RUN: -S %s --lint-abort-on-error | FileCheck -check-prefix=POSTPROCESS %s - -; @called and @main_no_call must be marked as continuation and end with a continue call to the return address - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.DispatchSystemData = type { i32 } -%struct.TraversalData = type { %struct.SystemData } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.TheirParams = type { [1 x i32] } -%struct.MyParams = type { [3 x i32] } -%dx.types.ResourceProperties = type { i32, i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?Scene@@3URaytracingAccelerationStructure@@A" = external constant %dx.types.Handle, align 4 -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i32 @_cont_GetContinuationStackAddr() - -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, i64, %struct.DispatchSystemData) - -declare !pointeetys !16 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) - -; Function Attrs: nounwind memory(none) -declare !pointeetys !18 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) #0 - -declare !pointeetys !20 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwind !pointeetys !{%struct.DispatchSystemData poison} { - ret void -} - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) !pointeetys !20 { - ret i32 5 -} - -define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) !pointeetys !21 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 - %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i64 4, %struct.TraversalData %trav_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) !pointeetys !22 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, i64 poison, %struct.DispatchSystemData %dis_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -declare !pointeetys !28 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) - -define void @main() { - %params = alloca %struct.TheirParams, align 4 - store %struct.TheirParams zeroinitializer, %struct.TheirParams* %params, align 4 - call void @dx.op.callShader.struct.TheirParams(i32 159, i32 1, %struct.TheirParams* nonnull %params) - ret void -} - -define void @main_no_call() { - ret void -} - -define void @called(%struct.MyParams* %arg) !pointeetys !23 { - ret void -} - -; Function Attrs: nounwind memory(none) -declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types.ResourceProperties) #0 - -; Function Attrs: nounwind memory(read) -declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) #1 - -; Function Attrs: nounwind -declare !pointeetys !25 void @dx.op.callShader.struct.TheirParams(i32, i32, %struct.TheirParams*) #2 - -attributes #0 = { nounwind memory(none) } -attributes #1 = { nounwind memory(read) } -attributes #2 = { nounwind } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.entryPoints = !{!3, !6, !13, !14} -!lgc.rt.max.attribute.size = !{!29} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{null, !"", null, !4, !12} -!4 = !{!5, !9, null, null} -!5 = !{!6} -!6 = !{void ()* @main, !"main", null, null, !7} -!7 = !{i32 8, i32 7, i32 6, i32 16, i32 7, i32 8, i32 5, !8} -!8 = !{i32 0} -!9 = !{!10} -!10 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !11} -!11 = !{i32 0, i32 9} -!12 = !{i32 0, i64 65536} -!13 = !{void ()* @main_no_call, !"main_no_call", null, null, !7} -!14 = !{void (%struct.MyParams*)* @called, !"called", null, null, !15} -!15 = !{i32 8, i32 12} -!16 = !{%struct.SystemData poison} -!17 = !{i32 0, %struct.SystemData poison} -!18 = !{%struct.DispatchSystemData poison} -!19 = !{i32 0, %struct.DispatchSystemData poison} -!20 = !{%struct.DispatchSystemData poison} -!21 = !{%struct.DispatchSystemData poison} -!22 = !{%struct.DispatchSystemData poison} -!23 = !{%struct.MyParams poison} -!24 = !{i32 0, %struct.MyParams poison} -!25 = !{%struct.TheirParams poison} -!26 = !{i32 0, %struct.TheirParams poison} -!27 = !{i32 0, %struct.TraversalData poison} -!28 = !{%struct.TraversalData poison} -!29 = !{i32 8} -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 5 -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define void @main( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !continuation.entry [[META20:![0-9]+]] !continuation.registercount [[META8]] !continuation [[META21:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_THEIRPARAMS]] zeroinitializer, ptr [[PARAMS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_THEIRPARAMS]], ptr [[PARAMS]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP3]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa2i32a1i32s(i64 2, i32 4, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], [2 x i32] poison, [1 x i32] [[TMP4]]), !continuation.registercount [[META22:![0-9]+]], !continuation.returnedRegistercount [[META22]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } [[TMP6]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [1 x i32] [[TMP11]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = freeze [[STRUCT_THEIRPARAMS]] poison -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_THEIRPARAMS]] [[TMP9]], ptr [[PARAMS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_THEIRPARAMS]], ptr [[PARAMS]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP17]], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } [[TMP6]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP18]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE: .split: -; LOWERRAYTRACINGPIPELINE-NEXT: call void @lgc.cps.complete() -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define void @main_no_call( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8]] !continuation.entry [[META20]] !continuation.registercount [[META8]] !continuation [[META23:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: call void @lgc.cps.complete() -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @called( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [3 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META24:![0-9]+]] !continuation.registercount [[META18:![0-9]+]] !continuation [[META25:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [3 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_MYPARAMS:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [3 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP4]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP7]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP14]], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP20]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[TMP19]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP23]], ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[TMP19]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP26]], ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = load [3 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP27]], [2 x i32] poison, [3 x i32] [[TMP28]]), !continuation.registercount [[META18]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; CLEANUP-LABEL: define i32 @_cont_GetLocalRootIndex( -; CLEANUP-SAME: ptr [[DATA:%.*]]) { -; CLEANUP-NEXT: ret i32 5 -; -; -; CLEANUP-LABEL: define void @main( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !continuation.entry [[META20:![0-9]+]] !continuation.registercount [[META8]] !continuation [[META21:![0-9]+]] !continuation.state [[META8]] { -; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT3:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT3]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [1 x i32] poison, i32 0, 0 -; CLEANUP-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @main.resume.0) -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 2, i32 -1, {} poison, i32 poison, i64 [[TMP1]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], [2 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT]]), !continuation.registercount [[META22:![0-9]+]], !continuation.returnedRegistercount [[META22]] -; CLEANUP-NEXT: unreachable -; -; -; CLEANUP-LABEL: define dso_local void @main.resume.0( -; CLEANUP-SAME: i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [2 x i32], [1 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META8]] !continuation.registercount [[META22]] !continuation [[META21]] { -; CLEANUP-NEXT: entryresume.0: -; CLEANUP-NEXT: [[TMP3:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } [[TMP1]], 2 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP3]], 0 -; CLEANUP-NEXT: [[TMP4:%.*]] = freeze [[STRUCT_THEIRPARAMS:%.*]] poison -; CLEANUP-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_THEIRPARAMS]] [[TMP4]], 0, 0 -; CLEANUP-NEXT: [[TMP2:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } [[TMP1]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT4:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP2]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-NEXT: ret void -; -; -; CLEANUP-LABEL: define void @main_no_call( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8]] !continuation.entry [[META20]] !continuation.registercount [[META8]] !continuation [[META23:![0-9]+]] !continuation.state [[META8]] { -; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-NEXT: ret void -; -; -; CLEANUP-LABEL: define void @called( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [3 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META24:![0-9]+]] !continuation.registercount [[META18:![0-9]+]] !continuation [[META25:![0-9]+]] !continuation.state [[META8]] { -; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [3 x i32] [[PAYLOAD]], 0 -; CLEANUP-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [3 x i32] [[PAYLOAD]], 1 -; CLEANUP-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [3 x i32] [[PAYLOAD]], 2 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT5]], [2 x i32] poison, [3 x i32] [[DOTFCA_2_INSERT]]), !continuation.registercount [[META18]] -; CLEANUP-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POSTPROCESS-SAME: ptr [[DATA:%.*]]) { -; POSTPROCESS-NEXT: ret i32 5 -; -; -; POSTPROCESS-LABEL: define void @main( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !continuation.entry [[META20:![0-9]+]] !continuation [[META21:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT3:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POSTPROCESS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT3]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [1 x i32] poison, i32 0, 0 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = call i64 @continuation.getAddrAndMD(ptr @main.resume.0) -; POSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 2, i32 [[TMP1]], i64 [[TMP2]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], [2 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define dso_local void @main.resume.0( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [2 x i32], [1 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META8]] !continuation [[META21]] { -; POSTPROCESS-NEXT: entryresume.0: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } [[TMP1]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP3]], 0 -; POSTPROCESS-NEXT: [[TMP4:%.*]] = freeze [[STRUCT_THEIRPARAMS:%.*]] poison -; POSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_THEIRPARAMS]] [[TMP4]], 0, 0 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } [[TMP1]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT4:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP2]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POSTPROCESS-NEXT: ret void -; -; -; POSTPROCESS-LABEL: define void @main_no_call( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8]] !continuation.entry [[META20]] !continuation [[META22:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POSTPROCESS-NEXT: ret void -; -; -; POSTPROCESS-LABEL: define void @called( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [3 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META23:![0-9]+]] !continuation [[META24:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [3 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [3 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [3 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [3 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [3 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [3 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP1]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT5]], [2 x i32] poison, [3 x i32] [[DOTFCA_2_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/dxil-cont-convert-lgc-rt-op-trace-payload-type.ll b/llvmraytracing/test/dx/dxil-cont-convert-lgc-rt-op-trace-payload-type.ll index 2c98a897b3..a16097da5d 100644 --- a/llvmraytracing/test/dx/dxil-cont-convert-lgc-rt-op-trace-payload-type.ll +++ b/llvmraytracing/test/dx/dxil-cont-convert-lgc-rt-op-trace-payload-type.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 ; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=PAYLOADTYPE-OPAQUE %s ; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=PAYLOADTYPE2-OPAQUE %s ; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=PAYLOADTYPE3-OPAQUE %s @@ -47,13 +48,38 @@ define void @main() { ; PAYLOADTYPE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 2, %struct.TheirParams2* %{{.*}}, i32 260), !cont.payload.type ![[call_callable_shader_payload_type2:[0-9]+]] ; PAYLOADTYPE: ![[call_callable_shader_payload_type]] = !{%struct.TheirParams poison} ; PAYLOADTYPE: ![[call_callable_shader_payload_type2]] = !{%struct.TheirParams2 poison} - -; PAYLOADTYPE-OPAQUE-LABEL: define void @main -; PAYLOADTYPE-OPAQUE: call void (...) @lgc.rt.call.callable.shader(i32 1, ptr %{{.*}}, i32 256), !cont.payload.type ![[call_callable_shader_payload_type:[0-9]+]] -; PAYLOADTYPE-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 1, ptr %{{.*}}, i32 256), !cont.payload.type ![[call_callable_shader_payload_type]] -; PAYLOADTYPE-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 2, ptr %{{.*}}, i32 260), !cont.payload.type ![[call_callable_shader_payload_type2:[0-9]+]] -; PAYLOADTYPE-OPAQUE: ![[call_callable_shader_payload_type]] = !{%struct.TheirParams poison} -; PAYLOADTYPE-OPAQUE: ![[call_callable_shader_payload_type2]] = !{%struct.TheirParams2 poison} +; PAYLOADTYPE-OPAQUE-LABEL: define void @main( +; PAYLOADTYPE-OPAQUE-SAME: ) !lgc.rt.shaderstage [[META8:![0-9]+]] { +; PAYLOADTYPE-OPAQUE-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS:%.*]], align 4 +; PAYLOADTYPE-OPAQUE-NEXT: [[PARAMS2:%.*]] = alloca [[STRUCT_THEIRPARAMS2:%.*]], align 4 +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @lgc.rt.shader.index() +; PAYLOADTYPE-OPAQUE-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[TMP1]]) +; PAYLOADTYPE-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 1, ptr [[PARAMS]], i32 256), !cont.payload.type [[META19:![0-9]+]] +; PAYLOADTYPE-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 1, ptr [[PARAMS]], i32 256), !cont.payload.type [[META19]] +; PAYLOADTYPE-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 2, ptr [[PARAMS2]], i32 260), !cont.payload.type [[META20:![0-9]+]] +; PAYLOADTYPE-OPAQUE-NEXT: ret void +; +; PAYLOADTYPE2-OPAQUE-LABEL: define void @main( +; PAYLOADTYPE2-OPAQUE-SAME: ) !lgc.rt.shaderstage [[META8:![0-9]+]] { +; PAYLOADTYPE2-OPAQUE-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS:%.*]], align 4 +; PAYLOADTYPE2-OPAQUE-NEXT: [[PARAMS2:%.*]] = alloca [[STRUCT_THEIRPARAMS2:%.*]], align 4 +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @lgc.rt.shader.index() +; PAYLOADTYPE2-OPAQUE-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[TMP1]]) +; PAYLOADTYPE2-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 1, ptr [[PARAMS]], i32 256), !cont.payload.type [[META19:![0-9]+]] +; PAYLOADTYPE2-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 1, ptr [[PARAMS]], i32 256), !cont.payload.type [[META19]] +; PAYLOADTYPE2-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 2, ptr [[PARAMS2]], i32 260), !cont.payload.type [[META20:![0-9]+]] +; PAYLOADTYPE2-OPAQUE-NEXT: ret void +; +; PAYLOADTYPE3-OPAQUE-LABEL: define void @main( +; PAYLOADTYPE3-OPAQUE-SAME: ) !lgc.rt.shaderstage [[META8:![0-9]+]] { +; PAYLOADTYPE3-OPAQUE-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS:%.*]], align 4 +; PAYLOADTYPE3-OPAQUE-NEXT: [[PARAMS2:%.*]] = alloca [[STRUCT_THEIRPARAMS2:%.*]], align 4 +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @lgc.rt.shader.index() +; PAYLOADTYPE3-OPAQUE-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[TMP1]]) +; PAYLOADTYPE3-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 1, ptr [[PARAMS]], i32 256), !cont.payload.type [[META19:![0-9]+]] +; PAYLOADTYPE3-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 1, ptr [[PARAMS]], i32 256), !cont.payload.type [[META19]] +; PAYLOADTYPE3-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 2, ptr [[PARAMS2]], i32 260), !cont.payload.type [[META20:![0-9]+]] +; PAYLOADTYPE3-OPAQUE-NEXT: ret void ; %params = alloca %struct.TheirParams, align 4 %params2 = alloca %struct.TheirParams2, align 4 @@ -69,12 +95,59 @@ define void @mainTrace() { ; PAYLOADTYPE2: call void (...) @lgc.rt.trace.ray(i64 %{{.*}}, i32 16, i32 -1, i32 0, i32 1, i32 0, <3 x float> zeroinitializer, float 0x3F50624DE0000000, <3 x float> , float 1.000000e+04, %struct.RayPayload2* %{{.*}}, [1 x i32] [i32 256]), !cont.payload.type ![[traceray_payload_type2:[0-9]+]] ; PAYLOADTYPE2: ![[traceray_payload_type]] = !{%struct.RayPayload poison} ; PAYLOADTYPE2: ![[traceray_payload_type2]] = !{%struct.RayPayload2 poison} - -; PAYLOADTYPE2-OPAQUE-LABEL: define void @mainTrace -; PAYLOADTYPE2-OPAQUE: call void (...) @lgc.rt.trace.ray(i64 %{{.*}}, i32 16, i32 -1, i32 0, i32 1, i32 0, <3 x float> zeroinitializer, float 0x3F50624DE0000000, <3 x float> , float 1.000000e+04, ptr %{{.*}}, [1 x i32] [i32 272]), !cont.payload.type ![[traceray_payload_type:[0-9]+]] -; PAYLOADTYPE2-OPAQUE: call void (...) @lgc.rt.trace.ray(i64 %{{.*}}, i32 16, i32 -1, i32 0, i32 1, i32 0, <3 x float> zeroinitializer, float 0x3F50624DE0000000, <3 x float> , float 1.000000e+04, ptr %{{.*}}, [1 x i32] [i32 256]), !cont.payload.type ![[traceray_payload_type2:[0-9]+]] -; PAYLOADTYPE2-OPAQUE: ![[traceray_payload_type]] = !{%struct.RayPayload poison} -; PAYLOADTYPE2-OPAQUE: ![[traceray_payload_type2]] = !{%struct.RayPayload2 poison} +; PAYLOADTYPE-OPAQUE-LABEL: define void @mainTrace( +; PAYLOADTYPE-OPAQUE-SAME: ) !lgc.rt.shaderstage [[META8]] { +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @lgc.rt.shader.index() +; PAYLOADTYPE-OPAQUE-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[TMP1]]) +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 4 +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_RAYPAYLOAD2:%.*]], align 4 +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0, i32 0 +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD2]], ptr [[TMP5]], i32 0, i32 0 +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP9:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP8]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP10:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP9]]) +; PAYLOADTYPE-OPAQUE-NEXT: call void (...) @lgc.rt.trace.ray(i64 [[TMP10]], i32 16, i32 -1, i32 0, i32 1, i32 0, <3 x float> zeroinitializer, float 0x3F50624DE0000000, <3 x float> , float 1.000000e+04, ptr [[TMP4]], [1 x i32] [i32 272]), !cont.payload.type [[META17:![0-9]+]] +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP11:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP9]]) +; PAYLOADTYPE-OPAQUE-NEXT: call void (...) @lgc.rt.trace.ray(i64 [[TMP11]], i32 16, i32 -1, i32 0, i32 1, i32 0, <3 x float> zeroinitializer, float 0x3F50624DE0000000, <3 x float> , float 1.000000e+04, ptr [[TMP5]], [1 x i32] [i32 256]), !cont.payload.type [[META18:![0-9]+]] +; PAYLOADTYPE-OPAQUE-NEXT: ret void +; +; PAYLOADTYPE2-OPAQUE-LABEL: define void @mainTrace( +; PAYLOADTYPE2-OPAQUE-SAME: ) !lgc.rt.shaderstage [[META8]] { +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @lgc.rt.shader.index() +; PAYLOADTYPE2-OPAQUE-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[TMP1]]) +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 4 +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_RAYPAYLOAD2:%.*]], align 4 +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0, i32 0 +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD2]], ptr [[TMP5]], i32 0, i32 0 +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP9:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP8]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP10:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP9]]) +; PAYLOADTYPE2-OPAQUE-NEXT: call void (...) @lgc.rt.trace.ray(i64 [[TMP10]], i32 16, i32 -1, i32 0, i32 1, i32 0, <3 x float> zeroinitializer, float 0x3F50624DE0000000, <3 x float> , float 1.000000e+04, ptr [[TMP4]], [1 x i32] [i32 272]), !cont.payload.type [[META17:![0-9]+]] +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP11:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP9]]) +; PAYLOADTYPE2-OPAQUE-NEXT: call void (...) @lgc.rt.trace.ray(i64 [[TMP11]], i32 16, i32 -1, i32 0, i32 1, i32 0, <3 x float> zeroinitializer, float 0x3F50624DE0000000, <3 x float> , float 1.000000e+04, ptr [[TMP5]], [1 x i32] [i32 256]), !cont.payload.type [[META18:![0-9]+]] +; PAYLOADTYPE2-OPAQUE-NEXT: ret void +; +; PAYLOADTYPE3-OPAQUE-LABEL: define void @mainTrace( +; PAYLOADTYPE3-OPAQUE-SAME: ) !lgc.rt.shaderstage [[META8]] { +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @lgc.rt.shader.index() +; PAYLOADTYPE3-OPAQUE-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[TMP1]]) +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 4 +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_RAYPAYLOAD2:%.*]], align 4 +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0, i32 0 +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD2]], ptr [[TMP5]], i32 0, i32 0 +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP9:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP8]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP10:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP9]]) +; PAYLOADTYPE3-OPAQUE-NEXT: call void (...) @lgc.rt.trace.ray(i64 [[TMP10]], i32 16, i32 -1, i32 0, i32 1, i32 0, <3 x float> zeroinitializer, float 0x3F50624DE0000000, <3 x float> , float 1.000000e+04, ptr [[TMP4]], [1 x i32] [i32 272]), !cont.payload.type [[META17:![0-9]+]] +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP11:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP9]]) +; PAYLOADTYPE3-OPAQUE-NEXT: call void (...) @lgc.rt.trace.ray(i64 [[TMP11]], i32 16, i32 -1, i32 0, i32 1, i32 0, <3 x float> zeroinitializer, float 0x3F50624DE0000000, <3 x float> , float 1.000000e+04, ptr [[TMP5]], [1 x i32] [i32 256]), !cont.payload.type [[META18:![0-9]+]] +; PAYLOADTYPE3-OPAQUE-NEXT: ret void ; %1 = load %dx.types.Handle, %dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 %2 = load %dx.types.Handle, %dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 @@ -93,9 +166,29 @@ define void @called(%struct.MyParams* %arg) !pointeetys !38 { ; PAYLOADTYPE3-LABEL: define void @called ; PAYLOADTYPE3: call void (...) @lgc.rt.call.callable.shader(i32 2, %struct.TheirParams2* %{{.*}}, i32 260), !cont.payload.type ![[call_callable_shader_payload_type:[0-9]+]] ; PAYLOADTYPE3: ![[call_callable_shader_payload_type]] = !{%struct.TheirParams2 poison} -; PAYLOADTYPE3-OPAQUE-LABEL: define void @called -; PAYLOADTYPE3-OPAQUE: call void (...) @lgc.rt.call.callable.shader(i32 2, ptr %{{.*}}, i32 260), !cont.payload.type ![[call_callable_shader_payload_type:[0-9]+]] -; PAYLOADTYPE3-OPAQUE: ![[call_callable_shader_payload_type]] = !{%struct.TheirParams2 poison} +; PAYLOADTYPE-OPAQUE-LABEL: define void @called( +; PAYLOADTYPE-OPAQUE-SAME: ptr [[ARG:%.*]]) !pointeetys [[META22:![0-9]+]] !lgc.rt.shaderstage [[META23:![0-9]+]] !cont.payload.type [[META22]] { +; PAYLOADTYPE-OPAQUE-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS2:%.*]], align 4 +; PAYLOADTYPE-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @lgc.rt.shader.index() +; PAYLOADTYPE-OPAQUE-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[TMP1]]) +; PAYLOADTYPE-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 2, ptr [[PARAMS]], i32 260), !cont.payload.type [[META20]] +; PAYLOADTYPE-OPAQUE-NEXT: ret void +; +; PAYLOADTYPE2-OPAQUE-LABEL: define void @called( +; PAYLOADTYPE2-OPAQUE-SAME: ptr [[ARG:%.*]]) !pointeetys [[META22:![0-9]+]] !lgc.rt.shaderstage [[META23:![0-9]+]] !cont.payload.type [[META22]] { +; PAYLOADTYPE2-OPAQUE-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS2:%.*]], align 4 +; PAYLOADTYPE2-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @lgc.rt.shader.index() +; PAYLOADTYPE2-OPAQUE-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[TMP1]]) +; PAYLOADTYPE2-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 2, ptr [[PARAMS]], i32 260), !cont.payload.type [[META20]] +; PAYLOADTYPE2-OPAQUE-NEXT: ret void +; +; PAYLOADTYPE3-OPAQUE-LABEL: define void @called( +; PAYLOADTYPE3-OPAQUE-SAME: ptr [[ARG:%.*]]) !pointeetys [[META22:![0-9]+]] !lgc.rt.shaderstage [[META23:![0-9]+]] !cont.payload.type [[META22]] { +; PAYLOADTYPE3-OPAQUE-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS2:%.*]], align 4 +; PAYLOADTYPE3-OPAQUE-NEXT: [[TMP1:%.*]] = call i32 @lgc.rt.shader.index() +; PAYLOADTYPE3-OPAQUE-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[TMP1]]) +; PAYLOADTYPE3-OPAQUE-NEXT: call void (...) @lgc.rt.call.callable.shader(i32 2, ptr [[PARAMS]], i32 260), !cont.payload.type [[META20]] +; PAYLOADTYPE3-OPAQUE-NEXT: ret void ; %params = alloca %struct.TheirParams2, align 4 call void @dx.op.callShader.struct.TheirParams2(i32 159, i32 2, %struct.TheirParams2* nonnull %params) ; CallShader(ShaderIndex,Parameter) @@ -156,3 +249,28 @@ attributes #2 = { nounwind readonly } !47 = !{i32 0, %struct.BuiltInTriangleIntersectionAttributes poison} !48 = !{i32 0, %struct.RayPayload2 poison} !49 = !{%struct.RayPayload2 poison} +;. +; PAYLOADTYPE-OPAQUE: [[META8]] = !{i32 0} +; PAYLOADTYPE-OPAQUE: [[META17]] = !{%struct.RayPayload poison} +; PAYLOADTYPE-OPAQUE: [[META18]] = !{%struct.RayPayload2 poison} +; PAYLOADTYPE-OPAQUE: [[META19]] = !{%struct.TheirParams poison} +; PAYLOADTYPE-OPAQUE: [[META20]] = !{%struct.TheirParams2 poison} +; PAYLOADTYPE-OPAQUE: [[META22]] = !{%struct.MyParams poison} +; PAYLOADTYPE-OPAQUE: [[META23]] = !{i32 5} +;. +; PAYLOADTYPE2-OPAQUE: [[META8]] = !{i32 0} +; PAYLOADTYPE2-OPAQUE: [[META17]] = !{%struct.RayPayload poison} +; PAYLOADTYPE2-OPAQUE: [[META18]] = !{%struct.RayPayload2 poison} +; PAYLOADTYPE2-OPAQUE: [[META19]] = !{%struct.TheirParams poison} +; PAYLOADTYPE2-OPAQUE: [[META20]] = !{%struct.TheirParams2 poison} +; PAYLOADTYPE2-OPAQUE: [[META22]] = !{%struct.MyParams poison} +; PAYLOADTYPE2-OPAQUE: [[META23]] = !{i32 5} +;. +; PAYLOADTYPE3-OPAQUE: [[META8]] = !{i32 0} +; PAYLOADTYPE3-OPAQUE: [[META17]] = !{%struct.RayPayload poison} +; PAYLOADTYPE3-OPAQUE: [[META18]] = !{%struct.RayPayload2 poison} +; PAYLOADTYPE3-OPAQUE: [[META19]] = !{%struct.TheirParams poison} +; PAYLOADTYPE3-OPAQUE: [[META20]] = !{%struct.TheirParams2 poison} +; PAYLOADTYPE3-OPAQUE: [[META22]] = !{%struct.MyParams poison} +; PAYLOADTYPE3-OPAQUE: [[META23]] = !{i32 5} +;. diff --git a/llvmraytracing/test/dx/dxil-cont-convert-lgc-rt-op.ll b/llvmraytracing/test/dx/dxil-cont-convert-lgc-rt-op.ll index ae33f1adc6..ebf780d7c8 100644 --- a/llvmraytracing/test/dx/dxil-cont-convert-lgc-rt-op.ll +++ b/llvmraytracing/test/dx/dxil-cont-convert-lgc-rt-op.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function ClosestHit --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck %s target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" diff --git a/llvmraytracing/test/dx/dxil-cont-post-process.ll b/llvmraytracing/test/dx/dxil-cont-post-process.ll index 56d7ee3944..9fdd78be84 100644 --- a/llvmraytracing/test/dx/dxil-cont-post-process.ll +++ b/llvmraytracing/test/dx/dxil-cont-post-process.ll @@ -10,34 +10,28 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: declare i32 @_cont_GetContinuationStackAddr() declare i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) -define void @RayGen(i64 %dummyRetAddr, %struct.DispatchSystemData %0) !lgc.rt.shaderstage !5 !continuation.entry !0 !continuation !3 { +define void @RayGen(i32 %cspInit, i32 %dummyRetAddr, %struct.DispatchSystemData %0) !lgc.rt.shaderstage !3 !continuation.entry !4 !continuation !5 { ; CHECK-LABEL: define void @RayGen( -; CHECK-SAME: i32 [[CSPINIT:%.*]], i64 [[DUMMYRETADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META3:![0-9]+]] !continuation.entry [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] { -; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRETADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META3:![0-9]+]] !continuation.entry [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] { ; CHECK-NEXT: ret void ; ret void } -define void @RayGen.resume.0(i64 %0, %struct.DispatchSystemData %1) !lgc.rt.shaderstage !5 !continuation !3 { +define void @RayGen.resume.0(i32 %cspInit, i32 %0, %struct.DispatchSystemData %1) !lgc.rt.shaderstage !3 !continuation !5 { ; CHECK-LABEL: define void @RayGen.resume.0( -; CHECK-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP1:%.*]]) !lgc.rt.shaderstage [[META3]] !continuation [[META5]] { -; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP1:%.*]]) !lgc.rt.shaderstage [[META3]] !continuation [[META5]] { ; CHECK-NEXT: ret void ; ret void } -!dx.entryPoints = !{!1} -!continuation.stackAddrspace = !{!4} +!dx.entryPoints = !{!0} +!continuation.stackAddrspace = !{!2} -!0 = !{} -!1 = !{void ()* @RayGen, !"RayGen", null, null, !2} -!2 = !{i32 8, i32 7} -!3 = !{void ()* @RayGen} -!4 = !{i32 21} -!5 = !{i32 0} - -attributes #0 = { nounwind } +!0 = !{ptr @RayGen, !"RayGen", null, null, !1} +!1 = !{i32 8, i32 7} +!2 = !{i32 21} +!3 = !{i32 0} +!4 = !{} +!5 = !{ptr @RayGen} diff --git a/llvmraytracing/test/dx/dxil-cont-prepare-gpurt-library-remove-waitmask.ll b/llvmraytracing/test/dx/dxil-cont-prepare-gpurt-library-remove-waitmask.ll new file mode 100644 index 0000000000..e8b6b2646e --- /dev/null +++ b/llvmraytracing/test/dx/dxil-cont-prepare-gpurt-library-remove-waitmask.ll @@ -0,0 +1,90 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint' -S %s --lint-abort-on-error | FileCheck %s + +target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" + +%struct.DispatchSystemData = type { i32 } +%struct.TraversalData = type { %struct.SystemData, i32, i64 } +%struct.SystemData = type { %struct.DispatchSystemData, float } + +; Function Attrs: nounwind memory(none) +define i32 @_cont_GetContinuationStackAddr() #0 { + ret i32 1 +} + +; Function Attrs: nounwind +define void @_cont_TraceRay(%struct.DispatchSystemData* noalias nocapture sret(%struct.DispatchSystemData) %agg.result, %struct.DispatchSystemData* nocapture readonly %data, i64 %accelStruct, i32 %rayFlags, i32 %instanceInclusioMask, i32 %rayContributionToHitGroupIndex, i32 %multiplierForGeometryContributionToShaderIndex, i32 %missShaderIndex, float %originX, float %originY, float %originZ, float %tMin, float %dirX, float %dirY, float %dirZ, float %tMax) #1 !pointeetys !2 { + %1 = alloca %struct.TraversalData, align 4 + %2 = alloca %struct.DispatchSystemData, align 4 + %3 = getelementptr inbounds %struct.DispatchSystemData, %struct.DispatchSystemData* %data, i32 0, i32 0 + %4 = load i32, i32* %3, align 4 + %5 = bitcast %struct.TraversalData* %1 to i8* + call void @llvm.lifetime.start.p0i8(i64 12, i8* %5) #3 + %6 = getelementptr inbounds %struct.TraversalData, %struct.TraversalData* %1, i32 0, i32 0, i32 0, i32 0 + store i32 %4, i32* %6, align 4 + %addr = call i64 @_AmdGetResumePointAddr() #3 + %a = getelementptr inbounds %struct.TraversalData, %struct.TraversalData* %1, i32 0, i32 2 + store i64 %addr, i64* %a, align 4 + call void @"\01?_AmdWaitAwait@@YA?AUDispatchSystemData@@UTraversalData@@@Z"(%struct.DispatchSystemData* nonnull sret(%struct.DispatchSystemData) %2, i64 3, i64 -1, %struct.TraversalData* nonnull %1) #3 + %7 = getelementptr inbounds %struct.DispatchSystemData, %struct.DispatchSystemData* %2, i32 0, i32 0 + %8 = load i32, i32* %7, align 4 + %9 = getelementptr inbounds %struct.DispatchSystemData, %struct.DispatchSystemData* %agg.result, i32 0, i32 0 + store i32 %8, i32* %9, align 4 + call void @llvm.lifetime.end.p0i8(i64 12, i8* %5) #3 + ret void +} + +declare !pointeetys !3 void @"\01?_AmdWaitAwait@@YA?AUDispatchSystemData@@UTraversalData@@@Z"(%struct.DispatchSystemData* sret(%struct.DispatchSystemData), i64, i64, %struct.TraversalData*) #2 + +; Function Attrs: nounwind +declare i64 @_AmdGetResumePointAddr() #3 + +; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) +declare !pointeetys !5 void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #4 + +; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) +declare !pointeetys !5 void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #4 + +attributes #0 = { nounwind memory(none) "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #3 = { nounwind } +attributes #4 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } + +!0 = !{%struct.DispatchSystemData poison} +!1 = !{i32 0, %struct.DispatchSystemData poison} +!2 = !{null, %struct.DispatchSystemData poison, %struct.DispatchSystemData poison} +!3 = !{null, %struct.DispatchSystemData poison, null, null, %struct.TraversalData poison} +!4 = !{i32 0, %struct.TraversalData poison} +!5 = !{i8 poison} +!6 = !{i32 0, i8 poison} +; CHECK-LABEL: define i32 @_cont_GetContinuationStackAddr( +; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +; CHECK-NEXT: ret i32 1 +; +; +; CHECK-LABEL: define %struct.DispatchSystemData @_cont_TraceRay( +; CHECK-SAME: ptr nocapture readonly [[DATA:%.*]], i64 [[ACCELSTRUCT:%.*]], i32 [[RAYFLAGS:%.*]], i32 [[INSTANCEINCLUSIOMASK:%.*]], i32 [[RAYCONTRIBUTIONTOHITGROUPINDEX:%.*]], i32 [[MULTIPLIERFORGEOMETRYCONTRIBUTIONTOSHADERINDEX:%.*]], i32 [[MISSSHADERINDEX:%.*]], float [[ORIGINX:%.*]], float [[ORIGINY:%.*]], float [[ORIGINZ:%.*]], float [[TMIN:%.*]], float [[DIRX:%.*]], float [[DIRY:%.*]], float [[DIRZ:%.*]], float [[TMAX:%.*]]) #[[ATTR1:[0-9]+]] !pointeetys [[META0:![0-9]+]] { +; CHECK-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_TRAVERSALDATA:%.*]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA:%.*]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 +; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0 +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 +; CHECK-NEXT: [[TMP6:%.*]] = bitcast ptr [[TMP1]] to ptr +; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 12, ptr [[TMP6]]) #[[ATTR5:[0-9]+]] +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 0, i32 0, i32 0 +; CHECK-NEXT: store i32 [[TMP5]], ptr [[TMP7]], align 4 +; CHECK-NEXT: [[ADDR:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR5]] +; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 2 +; CHECK-NEXT: store i64 [[ADDR]], ptr [[A]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] @[[_AMDAWAIT:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i64 3, [[STRUCT_TRAVERSALDATA]] [[TMP8]]) #[[ATTR5]], !waitmask [[META1:![0-9]+]] +; CHECK-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP9]], ptr [[TMP2]], align 4 +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP2]], i32 0, i32 0 +; CHECK-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP3]], i32 0, i32 0 +; CHECK-NEXT: store i32 [[TMP11]], ptr [[TMP12]], align 4 +; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 12, ptr [[TMP6]]) #[[ATTR5]] +; CHECK-NEXT: [[TMP13:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP3]], align 4 +; CHECK-NEXT: ret [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP13]] +; diff --git a/llvmraytracing/test/dx/dxil-cont-intrinsic-prepare.ll b/llvmraytracing/test/dx/dxil-cont-prepare-gpurt-library.ll similarity index 93% rename from llvmraytracing/test/dx/dxil-cont-intrinsic-prepare.ll rename to llvmraytracing/test/dx/dxil-cont-prepare-gpurt-library.ll index aac3488367..29129961a8 100644 --- a/llvmraytracing/test/dx/dxil-cont-intrinsic-prepare.ll +++ b/llvmraytracing/test/dx/dxil-cont-prepare-gpurt-library.ll @@ -1,10 +1,10 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint' -S %s --lint-abort-on-error | FileCheck %s target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" %struct.DispatchSystemData = type { i32 } -%struct.TraversalData = type { %struct.SystemData, i32, i64 } +%struct.TraversalData = type { %struct.SystemData, i32, i32 } %struct.SystemData = type { %struct.DispatchSystemData, float } ; Function Attrs: nounwind memory(none) @@ -22,9 +22,9 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* noalias nocapture sret(% call void @llvm.lifetime.start.p0i8(i64 12, i8* %5) #3 %6 = getelementptr inbounds %struct.TraversalData, %struct.TraversalData* %1, i32 0, i32 0, i32 0, i32 0 store i32 %4, i32* %6, align 4 - %addr = call i64 @_AmdGetResumePointAddr() #3 + %addr = call i32 @_AmdGetResumePointAddr() #3 %a = getelementptr inbounds %struct.TraversalData, %struct.TraversalData* %1, i32 0, i32 2 - store i64 %addr, i64* %a, align 4 + store i32 %addr, i32* %a, align 4 call void @"\01?_AmdAwait@@YA?AUDispatchSystemData@@UTraversalData@@@Z"(%struct.DispatchSystemData* nonnull sret(%struct.DispatchSystemData) %2, i64 3, %struct.TraversalData* nonnull %1) #3 %7 = getelementptr inbounds %struct.DispatchSystemData, %struct.DispatchSystemData* %2, i32 0, i32 0 %8 = load i32, i32* %7, align 4 @@ -37,7 +37,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* noalias nocapture sret(% declare !pointeetys !3 void @"\01?_AmdAwait@@YA?AUDispatchSystemData@@UTraversalData@@@Z"(%struct.DispatchSystemData* sret(%struct.DispatchSystemData), i64, %struct.TraversalData*) #2 ; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #3 +declare i32 @_AmdGetResumePointAddr() #3 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare !pointeetys !5 void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #4 @@ -74,9 +74,9 @@ attributes #4 = { nocallback nofree nosync nounwind willreturn memory(argmem: re ; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 12, ptr [[TMP6]]) #[[ATTR5:[0-9]+]] ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 0, i32 0, i32 0 ; CHECK-NEXT: store i32 [[TMP5]], ptr [[TMP7]], align 4 -; CHECK-NEXT: [[ADDR:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR5]] +; CHECK-NEXT: [[ADDR:%.*]] = call i32 @_AmdGetResumePointAddr() #[[ATTR5]] ; CHECK-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 2 -; CHECK-NEXT: store i64 [[ADDR]], ptr [[A]], align 4 +; CHECK-NEXT: store i32 [[ADDR]], ptr [[A]], align 4 ; CHECK-NEXT: [[TMP8:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], align 4 ; CHECK-NEXT: [[TMP9:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] @[[_AMDAWAIT:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i64 3, [[STRUCT_TRAVERSALDATA]] [[TMP8]]) ; CHECK-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP9]], ptr [[TMP2]], align 4 diff --git a/llvmraytracing/test/dx/dxil-cont-prepare-traversal.ll b/llvmraytracing/test/dx/dxil-cont-prepare-traversal.ll deleted file mode 100644 index 8c85927b33..0000000000 --- a/llvmraytracing/test/dx/dxil-cont-prepare-traversal.ll +++ /dev/null @@ -1,251 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck --check-prefix=PREPARE %s -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck --check-prefix=ALL %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%struct.TraversalData = type { %struct.SystemData, i32 } -%struct.SystemData = type { %struct.DispatchSystemData, float } -%struct.DispatchSystemData = type { i32 } - -declare i1 @"\01?_AmdContinuationStackIsGlobal@@YA_KXZ"() - -declare i32 @"\01?_AmdContPayloadRegistersI32Count@@YA_KXZ"() - -declare i32 @"\01?_AmdContPayloadRegistersGetI32@@YA_KXZ"(i32) - -declare void @"\01?_AmdContPayloadRegistersSetI32@@YA_KXZ"(i32, i32) - -declare !pointeetys !0 i32 @"\01?_AmdValueI32CountSomething@@YA_KXZ"(%struct.TraversalData*) - -declare !pointeetys !2 i32 @"\01?_AmdValueGetI32Something@@YA_KXZ"(%struct.TraversalData*, i32) - -declare !pointeetys !3 void @"\01?_AmdValueSetI32Something@@YA_KXZ"(%struct.TraversalData*, i32, i32) - -declare !pointeetys !8 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -declare !pointeetys !8 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) - -declare !pointeetys !9 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) - -; Function Attrs: nounwind -define void @_cont_Traversal(%struct.TraversalData* %data) #0 !pointeetys !4 { - %1 = getelementptr inbounds %struct.TraversalData, %struct.TraversalData* %data, i32 0, i32 1 - %2 = load i32, i32* %1, align 4 - %3 = icmp eq i32 %2, 0 - %4 = getelementptr inbounds %struct.TraversalData, %struct.TraversalData* %data, i32 0, i32 0 - br i1 %3, label %6, label %5 - -5: ; preds = %0 - %i0 = call i1 @"\01?_AmdContinuationStackIsGlobal@@YA_KXZ"() - %i1 = call i32 @"\01?_AmdContPayloadRegistersI32Count@@YA_KXZ"() - %i2 = call i32 @"\01?_AmdContPayloadRegistersGetI32@@YA_KXZ"(i32 0) - call void @"\01?_AmdContPayloadRegistersSetI32@@YA_KXZ"(i32 0, i32 1) - %i3 = call i32 @"\01?_AmdValueI32CountSomething@@YA_KXZ"(%struct.TraversalData* %data) - %i4 = call i32 @"\01?_AmdValueGetI32Something@@YA_KXZ"(%struct.TraversalData* %data, i32 0) - call void @"\01?_AmdValueSetI32Something@@YA_KXZ"(%struct.TraversalData* %data, i32 0, i32 1) - %a0 = zext i1 %i0 to i32 - %a1 = add i32 %a0, %i1 - %a2 = add i32 %a1, %i2 - %a3 = add i32 %a2, %i3 - %a4 = add i32 %a3, %i4 - %addr = zext i32 %a4 to i64 - call void @_AmdWaitEnqueue(i64 %addr, i64 -1, i64 0, %struct.SystemData* %4) #2 - ret void - -6: ; preds = %0 - call void @_AmdWaitEnqueue(i64 0, i64 -1, i64 2, %struct.SystemData* %4) #2 - ret void -} - -declare !pointeetys !5 void @_AmdWaitEnqueue(i64, i64, i64, %struct.SystemData*) #1 - -attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind } - -!0 = !{%struct.TraversalData poison} -!1 = !{i32 0, %struct.TraversalData poison} -!2 = !{%struct.TraversalData poison} -!3 = !{%struct.TraversalData poison} -!4 = !{%struct.TraversalData poison} -!5 = !{%struct.SystemData poison} -!6 = !{i32 0, %struct.SystemData poison} -!7 = !{i32 0, %struct.DispatchSystemData poison} -!8 = !{%struct.DispatchSystemData poison} -!9 = !{%struct.TraversalData poison} -; PREPARE-LABEL: define void @_cont_Traversal( -; PREPARE-SAME: [[STRUCT_TRAVERSALDATA:%.*]] [[DATA:%.*]]) #[[ATTR1:[0-9]+]] !lgc.rt.shaderstage [[META0:![0-9]+]] { -; PREPARE-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; PREPARE-NEXT: store [[STRUCT_TRAVERSALDATA]] [[DATA]], ptr [[TMP1]], align 4 -; PREPARE-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 1 -; PREPARE-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 -; PREPARE-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0 -; PREPARE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 0 -; PREPARE-NEXT: br i1 [[TMP4]], label [[TMP8:%.*]], label [[TMP6:%.*]] -; PREPARE: 6: -; PREPARE-NEXT: [[I1:%.*]] = call i32 @_AmdContPayloadRegistersI32Count() -; PREPARE-NEXT: [[I2:%.*]] = call i32 @_AmdContPayloadRegistersGetI32(i32 0) -; PREPARE-NEXT: call void @_AmdContPayloadRegistersSetI32(i32 0, i32 1) -; PREPARE-NEXT: [[I3:%.*]] = call i32 @_AmdValueI32CountSomething(ptr [[TMP1]]) -; PREPARE-NEXT: [[I4:%.*]] = call i32 @_AmdValueGetI32Something(ptr [[TMP1]], i32 0) -; PREPARE-NEXT: call void @_AmdValueSetI32Something(ptr [[TMP1]], i32 0, i32 1) -; PREPARE-NEXT: [[A0:%.*]] = zext i1 false to i32 -; PREPARE-NEXT: [[A1:%.*]] = add i32 [[A0]], [[I1]] -; PREPARE-NEXT: [[A2:%.*]] = add i32 [[A1]], [[I2]] -; PREPARE-NEXT: [[A3:%.*]] = add i32 [[A2]], [[I3]] -; PREPARE-NEXT: [[A4:%.*]] = add i32 [[A3]], [[I4]] -; PREPARE-NEXT: [[ADDR:%.*]] = zext i32 [[A4]] to i64 -; PREPARE-NEXT: [[TMP7:%.*]] = load [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP5]], align 4 -; PREPARE-NEXT: call void (...) @lgc.cps.jump(i64 [[ADDR]], i32 -1, {} poison, i32 poison, i64 0, [[STRUCT_SYSTEMDATA]] [[TMP7]]), !waitmask [[META1:![0-9]+]] -; PREPARE-NEXT: unreachable -; PREPARE: 8: -; PREPARE-NEXT: [[TMP9:%.*]] = load [[STRUCT_SYSTEMDATA]], ptr [[TMP5]], align 4 -; PREPARE-NEXT: call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 2, [[STRUCT_SYSTEMDATA]] [[TMP9]]), !waitmask [[META1]] -; PREPARE-NEXT: unreachable -; -; -; ALL-LABEL: define void @_cont_Traversal( -; ALL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META2:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation.state [[META4:![0-9]+]] { -; ALL-NEXT: AllocaSpillBB: -; ALL-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; ALL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; ALL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; ALL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; ALL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; ALL-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; ALL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; ALL-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; ALL-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; ALL-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; ALL-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; ALL-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; ALL-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; ALL-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; ALL-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; ALL-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; ALL-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; ALL-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; ALL-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; ALL-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; ALL-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; ALL-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; ALL-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; ALL-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; ALL-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; ALL-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; ALL-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; ALL-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; ALL-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; ALL-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; ALL-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; ALL-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; ALL-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; ALL-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; ALL-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1 -; ALL-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1 -; ALL-NEXT: [[DATA_FCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; ALL-NEXT: [[DATA_FCA_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 0, i32 0, i32 0 -; ALL-NEXT: store i32 [[DATA_FCA_0_0_0_EXTRACT]], ptr [[DATA_FCA_0_0_0_GEP]], align 4 -; ALL-NEXT: [[DATA_FCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1 -; ALL-NEXT: [[DATA_FCA_0_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 0, i32 1 -; ALL-NEXT: store float [[DATA_FCA_0_1_EXTRACT]], ptr [[DATA_FCA_0_1_GEP]], align 4 -; ALL-NEXT: [[DATA_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1 -; ALL-NEXT: [[DATA_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 1 -; ALL-NEXT: store i32 [[DATA_FCA_1_EXTRACT]], ptr [[DATA_FCA_1_GEP]], align 4 -; ALL-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 1 -; ALL-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 -; ALL-NEXT: [[TMP4:%.*]] = icmp eq i32 [[TMP3]], 0 -; ALL-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP1]], i32 0, i32 0 -; ALL-NEXT: br i1 [[TMP4]], label [[TMP13:%.*]], label [[TMP6:%.*]] -; ALL: 6: -; ALL-NEXT: [[TMP7:%.*]] = getelementptr i32, ptr [[TMP1]], i32 0 -; ALL-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4 -; ALL-NEXT: [[TMP9:%.*]] = getelementptr i32, ptr [[TMP1]], i32 0 -; ALL-NEXT: store i32 1, ptr [[TMP9]], align 4 -; ALL-NEXT: [[A0:%.*]] = zext i1 false to i32 -; ALL-NEXT: [[A1:%.*]] = add i32 [[A0]], 30 -; ALL-NEXT: [[A2:%.*]] = add i32 [[A1]], [[PAYLOAD_FCA_0_EXTRACT]] -; ALL-NEXT: [[A3:%.*]] = add i32 [[A2]], 3 -; ALL-NEXT: [[A4:%.*]] = add i32 [[A3]], [[TMP8]] -; ALL-NEXT: [[ADDR:%.*]] = zext i32 [[A4]] to i64 -; ALL-NEXT: [[DOTFCA_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP5]], i32 0, i32 0, i32 0 -; ALL-NEXT: [[DOTFCA_0_0_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_0_GEP]], align 4 -; ALL-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] poison, i32 [[DOTFCA_0_0_LOAD]], 0, 0 -; ALL-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[TMP5]], i32 0, i32 1 -; ALL-NEXT: [[DOTFCA_1_LOAD:%.*]] = load float, ptr [[DOTFCA_1_GEP]], align 4 -; ALL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] [[DOTFCA_0_0_INSERT]], float [[DOTFCA_1_LOAD]], 1 -; ALL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 1, 0 -; ALL-NEXT: [[DOTFCA_1_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; ALL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT1]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; ALL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; ALL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; ALL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; ALL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; ALL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; ALL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; ALL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; ALL-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; ALL-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; ALL-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; ALL-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; ALL-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; ALL-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; ALL-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; ALL-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; ALL-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; ALL-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; ALL-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; ALL-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; ALL-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; ALL-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; ALL-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; ALL-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; ALL-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; ALL-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; ALL-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; ALL-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; ALL-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; ALL-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 [[ADDR]], i64 -1, i32 [[TMP11]], i64 0, [[STRUCT_SYSTEMDATA]] [[DOTFCA_1_INSERT]], [9 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; ALL-NEXT: unreachable -; ALL: 11: -; ALL-NEXT: [[DOTFCA_0_0_GEP1:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[TMP5]], i32 0, i32 0, i32 0 -; ALL-NEXT: [[DOTFCA_0_0_LOAD2:%.*]] = load i32, ptr [[DOTFCA_0_0_GEP1]], align 4 -; ALL-NEXT: [[DOTFCA_0_0_INSERT3:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] poison, i32 [[DOTFCA_0_0_LOAD2]], 0, 0 -; ALL-NEXT: [[DOTFCA_1_GEP4:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[TMP5]], i32 0, i32 1 -; ALL-NEXT: [[DOTFCA_1_LOAD5:%.*]] = load float, ptr [[DOTFCA_1_GEP4]], align 4 -; ALL-NEXT: [[DOTFCA_1_INSERT6:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] [[DOTFCA_0_0_INSERT3]], float [[DOTFCA_1_LOAD5]], 1 -; ALL-NEXT: [[DOTFCA_0_INSERT3:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; ALL-NEXT: [[DOTFCA_1_INSERT7:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT3]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; ALL-NEXT: [[DOTFCA_2_INSERT9:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT7]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; ALL-NEXT: [[DOTFCA_3_INSERT12:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT9]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; ALL-NEXT: [[DOTFCA_4_INSERT15:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT12]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; ALL-NEXT: [[DOTFCA_5_INSERT18:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT15]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; ALL-NEXT: [[DOTFCA_6_INSERT21:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT18]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; ALL-NEXT: [[DOTFCA_7_INSERT24:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT21]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; ALL-NEXT: [[DOTFCA_8_INSERT27:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT24]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; ALL-NEXT: [[DOTFCA_9_INSERT30:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT27]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; ALL-NEXT: [[DOTFCA_10_INSERT33:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT30]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; ALL-NEXT: [[DOTFCA_11_INSERT36:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT33]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; ALL-NEXT: [[DOTFCA_12_INSERT39:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT36]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; ALL-NEXT: [[DOTFCA_13_INSERT42:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT39]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; ALL-NEXT: [[DOTFCA_14_INSERT45:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT42]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; ALL-NEXT: [[DOTFCA_15_INSERT48:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT45]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; ALL-NEXT: [[DOTFCA_16_INSERT51:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT48]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; ALL-NEXT: [[DOTFCA_17_INSERT54:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT51]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; ALL-NEXT: [[DOTFCA_18_INSERT57:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT54]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; ALL-NEXT: [[DOTFCA_19_INSERT60:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT57]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; ALL-NEXT: [[DOTFCA_20_INSERT63:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT60]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; ALL-NEXT: [[DOTFCA_21_INSERT66:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT63]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; ALL-NEXT: [[DOTFCA_22_INSERT69:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT66]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; ALL-NEXT: [[DOTFCA_23_INSERT72:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT69]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; ALL-NEXT: [[DOTFCA_24_INSERT75:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT72]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; ALL-NEXT: [[DOTFCA_25_INSERT78:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT75]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; ALL-NEXT: [[DOTFCA_26_INSERT81:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT78]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; ALL-NEXT: [[DOTFCA_27_INSERT84:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT81]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; ALL-NEXT: [[DOTFCA_28_INSERT87:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT84]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; ALL-NEXT: [[DOTFCA_29_INSERT90:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT87]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; ALL-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; ALL-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 0, i64 -1, i32 [[TMP14]], i64 2, [[STRUCT_SYSTEMDATA]] [[DOTFCA_1_INSERT6]], [9 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT90]]) -; ALL-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/dxil-cps-stack-lowering-global.ll b/llvmraytracing/test/dx/dxil-cps-stack-lowering-global.ll deleted file mode 100644 index 6c0afec5ea..0000000000 --- a/llvmraytracing/test/dx/dxil-cps-stack-lowering-global.ll +++ /dev/null @@ -1,224 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: opt --verify-each -passes='dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=CPS-STACK-LOWERING-CPS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { ptr } -%struct.DispatchSystemData = type { i32 } -%struct.TraversalData = type { %struct.SystemData } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%called.Frame = type { i32 } -%struct.type = type { <2 x float> } - -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i32 @_cont_GetContinuationStackAddr() - -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) - -declare %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(ptr) - -declare void @_AmdRestoreSystemData(ptr) - -define i32 @_cont_GetLocalRootIndex(ptr %data) { - ret i32 5 -} - -declare i64 @_cont_GetContinuationStackGlobalMemBase() - -define void @called(%struct.type %cont.state, i32 %return.addr, i32 %shader.index, %struct.DispatchSystemData %0, {} %padding, [1 x i32] %payload) !lgc.rt.shaderstage !15 !lgc.cps !16 !continuation !17 { -AllocaSpillBB: - %1 = call ptr addrspace(32) @lgc.cps.alloc(i32 8) - %payload.serialization.alloca = alloca [1 x i32], align 4 - %return.addr.spill.addr = getelementptr inbounds %called.Frame, ptr addrspace(32) %1, i32 0, i32 0 - store i32 %return.addr, ptr addrspace(32) %return.addr.spill.addr, align 4 - store [1 x i32] %payload, ptr %payload.serialization.alloca, align 4 - %2 = call %struct.DispatchSystemData @continuations.getSystemData.s_struct.DispatchSystemDatas() - %.fca.0.extract = extractvalue %struct.DispatchSystemData %2, 0 - call void @amd.dx.setLocalRootIndex(i32 5) - %ptr = getelementptr i8, ptr addrspace(32) %1, i32 9 - store i32 99, ptr addrspace(32) %ptr - %csp = ptrtoint ptr addrspace(32) %ptr to i32 - %dis_data.i.fca.0.insert = insertvalue %struct.DispatchSystemData poison, i32 %.fca.0.extract, 0 - %gep.payload = getelementptr i32, ptr %payload.serialization.alloca, i32 0 - store i32 undef, ptr %gep.payload, align 4 - %3 = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @called.resume.0) - %payload.reload = load [1 x i32], ptr %payload.serialization.alloca, align 4 - call void (...) @lgc.cps.jump(i32 2, i32 2, %struct.type %cont.state, i32 %csp, i64 %3, %struct.DispatchSystemData %dis_data.i.fca.0.insert, {} poison, [1 x i32] %payload.reload), !continuation.registercount !16 - unreachable -} - -define void @called.resume.0({} %cont.state, i32 %returnAddr, %struct.type %0, { %struct.DispatchSystemData, {}, [1 x i32] } %1) !lgc.rt.shaderstage !15 !lgc.cps !16 !continuation !17 { -entryresume.0: - %2 = call ptr addrspace(32) @lgc.cps.peek(i32 8) - %csp = ptrtoint ptr addrspace(32) %2 to i32 - %payload.serialization.alloca = alloca [1 x i32], align 4 - %payload = extractvalue { %struct.DispatchSystemData, {}, [1 x i32] } %1, 2 - store [1 x i32] %payload, ptr %payload.serialization.alloca, align 4 - %payload.gep = getelementptr i32, ptr %payload.serialization.alloca, i32 0 - %3 = load i32, ptr %payload.gep, align 4 - %4 = extractvalue %struct.type %0, 0 - %system.data = extractvalue { %struct.DispatchSystemData, {}, [1 x i32]} %1, 0 - %.fca.0.extract3 = extractvalue %struct.DispatchSystemData %system.data, 0 - call void @amd.dx.setLocalRootIndex(i32 5) - %return.addr.reload.addr = getelementptr inbounds %called.Frame, ptr addrspace(32) %2, i32 0, i32 0 - %return.addr.reload = load i32, ptr addrspace(32) %return.addr.reload.addr, align 4 - store i32 %3, ptr %payload.gep, align 4 - %.fca.0.insert = insertvalue %struct.DispatchSystemData poison, i32 %.fca.0.extract3, 0 - call void @lgc.cps.free(i32 8) - %payload.reload = load [1 x i32], ptr %payload.serialization.alloca, align 4 - call void (...) @lgc.cps.jump(i32 %return.addr.reload, i32 2, %struct.type %0, i32 %csp, i64 poison, %struct.DispatchSystemData %.fca.0.insert, {} poison, [1 x i32] %payload.reload), !continuation.registercount !16 - unreachable -} - -; Function Attrs: nofree nounwind willreturn -declare void @amd.dx.setLocalRootIndex(i32) #0 - -; Function Attrs: nounwind willreturn -declare %struct.DispatchSystemData @continuations.getSystemData.s_struct.DispatchSystemDatas() #2 - -; Function Attrs: noreturn -declare void @lgc.cps.jump(...) #3 - -; Function Attrs: nounwind willreturn -declare %struct.DispatchSystemData @lgc.cps.await.s_struct.DispatchSystemDatas(...) #2 - -declare !continuation !17 { ptr, ptr } @continuation.prototype.called(ptr, i1) - -declare ptr @continuation.malloc(i32) - -declare void @continuation.free(ptr) - -; Function Attrs: nounwind -declare token @llvm.coro.id.retcon(i32, i32, ptr, ptr, ptr, ptr) #4 - -; Function Attrs: nounwind -declare ptr @llvm.coro.begin(token, ptr writeonly) #4 - -; Function Attrs: nounwind -declare i1 @llvm.coro.suspend.retcon.i1(...) #4 - -; Function Attrs: nounwind willreturn -declare %struct.DispatchSystemData @continuations.getReturnValue.s_struct.DispatchSystemDatas() #2 - -; Function Attrs: noreturn -declare void @continuation.return(...) #3 - -; Function Attrs: nounwind willreturn memory(inaccessiblemem: readwrite) -declare ptr addrspace(32) @lgc.cps.alloc(i32) #5 - -; Function Attrs: nounwind willreturn -declare i64 @lgc.cps.as.continuation.reference__i64(...) #2 - -; Function Attrs: nounwind willreturn memory(inaccessiblemem: read) -declare ptr addrspace(32) @lgc.cps.peek(i32) #6 - -; Function Attrs: nounwind willreturn memory(inaccessiblemem: readwrite) -declare void @lgc.cps.free(i32) #5 - -declare void @lgc.ilcps.continue(...) - -attributes #0 = { nofree nounwind willreturn } -attributes #1 = { nofree norecurse nosync nounwind willreturn memory(argmem: write) } -attributes #2 = { nounwind willreturn } -attributes #3 = { noreturn } -attributes #4 = { nounwind } -attributes #5 = { nounwind willreturn memory(inaccessiblemem: readwrite) } -attributes #6 = { nounwind willreturn memory(inaccessiblemem: read) } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.entryPoints = !{!3, !6} -!lgc.cps.module = !{} -!continuation.maxPayloadRegisterCount = !{!13} -!continuation.stackAddrspace = !{!14} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{null, !"", null, !4, !12} -!4 = !{!5, !9, null, null} -!5 = !{!6} -!6 = !{ptr @called, !"called", null, null, !7} -!7 = !{i32 8, i32 12, i32 6, i32 16, i32 7, i32 8, i32 5, !8} -!8 = !{i32 0} -!9 = !{!10} -!10 = !{i32 0, ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !11} -!11 = !{i32 0, i32 9} -!12 = !{i32 0, i64 65536} -!13 = !{i32 30} -!14 = !{i32 22} -!15 = !{i32 5} -!16 = !{i32 1} -!17 = !{ptr @called} -; CPS-STACK-LOWERING-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; CPS-STACK-LOWERING-CPS-SAME: ptr [[DATA:%.*]]) { -; CPS-STACK-LOWERING-CPS-NEXT: ret i32 5 -; -; -; CPS-STACK-LOWERING-CPS-LABEL: define void @called( -; CPS-STACK-LOWERING-CPS-SAME: [[STRUCT_TYPE:%.*]] [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURN_ADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], {} [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META15:![0-9]+]] !lgc.cps [[META16:![0-9]+]] !continuation [[META17:![0-9]+]] { -; CPS-STACK-LOWERING-CPS-NEXT: AllocaSpillBB: -; CPS-STACK-LOWERING-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 8 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[TMP4]], ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP3]] -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[RETURN_ADDR]], ptr addrspace(22) [[TMP5]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: store [1 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP6:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] @[[CONTINUATIONS_GETSYSTEMDATA_S_STRUCT_DISPATCHSYSTEMDATAS:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]]() -; CPS-STACK-LOWERING-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP6]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP7:%.*]] = add i32 [[TMP3]], 9 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP7]] -; CPS-STACK-LOWERING-CPS-NEXT: store i32 99, ptr addrspace(22) [[TMP8]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[GEP_PAYLOAD:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 undef, ptr [[GEP_PAYLOAD]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP10:%.*]] = call i64 @continuation.getAddrAndMD(ptr @called.resume.0) -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_RELOAD:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 2, i32 [[TMP9]], i64 [[TMP10]], [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], {} poison, [1 x i32] [[PAYLOAD_RELOAD]]) -; CPS-STACK-LOWERING-CPS-NEXT: unreachable -; -; -; CPS-STACK-LOWERING-CPS-LABEL: define void @called.resume.0( -; CPS-STACK-LOWERING-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], [[STRUCT_TYPE:%.*]] [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], {}, [1 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META15]] !lgc.cps [[META16]] !continuation [[META17]] { -; CPS-STACK-LOWERING-CPS-NEXT: entryresume.0: -; CPS-STACK-LOWERING-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP2:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr addrspace(22) -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -8 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], {}, [1 x i32] } [[TMP1]], 2 -; CPS-STACK-LOWERING-CPS-NEXT: store [1 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_GEP:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP6:%.*]] = load i32, ptr [[PAYLOAD_GEP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP7:%.*]] = extractvalue [[STRUCT_TYPE]] [[TMP0]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[SYSTEM_DATA:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], {}, [1 x i32] } [[TMP1]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[DOTFCA_0_EXTRACT3:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[SYSTEM_DATA]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP5]] -; CPS-STACK-LOWERING-CPS-NEXT: [[RETURN_ADDR_RELOAD:%.*]] = load i32, ptr addrspace(22) [[TMP8]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[TMP6]], ptr [[PAYLOAD_GEP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT3]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], -8 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[TMP10]], ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_RELOAD:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP11:%.*]] = zext i32 [[RETURN_ADDR_RELOAD]] to i64 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP11]], i32 [[TMP12]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], {} poison, [1 x i32] [[PAYLOAD_RELOAD]]) -; CPS-STACK-LOWERING-CPS-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/dxil-cps-stack-lowering-scratch.ll b/llvmraytracing/test/dx/dxil-cps-stack-lowering-scratch.ll deleted file mode 100644 index af6de2dfe7..0000000000 --- a/llvmraytracing/test/dx/dxil-cps-stack-lowering-scratch.ll +++ /dev/null @@ -1,221 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: opt --verify-each -passes='dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=CPS-STACK-LOWERING-CPS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { ptr } -%struct.DispatchSystemData = type { i32 } -%struct.TraversalData = type { %struct.SystemData } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%called.Frame = type { i32 } -%struct.type = type { <2 x float> } - -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i32 @_cont_GetContinuationStackAddr() - -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) - -declare %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(ptr) - -declare void @_AmdRestoreSystemData(ptr) - -define i32 @_cont_GetLocalRootIndex(ptr %data) { - ret i32 5 -} - -declare i64 @_cont_GetContinuationStackGlobalMemBase() - -define void @called(%struct.type %cont.state, i32 %return.addr, i32 %shader.index, %struct.DispatchSystemData %0, {} %padding, [1 x i32] %payload) !lgc.rt.shaderstage !15 !lgc.cps !16 !continuation !17 { -AllocaSpillBB: - %1 = call ptr addrspace(32) @lgc.cps.alloc(i32 8) - %payload.serialization.alloca = alloca [1 x i32], align 4 - %return.addr.spill.addr = getelementptr inbounds %called.Frame, ptr addrspace(32) %1, i32 0, i32 0 - store i32 %return.addr, ptr addrspace(32) %return.addr.spill.addr, align 4 - store [1 x i32] %payload, ptr %payload.serialization.alloca, align 4 - %2 = call %struct.DispatchSystemData @continuations.getSystemData.s_struct.DispatchSystemDatas() - %.fca.0.extract = extractvalue %struct.DispatchSystemData %2, 0 - call void @amd.dx.setLocalRootIndex(i32 5) - %ptr = getelementptr i8, ptr addrspace(32) %1, i32 9 - store i32 99, ptr addrspace(32) %ptr - %csp = ptrtoint ptr addrspace(32) %ptr to i32 - %dis_data.i.fca.0.insert = insertvalue %struct.DispatchSystemData poison, i32 %.fca.0.extract, 0 - %gep.payload = getelementptr i32, ptr %payload.serialization.alloca, i32 0 - store i32 undef, ptr %gep.payload, align 4 - %3 = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @called.resume.0) - %payload.reload = load [1 x i32], ptr %payload.serialization.alloca, align 4 - call void (...) @lgc.cps.jump(i32 2, i32 2, %struct.type %cont.state, i32 %csp, i64 %3, %struct.DispatchSystemData %dis_data.i.fca.0.insert, {} poison, [1 x i32] %payload.reload), !continuation.registercount !16 - unreachable -} - -define void @called.resume.0({} %cont.state, i32 %returnAddr, %struct.type %0, { %struct.DispatchSystemData, {}, [1 x i32] } %1) !lgc.rt.shaderstage !15 !lgc.cps !16 !continuation !17 { -entryresume.0: - %2 = call ptr addrspace(32) @lgc.cps.peek(i32 8) - %csp = ptrtoint ptr addrspace(32) %2 to i32 - %payload.serialization.alloca = alloca [1 x i32], align 4 - %payload = extractvalue { %struct.DispatchSystemData, {}, [1 x i32] } %1, 2 - store [1 x i32] %payload, ptr %payload.serialization.alloca, align 4 - %payload.gep = getelementptr i32, ptr %payload.serialization.alloca, i32 0 - %3 = load i32, ptr %payload.gep, align 4 - %4 = extractvalue %struct.type %0, 0 - %system.data = extractvalue { %struct.DispatchSystemData, {}, [1 x i32]} %1, 0 - %.fca.0.extract3 = extractvalue %struct.DispatchSystemData %system.data, 0 - call void @amd.dx.setLocalRootIndex(i32 5) - %return.addr.reload.addr = getelementptr inbounds %called.Frame, ptr addrspace(32) %2, i32 0, i32 0 - %return.addr.reload = load i32, ptr addrspace(32) %return.addr.reload.addr, align 4 - store i32 %3, ptr %payload.gep, align 4 - %.fca.0.insert = insertvalue %struct.DispatchSystemData poison, i32 %.fca.0.extract3, 0 - call void @lgc.cps.free(i32 8) - %payload.reload = load [1 x i32], ptr %payload.serialization.alloca, align 4 - call void (...) @lgc.cps.jump(i32 %return.addr.reload, i32 2, %struct.type %0, i32 %csp, i64 poison, %struct.DispatchSystemData %.fca.0.insert, {} poison, [1 x i32] %payload.reload), !continuation.registercount !16 - unreachable -} - -; Function Attrs: nofree nounwind willreturn -declare void @amd.dx.setLocalRootIndex(i32) #0 - -; Function Attrs: nounwind willreturn -declare %struct.DispatchSystemData @continuations.getSystemData.s_struct.DispatchSystemDatas() #2 - -; Function Attrs: noreturn -declare void @lgc.cps.jump(...) #3 - -; Function Attrs: nounwind willreturn -declare %struct.DispatchSystemData @lgc.cps.await.s_struct.DispatchSystemDatas(...) #2 - -declare !continuation !17 { ptr, ptr } @continuation.prototype.called(ptr, i1) - -declare ptr @continuation.malloc(i32) - -declare void @continuation.free(ptr) - -; Function Attrs: nounwind -declare token @llvm.coro.id.retcon(i32, i32, ptr, ptr, ptr, ptr) #4 - -; Function Attrs: nounwind -declare ptr @llvm.coro.begin(token, ptr writeonly) #4 - -; Function Attrs: nounwind -declare i1 @llvm.coro.suspend.retcon.i1(...) #4 - -; Function Attrs: nounwind willreturn -declare %struct.DispatchSystemData @continuations.getReturnValue.s_struct.DispatchSystemDatas() #2 - -; Function Attrs: noreturn -declare void @continuation.return(...) #3 - -; Function Attrs: nounwind willreturn memory(inaccessiblemem: readwrite) -declare ptr addrspace(32) @lgc.cps.alloc(i32) #5 - -; Function Attrs: nounwind willreturn -declare i64 @lgc.cps.as.continuation.reference__i64(...) #2 - -; Function Attrs: nounwind willreturn memory(inaccessiblemem: read) -declare ptr addrspace(32) @lgc.cps.peek(i32) #6 - -; Function Attrs: nounwind willreturn memory(inaccessiblemem: readwrite) -declare void @lgc.cps.free(i32) #5 - -attributes #0 = { nofree nounwind willreturn } -attributes #1 = { nofree norecurse nosync nounwind willreturn memory(argmem: write) } -attributes #2 = { nounwind willreturn } -attributes #3 = { noreturn } -attributes #4 = { nounwind } -attributes #5 = { nounwind willreturn memory(inaccessiblemem: readwrite) } -attributes #6 = { nounwind willreturn memory(inaccessiblemem: read) } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.entryPoints = !{!3, !6} -!lgc.cps.module = !{} -!continuation.maxPayloadRegisterCount = !{!13} -!continuation.stackAddrspace = !{!14} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{null, !"", null, !4, !12} -!4 = !{!5, !9, null, null} -!5 = !{!6} -!6 = !{ptr @called, !"called", null, null, !7} -!7 = !{i32 8, i32 12, i32 6, i32 16, i32 7, i32 8, i32 5, !8} -!8 = !{i32 0} -!9 = !{!10} -!10 = !{i32 0, ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !11} -!11 = !{i32 0, i32 9} -!12 = !{i32 0, i64 65536} -!13 = !{i32 30} -!14 = !{i32 21} -!15 = !{i32 5} -!16 = !{i32 1} -!17 = !{ptr @called} -; CPS-STACK-LOWERING-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; CPS-STACK-LOWERING-CPS-SAME: ptr [[DATA:%.*]]) { -; CPS-STACK-LOWERING-CPS-NEXT: ret i32 5 -; -; -; CPS-STACK-LOWERING-CPS-LABEL: define void @called( -; CPS-STACK-LOWERING-CPS-SAME: [[STRUCT_TYPE:%.*]] [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURN_ADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], {} [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META15:![0-9]+]] !lgc.cps [[META16:![0-9]+]] !continuation [[META17:![0-9]+]] { -; CPS-STACK-LOWERING-CPS-NEXT: AllocaSpillBB: -; CPS-STACK-LOWERING-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 8 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[RETURN_ADDR]], ptr addrspace(21) [[TMP4]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: store [1 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP5:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] @[[CONTINUATIONS_GETSYSTEMDATA_S_STRUCT_DISPATCHSYSTEMDATAS:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]]() -; CPS-STACK-LOWERING-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP5]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP6:%.*]] = add i32 [[TMP1]], 9 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP6]] to ptr addrspace(21) -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP7]], i32 0 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 99, ptr addrspace(21) [[TMP8]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[GEP_PAYLOAD:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 undef, ptr [[GEP_PAYLOAD]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP10:%.*]] = call i64 @continuation.getAddrAndMD(ptr @called.resume.0) -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_RELOAD:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 2, i32 [[TMP9]], i64 [[TMP10]], [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], {} poison, [1 x i32] [[PAYLOAD_RELOAD]]) -; CPS-STACK-LOWERING-CPS-NEXT: unreachable -; -; -; CPS-STACK-LOWERING-CPS-LABEL: define void @called.resume.0( -; CPS-STACK-LOWERING-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], [[STRUCT_TYPE:%.*]] [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], {}, [1 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META15]] !lgc.cps [[META16]] !continuation [[META17]] { -; CPS-STACK-LOWERING-CPS-NEXT: entryresume.0: -; CPS-STACK-LOWERING-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], -8 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], {}, [1 x i32] } [[TMP1]], 2 -; CPS-STACK-LOWERING-CPS-NEXT: store [1 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_GEP:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[PAYLOAD_GEP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP5:%.*]] = extractvalue [[STRUCT_TYPE]] [[TMP0]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[SYSTEM_DATA:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], {}, [1 x i32] } [[TMP1]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[DOTFCA_0_EXTRACT3:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[SYSTEM_DATA]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP6]], i32 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[RETURN_ADDR_RELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP7]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[TMP4]], ptr [[PAYLOAD_GEP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT3]], 0 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], -8 -; CPS-STACK-LOWERING-CPS-NEXT: store i32 [[TMP9]], ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[PAYLOAD_RELOAD:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP10:%.*]] = zext i32 [[RETURN_ADDR_RELOAD]] to i64 -; CPS-STACK-LOWERING-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; CPS-STACK-LOWERING-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP10]], i32 [[TMP11]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], {} poison, [1 x i32] [[PAYLOAD_RELOAD]]) -; CPS-STACK-LOWERING-CPS-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/free-raygen-cont-state-in-persistent-launch.ll b/llvmraytracing/test/dx/free-raygen-cont-state-in-persistent-launch.ll index 1fbed145f8..a4d0cf6847 100644 --- a/llvmraytracing/test/dx/free-raygen-cont-state-in-persistent-launch.ll +++ b/llvmraytracing/test/dx/free-raygen-cont-state-in-persistent-launch.ll @@ -1,16 +1,45 @@ +; NOTE: Do not autogenerate ; Tests that if _cont_ExitRayGen ends with an enqueue, then we still free RayGen continuation state. ; This is a regression test, in an earlier version we only freed for returns and missed this case. -; RUN: grep -v "lgc.cps.module" %s | opt --verify-each -passes="dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck %s -; RUN: opt --verify-each -passes="dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,remove-types-metadata" -S %s --lint-abort-on-error | FileCheck %s +; RUN: grep -v "lgc.cps.module" %s | opt --verify-each -passes="dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes="dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint,remove-types-metadata" -S %s --lint-abort-on-error | FileCheck %s ; There is just a single RayGen shader in this module, so any free must come from it. -; CHECK: call void @lgc.cps.free +; lgc.cps.free is lowered during cleanup-continuations. + +; CHECK-LABEL: define void @MyRayGen +; CHECK: [[CSP:%.*]] = alloca i32, align 4 + +; alloc(VALUE) +; CHECK: [[LOAD:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK: [[NEW:%.*]] = add i32 [[LOAD]], [[VALUE:[0-9]+]] +; CHECK: store i32 [[NEW]], ptr [[CSP]], align 4 + +; jump +; CHECK: [[LOAD2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK: call void (...) @lgc.cps.jump({{i64|i32}} {{.*}}, i32 {{.*}}, i32 [[LOAD2]] + +; CHECK-LABEL: define dso_local void @MyRayGen.resume.0 +; CHECK: [[CSP2:%.*]] = alloca i32, align 4 + +; peek(VALUE) +; CHECK: [[LOAD3:%.*]] = load i32, ptr [[CSP2]], align 4 +; CHECK: [[NEW3:%.*]] = add i32 [[LOAD3]], -[[VALUE]] + +; free(VALUE) +; CHECK: [[LOAD4:%.*]] = load i32, ptr [[CSP2]], align 4 +; CHECK: [[NEW4:%.*]] = add i32 [[LOAD4]], -[[VALUE]] +; CHECK: store i32 [[NEW4]], ptr [[CSP2]], align 4 + +; jump +; CHECK: [[LOAD5:%.*]] = load i32, ptr [[CSP2]], align 4 +; CHECK: call void (...) @lgc.cps.jump({{i64|i32}} {{.*}}, i32 {{.*}}, i32 [[LOAD5]] target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" %dx.types.Handle = type { i8* } %struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i64 } +%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i32 } %struct.SystemData = type { %struct.DispatchSystemData } %struct.HitData = type { <3 x float>, <3 x float>, float, i32 } %struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } @@ -28,18 +57,14 @@ define i32 @_cont_GetContinuationStackAddr() #0 { ret i32 0 } -declare void @_AmdEnqueue(i64, i64, %struct.SystemData) +declare void @_AmdEnqueue(i32, i32, %struct.SystemData) define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwind !pointeetys !{%struct.DispatchSystemData poison} { - call void @_AmdEnqueue(i64 1, i64 1, %struct.SystemData poison) + call void @_AmdEnqueue(i32 1, i32 1, %struct.SystemData poison) unreachable } -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #0 - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #0 - -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #0 +declare %struct.DispatchSystemData @_AmdAwaitTraversal(i32, %struct.TraversalData) #0 declare !pointeetys !32 %struct.HitData @_cont_GetCandidateState(%struct.AnyHitTraversalData* %data) #0 @@ -63,7 +88,7 @@ define i1 @_cont_IsEndSearch(%struct.TraversalData*) #0 !pointeetys !40 { declare !pointeetys !42 i32 @_cont_HitKind(%struct.SystemData*) #0 ; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #1 +declare i32 @_AmdGetResumePointAddr() #1 ; Function Attrs: nounwind declare !pointeetys !43 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) #1 @@ -87,9 +112,9 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %addr = call i64 @_AmdGetResumePointAddr() #3 - %trav_data2 = insertvalue %struct.TraversalData %trav_data, i64 %addr, 5 - %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i64 4, %struct.TraversalData %trav_data2) + %addr = call i32 @_AmdGetResumePointAddr() #3 + %trav_data2 = insertvalue %struct.TraversalData %trav_data, i32 %addr, 5 + %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i32 4, %struct.TraversalData %trav_data2) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void diff --git a/llvmraytracing/test/dx/global-mem-stack.ll b/llvmraytracing/test/dx/global-mem-stack.ll deleted file mode 100644 index 4f2df75b65..0000000000 --- a/llvmraytracing/test/dx/global-mem-stack.ll +++ /dev/null @@ -1,222 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i64 } -%struct.SystemData = type { %struct.DispatchSystemData, %struct.BuiltInTriangleIntersectionAttributes } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.HitData = type { float, i32 } -%struct.RayPayload = type { <4 x float> } - -declare i32 @_cont_GetContinuationStackAddr() - -declare i64 @_cont_GetContinuationStackGlobalMemBase() - -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) - -declare %struct.TraversalData @_AmdAwaitAnyHit(i64, %struct.TraversalData, float, i32) - -declare !pointeetys !9 i32 @_cont_HitKind(%struct.SystemData*) - -declare i64 @_AmdGetResumePointAddr() - -declare !pointeetys !11 %struct.HitData @_cont_GetCommittedState(%struct.SystemData*) - -declare !pointeetys !12 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) - -declare !pointeetys !14 void @_AmdRestoreSystemDataAnyHit(%struct.TraversalData*) - -declare !pointeetys !14 void @_cont_AcceptHit(%struct.TraversalData* nocapture readnone) - -declare !pointeetys !14 void @_AmdAcceptHitAttributes(%struct.TraversalData*) - -declare !pointeetys !26 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) - -declare i1 @opaqueIsEnd() - -define i1 @_cont_IsEndSearch(%struct.TraversalData* %data) !pointeetys !16 { - %isEnd = call i1 @opaqueIsEnd() - ret i1 %isEnd -} - -define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData* %data) !pointeetys !17 { - %addr = getelementptr %struct.SystemData, %struct.SystemData* %data, i32 0, i32 1 - %val = load %struct.BuiltInTriangleIntersectionAttributes, %struct.BuiltInTriangleIntersectionAttributes* %addr, align 4 - ret %struct.BuiltInTriangleIntersectionAttributes %val -} - -define void @_cont_SetTriangleHitAttributes(%struct.SystemData* %data, %struct.BuiltInTriangleIntersectionAttributes %val) !pointeetys !18 { - %addr = getelementptr %struct.SystemData, %struct.SystemData* %data, i32 0, i32 1 - store %struct.BuiltInTriangleIntersectionAttributes %val, %struct.BuiltInTriangleIntersectionAttributes* %addr, align 4 - ret void -} - -declare !pointeetys !19 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) !pointeetys !19 { - ret i32 5 -} - -declare !pointeetys !20 i32 @_cont_DispatchRaysIndex(%struct.DispatchSystemData* nocapture readnone, i32) - -declare !pointeetys !21 float @_cont_ObjectRayOrigin(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32) - -declare !pointeetys !21 float @_cont_ObjectRayDirection(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*, i32) - -declare !pointeetys !12 void @_cont_AcceptHitAndEndSearch(%struct.DispatchSystemData* nocapture readnone) - -define void @MyClosestHitShader(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readonly %attr) !pointeetys !23 { - %1 = getelementptr inbounds %struct.BuiltInTriangleIntersectionAttributes, %struct.BuiltInTriangleIntersectionAttributes* %attr, i32 0, i32 0 - %2 = load <2 x float>, <2 x float>* %1, align 4 - %3 = extractelement <2 x float> %2, i32 0 - %4 = fsub fast float 1.000000e+00, %3 - %5 = extractelement <2 x float> %2, i32 1 - %6 = fsub fast float %4, %5 - %7 = insertelement <4 x float> undef, float %6, i64 0 - %8 = insertelement <4 x float> %7, float %3, i64 1 - %9 = insertelement <4 x float> %8, float %5, i64 2 - %10 = insertelement <4 x float> %9, float 1.000000e+00, i64 3 - %11 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %payload, i32 0, i32 0 - store <4 x float> %10, <4 x float>* %11, align 4 - ret void -} - -!dx.shaderModel = !{!0} -!dx.resources = !{!1} -!dx.entryPoints = !{!2, !4} -!continuation.stackAddrspace = !{!7} -!continuation.maxPayloadRegisterCount = !{!8} - -!0 = !{!"lib", i32 6, i32 6} -!1 = !{null, null, null, null} -!2 = !{null, !"", null, !1, !3} -!3 = !{i32 0, i64 65536} -!4 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @MyClosestHitShader, !"MyClosestHitShader", null, null, !5} -!5 = !{i32 8, i32 10, i32 6, i32 16, i32 7, i32 8, i32 5, !6} -!6 = !{i32 0} -!7 = !{i32 22} -!8 = !{i32 2} -!9 = !{%struct.SystemData poison} -!10 = !{i32 0, %struct.SystemData poison} -!11 = !{%struct.SystemData poison} -!12 = !{%struct.DispatchSystemData poison} -!13 = !{i32 0, %struct.DispatchSystemData poison} -!14 = !{%struct.TraversalData poison} -!15 = !{i32 0, %struct.TraversalData poison} -!16 = !{%struct.TraversalData poison} -!17 = !{%struct.SystemData poison} -!18 = !{%struct.SystemData poison} -!19 = !{%struct.DispatchSystemData poison} -!20 = !{%struct.DispatchSystemData poison} -!21 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!22 = !{i32 0, %struct.HitData poison} -!23 = !{null, %struct.RayPayload poison, %struct.BuiltInTriangleIntersectionAttributes poison} -!24 = !{i32 0, %struct.RayPayload poison} -!25 = !{i32 0, %struct.BuiltInTriangleIntersectionAttributes poison} -!26 = !{%struct.TraversalData poison} -; CHECK-LABEL: define i1 @_cont_IsEndSearch( -; CHECK-SAME: ptr [[DATA:%.*]]) { -; CHECK-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; CHECK-NEXT: ret i1 [[ISEND]] -; -; -; CHECK-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; CHECK-SAME: ptr [[DATA:%.*]]) { -; CHECK-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; CHECK-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; CHECK-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; CHECK-LABEL: define void @_cont_SetTriangleHitAttributes( -; CHECK-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) { -; CHECK-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; CHECK-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; CHECK-NEXT: ret void -; -; -; CHECK-LABEL: define i32 @_cont_GetLocalRootIndex( -; CHECK-SAME: ptr [[DATA:%.*]]) { -; CHECK-NEXT: ret i32 5 -; -; -; CHECK-LABEL: define void @MyClosestHitShader( -; CHECK-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [2 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META9:![0-9]+]] !continuation [[META10:![0-9]+]] { -; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; CHECK-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; CHECK-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [2 x i32] [[PAYLOAD]], 0 -; CHECK-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [2 x i32] [[PAYLOAD]], 1 -; CHECK-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; CHECK-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 1, 0 -; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP3]] -; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr addrspace(22) [[TMP4]], align 4 -; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to float -; CHECK-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP6]], i32 0 -; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP3]], 4 -; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP7]] -; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(22) [[TMP8]], align 4 -; CHECK-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float -; CHECK-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP10]], i32 1 -; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP3]], 8 -; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP11]] -; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(22) [[TMP12]], align 4 -; CHECK-NEXT: [[TMP14:%.*]] = bitcast i32 [[TMP13]] to float -; CHECK-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP14]], i32 2 -; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP3]], 12 -; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP15]] -; CHECK-NEXT: [[TMP17:%.*]] = load i32, ptr addrspace(22) [[TMP16]], align 4 -; CHECK-NEXT: [[TMP18:%.*]] = bitcast i32 [[TMP17]] to float -; CHECK-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP18]], i32 3 -; CHECK-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTFCA_1_0_EXTRACT]], 0 -; CHECK-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; CHECK-NEXT: [[DOTSROA_08_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; CHECK-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_08_0_VEC_EXTRACT]] to i32 -; CHECK-NEXT: [[TMP20:%.*]] = bitcast i32 [[TMP19]] to float -; CHECK-NEXT: [[HITATTRS_SROA_0_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP20]], i32 0 -; CHECK-NEXT: [[DOTSROA_08_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; CHECK-NEXT: [[TMP21:%.*]] = bitcast float [[DOTSROA_08_4_VEC_EXTRACT]] to i32 -; CHECK-NEXT: [[TMP22:%.*]] = bitcast i32 [[TMP21]] to float -; CHECK-NEXT: [[HITATTRS_SROA_0_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[HITATTRS_SROA_0_0_VEC_INSERT]], float [[TMP22]], i32 1 -; CHECK-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CHECK-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 0 -; CHECK-NEXT: [[TMP25:%.*]] = fsub fast float 1.000000e+00, [[TMP24]] -; CHECK-NEXT: [[TMP26:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 1 -; CHECK-NEXT: [[TMP27:%.*]] = fsub fast float [[TMP25]], [[TMP26]] -; CHECK-NEXT: [[TMP28:%.*]] = insertelement <4 x float> undef, float [[TMP27]], i64 0 -; CHECK-NEXT: [[TMP29:%.*]] = insertelement <4 x float> [[TMP28]], float [[TMP24]], i64 1 -; CHECK-NEXT: [[TMP30:%.*]] = insertelement <4 x float> [[TMP29]], float [[TMP26]], i64 2 -; CHECK-NEXT: [[TMP31:%.*]] = insertelement <4 x float> [[TMP30]], float 1.000000e+00, i64 3 -; CHECK-NEXT: [[TMP33:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; CHECK-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP31]], i32 0 -; CHECK-NEXT: [[TMP34:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CHECK-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP33]] -; CHECK-NEXT: store i32 [[TMP34]], ptr addrspace(22) [[TMP35]], align 4 -; CHECK-NEXT: [[TMP36:%.*]] = add i32 [[TMP33]], 4 -; CHECK-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP31]], i32 1 -; CHECK-NEXT: [[TMP37:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CHECK-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP36]] -; CHECK-NEXT: store i32 [[TMP37]], ptr addrspace(22) [[TMP38]], align 4 -; CHECK-NEXT: [[TMP39:%.*]] = add i32 [[TMP33]], 8 -; CHECK-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP31]], i32 2 -; CHECK-NEXT: [[TMP40:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; CHECK-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP39]] -; CHECK-NEXT: store i32 [[TMP40]], ptr addrspace(22) [[TMP41]], align 4 -; CHECK-NEXT: [[TMP42:%.*]] = add i32 [[TMP33]], 12 -; CHECK-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP31]], i32 3 -; CHECK-NEXT: [[TMP43:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; CHECK-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP42]] -; CHECK-NEXT: store i32 [[TMP43]], ptr addrspace(22) [[TMP44]], align 4 -; CHECK-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; CHECK-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [2 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CHECK-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CHECK-NEXT: [[TMP45:%.*]] = load i32, ptr [[CSP]], align 4 -; CHECK-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP45]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [21 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT]]) -; CHECK-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/inline-const-jump-target.ll b/llvmraytracing/test/dx/inline-const-jump-target.ll index c7f5d05a8e..2d20231e67 100644 --- a/llvmraytracing/test/dx/inline-const-jump-target.ll +++ b/llvmraytracing/test/dx/inline-const-jump-target.ll @@ -54,7 +54,7 @@ define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwin define internal void @Callable(%struct.Payload* %payload) !pointeetys !23 !lgc.rt.shaderstage !25 { ; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define internal void @Callable( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [0 x i32] [[PADDING:%.*]], [0 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META15:![0-9]+]] !lgc.cps [[META16:![0-9]+]] !continuation [[META17:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-CPS-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [0 x i32] [[PADDING:%.*]], [0 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META15:![0-9]+]] !lgc.cps [[META16:![0-9]+]] !continuation.registercount [[META8:![0-9]+]] !continuation [[META17:![0-9]+]] { ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: entry: ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 @@ -62,7 +62,7 @@ define internal void @Callable(%struct.Payload* %payload) !pointeetys !23 !lgc.r ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[SHADER_INDEX]], ptr @debug_global, align 4 ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP1]]), !continuation.registercount [[META8:![0-9]+]] +; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP1]]), !continuation.registercount [[META8]] ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable ; entry: @@ -75,29 +75,29 @@ define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) !pointe %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 %callable.addr = call i32 @_AmdGetFuncAddrCallable() %ret.addr = call i32 @get.ret.addr() - call void (...) @lgc.cps.jump(i32 %callable.addr, i32 2, {} poison, i32 poison, i32 %ret.addr, i32 999, %struct.DispatchSystemData %dis_data, {} poison, [0 x i32] poison, [0 x i32] poison) + call void (...) @lgc.cps.jump(i32 %callable.addr, i32 2, i32 poison, i32 %ret.addr, i32 999, %struct.DispatchSystemData %dis_data, {} poison, [0 x i32] poison, [0 x i32] poison) unreachable } define void @main() { ; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @main( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8]] !lgc.cps [[META18:![0-9]+]] !continuation [[META19:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-CPS-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8]] !lgc.cps [[META18:![0-9]+]] !continuation.registercount [[META8]] !continuation [[META19:![0-9]+]] { ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS:%.*]], align 4 ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @Callable) +; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @Callable) ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RET_ADDR_I:%.*]] = call i32 @get.ret.addr() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[TMP2]], i32 2, {} poison, i32 poison, i32 [[RET_ADDR_I]], i32 999, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], {} poison, [0 x i32] poison, [0 x i32] poison) +; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[TMP2]], i32 2, i32 poison, i32 [[RET_ADDR_I]], i32 999, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], {} poison, [0 x i32] poison, [0 x i32] poison) ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable ; LOWERRAYTRACINGPIPELINE-CPS: _cont_CallShader.exit: ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @lgc.cps.complete() ; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable ; ; JUMP-INLINER-CPS-LABEL: define void @main( -; JUMP-INLINER-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !lgc.cps [[META15:![0-9]+]] !continuation [[META16:![0-9]+]] { +; JUMP-INLINER-CPS-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !lgc.cps [[META15:![0-9]+]] !continuation.registercount [[META8]] !continuation [[META16:![0-9]+]] { ; JUMP-INLINER-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_I:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; JUMP-INLINER-CPS-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS:%.*]], align 4 ; JUMP-INLINER-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 @@ -110,7 +110,7 @@ define void @main() { ; JUMP-INLINER-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], ptr [[SYSTEM_DATA_ALLOCA_I]], align 4 ; JUMP-INLINER-CPS-NEXT: store i32 999, ptr @debug_global, align 4 ; JUMP-INLINER-CPS-NEXT: [[TMP2:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA_I]], align 4 -; JUMP-INLINER-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RET_ADDR_I]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP2]]), !continuation.registercount [[META8]] +; JUMP-INLINER-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RET_ADDR_I]], i32 6, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP2]]), !continuation.registercount [[META8]] ; JUMP-INLINER-CPS-NEXT: unreachable ; JUMP-INLINER-CPS: Callable.exit: ; JUMP-INLINER-CPS-NEXT: unreachable diff --git a/llvmraytracing/test/dx/intersection-registercount.ll b/llvmraytracing/test/dx/intersection-registercount.ll index 38e7b3b443..0500ba35e9 100644 --- a/llvmraytracing/test/dx/intersection-registercount.ll +++ b/llvmraytracing/test/dx/intersection-registercount.ll @@ -1,4 +1,5 @@ -; RUN: opt --verify-each --report-payload-register-sizes=max -passes='dxil-cont-intrinsic-prepare,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,continuations-stats-report,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s +; NOTE: Do not autogenerate +; RUN: opt --verify-each --report-payload-register-sizes=max -passes='dxil-cont-prepare-gpurt-library,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,continuations-stats-report,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s ; CHECK: Incoming and max outgoing payload VGPR size of "Intersection" (intersection): 25 and 25 dwords @@ -31,7 +32,7 @@ declare !pointeetys !19 i1 @_cont_IsEndSearch(%struct.TraversalData*) #0 declare %struct.DispatchSystemData @_cont_Traversal(%struct.TraversalData) #0 -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #0 +declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32, %struct.AnyHitTraversalData, float, i32) #0 declare !pointeetys !21 %struct.HitData @_cont_GetCandidateState(%struct.AnyHitTraversalData*) #0 @@ -54,7 +55,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) #0 !pointeetys !27 { %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) + %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32 3, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 ret i1 true } diff --git a/llvmraytracing/test/dx/intrinsics/complete.ll b/llvmraytracing/test/dx/intrinsics/complete.ll index 4e825e53c2..fc460fb4da 100644 --- a/llvmraytracing/test/dx/intrinsics/complete.ll +++ b/llvmraytracing/test/dx/intrinsics/complete.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,lower-raytracing-pipeline,lint' -S %s --lint-abort-on-error | FileCheck --check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint' -S %s --lint-abort-on-error | FileCheck --check-prefix=CLEANUP %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,lower-raytracing-pipeline,lint' -S %s --lint-abort-on-error | FileCheck --check-prefix=LOWERRAYTRACINGPIPELINE %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint' -S %s --lint-abort-on-error | FileCheck --check-prefix=CLEANUP %s %struct.DispatchSystemData = type { i32 } %struct.TraversalData = type { i32 } @@ -13,8 +13,8 @@ declare !pointeetys !2 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) declare !pointeetys !3 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) define void @_cont_Traversal(%struct.TraversalData %data) #1 !lgc.rt.shaderstage !0 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.TraversalData @_cont_Traversal( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-LABEL: define void @_cont_Traversal( +; LOWERRAYTRACINGPIPELINE-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] { ; LOWERRAYTRACINGPIPELINE-NEXT: AllocaSpillBB: ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 @@ -26,8 +26,10 @@ define void @_cont_Traversal(%struct.TraversalData %data) #1 !lgc.rt.shaderstage ; LOWERRAYTRACINGPIPELINE-NEXT: unreachable ; ; CLEANUP-LABEL: define void @_cont_Traversal( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.state [[META1:![0-9]+]] { +; CLEANUP-SAME: i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.state [[META1:![0-9]+]] { ; CLEANUP-NEXT: AllocaSpillBB: +; CLEANUP-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANUP-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 ; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 ; CLEANUP-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 ; CLEANUP-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 diff --git a/llvmraytracing/test/dx/intrinsics/cont-payload-registers-get-i32.ll b/llvmraytracing/test/dx/intrinsics/cont-payload-registers-get-i32.ll deleted file mode 100644 index 5e1676fe82..0000000000 --- a/llvmraytracing/test/dx/intrinsics/cont-payload-registers-get-i32.ll +++ /dev/null @@ -1,89 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=ALL %s -; RUN: opt --verify-each -passes='lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s - -%struct.DispatchSystemData = type { i32 } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.HitData = type { float, i32 } -%struct.Payload = type { [4 x i32] } -%struct.SystemData = type { float } -%struct.TraversalData = type { i32 } - -@debug_global = external global i32 - -declare i32 @_AmdContPayloadRegistersGetI32(i32) - -declare !pointeetys !9 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) -declare !pointeetys !9 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) - -declare !pointeetys !11 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.DispatchSystemData*) - -declare !pointeetys !12 i32 @_cont_HitKind(%struct.DispatchSystemData*, %struct.HitData*) - -declare !pointeetys !17 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) - -define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwind !pointeetys !{%struct.DispatchSystemData poison} { - ret void -} - -declare void @lgc.cps.jump(...) - -define void @_cont_Traversal(%struct.TraversalData %data) #1 !lgc.rt.shaderstage !3 { -; ALL-LABEL: define void @_cont_Traversal( -; ALL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META2:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.state [[META4:![0-9]+]] { -; ALL-NEXT: entry: -; ALL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; ALL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; ALL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; ALL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; ALL-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; ALL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; ALL-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0 -; ALL-NEXT: store i32 [[PAYLOAD_FCA_5_EXTRACT]], ptr @debug_global, align 4 -; ALL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; ALL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; ALL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 2 -; ALL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; ALL-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; ALL-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 0, i64 -1, i32 [[TMP1]], i64 poison, [[STRUCT_SYSTEMDATA:%.*]] poison, [8 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; ALL-NEXT: unreachable -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.TraversalData @_cont_Traversal( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META2:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META3:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: entry: -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP1:%.*]] = getelementptr [4 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP2]], ptr @debug_global, align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = load [4 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_SYSTEMDATA:%.*]] poison, [8 x i32] poison, [4 x i32] [[TMP3]]), !waitmask [[META4:![0-9]+]], !continuation.registercount [[META0]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -entry: - %val = call i32 @_AmdContPayloadRegistersGetI32(i32 2) - store i32 %val, i32* @debug_global, align 4 - call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 poison, %struct.SystemData poison), !waitmask !2 - unreachable -} - -!continuation.maxPayloadRegisterCount = !{!18} - -!2 = !{i32 -1} -!3 = !{i32 6} -!4 = !{i32 8, i32 12, i32 6, i32 16, i32 7, i32 8, i32 5, !5} -!5 = !{i32 0} -!6 = !{i32 0, i64 65536} -!8 = !{i32 8, i32 10, i32 6, i32 16, i32 7, i32 8, i32 5, !5} -!9 = !{%struct.DispatchSystemData poison} -!10 = !{i32 0, %struct.DispatchSystemData poison} -!11 = !{%struct.DispatchSystemData poison} -!12 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!13 = !{i32 0, %struct.HitData poison} -!14 = !{null, %struct.Payload poison, %struct.Payload poison} -!15 = !{i32 0, %struct.Payload poison} -!16 = !{i32 0, %struct.TraversalData poison} -!17 = !{%struct.TraversalData poison} -!18 = !{i32 4} diff --git a/llvmraytracing/test/dx/intrinsics/cont-payload-registers-i32-count.ll b/llvmraytracing/test/dx/intrinsics/cont-payload-registers-i32-count.ll index 81d22a2670..3731be8012 100644 --- a/llvmraytracing/test/dx/intrinsics/cont-payload-registers-i32-count.ll +++ b/llvmraytracing/test/dx/intrinsics/cont-payload-registers-i32-count.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=MINCOUNT %s -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE-MINCOUNT %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=MINCOUNT %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE-MINCOUNT %s %struct.DispatchSystemData = type { i32 } @@ -19,7 +19,7 @@ define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwin define void @main() { ; MINCOUNT-LABEL: define void @main( -; MINCOUNT-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !continuation [[META10:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.entry [[META11:![0-9]+]] { +; MINCOUNT-SAME: i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !continuation [[META10:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.entry [[META11:![0-9]+]] { ; MINCOUNT-NEXT: entry: ; MINCOUNT-NEXT: [[CSP:%.*]] = alloca i32, align 4 ; MINCOUNT-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 @@ -29,7 +29,7 @@ define void @main() { ; MINCOUNT-NEXT: ret void ; ; LOWERRAYTRACINGPIPELINE-MINCOUNT-LABEL: define void @main( -; LOWERRAYTRACINGPIPELINE-MINCOUNT-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !continuation [[META10:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.entry [[META11:![0-9]+]] !continuation.registercount [[META5]] { +; LOWERRAYTRACINGPIPELINE-MINCOUNT-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !continuation [[META10:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.entry [[META11:![0-9]+]] !continuation.registercount [[META5]] { ; LOWERRAYTRACINGPIPELINE-MINCOUNT-NEXT: entry: ; LOWERRAYTRACINGPIPELINE-MINCOUNT-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; LOWERRAYTRACINGPIPELINE-MINCOUNT-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 diff --git a/llvmraytracing/test/dx/intrinsics/cont-payload-registers-set-i32.ll b/llvmraytracing/test/dx/intrinsics/cont-payload-registers-set-i32.ll deleted file mode 100644 index 40face4df3..0000000000 --- a/llvmraytracing/test/dx/intrinsics/cont-payload-registers-set-i32.ll +++ /dev/null @@ -1,80 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=ALL %s -; RUN: opt --verify-each -passes='lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s - -%struct.DispatchSystemData = type { i32 } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.HitData = type { float, i32 } -%struct.Payload = type { [4 x i32] } -%struct.SystemData = type { float } -%struct.TraversalData = type { i32 } - -declare void @_AmdContPayloadRegistersSetI32(i32, i32) - -declare !pointeetys !9 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) -declare !pointeetys !9 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) - -declare !pointeetys !11 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.DispatchSystemData*) - -declare !pointeetys !12 i32 @_cont_HitKind(%struct.DispatchSystemData*, %struct.HitData*) - -declare !pointeetys !17 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) - -!continuation.maxPayloadRegisterCount = !{!18} - -declare void @lgc.cps.jump(...) - -define void @_cont_Traversal(%struct.TraversalData %data) #1 !lgc.rt.shaderstage !3 { -; ALL-LABEL: define void @_cont_Traversal( -; ALL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META2:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.state [[META4:![0-9]+]] { -; ALL-NEXT: entry: -; ALL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; ALL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; ALL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; ALL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; ALL-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; ALL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; ALL-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0 -; ALL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; ALL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; ALL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; ALL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 42, 3 -; ALL-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; ALL-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 0, i64 -1, i32 [[TMP1]], i64 poison, [[STRUCT_SYSTEMDATA:%.*]] poison, [8 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; ALL-NEXT: unreachable -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.TraversalData @_cont_Traversal( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META2:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META3:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: entry: -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP1:%.*]] = getelementptr [4 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0, i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 42, ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = load [4 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_SYSTEMDATA:%.*]] poison, [8 x i32] poison, [4 x i32] [[TMP2]]), !waitmask [[META4:![0-9]+]], !continuation.registercount [[META0]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -entry: - call void @_AmdContPayloadRegistersSetI32(i32 3, i32 42) - call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 poison, %struct.SystemData poison), !waitmask !2 - unreachable -} - -!2 = !{i32 -1} -!3 = !{i32 6} -!4 = !{i32 8, i32 7, i32 6, i32 16, i32 7, i32 8, i32 5, !5} -!5 = !{i32 0} -!6 = !{i32 0, i64 65536} -!8 = !{i32 8, i32 10, i32 6, i32 16, i32 7, i32 8, i32 5, !5} -!9 = !{%struct.DispatchSystemData poison} -!10 = !{i32 0, %struct.DispatchSystemData poison} -!11 = !{%struct.DispatchSystemData poison} -!12 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!13 = !{i32 0, %struct.HitData poison} -!14 = !{null, %struct.Payload poison, %struct.Payload poison} -!15 = !{i32 0, %struct.Payload poison} -!16 = !{i32 0, %struct.TraversalData poison} -!17 = !{%struct.TraversalData poison} -!18 = !{i32 4} diff --git a/llvmraytracing/test/dx/intrinsics/cont-stack-access.ll b/llvmraytracing/test/dx/intrinsics/cont-stack-access.ll index 8f623c9ba2..61a01913e4 100644 --- a/llvmraytracing/test/dx/intrinsics/cont-stack-access.ll +++ b/llvmraytracing/test/dx/intrinsics/cont-stack-access.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: grep -v SKIP_GLOBAL_ADDRSPACE %s | opt --verify-each -passes='dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S --lint-abort-on-error | FileCheck %s -check-prefix=STACK_SCRATCH -; RUN: grep -v SKIP_SCRATCH_ADDRSPACE %s | opt --verify-each -passes='dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S --lint-abort-on-error | FileCheck %s -check-prefix=STACK_GLOBAL +; RUN: grep -v SKIP_GLOBAL_ADDRSPACE %s | opt --verify-each -passes='cleanup-continuations,lint' -S --lint-abort-on-error | FileCheck %s -check-prefix=STACK_SCRATCH +; RUN: grep -v SKIP_SCRATCH_ADDRSPACE %s | opt --verify-each -passes='cleanup-continuations,lint' -S --lint-abort-on-error | FileCheck %s -check-prefix=STACK_GLOBAL declare i32 @_AmdContStackAlloc(i32 %size) declare i32 @_AmdContStackLoadI32(i32 %addr) @@ -17,9 +17,11 @@ declare i64 @_cont_GetContinuationStackGlobalMemBase() ; SKIP_GLOBAL_ADDRSPACE @debug_global = external global i32 -define void @main(%struct.type %cont.state, i32 %return.addr, i32 %shader.index, %struct.DispatchSystemData %system.data) !lgc.rt.shaderstage !14 !lgc.cps !15 { +declare void @lgc.cps.complete() + +define void @main(%struct.type %cont.state, i32 %return.addr, i32 %shader.index, %struct.DispatchSystemData %system.data) !lgc.rt.shaderstage !14 !lgc.cps !15 !continuation !{ptr @main} { ; STACK_SCRATCH-LABEL: define void @main( -; STACK_SCRATCH-SAME: [[STRUCT_TYPE:%.*]] [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURN_ADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !lgc.cps [[META8:![0-9]+]] !continuation.stacksize [[META9:![0-9]+]] { +; STACK_SCRATCH-SAME: i32 [[CSPINIT:%.*]], [[STRUCT_TYPE:%.*]] [[CONT_STATE:%.*]], i32 [[RETURN_ADDR:%.*]], i32 [[SHADER_INDEX:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !lgc.cps [[META8:![0-9]+]] !continuation [[META9:![0-9]+]] !continuation.stacksize [[META10:![0-9]+]] !continuation.state [[META5]] { ; STACK_SCRATCH-NEXT: entry: ; STACK_SCRATCH-NEXT: [[CSP:%.*]] = alloca i32, align 4 ; STACK_SCRATCH-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 @@ -40,7 +42,7 @@ define void @main(%struct.type %cont.state, i32 %return.addr, i32 %shader.index, ; STACK_SCRATCH-NEXT: ret void ; ; STACK_GLOBAL-LABEL: define void @main( -; STACK_GLOBAL-SAME: [[STRUCT_TYPE:%.*]] [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURN_ADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !lgc.cps [[META8:![0-9]+]] !continuation.stacksize [[META9:![0-9]+]] { +; STACK_GLOBAL-SAME: i32 [[CSPINIT:%.*]], [[STRUCT_TYPE:%.*]] [[CONT_STATE:%.*]], i32 [[RETURN_ADDR:%.*]], i32 [[SHADER_INDEX:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !lgc.cps [[META8:![0-9]+]] !continuation [[META9:![0-9]+]] !continuation.stacksize [[META10:![0-9]+]] !continuation.state [[META5]] { ; STACK_GLOBAL-NEXT: entry: ; STACK_GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 ; STACK_GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 @@ -55,7 +57,7 @@ define void @main(%struct.type %cont.state, i32 %return.addr, i32 %shader.index, ; STACK_GLOBAL-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[PTR_FINAL]] ; STACK_GLOBAL-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(22) [[TMP5]], align 4 ; STACK_GLOBAL-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[PTR_FINAL]] -; STACK_GLOBAL-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(22) [[TMP7]], align 4, !amdgpu.last.use [[META10:![0-9]+]] +; STACK_GLOBAL-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(22) [[TMP7]], align 4, !amdgpu.last.use [[META11:![0-9]+]] ; STACK_GLOBAL-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 ; STACK_GLOBAL-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], -12 ; STACK_GLOBAL-NEXT: store i32 [[TMP10]], ptr [[CSP]], align 4 @@ -70,7 +72,8 @@ entry: %val.2 = call i32 @_AmdContStackLoadLastUseI32(i32 %ptr.final) ; SKIP_GLOBAL_ADDRSPACE call void @_AmdContStackFree(i32 12) store i32 %val, ptr @debug_global - ret void + call void @lgc.cps.complete() + unreachable } !dx.entryPoints = !{!1, !5} diff --git a/llvmraytracing/test/dx/intrinsics/cont-stack-alloc.ll b/llvmraytracing/test/dx/intrinsics/cont-stack-alloc.ll index a48c774dc1..5c16f541ba 100644 --- a/llvmraytracing/test/dx/intrinsics/cont-stack-alloc.ll +++ b/llvmraytracing/test/dx/intrinsics/cont-stack-alloc.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function main --version 2 -; RUN: opt --verify-each -passes='cgscc(inline),lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='cgscc(inline),lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck %s declare i32 @_AmdContStackAlloc(i32 %size) declare i32 @_AmdContPayloadRegistersI32Count() @@ -27,7 +27,7 @@ define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwin define void @main() !lgc.rt.shaderstage !17 { ; CHECK-LABEL: define void @main -; CHECK-SAME: (i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.entry [[META11:![0-9]+]] !continuation [[META12:![0-9]+]] !continuation.stacksize [[META13:![0-9]+]] { +; CHECK-SAME: (i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.entry [[META11:![0-9]+]] !continuation [[META12:![0-9]+]] !continuation.stacksize [[META13:![0-9]+]] { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 ; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 diff --git a/llvmraytracing/test/dx/intrinsics/continuation-stack-is-global-false.ll b/llvmraytracing/test/dx/intrinsics/continuation-stack-is-global-false.ll index fdd76887c5..2a5ca044e3 100644 --- a/llvmraytracing/test/dx/intrinsics/continuation-stack-is-global-false.ll +++ b/llvmraytracing/test/dx/intrinsics/continuation-stack-is-global-false.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,dxil-cont-intrinsic-prepare,lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,dxil-cont-prepare-gpurt-library,lint' -S %s --lint-abort-on-error | FileCheck %s %struct.DispatchSystemData = type { i32 } diff --git a/llvmraytracing/test/dx/intrinsics/continuation-stack-is-global-true.ll b/llvmraytracing/test/dx/intrinsics/continuation-stack-is-global-true.ll index 4d58b94a95..0437a15a2f 100644 --- a/llvmraytracing/test/dx/intrinsics/continuation-stack-is-global-true.ll +++ b/llvmraytracing/test/dx/intrinsics/continuation-stack-is-global-true.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,dxil-cont-intrinsic-prepare,lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,dxil-cont-prepare-gpurt-library,lint' -S %s --lint-abort-on-error | FileCheck %s %struct.DispatchSystemData = type { i32 } diff --git a/llvmraytracing/test/dx/intrinsics/get-current-func-addr.ll b/llvmraytracing/test/dx/intrinsics/get-current-func-addr.ll index 9bebd2b02f..934eb4b267 100644 --- a/llvmraytracing/test/dx/intrinsics/get-current-func-addr.ll +++ b/llvmraytracing/test/dx/intrinsics/get-current-func-addr.ll @@ -4,8 +4,8 @@ %struct.DispatchSystemData = type { i32 } -declare void @Use(i64) -declare i64 @_AmdGetCurrentFuncAddr() +declare void @Use(i32) +declare i32 @_AmdGetCurrentFuncAddr() declare !pointeetys !2 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) declare !pointeetys !2 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) @@ -13,40 +13,38 @@ declare !pointeetys !2 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) define void @MyRayGen() { ; CHECK-LABEL: define void @MyRayGen() { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[TMP0:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @MyRayGen) -; CHECK-NEXT: call void @Use(i64 [[TMP0]]) +; CHECK-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @MyRayGen) +; CHECK-NEXT: call void @Use(i32 [[TMP0]]) ; CHECK-NEXT: ret void ; ; CHECK-CPS-LABEL: define void @MyRayGen() { ; CHECK-CPS-NEXT: AllocaSpillBB: -; CHECK-CPS-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @MyRayGen) -; CHECK-CPS-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 -; CHECK-CPS-NEXT: call void @Use(i64 [[TMP1]]) +; CHECK-CPS-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @MyRayGen) +; CHECK-CPS-NEXT: call void @Use(i32 [[TMP0]]) ; CHECK-CPS-NEXT: ret void ; AllocaSpillBB: - %val = call i64 @_AmdGetCurrentFuncAddr() - call void @Use(i64 %val) + %val = call i32 @_AmdGetCurrentFuncAddr() + call void @Use(i32 %val) ret void } define void @MyRayGen.resume.0() { ; CHECK-LABEL: define void @MyRayGen.resume.0() { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP0:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @MyRayGen.resume.0) -; CHECK-NEXT: call void @Use(i64 [[TMP0]]) +; CHECK-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @MyRayGen.resume.0) +; CHECK-NEXT: call void @Use(i32 [[TMP0]]) ; CHECK-NEXT: ret void ; ; CHECK-CPS-LABEL: define void @MyRayGen.resume.0() { ; CHECK-CPS-NEXT: entryresume.0: -; CHECK-CPS-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @MyRayGen.resume.0) -; CHECK-CPS-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 -; CHECK-CPS-NEXT: call void @Use(i64 [[TMP1]]) +; CHECK-CPS-NEXT: [[TMP0:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @MyRayGen.resume.0) +; CHECK-CPS-NEXT: call void @Use(i32 [[TMP0]]) ; CHECK-CPS-NEXT: ret void ; entryresume.0: - %val = call i64 @_AmdGetCurrentFuncAddr() - call void @Use(i64 %val) + %val = call i32 @_AmdGetCurrentFuncAddr() + call void @Use(i32 %val) ret void } diff --git a/llvmraytracing/test/dx/intrinsics/get-rtip.ll b/llvmraytracing/test/dx/intrinsics/get-rtip.ll index b3688329c8..34fc841570 100644 --- a/llvmraytracing/test/dx/intrinsics/get-rtip.ll +++ b/llvmraytracing/test/dx/intrinsics/get-rtip.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint' -S %s --lint-abort-on-error | FileCheck %s declare i32 @_AmdGetRtip() diff --git a/llvmraytracing/test/dx/intrinsics/get-setting.ll b/llvmraytracing/test/dx/intrinsics/get-setting.ll index d9d38e41a6..8cd86f5e3e 100644 --- a/llvmraytracing/test/dx/intrinsics/get-setting.ll +++ b/llvmraytracing/test/dx/intrinsics/get-setting.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint' -S %s --lint-abort-on-error | FileCheck %s declare i32 @_AmdGetSetting_123() diff --git a/llvmraytracing/test/dx/intrinsics/get-shader-kind.ll b/llvmraytracing/test/dx/intrinsics/get-shader-kind.ll index 62fe394a5e..a6f086fec1 100644 --- a/llvmraytracing/test/dx/intrinsics/get-shader-kind.ll +++ b/llvmraytracing/test/dx/intrinsics/get-shader-kind.ll @@ -29,8 +29,8 @@ define float @_cont_RayTCurrent() { ; Note: DXILShaderKind::Miss has value 11 define void @MyMiss(%struct.Payload* %payload) !pointeetys !1 !lgc.rt.shaderstage !16 { -; CHECK-LABEL: define %struct.DispatchSystemData @MyMiss -; CHECK-SAME: (i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META9:![0-9]+]] !continuation.registercount [[META5:![0-9]+]] !continuation [[META10:![0-9]+]] { +; CHECK-LABEL: define void @MyMiss +; CHECK-SAME: (i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META9:![0-9]+]] !continuation.registercount [[META5:![0-9]+]] !continuation [[META10:![0-9]+]] { ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [7 x i32], align 4 ; CHECK-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_PAYLOAD:%.*]], align 8 @@ -48,7 +48,7 @@ define void @MyMiss(%struct.Payload* %payload) !pointeetys !1 !lgc.rt.shaderstag ; CHECK-NEXT: store i32 [[TMP8]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; CHECK-NEXT: [[TMP9:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-NEXT: [[TMP10:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP9]], [8 x i32] poison, [1 x i32] [[TMP10]]), !continuation.registercount [[META5]] +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP9]], [8 x i32] poison, [1 x i32] [[TMP10]]), !continuation.registercount [[META5]] ; CHECK-NEXT: unreachable ; %1 = call i32 @_AmdGetShaderKind() diff --git a/llvmraytracing/test/dx/intrinsics/get-shader-rec-idx.ll b/llvmraytracing/test/dx/intrinsics/get-shader-rec-idx.ll index 933cf00565..6fd4f887e5 100644 --- a/llvmraytracing/test/dx/intrinsics/get-shader-rec-idx.ll +++ b/llvmraytracing/test/dx/intrinsics/get-shader-rec-idx.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,lower-raytracing-pipeline,lint' -S --lint-abort-on-error | FileCheck --check-prefix=CHECK-NON-CPS %s -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,lower-raytracing-pipeline,lint' -S %s --lint-abort-on-error | FileCheck --check-prefix=CHECK-CPS %s +; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,lower-raytracing-pipeline,lint' -S --lint-abort-on-error | FileCheck --check-prefix=CHECK-NON-CPS %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,lower-raytracing-pipeline,lint' -S %s --lint-abort-on-error | FileCheck --check-prefix=CHECK-CPS %s %struct.DispatchSystemData = type { i32 } %struct.MyParams = type { i32 } @@ -14,7 +14,7 @@ declare !pointeetys !5 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, f define void @MyRayGen() !lgc.rt.shaderstage !1 { ; CHECK-NON-CPS-LABEL: define void @MyRayGen( -; CHECK-NON-CPS-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.entry [[META6:![0-9]+]] !continuation.registercount [[META4]] { +; CHECK-NON-CPS-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.entry [[META6:![0-9]+]] !continuation.registercount [[META4]] { ; CHECK-NON-CPS-NEXT: AllocaSpillBB: ; CHECK-NON-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; CHECK-NON-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 @@ -24,7 +24,7 @@ define void @MyRayGen() !lgc.rt.shaderstage !1 { ; CHECK-NON-CPS-NEXT: unreachable ; ; CHECK-CPS-LABEL: define void @MyRayGen( -; CHECK-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !lgc.cps [[META1:![0-9]+]] { +; CHECK-CPS-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !lgc.cps [[META1:![0-9]+]] !continuation.registercount [[META4]] { ; CHECK-CPS-NEXT: AllocaSpillBB: ; CHECK-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; CHECK-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 @@ -40,8 +40,8 @@ AllocaSpillBB: } define void @called(%struct.MyParams* %params) !pointeetys !4 !lgc.rt.shaderstage !3 { -; CHECK-NON-CPS-LABEL: define %struct.DispatchSystemData @called( -; CHECK-NON-CPS-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [9 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META7:![0-9]+]] !continuation [[META8:![0-9]+]] !continuation.registercount [[META1:![0-9]+]] { +; CHECK-NON-CPS-LABEL: define void @called( +; CHECK-NON-CPS-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [9 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META7:![0-9]+]] !continuation [[META8:![0-9]+]] !continuation.registercount [[META1:![0-9]+]] { ; CHECK-NON-CPS-NEXT: AllocaSpillBB: ; CHECK-NON-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; CHECK-NON-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 @@ -58,11 +58,11 @@ define void @called(%struct.MyParams* %params) !pointeetys !4 !lgc.rt.shaderstag ; CHECK-NON-CPS-NEXT: store i32 [[TMP6]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; CHECK-NON-CPS-NEXT: [[TMP7:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-NON-CPS-NEXT: [[TMP8:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-NON-CPS-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP7]], [9 x i32] poison, [1 x i32] [[TMP8]]), !continuation.registercount [[META1]] +; CHECK-NON-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP7]], [9 x i32] poison, [1 x i32] [[TMP8]]), !continuation.registercount [[META1]] ; CHECK-NON-CPS-NEXT: unreachable ; ; CHECK-CPS-LABEL: define void @called( -; CHECK-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [9 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META6:![0-9]+]] !continuation [[META7:![0-9]+]] !lgc.cps [[META8:![0-9]+]] { +; CHECK-CPS-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [9 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META6:![0-9]+]] !continuation [[META7:![0-9]+]] !lgc.cps [[META8:![0-9]+]] !continuation.registercount [[META1]] { ; CHECK-CPS-NEXT: AllocaSpillBB: ; CHECK-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; CHECK-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 @@ -78,7 +78,7 @@ define void @called(%struct.MyParams* %params) !pointeetys !4 !lgc.rt.shaderstag ; CHECK-CPS-NEXT: store i32 [[TMP4]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; CHECK-CPS-NEXT: [[TMP5:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-CPS-NEXT: [[TMP6:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP5]], [9 x i32] poison, [1 x i32] [[TMP6]]), !continuation.registercount [[META1]] +; CHECK-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP5]], [9 x i32] poison, [1 x i32] [[TMP6]]), !continuation.registercount [[META1]] ; CHECK-CPS-NEXT: unreachable ; AllocaSpillBB: diff --git a/llvmraytracing/test/dx/intrinsics/is-llpc.ll b/llvmraytracing/test/dx/intrinsics/is-llpc.ll index 57612b938e..7a5c0e808b 100644 --- a/llvmraytracing/test/dx/intrinsics/is-llpc.ll +++ b/llvmraytracing/test/dx/intrinsics/is-llpc.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint' -S %s --lint-abort-on-error | FileCheck %s declare i1 @_AmdIsLlpc() diff --git a/llvmraytracing/test/dx/intrinsics/shader-index.ll b/llvmraytracing/test/dx/intrinsics/shader-index.ll index 1da0d3be02..dc686d69d3 100644 --- a/llvmraytracing/test/dx/intrinsics/shader-index.ll +++ b/llvmraytracing/test/dx/intrinsics/shader-index.ll @@ -22,7 +22,7 @@ define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwin define void @main() !lgc.rt.shaderstage !24 { ; CHECK-LABEL: define void @main( -; CHECK-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META12:![0-9]+]] !lgc.cps [[META10:![0-9]+]] !continuation [[META13:![0-9]+]] { +; CHECK-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META12:![0-9]+]] !lgc.cps [[META10:![0-9]+]] !continuation.registercount [[META12]] !continuation [[META13:![0-9]+]] { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 @@ -40,7 +40,7 @@ entry: define void @callable(%struct.Payload* %payload) !pointeetys !22 !lgc.rt.shaderstage !25 { ; CHECK-LABEL: define void @callable( -; CHECK-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META14:![0-9]+]] !lgc.cps [[META15:![0-9]+]] !continuation [[META16:![0-9]+]] { +; CHECK-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META14:![0-9]+]] !lgc.cps [[META15:![0-9]+]] !continuation.registercount [[META10]] !continuation [[META16:![0-9]+]] { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 @@ -57,7 +57,7 @@ define void @callable(%struct.Payload* %payload) !pointeetys !22 !lgc.rt.shaders ; CHECK-NEXT: store i32 [[TMP4]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; CHECK-NEXT: [[TMP5:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-NEXT: [[TMP6:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP5]], [8 x i32] poison, [1 x i32] [[TMP6]]), !continuation.registercount [[META10]] +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP5]], [8 x i32] poison, [1 x i32] [[TMP6]]), !continuation.registercount [[META10]] ; CHECK-NEXT: unreachable ; entry: diff --git a/llvmraytracing/test/dx/intrinsics/value-i32.ll b/llvmraytracing/test/dx/intrinsics/value-i32.ll index d2361d76cd..500aadb368 100644 --- a/llvmraytracing/test/dx/intrinsics/value-i32.ll +++ b/llvmraytracing/test/dx/intrinsics/value-i32.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 -; RUN: opt --verify-each -passes='dxil-cont-post-process,lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='cleanup-continuations,lint' -S %s --lint-abort-on-error | FileCheck %s %struct.Payload = type { float, i32, i64, i32 } diff --git a/llvmraytracing/test/dx/lint/multiple-setlocalrootindex-pre-coro.ll b/llvmraytracing/test/dx/lint/multiple-setlocalrootindex-pre-coro.ll new file mode 100644 index 0000000000..82dce60286 --- /dev/null +++ b/llvmraytracing/test/dx/lint/multiple-setlocalrootindex-pre-coro.ll @@ -0,0 +1,26 @@ +; NOTE: Do not autogenerate +; RUN: opt --verify-each -passes='continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s + +; CHECK-NOT: Found a function with more than one call to setLocalRootIndex +; CHECK-LABEL: define void @RayGen( + +target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" + +%struct.DispatchSystemData = type { i32 } + +declare void @amd.dx.setLocalRootIndex(i32) +declare void @lgc.cps.await__void(...) + +define void @RayGen(i32 %dummyRetAddr, %struct.DispatchSystemData %0) !lgc.rt.shaderstage !0 !continuation.entry !1 !continuation !2 { + call void @amd.dx.setLocalRootIndex(i32 0) + call void (...) @lgc.cps.await__void(i32 2, i32 3) + call void @amd.dx.setLocalRootIndex(i32 5) + ret void +} + +!continuation.stackAddrspace = !{!3} + +!0 = !{i32 0} +!1 = !{} +!2 = !{void ()* @RayGen} +!3 = !{i32 21} diff --git a/llvmraytracing/test/dx/lint/multiple-setlocalrootindex.ll b/llvmraytracing/test/dx/lint/multiple-setlocalrootindex.ll index 0cb6227093..6cbbadc302 100644 --- a/llvmraytracing/test/dx/lint/multiple-setlocalrootindex.ll +++ b/llvmraytracing/test/dx/lint/multiple-setlocalrootindex.ll @@ -1,4 +1,5 @@ -; RUN: not opt --verify-each -passes='continuations-lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s +; NOTE: Do not autogenerate +; RUN: not opt --verify-each -passes='continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s ; CHECK: Found a function with more than one call to setLocalRootIndex ; CHECK-NEXT: ptr @RayGen @@ -9,7 +10,7 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: declare void @amd.dx.setLocalRootIndex(i32) -define void @RayGen(i64 %dummyRetAddr, %struct.DispatchSystemData %0) !lgc.rt.shaderstage !0 !continuation.entry !1 !continuation !2 { +define void @RayGen(i32 %dummyRetAddr, %struct.DispatchSystemData %0) !lgc.rt.shaderstage !0 !continuation.entry !1 !continuation !2 { call void @amd.dx.setLocalRootIndex(i32 0) call void @amd.dx.setLocalRootIndex(i32 5) ret void diff --git a/llvmraytracing/test/dx/lint/undef-jump-target.ll b/llvmraytracing/test/dx/lint/undef-jump-target.ll index 3b0d90876c..e54d7afb31 100644 --- a/llvmraytracing/test/dx/lint/undef-jump-target.ll +++ b/llvmraytracing/test/dx/lint/undef-jump-target.ll @@ -1,4 +1,5 @@ -; RUN: not opt --verify-each -passes='continuations-lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s +; NOTE: Do not autogenerate +; RUN: not opt --verify-each -passes='continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s ; CHECK: Jump has undefined jump target @@ -8,8 +9,8 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: declare void @lgc.cps.jump(...) -define void @RayGen(i64 %dummyRetAddr, %struct.DispatchSystemData %0) !lgc.rt.shaderstage !0 !continuation.entry !1 !continuation !2 { - call void (...) @lgc.cps.jump(i64 undef), !continuation.registercount !0 +define void @RayGen(i32 %dummyRetAddr, %struct.DispatchSystemData %0) !lgc.rt.shaderstage !0 !continuation.entry !1 !continuation !2 { + call void (...) @lgc.cps.jump(i32 undef), !continuation.registercount !0 unreachable } diff --git a/llvmraytracing/test/dx/lower-await.ll b/llvmraytracing/test/dx/lower-await.ll index 1963719ff8..95ec1860c0 100644 --- a/llvmraytracing/test/dx/lower-await.ll +++ b/llvmraytracing/test/dx/lower-await.ll @@ -1,57 +1,63 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 ; RUN: opt --verify-each -passes='lower-await,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=AWAIT %s ; RUN: opt --verify-each -passes='lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=CORO %s -; RUN: opt --verify-each -passes='lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=CLEANED %s +; RUN: opt --verify-each -passes='lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=CLEANED %s target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" -declare ptr @async_fun(i64, i32) -declare ptr @async_fun_with_waitmask(i64, i32) -declare ptr @async_fun_with_arg(i64, i32, i32) +declare ptr @async_fun(i32, i32) +declare ptr @async_fun_with_waitmask(i32, i32) +declare ptr @async_fun_with_arg(i32, i32, i32) declare void @lgc.cps.await__void(...) -declare i32 @lgc.cps.await__i32(...) +declare { i32 } @lgc.cps.await__i32(...) declare void @lgc.cps.jump(...) declare void @lgc.cps.complete() -define void @simple_await(i64 %dummyRetAddr) !continuation.registercount !1 { +define void @simple_await(i32 %dummyRetAddr) !continuation.registercount !1 { ; AWAIT-LABEL: define { ptr, ptr } @simple_await( -; AWAIT-SAME: i64 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] { +; AWAIT-SAME: i32 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] { ; AWAIT-NEXT: [[TMP2:%.*]] = call token @llvm.coro.id.retcon(i32 8, i32 4, ptr [[TMP0]], ptr @continuation.prototype.simple_await, ptr @continuation.malloc, ptr @continuation.free) ; AWAIT-NEXT: [[TMP3:%.*]] = call ptr @llvm.coro.begin(token [[TMP2]], ptr null) -; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i64 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; AWAIT-NEXT: [[TMP6:%.*]] = call i1 (...) @llvm.coro.suspend.retcon.i1(ptr [[TMP5]]) -; AWAIT-NEXT: call void (...) @lgc.cps.jump(i64 [[DUMMYRETADDR]], i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount [[META1]] +; AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[DUMMYRETADDR]], i32 -1, i32 poison, i32 poison), !continuation.registercount [[META1]] ; AWAIT-NEXT: unreachable ; ; CORO-LABEL: define { ptr, ptr } @simple_await( -; CORO-SAME: i64 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] { +; CORO-SAME: i32 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] { ; CORO-NEXT: AllocaSpillBB: ; CORO-NEXT: [[DUMMYRETADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME:%.*]], ptr [[TMP0]], i32 0, i32 0 -; CORO-NEXT: store i64 [[DUMMYRETADDR]], ptr [[DUMMYRETADDR_SPILL_ADDR]], align 4 -; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CORO-NEXT: [[TMP1:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i64 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CORO-NEXT: store i32 [[DUMMYRETADDR]], ptr [[DUMMYRETADDR_SPILL_ADDR]], align 4 +; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CORO-NEXT: [[TMP1:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i32 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CORO-NEXT: [[TMP3:%.*]] = insertvalue { ptr, ptr } poison, ptr @simple_await.resume.0, 0 ; CORO-NEXT: [[TMP4:%.*]] = insertvalue { ptr, ptr } [[TMP3]], ptr [[TMP2]], 1 ; CORO-NEXT: ret { ptr, ptr } [[TMP4]] ; ; CLEANED-LABEL: define void @simple_await( -; CLEANED-SAME: i64 [[DUMMYRETADDR:%.*]]) !continuation.registercount [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { +; CLEANED-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRETADDR:%.*]]) !continuation.registercount [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CLEANED-NEXT: AllocaSpillBB: -; CLEANED-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANED-NEXT: [[DUMMYRETADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[SIMPLE_AWAIT_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANED-NEXT: store i64 [[DUMMYRETADDR]], ptr addrspace(32) [[DUMMYRETADDR_SPILL_ADDR]], align 4 -; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CLEANED-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @simple_await.resume.0) -; CLEANED-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CLEANED-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANED-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 8 +; CLEANED-NEXT: store i32 [[TMP5]], ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(21) +; CLEANED-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CLEANED-NEXT: store i32 [[DUMMYRETADDR]], ptr addrspace(21) [[TMP3]], align 4 +; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CLEANED-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @simple_await.resume.0) +; CLEANED-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANED-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP6]], i32 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CLEANED-NEXT: unreachable ; - %callee = ptrtoint ptr @async_fun to i64 - call void (...) @lgc.cps.await__void(i64 %callee, i32 2), !continuation.registercount !1, !continuation.returnedRegistercount !1 - call void (...) @lgc.cps.jump(i64 %dummyRetAddr, i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount !1 + %callee = ptrtoint ptr @async_fun to i32 + call void (...) @lgc.cps.await__void(i32 %callee, i32 2), !continuation.registercount !1, !continuation.returnedRegistercount !1 + call void (...) @lgc.cps.jump(i32 %dummyRetAddr, i32 -1, i32 poison, i32 poison), !continuation.registercount !1 unreachable } @@ -60,9 +66,9 @@ define void @simple_await_entry() !continuation.entry !0 !continuation.registerc ; AWAIT-SAME: ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation.entry [[META3:![0-9]+]] !continuation [[META4:![0-9]+]] { ; AWAIT-NEXT: [[TMP2:%.*]] = call token @llvm.coro.id.retcon(i32 8, i32 4, ptr [[TMP0]], ptr @continuation.prototype.simple_await_entry, ptr @continuation.malloc, ptr @continuation.free) ; AWAIT-NEXT: [[TMP3:%.*]] = call ptr @llvm.coro.begin(token [[TMP2]], ptr null) -; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i64 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; AWAIT-NEXT: [[TMP6:%.*]] = call i1 (...) @llvm.coro.suspend.retcon.i1(ptr [[TMP5]]) ; AWAIT-NEXT: call void @lgc.cps.complete() ; AWAIT-NEXT: unreachable @@ -70,153 +76,176 @@ define void @simple_await_entry() !continuation.entry !0 !continuation.registerc ; CORO-LABEL: define { ptr, ptr } @simple_await_entry( ; CORO-SAME: ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation.entry [[META3:![0-9]+]] !continuation [[META4:![0-9]+]] { ; CORO-NEXT: AllocaSpillBB: -; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CORO-NEXT: [[TMP1:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i64 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CORO-NEXT: [[TMP1:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i32 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CORO-NEXT: [[TMP3:%.*]] = insertvalue { ptr, ptr } poison, ptr @simple_await_entry.resume.0, 0 ; CORO-NEXT: [[TMP4:%.*]] = insertvalue { ptr, ptr } [[TMP3]], ptr [[TMP2]], 1 ; CORO-NEXT: ret { ptr, ptr } [[TMP4]] ; ; CLEANED-LABEL: define void @simple_await_entry( -; CLEANED-SAME: ) !continuation.registercount [[META1]] !continuation.entry [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.state [[META1]] { +; CLEANED-SAME: i32 [[CSPINIT:%.*]]) !continuation.registercount [[META1]] !continuation.entry [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.state [[META1]] { ; CLEANED-NEXT: AllocaSpillBB: -; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CLEANED-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @simple_await_entry.resume.0) -; CLEANED-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CLEANED-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANED-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CLEANED-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @simple_await_entry.resume.0) +; CLEANED-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANED-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP2]], i32 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CLEANED-NEXT: unreachable ; - %callee = ptrtoint ptr @async_fun to i64 - call void (...) @lgc.cps.await__void(i64 %callee, i32 2), !continuation.registercount !1, !continuation.returnedRegistercount !1 + %callee = ptrtoint ptr @async_fun to i32 + call void (...) @lgc.cps.await__void(i32 %callee, i32 2), !continuation.registercount !1, !continuation.returnedRegistercount !1 ; Note: entry functions don't need a registercount annotation on return call void @lgc.cps.complete() unreachable } -define void @await_with_arg(i64 %dummyRetAddr, i32 %i) !continuation.registercount !1 { +define void @await_with_arg(i32 %dummyRetAddr, i32 %i) !continuation.registercount !1 { ; AWAIT-LABEL: define { ptr, ptr } @await_with_arg( -; AWAIT-SAME: i64 [[DUMMYRETADDR:%.*]], i32 [[I:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META5:![0-9]+]] { +; AWAIT-SAME: i32 [[DUMMYRETADDR:%.*]], i32 [[I:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META5:![0-9]+]] { ; AWAIT-NEXT: [[TMP2:%.*]] = call token @llvm.coro.id.retcon(i32 8, i32 4, ptr [[TMP0]], ptr @continuation.prototype.await_with_arg, ptr @continuation.malloc, ptr @continuation.free) ; AWAIT-NEXT: [[TMP3:%.*]] = call ptr @llvm.coro.begin(token [[TMP2]], ptr null) -; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_arg to i64 -; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i64 [[CALLEE]], i32 2, i32 [[I]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_arg to i32 +; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CALLEE]], i32 2, i32 [[I]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; AWAIT-NEXT: [[TMP6:%.*]] = call i1 (...) @llvm.coro.suspend.retcon.i1(ptr [[TMP5]]) -; AWAIT-NEXT: call void (...) @lgc.cps.jump(i64 [[DUMMYRETADDR]], i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount [[META1]] +; AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[DUMMYRETADDR]], i32 -1, i32 poison, i32 poison), !continuation.registercount [[META1]] ; AWAIT-NEXT: unreachable ; ; CORO-LABEL: define { ptr, ptr } @await_with_arg( -; CORO-SAME: i64 [[DUMMYRETADDR:%.*]], i32 [[I:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META5:![0-9]+]] { +; CORO-SAME: i32 [[DUMMYRETADDR:%.*]], i32 [[I:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META5:![0-9]+]] { ; CORO-NEXT: AllocaSpillBB: ; CORO-NEXT: [[DUMMYRETADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[AWAIT_WITH_ARG_FRAME:%.*]], ptr [[TMP0]], i32 0, i32 0 -; CORO-NEXT: store i64 [[DUMMYRETADDR]], ptr [[DUMMYRETADDR_SPILL_ADDR]], align 4 -; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_arg to i64 -; CORO-NEXT: [[TMP1:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i64 [[CALLEE]], i32 2, i32 [[I]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CORO-NEXT: store i32 [[DUMMYRETADDR]], ptr [[DUMMYRETADDR_SPILL_ADDR]], align 4 +; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_arg to i32 +; CORO-NEXT: [[TMP1:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i32 [[CALLEE]], i32 2, i32 [[I]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CORO-NEXT: [[TMP3:%.*]] = insertvalue { ptr, ptr } poison, ptr @await_with_arg.resume.0, 0 ; CORO-NEXT: [[TMP4:%.*]] = insertvalue { ptr, ptr } [[TMP3]], ptr [[TMP2]], 1 ; CORO-NEXT: ret { ptr, ptr } [[TMP4]] ; ; CLEANED-LABEL: define void @await_with_arg( -; CLEANED-SAME: i64 [[DUMMYRETADDR:%.*]], i32 [[I:%.*]]) !continuation.registercount [[META1]] !continuation [[META6:![0-9]+]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { +; CLEANED-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRETADDR:%.*]], i32 [[I:%.*]]) !continuation.registercount [[META1]] !continuation [[META6:![0-9]+]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { ; CLEANED-NEXT: AllocaSpillBB: -; CLEANED-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANED-NEXT: [[DUMMYRETADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[AWAIT_WITH_ARG_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANED-NEXT: store i64 [[DUMMYRETADDR]], ptr addrspace(32) [[DUMMYRETADDR_SPILL_ADDR]], align 4 -; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_arg to i64 -; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CLEANED-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @await_with_arg.resume.0) -; CLEANED-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]], i32 [[I]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CLEANED-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANED-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 8 +; CLEANED-NEXT: store i32 [[TMP5]], ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(21) +; CLEANED-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CLEANED-NEXT: store i32 [[DUMMYRETADDR]], ptr addrspace(21) [[TMP3]], align 4 +; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_arg to i32 +; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CLEANED-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @await_with_arg.resume.0) +; CLEANED-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANED-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP6]], i32 [[TMP1]], i32 [[I]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CLEANED-NEXT: unreachable ; - %callee = ptrtoint ptr @async_fun_with_arg to i64 - call void (...) @lgc.cps.await__void(i64 %callee, i32 2, i32 %i), !continuation.registercount !1, !continuation.returnedRegistercount !1 - call void (...) @lgc.cps.jump(i64 %dummyRetAddr, i32 -1, {} poison, i32 poison, i64 poison), !continuation.registercount !1 + %callee = ptrtoint ptr @async_fun_with_arg to i32 + call void (...) @lgc.cps.await__void(i32 %callee, i32 2, i32 %i), !continuation.registercount !1, !continuation.returnedRegistercount !1 + call void (...) @lgc.cps.jump(i32 %dummyRetAddr, i32 -1, i32 poison, i32 poison), !continuation.registercount !1 unreachable } -define i32 @await_with_ret_value(i64 %dummyRetAddr) !continuation.registercount !1 { +define i32 @await_with_ret_value(i32 %dummyRetAddr) !continuation.registercount !1 { ; AWAIT-LABEL: define { ptr, ptr } @await_with_ret_value( -; AWAIT-SAME: i64 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META6:![0-9]+]] { +; AWAIT-SAME: i32 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META6:![0-9]+]] { ; AWAIT-NEXT: [[TMP2:%.*]] = call token @llvm.coro.id.retcon(i32 8, i32 4, ptr [[TMP0]], ptr @continuation.prototype.await_with_ret_value, ptr @continuation.malloc, ptr @continuation.free) ; AWAIT-NEXT: [[TMP3:%.*]] = call ptr @llvm.coro.begin(token [[TMP2]], ptr null) -; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i64 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; AWAIT-NEXT: [[TMP6:%.*]] = call i1 (...) @llvm.coro.suspend.retcon.i1(ptr [[TMP5]]) -; AWAIT-NEXT: [[TMP7:%.*]] = call i32 @lgc.ilcps.getReturnValue__i32() -; AWAIT-NEXT: call void (...) @lgc.cps.jump(i64 [[DUMMYRETADDR]], i32 -1, {} poison, i64 poison, i32 poison, i32 [[TMP7]]), !continuation.registercount [[META1]] +; AWAIT-NEXT: [[TMP7:%.*]] = call { i32 } @lgc.ilcps.getReturnValue__sl_i32s() +; AWAIT-NEXT: [[RES_2:%.*]] = extractvalue { i32 } [[TMP7]], 0 +; AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[DUMMYRETADDR]], i32 -1, i32 poison, i32 poison, i32 [[RES_2]]), !continuation.registercount [[META1]] ; AWAIT-NEXT: unreachable ; ; CORO-LABEL: define { ptr, ptr } @await_with_ret_value( -; CORO-SAME: i64 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META6:![0-9]+]] { +; CORO-SAME: i32 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META6:![0-9]+]] { ; CORO-NEXT: AllocaSpillBB: ; CORO-NEXT: [[DUMMYRETADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[AWAIT_WITH_RET_VALUE_FRAME:%.*]], ptr [[TMP0]], i32 0, i32 0 -; CORO-NEXT: store i64 [[DUMMYRETADDR]], ptr [[DUMMYRETADDR_SPILL_ADDR]], align 4 -; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CORO-NEXT: [[TMP1:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i64 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CORO-NEXT: store i32 [[DUMMYRETADDR]], ptr [[DUMMYRETADDR_SPILL_ADDR]], align 4 +; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CORO-NEXT: [[TMP1:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i32 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CORO-NEXT: [[TMP3:%.*]] = insertvalue { ptr, ptr } poison, ptr @await_with_ret_value.resume.0, 0 ; CORO-NEXT: [[TMP4:%.*]] = insertvalue { ptr, ptr } [[TMP3]], ptr [[TMP2]], 1 ; CORO-NEXT: ret { ptr, ptr } [[TMP4]] ; ; CLEANED-LABEL: define void @await_with_ret_value( -; CLEANED-SAME: i64 [[DUMMYRETADDR:%.*]]) !continuation.registercount [[META1]] !continuation [[META7:![0-9]+]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { +; CLEANED-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRETADDR:%.*]]) !continuation.registercount [[META1]] !continuation [[META7:![0-9]+]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { ; CLEANED-NEXT: AllocaSpillBB: -; CLEANED-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANED-NEXT: [[DUMMYRETADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[AWAIT_WITH_RET_VALUE_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANED-NEXT: store i64 [[DUMMYRETADDR]], ptr addrspace(32) [[DUMMYRETADDR_SPILL_ADDR]], align 4 -; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i64 -; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CLEANED-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @await_with_ret_value.resume.0) -; CLEANED-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] +; CLEANED-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANED-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 8 +; CLEANED-NEXT: store i32 [[TMP5]], ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(21) +; CLEANED-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CLEANED-NEXT: store i32 [[DUMMYRETADDR]], ptr addrspace(21) [[TMP3]], align 4 +; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun to i32 +; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CLEANED-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @await_with_ret_value.resume.0) +; CLEANED-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANED-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP6]], i32 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; CLEANED-NEXT: unreachable ; - %callee = ptrtoint ptr @async_fun to i64 - %res = call i32 (...) @lgc.cps.await__i32(i64 %callee, i32 2), !continuation.registercount !1, !continuation.returnedRegistercount !1 - call void (...) @lgc.cps.jump(i64 %dummyRetAddr, i32 -1, {} poison, i64 poison, i32 poison, i32 %res), !continuation.registercount !1 + %callee = ptrtoint ptr @async_fun to i32 + %res = call { i32 } (...) @lgc.cps.await__i32(i32 %callee, i32 2), !continuation.registercount !1, !continuation.returnedRegistercount !1 + %res.2 = extractvalue { i32 } %res, 0 + call void (...) @lgc.cps.jump(i32 %dummyRetAddr, i32 -1, i32 poison, i32 poison, i32 %res.2), !continuation.registercount !1 unreachable } -define void @wait_await(i64 %dummyRetAddr) !continuation.registercount !1 { +define void @wait_await(i32 %dummyRetAddr) !continuation.registercount !1 { ; AWAIT-LABEL: define { ptr, ptr } @wait_await( -; AWAIT-SAME: i64 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META7:![0-9]+]] { +; AWAIT-SAME: i32 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META7:![0-9]+]] { ; AWAIT-NEXT: [[TMP2:%.*]] = call token @llvm.coro.id.retcon(i32 8, i32 4, ptr [[TMP0]], ptr @continuation.prototype.wait_await, ptr @continuation.malloc, ptr @continuation.free) ; AWAIT-NEXT: [[TMP3:%.*]] = call ptr @llvm.coro.begin(token [[TMP2]], ptr null) -; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_waitmask to i64 -; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i64 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]], !waitmask [[META8:![0-9]+]] +; AWAIT-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_waitmask to i32 +; AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]], !waitmask [[META8:![0-9]+]] ; AWAIT-NEXT: [[TMP6:%.*]] = call i1 (...) @llvm.coro.suspend.retcon.i1(ptr [[TMP5]]) -; AWAIT-NEXT: call void (...) @lgc.cps.jump(i64 [[DUMMYRETADDR]], i32 -1, i64 poison, i32 poison, i64 poison), !continuation.registercount [[META1]] +; AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[DUMMYRETADDR]], i32 -1, i32 poison, i32 poison, i32 poison), !continuation.registercount [[META1]] ; AWAIT-NEXT: unreachable ; ; CORO-LABEL: define { ptr, ptr } @wait_await( -; CORO-SAME: i64 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META7:![0-9]+]] { +; CORO-SAME: i32 [[DUMMYRETADDR:%.*]], ptr [[TMP0:%.*]]) !continuation.registercount [[META1]] !continuation [[META7:![0-9]+]] { ; CORO-NEXT: AllocaSpillBB: ; CORO-NEXT: [[DUMMYRETADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[WAIT_AWAIT_FRAME:%.*]], ptr [[TMP0]], i32 0, i32 0 -; CORO-NEXT: store i64 [[DUMMYRETADDR]], ptr [[DUMMYRETADDR_SPILL_ADDR]], align 4 -; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_waitmask to i64 -; CORO-NEXT: [[TMP1:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i64 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]], !waitmask [[META8:![0-9]+]] +; CORO-NEXT: store i32 [[DUMMYRETADDR]], ptr [[DUMMYRETADDR_SPILL_ADDR]], align 4 +; CORO-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_waitmask to i32 +; CORO-NEXT: [[TMP1:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CORO-NEXT: [[TMP2:%.*]] = call ptr [[TMP1]](i32 [[CALLEE]], i32 2), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]], !waitmask [[META8:![0-9]+]] ; CORO-NEXT: [[TMP3:%.*]] = insertvalue { ptr, ptr } poison, ptr @wait_await.resume.0, 0 ; CORO-NEXT: [[TMP4:%.*]] = insertvalue { ptr, ptr } [[TMP3]], ptr [[TMP2]], 1 ; CORO-NEXT: ret { ptr, ptr } [[TMP4]] ; ; CLEANED-LABEL: define void @wait_await( -; CLEANED-SAME: i64 [[DUMMYRETADDR:%.*]]) !continuation.registercount [[META1]] !continuation [[META8:![0-9]+]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { +; CLEANED-SAME: i32 [[CSPINIT:%.*]], i32 [[DUMMYRETADDR:%.*]]) !continuation.registercount [[META1]] !continuation [[META8:![0-9]+]] !continuation.stacksize [[META3]] !continuation.state [[META3]] { ; CLEANED-NEXT: AllocaSpillBB: -; CLEANED-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANED-NEXT: [[DUMMYRETADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[WAIT_AWAIT_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANED-NEXT: store i64 [[DUMMYRETADDR]], ptr addrspace(32) [[DUMMYRETADDR_SPILL_ADDR]], align 4 -; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_waitmask to i64 -; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i64 [[CALLEE]] to ptr -; CLEANED-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @wait_await.resume.0) -; CLEANED-NEXT: call void (...) @lgc.cps.jump(i64 [[CALLEE]], i32 -1, {} poison, i32 poison, i64 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]], !waitmask [[META9:![0-9]+]] +; CLEANED-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CLEANED-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 8 +; CLEANED-NEXT: store i32 [[TMP5]], ptr [[CSP]], align 4 +; CLEANED-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(21) +; CLEANED-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CLEANED-NEXT: store i32 [[DUMMYRETADDR]], ptr addrspace(21) [[TMP3]], align 4 +; CLEANED-NEXT: [[CALLEE:%.*]] = ptrtoint ptr @async_fun_with_waitmask to i32 +; CLEANED-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CALLEE]] to ptr +; CLEANED-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @wait_await.resume.0) +; CLEANED-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 +; CLEANED-NEXT: call void (...) @lgc.cps.jump(i32 [[CALLEE]], i32 -1, i32 [[TMP6]], i32 [[TMP1]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]], !waitmask [[META9:![0-9]+]] ; CLEANED-NEXT: unreachable ; - %callee = ptrtoint ptr @async_fun_with_waitmask to i64 - call void (...) @lgc.cps.await__void(i64 %callee, i32 2), !waitmask !3, !continuation.registercount !1, !continuation.returnedRegistercount !1 - call void (...) @lgc.cps.jump(i64 %dummyRetAddr, i32 -1, i64 poison, i32 poison, i64 poison), !continuation.registercount !1 + %callee = ptrtoint ptr @async_fun_with_waitmask to i32 + call void (...) @lgc.cps.await__void(i32 %callee, i32 2), !waitmask !3, !continuation.registercount !1, !continuation.returnedRegistercount !1 + call void (...) @lgc.cps.jump(i32 %dummyRetAddr, i32 -1, i32 poison, i32 poison, i32 poison), !continuation.registercount !1 unreachable } diff --git a/llvmraytracing/test/dx/lower-rt-pipeline-call-shader.ll b/llvmraytracing/test/dx/lower-rt-pipeline-call-shader.ll deleted file mode 100644 index 34a5091c23..0000000000 --- a/llvmraytracing/test/dx/lower-rt-pipeline-call-shader.ll +++ /dev/null @@ -1,191 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata" -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE-CPS %s -; RUN: opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,remove-types-metadata" -S %s --lint-abort-on-error | FileCheck -check-prefix=POSTPROCESS-CPS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.DispatchSystemData = type { i32 } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float } -%struct.HitData = type { float, i32 } -%struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } -%struct.TheirParams = type { i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i32 @_cont_GetContinuationStackAddr() - -declare !pointeetys !13 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) !pointeetys !13 { - ret i32 5 -} - -; Need _cont_ReportHit to get system data type -declare !pointeetys !22 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, i64, %struct.DispatchSystemData) - -declare !pointeetys !15 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) - -declare !pointeetys !17 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) - -define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwind !pointeetys !{%struct.DispatchSystemData poison} { - ret void -} - -define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) !pointeetys !18 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, i64 poison, %struct.DispatchSystemData %dis_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -define void @main() { - %params = alloca %struct.TheirParams, align 4 - call void @dx.op.callShader.struct.TheirParams(i32 159, i32 1, %struct.TheirParams* nonnull %params) - ret void -} - -; Function Attrs: nounwind -declare !pointeetys !19 void @dx.op.callShader.struct.TheirParams(i32, i32, %struct.TheirParams*) #0 - -attributes #0 = { nounwind } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.entryPoints = !{!3, !6} -!lgc.cps.module = !{} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{null, !"", null, !4, !12} -!4 = !{!5, !9, null, null} -!5 = !{!6} -!6 = !{void ()* @main, !"main", null, null, !7} -!7 = !{i32 8, i32 7, i32 6, i32 16, i32 7, i32 8, i32 5, !8} -!8 = !{i32 0} -!9 = !{!10} -!10 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !11} -!11 = !{i32 0, i32 9} -!12 = !{i32 0, i64 65536} -!13 = !{%struct.DispatchSystemData poison} -!14 = !{i32 0, %struct.DispatchSystemData poison} -!15 = !{%struct.SystemData poison} -!16 = !{i32 0, %struct.SystemData poison} -!17 = !{%struct.DispatchSystemData poison} -!18 = !{%struct.DispatchSystemData poison} -!19 = !{%struct.TheirParams poison} -!20 = !{i32 0, %struct.TheirParams poison} -!21 = !{i32 0, %struct.AnyHitTraversalData poison} -!22 = !{%struct.AnyHitTraversalData poison} -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 5 -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define void @main( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !continuation.entry [[META16:![0-9]+]] !continuation.registercount [[META8]] !continuation [[META17:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_THEIRPARAMS]], ptr [[PARAMS]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP3]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [19 x i32], [1 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa19i32a1i32s(i64 2, i32 4, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], [19 x i32] poison, [1 x i32] [[TMP4]]), !continuation.registercount [[META14:![0-9]+]], !continuation.returnedRegistercount [[META14]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [19 x i32], [1 x i32] } [[TMP8]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [1 x i32] [[TMP10]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = freeze [[STRUCT_THEIRPARAMS]] poison -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_THEIRPARAMS]] [[TMP11]], ptr [[PARAMS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_THEIRPARAMS]], ptr [[PARAMS]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP7]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [19 x i32], [1 x i32] } [[TMP8]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP5]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE: .split: -; LOWERRAYTRACINGPIPELINE-NEXT: call void @lgc.cps.complete() -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret i32 5 -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @main( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !lgc.cps [[META14:![0-9]+]] !continuation [[META16:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PARAMS:%.*]] = alloca [[STRUCT_THEIRPARAMS:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_THEIRPARAMS]], ptr [[PARAMS]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP3]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [19 x i32], [1 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa19i32a1i32s(i32 2, i32 4, i32 5, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], [19 x i32] poison, [1 x i32] [[TMP4]]), !continuation.returnedRegistercount [[META14]], !continuation.registercount [[META14]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [19 x i32], [1 x i32] } [[TMP5]], 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [1 x i32] [[TMP6]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = freeze [[STRUCT_THEIRPARAMS]] poison -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_THEIRPARAMS]] [[TMP10]], ptr [[PARAMS]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_THEIRPARAMS]], ptr [[PARAMS]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP9]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [19 x i32], [1 x i32] } [[TMP5]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP7]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: .split: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @lgc.cps.complete() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POSTPROCESS-CPS-SAME: ptr [[DATA:%.*]]) { -; POSTPROCESS-CPS-NEXT: ret i32 5 -; -; -; POSTPROCESS-CPS-LABEL: define void @main( -; POSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !lgc.cps [[META14:![0-9]+]] !continuation [[META16:![0-9]+]] { -; POSTPROCESS-CPS-NEXT: AllocaSpillBB: -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT3:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POSTPROCESS-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT3]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [1 x i32] poison, i32 undef, 0 -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = call i64 @continuation.getAddrAndMD(ptr @main.resume.0) -; POSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 2, i32 [[TMP3]], i64 [[TMP4]], i32 5, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], [19 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define dso_local void @main.resume.0( -; POSTPROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [19 x i32], [1 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META8]] !lgc.cps [[META14]] !continuation [[META16]] { -; POSTPROCESS-CPS-NEXT: entryresume.0: -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [19 x i32], [1 x i32] } [[TMP3]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP5]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = freeze [[STRUCT_THEIRPARAMS:%.*]] poison -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT6:%.*]] = extractvalue [[STRUCT_THEIRPARAMS]] [[TMP7]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [19 x i32], [1 x i32] } [[TMP3]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT4:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP6]], 0 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POSTPROCESS-CPS-NEXT: ret void -; diff --git a/llvmraytracing/test/dx/lower-rt-pipeline-exit-raygen.ll b/llvmraytracing/test/dx/lower-rt-pipeline-exit-raygen.ll index 3eb4bb830b..7b412f68e3 100644 --- a/llvmraytracing/test/dx/lower-rt-pipeline-exit-raygen.ll +++ b/llvmraytracing/test/dx/lower-rt-pipeline-exit-raygen.ll @@ -78,7 +78,7 @@ attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="fa !26 = !{i32 0, %struct.TraversalData poison} !27 = !{%struct.TraversalData poison} ; LOWERRAYTRACINGPIPELINE-LABEL: define void @MyRayGen( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] !lgc.rt.shaderstage [[META16:![0-9]+]] !continuation.entry [[META13:![0-9]+]] !continuation.registercount [[META16]] !continuation [[META19:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR1:[0-9]+]] !lgc.rt.shaderstage [[META16:![0-9]+]] !continuation.entry [[META13:![0-9]+]] !continuation.registercount [[META16]] !continuation [[META19:![0-9]+]] { ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 diff --git a/llvmraytracing/test/dx/lower-rt-pipeline-intrinsics-hit.ll b/llvmraytracing/test/dx/lower-rt-pipeline-intrinsics-hit.ll deleted file mode 100644 index 27f47882ba..0000000000 --- a/llvmraytracing/test/dx/lower-rt-pipeline-intrinsics-hit.ll +++ /dev/null @@ -1,890 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.SystemData = type { %struct.DispatchSystemData, i32 } -%struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float } -%struct.HitData = type { float, i32 } -%struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } -%struct.RayPayload = type { float, float, i32, i32 } -%struct.RaytracingAccelerationStructure = type { i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?Scene@@3URaytracingAccelerationStructure@@A" = external constant %dx.types.Handle, align 4 -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i64 @_cont_GetTraversalAddr() #0 - -declare i32 @_cont_GetContinuationStackAddr() #0 - -declare !pointeetys !25 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #0 - -declare !pointeetys !27 void @_cont_SetTriangleHitAttributes(%struct.SystemData*, %struct.BuiltInTriangleIntersectionAttributes) #0 - -declare %struct.DispatchSystemData @_cont_Traversal(%struct.TraversalData) #0 - -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, i64, %struct.AnyHitTraversalData) #0 - -declare !pointeetys !28 %struct.HitData @_cont_GetCommittedState(%struct.SystemData*) #0 - -; Function Attrs: nounwind memory(read) -declare !pointeetys !29 void @_cont_AcceptHit(%struct.AnyHitTraversalData* nocapture readnone) #1 - -declare i1 @opaqueIsEnd() #0 - -define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwind !pointeetys !{%struct.DispatchSystemData poison} { - ret void -} - -define i1 @_cont_IsEndSearch(%struct.TraversalData* %data) #0 !pointeetys !31 { -; LOWERRAYTRACINGPIPELINE-LABEL: define i1 @_cont_IsEndSearch( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-NEXT: ret i1 [[ISEND]] -; -; DXILCONTPOSTPROCESS-LABEL: define i1 @_cont_IsEndSearch( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-NEXT: ret i1 [[ISEND]] -; - %isEnd = call i1 @opaqueIsEnd() - ret i1 %isEnd -} - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) #0 !pointeetys !33 { -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 5 -; -; DXILCONTPOSTPROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; DXILCONTPOSTPROCESS-NEXT: ret i32 5 -; - ret i32 5 -} - -define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) #0 !pointeetys !35 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 - %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %newdata = call %struct.DispatchSystemData @_cont_Traversal(%struct.TraversalData %trav_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - ret void -} - -define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) #0 !pointeetys !36 { - %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, i64 poison, %struct.AnyHitTraversalData %trav_data) - store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 - ret i1 true -} - -define %struct.HitData @_cont_GetCandidateState(%struct.TraversalData* %data) #0 !pointeetys !37 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.HitData @_cont_GetCandidateState( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; DXILCONTPOSTPROCESS-LABEL: define %struct.HitData @_cont_GetCandidateState( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; DXILCONTPOSTPROCESS-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; - %resPtr = getelementptr %struct.TraversalData, %struct.TraversalData* %data, i32 0, i32 1 - %res = load %struct.HitData, %struct.HitData* %resPtr, align 4 - ret %struct.HitData %res -} - -define float @_cont_RayTCurrent(%struct.DispatchSystemData* nocapture readnone %data, %struct.HitData* %hitData) !pointeetys !38 { -; LOWERRAYTRACINGPIPELINE-LABEL: define float @_cont_RayTCurrent( -; LOWERRAYTRACINGPIPELINE-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) #[[ATTR3:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret float [[RES]] -; -; DXILCONTPOSTPROCESS-LABEL: define float @_cont_RayTCurrent( -; DXILCONTPOSTPROCESS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) #[[ATTR3:[0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; DXILCONTPOSTPROCESS-NEXT: ret float [[RES]] -; - %resPtr = getelementptr %struct.HitData, %struct.HitData* %hitData, i32 0, i32 0 - %res = load float, float* %resPtr, align 4 - ret float %res -} - -; Function Attrs: nounwind memory(none) -define i32 @_cont_HitKind(%struct.SystemData* nocapture readnone %data, %struct.HitData* %0) #2 !pointeetys !40 { -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_HitKind( -; LOWERRAYTRACINGPIPELINE-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES:%.*]] = load i32, ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 [[RES]] -; -; DXILCONTPOSTPROCESS-LABEL: define i32 @_cont_HitKind( -; DXILCONTPOSTPROCESS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[TMP0:%.*]]) #[[ATTR4:[0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES:%.*]] = load i32, ptr [[RESPTR]], align 4 -; DXILCONTPOSTPROCESS-NEXT: ret i32 [[RES]] -; - %resPtr = getelementptr %struct.SystemData, %struct.SystemData* %data, i32 0, i32 1 - %res = load i32, i32* %resPtr, align 4 - ret i32 %res -} - -; Function Attrs: nounwind memory(none) -declare !pointeetys !41 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData* nocapture readnone) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !41 <3 x i32> @_cont_DispatchRaysDimensions3(%struct.DispatchSystemData* nocapture readnone) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !42 <3 x float> @_cont_WorldRayOrigin3(%struct.DispatchSystemData* nocapture readnone) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !42 <3 x float> @_cont_WorldRayDirection3(%struct.DispatchSystemData* nocapture readnone) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !43 float @_cont_RayTMin(%struct.DispatchSystemData* nocapture readnone) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !33 i32 @_cont_RayFlags(%struct.DispatchSystemData* nocapture readnone) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !44 i32 @_cont_InstanceIndex(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !44 i32 @_cont_InstanceID(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !44 i32 @_cont_PrimitiveIndex(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !45 <3 x float> @_cont_ObjectRayOrigin3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !45 <3 x float> @_cont_ObjectRayDirection3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !46 [4 x <3 x float>] @_cont_ObjectToWorld4x3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !46 [4 x <3 x float>] @_cont_WorldToObject4x3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind -define void @RayGen() #3 { -; LOWERRAYTRACINGPIPELINE-LABEL: define void @RayGen( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] !lgc.rt.shaderstage [[META18:![0-9]+]] !continuation [[META30:![0-9]+]] !continuation.entry [[META13:![0-9]+]] !continuation.registercount [[META18]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: call void @lgc.cps.complete() -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; DXILCONTPOSTPROCESS-LABEL: define void @RayGen( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] !lgc.rt.shaderstage [[META18:![0-9]+]] !continuation [[META29:![0-9]+]] !continuation.entry [[META13:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; DXILCONTPOSTPROCESS-NEXT: ret void -; - ret void -} - -; Function Attrs: nounwind -define void @Intersection() #3 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.AnyHitTraversalData @Intersection( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR5]] !lgc.rt.shaderstage [[META31:![0-9]+]] !continuation [[META32:![0-9]+]] !continuation.registercount [[META26:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = call float @lgc.rt.ray.tmin() -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[TMP7]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I1:%.*]] = load float, ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = call i32 @lgc.rt.instance.id() -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I2:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[TMP10]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I3:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I3]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I4:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP9]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I5:%.*]] = load i32, ptr [[RESPTR_I4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = call { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.AnyHitTraversalDatasa2i32a30i32s(i64 3, i32 16, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP12]], {} poison, [30 x i32] [[TMP13]]), !continuation.registercount [[META26]], !continuation.returnedRegistercount [[META26]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP22]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[TMP23]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP22]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP14]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[ISEND_I]], label [[TMP16:%.*]], label [[TMP18:%.*]] -; LOWERRAYTRACINGPIPELINE: 18: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], [2 x i32] poison, [30 x i32] [[TMP21]]), !continuation.registercount [[META26]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 21: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP19]], [2 x i32] poison, [30 x i32] [[TMP24]]), !continuation.registercount [[META26]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; DXILCONTPOSTPROCESS-LABEL: define void @Intersection( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR5]] !lgc.rt.shaderstage [[META30:![0-9]+]] !continuation [[META31:![0-9]+]] !continuation.stacksize [[META25:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], ptr [[TMP13]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP3]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i64 [[RETURNADDR]], ptr addrspace(21) [[TMP5]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[TMP13]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = call float @_cont_RayTMin(ptr [[TMP6]]) -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[DOTFCA_0_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[DOTFCA_0_1_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[TMP13]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[TMP13]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[TMP9]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I]], align 4 -; DXILCONTPOSTPROCESS-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP1]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = call i32 @_cont_InstanceID(ptr [[TMP8]], ptr [[TMP1]]) -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[DOTFCA_0_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I3_FCA_0_INSERT]], i32 [[DOTFCA_0_1_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I3_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I3_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_0_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_0_INSERT]], i32 [[DOTFCA_0_0_1_EXTRACT]], 0, 0, 1 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_1_INSERT]], float [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], i32 [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_1_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_4_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> undef, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT9:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT12:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT9]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT15:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT12]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT18:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT15]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT21:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT18]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT24:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT21]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT27:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT24]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT30:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT27]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT33:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT30]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT36:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT33]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT39:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT36]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT42:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT39]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT45:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT42]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT48:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT45]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT51:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT48]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT54:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT51]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT57:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT54]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT60:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT57]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT63:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT60]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT66:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT63]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT69:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT66]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT72:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT69]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT75:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT72]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT78:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT75]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT81:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT78]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT84:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT81]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT87:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT84]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT90:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT87]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT93:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT90]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT96:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT93]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = call i64 @continuation.getAddrAndMD(ptr @Intersection.resume.0) -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP11]], i64 [[TMP12]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT]], {} poison, [30 x i32] [[DOTFCA_29_INSERT96]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; - %1 = call float @dx.op.rayTMin.f32(i32 153) - %2 = call float @dx.op.rayTCurrent.f32(i32 154) - %3 = call i32 @dx.op.instanceID.i32(i32 141) - %4 = call i32 @dx.op.hitKind.i32(i32 143) - %5 = alloca %struct.BuiltInTriangleIntersectionAttributes, align 4 - %6 = call i1 @dx.op.reportHit.struct.BuiltInTriangleIntersectionAttributes(i32 158, float 4.000000e+00, i32 0, %struct.BuiltInTriangleIntersectionAttributes* nonnull %5) - ret void -} - -; Function Attrs: nounwind -define void @AnyHit(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readonly %attr) #3 !pointeetys !47 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.AnyHitTraversalData @AnyHit( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR5]] !lgc.rt.shaderstage [[META33:![0-9]+]] !continuation [[META34:![0-9]+]] !continuation.registercount [[META27:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ORIGHITATTRS:%.*]] = alloca [8 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[HITATTRSALLOCA:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP8]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP11]], ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP17]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP20]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP26]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP29]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[TMP18]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP19]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP28]], ptr [[ORIGHITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[ORIGHITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP27]], ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = call float @_cont_RayTMin(ptr [[TMP43]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[TMP46]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I1:%.*]] = load float, ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I6:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[TMP48]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I7:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I7]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP49:%.*]] = call i32 @_cont_InstanceID(ptr [[TMP47]], ptr [[TMP3]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I2:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[TMP51]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I3:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I3]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I4:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP50]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I5:%.*]] = load i32, ptr [[RESPTR_I4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP52:%.*]] = insertvalue [[STRUCT_RAYPAYLOAD]] undef, float [[TMP44]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP53:%.*]] = insertvalue [[STRUCT_RAYPAYLOAD]] [[TMP52]], float [[RES_I1]], 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP54:%.*]] = insertvalue [[STRUCT_RAYPAYLOAD]] [[TMP53]], i32 [[TMP49]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP55:%.*]] = insertvalue [[STRUCT_RAYPAYLOAD]] [[TMP54]], i32 [[RES_I5]], 3 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_RAYPAYLOAD]] [[TMP55]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP8]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP41]], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP62:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP59:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP61:%.*]] = load i32, ptr [[TMP59]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP61]], ptr [[TMP62]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP66:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP60:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP64:%.*]] = load i32, ptr [[TMP60]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP64]], ptr [[TMP66]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP63:%.*]] = getelementptr inbounds i32, ptr [[TMP15]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP67:%.*]] = load i32, ptr [[TMP65]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP67]], ptr [[TMP63]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP69:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP69]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP71:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP68:%.*]] = load i32, ptr [[TMP70]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP68]], ptr [[TMP71]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP56:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP57]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP56]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP58:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP72:%.*]] = load [4 x i32], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP58]], [2 x i32] poison, [4 x i32] [[TMP72]]), !continuation.registercount [[META27]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; DXILCONTPOSTPROCESS-LABEL: define void @AnyHit( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR5]] !lgc.rt.shaderstage [[META32:![0-9]+]] !continuation [[META33:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_0_0_1_EXTRACT]], ptr [[DOTFCA_0_0_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_1_0_EXTRACT]], ptr [[DOTFCA_0_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_0_1_1_EXTRACT]], ptr [[DOTFCA_0_1_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; DXILCONTPOSTPROCESS-NEXT: store <3 x float> [[DOTFCA_0_2_EXTRACT]], ptr [[DOTFCA_0_2_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; DXILCONTPOSTPROCESS-NEXT: store <3 x float> [[DOTFCA_0_3_EXTRACT]], ptr [[DOTFCA_0_3_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_4_EXTRACT]], ptr [[DOTFCA_0_4_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_1_0_EXTRACT]], ptr [[DOTFCA_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_1_EXTRACT]], ptr [[DOTFCA_1_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[TMP6]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT22:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP7]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_023_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT22]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_023_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_023_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT22]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_023_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], 0 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = call float @_cont_RayTMin(ptr [[TMP10]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[TMP13]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[RES_I_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR_I6:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[TMP15]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I6]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I7_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I7_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I6]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I7_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I7_FCA_0_INSERT]], i32 [[RES_I7_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I7_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_1_INSERT_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[RES_I7_FCA_1_INSERT_FCA_0_EXTRACT]], ptr [[RES_I7_FCA_1_INSERT_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I7_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I7_FCA_1_INSERT_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[RES_I7_FCA_1_INSERT_FCA_1_EXTRACT]], ptr [[RES_I7_FCA_1_INSERT_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = call i32 @_cont_InstanceID(ptr [[TMP14]], ptr [[TMP2]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR_I2:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[TMP18]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I2]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I3_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I3_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I2]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I3_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I3_FCA_0_INSERT]], i32 [[RES_I3_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I3_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I3_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I3_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR_I4:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP17]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I5:%.*]] = load i32, ptr [[RESPTR_I4]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP19:%.*]] = insertvalue [[STRUCT_RAYPAYLOAD:%.*]] undef, float [[TMP11]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP20:%.*]] = insertvalue [[STRUCT_RAYPAYLOAD]] [[TMP19]], float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP21:%.*]] = insertvalue [[STRUCT_RAYPAYLOAD]] [[TMP20]], i32 [[TMP16]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP22:%.*]] = insertvalue [[STRUCT_RAYPAYLOAD]] [[TMP21]], i32 [[RES_I5]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT8:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP22]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP22]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP22]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP22]], 3 -; DXILCONTPOSTPROCESS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP23:%.*]] = bitcast float [[DOTFCA_0_EXTRACT8]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP24:%.*]] = bitcast float [[DOTFCA_1_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP25:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP26:%.*]] = bitcast i32 [[TMP25]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_025_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP26]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP27:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP28:%.*]] = bitcast i32 [[TMP27]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_025_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_025_0_VEC_INSERT]], float [[TMP28]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT24:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_025_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP29]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT24]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP13:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP13]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_1_GEP14:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_0_1_GEP14]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], i32 [[DOTFCA_0_0_1_LOAD]], 0, 0, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP15:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_0_GEP15]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_1_INSERT]], float [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_1_GEP16:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_1_GEP16]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], i32 [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_2_GEP17:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP17]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_3_GEP18:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP18]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_4_GEP19:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP19]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_GEP20:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP20]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_GEP21:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP21]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP23]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP24]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[TMP30:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP30]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; - %1 = call float @dx.op.rayTMin.f32(i32 153) - %2 = call float @dx.op.rayTCurrent.f32(i32 154) - %3 = call i32 @dx.op.instanceID.i32(i32 141) - %4 = call i32 @dx.op.hitKind.i32(i32 143) - %5 = insertvalue %struct.RayPayload undef, float %1, 0 - %6 = insertvalue %struct.RayPayload %5, float %2, 1 - %7 = insertvalue %struct.RayPayload %6, i32 %3, 2 - %8 = insertvalue %struct.RayPayload %7, i32 %4, 3 - store %struct.RayPayload %8, %struct.RayPayload* %payload, align 4 - ret void -} - -; Function Attrs: nounwind -define void @ClosestHit(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readonly %attr) #3 !pointeetys !47 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @ClosestHit( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [13 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR5]] !lgc.rt.shaderstage [[META35:![0-9]+]] !continuation [[META36:![0-9]+]] !continuation.registercount [[META27]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[HITATTRS:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP6]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP9]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP22]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP26]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP16]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP24]], ptr [[HITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP23]], ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = call float @_cont_RayTMin(ptr [[TMP39]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP42]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I:%.*]] = load float, ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP44]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = call i32 @_cont_InstanceID(ptr [[TMP28]], ptr [[TMP2]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP46]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I1:%.*]] = load i32, ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP6]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP31]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP33]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, ptr [[TMP31]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = load i32, ptr [[TMP35]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP43]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[TMP31]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = load i32, ptr [[TMP38]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP47]], ptr [[TMP48]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP49:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr [[TMP31]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP53:%.*]] = load i32, ptr [[TMP50]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP53]], ptr [[TMP49]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP52:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP51]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = load [4 x i32], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP52]], [14 x i32] poison, [4 x i32] [[TMP45]]), !continuation.registercount [[META27]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; DXILCONTPOSTPROCESS-LABEL: define void @ClosestHit( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [13 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR5]] !lgc.rt.shaderstage [[META34:![0-9]+]] !continuation [[META35:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <3 x i32> [[DOTFCA_0_0_EXTRACT]], ptr [[DOTFCA_0_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT]], ptr [[DOTFCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] @[[_CONT_GETTRIANGLEHITATTRIBUTES]](ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP3]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_08_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast float [[DOTSROA_08_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_08_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_08_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = call float @_cont_RayTMin(ptr [[TMP6]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT9:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP9]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT11:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP9]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT20:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP11]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP21:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT20]], ptr [[DOTFCA_0_GEP21]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT22:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP11]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP23:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT22]], ptr [[DOTFCA_1_GEP23]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = call i32 @_cont_InstanceID(ptr [[TMP10]], ptr [[TMP1]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT15:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP13]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT17:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP13]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I1:%.*]] = load i32, ptr [[RESPTR_I]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP14]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [4 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[TMP19:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP19]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [14 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; - %1 = call float @dx.op.rayTMin.f32(i32 153) - %2 = call float @dx.op.rayTCurrent.f32(i32 154) - %3 = call i32 @dx.op.instanceID.i32(i32 141) - %4 = call i32 @dx.op.hitKind.i32(i32 143) - ret void -} - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysDimensions.i32(i32, i8) #2 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysIndex.i32(i32, i8) #2 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayDirection.f32(i32, i8) #2 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayOrigin.f32(i32, i8) #2 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.worldRayDirection.f32(i32, i8) #2 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.worldRayOrigin.f32(i32, i8) #2 - -; Function Attrs: nounwind memory(read) -declare float @dx.op.rayTCurrent.f32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.rayTMin.f32(i32) #2 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.hitKind.i32(i32) #2 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.primitiveIndex.i32(i32) #2 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.instanceID.i32(i32) #2 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.instanceIndex.i32(i32) #2 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.rayFlags.i32(i32) #2 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.worldToObject.f32(i32, i32, i8) #2 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectToWorld.f32(i32, i32, i8) #2 - -; Function Attrs: nounwind -declare !pointeetys !50 i1 @dx.op.reportHit.struct.BuiltInTriangleIntersectionAttributes(i32, float, i32, %struct.BuiltInTriangleIntersectionAttributes*) #4 - -attributes #0 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind memory(read) } -attributes #2 = { nounwind memory(none) } -attributes #3 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #4 = { nounwind } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.resources = !{!3} -!dx.typeAnnotations = !{!10} -!dx.entryPoints = !{!14, !16, !19, !21, !23} -!lgc.rt.max.attribute.size = !{!51} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{!4, !7, null, null} -!4 = !{!5} -!5 = !{i32 0, %struct.RaytracingAccelerationStructure* bitcast (%dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A" to %struct.RaytracingAccelerationStructure*), !"Scene", i32 0, i32 0, i32 1, i32 16, i32 0, !6} -!6 = !{i32 0, i32 4} -!7 = !{!8} -!8 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !9} -!9 = !{i32 0, i32 9} -!10 = !{i32 1, void ()* @RayGen, !11} -!11 = !{!12} -!12 = !{i32 1, !13, !13} -!13 = !{} -!14 = !{null, !"", null, !3, !15} -!15 = !{i32 0, i64 65536} -!16 = !{void ()* @RayGen, !"RayGen", null, null, !17} -!17 = !{i32 8, i32 7, i32 5, !18} -!18 = !{i32 0} -!19 = !{void ()* @Intersection, !"Intersection", null, null, !20} -!20 = !{i32 8, i32 8, i32 5, !18} -!21 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @AnyHit, !"AnyHit", null, null, !22} -!22 = !{i32 8, i32 9, i32 5, !18} -!23 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @ClosestHit, !"ClosestHit", null, null, !24} -!24 = !{i32 8, i32 10, i32 5, !18} -!25 = !{%struct.SystemData poison} -!26 = !{i32 0, %struct.SystemData poison} -!27 = !{%struct.SystemData poison} -!28 = !{%struct.SystemData poison} -!29 = !{%struct.AnyHitTraversalData poison} -!30 = !{i32 0, %struct.AnyHitTraversalData poison} -!31 = !{%struct.TraversalData poison} -!32 = !{i32 0, %struct.TraversalData poison} -!33 = !{%struct.DispatchSystemData poison} -!34 = !{i32 0, %struct.DispatchSystemData poison} -!35 = !{%struct.DispatchSystemData poison} -!36 = !{%struct.AnyHitTraversalData poison} -!37 = !{%struct.TraversalData poison} -!38 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!39 = !{i32 0, %struct.HitData poison} -!40 = !{null, %struct.SystemData poison, %struct.HitData poison} -!41 = !{%struct.DispatchSystemData poison} -!42 = !{%struct.DispatchSystemData poison} -!43 = !{%struct.DispatchSystemData poison} -!44 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!45 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!46 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!47 = !{null, %struct.RayPayload poison, %struct.BuiltInTriangleIntersectionAttributes poison} -!48 = !{i32 0, %struct.RayPayload poison} -!49 = !{i32 0, %struct.BuiltInTriangleIntersectionAttributes poison} -!50 = !{%struct.BuiltInTriangleIntersectionAttributes poison} -!51 = !{i32 8} diff --git a/llvmraytracing/test/dx/lower-rt-pipeline-intrinsics.ll b/llvmraytracing/test/dx/lower-rt-pipeline-intrinsics.ll deleted file mode 100644 index 2a900dec45..0000000000 --- a/llvmraytracing/test/dx/lower-rt-pipeline-intrinsics.ll +++ /dev/null @@ -1,502 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function ClosestHit --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, <3 x float>, <3 x float>, float } -%struct.HitData = type { float, i32 } -%struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } -%struct.RayPayload = type { float, float, i32, i32 } -%struct.RaytracingAccelerationStructure = type { i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?Scene@@3URaytracingAccelerationStructure@@A" = external constant %dx.types.Handle, align 4 -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i64 @_cont_GetTraversalAddr() #0 - -declare i32 @_cont_GetContinuationStackAddr() #0 - -declare !pointeetys !19 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #0 - -declare !pointeetys !21 void @_cont_SetTriangleHitAttributes(%struct.SystemData*, %struct.BuiltInTriangleIntersectionAttributes) #0 - -declare %struct.DispatchSystemData @_cont_Traversal(%struct.TraversalData) #0 - -declare !pointeetys !22 %struct.HitData @_cont_GetCandidateState(%struct.AnyHitTraversalData*) #0 - -declare !pointeetys !24 %struct.HitData @_cont_GetCommittedState(%struct.SystemData*) #0 - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) #0 !pointeetys !25 { - ret i32 5 -} - -define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) #0 !pointeetys !27 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 - %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %newdata = call %struct.DispatchSystemData @_cont_Traversal(%struct.TraversalData %trav_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - ret void -} - -; Function Attrs: nounwind memory(none) -declare !pointeetys !28 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !28 <3 x i32> @_cont_DispatchRaysDimensions3(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !29 <3 x float> @_cont_WorldRayOrigin3(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !29 <3 x float> @_cont_WorldRayDirection3(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !30 float @_cont_RayTMin(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(read) -declare !pointeetys !31 float @_cont_RayTCurrent(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !25 i32 @_cont_RayFlags(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !33 i32 @_cont_InstanceIndex(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !33 i32 @_cont_InstanceID(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !33 i32 @_cont_PrimitiveIndex(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !34 <3 x float> @_cont_ObjectRayOrigin3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !34 <3 x float> @_cont_ObjectRayDirection3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !35 [4 x <3 x float>] @_cont_ObjectToWorld4x3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !35 [4 x <3 x float>] @_cont_WorldToObject4x3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !36 i32 @_cont_HitKind(%struct.SystemData* nocapture readnone, %struct.HitData*) #1 - -declare !pointeetys !40 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) - -; Function Attrs: nounwind -define void @ClosestHit(%struct.RayPayload* %0, %struct.BuiltInTriangleIntersectionAttributes* %1) #3 !pointeetys !37 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @ClosestHit( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [17 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META23:![0-9]+]] !continuation [[META24:![0-9]+]] !continuation.registercount [[META20:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = alloca [4 x <3 x float>], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = alloca [4 x <3 x float>], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[HITATTRS:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [10 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP14]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP19]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP23]], ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP18]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[TMP21]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP79:%.*]] = load i32, ptr [[TMP26]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP79]], ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[TMP18]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[TMP21]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP91:%.*]] = load i32, ptr [[TMP27]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP91]], ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP31]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP25]], ptr [[HITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP30]], ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-NEXT: [[A:%.*]] = extractelement <3 x i32> [[TMP47]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP48:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.dimensions() -; LOWERRAYTRACINGPIPELINE-NEXT: [[B:%.*]] = extractelement <3 x i32> [[TMP48]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP50:%.*]] = call <3 x float> @_cont_WorldRayOrigin3(ptr [[TMP49]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[C:%.*]] = extractelement <3 x float> [[TMP50]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP52:%.*]] = call <3 x float> @_cont_WorldRayDirection3(ptr [[TMP51]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[D:%.*]] = extractelement <3 x float> [[TMP52]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP54:%.*]] = call float @_cont_RayTMin(ptr [[TMP53]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP41]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP57:%.*]] = call float @_cont_RayTCurrent(ptr [[TMP55]], ptr [[TMP8]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP59:%.*]] = call i32 @_cont_RayFlags(ptr [[TMP58]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP61:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP61]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP62:%.*]] = call i32 @_cont_InstanceIndex(ptr [[TMP60]], ptr [[TMP4]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP64:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP64]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP65:%.*]] = call i32 @_cont_InstanceID(ptr [[TMP63]], ptr [[TMP5]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP67:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP67]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP68:%.*]] = call i32 @_cont_PrimitiveIndex(ptr [[TMP66]], ptr [[TMP6]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP70:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP70]], ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP71:%.*]] = call <3 x float> @_cont_ObjectRayOrigin3(ptr [[TMP69]], ptr [[TMP9]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[K:%.*]] = extractelement <3 x float> [[TMP71]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP73:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP73]], ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP74:%.*]] = call <3 x float> @_cont_ObjectRayDirection3(ptr [[TMP72]], ptr [[TMP10]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[L:%.*]] = extractelement <3 x float> [[TMP74]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP76:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP76]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP77:%.*]] = call [4 x <3 x float>] @_cont_ObjectToWorld4x3(ptr [[TMP75]], ptr [[TMP2]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x <3 x float>] [[TMP77]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[COL_GEP1:%.*]] = getelementptr [4 x <3 x float>], ptr [[TMP13]], i32 0, i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[COL_GEP_LOAD2:%.*]] = load <3 x float>, ptr [[COL_GEP1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[M:%.*]] = extractelement <3 x float> [[COL_GEP_LOAD2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP78:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP82:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP82]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP80:%.*]] = call [4 x <3 x float>] @_cont_WorldToObject4x3(ptr [[TMP78]], ptr [[TMP3]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x <3 x float>] [[TMP80]], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[COL_GEP:%.*]] = getelementptr [4 x <3 x float>], ptr [[TMP12]], i32 0, i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[COL_GEP_LOAD:%.*]] = load <3 x float>, ptr [[COL_GEP]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[N:%.*]] = extractelement <3 x float> [[COL_GEP_LOAD]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP83:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[TMP83]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP84:%.*]] = call i32 @_cont_HitKind(ptr [[SYSTEM_DATA_ALLOCA]], ptr [[TMP7]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP14]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP86:%.*]] = load i32, ptr [[TMP85]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP86]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP87:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP88:%.*]] = getelementptr inbounds i32, ptr [[TMP85]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP89:%.*]] = load i32, ptr [[TMP88]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP89]], ptr [[TMP87]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP90:%.*]] = getelementptr inbounds i32, ptr [[TMP87]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP92:%.*]] = getelementptr inbounds i32, ptr [[TMP88]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP93:%.*]] = load i32, ptr [[TMP92]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP93]], ptr [[TMP90]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP94:%.*]] = getelementptr inbounds i32, ptr [[TMP87]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP95:%.*]] = getelementptr inbounds i32, ptr [[TMP88]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP96:%.*]] = load i32, ptr [[TMP95]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP96]], ptr [[TMP94]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP98:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP97]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP81:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP98]], [17 x i32] poison, [10 x i32] [[TMP81]]), !continuation.registercount [[META20]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; DXILCONTPOSTPROCESS-LABEL: define void @ClosestHit( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [17 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation [[META23:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA1:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP52:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[TMP52]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <3 x i32> [[DOTFCA_0_0_EXTRACT]], ptr [[DOTFCA_0_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT19:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP11]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_021_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT19]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = bitcast float [[DOTSROA_021_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_021_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT19]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = bitcast float [[DOTSROA_021_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[TMP52]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP14]]) -; DXILCONTPOSTPROCESS-NEXT: [[A:%.*]] = extractelement <3 x i32> [[TMP15]], i8 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[TMP52]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = call <3 x i32> @_cont_DispatchRaysDimensions3(ptr [[TMP16]]) -; DXILCONTPOSTPROCESS-NEXT: [[B:%.*]] = extractelement <3 x i32> [[TMP17]], i8 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP19:%.*]] = call <3 x float> @_cont_WorldRayOrigin3(ptr [[TMP18]]) -; DXILCONTPOSTPROCESS-NEXT: [[C:%.*]] = extractelement <3 x float> [[TMP19]], i8 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP21:%.*]] = call <3 x float> @_cont_WorldRayDirection3(ptr [[TMP20]]) -; DXILCONTPOSTPROCESS-NEXT: [[D:%.*]] = extractelement <3 x float> [[TMP21]], i8 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP23:%.*]] = call float @_cont_RayTMin(ptr [[TMP22]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP25:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT29:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP25]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP30:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP7]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT29]], ptr [[DOTFCA_0_GEP30]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT31:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP25]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP32:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP7]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT31]], ptr [[DOTFCA_1_GEP32]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP26:%.*]] = call float @_cont_RayTCurrent(ptr [[TMP24]], ptr [[TMP7]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP28:%.*]] = call i32 @_cont_RayFlags(ptr [[TMP27]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP30:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT45:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP30]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP46:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT45]], ptr [[DOTFCA_0_GEP46]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT47:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP30]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP48:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT47]], ptr [[DOTFCA_1_GEP48]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP31:%.*]] = call i32 @_cont_InstanceIndex(ptr [[TMP29]], ptr [[TMP3]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP33:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT41:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP33]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP42:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP4]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT41]], ptr [[DOTFCA_0_GEP42]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT43:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP33]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP44:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP4]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT43]], ptr [[DOTFCA_1_GEP44]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP34:%.*]] = call i32 @_cont_InstanceID(ptr [[TMP32]], ptr [[TMP4]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP36:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT37:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP36]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP38:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP5]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT37]], ptr [[DOTFCA_0_GEP38]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT39:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP36]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP40:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP5]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT39]], ptr [[DOTFCA_1_GEP40]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP37:%.*]] = call i32 @_cont_PrimitiveIndex(ptr [[TMP35]], ptr [[TMP5]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP39:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT25:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP39]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP26:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP8]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT25]], ptr [[DOTFCA_0_GEP26]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT27:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP39]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP28:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP8]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT27]], ptr [[DOTFCA_1_GEP28]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP40:%.*]] = call <3 x float> @_cont_ObjectRayOrigin3(ptr [[TMP38]], ptr [[TMP8]]) -; DXILCONTPOSTPROCESS-NEXT: [[K:%.*]] = extractelement <3 x float> [[TMP40]], i8 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP42:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT22:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP42]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP23:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP9]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT22]], ptr [[DOTFCA_0_GEP23]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT24:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP42]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP9]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT24]], ptr [[DOTFCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP43:%.*]] = call <3 x float> @_cont_ObjectRayDirection3(ptr [[TMP41]], ptr [[TMP9]]) -; DXILCONTPOSTPROCESS-NEXT: [[L:%.*]] = extractelement <3 x float> [[TMP43]], i8 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP45:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT53:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP45]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP54:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT53]], ptr [[DOTFCA_0_GEP54]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT55:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP45]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP56:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT55]], ptr [[DOTFCA_1_GEP56]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP46:%.*]] = call [4 x <3 x float>] @_cont_ObjectToWorld4x3(ptr [[TMP44]], ptr [[TMP1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [4 x <3 x float>] [[TMP46]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [4 x <3 x float>] [[TMP46]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [4 x <3 x float>] [[TMP46]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [4 x <3 x float>] [[TMP46]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[M:%.*]] = extractelement <3 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP48:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT49:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP48]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP50:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT49]], ptr [[DOTFCA_0_GEP50]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT51:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP48]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP52:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT51]], ptr [[DOTFCA_1_GEP52]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP49:%.*]] = call [4 x <3 x float>] @_cont_WorldToObject4x3(ptr [[TMP47]], ptr [[TMP2]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT10:%.*]] = extractvalue [4 x <3 x float>] [[TMP49]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT12:%.*]] = extractvalue [4 x <3 x float>] [[TMP49]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT13:%.*]] = extractvalue [4 x <3 x float>] [[TMP49]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT14:%.*]] = extractvalue [4 x <3 x float>] [[TMP49]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[N:%.*]] = extractelement <3 x float> [[DOTFCA_0_EXTRACT10]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP50:%.*]] = call [[STRUCT_HITDATA]] @[[_CONT_GETCOMMITTEDSTATE]](ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT33:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP50]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP34:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP6]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_0_EXTRACT33]], ptr [[DOTFCA_0_GEP34]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT35:%.*]] = extractvalue [[STRUCT_HITDATA]] [[TMP50]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_GEP36:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP6]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_EXTRACT35]], ptr [[DOTFCA_1_GEP36]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP51:%.*]] = call i32 @_cont_HitKind(ptr [[SYSTEM_DATA_ALLOCA1]], ptr [[TMP6]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP53]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [10 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[TMP57:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP57]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [17 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; - %a = call i32 @dx.op.dispatchRaysIndex.i32(i32 145, i8 0) - %b = call i32 @dx.op.dispatchRaysDimensions.i32(i32 146, i8 0) - %c = call float @dx.op.worldRayOrigin.f32(i32 147, i8 0) - %d = call float @dx.op.worldRayDirection.f32(i32 148, i8 0) - %e = call float @dx.op.rayTMin.f32(i32 153) - %f = call float @dx.op.rayTCurrent.f32(i32 154) - %g = call i32 @dx.op.rayFlags.i32(i32 144) - %h = call i32 @dx.op.instanceIndex.i32(i32 142) - %i = call i32 @dx.op.instanceID.i32(i32 141) - %j = call i32 @dx.op.primitiveIndex.i32(i32 161) - %k = call float @dx.op.objectRayOrigin.f32(i32 149, i8 0) - %l = call float @dx.op.objectRayDirection.f32(i32 150, i8 0) - %m = call float @dx.op.objectToWorld.f32(i32 151, i32 0, i8 0) - %n = call float @dx.op.worldToObject.f32(i32 152, i32 0, i8 0) - %o = call i32 @dx.op.hitKind.i32(i32 143) - ret void -} - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysDimensions.i32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysIndex.i32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayDirection.f32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayOrigin.f32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.worldRayDirection.f32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.worldRayOrigin.f32(i32, i8) #1 - -; Function Attrs: nounwind memory(read) -declare float @dx.op.rayTCurrent.f32(i32) #2 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.rayTMin.f32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.hitKind.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.primitiveIndex.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.instanceID.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.instanceIndex.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.rayFlags.i32(i32) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.worldToObject.f32(i32, i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectToWorld.f32(i32, i32, i8) #1 - -attributes #0 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind memory(none) } -attributes #2 = { nounwind memory(read) } -attributes #3 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.resources = !{!3} -!dx.typeAnnotations = !{!10} -!dx.entryPoints = !{!14, !16} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{!4, !7, null, null} -!4 = !{!5} -!5 = !{i32 0, %struct.RaytracingAccelerationStructure* bitcast (%dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A" to %struct.RaytracingAccelerationStructure*), !"Scene", i32 0, i32 0, i32 1, i32 16, i32 0, !6} -!6 = !{i32 0, i32 4} -!7 = !{!8} -!8 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !9} -!9 = !{i32 0, i32 9} -!10 = !{i32 1, void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @ClosestHit, !11} -!11 = !{!12} -!12 = !{i32 1, !13, !13} -!13 = !{} -!14 = !{null, !"", null, !3, !15} -!15 = !{i32 0, i64 65536} -!16 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @ClosestHit, !"ClosestHit", null, null, !17} -!17 = !{i32 8, i32 10, i32 5, !18} -!18 = !{i32 0} -!19 = !{%struct.SystemData poison} -!20 = !{i32 0, %struct.SystemData poison} -!21 = !{%struct.SystemData poison} -!22 = !{%struct.AnyHitTraversalData poison} -!23 = !{i32 0, %struct.AnyHitTraversalData poison} -!24 = !{%struct.SystemData poison} -!25 = !{%struct.DispatchSystemData poison} -!26 = !{i32 0, %struct.DispatchSystemData poison} -!27 = !{%struct.DispatchSystemData poison} -!28 = !{%struct.DispatchSystemData poison} -!29 = !{%struct.DispatchSystemData poison} -!30 = !{%struct.DispatchSystemData poison} -!31 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!32 = !{i32 0, %struct.HitData poison} -!33 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!34 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!35 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!36 = !{null, %struct.SystemData poison, %struct.HitData poison} -!37 = !{null, %struct.RayPayload poison, %struct.BuiltInTriangleIntersectionAttributes poison} -!38 = !{i32 0, %struct.RayPayload poison} -!39 = !{i32 0, %struct.BuiltInTriangleIntersectionAttributes poison} -!40 = !{%struct.AnyHitTraversalData poison} diff --git a/llvmraytracing/test/dx/lower-rt-pipeline-large-payload.ll b/llvmraytracing/test/dx/lower-rt-pipeline-large-payload.ll deleted file mode 100644 index 2ce27b76fe..0000000000 --- a/llvmraytracing/test/dx/lower-rt-pipeline-large-payload.ll +++ /dev/null @@ -1,800 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; Test handling of large payloads and payload spilling. -; We set the max number of payload registers to 2, so relatively small payloads need to spill already. -; This results in a bit nicer result IR, containing less "spam" copying payload fields around. -; We also set a max hit attribute size ensuring there is no need for hit attribute storage in the payload. -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=CLEANUP %s -; RUN: opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,remove-types-metadata" -S %s --lint-abort-on-error | FileCheck -check-prefix=CLEANUP-CPS %s -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%dx.types.ResourceProperties = type { i32, i32 } -; Doesn't need to spill: -%struct.SmallPayload = type { [1 x i32] } -; These two need to spill: -%struct.MediumPayload = type { [3 x i32] } -%struct.LargePayload = type { [5 x i32] } -%struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i64 } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.HitData = type { <3 x float>, <3 x float>, float, i32 } -%struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } - -@"\01?Scene@@3URaytracingAccelerationStructure@@A" = external constant %dx.types.Handle, align 4 - -; Need _cont_ReportHit to get system data type -declare !pointeetys !206 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) - -; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #3 - -declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types.ResourceProperties) #3 -declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) #4 -declare !pointeetys !200 void @dx.op.traceRay.struct.SmallPayload(i32, %dx.types.Handle, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, %struct.SmallPayload*) -declare !pointeetys !201 void @dx.op.traceRay.struct.MediumPayload(i32, %dx.types.Handle, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, %struct.MediumPayload*) -declare !pointeetys !202 void @dx.op.traceRay.struct.LargePayload(i32, %dx.types.Handle, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, %struct.LargePayload*) - -define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) #1 !pointeetys !203 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 - %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %addr = call i64 @_AmdGetResumePointAddr() #3 - %trav_data2 = insertvalue %struct.TraversalData %trav_data, i64 %addr, 5 - %newdata = call %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i64 4, i64 -1, %struct.TraversalData %trav_data2) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -define void @Miss(%struct.SmallPayload* noalias nocapture %outerpayload) !pointeetys !204 { - %p1 = alloca %struct.SmallPayload - %p2 = alloca %struct.MediumPayload - %p3 = alloca %struct.LargePayload - ; Avoid undefs being written to payload registers - ; caused by uninitialized payloads. - store %struct.SmallPayload zeroinitializer, %struct.SmallPayload* %p1 - store %struct.MediumPayload zeroinitializer, %struct.LargePayload* %p2 - store %struct.LargePayload zeroinitializer, %struct.MediumPayload* %p3 - - %t1 = load %dx.types.Handle, %dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 - %t2 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %t1) - %t3 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %t2, %dx.types.ResourceProperties { i32 16, i32 0 }) - - call void @dx.op.traceRay.struct.SmallPayload(i32 157, %dx.types.Handle %t3, i32 16, i32 -1, i32 0, i32 1, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0x3F50624DE0000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+04, %struct.SmallPayload* nonnull %p1) - call void @dx.op.traceRay.struct.MediumPayload(i32 157, %dx.types.Handle %t3, i32 16, i32 -1, i32 0, i32 1, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0x3F50624DE0000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+04, %struct.MediumPayload* nonnull %p2) - call void @dx.op.traceRay.struct.LargePayload(i32 157, %dx.types.Handle %t3, i32 16, i32 -1, i32 0, i32 1, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0x3F50624DE0000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+04, %struct.LargePayload* nonnull %p3) - ret void -} - -; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i64, i64, %struct.TraversalData) #1 - -; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #1 - -; Function Attrs: alwaysinline -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #1 - -; Function Attrs: alwaysinline -declare !pointeetys !19 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #1 - -; Function Attrs: alwaysinline -declare !pointeetys !21 void @_cont_SetTriangleHitAttributes(%struct.SystemData*, %struct.BuiltInTriangleIntersectionAttributes) #1 - -; Function Attrs: alwaysinline -declare !pointeetys !22 i1 @_cont_IsEndSearch(%struct.TraversalData*) #1 - -; Function Attrs: nounwind memory(read) -declare !pointeetys !24 i32 @_cont_HitKind(%struct.SystemData* nocapture readnone, %struct.HitData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !26 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) #3 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !28 void @_AmdRestoreSystemDataAnyHit(%struct.AnyHitTraversalData*) #3 - -declare !pointeetys !30 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -; Function Attrs: alwaysinline -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) #1 !pointeetys !30 { - ret i32 5 -} - -attributes #0 = { nounwind } -attributes #1 = { alwaysinline } -attributes #2 = { nounwind memory(read) } -attributes #3 = { nounwind memory(none) } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.typeAnnotations = !{!3} -!dx.entryPoints = !{!12, !14} -!continuation.maxPayloadRegisterCount = !{!31} -!lgc.cps.module = !{} -!lgc.rt.max.attribute.size = !{!32} - -!0 = !{!"dxcoob 2019.05.00"} -!1 = !{i32 1, i32 7} -!2 = !{!"lib", i32 6, i32 7} -!3 = !{i32 1, void (%struct.SmallPayload*)* @Miss, !4} -!4 = !{!5, !7} -!5 = !{i32 1, !6, !6} -!6 = !{} -!7 = !{i32 2, !6, !6} -!9 = !{!10, !11, !11} -!10 = !{i32 0, i32 259} -!11 = !{i32 0, i32 513} -!12 = !{null, !"", null, null, !13} -!13 = !{i32 0, i64 32} -!14 = !{void (%struct.SmallPayload*)* @Miss, !"Miss", null, null, !15} -!15 = !{i32 8, i32 11, i32 6, i32 24, i32 5, !16} -!16 = !{i32 0} -!19 = !{%struct.SystemData poison} -!20 = !{i32 0, %struct.SystemData poison} -!21 = !{%struct.SystemData poison} -!22 = !{%struct.TraversalData poison} -!23 = !{i32 0, %struct.TraversalData poison} -!24 = !{null, %struct.SystemData poison, %struct.HitData poison} -!25 = !{i32 0, %struct.HitData poison} -!26 = !{%struct.DispatchSystemData poison} -!27 = !{i32 0, %struct.DispatchSystemData poison} -!28 = !{%struct.AnyHitTraversalData poison} -!29 = !{i32 0, %struct.AnyHitTraversalData poison} -!30 = !{%struct.DispatchSystemData poison} -!31 = !{i32 2} -!32 = !{i32 8} - -!100 = !{i32 0, %struct.SmallPayload poison} -!101 = !{i32 0, %struct.MediumPayload poison} -!102 = !{i32 0, %struct.LargePayload poison} -!103 = !{i32 0, %struct.DispatchSystemData poison} -!200 = !{%struct.SmallPayload poison} -!201 = !{%struct.MediumPayload poison} -!202 = !{%struct.LargePayload poison} -!203 = !{%struct.DispatchSystemData poison} -!204 = !{%struct.SmallPayload poison} -!205 = !{i32 0, %struct.AnyHitTraversalData poison} -!206 = !{%struct.AnyHitTraversalData poison} -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @Miss( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [27 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META16:![0-9]+]] !continuation.registercount [[META17:![0-9]+]] !continuation [[META18:![0-9]+]] !continuation.stacksize [[META19:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[P1:%.*]] = alloca [[STRUCT_SMALLPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[P2:%.*]] = alloca [[STRUCT_MEDIUMPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[P3:%.*]] = alloca [[STRUCT_LARGEPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [6 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_SMALLPAYLOAD]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [1 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_SMALLPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP5]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SMALLPAYLOAD]] zeroinitializer, ptr [[P1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_MEDIUMPAYLOAD]] zeroinitializer, ptr [[P2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_LARGEPAYLOAD]] zeroinitializer, ptr [[P3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[T1:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[T2:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[T1]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[T3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[T2]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T3]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR0:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[ADDR_I]], 5 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_SMALLPAYLOAD]], ptr [[P1]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP9]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [1 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa27i32a1i32s(i64 4, i32 8, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [1 x i32] [[TMP10]]), !continuation.registercount [[META17]], !waitmask [[META6:![0-9]+]], !continuation.returnedRegistercount [[META17]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [1 x i32] } [[TMP25]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [1 x i32] [[TMP13]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = freeze [[STRUCT_SMALLPAYLOAD]] poison -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SMALLPAYLOAD]] [[TMP15]], ptr [[P1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_SMALLPAYLOAD]], ptr [[P1]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP19]], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [1 x i32] } [[TMP25]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP11]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT10:%.*]] -; LOWERRAYTRACINGPIPELINE: .split: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T3]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I1:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYS_DATA_I2:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I1]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I3:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I2]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I4:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR0]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA2_I5:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I3]], i64 [[ADDR_I4]], 5 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = ptrtoint ptr [[PAYLOAD_SPILL_ALLOCA]] to i32 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP33]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = load ptr addrspace(32), ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_MEDIUMPAYLOAD]], ptr [[P2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP41]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP18]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP21]], ptr addrspace(32) [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP17]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP24]], ptr addrspace(32) [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = load [2 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa27i32a2i32s(i64 4, i32 8, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I5]], [10 x i32] poison, [2 x i32] [[TMP29]]), !continuation.registercount [[META13:![0-9]+]], !waitmask [[META6]], !continuation.returnedRegistercount [[META13]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP60:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP44]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [2 x i32] [[TMP60]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = freeze [[STRUCT_MEDIUMPAYLOAD]] poison -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_MEDIUMPAYLOAD]] [[TMP34]], ptr [[P2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = load ptr addrspace(32), ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_MEDIUMPAYLOAD]], ptr [[P2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP36]], ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(32) [[TMP27]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP31]], ptr [[TMP30]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr [[TMP30]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP27]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(32) [[TMP42]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP43]], ptr [[TMP32]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP61:%.*]] = load ptr addrspace(32), ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP44]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP26]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT9:%.*]] -; LOWERRAYTRACINGPIPELINE: .split.split: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T3]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I5:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP53]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYS_DATA_I6:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I5]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I7:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I6]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I9:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR0]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA2_I10:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I7]], i64 [[ADDR_I9]], 5 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = ptrtoint ptr [[PAYLOAD_SPILL_ALLOCA]] to i32 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP38]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = load ptr addrspace(32), ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_LARGEPAYLOAD]], ptr [[P3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP66:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP58:%.*]] = load i32, ptr [[TMP40]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP58]], ptr [[TMP66]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP54:%.*]] = getelementptr inbounds i32, ptr [[TMP40]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP55:%.*]] = load i32, ptr [[TMP54]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP55]], ptr addrspace(32) [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP56:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP39]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = getelementptr inbounds i32, ptr [[TMP54]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP57:%.*]] = load i32, ptr [[TMP45]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP57]], ptr addrspace(32) [[TMP56]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP39]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr [[TMP54]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP49:%.*]] = load i32, ptr [[TMP48]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP49]], ptr addrspace(32) [[TMP47]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP39]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP51:%.*]] = getelementptr inbounds i32, ptr [[TMP54]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP52:%.*]] = load i32, ptr [[TMP51]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP52]], ptr addrspace(32) [[TMP50]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP62:%.*]] = load [2 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP64:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa27i32a2i32s(i64 4, i32 8, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I10]], [10 x i32] poison, [2 x i32] [[TMP62]]), !continuation.registercount [[META13]], !waitmask [[META6]], !continuation.returnedRegistercount [[META13]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP65:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP64]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [2 x i32] [[TMP65]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP71:%.*]] = freeze [[STRUCT_LARGEPAYLOAD]] poison -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_LARGEPAYLOAD]] [[TMP71]], ptr [[P3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP76:%.*]] = load ptr addrspace(32), ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT_LARGEPAYLOAD]], ptr [[P3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP68:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP69:%.*]] = load i32, ptr [[TMP68]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP69]], ptr [[TMP77]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP82:%.*]] = getelementptr inbounds i32, ptr [[TMP77]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP59:%.*]] = load i32, ptr addrspace(32) [[TMP76]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP59]], ptr [[TMP82]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP86:%.*]] = getelementptr inbounds i32, ptr [[TMP82]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP87:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP76]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP88:%.*]] = load i32, ptr addrspace(32) [[TMP87]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP88]], ptr [[TMP86]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP89:%.*]] = getelementptr inbounds i32, ptr [[TMP82]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP90:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP76]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP91:%.*]] = load i32, ptr addrspace(32) [[TMP90]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP91]], ptr [[TMP89]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP92:%.*]] = getelementptr inbounds i32, ptr [[TMP82]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP93:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP76]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP94:%.*]] = load i32, ptr addrspace(32) [[TMP93]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP94]], ptr [[TMP92]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP81:%.*]] = load ptr addrspace(32), ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP75:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP64]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP75]], ptr [[TMP53]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE: .split.split.split: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT_SMALLPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP84:%.*]] = load i32, ptr [[TMP70]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP84]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP101:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP100]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP95:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP101]], [27 x i32] poison, [1 x i32] [[TMP95]]), !continuation.registercount [[META17]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR1:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 5 -; -; -; CLEANUP-LABEL: define void @Miss( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [27 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META16:![0-9]+]] !continuation.registercount [[META17:![0-9]+]] !continuation [[META18:![0-9]+]] !continuation.stacksize [[META19:![0-9]+]] !continuation.state [[META20:![0-9]+]] { -; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 28) -; CLEANUP-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MISS_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: [[RETURNADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[MISS_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CLEANUP-NEXT: store i64 [[RETURNADDR]], ptr addrspace(32) [[RETURNADDR_SPILL_ADDR]], align 4 -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[PAYLOAD]], 0 -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT_SPILL_ADDR:%.*]] = getelementptr inbounds [[MISS_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CLEANUP-NEXT: store i32 [[PAYLOAD_FCA_0_EXTRACT]], ptr addrspace(32) [[PAYLOAD_FCA_0_EXTRACT_SPILL_ADDR]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: [[T1:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-NEXT: [[T2:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[T1]]) -; CLEANUP-NEXT: [[T3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[T2]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-NEXT: [[TMP1:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T3]]) -; CLEANUP-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; CLEANUP-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; CLEANUP-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; CLEANUP-NEXT: [[ADDR_I:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @Miss.resume.0) -; CLEANUP-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[ADDR_I]], 5 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT15:%.*]] = insertvalue [1 x i32] poison, i32 0, 0 -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 4, i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT15]]), !continuation.registercount [[META17]], !waitmask [[META6:![0-9]+]], !continuation.returnedRegistercount [[META17]] -; CLEANUP-NEXT: unreachable -; -; -; CLEANUP-LABEL: define dso_local void @Miss.resume.0( -; CLEANUP-SAME: i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [1 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META16]] !continuation.registercount [[META17]] !continuation [[META18]] { -; CLEANUP-NEXT: entryresume.0: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 28) -; CLEANUP-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MISS_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: [[TMP2:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [1 x i32] } [[TMP1]], 2 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP2]], 0 -; CLEANUP-NEXT: [[TMP9:%.*]] = freeze [[STRUCT_SMALLPAYLOAD:%.*]] poison -; CLEANUP-NEXT: [[DOTFCA_0_0_EXTRACT66:%.*]] = extractvalue [[STRUCT_SMALLPAYLOAD]] [[TMP9]], 0, 0 -; CLEANUP-NEXT: [[TMP7:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [1 x i32] } [[TMP1]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT42:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP7]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: [[T110:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-NEXT: [[T29:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[T110]]) -; CLEANUP-NEXT: [[T38:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[T29]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-NEXT: [[TMP3:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T38]]) -; CLEANUP-NEXT: [[DIS_DATA_I1_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT42]], 0 -; CLEANUP-NEXT: [[SYS_DATA_I2:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I1_FCA_0_INSERT]], 0 -; CLEANUP-NEXT: [[TRAV_DATA_I3:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I2]], 0 -; CLEANUP-NEXT: [[ADDR_I4:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @Miss.resume.1) -; CLEANUP-NEXT: [[TRAV_DATA2_I5:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I3]], i64 [[ADDR_I4]], 5 -; CLEANUP-NEXT: [[TMP5:%.*]] = ptrtoint ptr addrspace(32) [[PAYLOAD_SPILL_ALLOCA]] to i32 -; CLEANUP-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(32) -; CLEANUP-NEXT: store i32 0, ptr addrspace(32) [[TMP4]], align 4 -; CLEANUP-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP4]], i32 1 -; CLEANUP-NEXT: store i32 0, ptr addrspace(32) [[TMP6]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT19:%.*]] = insertvalue [2 x i32] poison, i32 [[TMP5]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[DOTFCA_0_INSERT19]], i32 0, 1 -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 4, i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I5]], [10 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT]]), !continuation.registercount [[META13:![0-9]+]], !waitmask [[META6]], !continuation.returnedRegistercount [[META13]] -; CLEANUP-NEXT: unreachable -; -; -; CLEANUP-LABEL: define dso_local void @Miss.resume.1( -; CLEANUP-SAME: i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [2 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META16]] !continuation.registercount [[META13]] !continuation [[META18]] { -; CLEANUP-NEXT: entryresume.1: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 28) -; CLEANUP-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MISS_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: [[TMP2:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP1]], 2 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT20:%.*]] = extractvalue [2 x i32] [[TMP2]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x i32] [[TMP2]], 1 -; CLEANUP-NEXT: [[TMP3:%.*]] = freeze [[STRUCT_MEDIUMPAYLOAD:%.*]] poison -; CLEANUP-NEXT: [[DOTFCA_0_0_EXTRACT60:%.*]] = extractvalue [[STRUCT_MEDIUMPAYLOAD]] [[TMP3]], 0, 0 -; CLEANUP-NEXT: [[DOTFCA_0_1_EXTRACT62:%.*]] = extractvalue [[STRUCT_MEDIUMPAYLOAD]] [[TMP3]], 0, 1 -; CLEANUP-NEXT: [[DOTFCA_0_2_EXTRACT64:%.*]] = extractvalue [[STRUCT_MEDIUMPAYLOAD]] [[TMP3]], 0, 2 -; CLEANUP-NEXT: [[TMP6:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT20]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(32) [[TMP6]], align 4 -; CLEANUP-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 1 -; CLEANUP-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(32) [[TMP5]], align 4 -; CLEANUP-NEXT: [[TMP16:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT20]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP8:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP1]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT12:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP8]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: [[T17:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-NEXT: [[T26:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[T17]]) -; CLEANUP-NEXT: [[T35:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[T26]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-NEXT: [[TMP13:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T35]]) -; CLEANUP-NEXT: [[DIS_DATA_I5_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT12]], 0 -; CLEANUP-NEXT: [[SYS_DATA_I6:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I5_FCA_0_INSERT]], 0 -; CLEANUP-NEXT: [[TRAV_DATA_I7:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I6]], 0 -; CLEANUP-NEXT: [[ADDR_I9:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @Miss.resume.2) -; CLEANUP-NEXT: [[TRAV_DATA2_I10:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I7]], i64 [[ADDR_I9]], 5 -; CLEANUP-NEXT: [[TMP14:%.*]] = ptrtoint ptr addrspace(32) [[PAYLOAD_SPILL_ALLOCA]] to i32 -; CLEANUP-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(32) -; CLEANUP-NEXT: store i32 0, ptr addrspace(32) [[TMP9]], align 4 -; CLEANUP-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP9]], i32 1 -; CLEANUP-NEXT: store i32 0, ptr addrspace(32) [[TMP10]], align 4 -; CLEANUP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP9]], i32 2 -; CLEANUP-NEXT: store i32 0, ptr addrspace(32) [[TMP11]], align 4 -; CLEANUP-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP9]], i32 3 -; CLEANUP-NEXT: store i32 0, ptr addrspace(32) [[TMP12]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT25:%.*]] = insertvalue [2 x i32] poison, i32 [[TMP14]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_INSERT28:%.*]] = insertvalue [2 x i32] [[DOTFCA_0_INSERT25]], i32 0, 1 -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 4, i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I10]], [10 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT28]]), !continuation.registercount [[META13]], !waitmask [[META6]], !continuation.returnedRegistercount [[META13]] -; CLEANUP-NEXT: unreachable -; -; -; CLEANUP-LABEL: define dso_local void @Miss.resume.2( -; CLEANUP-SAME: i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [2 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META16]] !continuation.registercount [[META13]] !continuation [[META18]] { -; CLEANUP-NEXT: entryresume.2: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 28) -; CLEANUP-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MISS_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: [[TMP2:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP1]], 2 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT29:%.*]] = extractvalue [2 x i32] [[TMP2]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_EXTRACT31:%.*]] = extractvalue [2 x i32] [[TMP2]], 1 -; CLEANUP-NEXT: [[TMP3:%.*]] = freeze [[STRUCT_LARGEPAYLOAD:%.*]] poison -; CLEANUP-NEXT: [[DOTFCA_0_0_EXTRACT54:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP3]], 0, 0 -; CLEANUP-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP3]], 0, 1 -; CLEANUP-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP3]], 0, 2 -; CLEANUP-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP3]], 0, 3 -; CLEANUP-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP3]], 0, 4 -; CLEANUP-NEXT: [[TMP4:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT29]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP5:%.*]] = load i32, ptr addrspace(32) [[TMP4]], align 4 -; CLEANUP-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP4]], i32 1 -; CLEANUP-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(32) [[TMP6]], align 4 -; CLEANUP-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP4]], i32 2 -; CLEANUP-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(32) [[TMP10]], align 4 -; CLEANUP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP4]], i32 3 -; CLEANUP-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(32) [[TMP9]], align 4 -; CLEANUP-NEXT: [[TMP14:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT29]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP12:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP1]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT46:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP12]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD_ADDR:%.*]] = getelementptr inbounds [[MISS_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD:%.*]] = load i32, ptr addrspace(32) [[PAYLOAD_FCA_0_EXTRACT_RELOAD_ADDR]], align 4 -; CLEANUP-NEXT: [[RETURNADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[MISS_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CLEANUP-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT41:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT46]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [1 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 0 -; CLEANUP-NEXT: call void @lgc.cps.free(i32 28) -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR_RELOAD]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT41]], [27 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT]]), !continuation.registercount [[META17]] -; CLEANUP-NEXT: unreachable -; -; -; CLEANUP-LABEL: define i32 @_cont_GetLocalRootIndex( -; CLEANUP-SAME: ptr [[DATA:%.*]]) #[[ATTR1:[0-9]+]] { -; CLEANUP-NEXT: ret i32 5 -; -; -; CLEANUP-CPS-LABEL: define void @Miss( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [27 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META16:![0-9]+]] !lgc.cps [[META13:![0-9]+]] !continuation [[META17:![0-9]+]] !continuation.stacksize [[META18:![0-9]+]] !continuation.state [[META14:![0-9]+]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 24) -; CLEANUP-CPS-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MISS_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURN_ADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[MISS_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(32) [[RETURN_ADDR_SPILL_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT_SPILL_ADDR:%.*]] = getelementptr inbounds [[MISS_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: store i32 [[PAYLOAD_FCA_0_EXTRACT]], ptr addrspace(32) [[PAYLOAD_FCA_0_EXTRACT_SPILL_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[T1:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-CPS-NEXT: [[T2:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[T1]]) -; CLEANUP-CPS-NEXT: [[T3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[T2]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T3]]) -; CLEANUP-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @Miss.resume.0) -; CLEANUP-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP1]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT13:%.*]] = insertvalue [1 x i32] poison, i32 0, 0 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 5, {} poison, i32 poison, i64 [[TMP1]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT13]]), !waitmask [[META6:![0-9]+]], !continuation.returnedRegistercount [[META19:![0-9]+]], !continuation.registercount [[META19]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @Miss.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [1 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META16]] !lgc.cps [[META13]] !continuation [[META17]] !continuation.registercount [[META19]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 24) -; CLEANUP-CPS-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MISS_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [1 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = freeze [[STRUCT_SMALLPAYLOAD:%.*]] poison -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_EXTRACT65:%.*]] = extractvalue [[STRUCT_SMALLPAYLOAD]] [[TMP12]], 0, 0 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [1 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT45:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP6]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-CPS-NEXT: [[T110:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-CPS-NEXT: [[T29:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[T110]]) -; CLEANUP-CPS-NEXT: [[T38:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[T29]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T38]]) -; CLEANUP-CPS-NEXT: [[DIS_DATA_I1_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT45]], 0 -; CLEANUP-CPS-NEXT: [[SYS_DATA_I2:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I1_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I3:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I2]], 0 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @Miss.resume.1) -; CLEANUP-CPS-NEXT: [[TRAV_DATA2_I5:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I3]], i64 [[TMP11]], 5 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = ptrtoint ptr addrspace(32) [[PAYLOAD_SPILL_ALLOCA]] to i32 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: store i32 0, ptr addrspace(32) [[TMP9]], align 4 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP9]], i32 1 -; CLEANUP-CPS-NEXT: store i32 0, ptr addrspace(32) [[TMP10]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT17:%.*]] = insertvalue [2 x i32] poison, i32 [[TMP8]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[DOTFCA_0_INSERT17]], i32 0, 1 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 5, {} poison, i32 poison, i64 [[TMP11]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I5]], [10 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT]]), !waitmask [[META6]], !continuation.returnedRegistercount [[META13]], !continuation.registercount [[META13]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @Miss.resume.1( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [2 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META16]] !lgc.cps [[META13]] !continuation [[META17]] !continuation.registercount [[META13]] { -; CLEANUP-CPS-NEXT: entryresume.1: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 24) -; CLEANUP-CPS-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MISS_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT18:%.*]] = extractvalue [2 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = freeze [[STRUCT_MEDIUMPAYLOAD:%.*]] poison -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_EXTRACT59:%.*]] = extractvalue [[STRUCT_MEDIUMPAYLOAD]] [[TMP19]], 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_EXTRACT61:%.*]] = extractvalue [[STRUCT_MEDIUMPAYLOAD]] [[TMP19]], 0, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_EXTRACT63:%.*]] = extractvalue [[STRUCT_MEDIUMPAYLOAD]] [[TMP19]], 0, 2 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT18]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(32) [[TMP7]], align 4 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(32) [[TMP9]], align 4 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT18]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT47:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP6]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-CPS-NEXT: [[T17:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-CPS-NEXT: [[T26:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[T17]]) -; CLEANUP-CPS-NEXT: [[T35:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[T26]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T35]]) -; CLEANUP-CPS-NEXT: [[DIS_DATA_I5_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT47]], 0 -; CLEANUP-CPS-NEXT: [[SYS_DATA_I6:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I5_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I7:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I6]], 0 -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @Miss.resume.2) -; CLEANUP-CPS-NEXT: [[TRAV_DATA2_I10:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I7]], i64 [[TMP18]], 5 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = ptrtoint ptr addrspace(32) [[PAYLOAD_SPILL_ALLOCA]] to i32 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP13]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: store i32 0, ptr addrspace(32) [[TMP14]], align 4 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP14]], i32 1 -; CLEANUP-CPS-NEXT: store i32 0, ptr addrspace(32) [[TMP15]], align 4 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP14]], i32 2 -; CLEANUP-CPS-NEXT: store i32 0, ptr addrspace(32) [[TMP16]], align 4 -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP14]], i32 3 -; CLEANUP-CPS-NEXT: store i32 0, ptr addrspace(32) [[TMP17]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT23:%.*]] = insertvalue [2 x i32] poison, i32 [[TMP13]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT26:%.*]] = insertvalue [2 x i32] [[DOTFCA_0_INSERT23]], i32 0, 1 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 5, {} poison, i32 poison, i64 [[TMP18]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I10]], [10 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT26]]), !waitmask [[META6]], !continuation.returnedRegistercount [[META13]], !continuation.registercount [[META13]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @Miss.resume.2( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [2 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META16]] !lgc.cps [[META13]] !continuation [[META17]] !continuation.registercount [[META13]] { -; CLEANUP-CPS-NEXT: entryresume.2: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 24) -; CLEANUP-CPS-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MISS_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT27:%.*]] = extractvalue [2 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_EXTRACT29:%.*]] = extractvalue [2 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = freeze [[STRUCT_LARGEPAYLOAD:%.*]] poison -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP16]], 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP16]], 0, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP16]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP16]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP16]], 0, 4 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT27]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(32) [[TMP7]], align 4 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(32) [[TMP9]], align 4 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(32) [[TMP11]], align 4 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(32) [[TMP13]], align 4 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT27]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT49:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP6]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD_ADDR:%.*]] = getelementptr inbounds [[MISS_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD:%.*]] = load i32, ptr addrspace(32) [[PAYLOAD_FCA_0_EXTRACT_RELOAD_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[RETURN_ADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[MISS_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RETURN_ADDR_RELOAD_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT44:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT49]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [1 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 0 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 24) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT44]], [27 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT]]), !continuation.registercount [[META19]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR1:[0-9]+]] { -; CLEANUP-CPS-NEXT: ret i32 5 -; -; -; DXILCONTPOSTPROCESS-LABEL: define void @Miss( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [27 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META16:![0-9]+]] !continuation [[META17:![0-9]+]] !continuation.stacksize [[META18:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 28 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = add i32 [[TMP1]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i64 [[RETURNADDR]], ptr addrspace(21) [[TMP5]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = add i32 [[TMP1]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP6]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP7]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[PAYLOAD_FCA_0_EXTRACT]], ptr addrspace(21) [[TMP8]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[T1:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; DXILCONTPOSTPROCESS-NEXT: [[T2:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[T1]]) -; DXILCONTPOSTPROCESS-NEXT: [[T3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[T2]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T3]]) -; DXILCONTPOSTPROCESS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = call i64 @continuation.getAddrAndMD(ptr @Miss.resume.0) -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP12]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT15:%.*]] = insertvalue [1 x i32] poison, i32 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP11]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT15]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define dso_local void @Miss.resume.0( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [1 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META16]] !continuation [[META17]] { -; DXILCONTPOSTPROCESS-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP13]], -28 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [1 x i32] } [[TMP1]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP4]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = freeze [[STRUCT_SMALLPAYLOAD:%.*]] poison -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT66:%.*]] = extractvalue [[STRUCT_SMALLPAYLOAD]] [[TMP15]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [1 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT42:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP14]], 0 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[T110:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; DXILCONTPOSTPROCESS-NEXT: [[T29:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[T110]]) -; DXILCONTPOSTPROCESS-NEXT: [[T38:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[T29]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T38]]) -; DXILCONTPOSTPROCESS-NEXT: [[DIS_DATA_I1_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT42]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[SYS_DATA_I2:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I1_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I3:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I2]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = call i64 @continuation.getAddrAndMD(ptr @Miss.resume.1) -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA2_I5:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I3]], i64 [[TMP12]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP6]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i32 0, ptr addrspace(21) [[TMP7]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = add i32 [[TMP2]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i32 0, ptr addrspace(21) [[TMP10]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT17:%.*]] = insertvalue [2 x i32] poison, i32 [[TMP2]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[DOTFCA_0_INSERT17]], i32 0, 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP11]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I5]], [10 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define dso_local void @Miss.resume.1( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [2 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META16]] !continuation [[META17]] { -; DXILCONTPOSTPROCESS-NEXT: entryresume.1: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP28:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP28]], -28 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP1]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = extractvalue [2 x i32] [[TMP4]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x i32] [[TMP4]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = freeze [[STRUCT_MEDIUMPAYLOAD:%.*]] poison -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT60:%.*]] = extractvalue [[STRUCT_MEDIUMPAYLOAD]] [[TMP14]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_EXTRACT62:%.*]] = extractvalue [[STRUCT_MEDIUMPAYLOAD]] [[TMP14]], 0, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_2_EXTRACT64:%.*]] = extractvalue [[STRUCT_MEDIUMPAYLOAD]] [[TMP14]], 0, 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP5]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(21) [[TMP6]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = add i32 [[TMP3]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(21) [[TMP10]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT44:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP13]], 0 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[T17:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; DXILCONTPOSTPROCESS-NEXT: [[T26:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[T17]]) -; DXILCONTPOSTPROCESS-NEXT: [[T35:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[T26]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[T35]]) -; DXILCONTPOSTPROCESS-NEXT: [[DIS_DATA_I5_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT44]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[SYS_DATA_I6:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I5_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I7:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I6]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP27:%.*]] = call i64 @continuation.getAddrAndMD(ptr @Miss.resume.2) -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA2_I10:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I7]], i64 [[TMP27]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP15]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i32 0, ptr addrspace(21) [[TMP16]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = add i32 [[TMP2]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP17]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP18]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i32 0, ptr addrspace(21) [[TMP19]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP20:%.*]] = add i32 [[TMP2]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP20]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP21]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i32 0, ptr addrspace(21) [[TMP22]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP23:%.*]] = add i32 [[TMP2]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP23]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP24]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i32 0, ptr addrspace(21) [[TMP25]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT25:%.*]] = insertvalue [2 x i32] poison, i32 [[TMP2]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT28:%.*]] = insertvalue [2 x i32] [[DOTFCA_0_INSERT25]], i32 0, 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP26:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP26]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I10]], [10 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT28]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define dso_local void @Miss.resume.2( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [2 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META16]] !continuation [[META17]] { -; DXILCONTPOSTPROCESS-NEXT: entryresume.2: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP30:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP30]], -28 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP1]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = extractvalue [2 x i32] [[TMP4]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT31:%.*]] = extractvalue [2 x i32] [[TMP4]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP31:%.*]] = freeze [[STRUCT_LARGEPAYLOAD:%.*]] poison -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT54:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP31]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP31]], 0, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP31]], 0, 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP31]], 0, 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_LARGEPAYLOAD]] [[TMP31]], 0, 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP5]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(21) [[TMP6]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = add i32 [[TMP3]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(21) [[TMP10]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = add i32 [[TMP3]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP12]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP13]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(21) [[TMP14]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = add i32 [[TMP3]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = inttoptr i32 [[TMP16]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP17]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(21) [[TMP18]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP20:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [2 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT14:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP20]], 0 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[TMP21:%.*]] = add i32 [[TMP2]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP21]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP22]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTRELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP23]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP24:%.*]] = add i32 [[TMP2]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP24]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP25]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(21) [[TMP26]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT14]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [1 x i32] poison, i32 [[DOTRELOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP27:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP28:%.*]] = add i32 [[TMP27]], -28 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP28]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP29:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP29]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [27 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT1]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR1:[0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: ret i32 5 -; diff --git a/llvmraytracing/test/dx/lower-rt-pipeline-simple-call-shader.ll b/llvmraytracing/test/dx/lower-rt-pipeline-simple-call-shader.ll deleted file mode 100644 index 6660f93c4a..0000000000 --- a/llvmraytracing/test/dx/lower-rt-pipeline-simple-call-shader.ll +++ /dev/null @@ -1,423 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,remove-types-metadata" \ -; RUN: -S --lint-abort-on-error | FileCheck -check-prefix=CLEANUP %s -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,remove-types-metadata" \ -; RUN: -S --lint-abort-on-error | FileCheck -check-prefix=POSTPROCESS %s -; RUN: opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata" -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE-CPS %s -; RUN: opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,remove-types-metadata" \ -; RUN: -S %s --lint-abort-on-error | FileCheck -check-prefix=CLEANUP-CPS %s -; RUN: opt --verify-each -passes="dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,remove-types-metadata" \ -; RUN: -S %s --lint-abort-on-error | FileCheck -check-prefix=POSTPROCESS-CPS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.DispatchSystemData = type { i32 } -%struct.TraversalData = type { %struct.SystemData } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.MyParams = type { i32 } -%struct.HitData = type { <3 x float>, <3 x float>, float, i32 } -%struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i32 @_cont_GetContinuationStackAddr() - -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, i64, %struct.DispatchSystemData) - -declare !pointeetys !13 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) - -declare !pointeetys !15 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) !pointeetys !17 { - ret i32 5 -} - -; Need _cont_ReportHit to get system data type -declare !pointeetys !24 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) - -; Function Attrs: nounwind memory(none) -declare !pointeetys !22 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData* nocapture readnone %data) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !22 <3 x i32> @_cont_DispatchRaysDimensions3(%struct.DispatchSystemData* nocapture readnone %data) #1 - -define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #1 !pointeetys !18 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, i64 poison, %struct.DispatchSystemData %dis_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -define void @called(%struct.MyParams* %params) !pointeetys !19 { - call void @dx.op.callShader.struct.MyParams(i32 159, i32 2, %struct.MyParams* nonnull %params) - %a = call i32 @dx.op.dispatchRaysIndex.i32(i32 145, i8 0) - %b = call i32 @dx.op.dispatchRaysDimensions.i32(i32 146, i8 0) - ret void -} - -; Function Attrs: nounwind -declare !pointeetys !21 void @dx.op.callShader.struct.MyParams(i32, i32, %struct.MyParams*) #0 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysDimensions.i32(i32, i8) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysIndex.i32(i32, i8) #1 -attributes #0 = { nounwind } -attributes #1 = { alwaysinline } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.entryPoints = !{!3, !6} -!lgc.cps.module = !{} -!lgc.rt.max.attribute.size = !{!25} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{null, !"", null, !4, !12} -!4 = !{!5, !9, null, null} -!5 = !{!6} -!6 = !{void (%struct.MyParams*)* @called, !"called", null, null, !7} -!7 = !{i32 8, i32 12, i32 6, i32 16, i32 7, i32 8, i32 5, !8} -!8 = !{i32 0} -!9 = !{!10} -!10 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !11} -!11 = !{i32 0, i32 9} -!12 = !{i32 0, i64 65536} -!13 = !{%struct.SystemData poison} -!14 = !{i32 0, %struct.SystemData poison} -!15 = !{%struct.DispatchSystemData poison} -!16 = !{i32 0, %struct.DispatchSystemData poison} -!17 = !{%struct.DispatchSystemData poison} -!18 = !{%struct.DispatchSystemData poison} -!19 = !{%struct.MyParams poison} -!20 = !{i32 0, %struct.MyParams poison} -!21 = !{%struct.MyParams poison} -!22 = !{%struct.DispatchSystemData poison} -!23 = !{i32 0, %struct.AnyHitTraversalData poison} -!24 = !{%struct.AnyHitTraversalData poison} -!25 = !{i32 8} - -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 5 -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @called( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [10 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META17:![0-9]+]] !continuation.registercount [[META15:![0-9]+]] !continuation [[META18:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_MYPARAMS:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [1 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP4]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP6]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa10i32a1i32s(i64 2, i32 4, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], [10 x i32] poison, [1 x i32] [[TMP7]]), !continuation.registercount [[META15]], !continuation.returnedRegistercount [[META15]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP12]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [1 x i32] [[TMP13]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = freeze [[STRUCT_MYPARAMS]] poison -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_MYPARAMS]] [[TMP14]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP10]], ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP12]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP8]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE: .split: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-NEXT: [[A:%.*]] = extractelement <3 x i32> [[TMP17]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.dimensions() -; LOWERRAYTRACINGPIPELINE-NEXT: [[B:%.*]] = extractelement <3 x i32> [[TMP18]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP22]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP23]], [10 x i32] poison, [1 x i32] [[TMP20]]), !continuation.registercount [[META15]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; CLEANUP-LABEL: define i32 @_cont_GetLocalRootIndex( -; CLEANUP-SAME: ptr [[DATA:%.*]]) { -; CLEANUP-NEXT: ret i32 5 -; -; -; CLEANUP-LABEL: define void @called( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [10 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META17:![0-9]+]] !continuation.registercount [[META15:![0-9]+]] !continuation [[META18:![0-9]+]] !continuation.stacksize [[META13:![0-9]+]] !continuation.state [[META13]] { -; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANUP-NEXT: [[RETURNADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[CALLED_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: store i64 [[RETURNADDR]], ptr addrspace(32) [[RETURNADDR_SPILL_ADDR]], align 4 -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[PAYLOAD]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT9:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT9]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [1 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-NEXT: [[TMP2:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @called.resume.0) -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 2, i32 -1, {} poison, i32 poison, i64 [[TMP2]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT4]]), !continuation.registercount [[META15]], !continuation.returnedRegistercount [[META15]] -; CLEANUP-NEXT: unreachable -; -; -; CLEANUP-LABEL: define dso_local void @called.resume.0( -; CLEANUP-SAME: i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [10 x i32], [1 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META17]] !continuation.registercount [[META15]] !continuation [[META18]] { -; CLEANUP-NEXT: entryresume.0: -; CLEANUP-NEXT: [[TMP6:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; CLEANUP-NEXT: [[TMP9:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP1]], 0 -; CLEANUP-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP9]], ptr [[TMP6]], align 4 -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CLEANUP-NEXT: [[TMP4:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP1]], 2 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP4]], 0 -; CLEANUP-NEXT: [[TMP10:%.*]] = freeze [[STRUCT_MYPARAMS:%.*]] poison -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [[STRUCT_MYPARAMS]] [[TMP10]], 0 -; CLEANUP-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP1]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT3:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP5]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: [[RETURNADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[CALLED_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR]], align 4 -; CLEANUP-NEXT: [[TMP2:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP6]]) -; CLEANUP-NEXT: [[A:%.*]] = extractelement <3 x i32> [[TMP2]], i8 0 -; CLEANUP-NEXT: [[TMP3:%.*]] = call <3 x i32> @_cont_DispatchRaysDimensions3(ptr [[TMP6]]) -; CLEANUP-NEXT: [[B:%.*]] = extractelement <3 x i32> [[TMP3]], i8 0 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT3]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [1 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR_RELOAD]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT1]]), !continuation.registercount [[META15]] -; CLEANUP-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POSTPROCESS-SAME: ptr [[DATA:%.*]]) { -; POSTPROCESS-NEXT: ret i32 5 -; -; -; POSTPROCESS-LABEL: define void @called( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [10 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META17:![0-9]+]] !continuation [[META18:![0-9]+]] !continuation.stacksize [[META13:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 8 -; POSTPROCESS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 -; POSTPROCESS-NEXT: store i64 [[RETURNADDR]], ptr addrspace(21) [[TMP4]], align 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT9:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT9]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [1 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[TMP7:%.*]] = call i64 @continuation.getAddrAndMD(ptr @called.resume.0) -; POSTPROCESS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 2, i32 [[TMP6]], i64 [[TMP7]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT4]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define dso_local void @called.resume.0( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [10 x i32], [1 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META17]] !continuation [[META18]] { -; POSTPROCESS-NEXT: entryresume.0: -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA1:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP16:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP1]], 0 -; POSTPROCESS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP16]], ptr [[SYSTEM_DATA_ALLOCA1]], align 4 -; POSTPROCESS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP11]], -8 -; POSTPROCESS-NEXT: [[TMP12:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP1]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP12]], 0 -; POSTPROCESS-NEXT: [[TMP17:%.*]] = freeze [[STRUCT_MYPARAMS:%.*]] poison -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [[STRUCT_MYPARAMS]] [[TMP17]], 0 -; POSTPROCESS-NEXT: [[TMP13:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP1]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT3:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP13]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 -; POSTPROCESS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(21) [[TMP5]], align 4 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[SYSTEM_DATA_ALLOCA1]]) -; POSTPROCESS-NEXT: [[A:%.*]] = extractelement <3 x i32> [[TMP6]], i8 0 -; POSTPROCESS-NEXT: [[TMP7:%.*]] = call <3 x i32> @_cont_DispatchRaysDimensions3(ptr [[SYSTEM_DATA_ALLOCA1]]) -; POSTPROCESS-NEXT: [[B:%.*]] = extractelement <3 x i32> [[TMP7]], i8 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT3]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [1 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP9]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP10]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT1]]) -; POSTPROCESS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret i32 5 -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @called( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [10 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META17:![0-9]+]] !lgc.cps [[META18:![0-9]+]] !continuation [[META19:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [1 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_MYPARAMS:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [1 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP3]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP5]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa10i32a1i32s(i32 2, i32 4, i32 5, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], [10 x i32] poison, [1 x i32] [[TMP6]]), !continuation.returnedRegistercount [[META15:![0-9]+]], !continuation.registercount [[META15]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP7]], 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [1 x i32] [[TMP8]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = freeze [[STRUCT_MYPARAMS]] poison -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_MYPARAMS]] [[TMP18]], ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP11]], ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP7]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP9]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: .split: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[A:%.*]] = extractelement <3 x i32> [[TMP12]], i8 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.dimensions() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[B:%.*]] = extractelement <3 x i32> [[TMP13]], i8 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_MYPARAMS]], ptr [[TMP1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP15]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP16]], [10 x i32] poison, [1 x i32] [[TMP17]]), !continuation.registercount [[META15]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) { -; CLEANUP-CPS-NEXT: ret i32 5 -; -; -; CLEANUP-CPS-LABEL: define void @called( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [10 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) -; CLEANUP-CPS-SAME: !lgc.rt.shaderstage [[META17:![0-9]+]] !lgc.cps [[META18:![0-9]+]] !continuation [[META19:![0-9]+]] !continuation.stacksize [[META13:![0-9]+]] !continuation.state [[META13]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANUP-CPS-NEXT: [[RETURN_ADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[CALLED_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(32) [[RETURN_ADDR_SPILL_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[SYSTEM_DATA]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[SYSTEM_DATA_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [1 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @called.resume.0) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 2, i32 4, {} poison, i32 poison, i64 [[TMP0]], i32 5, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT4]]), !continuation.returnedRegistercount [[META15:![0-9]+]], !continuation.registercount [[META15]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @called.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [10 x i32], [1 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META17]] !lgc.cps [[META18]] !continuation [[META19]] !continuation.registercount [[META15]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP13]], ptr [[TMP8]], align 4 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP6]], 0 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = freeze [[STRUCT_MYPARAMS:%.*]] poison -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [[STRUCT_MYPARAMS]] [[TMP14]], 0 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT10:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP7]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-CPS-NEXT: [[RETURN_ADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[CALLED_FRAME:%.*]], ptr addrspace(32) [[TMP5]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURN_ADDR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RETURN_ADDR_RELOAD_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP8]]) -; CLEANUP-CPS-NEXT: [[A:%.*]] = extractelement <3 x i32> [[TMP9]], i8 0 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = call <3 x i32> @_cont_DispatchRaysDimensions3(ptr [[TMP8]]) -; CLEANUP-CPS-NEXT: [[B:%.*]] = extractelement <3 x i32> [[TMP11]], i8 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT9:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT10]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [1 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURN_ADDR_RELOAD]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT9]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT]]), !continuation.registercount [[META15]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POSTPROCESS-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; POSTPROCESS-CPS-NEXT: ret i32 5 -; -; -; POSTPROCESS-CPS-LABEL: define void @called( -; POSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [10 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !continuation [[META17:![0-9]+]] !lgc.rt.shaderstage [[META18:![0-9]+]] !lgc.cps [[META19:![0-9]+]] !continuation.stacksize [[META13:![0-9]+]] { -; POSTPROCESS-CPS-NEXT: AllocaSpillBB: -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP0]] to ptr addrspace(21) -; POSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 -; POSTPROCESS-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(21) [[TMP3]], align 4 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[SYSTEM_DATA]], 0 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POSTPROCESS-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[SYSTEM_DATA_FCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [1 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = call i64 @continuation.getAddrAndMD(ptr @called.resume.0) -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 2, i32 [[TMP4]], i64 [[TMP5]], i32 5, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT4]]) -; POSTPROCESS-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define dso_local void @called.resume.0( -; POSTPROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [10 x i32], [1 x i32] } [[TMP3:%.*]]) !continuation [[META17]] !lgc.rt.shaderstage [[META18]] !lgc.cps [[META19]] { -; POSTPROCESS-CPS-NEXT: entryresume.0: -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP3]], 0 -; POSTPROCESS-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP20]], ptr [[TMP11]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], -8 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP3]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP7]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = freeze [[STRUCT_MYPARAMS:%.*]] poison -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [[STRUCT_MYPARAMS]] [[TMP21]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [10 x i32], [1 x i32] } [[TMP3]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT10:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP8]], 0 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to ptr addrspace(21) -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; POSTPROCESS-CPS-NEXT: [[RETURN_ADDR_RELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP10]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP11]]) -; POSTPROCESS-CPS-NEXT: [[A:%.*]] = extractelement <3 x i32> [[TMP12]], i8 0 -; POSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = call <3 x i32> @_cont_DispatchRaysDimensions3(ptr [[TMP11]]) -; POSTPROCESS-CPS-NEXT: [[B:%.*]] = extractelement <3 x i32> [[TMP14]], i8 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT9:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT10]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [1 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = add i32 [[TMP15]], -8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP16]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = zext i32 [[RETURN_ADDR_RELOAD]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP17]], i32 [[TMP18]], i64 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT9]], [10 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/lower-rt-pipeline-small-payload-field.ll b/llvmraytracing/test/dx/lower-rt-pipeline-small-payload-field.ll index d9133ef009..b8c0ff6c29 100644 --- a/llvmraytracing/test/dx/lower-rt-pipeline-small-payload-field.ll +++ b/llvmraytracing/test/dx/lower-rt-pipeline-small-payload-field.ll @@ -39,15 +39,6 @@ define void @MissNoPAQ(%struct.NoPAQPayload* noalias nocapture %payload) #0 !poi ret void } -; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #1 - -; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #1 - -; Function Attrs: alwaysinline -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #1 - ; Function Attrs: alwaysinline declare !pointeetys !19 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #1 @@ -125,8 +116,8 @@ attributes #3 = { nounwind memory(none) } !34 = !{i32 8, i32 11, i32 6, i32 24, i32 5, !35} !35 = !{i32 0} -; CHECK-LABEL: define %struct.DispatchSystemData @MissPAQ( -; CHECK-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [16 x i32] [[PADDING:%.*]], [11 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META21:![0-9]+]] !continuation.registercount [[META22:![0-9]+]] !continuation [[META23:![0-9]+]] { +; CHECK-LABEL: define void @MissPAQ( +; CHECK-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [16 x i32] [[PADDING:%.*]], [11 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META21:![0-9]+]] !continuation.registercount [[META22:![0-9]+]] !continuation [[META23:![0-9]+]] { ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [11 x i32], align 4 ; CHECK-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_PAYLOAD:%.*]], align 8 @@ -178,12 +169,12 @@ attributes #3 = { nounwind memory(none) } ; CHECK-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 ; CHECK-NEXT: [[TMP33:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP32]], align 4 ; CHECK-NEXT: [[TMP36:%.*]] = load [11 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP33]], [16 x i32] poison, [11 x i32] [[TMP36]]), !continuation.registercount [[META22]] +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP33]], [16 x i32] poison, [11 x i32] [[TMP36]]), !continuation.registercount [[META22]] ; CHECK-NEXT: unreachable ; ; -; CHECK-LABEL: define %struct.DispatchSystemData @MissNoPAQ( -; CHECK-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [16 x i32] [[PADDING:%.*]], [14 x i32] [[PAYLOAD:%.*]]) #[[ATTR0]] !lgc.rt.shaderstage [[META21]] !continuation.registercount [[META19:![0-9]+]] !continuation [[META24:![0-9]+]] { +; CHECK-LABEL: define void @MissNoPAQ( +; CHECK-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [16 x i32] [[PADDING:%.*]], [14 x i32] [[PAYLOAD:%.*]]) #[[ATTR0]] !lgc.rt.shaderstage [[META21]] !continuation.registercount [[META19:![0-9]+]] !continuation [[META24:![0-9]+]] { ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [14 x i32], align 4 ; CHECK-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_NOPAQPAYLOAD:%.*]], align 8 @@ -258,7 +249,7 @@ attributes #3 = { nounwind memory(none) } ; CHECK-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 ; CHECK-NEXT: [[TMP46:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP45]], align 4 ; CHECK-NEXT: [[TMP53:%.*]] = load [14 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP46]], [16 x i32] poison, [14 x i32] [[TMP53]]), !continuation.registercount [[META19]] +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP46]], [16 x i32] poison, [14 x i32] [[TMP53]]), !continuation.registercount [[META19]] ; CHECK-NEXT: unreachable ; ; diff --git a/llvmraytracing/test/dx/lower-rt-pipeline.ll b/llvmraytracing/test/dx/lower-rt-pipeline.ll deleted file mode 100644 index 21641d524f..0000000000 --- a/llvmraytracing/test/dx/lower-rt-pipeline.ll +++ /dev/null @@ -1,6315 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata" -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE-CPS %s -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=POSTPROCESS %s -; RUN: opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,remove-types-metadata" -S %s --lint-abort-on-error | FileCheck -check-prefix=CLEANUP-CPS %s -; RUN: opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,remove-types-metadata" -S %s --lint-abort-on-error | FileCheck -check-prefix=POSTPROCESS-CPS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i64 } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.HitData = type { <3 x float>, <3 x float>, float, i32 } -%struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.RayPayload = type { <4 x float> } -%dx.types.ResourceProperties = type { i32, i32 } -%struct.BuiltInTriangleIntersectionAttributes2 = type { <2 x float> } -%struct.RaytracingAccelerationStructure = type { i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?Scene@@3URaytracingAccelerationStructure@@A" = external constant %dx.types.Handle, align 4 -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -define i32 @_cont_GetContinuationStackAddr() #0 { - ret i32 0 -} - -define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwind !pointeetys !{%struct.DispatchSystemData poison} { - ret void -} - -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #0 - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #0 - -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, i64, %struct.AnyHitTraversalData) #0 - -define %struct.HitData @_cont_GetCandidateState(%struct.AnyHitTraversalData* %data) #0 !pointeetys !32 { - %resPtr = getelementptr %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, i32 0, i32 0 - %res = load %struct.HitData, %struct.HitData* %resPtr, align 4 - ret %struct.HitData %res -} - -declare !pointeetys !34 %struct.HitData @_cont_GetCommittedState(%struct.SystemData*) #0 - -declare !pointeetys !36 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #0 - -define void @_cont_SetTriangleHitAttributes(%struct.SystemData* %data, %struct.BuiltInTriangleIntersectionAttributes %val) !pointeetys !37 { - %addr = getelementptr %struct.SystemData, %struct.SystemData* %data, i32 0, i32 0 - store %struct.BuiltInTriangleIntersectionAttributes %val, %struct.BuiltInTriangleIntersectionAttributes* %addr, align 4 - ret void -} - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) !pointeetys !38 { - ret i32 5 -} - -declare i1 @opaqueIsEnd() - -define i1 @_cont_IsEndSearch(%struct.TraversalData*) #0 !pointeetys !40 { - %isEnd = call i1 @opaqueIsEnd() - ret i1 %isEnd -} - -declare !pointeetys !42 i32 @_cont_HitKind(%struct.SystemData*) #0 - -; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #1 - -; Function Attrs: nounwind -declare !pointeetys !43 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) #1 - -; Function Attrs: nounwind -declare !pointeetys !44 void @_AmdRestoreSystemDataAnyHit(%struct.AnyHitTraversalData*) #1 - -; Function Attrs: nounwind -declare !pointeetys !43 void @_cont_AcceptHitAndEndSearch(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind -declare !pointeetys !44 void @_cont_AcceptHit(%struct.AnyHitTraversalData* nocapture readnone) #1 - -; Function Attrs: nounwind -declare !pointeetys !43 void @_cont_IgnoreHit(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind -declare !pointeetys !44 void @_AmdAcceptHitAttributes(%struct.AnyHitTraversalData* nocapture readnone) #1 - -define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) #0 !pointeetys !45 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 - %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %addr = call i64 @_AmdGetResumePointAddr() #3 - %trav_data2 = insertvalue %struct.TraversalData %trav_data, i64 %addr, 5 - %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i64 4, %struct.TraversalData %trav_data2) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #0 !pointeetys !46 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, %struct.DispatchSystemData %dis_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) #0 !pointeetys !47 { - %origTPtr = getelementptr inbounds %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, i32 0, i32 0, i32 4 - %origT = load float, float* %origTPtr, align 4 - %isNoHit = fcmp fast uge float %t, %origT - br i1 %isNoHit, label %isEnd, label %callAHit - -callAHit: ; preds = %0 - %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, i64 poison, %struct.AnyHitTraversalData %trav_data) - store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 - call void @_AmdRestoreSystemDataAnyHit(%struct.AnyHitTraversalData* %data) - ret i1 true - -isEnd: ; preds = %0 - ; Call AcceptHitAttributes, just to simulate it - call void @_AmdAcceptHitAttributes(%struct.AnyHitTraversalData* %data) - ret i1 false -} - -define <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData* %data) !pointeetys !48 { - %resPtr.1 = getelementptr %struct.DispatchSystemData, %struct.DispatchSystemData* %data, i32 0, i32 0, i32 0 - %res.1 = load i32, i32* %resPtr.1, align 4 - %resPtr.2 = getelementptr %struct.DispatchSystemData, %struct.DispatchSystemData* %data, i32 0, i32 0, i32 1 - %res.2 = load i32, i32* %resPtr.2, align 4 - %resPtr.3 = getelementptr %struct.DispatchSystemData, %struct.DispatchSystemData* %data, i32 0, i32 0, i32 2 - %res.3 = load i32, i32* %resPtr.3, align 4 - %val.0 = insertelement <3 x i32> undef, i32 %res.1, i32 0 - %val.1 = insertelement <3 x i32> %val.0, i32 %res.2, i32 1 - %val.2 = insertelement <3 x i32> %val.1, i32 %res.3, i32 2 - ret <3 x i32> %val.2 -} - -define <3 x float> @_cont_ObjectRayOrigin3(%struct.DispatchSystemData* nocapture readnone %data, %struct.HitData* %hitData) !pointeetys !49 { - %resPtr.1 = getelementptr %struct.HitData, %struct.HitData* %hitData, i32 0, i32 0, i32 0 - %res.1 = load float, float* %resPtr.1, align 4 - %resPtr.2 = getelementptr %struct.HitData, %struct.HitData* %hitData, i32 0, i32 0, i32 1 - %res.2 = load float, float* %resPtr.2, align 4 - %resPtr.3 = getelementptr %struct.HitData, %struct.HitData* %hitData, i32 0, i32 0, i32 2 - %res.3 = load float, float* %resPtr.3, align 4 - %val.0 = insertelement <3 x float> undef, float %res.1, i32 0 - %val.1 = insertelement <3 x float> %val.0, float %res.2, i32 1 - %val.2 = insertelement <3 x float> %val.1, float %res.3, i32 2 - ret <3 x float> %val.2 -} - -define <3 x float> @_cont_ObjectRayDirection3(%struct.DispatchSystemData* nocapture readnone %data, %struct.HitData* %hitData) !pointeetys !49 { - %resPtr.1 = getelementptr %struct.HitData, %struct.HitData* %hitData, i32 0, i32 1, i32 0 - %res.1 = load float, float* %resPtr.1, align 4 - %resPtr.2 = getelementptr %struct.HitData, %struct.HitData* %hitData, i32 0, i32 1, i32 1 - %res.2 = load float, float* %resPtr.2, align 4 - %resPtr.3 = getelementptr %struct.HitData, %struct.HitData* %hitData, i32 0, i32 1, i32 2 - %res.3 = load float, float* %resPtr.3, align 4 - %val.0 = insertelement <3 x float> undef, float %res.1, i32 0 - %val.1 = insertelement <3 x float> %val.0, float %res.2, i32 1 - %val.2 = insertelement <3 x float> %val.1, float %res.3, i32 2 - ret <3 x float> %val.2 -} - -define float @_cont_RayTCurrent(%struct.DispatchSystemData* nocapture readnone %data, %struct.HitData* %hitData) !pointeetys !51 { - %resPtr = getelementptr %struct.HitData, %struct.HitData* %hitData, i32 0, i32 2 - %res = load float, float* %resPtr, align 4 - ret float %res -} - -; Function Attrs: nounwind -define void @MyRayGen() #2 { - %1 = load %dx.types.Handle, %dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 - %2 = load %dx.types.Handle, %dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 - %3 = alloca %struct.RayPayload, align 4 - %4 = bitcast %struct.RayPayload* %3 to i8* - call void @llvm.lifetime.start.p0i8(i64 16, i8* %4) #1 - %5 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %3, i32 0, i32 0 - store <4 x float> zeroinitializer, <4 x float>* %5, align 4, !tbaa !52 - %6 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %1) - %7 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %6, %dx.types.ResourceProperties { i32 16, i32 0 }) - call void @dx.op.traceRay.struct.RayPayload(i32 157, %dx.types.Handle %7, i32 16, i32 -1, i32 0, i32 1, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0x3F50624DE0000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+04, %struct.RayPayload* nonnull %3) - %8 = load <4 x float>, <4 x float>* %5, align 4, !tbaa !52 - %9 = call i32 @dx.op.dispatchRaysIndex.i32(i32 145, i8 0) - %10 = call i32 @dx.op.dispatchRaysIndex.i32(i32 145, i8 1) - %11 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %2) - %12 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %11, %dx.types.ResourceProperties { i32 4098, i32 1033 }) - %13 = extractelement <4 x float> %8, i64 0 - %14 = extractelement <4 x float> %8, i64 1 - %15 = extractelement <4 x float> %8, i64 2 - %16 = extractelement <4 x float> %8, i64 3 - call void @dx.op.textureStore.f32(i32 67, %dx.types.Handle %12, i32 %9, i32 %10, i32 undef, float %13, float %14, float %15, float %16, i8 15) - call void @llvm.lifetime.end.p0i8(i64 16, i8* %4) #1 - ret void -} - -; Function Attrs: nounwind -define void @MyClosestHitShader(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readonly %attr) #2 !pointeetys !55 { - %1 = getelementptr inbounds %struct.BuiltInTriangleIntersectionAttributes, %struct.BuiltInTriangleIntersectionAttributes* %attr, i32 0, i32 0 - %2 = load <2 x float>, <2 x float>* %1, align 4 - %3 = extractelement <2 x float> %2, i32 0 - %4 = fsub fast float 1.000000e+00, %3 - %5 = extractelement <2 x float> %2, i32 1 - %6 = fsub fast float %4, %5 - %7 = insertelement <4 x float> undef, float %6, i64 0 - %8 = insertelement <4 x float> %7, float %3, i64 1 - %9 = insertelement <4 x float> %8, float %5, i64 2 - %10 = insertelement <4 x float> %9, float 1.000000e+00, i64 3 - %11 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %payload, i32 0, i32 0 - store <4 x float> %10, <4 x float>* %11, align 4 - ret void -} - -; Function Attrs: nounwind -define void @MyAnyHitShader(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readnone %attr) #2 !pointeetys !55 { - %1 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %payload, i32 0, i32 0 - %2 = load <4 x float>, <4 x float>* %1, align 4 - %3 = call float @dx.op.objectRayOrigin.f32(i32 149, i8 0) - %4 = call float @dx.op.objectRayDirection.f32(i32 150, i8 0) - %5 = call float @dx.op.rayTCurrent.f32(i32 154) - %6 = fmul fast float %5, %4 - %7 = fadd fast float %6, %3 - %8 = fcmp fast ogt float %7, 0.000000e+00 - %9 = fcmp fast ogt float %7, 1.000000e+00 - %10 = fcmp fast ogt float %7, -1.000000e+00 - br i1 %8, label %11, label %14 - -11: ; preds = %0 -; acceptHitAndEndSearch - store <4 x float> %2, <4 x float>* %1, align 4 - br i1 %9, label %12, label %13 - -12: ; preds = %11 -; acceptHitAndEndSearch with unreachable - call void @dx.op.acceptHitAndEndSearch(i32 156) - unreachable - -13: ; preds = %11 -; acceptHitAndEndSearch with ret void - call void @dx.op.acceptHitAndEndSearch(i32 156) - ret void - -14: ; preds = %0 -; IgnoreHit or AcceptHit - br i1 %10, label %15, label %18 - -15: ; preds = %14 -; IgnoreHit - br i1 %9, label %16, label %17 - -16: ; preds = %15 -; IgnoreHit with unreachable - call void @dx.op.ignoreHit(i32 155) - unreachable - -17: ; preds = %15 -; IgnoreHit with ret void (as emitted by debug mode dxc) - call void @dx.op.ignoreHit(i32 155) - ret void - -18: ; preds = %14 -; AcceptHit - store <4 x float> %2, <4 x float>* %1, align 4 - ret void -} - -; Function Attrs: nounwind -define void @MyIntersectionShader() #2 { - %1 = alloca %struct.BuiltInTriangleIntersectionAttributes, align 4 - %2 = call float @dx.op.rayTCurrent.f32(i32 154) - %3 = bitcast %struct.BuiltInTriangleIntersectionAttributes* %1 to i8* - call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #1 - %4 = call i1 @dx.op.reportHit.struct.BuiltInTriangleIntersectionAttributes(i32 158, float %2, i32 0, %struct.BuiltInTriangleIntersectionAttributes* nonnull %1) - call void @llvm.lifetime.end.p0i8(i64 8, i8* %3) #1 - ret void -} - -; Function Attrs: nounwind -define void @MyIntersectionShader2() #2 { - %1 = alloca %struct.BuiltInTriangleIntersectionAttributes2, align 4 - %2 = call float @dx.op.rayTCurrent.f32(i32 154) - %3 = bitcast %struct.BuiltInTriangleIntersectionAttributes2* %1 to i8* - call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #1 - %4 = call i1 @dx.op.reportHit.struct.BuiltInTriangleIntersectionAttributes2(i32 158, float %2, i32 0, %struct.BuiltInTriangleIntersectionAttributes2* nonnull %1) - call void @llvm.lifetime.end.p0i8(i64 8, i8* %3) #1 - ret void -} - -; Function Attrs: nounwind -define void @MyMissShader(%struct.RayPayload* noalias nocapture %payload) #2 !pointeetys !58 { - %1 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %payload, i32 0, i32 0 - store <4 x float> , <4 x float>* %1, align 4 - ret void -} - -; Function Attrs: nounwind -declare !pointeetys !59 void @dx.op.traceRay.struct.RayPayload(i32, %dx.types.Handle, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, %struct.RayPayload*) #1 - -; Function Attrs: nounwind -declare void @dx.op.textureStore.f32(i32, %dx.types.Handle, i32, i32, i32, float, float, float, float, i8) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysIndex.i32(i32, i8) #3 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayDirection.f32(i32, i8) #3 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayOrigin.f32(i32, i8) #3 - -; Function Attrs: nounwind memory(read) -declare float @dx.op.rayTCurrent.f32(i32) #4 - -declare void @dx.op.acceptHitAndEndSearch(i32) #0 - -declare void @dx.op.ignoreHit(i32) #0 - -; Function Attrs: nounwind -declare !pointeetys !60 i1 @dx.op.reportHit.struct.BuiltInTriangleIntersectionAttributes(i32, float, i32, %struct.BuiltInTriangleIntersectionAttributes*) #1 - -; Function Attrs: nounwind -declare !pointeetys !61 i1 @dx.op.reportHit.struct.BuiltInTriangleIntersectionAttributes2(i32, float, i32, %struct.BuiltInTriangleIntersectionAttributes2*) #1 - -; Function Attrs: nounwind memory(none) -declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types.ResourceProperties) #3 - -; Function Attrs: nounwind memory(read) -declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) #4 - -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) -declare !pointeetys !63 void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #5 - -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) -declare !pointeetys !63 void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #5 - -attributes #0 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind } -attributes #2 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #3 = { nounwind memory(none) } -attributes #4 = { nounwind memory(read) } -attributes #5 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.resources = !{!3} -!dx.typeAnnotations = !{!10} -!dx.entryPoints = !{!18, !20, !23, !25, !27, !29, !31} -!lgc.cps.module = !{} -!lgc.rt.max.attribute.size = !{!65} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{!4, !7, null, null} -!4 = !{!5} -!5 = !{i32 0, %struct.RaytracingAccelerationStructure* bitcast (%dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A" to %struct.RaytracingAccelerationStructure*), !"Scene", i32 0, i32 0, i32 1, i32 16, i32 0, !6} -!6 = !{i32 0, i32 4} -!7 = !{!8} -!8 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !9} -!9 = !{i32 0, i32 9} -!10 = !{i32 1, void ()* @MyRayGen, !11, void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @MyClosestHitShader, !14, void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @MyAnyHitShader, !14, void ()* @MyIntersectionShader, !11, void ()* @MyIntersectionShader2, !11, void (%struct.RayPayload*)* @MyMissShader, !17} -!11 = !{!12} -!12 = !{i32 1, !13, !13} -!13 = !{} -!14 = !{!12, !15, !16} -!15 = !{i32 2, !13, !13} -!16 = !{i32 0, !13, !13} -!17 = !{!12, !15} -!18 = !{null, !"", null, !3, !19} -!19 = !{i32 0, i64 65536} -!20 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @MyAnyHitShader, !"MyAnyHitShader", null, null, !21} -!21 = !{i32 8, i32 9, i32 6, i32 16, i32 7, i32 8, i32 5, !22} -!22 = !{i32 0} -!23 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @MyClosestHitShader, !"MyClosestHitShader", null, null, !24} -!24 = !{i32 8, i32 10, i32 6, i32 16, i32 7, i32 8, i32 5, !22} -!25 = !{void ()* @MyIntersectionShader, !"MyIntersectionShader", null, null, !26} -!26 = !{i32 8, i32 8, i32 5, !22} -!27 = !{void (%struct.RayPayload*)* @MyMissShader, !"MyMissShader", null, null, !28} -!28 = !{i32 8, i32 11, i32 6, i32 16, i32 5, !22} -!29 = !{void ()* @MyRayGen, !"MyRayGen", null, null, !30} -!30 = !{i32 8, i32 7, i32 5, !22} -!31 = !{void ()* @MyIntersectionShader2, !"MyIntersectionShader2", null, null, !26} -!32 = !{%struct.AnyHitTraversalData poison} -!33 = !{i32 0, %struct.AnyHitTraversalData poison} -!34 = !{%struct.SystemData poison} -!35 = !{i32 0, %struct.SystemData poison} -!36 = !{%struct.SystemData poison} -!37 = !{%struct.SystemData poison} -!38 = !{%struct.DispatchSystemData poison} -!39 = !{i32 0, %struct.DispatchSystemData poison} -!40 = !{%struct.TraversalData poison} -!41 = !{i32 0, %struct.TraversalData poison} -!42 = !{%struct.SystemData poison} -!43 = !{%struct.DispatchSystemData poison} -!44 = !{%struct.AnyHitTraversalData poison} -!45 = !{%struct.DispatchSystemData poison} -!46 = !{%struct.DispatchSystemData poison} -!47 = !{%struct.AnyHitTraversalData poison} -!48 = !{%struct.DispatchSystemData poison} -!49 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!50 = !{i32 0, %struct.HitData poison} -!51 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!52 = !{!53, !53, i64 0} -!53 = !{!"omnipotent char", !54, i64 0} -!54 = !{!"Simple C/C++ TBAA"} -!55 = !{null, %struct.RayPayload poison, %struct.BuiltInTriangleIntersectionAttributes poison} -!56 = !{i32 0, %struct.RayPayload poison} -!57 = !{i32 0, %struct.BuiltInTriangleIntersectionAttributes poison} -!58 = !{%struct.RayPayload poison} -!59 = !{%struct.RayPayload poison} -!60 = !{%struct.BuiltInTriangleIntersectionAttributes poison} -!61 = !{%struct.BuiltInTriangleIntersectionAttributes2 poison} -!62 = !{i32 0, %struct.BuiltInTriangleIntersectionAttributes2 poison} -!63 = !{i8 poison} -!64 = !{i32 0, i8 poison} -!65 = !{i32 8} -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetContinuationStackAddr( -; LOWERRAYTRACINGPIPELINE-SAME: ) #[[ATTR0:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 0 -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.HitData @_cont_GetCandidateState( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_ANYHITTRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define void @_cont_SetTriangleHitAttributes( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret void -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 5 -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define i1 @_cont_IsEndSearch( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[TMP0:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-NEXT: ret i1 [[ISEND]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define <3 x i32> @_cont_DispatchRaysIndex3( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_1:%.*]] = load i32, ptr [[RESPTR_1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_2:%.*]] = load i32, ptr [[RESPTR_2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_3:%.*]] = load i32, ptr [[RESPTR_3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_0:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_1:%.*]] = insertelement <3 x i32> [[VAL_0]], i32 [[RES_2]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_2:%.*]] = insertelement <3 x i32> [[VAL_1]], i32 [[RES_3]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: ret <3 x i32> [[VAL_2]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define <3 x float> @_cont_ObjectRayOrigin3( -; LOWERRAYTRACINGPIPELINE-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: ret <3 x float> [[VAL_2]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define <3 x float> @_cont_ObjectRayDirection3( -; LOWERRAYTRACINGPIPELINE-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 1, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: ret <3 x float> [[VAL_2]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define float @_cont_RayTCurrent( -; LOWERRAYTRACINGPIPELINE-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret float [[RES]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define void @MyRayGen( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation.entry [[META13:![0-9]+]] !continuation.registercount [[META22]] !continuation [[META36:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = bitcast ptr [[TMP4]] to ptr -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP5]]) #[[ATTR1:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> zeroinitializer, ptr [[TMP6]], align 4, !tbaa [[TBAA37:![0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP7]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP8]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR3:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[ADDR_I]], 5 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP13]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP38]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP17]], ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP21]], ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = load [4 x i32], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa27i32a4i32s(i64 4, i32 8, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [4 x i32] [[TMP31]]), !continuation.registercount [[META34:![0-9]+]], !continuation.returnedRegistercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP41]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x i32] [[TMP42]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = freeze [[STRUCT_RAYPAYLOAD]] poison -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_RAYPAYLOAD]] [[TMP40]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP23]], ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[TMP22]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP44]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP25]], ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[TMP22]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP45]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP27]], ptr [[TMP26]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = getelementptr inbounds i32, ptr [[TMP22]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP47]], ptr [[TMP43]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP41]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP19]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE: .split: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = load <4 x float>, ptr [[TMP6]], align 4, !tbaa [[TBAA37]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[TMP29]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[TMP30]], i8 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP48:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP3]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP48]], [[DX_TYPES_RESOURCEPROPERTIES]] { i32 4098, i32 1033 }) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = extractelement <4 x float> [[TMP28]], i64 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = extractelement <4 x float> [[TMP28]], i64 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = extractelement <4 x float> [[TMP28]], i64 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = extractelement <4 x float> [[TMP28]], i64 3 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP32]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP33]], float [[TMP34]], float [[TMP35]], float [[TMP36]], i8 15) -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: call void @lgc.cps.complete() -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @MyClosestHitShader( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META40:![0-9]+]] !continuation.registercount [[META34]] !continuation [[META41:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[HITATTRS:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP8]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP41]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP10]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP42]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP12]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP32]], ptr [[TMP30]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP13]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP14]], ptr [[HITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP17]], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[HITATTRS]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = load <2 x float>, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = extractelement <2 x float> [[TMP19]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = fsub fast float 1.000000e+00, [[TMP20]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = extractelement <2 x float> [[TMP19]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = fsub fast float [[TMP21]], [[TMP22]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = insertelement <4 x float> undef, float [[TMP23]], i64 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = insertelement <4 x float> [[TMP24]], float [[TMP20]], i64 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = insertelement <4 x float> [[TMP25]], float [[TMP22]], i64 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = insertelement <4 x float> [[TMP26]], float 1.000000e+00, i64 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> [[TMP27]], ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = load i32, ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP43]], ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP34]], ptr [[TMP44]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP36]], ptr [[TMP46]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP48:%.*]] = load i32, ptr [[TMP47]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP48]], ptr [[TMP40]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = load [4 x i32], ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP38]], [27 x i32] poison, [4 x i32] [[TMP45]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.AnyHitTraversalData @MyAnyHitShader( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META42:![0-9]+]] !continuation.registercount [[META34]] !continuation [[META43:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ORIGHITATTRS:%.*]] = alloca [8 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[HITATTRSALLOCA:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP12]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP18]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP26]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP21]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP24]], ptr [[TMP27]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES]](ptr [[TMP22]]) -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP23]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = load i32, ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP42]], ptr [[ORIGHITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = getelementptr inbounds i32, ptr [[ORIGHITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP59:%.*]] = load i32, ptr [[TMP44]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP59]], ptr [[TMP43]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP12]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = load <4 x float>, ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I1:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I1]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_1_I2:%.*]] = load float, ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_2_I3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP4]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_2_I4:%.*]] = load float, ptr [[RESPTR_2_I3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_3_I5:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP4]], i32 0, i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_3_I6:%.*]] = load float, ptr [[RESPTR_3_I5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_0_I7:%.*]] = insertelement <3 x float> undef, float [[RES_1_I2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_1_I8:%.*]] = insertelement <3 x float> [[VAL_0_I7]], float [[RES_2_I4]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_2_I9:%.*]] = insertelement <3 x float> [[VAL_1_I8]], float [[RES_3_I6]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[VAL_2_I9]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_1_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP5]], i32 0, i32 1, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_1_I:%.*]] = load float, ptr [[RESPTR_1_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_2_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP5]], i32 0, i32 1, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_2_I:%.*]] = load float, ptr [[RESPTR_2_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_3_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP5]], i32 0, i32 1, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_3_I:%.*]] = load float, ptr [[RESPTR_3_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_0_I:%.*]] = insertelement <3 x float> undef, float [[RES_1_I]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_1_I:%.*]] = insertelement <3 x float> [[VAL_0_I]], float [[RES_2_I]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_2_I:%.*]] = insertelement <3 x float> [[VAL_1_I]], float [[RES_3_I]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[VAL_2_I]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I10:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I10]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I11:%.*]] = load float, ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = fmul fast float [[RES_I11]], [[EXTRACT]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = fadd fast float [[TMP33]], [[EXTRACT1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = fcmp fast ogt float [[TMP34]], 0.000000e+00 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = fcmp fast ogt float [[TMP34]], 1.000000e+00 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = fcmp fast ogt float [[TMP34]], -1.000000e+00 -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[TMP35]], label [[TMP38:%.*]], label [[TMP73:%.*]] -; LOWERRAYTRACINGPIPELINE: 41: -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> [[TMP29]], ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[TMP36]], label [[TMP39:%.*]], label [[TMP56:%.*]] -; LOWERRAYTRACINGPIPELINE: 42: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP40]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP12]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = load i32, ptr [[TMP41]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP45]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = getelementptr inbounds i32, ptr [[TMP41]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP48:%.*]] = load i32, ptr [[TMP47]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP48]], ptr [[TMP46]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP49:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr [[TMP41]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP51:%.*]] = load i32, ptr [[TMP50]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP51]], ptr [[TMP49]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP52:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP60:%.*]] = getelementptr inbounds i32, ptr [[TMP41]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP61:%.*]] = load i32, ptr [[TMP60]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP61]], ptr [[TMP52]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP63:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP63]], ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP80:%.*]] = load i32, ptr [[TMP64]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP80]], ptr [[TMP65]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP53:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP53]], ptr [[TMP54]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP55:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP62:%.*]] = load [4 x i32], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP55]], [2 x i32] poison, [4 x i32] [[TMP62]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 63: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP57]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP12]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP66:%.*]] = load i32, ptr [[TMP58]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP66]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP67:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP68:%.*]] = getelementptr inbounds i32, ptr [[TMP58]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP69:%.*]] = load i32, ptr [[TMP68]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP69]], ptr [[TMP67]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP82:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP84:%.*]] = getelementptr inbounds i32, ptr [[TMP58]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP81:%.*]] = load i32, ptr [[TMP84]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP81]], ptr [[TMP82]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP88:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP74:%.*]] = getelementptr inbounds i32, ptr [[TMP58]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP75:%.*]] = load i32, ptr [[TMP74]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP75]], ptr [[TMP88]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP87:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP87]], ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP103:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP78:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP79:%.*]] = load i32, ptr [[TMP103]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP79]], ptr [[TMP78]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP70:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP70]], ptr [[TMP71]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP72:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP83:%.*]] = load [4 x i32], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP72]], [2 x i32] poison, [4 x i32] [[TMP83]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 84: -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[TMP37]], label [[TMP85:%.*]], label [[TMP128:%.*]] -; LOWERRAYTRACINGPIPELINE: 85: -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[TMP36]], label [[TMP86:%.*]], label [[TMP109:%.*]] -; LOWERRAYTRACINGPIPELINE: 86: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_cont_IgnoreHit(ptr [[TMP76]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP12]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP104:%.*]] = load i32, ptr [[TMP77]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP104]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP105:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP125:%.*]] = getelementptr inbounds i32, ptr [[TMP77]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP92:%.*]] = load i32, ptr [[TMP125]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP92]], ptr [[TMP105]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP129:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP144:%.*]] = getelementptr inbounds i32, ptr [[TMP77]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP95:%.*]] = load i32, ptr [[TMP144]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP95]], ptr [[TMP129]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP96:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP97:%.*]] = getelementptr inbounds i32, ptr [[TMP77]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP98:%.*]] = load i32, ptr [[TMP97]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP98]], ptr [[TMP96]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP99:%.*]] = load i32, ptr [[ORIGHITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP99]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP100:%.*]] = getelementptr inbounds i32, ptr [[ORIGHITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP101:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP102:%.*]] = load i32, ptr [[TMP100]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP102]], ptr [[TMP101]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP89:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP90:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP89]], ptr [[TMP90]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP91:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP145:%.*]] = load [4 x i32], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP91]], [2 x i32] poison, [4 x i32] [[TMP145]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 107: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP93:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_cont_IgnoreHit(ptr [[TMP93]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP94:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP12]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP126:%.*]] = load i32, ptr [[TMP94]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP126]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP111:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP112:%.*]] = getelementptr inbounds i32, ptr [[TMP94]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP113:%.*]] = load i32, ptr [[TMP112]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP113]], ptr [[TMP111]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP114:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP115:%.*]] = getelementptr inbounds i32, ptr [[TMP94]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP116:%.*]] = load i32, ptr [[TMP115]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP116]], ptr [[TMP114]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP117:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP118:%.*]] = getelementptr inbounds i32, ptr [[TMP94]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP119:%.*]] = load i32, ptr [[TMP118]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP119]], ptr [[TMP117]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP120:%.*]] = load i32, ptr [[ORIGHITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP120]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP121:%.*]] = getelementptr inbounds i32, ptr [[ORIGHITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP146:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP148:%.*]] = load i32, ptr [[TMP121]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP148]], ptr [[TMP146]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP106:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP107:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP106]], ptr [[TMP107]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP108:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP127:%.*]] = load [4 x i32], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP108]], [2 x i32] poison, [4 x i32] [[TMP127]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 128: -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> [[TMP29]], ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP110:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP12]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP130:%.*]] = load i32, ptr [[TMP110]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP130]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP131:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP132:%.*]] = getelementptr inbounds i32, ptr [[TMP110]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP133:%.*]] = load i32, ptr [[TMP132]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP133]], ptr [[TMP131]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP134:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP135:%.*]] = getelementptr inbounds i32, ptr [[TMP110]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP136:%.*]] = load i32, ptr [[TMP135]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP136]], ptr [[TMP134]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP137:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP138:%.*]] = getelementptr inbounds i32, ptr [[TMP110]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP139:%.*]] = load i32, ptr [[TMP138]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP139]], ptr [[TMP137]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP140:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP140]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP141:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP142:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP143:%.*]] = load i32, ptr [[TMP141]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP143]], ptr [[TMP142]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP122:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP123:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP122]], ptr [[TMP123]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP124:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP147:%.*]] = load [4 x i32], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP124]], [2 x i32] poison, [4 x i32] [[TMP147]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.AnyHitTraversalData @MyIntersectionShader( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META44:![0-9]+]] !continuation.registercount [[META33:![0-9]+]] !continuation [[META45:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I2:%.*]] = load float, ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = bitcast ptr [[TMP4]] to ptr -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[TMP7]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[ORIGTPTR_I:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ORIGT_I:%.*]] = load float, ptr [[ORIGTPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I2]], [[ORIGT_I]] -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; LOWERRAYTRACINGPIPELINE: callAHit.i: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = call { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.AnyHitTraversalDatasa2i32a30i32s(i64 3, i32 16, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP8]], {} poison, [30 x i32] [[TMP9]]), !continuation.registercount [[META33]], !continuation.returnedRegistercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP24]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[TMP26]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP24]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP10]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[_CONT_REPORTHIT_EXIT:%.*]] -; LOWERRAYTRACINGPIPELINE: isEnd.i: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP12]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP16]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[_CONT_REPORTHIT_EXIT]] -; LOWERRAYTRACINGPIPELINE: _cont_ReportHit.exit: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[ISEND_I1]], label [[TMP19:%.*]], label [[TMP21:%.*]] -; LOWERRAYTRACINGPIPELINE: 22: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP20]], [2 x i32] poison, [30 x i32] [[TMP25]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 25: -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr [[TMP7]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP22]], [2 x i32] poison, [30 x i32] [[TMP28]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.AnyHitTraversalData @MyIntersectionShader2( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META44]] !continuation.registercount [[META33]] !continuation [[META46:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I2:%.*]] = load float, ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = bitcast ptr [[TMP4]] to ptr -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[TMP7]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[ORIGTPTR_I:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ORIGT_I:%.*]] = load float, ptr [[ORIGTPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I2]], [[ORIGT_I]] -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; LOWERRAYTRACINGPIPELINE: callAHit.i: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = call { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.AnyHitTraversalDatasa2i32a30i32s(i64 3, i32 16, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2]] [[TMP8]], {} poison, [30 x i32] [[TMP9]]), !continuation.registercount [[META33]], !continuation.returnedRegistercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP24]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[TMP26]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP24]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP10]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[_CONT_REPORTHIT_EXIT:%.*]] -; LOWERRAYTRACINGPIPELINE: isEnd.i: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP12]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP16]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[_CONT_REPORTHIT_EXIT]] -; LOWERRAYTRACINGPIPELINE: _cont_ReportHit.exit: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[ISEND_I1]], label [[TMP19:%.*]], label [[TMP21:%.*]] -; LOWERRAYTRACINGPIPELINE: 22: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP20]], [2 x i32] poison, [30 x i32] [[TMP25]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 25: -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr [[TMP7]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP22]], [2 x i32] poison, [30 x i32] [[TMP28]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @MyMissShader( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META34]] !continuation.registercount [[META34]] !continuation [[META47:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP7]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP9]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP26]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP11]], ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP14]], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> , ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP27]], ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP18]], ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP20]], ptr [[TMP30]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[TMP23]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP32]], ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = load [4 x i32], ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP22]], [27 x i32] poison, [4 x i32] [[TMP29]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define i32 @_cont_GetContinuationStackAddr( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ) #[[ATTR0:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret i32 0 -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define %struct.HitData @_cont_GetCandidateState( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_ANYHITTRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @_cont_SetTriangleHitAttributes( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret void -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret i32 5 -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define i1 @_cont_IsEndSearch( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[TMP0:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret i1 [[ISEND]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define <3 x i32> @_cont_DispatchRaysIndex3( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_1:%.*]] = load i32, ptr [[RESPTR_1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_2:%.*]] = load i32, ptr [[RESPTR_2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_3:%.*]] = load i32, ptr [[RESPTR_3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_0:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_1:%.*]] = insertelement <3 x i32> [[VAL_0]], i32 [[RES_2]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_2:%.*]] = insertelement <3 x i32> [[VAL_1]], i32 [[RES_3]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret <3 x i32> [[VAL_2]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define <3 x float> @_cont_ObjectRayOrigin3( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret <3 x float> [[VAL_2]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define <3 x float> @_cont_ObjectRayDirection3( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 1, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret <3 x float> [[VAL_2]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define float @_cont_RayTCurrent( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret float [[RES]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyRayGen( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !lgc.cps [[META36:![0-9]+]] !continuation [[META37:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = bitcast ptr [[TMP4]] to ptr -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP5]]) #[[ATTR1:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> zeroinitializer, ptr [[TMP6]], align 4, !tbaa [[TBAA38:![0-9]+]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP7]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP8]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR_I:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR3:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[ADDR_I]], 5 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP14]], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP17]], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP20]], ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP26]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = load [4 x i32], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa27i32a4i32s(i32 4, i32 8, i32 5, [30 x i32] poison, [4 x i32] [[TMP21]]), !continuation.returnedRegistercount [[META34:![0-9]+]], !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP22]], 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [4 x i32] [[TMP23]], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP27:%.*]] = freeze [[STRUCT_RAYPAYLOAD]] poison -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_RAYPAYLOAD]] [[TMP27]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP29]], ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP32]], ptr [[TMP30]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP35]], ptr [[TMP33]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP45:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP47]], ptr [[TMP45]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP22]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP24]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: .split: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP36:%.*]] = load <4 x float>, ptr [[TMP6]], align 4, !tbaa [[TBAA38]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP37:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[TMP37]], i8 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP38:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[TMP38]], i8 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP48:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP3]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP40:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP48]], [[DX_TYPES_RESOURCEPROPERTIES]] { i32 4098, i32 1033 }) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP41:%.*]] = extractelement <4 x float> [[TMP36]], i64 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP42:%.*]] = extractelement <4 x float> [[TMP36]], i64 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP43:%.*]] = extractelement <4 x float> [[TMP36]], i64 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP44:%.*]] = extractelement <4 x float> [[TMP36]], i64 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP40]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP41]], float [[TMP42]], float [[TMP43]], float [[TMP44]], i8 15) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @lgc.cps.complete() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyClosestHitShader( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META41:![0-9]+]] !lgc.cps [[META42:![0-9]+]] !continuation [[META43:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[HITATTRS:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP7]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP10]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP13]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP34]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP14]], ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP15]], ptr [[HITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP18]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[HITATTRS]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = load <2 x float>, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = extractelement <2 x float> [[TMP20]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = fsub fast float 1.000000e+00, [[TMP21]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = extractelement <2 x float> [[TMP20]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = fsub fast float [[TMP22]], [[TMP23]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = insertelement <4 x float> undef, float [[TMP24]], i64 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = insertelement <4 x float> [[TMP25]], float [[TMP21]], i64 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP27:%.*]] = insertelement <4 x float> [[TMP26]], float [[TMP23]], i64 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP28:%.*]] = insertelement <4 x float> [[TMP27]], float 1.000000e+00, i64 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> [[TMP28]], ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP30]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP31]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, ptr [[TMP30]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP37:%.*]] = load i32, ptr [[TMP36]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP37]], ptr [[TMP32]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP39:%.*]] = getelementptr inbounds i32, ptr [[TMP30]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP40:%.*]] = load i32, ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP40]], ptr [[TMP35]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr [[TMP30]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr [[TMP44]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP45]], ptr [[TMP38]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP42:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP41]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP43:%.*]] = load [4 x i32], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP42]], [27 x i32] poison, [4 x i32] [[TMP43]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyAnyHitShader( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[HIT_ATTRS:%.*]], {} [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META42]] !lgc.cps [[META34]] !continuation [[META44:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ORIGHITATTRS:%.*]] = alloca [8 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[HITATTRSALLOCA:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP10]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP12]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP15]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP18]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP21]], ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES]](ptr [[TMP22]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP23]], ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP28]], ptr [[ORIGHITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[ORIGHITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[TMP9]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP27]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[HIT_ATTRS]], ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP10]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP30:%.*]] = load <4 x float>, ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I1:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I1]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_1_I2:%.*]] = load float, ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_2_I3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_2_I4:%.*]] = load float, ptr [[RESPTR_2_I3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_3_I5:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_3_I6:%.*]] = load float, ptr [[RESPTR_3_I5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_0_I7:%.*]] = insertelement <3 x float> undef, float [[RES_1_I2]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_1_I8:%.*]] = insertelement <3 x float> [[VAL_0_I7]], float [[RES_2_I4]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_2_I9:%.*]] = insertelement <3 x float> [[VAL_1_I8]], float [[RES_3_I6]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[VAL_2_I9]], i8 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_1_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 1, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_1_I:%.*]] = load float, ptr [[RESPTR_1_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_2_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 1, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_2_I:%.*]] = load float, ptr [[RESPTR_2_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_3_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 1, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_3_I:%.*]] = load float, ptr [[RESPTR_3_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_0_I:%.*]] = insertelement <3 x float> undef, float [[RES_1_I]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_1_I:%.*]] = insertelement <3 x float> [[VAL_0_I]], float [[RES_2_I]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_2_I:%.*]] = insertelement <3 x float> [[VAL_1_I]], float [[RES_3_I]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[VAL_2_I]], i8 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I10:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I10]], ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I11:%.*]] = load float, ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP34:%.*]] = fmul fast float [[RES_I11]], [[EXTRACT]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP35:%.*]] = fadd fast float [[TMP34]], [[EXTRACT1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP36:%.*]] = fcmp fast ogt float [[TMP35]], 0.000000e+00 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP37:%.*]] = fcmp fast ogt float [[TMP35]], 1.000000e+00 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP38:%.*]] = fcmp fast ogt float [[TMP35]], -1.000000e+00 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[TMP36]], label [[TMP39:%.*]], label [[TMP82:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: 38: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> [[TMP30]], ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[TMP37]], label [[TMP40:%.*]], label [[TMP61:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: 39: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP41]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP10]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP56:%.*]] = load i32, ptr [[TMP42]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP56]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP43:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr [[TMP42]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr [[TMP44]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP45]], ptr [[TMP43]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP47:%.*]] = getelementptr inbounds i32, ptr [[TMP42]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP48:%.*]] = load i32, ptr [[TMP47]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP48]], ptr [[TMP46]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP49:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr [[TMP42]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr [[TMP50]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP51]], ptr [[TMP49]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP52:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP52]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP53:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP54:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP55:%.*]] = load i32, ptr [[TMP53]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP55]], ptr [[TMP54]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP57:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP57]], ptr [[TMP58]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP59:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP60:%.*]] = load [4 x i32], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP59]], [2 x i32] poison, [4 x i32] [[TMP60]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE-CPS: 60: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP62]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP10]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP77:%.*]] = load i32, ptr [[TMP63]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP77]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP64:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr [[TMP63]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP66:%.*]] = load i32, ptr [[TMP65]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP66]], ptr [[TMP64]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP67:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP68:%.*]] = getelementptr inbounds i32, ptr [[TMP63]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP69:%.*]] = load i32, ptr [[TMP68]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP69]], ptr [[TMP67]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP71:%.*]] = getelementptr inbounds i32, ptr [[TMP63]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP72:%.*]] = load i32, ptr [[TMP71]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP72]], ptr [[TMP70]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP73:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP73]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP74:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP75:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP76:%.*]] = load i32, ptr [[TMP74]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP76]], ptr [[TMP75]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP78:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP78]], ptr [[TMP79]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP80:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP81:%.*]] = load [4 x i32], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP80]], [2 x i32] poison, [4 x i32] [[TMP81]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE-CPS: 81: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[TMP38]], label [[TMP84:%.*]], label [[TMP141:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: 82: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[TMP37]], label [[TMP83:%.*]], label [[TMP105:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: 83: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @_cont_IgnoreHit(ptr [[TMP85]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP10]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP100:%.*]] = load i32, ptr [[TMP86]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP100]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP87:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP88:%.*]] = getelementptr inbounds i32, ptr [[TMP86]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP89:%.*]] = load i32, ptr [[TMP88]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP89]], ptr [[TMP87]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP90:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP91:%.*]] = getelementptr inbounds i32, ptr [[TMP86]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP92:%.*]] = load i32, ptr [[TMP91]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP92]], ptr [[TMP90]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP93:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP94:%.*]] = getelementptr inbounds i32, ptr [[TMP86]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP95:%.*]] = load i32, ptr [[TMP94]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP95]], ptr [[TMP93]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP96:%.*]] = load i32, ptr [[ORIGHITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP96]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP97:%.*]] = getelementptr inbounds i32, ptr [[ORIGHITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP98:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP99:%.*]] = load i32, ptr [[TMP97]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP99]], ptr [[TMP98]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP102:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP102]], ptr [[TMP103]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP104:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP106:%.*]] = load [4 x i32], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP104]], [2 x i32] poison, [4 x i32] [[TMP106]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE-CPS: 104: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP107:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @_cont_IgnoreHit(ptr [[TMP107]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP108:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP10]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP121:%.*]] = load i32, ptr [[TMP108]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP121]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP122:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP109:%.*]] = getelementptr inbounds i32, ptr [[TMP108]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP110:%.*]] = load i32, ptr [[TMP109]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP110]], ptr [[TMP122]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP111:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP112:%.*]] = getelementptr inbounds i32, ptr [[TMP108]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP113:%.*]] = load i32, ptr [[TMP112]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP113]], ptr [[TMP111]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP114:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP115:%.*]] = getelementptr inbounds i32, ptr [[TMP108]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP116:%.*]] = load i32, ptr [[TMP115]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP116]], ptr [[TMP114]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP117:%.*]] = load i32, ptr [[ORIGHITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP117]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP118:%.*]] = getelementptr inbounds i32, ptr [[ORIGHITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP119:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP120:%.*]] = load i32, ptr [[TMP118]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP120]], ptr [[TMP119]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP124:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP125:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP124]], ptr [[TMP125]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP126:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP142:%.*]] = load [4 x i32], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP126]], [2 x i32] poison, [4 x i32] [[TMP142]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE-CPS: 125: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> [[TMP30]], ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP129:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP10]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP127:%.*]] = load i32, ptr [[TMP129]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP127]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP128:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP143:%.*]] = getelementptr inbounds i32, ptr [[TMP129]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP130:%.*]] = load i32, ptr [[TMP143]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP130]], ptr [[TMP128]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP131:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP132:%.*]] = getelementptr inbounds i32, ptr [[TMP129]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP133:%.*]] = load i32, ptr [[TMP132]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP133]], ptr [[TMP131]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP134:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP135:%.*]] = getelementptr inbounds i32, ptr [[TMP129]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP136:%.*]] = load i32, ptr [[TMP135]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP136]], ptr [[TMP134]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP137:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP137]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP138:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP139:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP140:%.*]] = load i32, ptr [[TMP138]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP140]], ptr [[TMP139]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP144:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP145:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP144]], ptr [[TMP145]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP146:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP147:%.*]] = load [4 x i32], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP146]], [2 x i32] poison, [4 x i32] [[TMP147]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyIntersectionShader( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META36]] !lgc.cps [[META45:![0-9]+]] !continuation [[META46:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [30 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I2:%.*]] = load float, ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = bitcast ptr [[TMP3]] to ptr -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ORIGTPTR_I:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ORIGT_I:%.*]] = load float, ptr [[ORIGTPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I2]], [[ORIGT_I]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: callAHit.i: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TRAV_DATA_I:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = call { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.AnyHitTraversalDatasa2i32a30i32s(i32 3, i32 16, i32 5, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP7]], {} poison, [30 x i32] [[TMP8]]), !continuation.returnedRegistercount [[META33:![0-9]+]], !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP9]], 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [30 x i32] [[TMP10]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP9]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP11]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[_CONT_REPORTHIT_EXIT:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: isEnd.i: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP14]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP17]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP18]], ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[_CONT_REPORTHIT_EXIT]] -; LOWERRAYTRACINGPIPELINE-CPS: _cont_ReportHit.exit: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP21:%.*]], label [[TMP24:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: 21: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP22]], [2 x i32] poison, [30 x i32] [[TMP23]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE-CPS: 24: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP25]], [2 x i32] poison, [30 x i32] [[TMP26]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyIntersectionShader2( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META36]] !lgc.cps [[META45]] !continuation [[META47:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [30 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I2:%.*]] = load float, ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = bitcast ptr [[TMP3]] to ptr -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ORIGTPTR_I:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ORIGT_I:%.*]] = load float, ptr [[ORIGTPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I2]], [[ORIGT_I]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: callAHit.i: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TRAV_DATA_I:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = call { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.AnyHitTraversalDatasa2i32a30i32s(i32 3, i32 16, i32 5, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2]] [[TMP7]], {} poison, [30 x i32] [[TMP8]]), !continuation.returnedRegistercount [[META33]], !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP9]], 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [30 x i32] [[TMP10]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP9]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP11]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[_CONT_REPORTHIT_EXIT:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: isEnd.i: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP14]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP17]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP18]], ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[_CONT_REPORTHIT_EXIT]] -; LOWERRAYTRACINGPIPELINE-CPS: _cont_ReportHit.exit: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP21:%.*]], label [[TMP24:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: 21: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP22]], [2 x i32] poison, [30 x i32] [[TMP23]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE-CPS: 24: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP25]], [2 x i32] poison, [30 x i32] [[TMP26]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyMissShader( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META34]] !lgc.cps [[META42]] !continuation [[META48:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = alloca [4 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [4 x i32] [[PAYLOAD]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP6]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP9]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP12]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP18]], ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP1]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> , ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP15]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP21]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP24]], ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP29]], ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP27:%.*]] = load [4 x i32], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP26]], [27 x i32] poison, [4 x i32] [[TMP27]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define i32 @_cont_GetContinuationStackAddr( -; POSTPROCESS-SAME: ) #[[ATTR0:[0-9]+]] { -; POSTPROCESS-NEXT: ret i32 0 -; -; -; POSTPROCESS-LABEL: define %struct.HitData @_cont_GetCandidateState( -; POSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; POSTPROCESS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_ANYHITTRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; POSTPROCESS-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; POSTPROCESS-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; POSTPROCESS-LABEL: define void @_cont_SetTriangleHitAttributes( -; POSTPROCESS-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) { -; POSTPROCESS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; POSTPROCESS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; POSTPROCESS-NEXT: ret void -; -; -; POSTPROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POSTPROCESS-SAME: ptr [[DATA:%.*]]) { -; POSTPROCESS-NEXT: ret i32 5 -; -; -; POSTPROCESS-LABEL: define i1 @_cont_IsEndSearch( -; POSTPROCESS-SAME: ptr [[TMP0:%.*]]) #[[ATTR0]] { -; POSTPROCESS-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-NEXT: ret i1 [[ISEND]] -; -; -; POSTPROCESS-LABEL: define <3 x i32> @_cont_DispatchRaysIndex3( -; POSTPROCESS-SAME: ptr [[DATA:%.*]]) { -; POSTPROCESS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[RES_1:%.*]] = load i32, ptr [[RESPTR_1]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 1 -; POSTPROCESS-NEXT: [[RES_2:%.*]] = load i32, ptr [[RESPTR_2]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: [[RES_3:%.*]] = load i32, ptr [[RESPTR_3]], align 4 -; POSTPROCESS-NEXT: [[VAL_0:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1]], i32 0 -; POSTPROCESS-NEXT: [[VAL_1:%.*]] = insertelement <3 x i32> [[VAL_0]], i32 [[RES_2]], i32 1 -; POSTPROCESS-NEXT: [[VAL_2:%.*]] = insertelement <3 x i32> [[VAL_1]], i32 [[RES_3]], i32 2 -; POSTPROCESS-NEXT: ret <3 x i32> [[VAL_2]] -; -; -; POSTPROCESS-LABEL: define <3 x float> @_cont_ObjectRayOrigin3( -; POSTPROCESS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; POSTPROCESS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 1 -; POSTPROCESS-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; POSTPROCESS-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; POSTPROCESS-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; POSTPROCESS-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; POSTPROCESS-NEXT: ret <3 x float> [[VAL_2]] -; -; -; POSTPROCESS-LABEL: define <3 x float> @_cont_ObjectRayDirection3( -; POSTPROCESS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; POSTPROCESS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; POSTPROCESS-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; POSTPROCESS-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; POSTPROCESS-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; POSTPROCESS-NEXT: ret <3 x float> [[VAL_2]] -; -; -; POSTPROCESS-LABEL: define float @_cont_RayTCurrent( -; POSTPROCESS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; POSTPROCESS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 2 -; POSTPROCESS-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; POSTPROCESS-NEXT: ret float [[RES]] -; -; -; POSTPROCESS-LABEL: define void @MyRayGen( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation.entry [[META13:![0-9]+]] !continuation [[META36:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT20:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POSTPROCESS-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POSTPROCESS-NEXT: [[TMP1:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POSTPROCESS-NEXT: [[TMP5:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) -; POSTPROCESS-NEXT: [[TMP3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP5]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POSTPROCESS-NEXT: [[TMP4:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP3]]) -; POSTPROCESS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT20]], 0 -; POSTPROCESS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POSTPROCESS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyRayGen.resume.0) -; POSTPROCESS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP6]], 5 -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 0 -; POSTPROCESS-NEXT: [[TMP11:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 1 -; POSTPROCESS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 2 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 3 -; POSTPROCESS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP11]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP7]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP8]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP9]], 3 -; POSTPROCESS-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 4, i32 [[TMP10]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define dso_local void @MyRayGen.resume.0( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [4 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META22]] !continuation [[META36]] { -; POSTPROCESS-NEXT: entryresume.0: -; POSTPROCESS-NEXT: [[TMP19:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP9:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP1]], 0 -; POSTPROCESS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP9]], ptr [[TMP19]], align 4 -; POSTPROCESS-NEXT: [[TMP16:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP1]], 2 -; POSTPROCESS-NEXT: [[TMP10:%.*]] = extractvalue [4 x i32] [[TMP16]], 0 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = extractvalue [4 x i32] [[TMP16]], 1 -; POSTPROCESS-NEXT: [[TMP5:%.*]] = extractvalue [4 x i32] [[TMP16]], 2 -; POSTPROCESS-NEXT: [[TMP7:%.*]] = extractvalue [4 x i32] [[TMP16]], 3 -; POSTPROCESS-NEXT: [[TMP20:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP20]], 0 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP10]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTFCA_0_EXTRACT]], float [[TMP2]], i32 0 -; POSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP3]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP4]], i32 1 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP6]], i32 2 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP7]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP8]], i32 3 -; POSTPROCESS-NEXT: [[TMP17:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP1]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT21:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP17]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POSTPROCESS-NEXT: [[TMP18:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POSTPROCESS-NEXT: [[RES_1_I1:%.*]] = load i32, ptr [[TMP19]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_2_I2:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP19]], i32 0, i32 0, i32 1 -; POSTPROCESS-NEXT: [[RES_2_I3:%.*]] = load i32, ptr [[RESPTR_2_I2]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_3_I4:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP19]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: [[RES_3_I5:%.*]] = load i32, ptr [[RESPTR_3_I4]], align 4 -; POSTPROCESS-NEXT: [[VAL_0_I6:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1_I1]], i32 0 -; POSTPROCESS-NEXT: [[VAL_1_I7:%.*]] = insertelement <3 x i32> [[VAL_0_I6]], i32 [[RES_2_I3]], i32 1 -; POSTPROCESS-NEXT: [[VAL_2_I8:%.*]] = insertelement <3 x i32> [[VAL_1_I7]], i32 [[RES_3_I5]], i32 2 -; POSTPROCESS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[VAL_2_I8]], i8 0 -; POSTPROCESS-NEXT: [[RES_1_I:%.*]] = load i32, ptr [[TMP19]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_2_I:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP19]], i32 0, i32 0, i32 1 -; POSTPROCESS-NEXT: [[RES_2_I:%.*]] = load i32, ptr [[RESPTR_2_I]], align 4 -; POSTPROCESS-NEXT: [[RESPTR_3_I:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP19]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: [[RES_3_I:%.*]] = load i32, ptr [[RESPTR_3_I]], align 4 -; POSTPROCESS-NEXT: [[VAL_0_I:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1_I]], i32 0 -; POSTPROCESS-NEXT: [[VAL_1_I:%.*]] = insertelement <3 x i32> [[VAL_0_I]], i32 [[RES_2_I]], i32 1 -; POSTPROCESS-NEXT: [[VAL_2_I:%.*]] = insertelement <3 x i32> [[VAL_1_I]], i32 [[RES_3_I]], i32 2 -; POSTPROCESS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[VAL_2_I]], i8 1 -; POSTPROCESS-NEXT: [[TMP21:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP18]]) -; POSTPROCESS-NEXT: [[TMP11:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP21]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 4098, i32 1033 }) -; POSTPROCESS-NEXT: [[TMP12:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 0 -; POSTPROCESS-NEXT: [[TMP13:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 1 -; POSTPROCESS-NEXT: [[TMP14:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 2 -; POSTPROCESS-NEXT: [[TMP15:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 3 -; POSTPROCESS-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP11]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP12]], float [[TMP13]], float [[TMP14]], float [[TMP15]], i8 15) -; POSTPROCESS-NEXT: ret void -; -; -; POSTPROCESS-LABEL: define void @MyClosestHitShader( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META37:![0-9]+]] !continuation [[META38:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: store <3 x i32> [[DOTFCA_0_0_EXTRACT]], ptr [[DOTFCA_0_0_GEP]], align 4 -; POSTPROCESS-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP2]], i32 0 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP3]], i32 1 -; POSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP4]], i32 2 -; POSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP5]], i32 3 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP6]], 0 -; POSTPROCESS-NEXT: [[DOTSROA_012_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_012_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP7]] to float -; POSTPROCESS-NEXT: [[HITATTRS_SROA_0_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i32 0 -; POSTPROCESS-NEXT: [[DOTSROA_012_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_012_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float -; POSTPROCESS-NEXT: [[HITATTRS_SROA_0_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[HITATTRS_SROA_0_0_VEC_INSERT]], float [[TMP10]], i32 1 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[TMP11:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 0 -; POSTPROCESS-NEXT: [[TMP12:%.*]] = fsub fast float 1.000000e+00, [[TMP11]] -; POSTPROCESS-NEXT: [[TMP13:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 1 -; POSTPROCESS-NEXT: [[TMP14:%.*]] = fsub fast float [[TMP12]], [[TMP13]] -; POSTPROCESS-NEXT: [[TMP15:%.*]] = insertelement <4 x float> undef, float [[TMP14]], i64 0 -; POSTPROCESS-NEXT: [[TMP16:%.*]] = insertelement <4 x float> [[TMP15]], float [[TMP11]], i64 1 -; POSTPROCESS-NEXT: [[TMP17:%.*]] = insertelement <4 x float> [[TMP16]], float [[TMP13]], i64 2 -; POSTPROCESS-NEXT: [[TMP18:%.*]] = insertelement <4 x float> [[TMP17]], float 1.000000e+00, i64 3 -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP18]], i32 0 -; POSTPROCESS-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP18]], i32 1 -; POSTPROCESS-NEXT: [[TMP20:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP18]], i32 2 -; POSTPROCESS-NEXT: [[TMP21:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP18]], i32 3 -; POSTPROCESS-NEXT: [[TMP22:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP23]], i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_LOAD]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP19]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT1]], i32 [[TMP20]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP21]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP22]], 3 -; POSTPROCESS-NEXT: [[TMP28:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP28]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [27 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define void @MyAnyHitShader( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META39:![0-9]+]] !continuation [[META40:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: store <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: store <3 x float> [[DOTFCA_0_1_0_EXTRACT]], ptr [[DOTFCA_0_1_0_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: store <3 x float> [[DOTFCA_0_1_1_EXTRACT]], ptr [[DOTFCA_0_1_1_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: store float [[DOTFCA_0_1_2_EXTRACT]], ptr [[DOTFCA_0_1_2_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: store i32 [[DOTFCA_0_1_3_EXTRACT]], ptr [[DOTFCA_0_1_3_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: store <3 x float> [[DOTFCA_0_2_EXTRACT]], ptr [[DOTFCA_0_2_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-NEXT: store <3 x float> [[DOTFCA_0_3_EXTRACT]], ptr [[DOTFCA_0_3_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-NEXT: store float [[DOTFCA_0_4_EXTRACT]], ptr [[DOTFCA_0_4_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-NEXT: store i64 [[DOTFCA_0_5_EXTRACT]], ptr [[DOTFCA_0_5_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: store <3 x float> [[DOTFCA_1_0_EXTRACT]], ptr [[DOTFCA_1_0_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: store <3 x float> [[DOTFCA_1_1_EXTRACT]], ptr [[DOTFCA_1_1_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: store float [[DOTFCA_1_2_EXTRACT]], ptr [[DOTFCA_1_2_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: store i32 [[DOTFCA_1_3_EXTRACT]], ptr [[DOTFCA_1_3_GEP]], align 4 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP3]], i32 0 -; POSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP4]], i32 1 -; POSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP5]], i32 2 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP6]], i32 3 -; POSTPROCESS-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES]](ptr [[TMP7]]) -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT401:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP8]], 0 -; POSTPROCESS-NEXT: [[DOTSROA_0403_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT401]], i32 0 -; POSTPROCESS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0403_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0403_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT401]], i32 1 -; POSTPROCESS-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0403_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[RES_I1_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA:%.*]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; POSTPROCESS-NEXT: [[RES_I1_FCA_0_LOAD:%.*]] = load <3 x float>, ptr [[RES_I1_FCA_0_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I1_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, <3 x float> [[RES_I1_FCA_0_LOAD]], 0 -; POSTPROCESS-NEXT: [[RES_I1_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; POSTPROCESS-NEXT: [[RES_I1_FCA_1_LOAD:%.*]] = load <3 x float>, ptr [[RES_I1_FCA_1_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I1_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_0_INSERT]], <3 x float> [[RES_I1_FCA_1_LOAD]], 1 -; POSTPROCESS-NEXT: [[RES_I1_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; POSTPROCESS-NEXT: [[RES_I1_FCA_2_LOAD:%.*]] = load float, ptr [[RES_I1_FCA_2_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I1_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_1_INSERT]], float [[RES_I1_FCA_2_LOAD]], 2 -; POSTPROCESS-NEXT: [[RES_I1_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; POSTPROCESS-NEXT: [[RES_I1_FCA_3_LOAD:%.*]] = load i32, ptr [[RES_I1_FCA_3_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I1_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_2_INSERT]], i32 [[RES_I1_FCA_3_LOAD]], 3 -; POSTPROCESS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 0 -; POSTPROCESS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 1 -; POSTPROCESS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 2 -; POSTPROCESS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 3 -; POSTPROCESS-NEXT: [[DOTSROA_0425_0_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[DOTSROA_0425_4_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[DOTSROA_0425_8_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT]], i32 2 -; POSTPROCESS-NEXT: [[VAL_0_I7:%.*]] = insertelement <3 x float> undef, float [[DOTSROA_0425_0_VEC_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[VAL_1_I8:%.*]] = insertelement <3 x float> [[VAL_0_I7]], float [[DOTSROA_0425_4_VEC_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[VAL_2_I9:%.*]] = insertelement <3 x float> [[VAL_1_I8]], float [[DOTSROA_0425_8_VEC_EXTRACT]], i32 2 -; POSTPROCESS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[VAL_2_I9]], i8 0 -; POSTPROCESS-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_0_LOAD:%.*]] = load <3 x float>, ptr [[RES_I_FCA_0_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, <3 x float> [[RES_I_FCA_0_LOAD]], 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; POSTPROCESS-NEXT: [[RES_I_FCA_1_LOAD:%.*]] = load <3 x float>, ptr [[RES_I_FCA_1_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], <3 x float> [[RES_I_FCA_1_LOAD]], 1 -; POSTPROCESS-NEXT: [[RES_I_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; POSTPROCESS-NEXT: [[RES_I_FCA_2_LOAD:%.*]] = load float, ptr [[RES_I_FCA_2_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], float [[RES_I_FCA_2_LOAD]], 2 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_LOAD:%.*]] = load i32, ptr [[RES_I_FCA_3_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_2_INSERT]], i32 [[RES_I_FCA_3_LOAD]], 3 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 1 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 2 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 3 -; POSTPROCESS-NEXT: [[DOTSROA_1_12_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[DOTSROA_1_16_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[DOTSROA_1_20_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT]], i32 2 -; POSTPROCESS-NEXT: [[VAL_0_I:%.*]] = insertelement <3 x float> undef, float [[DOTSROA_1_12_VEC_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[VAL_1_I:%.*]] = insertelement <3 x float> [[VAL_0_I]], float [[DOTSROA_1_16_VEC_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[VAL_2_I:%.*]] = insertelement <3 x float> [[VAL_1_I]], float [[DOTSROA_1_20_VEC_EXTRACT]], i32 2 -; POSTPROCESS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[VAL_2_I]], i8 0 -; POSTPROCESS-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[RES_I10_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; POSTPROCESS-NEXT: [[RES_I10_FCA_0_LOAD:%.*]] = load <3 x float>, ptr [[RES_I10_FCA_0_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I10_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, <3 x float> [[RES_I10_FCA_0_LOAD]], 0 -; POSTPROCESS-NEXT: [[RES_I10_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; POSTPROCESS-NEXT: [[RES_I10_FCA_1_LOAD:%.*]] = load <3 x float>, ptr [[RES_I10_FCA_1_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I10_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_0_INSERT]], <3 x float> [[RES_I10_FCA_1_LOAD]], 1 -; POSTPROCESS-NEXT: [[RES_I10_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; POSTPROCESS-NEXT: [[RES_I10_FCA_2_LOAD:%.*]] = load float, ptr [[RES_I10_FCA_2_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I10_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_1_INSERT]], float [[RES_I10_FCA_2_LOAD]], 2 -; POSTPROCESS-NEXT: [[RES_I10_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; POSTPROCESS-NEXT: [[RES_I10_FCA_3_LOAD:%.*]] = load i32, ptr [[RES_I10_FCA_3_GEP]], align 4 -; POSTPROCESS-NEXT: [[RES_I10_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_2_INSERT]], i32 [[RES_I10_FCA_3_LOAD]], 3 -; POSTPROCESS-NEXT: [[RES_I10_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_3_INSERT]], 0 -; POSTPROCESS-NEXT: [[RES_I10_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_3_INSERT]], 1 -; POSTPROCESS-NEXT: [[RES_I10_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_3_INSERT]], 2 -; POSTPROCESS-NEXT: [[RES_I10_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_3_INSERT]], 3 -; POSTPROCESS-NEXT: [[TMP14:%.*]] = fmul fast float [[RES_I10_FCA_3_INSERT_FCA_2_EXTRACT]], [[EXTRACT]] -; POSTPROCESS-NEXT: [[TMP15:%.*]] = fadd fast float [[TMP14]], [[EXTRACT1]] -; POSTPROCESS-NEXT: [[TMP16:%.*]] = fcmp fast ogt float [[TMP15]], 0.000000e+00 -; POSTPROCESS-NEXT: [[TMP17:%.*]] = fcmp fast ogt float [[TMP15]], 1.000000e+00 -; POSTPROCESS-NEXT: [[TMP18:%.*]] = fcmp fast ogt float [[TMP15]], -1.000000e+00 -; POSTPROCESS-NEXT: br i1 [[TMP16]], label [[TMP19:%.*]], label [[TMP44:%.*]] -; POSTPROCESS: 19: -; POSTPROCESS-NEXT: br i1 [[TMP17]], label [[TMP20:%.*]], label [[TMP32:%.*]] -; POSTPROCESS: 20: -; POSTPROCESS-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP21]]) -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-NEXT: [[TMP22:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-NEXT: [[TMP23:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-NEXT: [[TMP24:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-NEXT: [[TMP25:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT15:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[TMP30:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT15]] to i32 -; POSTPROCESS-NEXT: [[TMP31:%.*]] = bitcast i32 [[TMP30]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0241_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP31]], i32 0 -; POSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT19:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[TMP28:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT19]] to i32 -; POSTPROCESS-NEXT: [[TMP33:%.*]] = bitcast i32 [[TMP28]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0241_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0241_0_VEC_INSERT]], float [[TMP33]], i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0241_4_VEC_INSERT]], 0 -; POSTPROCESS-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT59:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP34]], i32 0, i32 0 -; POSTPROCESS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT59]], ptr [[DOTFCA_0_GEP]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP60:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP60]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP225:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP225]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_GEP226:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP226]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_GEP227:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP227]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_LOAD]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_GEP228:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP228]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_LOAD]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_GEP229:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP229]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_GEP230:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP230]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_GEP231:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP231]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_GEP232:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP232]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_LOAD]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_GEP233:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP233]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_LOAD]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_GEP234:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP234]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_LOAD]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_GEP235:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_LOAD:%.*]] = load float, ptr [[DOTFCA_1_2_GEP235]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_LOAD]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_GEP236:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP236]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_LOAD]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP22]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT1]], i32 [[TMP23]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP24]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP25]], 3 -; POSTPROCESS-NEXT: [[TMP38:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP38]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: 32: -; POSTPROCESS-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP39]]) -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT25:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-NEXT: [[TMP41:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT25]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT34:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-NEXT: [[TMP35:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT34]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT42:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-NEXT: [[TMP36:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT42]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT52:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-NEXT: [[TMP37:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT52]] to i32 -; POSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[TMP42:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[TMP43:%.*]] = bitcast i32 [[TMP42]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0245_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP43]], i32 0 -; POSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[TMP40:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[TMP45:%.*]] = bitcast i32 [[TMP40]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0245_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0245_0_VEC_INSERT]], float [[TMP45]], i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT244:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0245_4_VEC_INSERT]], 0 -; POSTPROCESS-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT73:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT244]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_GEP74:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP46]], i32 0, i32 0 -; POSTPROCESS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT73]], ptr [[DOTFCA_0_GEP74]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP75:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_LOAD76:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP75]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT77:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD76]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP78:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_LOAD79:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP78]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT80:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT77]], <3 x float> [[DOTFCA_0_1_0_LOAD79]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_GEP81:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_LOAD82:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP81]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT83:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT80]], <3 x float> [[DOTFCA_0_1_1_LOAD82]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_GEP84:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_LOAD85:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP84]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT86:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT83]], float [[DOTFCA_0_1_2_LOAD85]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_GEP87:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_LOAD88:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP87]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT89:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT86]], i32 [[DOTFCA_0_1_3_LOAD88]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_GEP90:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_LOAD91:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP90]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT92:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT89]], <3 x float> [[DOTFCA_0_2_LOAD91]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_GEP93:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_LOAD94:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP93]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT95:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT92]], <3 x float> [[DOTFCA_0_3_LOAD94]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_GEP96:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_LOAD97:%.*]] = load float, ptr [[DOTFCA_0_4_GEP96]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT98:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT95]], float [[DOTFCA_0_4_LOAD97]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_GEP99:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_LOAD100:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP99]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT101:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT98]], i64 [[DOTFCA_0_5_LOAD100]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_GEP102:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_LOAD103:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP102]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT104:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT101]], <3 x float> [[DOTFCA_1_0_LOAD103]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_GEP105:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_LOAD106:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP105]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT107:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT104]], <3 x float> [[DOTFCA_1_1_LOAD106]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_GEP108:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_LOAD109:%.*]] = load float, ptr [[DOTFCA_1_2_GEP108]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT110:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT107]], float [[DOTFCA_1_2_LOAD109]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_GEP111:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_LOAD112:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP111]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT113:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT110]], i32 [[DOTFCA_1_3_LOAD112]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT62:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP41]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT65:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT62]], i32 [[TMP35]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT68:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT65]], i32 [[TMP36]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT71:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT68]], i32 [[TMP37]], 3 -; POSTPROCESS-NEXT: [[TMP52:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP52]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT113]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT71]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: 44: -; POSTPROCESS-NEXT: br i1 [[TMP18]], label [[TMP53:%.*]], label [[TMP71:%.*]] -; POSTPROCESS: 45: -; POSTPROCESS-NEXT: br i1 [[TMP17]], label [[TMP54:%.*]], label [[TMP62:%.*]] -; POSTPROCESS: 46: -; POSTPROCESS-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: call void @_cont_IgnoreHit(ptr [[TMP47]]) -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT27:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-NEXT: [[TMP48:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT27]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT36:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-NEXT: [[TMP49:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT36]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT44:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-NEXT: [[TMP50:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT44]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT54:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-NEXT: [[TMP51:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT54]] to i32 -; POSTPROCESS-NEXT: [[TMP56:%.*]] = bitcast i32 [[TMP9]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0249_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP56]], i32 0 -; POSTPROCESS-NEXT: [[TMP57:%.*]] = bitcast i32 [[TMP10]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0249_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0249_0_VEC_INSERT]], float [[TMP57]], i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT248:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0249_4_VEC_INSERT]], 0 -; POSTPROCESS-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT114:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT248]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_GEP115:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP58]], i32 0, i32 0 -; POSTPROCESS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT114]], ptr [[DOTFCA_0_GEP115]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP116:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_LOAD117:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP116]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT118:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD117]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP119:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_LOAD120:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP119]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT121:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT118]], <3 x float> [[DOTFCA_0_1_0_LOAD120]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_GEP122:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_LOAD123:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP122]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT124:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT121]], <3 x float> [[DOTFCA_0_1_1_LOAD123]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_GEP125:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_LOAD126:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP125]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT127:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT124]], float [[DOTFCA_0_1_2_LOAD126]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_GEP128:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_LOAD129:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP128]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT130:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT127]], i32 [[DOTFCA_0_1_3_LOAD129]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_GEP131:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_LOAD132:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP131]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT133:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT130]], <3 x float> [[DOTFCA_0_2_LOAD132]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_GEP134:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_LOAD135:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP134]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT136:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT133]], <3 x float> [[DOTFCA_0_3_LOAD135]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_GEP137:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_LOAD138:%.*]] = load float, ptr [[DOTFCA_0_4_GEP137]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT139:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT136]], float [[DOTFCA_0_4_LOAD138]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_GEP140:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_LOAD141:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP140]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT142:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT139]], i64 [[DOTFCA_0_5_LOAD141]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_GEP143:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_LOAD144:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP143]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT145:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT142]], <3 x float> [[DOTFCA_1_0_LOAD144]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_GEP146:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_LOAD147:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP146]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT148:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT145]], <3 x float> [[DOTFCA_1_1_LOAD147]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_GEP149:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_LOAD150:%.*]] = load float, ptr [[DOTFCA_1_2_GEP149]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT151:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT148]], float [[DOTFCA_1_2_LOAD150]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_GEP152:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_LOAD153:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP152]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT154:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT151]], i32 [[DOTFCA_1_3_LOAD153]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT74:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP48]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT77:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT74]], i32 [[TMP49]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT80:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT77]], i32 [[TMP50]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT83:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT80]], i32 [[TMP51]], 3 -; POSTPROCESS-NEXT: [[TMP55:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP55]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT154]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT83]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: 56: -; POSTPROCESS-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: call void @_cont_IgnoreHit(ptr [[TMP63]]) -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT29:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-NEXT: [[TMP64:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT29]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT38:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-NEXT: [[TMP59:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT38]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT46:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-NEXT: [[TMP60:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT46]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT56:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-NEXT: [[TMP61:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT56]] to i32 -; POSTPROCESS-NEXT: [[TMP66:%.*]] = bitcast i32 [[TMP9]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0253_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP66]], i32 0 -; POSTPROCESS-NEXT: [[TMP67:%.*]] = bitcast i32 [[TMP10]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0253_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0253_0_VEC_INSERT]], float [[TMP67]], i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT252:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0253_4_VEC_INSERT]], 0 -; POSTPROCESS-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT155:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT252]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_GEP156:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP68]], i32 0, i32 0 -; POSTPROCESS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT155]], ptr [[DOTFCA_0_GEP156]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP157:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_LOAD158:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP157]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT159:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD158]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP160:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_LOAD161:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP160]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT162:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT159]], <3 x float> [[DOTFCA_0_1_0_LOAD161]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_GEP163:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_LOAD164:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP163]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT165:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT162]], <3 x float> [[DOTFCA_0_1_1_LOAD164]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_GEP166:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_LOAD167:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP166]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT168:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT165]], float [[DOTFCA_0_1_2_LOAD167]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_GEP169:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_LOAD170:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP169]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT171:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT168]], i32 [[DOTFCA_0_1_3_LOAD170]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_GEP172:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_LOAD173:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP172]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT174:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT171]], <3 x float> [[DOTFCA_0_2_LOAD173]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_GEP175:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_LOAD176:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP175]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT177:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT174]], <3 x float> [[DOTFCA_0_3_LOAD176]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_GEP178:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_LOAD179:%.*]] = load float, ptr [[DOTFCA_0_4_GEP178]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT180:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT177]], float [[DOTFCA_0_4_LOAD179]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_GEP181:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_LOAD182:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP181]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT183:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT180]], i64 [[DOTFCA_0_5_LOAD182]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_GEP184:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_LOAD185:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP184]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT186:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT183]], <3 x float> [[DOTFCA_1_0_LOAD185]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_GEP187:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_LOAD188:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP187]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT189:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT186]], <3 x float> [[DOTFCA_1_1_LOAD188]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_GEP190:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_LOAD191:%.*]] = load float, ptr [[DOTFCA_1_2_GEP190]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT192:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT189]], float [[DOTFCA_1_2_LOAD191]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_GEP193:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_LOAD194:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP193]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT195:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT192]], i32 [[DOTFCA_1_3_LOAD194]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT86:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP64]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT89:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT86]], i32 [[TMP59]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT92:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT89]], i32 [[TMP60]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT95:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT92]], i32 [[TMP61]], 3 -; POSTPROCESS-NEXT: [[TMP65:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP65]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT195]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT95]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: 66: -; POSTPROCESS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT31:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-NEXT: [[TMP72:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT31]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT40:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-NEXT: [[TMP73:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT40]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT48:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-NEXT: [[TMP69:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT48]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT58:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-NEXT: [[TMP70:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT58]] to i32 -; POSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT13:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[TMP75:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT13]] to i32 -; POSTPROCESS-NEXT: [[TMP76:%.*]] = bitcast i32 [[TMP75]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0257_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP76]], i32 0 -; POSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT17:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[TMP77:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT17]] to i32 -; POSTPROCESS-NEXT: [[TMP78:%.*]] = bitcast i32 [[TMP77]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0257_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0257_0_VEC_INSERT]], float [[TMP78]], i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT256:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0257_4_VEC_INSERT]], 0 -; POSTPROCESS-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT196:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT256]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_GEP197:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP79]], i32 0, i32 0 -; POSTPROCESS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT196]], ptr [[DOTFCA_0_GEP197]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP198:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_LOAD199:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP198]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT200:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD199]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP201:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_LOAD202:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP201]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT203:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT200]], <3 x float> [[DOTFCA_0_1_0_LOAD202]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_GEP204:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_LOAD205:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP204]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT206:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT203]], <3 x float> [[DOTFCA_0_1_1_LOAD205]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_GEP207:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_LOAD208:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP207]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT209:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT206]], float [[DOTFCA_0_1_2_LOAD208]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_GEP210:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_LOAD211:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP210]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT212:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT209]], i32 [[DOTFCA_0_1_3_LOAD211]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_GEP213:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_LOAD214:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP213]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT215:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT212]], <3 x float> [[DOTFCA_0_2_LOAD214]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_GEP216:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_LOAD217:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP216]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT218:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT215]], <3 x float> [[DOTFCA_0_3_LOAD217]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_GEP219:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_LOAD220:%.*]] = load float, ptr [[DOTFCA_0_4_GEP219]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT221:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT218]], float [[DOTFCA_0_4_LOAD220]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_GEP222:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_LOAD223:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP222]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT224:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT221]], i64 [[DOTFCA_0_5_LOAD223]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_GEP225:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_LOAD226:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP225]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT227:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT224]], <3 x float> [[DOTFCA_1_0_LOAD226]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_GEP228:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_LOAD229:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP228]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT230:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT227]], <3 x float> [[DOTFCA_1_1_LOAD229]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_GEP231:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_LOAD232:%.*]] = load float, ptr [[DOTFCA_1_2_GEP231]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT233:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT230]], float [[DOTFCA_1_2_LOAD232]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_GEP234:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_LOAD235:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP234]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT236:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT233]], i32 [[DOTFCA_1_3_LOAD235]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT98:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP72]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT101:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT98]], i32 [[TMP73]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT104:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT101]], i32 [[TMP69]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT107:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT104]], i32 [[TMP70]], 3 -; POSTPROCESS-NEXT: [[TMP80:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP80]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT236]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT107]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define void @MyIntersectionShader( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META41:![0-9]+]] !continuation [[META42:![0-9]+]] !continuation.stacksize [[META32:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 8 -; POSTPROCESS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 -; POSTPROCESS-NEXT: store i64 [[RETURNADDR]], ptr addrspace(21) [[TMP4]], align 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 3 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]] to <3 x float> -; POSTPROCESS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, <3 x float> [[TMP5]], 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[DOTFCA_0_1_1_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], float [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[DOTFCA_0_1_1_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = bitcast float [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_2_INSERT]], i32 [[TMP6]], 3 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 1 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 2 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 3 -; POSTPROCESS-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT]], [[DOTFCA_0_4_EXTRACT]] -; POSTPROCESS-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; POSTPROCESS: callAHit.i: -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> undef, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT8:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT5]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT11:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT8]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT14:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT11]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT17:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT14]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT20:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT17]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT23:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT20]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT26:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT23]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT29:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT26]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT32:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT29]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT35:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT32]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT38:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT35]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT41:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT38]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT44:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT41]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT47:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT44]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT50:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT47]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT53:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT50]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT56:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT53]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT59:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT56]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT62:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT59]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT65:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT62]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT68:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT65]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT71:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT68]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT74:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT71]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT77:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT74]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT80:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT77]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT83:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT80]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT86:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT83]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT89:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT86]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT92:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT89]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShader.resume.0) -; POSTPROCESS-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP7]], i64 [[TMP8]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_3_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT]], {} poison, [30 x i32] [[DOTFCA_29_INSERT92]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: isEnd.i: -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; POSTPROCESS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0379_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP10]], i32 0 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; POSTPROCESS-NEXT: [[TMP11:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[TMP12:%.*]] = bitcast i32 [[TMP11]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0107_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0379_0_VEC_INSERT]], float [[TMP12]], i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT106:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0107_4_VEC_INSERT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT106]], 0 -; POSTPROCESS-NEXT: [[TMP13:%.*]] = bitcast <2 x float> [[DOTFCA_0_EXTRACT]] to <2 x i32> -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND:%.*]] = shufflevector <2 x i32> [[TMP13]], <2 x i32> poison, <3 x i32> -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND:%.*]] = select <3 x i1> , <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND]], <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]] -; POSTPROCESS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-NEXT: br i1 [[ISEND_I1]], label [[TMP14:%.*]], label [[TMP18:%.*]] -; POSTPROCESS: 14: -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT315:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT318:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT315]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT321:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT318]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT324:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT321]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT327:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT324]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT330:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT327]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT333:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT330]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT336:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT333]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT339:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT336]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT342:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT339]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT345:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT342]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT348:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT345]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT351:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT348]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP16:%.*]] = add i32 [[TMP15]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP16]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP17:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP17]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT351]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: 18: -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP19:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP20:%.*]] = add i32 [[TMP19]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP20]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP21:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP21]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define dso_local void @MyIntersectionShader.resume.0( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_ANYHITTRAVERSALDATA:%.*]], [2 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META41]] !continuation [[META42]] { -; POSTPROCESS-NEXT: entryresume.0: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP15]], -8 -; POSTPROCESS-NEXT: [[TMP16:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP1]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 29 -; POSTPROCESS-NEXT: [[TMP17:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP1]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT16:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT18:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_EXTRACT20:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_EXTRACT22:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_EXTRACT24:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_EXTRACT26:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_EXTRACT28:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_EXTRACT30:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_EXTRACT32:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT34:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT36:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_EXTRACT38:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_EXTRACT40:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 1, 3 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-NEXT: br i1 [[ISEND_I1]], label [[TMP3:%.*]], label [[TMP9:%.*]] -; POSTPROCESS: 6: -; POSTPROCESS-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 -; POSTPROCESS-NEXT: [[RETURNADDR_RELOAD2:%.*]] = load i64, ptr addrspace(21) [[TMP5]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT44:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT16]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT47:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT44]], <3 x float> [[DOTFCA_0_1_0_EXTRACT18]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT50:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT47]], <3 x float> [[DOTFCA_0_1_1_EXTRACT20]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT53:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT50]], float [[DOTFCA_0_1_2_EXTRACT22]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT56:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT53]], i32 [[DOTFCA_0_1_3_EXTRACT24]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT59:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT56]], <3 x float> [[DOTFCA_0_2_EXTRACT26]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT62:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT59]], <3 x float> [[DOTFCA_0_3_EXTRACT28]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT65:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT62]], float [[DOTFCA_0_4_EXTRACT30]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT68:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT65]], i64 [[DOTFCA_0_5_EXTRACT32]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT71:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT68]], <3 x float> [[DOTFCA_1_0_EXTRACT34]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT74:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT71]], <3 x float> [[DOTFCA_1_1_EXTRACT36]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT77:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT74]], float [[DOTFCA_1_2_EXTRACT38]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT80:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT77]], i32 [[DOTFCA_1_3_EXTRACT40]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP7]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD2]], i32 [[TMP8]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT80]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: 12: -; POSTPROCESS-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP10]], i32 0 -; POSTPROCESS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(21) [[TMP11]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT16]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT18]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT20]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT22]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT24]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT26]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT28]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT30]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT32]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT34]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT36]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT38]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT40]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP13]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP14]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define void @MyIntersectionShader2( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META41]] !continuation [[META43:![0-9]+]] !continuation.stacksize [[META32]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 8 -; POSTPROCESS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 -; POSTPROCESS-NEXT: store i64 [[RETURNADDR]], ptr addrspace(21) [[TMP4]], align 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 3 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]] to <3 x float> -; POSTPROCESS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, <3 x float> [[TMP5]], 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[DOTFCA_0_1_1_EXTRACT]], i32 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], float [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[DOTFCA_0_1_1_EXTRACT]], i32 1 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = bitcast float [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_2_INSERT]], i32 [[TMP6]], 3 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 0 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 1 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 2 -; POSTPROCESS-NEXT: [[RES_I_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 3 -; POSTPROCESS-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT]], [[DOTFCA_0_4_EXTRACT]] -; POSTPROCESS-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; POSTPROCESS: callAHit.i: -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2:%.*]] poison, <2 x float> undef, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT8:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT5]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT11:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT8]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT14:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT11]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT17:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT14]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT20:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT17]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT23:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT20]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT26:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT23]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT29:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT26]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT32:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT29]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT35:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT32]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT38:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT35]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT41:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT38]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT44:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT41]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT47:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT44]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT50:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT47]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT53:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT50]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT56:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT53]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT59:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT56]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT62:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT59]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT65:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT62]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT68:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT65]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT71:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT68]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT74:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT71]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT77:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT74]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT80:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT77]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT83:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT80]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT86:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT83]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT89:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT86]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT92:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT89]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShader2.resume.0) -; POSTPROCESS-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP7]], i64 [[TMP8]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_3_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2]] [[DOTFCA_0_INSERT]], {} poison, [30 x i32] [[DOTFCA_29_INSERT92]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: isEnd.i: -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; POSTPROCESS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0379_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP10]], i32 0 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; POSTPROCESS-NEXT: [[TMP11:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[TMP12:%.*]] = bitcast i32 [[TMP11]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0107_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0379_0_VEC_INSERT]], float [[TMP12]], i32 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT106:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTSROA_0107_4_VEC_INSERT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT106]], 0 -; POSTPROCESS-NEXT: [[TMP13:%.*]] = bitcast <2 x float> [[DOTFCA_0_EXTRACT]] to <2 x i32> -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND:%.*]] = shufflevector <2 x i32> [[TMP13]], <2 x i32> poison, <3 x i32> -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND:%.*]] = select <3 x i1> , <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND]], <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]] -; POSTPROCESS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-NEXT: br i1 [[ISEND_I1]], label [[TMP14:%.*]], label [[TMP18:%.*]] -; POSTPROCESS: 14: -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT315:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT318:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT315]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT321:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT318]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT324:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT321]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT327:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT324]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT330:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT327]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT333:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT330]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT336:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT333]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT339:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT336]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT342:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT339]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT345:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT342]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT348:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT345]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT351:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT348]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP16:%.*]] = add i32 [[TMP15]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP16]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP17:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP17]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT351]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: 18: -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP19:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP20:%.*]] = add i32 [[TMP19]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP20]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP21:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP21]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define dso_local void @MyIntersectionShader2.resume.0( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_ANYHITTRAVERSALDATA:%.*]], [2 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META41]] !continuation [[META43]] { -; POSTPROCESS-NEXT: entryresume.0: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP15]], -8 -; POSTPROCESS-NEXT: [[TMP16:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP1]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 29 -; POSTPROCESS-NEXT: [[TMP17:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP1]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT16:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT18:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_EXTRACT20:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_EXTRACT22:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_EXTRACT24:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_EXTRACT26:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_EXTRACT28:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_EXTRACT30:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_EXTRACT32:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT34:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT36:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_EXTRACT38:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_EXTRACT40:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP17]], 1, 3 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-NEXT: br i1 [[ISEND_I1]], label [[TMP3:%.*]], label [[TMP9:%.*]] -; POSTPROCESS: 6: -; POSTPROCESS-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 -; POSTPROCESS-NEXT: [[RETURNADDR_RELOAD2:%.*]] = load i64, ptr addrspace(21) [[TMP5]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT44:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT16]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT47:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT44]], <3 x float> [[DOTFCA_0_1_0_EXTRACT18]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT50:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT47]], <3 x float> [[DOTFCA_0_1_1_EXTRACT20]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT53:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT50]], float [[DOTFCA_0_1_2_EXTRACT22]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT56:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT53]], i32 [[DOTFCA_0_1_3_EXTRACT24]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT59:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT56]], <3 x float> [[DOTFCA_0_2_EXTRACT26]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT62:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT59]], <3 x float> [[DOTFCA_0_3_EXTRACT28]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT65:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT62]], float [[DOTFCA_0_4_EXTRACT30]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT68:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT65]], i64 [[DOTFCA_0_5_EXTRACT32]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT71:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT68]], <3 x float> [[DOTFCA_1_0_EXTRACT34]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT74:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT71]], <3 x float> [[DOTFCA_1_1_EXTRACT36]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT77:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT74]], float [[DOTFCA_1_2_EXTRACT38]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT80:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT77]], i32 [[DOTFCA_1_3_EXTRACT40]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP7]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD2]], i32 [[TMP8]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT80]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]) -; POSTPROCESS-NEXT: unreachable -; POSTPROCESS: 12: -; POSTPROCESS-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP10]], i32 0 -; POSTPROCESS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(21) [[TMP11]], align 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT16]], 0, 0, 0, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT18]], 0, 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT20]], 0, 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT22]], 0, 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT24]], 0, 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT26]], 0, 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT28]], 0, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT30]], 0, 4 -; POSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT32]], 0, 5 -; POSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT34]], 1, 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT36]], 1, 1 -; POSTPROCESS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT38]], 1, 2 -; POSTPROCESS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT40]], 1, 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POSTPROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POSTPROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POSTPROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POSTPROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POSTPROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POSTPROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POSTPROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POSTPROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POSTPROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POSTPROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POSTPROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POSTPROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POSTPROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POSTPROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POSTPROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POSTPROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POSTPROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POSTPROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POSTPROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POSTPROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POSTPROCESS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP13]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP14]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define void @MyMissShader( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META34:![0-9]+]] !continuation [[META44:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; POSTPROCESS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP1]], i32 0 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP2]], i32 1 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP3]], i32 2 -; POSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP4]], i32 3 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 0 -; POSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 1 -; POSTPROCESS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 2 -; POSTPROCESS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 3 -; POSTPROCESS-NEXT: [[TMP12:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP5]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT1]], i32 [[TMP6]], 1 -; POSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP7]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP12]], 3 -; POSTPROCESS-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP13]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [27 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; POSTPROCESS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define i32 @_cont_GetContinuationStackAddr( -; CLEANUP-CPS-SAME: ) #[[ATTR0:[0-9]+]] { -; CLEANUP-CPS-NEXT: ret i32 0 -; -; -; CLEANUP-CPS-LABEL: define %struct.HitData @_cont_GetCandidateState( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; CLEANUP-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_ANYHITTRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; CLEANUP-CPS-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; CLEANUP-CPS-LABEL: define void @_cont_SetTriangleHitAttributes( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) { -; CLEANUP-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; CLEANUP-CPS-NEXT: ret void -; -; -; CLEANUP-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) { -; CLEANUP-CPS-NEXT: ret i32 5 -; -; -; CLEANUP-CPS-LABEL: define i1 @_cont_IsEndSearch( -; CLEANUP-CPS-SAME: ptr [[TMP0:%.*]]) #[[ATTR0]] { -; CLEANUP-CPS-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: ret i1 [[ISEND]] -; -; -; CLEANUP-CPS-LABEL: define <3 x i32> @_cont_DispatchRaysIndex3( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) { -; CLEANUP-CPS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_1:%.*]] = load i32, ptr [[RESPTR_1]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_2:%.*]] = load i32, ptr [[RESPTR_2]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[RES_3:%.*]] = load i32, ptr [[RESPTR_3]], align 4 -; CLEANUP-CPS-NEXT: [[VAL_0:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1]], i32 0 -; CLEANUP-CPS-NEXT: [[VAL_1:%.*]] = insertelement <3 x i32> [[VAL_0]], i32 [[RES_2]], i32 1 -; CLEANUP-CPS-NEXT: [[VAL_2:%.*]] = insertelement <3 x i32> [[VAL_1]], i32 [[RES_3]], i32 2 -; CLEANUP-CPS-NEXT: ret <3 x i32> [[VAL_2]] -; -; -; CLEANUP-CPS-LABEL: define <3 x float> @_cont_ObjectRayOrigin3( -; CLEANUP-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; CLEANUP-CPS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; CLEANUP-CPS-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; CLEANUP-CPS-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; CLEANUP-CPS-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; CLEANUP-CPS-NEXT: ret <3 x float> [[VAL_2]] -; -; -; CLEANUP-CPS-LABEL: define <3 x float> @_cont_ObjectRayDirection3( -; CLEANUP-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; CLEANUP-CPS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; CLEANUP-CPS-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; CLEANUP-CPS-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; CLEANUP-CPS-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; CLEANUP-CPS-NEXT: ret <3 x float> [[VAL_2]] -; -; -; CLEANUP-CPS-LABEL: define float @_cont_RayTCurrent( -; CLEANUP-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; CLEANUP-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; CLEANUP-CPS-NEXT: ret float [[RES]] -; -; -; CLEANUP-CPS-LABEL: define void @MyRayGen( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !lgc.cps [[META36:![0-9]+]] !continuation [[META37:![0-9]+]] !continuation.state [[META22]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT20:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP1]]) -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP3]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP4]]) -; CLEANUP-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT20]], 0 -; CLEANUP-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @MyRayGen.resume.0) -; CLEANUP-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP6]], 5 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 0 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 1 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 2 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 3 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP7]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP8]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP9]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP10]], 3 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 8, {} poison, i32 poison, i64 [[TMP6]], i32 5, [30 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]), !continuation.returnedRegistercount [[META34:![0-9]+]], !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @MyRayGen.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [4 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META22]] !lgc.cps [[META36]] !continuation [[META37]] !continuation.registercount [[META34]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP12]], ptr [[TMP4]], align 4 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[TMP5]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[TMP5]], 3 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP14]], 0 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = bitcast i32 [[DOTFCA_0_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTFCA_0_EXTRACT1]], float [[TMP6]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast i32 [[DOTFCA_7_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP7]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = bitcast i32 [[DOTFCA_8_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP8]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = bitcast i32 [[DOTFCA_9_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP9]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT21:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP10]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; CLEANUP-CPS-NEXT: [[RES_1_I1:%.*]] = load i32, ptr [[TMP4]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_2_I2:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP4]], i32 0, i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_2_I3:%.*]] = load i32, ptr [[RESPTR_2_I2]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_3_I4:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP4]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[RES_3_I5:%.*]] = load i32, ptr [[RESPTR_3_I4]], align 4 -; CLEANUP-CPS-NEXT: [[VAL_0_I6:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1_I1]], i32 0 -; CLEANUP-CPS-NEXT: [[VAL_1_I7:%.*]] = insertelement <3 x i32> [[VAL_0_I6]], i32 [[RES_2_I3]], i32 1 -; CLEANUP-CPS-NEXT: [[VAL_2_I8:%.*]] = insertelement <3 x i32> [[VAL_1_I7]], i32 [[RES_3_I5]], i32 2 -; CLEANUP-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[VAL_2_I8]], i8 0 -; CLEANUP-CPS-NEXT: [[RES_1_I:%.*]] = load i32, ptr [[TMP4]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_2_I:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP4]], i32 0, i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_2_I:%.*]] = load i32, ptr [[RESPTR_2_I]], align 4 -; CLEANUP-CPS-NEXT: [[RESPTR_3_I:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP4]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[RES_3_I:%.*]] = load i32, ptr [[RESPTR_3_I]], align 4 -; CLEANUP-CPS-NEXT: [[VAL_0_I:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1_I]], i32 0 -; CLEANUP-CPS-NEXT: [[VAL_1_I:%.*]] = insertelement <3 x i32> [[VAL_0_I]], i32 [[RES_2_I]], i32 1 -; CLEANUP-CPS-NEXT: [[VAL_2_I:%.*]] = insertelement <3 x i32> [[VAL_1_I]], i32 [[RES_3_I]], i32 2 -; CLEANUP-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[VAL_2_I]], i8 1 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP11]]) -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP13]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 4098, i32 1033 }) -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 0 -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 1 -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 2 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 3 -; CLEANUP-CPS-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP15]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP16]], float [[TMP17]], float [[TMP18]], float [[TMP19]], i8 15) -; CLEANUP-CPS-NEXT: ret void -; -; -; CLEANUP-CPS-LABEL: define void @MyClosestHitShader( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META38:![0-9]+]] !lgc.cps [[META39:![0-9]+]] !continuation [[META40:![0-9]+]] !continuation.state [[META22]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP4]], 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_012_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_012_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to float -; CLEANUP-CPS-NEXT: [[HITATTRS_SROA_0_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP6]], i32 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_012_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_012_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP7]] to float -; CLEANUP-CPS-NEXT: [[HITATTRS_SROA_0_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[HITATTRS_SROA_0_0_VEC_INSERT]], float [[TMP8]], i32 1 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = fsub fast float 1.000000e+00, [[TMP9]] -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = fsub fast float [[TMP10]], [[TMP11]] -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = insertelement <4 x float> undef, float [[TMP12]], i64 0 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = insertelement <4 x float> [[TMP13]], float [[TMP9]], i64 1 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = insertelement <4 x float> [[TMP14]], float [[TMP11]], i64 2 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = insertelement <4 x float> [[TMP15]], float 1.000000e+00, i64 3 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP16]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP16]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP16]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP16]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP20:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP21]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT10:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_LOAD]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP17]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP18]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP19]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP20]], 3 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT10]], [27 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define void @MyAnyHitShader( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[HIT_ATTRS:%.*]], {} [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META39]] !lgc.cps [[META34]] !continuation [[META41:![0-9]+]] !continuation.state [[META22]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_0_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_4_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 5 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-CPS-NEXT: store i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_5_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: store float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES]](ptr [[TMP4]]) -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT388:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_0390_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT388]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_0390_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0390_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT388]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0390_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[HIT_ATTRS_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[HIT_ATTRS]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA:%.*]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_0_LOAD:%.*]] = load <3 x float>, ptr [[RES_I1_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, <3 x float> [[RES_I1_FCA_0_LOAD]], 0 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_1_LOAD:%.*]] = load <3 x float>, ptr [[RES_I1_FCA_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_0_INSERT]], <3 x float> [[RES_I1_FCA_1_LOAD]], 1 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_2_LOAD:%.*]] = load float, ptr [[RES_I1_FCA_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_1_INSERT]], float [[RES_I1_FCA_2_LOAD]], 2 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_3_LOAD:%.*]] = load i32, ptr [[RES_I1_FCA_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_2_INSERT]], i32 [[RES_I1_FCA_3_LOAD]], 3 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 2 -; CLEANUP-CPS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 3 -; CLEANUP-CPS-NEXT: [[DOTSROA_0412_0_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_0412_4_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTSROA_0412_8_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT]], i32 2 -; CLEANUP-CPS-NEXT: [[VAL_0_I8:%.*]] = insertelement <3 x float> undef, float [[DOTSROA_0412_0_VEC_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[VAL_1_I9:%.*]] = insertelement <3 x float> [[VAL_0_I8]], float [[DOTSROA_0412_4_VEC_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[VAL_2_I10:%.*]] = insertelement <3 x float> [[VAL_1_I9]], float [[DOTSROA_0412_8_VEC_EXTRACT]], i32 2 -; CLEANUP-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[VAL_2_I10]], i8 0 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_LOAD:%.*]] = load <3 x float>, ptr [[RES_I_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, <3 x float> [[RES_I_FCA_0_LOAD]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_LOAD:%.*]] = load <3 x float>, ptr [[RES_I_FCA_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], <3 x float> [[RES_I_FCA_1_LOAD]], 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_2_LOAD:%.*]] = load float, ptr [[RES_I_FCA_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], float [[RES_I_FCA_2_LOAD]], 2 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_LOAD:%.*]] = load i32, ptr [[RES_I_FCA_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_2_INSERT]], i32 [[RES_I_FCA_3_LOAD]], 3 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 2 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 3 -; CLEANUP-CPS-NEXT: [[DOTSROA_1_12_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_1_16_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTSROA_1_20_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT]], i32 2 -; CLEANUP-CPS-NEXT: [[VAL_0_I:%.*]] = insertelement <3 x float> undef, float [[DOTSROA_1_12_VEC_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[VAL_1_I:%.*]] = insertelement <3 x float> [[VAL_0_I]], float [[DOTSROA_1_16_VEC_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[VAL_2_I:%.*]] = insertelement <3 x float> [[VAL_1_I]], float [[DOTSROA_1_20_VEC_EXTRACT]], i32 2 -; CLEANUP-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[VAL_2_I]], i8 0 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_0_LOAD:%.*]] = load <3 x float>, ptr [[RES_I11_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, <3 x float> [[RES_I11_FCA_0_LOAD]], 0 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_1_LOAD:%.*]] = load <3 x float>, ptr [[RES_I11_FCA_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I11_FCA_0_INSERT]], <3 x float> [[RES_I11_FCA_1_LOAD]], 1 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_2_LOAD:%.*]] = load float, ptr [[RES_I11_FCA_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I11_FCA_1_INSERT]], float [[RES_I11_FCA_2_LOAD]], 2 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_3_LOAD:%.*]] = load i32, ptr [[RES_I11_FCA_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I11_FCA_2_INSERT]], i32 [[RES_I11_FCA_3_LOAD]], 3 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I11_FCA_3_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I11_FCA_3_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I11_FCA_3_INSERT]], 2 -; CLEANUP-CPS-NEXT: [[RES_I11_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I11_FCA_3_INSERT]], 3 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = fmul fast float [[RES_I11_FCA_3_INSERT_FCA_2_EXTRACT]], [[EXTRACT]] -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = fadd fast float [[TMP11]], [[EXTRACT1]] -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = fcmp fast ogt float [[TMP12]], 0.000000e+00 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = fcmp fast ogt float [[TMP12]], 1.000000e+00 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = fcmp fast ogt float [[TMP12]], -1.000000e+00 -; CLEANUP-CPS-NEXT: br i1 [[TMP13]], label [[TMP16:%.*]], label [[TMP39:%.*]] -; CLEANUP-CPS: 16: -; CLEANUP-CPS-NEXT: br i1 [[TMP14]], label [[TMP17:%.*]], label [[TMP28:%.*]] -; CLEANUP-CPS: 17: -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP18]]) -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP20:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP21:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP22:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP23:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP24:%.*]] = bitcast i32 [[TMP23]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0393_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP24]], i32 0 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP25:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP26:%.*]] = bitcast i32 [[TMP25]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0393_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0393_0_VEC_INSERT]], float [[TMP26]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT392:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0393_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT392]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP27]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT]], ptr [[DOTFCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_LOAD]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_LOAD]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_LOAD]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_LOAD]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_LOAD]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_LOAD:%.*]] = load float, ptr [[DOTFCA_1_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_LOAD]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_LOAD]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP19]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP20]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP21]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP22]], 3 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 28: -; CLEANUP-CPS-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP29]]) -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT26:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP30:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT26]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT35:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP31:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT35]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT44:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP32:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT44]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT53:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP33:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT53]] to i32 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT14:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP34:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT14]] to i32 -; CLEANUP-CPS-NEXT: [[TMP35:%.*]] = bitcast i32 [[TMP34]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0397_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP35]], i32 0 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT18:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP36:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT18]] to i32 -; CLEANUP-CPS-NEXT: [[TMP37:%.*]] = bitcast i32 [[TMP36]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0397_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0397_0_VEC_INSERT]], float [[TMP37]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT396:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0397_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT224:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT396]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_GEP225:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP38]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT224]], ptr [[DOTFCA_0_GEP225]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP226:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD227:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP226]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT228:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD227]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_GEP229:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_LOAD230:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP229]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT231:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT228]], <3 x float> [[DOTFCA_0_1_0_LOAD230]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_GEP232:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_LOAD233:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP232]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT234:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT231]], <3 x float> [[DOTFCA_0_1_1_LOAD233]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_GEP235:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_LOAD236:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP235]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT237:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT234]], float [[DOTFCA_0_1_2_LOAD236]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_GEP238:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_LOAD239:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP238]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT240:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT237]], i32 [[DOTFCA_0_1_3_LOAD239]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_GEP241:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_LOAD242:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP241]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT243:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT240]], <3 x float> [[DOTFCA_0_2_LOAD242]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_GEP244:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_LOAD245:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP244]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT246:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT243]], <3 x float> [[DOTFCA_0_3_LOAD245]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_GEP247:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_LOAD248:%.*]] = load float, ptr [[DOTFCA_0_4_GEP247]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT249:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT246]], float [[DOTFCA_0_4_LOAD248]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_GEP250:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_LOAD251:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP250]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT252:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT249]], i64 [[DOTFCA_0_5_LOAD251]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_GEP253:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_LOAD254:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP253]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT255:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT252]], <3 x float> [[DOTFCA_1_0_LOAD254]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_GEP256:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_LOAD257:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP256]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT258:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT255]], <3 x float> [[DOTFCA_1_1_LOAD257]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_GEP259:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_LOAD260:%.*]] = load float, ptr [[DOTFCA_1_2_GEP259]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT261:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT258]], float [[DOTFCA_1_2_LOAD260]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_GEP262:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_LOAD263:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP262]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT264:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT261]], i32 [[DOTFCA_1_3_LOAD263]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT62:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP30]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT65:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT62]], i32 [[TMP31]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT68:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT65]], i32 [[TMP32]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT71:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT68]], i32 [[TMP33]], 3 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT264]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT71]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 39: -; CLEANUP-CPS-NEXT: br i1 [[TMP15]], label [[TMP40:%.*]], label [[TMP59:%.*]] -; CLEANUP-CPS: 40: -; CLEANUP-CPS-NEXT: br i1 [[TMP14]], label [[TMP41:%.*]], label [[TMP50:%.*]] -; CLEANUP-CPS: 41: -; CLEANUP-CPS-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: call void @_cont_IgnoreHit(ptr [[TMP42]]) -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT28:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP43:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT28]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT37:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP44:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT37]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT46:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP45:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT46]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT55:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP46:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT55]] to i32 -; CLEANUP-CPS-NEXT: [[TMP47:%.*]] = bitcast i32 [[TMP6]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0401_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP47]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP48:%.*]] = bitcast i32 [[TMP7]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0401_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0401_0_VEC_INSERT]], float [[TMP48]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT400:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0401_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT265:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT400]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_GEP266:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP49]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT265]], ptr [[DOTFCA_0_GEP266]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP267:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD268:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP267]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT269:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD268]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_GEP270:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_LOAD271:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP270]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT272:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT269]], <3 x float> [[DOTFCA_0_1_0_LOAD271]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_GEP273:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_LOAD274:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP273]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT275:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT272]], <3 x float> [[DOTFCA_0_1_1_LOAD274]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_GEP276:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_LOAD277:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP276]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT278:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT275]], float [[DOTFCA_0_1_2_LOAD277]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_GEP279:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_LOAD280:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP279]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT281:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT278]], i32 [[DOTFCA_0_1_3_LOAD280]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_GEP282:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_LOAD283:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP282]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT284:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT281]], <3 x float> [[DOTFCA_0_2_LOAD283]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_GEP285:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_LOAD286:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP285]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT287:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT284]], <3 x float> [[DOTFCA_0_3_LOAD286]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_GEP288:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_LOAD289:%.*]] = load float, ptr [[DOTFCA_0_4_GEP288]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT290:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT287]], float [[DOTFCA_0_4_LOAD289]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_GEP291:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_LOAD292:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP291]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT293:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT290]], i64 [[DOTFCA_0_5_LOAD292]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_GEP294:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_LOAD295:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP294]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT296:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT293]], <3 x float> [[DOTFCA_1_0_LOAD295]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_GEP297:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_LOAD298:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP297]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT299:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT296]], <3 x float> [[DOTFCA_1_1_LOAD298]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_GEP300:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_LOAD301:%.*]] = load float, ptr [[DOTFCA_1_2_GEP300]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT302:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT299]], float [[DOTFCA_1_2_LOAD301]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_GEP303:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_LOAD304:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP303]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT305:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT302]], i32 [[DOTFCA_1_3_LOAD304]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT74:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP43]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT77:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT74]], i32 [[TMP44]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT80:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT77]], i32 [[TMP45]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT83:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT80]], i32 [[TMP46]], 3 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT305]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT83]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 50: -; CLEANUP-CPS-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: call void @_cont_IgnoreHit(ptr [[TMP51]]) -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT30:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP52:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT30]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT39:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP53:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT39]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT48:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP54:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT48]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT57:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP55:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT57]] to i32 -; CLEANUP-CPS-NEXT: [[TMP56:%.*]] = bitcast i32 [[TMP6]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0405_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP56]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP57:%.*]] = bitcast i32 [[TMP7]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0405_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0405_0_VEC_INSERT]], float [[TMP57]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT404:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0405_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT306:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT404]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_GEP307:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP58]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT306]], ptr [[DOTFCA_0_GEP307]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP308:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD309:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP308]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT310:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD309]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_GEP311:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_LOAD312:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP311]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT313:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT310]], <3 x float> [[DOTFCA_0_1_0_LOAD312]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_GEP314:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_LOAD315:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP314]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT316:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT313]], <3 x float> [[DOTFCA_0_1_1_LOAD315]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_GEP317:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_LOAD318:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP317]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT319:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT316]], float [[DOTFCA_0_1_2_LOAD318]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_GEP320:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_LOAD321:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP320]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT322:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT319]], i32 [[DOTFCA_0_1_3_LOAD321]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_GEP323:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_LOAD324:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP323]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT325:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT322]], <3 x float> [[DOTFCA_0_2_LOAD324]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_GEP326:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_LOAD327:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP326]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT328:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT325]], <3 x float> [[DOTFCA_0_3_LOAD327]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_GEP329:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_LOAD330:%.*]] = load float, ptr [[DOTFCA_0_4_GEP329]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT331:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT328]], float [[DOTFCA_0_4_LOAD330]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_GEP332:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_LOAD333:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP332]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT334:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT331]], i64 [[DOTFCA_0_5_LOAD333]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_GEP335:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_LOAD336:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP335]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT337:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT334]], <3 x float> [[DOTFCA_1_0_LOAD336]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_GEP338:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_LOAD339:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP338]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT340:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT337]], <3 x float> [[DOTFCA_1_1_LOAD339]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_GEP341:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_LOAD342:%.*]] = load float, ptr [[DOTFCA_1_2_GEP341]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT343:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT340]], float [[DOTFCA_1_2_LOAD342]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_GEP344:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_LOAD345:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP344]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT346:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT343]], i32 [[DOTFCA_1_3_LOAD345]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT86:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP52]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT89:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT86]], i32 [[TMP53]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT92:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT89]], i32 [[TMP54]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT95:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT92]], i32 [[TMP55]], 3 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT346]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT95]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 59: -; CLEANUP-CPS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT32:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP60:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT32]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT41:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP61:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT41]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT50:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP62:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT50]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT59:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP63:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT59]] to i32 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT16:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP64:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT16]] to i32 -; CLEANUP-CPS-NEXT: [[TMP65:%.*]] = bitcast i32 [[TMP64]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0409_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP65]], i32 0 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT20:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP66:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT20]] to i32 -; CLEANUP-CPS-NEXT: [[TMP67:%.*]] = bitcast i32 [[TMP66]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0409_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0409_0_VEC_INSERT]], float [[TMP67]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT408:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0409_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT347:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT408]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_GEP348:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP68]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT347]], ptr [[DOTFCA_0_GEP348]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP349:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD350:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP349]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT351:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD350]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_GEP352:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_LOAD353:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP352]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT354:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT351]], <3 x float> [[DOTFCA_0_1_0_LOAD353]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_GEP355:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_LOAD356:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP355]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT357:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT354]], <3 x float> [[DOTFCA_0_1_1_LOAD356]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_GEP358:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_LOAD359:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP358]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT360:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT357]], float [[DOTFCA_0_1_2_LOAD359]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_GEP361:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_LOAD362:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP361]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT363:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT360]], i32 [[DOTFCA_0_1_3_LOAD362]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_GEP364:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_LOAD365:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP364]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT366:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT363]], <3 x float> [[DOTFCA_0_2_LOAD365]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_GEP367:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_LOAD368:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP367]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT369:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT366]], <3 x float> [[DOTFCA_0_3_LOAD368]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_GEP370:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_LOAD371:%.*]] = load float, ptr [[DOTFCA_0_4_GEP370]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT372:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT369]], float [[DOTFCA_0_4_LOAD371]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_GEP373:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_LOAD374:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP373]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT375:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT372]], i64 [[DOTFCA_0_5_LOAD374]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_GEP376:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_LOAD377:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP376]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT378:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT375]], <3 x float> [[DOTFCA_1_0_LOAD377]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_GEP379:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_LOAD380:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP379]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT381:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT378]], <3 x float> [[DOTFCA_1_1_LOAD380]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_GEP382:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_LOAD383:%.*]] = load float, ptr [[DOTFCA_1_2_GEP382]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT384:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT381]], float [[DOTFCA_1_2_LOAD383]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_GEP385:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_LOAD386:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP385]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT387:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT384]], i32 [[DOTFCA_1_3_LOAD386]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT98:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP60]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT101:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT98]], i32 [[TMP61]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT104:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT101]], i32 [[TMP62]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT107:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT104]], i32 [[TMP63]], 3 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT387]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT107]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define void @MyIntersectionShader( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] -; CLEANUP-CPS-SAME: !lgc.rt.shaderstage [[META36]] !lgc.cps [[META42:![0-9]+]] !continuation [[META43:![0-9]+]] !continuation.stacksize [[META32:![0-9]+]] !continuation.state [[META32]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANUP-CPS-NEXT: [[RETURNADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADER_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(32) [[RETURNADDR_SPILL_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 5 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 3 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = bitcast <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]] to <3 x float> -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, <3 x float> [[TMP0]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], float [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = bitcast float [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_2_INSERT]], i32 [[TMP1]], 3 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 2 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 3 -; CLEANUP-CPS-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT]], [[SYSTEM_DATA_FCA_0_4_EXTRACT]] -; CLEANUP-CPS-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; CLEANUP-CPS: callAHit.i: -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_1_INSERT]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_3_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_3_INSERT]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_4_INSERT]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_5_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT350:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> undef, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT8:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT5]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT11:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT8]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT14:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT11]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT17:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT14]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT20:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT17]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT23:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT20]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT26:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT23]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT29:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT26]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT32:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT29]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT35:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT32]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT38:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT35]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT41:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT38]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT44:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT41]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT47:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT44]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT50:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT47]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT53:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT50]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT56:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT53]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT59:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT56]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT62:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT59]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT65:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT62]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT68:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT65]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT71:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT68]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT74:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT71]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT77:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT74]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT80:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT77]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT83:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT80]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT86:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT83]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT89:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT86]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT92:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT89]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @MyIntersectionShader.resume.0) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 3, i32 16, {} poison, i32 poison, i64 [[TMP2]], i32 5, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_3_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT350]], {} poison, [30 x i32] [[DOTFCA_29_INSERT92]]), !continuation.returnedRegistercount [[META33:![0-9]+]], !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: isEnd.i: -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP3]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0353_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP4]], i32 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0353_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0353_0_VEC_INSERT]], float [[TMP6]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT352:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0353_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT286:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT352]], 0 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast <2 x float> [[DOTFCA_0_EXTRACT286]] to <2 x i32> -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND:%.*]] = shufflevector <2 x i32> [[TMP7]], <2 x i32> poison, <3 x i32> -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND:%.*]] = select <3 x i1> , <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND]], <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]] -; CLEANUP-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP8:%.*]], label [[TMP9:%.*]] -; CLEANUP-CPS: 8: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT289:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT292:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT289]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT295:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT292]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT298:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT295]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT301:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT298]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT304:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT301]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT307:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT304]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT310:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT307]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT313:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT310]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT316:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT313]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT319:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT316]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT322:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT319]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT325:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT322]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT325]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 9: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @MyIntersectionShader.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_ANYHITTRAVERSALDATA:%.*]], [2 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META36]] !lgc.cps [[META42]] !continuation [[META43]] !continuation.registercount [[META33]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 29 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 1, 3 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP7:%.*]], label [[TMP8:%.*]] -; CLEANUP-CPS: 7: -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD_ADDR1:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADER_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD2:%.*]] = load i32, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR1]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT289:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT292:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT289]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT295:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT292]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT298:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT295]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT301:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT298]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT304:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT301]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT307:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT304]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT310:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT307]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT313:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT310]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT316:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT313]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT319:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT316]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT322:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT319]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT325:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT322]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[DOTFCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD2]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT325]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 8: -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADER_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define void @MyIntersectionShader2( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META36]] !lgc.cps [[META42]] !continuation [[META44:![0-9]+]] !continuation.stacksize [[META32]] !continuation.state [[META32]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANUP-CPS-NEXT: [[RETURNADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADER2_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(32) [[RETURNADDR_SPILL_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 5 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 3 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = bitcast <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]] to <3 x float> -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, <3 x float> [[TMP0]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], float [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = bitcast float [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_2_INSERT]], i32 [[TMP1]], 3 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 2 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 3 -; CLEANUP-CPS-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT]], [[SYSTEM_DATA_FCA_0_4_EXTRACT]] -; CLEANUP-CPS-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; CLEANUP-CPS: callAHit.i: -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_1_INSERT]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_3_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_3_INSERT]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_4_INSERT]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_5_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT350:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2:%.*]] poison, <2 x float> undef, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT8:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT5]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT11:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT8]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT14:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT11]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT17:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT14]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT20:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT17]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT23:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT20]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT26:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT23]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT29:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT26]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT32:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT29]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT35:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT32]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT38:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT35]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT41:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT38]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT44:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT41]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT47:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT44]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT50:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT47]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT53:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT50]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT56:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT53]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT59:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT56]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT62:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT59]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT65:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT62]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT68:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT65]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT71:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT68]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT74:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT71]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT77:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT74]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT80:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT77]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT83:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT80]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT86:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT83]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT89:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT86]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT92:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT89]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @MyIntersectionShader2.resume.0) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 3, i32 16, {} poison, i32 poison, i64 [[TMP2]], i32 5, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_3_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2]] [[DOTFCA_0_INSERT350]], {} poison, [30 x i32] [[DOTFCA_29_INSERT92]]), !continuation.returnedRegistercount [[META33]], !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: isEnd.i: -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP3]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0353_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP4]], i32 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0353_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0353_0_VEC_INSERT]], float [[TMP6]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT352:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTSROA_0353_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT286:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT352]], 0 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast <2 x float> [[DOTFCA_0_EXTRACT286]] to <2 x i32> -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND:%.*]] = shufflevector <2 x i32> [[TMP7]], <2 x i32> poison, <3 x i32> -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND:%.*]] = select <3 x i1> , <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND]], <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]] -; CLEANUP-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP8:%.*]], label [[TMP9:%.*]] -; CLEANUP-CPS: 8: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT289:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT292:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT289]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT295:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT292]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT298:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT295]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT301:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT298]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT304:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT301]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT307:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT304]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT310:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT307]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT313:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT310]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT316:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT313]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT319:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT316]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT322:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT319]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT325:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT322]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT325]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 9: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @MyIntersectionShader2.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_ANYHITTRAVERSALDATA:%.*]], [2 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META36]] !lgc.cps [[META42]] !continuation [[META44]] !continuation.registercount [[META33]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 29 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP6]], 1, 3 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP7:%.*]], label [[TMP8:%.*]] -; CLEANUP-CPS: 7: -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD_ADDR1:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADER2_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD2:%.*]] = load i32, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR1]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT289:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT292:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT289]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT295:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT292]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT298:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT295]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT301:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT298]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT304:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT301]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT307:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT304]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT310:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT307]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT313:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT310]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT316:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT313]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT319:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT316]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT322:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT319]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT325:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT322]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[DOTFCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD2]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT325]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 8: -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADER2_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define void @MyMissShader( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META34]] !lgc.cps [[META39]] !continuation [[META45:![0-9]+]] !continuation.state [[META22]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 0 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 1 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 2 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 3 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT9:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP4]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP6]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP7]], 3 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT9]], [27 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define i32 @_cont_GetContinuationStackAddr( -; POSTPROCESS-CPS-SAME: ) #[[ATTR0:[0-9]+]] { -; POSTPROCESS-CPS-NEXT: ret i32 0 -; -; -; POSTPROCESS-CPS-LABEL: define %struct.HitData @_cont_GetCandidateState( -; POSTPROCESS-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; POSTPROCESS-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_ANYHITTRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; POSTPROCESS-CPS-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; POSTPROCESS-CPS-LABEL: define void @_cont_SetTriangleHitAttributes( -; POSTPROCESS-CPS-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) { -; POSTPROCESS-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; POSTPROCESS-CPS-NEXT: ret void -; -; -; POSTPROCESS-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POSTPROCESS-CPS-SAME: ptr [[DATA:%.*]]) { -; POSTPROCESS-CPS-NEXT: ret i32 5 -; -; -; POSTPROCESS-CPS-LABEL: define i1 @_cont_IsEndSearch( -; POSTPROCESS-CPS-SAME: ptr [[TMP0:%.*]]) #[[ATTR0]] { -; POSTPROCESS-CPS-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-CPS-NEXT: ret i1 [[ISEND]] -; -; -; POSTPROCESS-CPS-LABEL: define <3 x i32> @_cont_DispatchRaysIndex3( -; POSTPROCESS-CPS-SAME: ptr [[DATA:%.*]]) { -; POSTPROCESS-CPS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_1:%.*]] = load i32, ptr [[RESPTR_1]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 1 -; POSTPROCESS-CPS-NEXT: [[RES_2:%.*]] = load i32, ptr [[RESPTR_2]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[DATA]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[RES_3:%.*]] = load i32, ptr [[RESPTR_3]], align 4 -; POSTPROCESS-CPS-NEXT: [[VAL_0:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1]], i32 0 -; POSTPROCESS-CPS-NEXT: [[VAL_1:%.*]] = insertelement <3 x i32> [[VAL_0]], i32 [[RES_2]], i32 1 -; POSTPROCESS-CPS-NEXT: [[VAL_2:%.*]] = insertelement <3 x i32> [[VAL_1]], i32 [[RES_3]], i32 2 -; POSTPROCESS-CPS-NEXT: ret <3 x i32> [[VAL_2]] -; -; -; POSTPROCESS-CPS-LABEL: define <3 x float> @_cont_ObjectRayOrigin3( -; POSTPROCESS-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; POSTPROCESS-CPS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 1 -; POSTPROCESS-CPS-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; POSTPROCESS-CPS-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; POSTPROCESS-CPS-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; POSTPROCESS-CPS-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; POSTPROCESS-CPS-NEXT: ret <3 x float> [[VAL_2]] -; -; -; POSTPROCESS-CPS-LABEL: define <3 x float> @_cont_ObjectRayDirection3( -; POSTPROCESS-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; POSTPROCESS-CPS-NEXT: [[RESPTR_1:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_1:%.*]] = load float, ptr [[RESPTR_1]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_2:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[RES_2:%.*]] = load float, ptr [[RESPTR_2]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_3:%.*]] = getelementptr [[STRUCT_HITDATA]], ptr [[HITDATA]], i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[RES_3:%.*]] = load float, ptr [[RESPTR_3]], align 4 -; POSTPROCESS-CPS-NEXT: [[VAL_0:%.*]] = insertelement <3 x float> undef, float [[RES_1]], i32 0 -; POSTPROCESS-CPS-NEXT: [[VAL_1:%.*]] = insertelement <3 x float> [[VAL_0]], float [[RES_2]], i32 1 -; POSTPROCESS-CPS-NEXT: [[VAL_2:%.*]] = insertelement <3 x float> [[VAL_1]], float [[RES_3]], i32 2 -; POSTPROCESS-CPS-NEXT: ret <3 x float> [[VAL_2]] -; -; -; POSTPROCESS-CPS-LABEL: define float @_cont_RayTCurrent( -; POSTPROCESS-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; POSTPROCESS-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; POSTPROCESS-CPS-NEXT: ret float [[RES]] -; -; -; POSTPROCESS-CPS-LABEL: define void @MyRayGen( -; POSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !lgc.cps [[META36:![0-9]+]] !continuation [[META37:![0-9]+]] { -; POSTPROCESS-CPS-NEXT: AllocaSpillBB: -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT20:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP3]]) -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP5]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP6]]) -; POSTPROCESS-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT20]], 0 -; POSTPROCESS-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyRayGen.resume.0) -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP8]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP12]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP11]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP9]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP10]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 4, i32 [[TMP13]], i64 [[TMP8]], i32 5, [30 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define dso_local void @MyRayGen.resume.0( -; POSTPROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [27 x i32], [4 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META22]] !lgc.cps [[META36]] !continuation [[META37]] { -; POSTPROCESS-CPS-NEXT: entryresume.0: -; POSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP3]], 0 -; POSTPROCESS-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP4]], ptr [[TMP12]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP3]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[TMP5]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[TMP5]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[TMP5]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[TMP5]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP14]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = bitcast i32 [[DOTFCA_0_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTFCA_0_EXTRACT1]], float [[TMP6]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast i32 [[DOTFCA_7_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP7]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = bitcast i32 [[DOTFCA_8_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP8]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = bitcast i32 [[DOTFCA_9_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP9]], i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [27 x i32], [4 x i32] } [[TMP3]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT21:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP10]], 0 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POSTPROCESS-CPS-NEXT: [[RES_1_I1:%.*]] = load i32, ptr [[TMP12]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_2_I2:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP12]], i32 0, i32 0, i32 1 -; POSTPROCESS-CPS-NEXT: [[RES_2_I3:%.*]] = load i32, ptr [[RESPTR_2_I2]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_3_I4:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP12]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[RES_3_I5:%.*]] = load i32, ptr [[RESPTR_3_I4]], align 4 -; POSTPROCESS-CPS-NEXT: [[VAL_0_I6:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1_I1]], i32 0 -; POSTPROCESS-CPS-NEXT: [[VAL_1_I7:%.*]] = insertelement <3 x i32> [[VAL_0_I6]], i32 [[RES_2_I3]], i32 1 -; POSTPROCESS-CPS-NEXT: [[VAL_2_I8:%.*]] = insertelement <3 x i32> [[VAL_1_I7]], i32 [[RES_3_I5]], i32 2 -; POSTPROCESS-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[VAL_2_I8]], i8 0 -; POSTPROCESS-CPS-NEXT: [[RES_1_I:%.*]] = load i32, ptr [[TMP12]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_2_I:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP12]], i32 0, i32 0, i32 1 -; POSTPROCESS-CPS-NEXT: [[RES_2_I:%.*]] = load i32, ptr [[RESPTR_2_I]], align 4 -; POSTPROCESS-CPS-NEXT: [[RESPTR_3_I:%.*]] = getelementptr [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP12]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[RES_3_I:%.*]] = load i32, ptr [[RESPTR_3_I]], align 4 -; POSTPROCESS-CPS-NEXT: [[VAL_0_I:%.*]] = insertelement <3 x i32> undef, i32 [[RES_1_I]], i32 0 -; POSTPROCESS-CPS-NEXT: [[VAL_1_I:%.*]] = insertelement <3 x i32> [[VAL_0_I]], i32 [[RES_2_I]], i32 1 -; POSTPROCESS-CPS-NEXT: [[VAL_2_I:%.*]] = insertelement <3 x i32> [[VAL_1_I]], i32 [[RES_3_I]], i32 2 -; POSTPROCESS-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[VAL_2_I]], i8 1 -; POSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP11]]) -; POSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP13]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 4098, i32 1033 }) -; POSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 0 -; POSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 1 -; POSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 2 -; POSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 3 -; POSTPROCESS-CPS-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP15]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP16]], float [[TMP17]], float [[TMP18]], float [[TMP19]], i8 15) -; POSTPROCESS-CPS-NEXT: ret void -; -; -; POSTPROCESS-CPS-LABEL: define void @MyClosestHitShader( -; POSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META38:![0-9]+]] !lgc.cps [[META39:![0-9]+]] !continuation [[META40:![0-9]+]] { -; POSTPROCESS-CPS-NEXT: AllocaSpillBB: -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: store <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] @[[_CONT_GETTRIANGLEHITATTRIBUTES:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](ptr [[SYSTEM_DATA_ALLOCA]]) -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP4]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_012_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_012_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to float -; POSTPROCESS-CPS-NEXT: [[HITATTRS_SROA_0_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP6]], i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_012_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_012_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP7]] to float -; POSTPROCESS-CPS-NEXT: [[HITATTRS_SROA_0_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[HITATTRS_SROA_0_0_VEC_INSERT]], float [[TMP8]], i32 1 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = fsub fast float 1.000000e+00, [[TMP9]] -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = fsub fast float [[TMP10]], [[TMP11]] -; POSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = insertelement <4 x float> undef, float [[TMP12]], i64 0 -; POSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = insertelement <4 x float> [[TMP13]], float [[TMP9]], i64 1 -; POSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = insertelement <4 x float> [[TMP14]], float [[TMP11]], i64 2 -; POSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = insertelement <4 x float> [[TMP15]], float 1.000000e+00, i64 3 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP16]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP16]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP16]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP16]], i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP21]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT10:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_LOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP17]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP18]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP19]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP20]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP24:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP25:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP24]], i32 [[TMP25]], i64 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT10]], [27 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define void @MyAnyHitShader( -; POSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[HIT_ATTRS:%.*]], {} [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META39]] !lgc.cps [[META34:![0-9]+]] !continuation [[META41:![0-9]+]] { -; POSTPROCESS-CPS-NEXT: AllocaSpillBB: -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: store <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_0_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_1_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_2_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_3_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_2_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_3_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_4_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-CPS-NEXT: store i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_5_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_1_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: store float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_2_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_3_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = call [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] @[[_CONT_GETTRIANGLEHITATTRIBUTES]](ptr [[TMP4]]) -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT387:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP5]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0389_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT387]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_0389_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0389_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT387]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0389_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[HIT_ATTRS_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[HIT_ATTRS]], 0 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA:%.*]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_0_LOAD:%.*]] = load <3 x float>, ptr [[RES_I1_FCA_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, <3 x float> [[RES_I1_FCA_0_LOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_1_LOAD:%.*]] = load <3 x float>, ptr [[RES_I1_FCA_1_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_0_INSERT]], <3 x float> [[RES_I1_FCA_1_LOAD]], 1 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_2_LOAD:%.*]] = load float, ptr [[RES_I1_FCA_2_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_1_INSERT]], float [[RES_I1_FCA_2_LOAD]], 2 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_3_LOAD:%.*]] = load i32, ptr [[RES_I1_FCA_3_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_2_INSERT]], i32 [[RES_I1_FCA_3_LOAD]], 3 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 1 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 2 -; POSTPROCESS-CPS-NEXT: [[RES_I1_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I1_FCA_3_INSERT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0411_0_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0411_4_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0411_8_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I1_FCA_3_INSERT_FCA_0_EXTRACT]], i32 2 -; POSTPROCESS-CPS-NEXT: [[VAL_0_I7:%.*]] = insertelement <3 x float> undef, float [[DOTSROA_0411_0_VEC_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[VAL_1_I8:%.*]] = insertelement <3 x float> [[VAL_0_I7]], float [[DOTSROA_0411_4_VEC_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[VAL_2_I9:%.*]] = insertelement <3 x float> [[VAL_1_I8]], float [[DOTSROA_0411_8_VEC_EXTRACT]], i32 2 -; POSTPROCESS-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[VAL_2_I9]], i8 0 -; POSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_LOAD:%.*]] = load <3 x float>, ptr [[RES_I_FCA_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, <3 x float> [[RES_I_FCA_0_LOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_LOAD:%.*]] = load <3 x float>, ptr [[RES_I_FCA_1_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], <3 x float> [[RES_I_FCA_1_LOAD]], 1 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_2_LOAD:%.*]] = load float, ptr [[RES_I_FCA_2_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], float [[RES_I_FCA_2_LOAD]], 2 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_LOAD:%.*]] = load i32, ptr [[RES_I_FCA_3_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_2_INSERT]], i32 [[RES_I_FCA_3_LOAD]], 3 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 1 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 2 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_1_12_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_1_16_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_1_20_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT]], i32 2 -; POSTPROCESS-CPS-NEXT: [[VAL_0_I:%.*]] = insertelement <3 x float> undef, float [[DOTSROA_1_12_VEC_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[VAL_1_I:%.*]] = insertelement <3 x float> [[VAL_0_I]], float [[DOTSROA_1_16_VEC_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[VAL_2_I:%.*]] = insertelement <3 x float> [[VAL_1_I]], float [[DOTSROA_1_20_VEC_EXTRACT]], i32 2 -; POSTPROCESS-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[VAL_2_I]], i8 0 -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_0_LOAD:%.*]] = load <3 x float>, ptr [[RES_I10_FCA_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, <3 x float> [[RES_I10_FCA_0_LOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_1_LOAD:%.*]] = load <3 x float>, ptr [[RES_I10_FCA_1_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_0_INSERT]], <3 x float> [[RES_I10_FCA_1_LOAD]], 1 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_2_LOAD:%.*]] = load float, ptr [[RES_I10_FCA_2_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_1_INSERT]], float [[RES_I10_FCA_2_LOAD]], 2 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_3_LOAD:%.*]] = load i32, ptr [[RES_I10_FCA_3_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_2_INSERT]], i32 [[RES_I10_FCA_3_LOAD]], 3 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_3_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_3_INSERT]], 1 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_3_INSERT]], 2 -; POSTPROCESS-CPS-NEXT: [[RES_I10_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I10_FCA_3_INSERT]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = fmul fast float [[RES_I10_FCA_3_INSERT_FCA_2_EXTRACT]], [[EXTRACT]] -; POSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = fadd fast float [[TMP11]], [[EXTRACT1]] -; POSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = fcmp fast ogt float [[TMP12]], 0.000000e+00 -; POSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = fcmp fast ogt float [[TMP12]], 1.000000e+00 -; POSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = fcmp fast ogt float [[TMP12]], -1.000000e+00 -; POSTPROCESS-CPS-NEXT: br i1 [[TMP13]], label [[TMP16:%.*]], label [[TMP47:%.*]] -; POSTPROCESS-CPS: 16: -; POSTPROCESS-CPS-NEXT: br i1 [[TMP14]], label [[TMP17:%.*]], label [[TMP32:%.*]] -; POSTPROCESS-CPS: 17: -; POSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP18]]) -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP22:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT15:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP23:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT15]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP24:%.*]] = bitcast i32 [[TMP23]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0392_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP24]], i32 0 -; POSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT19:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP25:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT19]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP26:%.*]] = bitcast i32 [[TMP25]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0392_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0392_0_VEC_INSERT]], float [[TMP26]], i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT391:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0392_4_VEC_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT391]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP27]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT]], ptr [[DOTFCA_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_LOAD]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_LOAD]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_LOAD]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_LOAD]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_LOAD]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_LOAD:%.*]] = load float, ptr [[DOTFCA_1_2_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_LOAD]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_LOAD]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP19]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP20]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP21]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP22]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP30:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP29:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP30]], i32 [[TMP29]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: 30: -; POSTPROCESS-CPS-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP33]]) -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT25:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP36:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT25]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT34:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP37:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT34]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT42:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP34:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT42]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT52:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP35:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT52]] to i32 -; POSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP38:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP39:%.*]] = bitcast i32 [[TMP38]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0396_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP39]], i32 0 -; POSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP40:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP41:%.*]] = bitcast i32 [[TMP40]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0396_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0396_0_VEC_INSERT]], float [[TMP41]], i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT395:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0396_4_VEC_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT223:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT395]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_GEP224:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP42]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT223]], ptr [[DOTFCA_0_GEP224]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP225:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD226:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP225]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT227:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD226]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_GEP228:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_LOAD229:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP228]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT230:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT227]], <3 x float> [[DOTFCA_0_1_0_LOAD229]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_GEP231:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_LOAD232:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP231]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT233:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT230]], <3 x float> [[DOTFCA_0_1_1_LOAD232]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_GEP234:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_LOAD235:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP234]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT236:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT233]], float [[DOTFCA_0_1_2_LOAD235]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_GEP237:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_LOAD238:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP237]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT239:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT236]], i32 [[DOTFCA_0_1_3_LOAD238]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_GEP240:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_LOAD241:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP240]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT242:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT239]], <3 x float> [[DOTFCA_0_2_LOAD241]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_GEP243:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_LOAD244:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP243]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT245:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT242]], <3 x float> [[DOTFCA_0_3_LOAD244]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_GEP246:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_LOAD247:%.*]] = load float, ptr [[DOTFCA_0_4_GEP246]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT248:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT245]], float [[DOTFCA_0_4_LOAD247]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_GEP249:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_LOAD250:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP249]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT251:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT248]], i64 [[DOTFCA_0_5_LOAD250]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_GEP252:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_LOAD253:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP252]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT254:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT251]], <3 x float> [[DOTFCA_1_0_LOAD253]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_GEP255:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_LOAD256:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP255]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT257:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT254]], <3 x float> [[DOTFCA_1_1_LOAD256]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_GEP258:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_LOAD259:%.*]] = load float, ptr [[DOTFCA_1_2_GEP258]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT260:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT257]], float [[DOTFCA_1_2_LOAD259]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_GEP261:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_LOAD262:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP261]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT263:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT260]], i32 [[DOTFCA_1_3_LOAD262]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT62:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP36]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT65:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT62]], i32 [[TMP37]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT68:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT65]], i32 [[TMP34]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT71:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT68]], i32 [[TMP35]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP45:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP43:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP45]], i32 [[TMP43]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT263]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT71]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: 43: -; POSTPROCESS-CPS-NEXT: br i1 [[TMP15]], label [[TMP48:%.*]], label [[TMP75:%.*]] -; POSTPROCESS-CPS: 44: -; POSTPROCESS-CPS-NEXT: br i1 [[TMP14]], label [[TMP49:%.*]], label [[TMP62:%.*]] -; POSTPROCESS-CPS: 45: -; POSTPROCESS-CPS-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: call void @_cont_IgnoreHit(ptr [[TMP50]]) -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT27:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP51:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT27]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT36:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP52:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT36]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT44:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP53:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT44]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT54:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP54:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT54]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP55:%.*]] = bitcast i32 [[TMP6]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0400_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP55]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP56:%.*]] = bitcast i32 [[TMP7]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0400_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0400_0_VEC_INSERT]], float [[TMP56]], i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT399:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0400_4_VEC_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT264:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT399]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_GEP265:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP57]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT264]], ptr [[DOTFCA_0_GEP265]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP266:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD267:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP266]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT268:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD267]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_GEP269:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_LOAD270:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP269]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT271:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT268]], <3 x float> [[DOTFCA_0_1_0_LOAD270]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_GEP272:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_LOAD273:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP272]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT274:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT271]], <3 x float> [[DOTFCA_0_1_1_LOAD273]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_GEP275:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_LOAD276:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP275]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT277:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT274]], float [[DOTFCA_0_1_2_LOAD276]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_GEP278:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_LOAD279:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP278]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT280:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT277]], i32 [[DOTFCA_0_1_3_LOAD279]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_GEP281:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_LOAD282:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP281]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT283:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT280]], <3 x float> [[DOTFCA_0_2_LOAD282]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_GEP284:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_LOAD285:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP284]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT286:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT283]], <3 x float> [[DOTFCA_0_3_LOAD285]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_GEP287:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_LOAD288:%.*]] = load float, ptr [[DOTFCA_0_4_GEP287]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT289:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT286]], float [[DOTFCA_0_4_LOAD288]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_GEP290:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_LOAD291:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP290]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT292:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT289]], i64 [[DOTFCA_0_5_LOAD291]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_GEP293:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_LOAD294:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP293]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT295:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT292]], <3 x float> [[DOTFCA_1_0_LOAD294]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_GEP296:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_LOAD297:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP296]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT298:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT295]], <3 x float> [[DOTFCA_1_1_LOAD297]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_GEP299:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_LOAD300:%.*]] = load float, ptr [[DOTFCA_1_2_GEP299]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT301:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT298]], float [[DOTFCA_1_2_LOAD300]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_GEP302:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_LOAD303:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP302]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT304:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT301]], i32 [[DOTFCA_1_3_LOAD303]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT74:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP51]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT77:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT74]], i32 [[TMP52]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT80:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT77]], i32 [[TMP53]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT83:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT80]], i32 [[TMP54]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP60:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP64:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP60]], i32 [[TMP64]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT304]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT83]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: 56: -; POSTPROCESS-CPS-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: call void @_cont_IgnoreHit(ptr [[TMP63]]) -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT29:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP58:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT29]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT38:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP59:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT38]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT46:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP65:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT46]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT56:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP61:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT56]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP68:%.*]] = bitcast i32 [[TMP6]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0404_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP68]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP69:%.*]] = bitcast i32 [[TMP7]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0404_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0404_0_VEC_INSERT]], float [[TMP69]], i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT403:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0404_4_VEC_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT305:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT403]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_GEP306:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP70]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT305]], ptr [[DOTFCA_0_GEP306]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP307:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD308:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP307]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT309:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD308]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_GEP310:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_LOAD311:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP310]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT312:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT309]], <3 x float> [[DOTFCA_0_1_0_LOAD311]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_GEP313:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_LOAD314:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP313]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT315:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT312]], <3 x float> [[DOTFCA_0_1_1_LOAD314]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_GEP316:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_LOAD317:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP316]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT318:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT315]], float [[DOTFCA_0_1_2_LOAD317]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_GEP319:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_LOAD320:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP319]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT321:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT318]], i32 [[DOTFCA_0_1_3_LOAD320]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_GEP322:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_LOAD323:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP322]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT324:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT321]], <3 x float> [[DOTFCA_0_2_LOAD323]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_GEP325:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_LOAD326:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP325]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT327:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT324]], <3 x float> [[DOTFCA_0_3_LOAD326]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_GEP328:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_LOAD329:%.*]] = load float, ptr [[DOTFCA_0_4_GEP328]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT330:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT327]], float [[DOTFCA_0_4_LOAD329]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_GEP331:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_LOAD332:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP331]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT333:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT330]], i64 [[DOTFCA_0_5_LOAD332]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_GEP334:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_LOAD335:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP334]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT336:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT333]], <3 x float> [[DOTFCA_1_0_LOAD335]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_GEP337:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_LOAD338:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP337]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT339:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT336]], <3 x float> [[DOTFCA_1_1_LOAD338]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_GEP340:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_LOAD341:%.*]] = load float, ptr [[DOTFCA_1_2_GEP340]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT342:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT339]], float [[DOTFCA_1_2_LOAD341]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_GEP343:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_LOAD344:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP343]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT345:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT342]], i32 [[DOTFCA_1_3_LOAD344]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT86:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP58]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT89:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT86]], i32 [[TMP59]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT92:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT89]], i32 [[TMP65]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT95:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT92]], i32 [[TMP61]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP73:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP66:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP73]], i32 [[TMP66]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT345]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT95]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: 67: -; POSTPROCESS-CPS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT31:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP72:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT31]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT40:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP74:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT40]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT48:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP76:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT48]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT58:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP71:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT58]] to i32 -; POSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT13:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP80:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT13]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP81:%.*]] = bitcast i32 [[TMP80]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0408_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP81]], i32 0 -; POSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT17:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP82:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT17]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP83:%.*]] = bitcast i32 [[TMP82]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0408_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0408_0_VEC_INSERT]], float [[TMP83]], i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT407:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0408_4_VEC_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT346:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT407]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_GEP347:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP84]], i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT346]], ptr [[DOTFCA_0_GEP347]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP348:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD349:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP348]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT350:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD349]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_GEP351:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_LOAD352:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_0_GEP351]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT353:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT350]], <3 x float> [[DOTFCA_0_1_0_LOAD352]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_GEP354:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_LOAD355:%.*]] = load <3 x float>, ptr [[DOTFCA_0_1_1_GEP354]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT356:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT353]], <3 x float> [[DOTFCA_0_1_1_LOAD355]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_GEP357:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_LOAD358:%.*]] = load float, ptr [[DOTFCA_0_1_2_GEP357]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT359:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT356]], float [[DOTFCA_0_1_2_LOAD358]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_GEP360:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_LOAD361:%.*]] = load i32, ptr [[DOTFCA_0_1_3_GEP360]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT362:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT359]], i32 [[DOTFCA_0_1_3_LOAD361]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_GEP363:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_LOAD364:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP363]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT365:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT362]], <3 x float> [[DOTFCA_0_2_LOAD364]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_GEP366:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_LOAD367:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP366]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT368:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT365]], <3 x float> [[DOTFCA_0_3_LOAD367]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_GEP369:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_LOAD370:%.*]] = load float, ptr [[DOTFCA_0_4_GEP369]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT371:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT368]], float [[DOTFCA_0_4_LOAD370]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_GEP372:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_LOAD373:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP372]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT374:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT371]], i64 [[DOTFCA_0_5_LOAD373]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_GEP375:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_LOAD376:%.*]] = load <3 x float>, ptr [[DOTFCA_1_0_GEP375]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT377:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT374]], <3 x float> [[DOTFCA_1_0_LOAD376]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_GEP378:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_LOAD379:%.*]] = load <3 x float>, ptr [[DOTFCA_1_1_GEP378]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT380:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT377]], <3 x float> [[DOTFCA_1_1_LOAD379]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_GEP381:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_LOAD382:%.*]] = load float, ptr [[DOTFCA_1_2_GEP381]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT383:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT380]], float [[DOTFCA_1_2_LOAD382]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_GEP384:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_LOAD385:%.*]] = load i32, ptr [[DOTFCA_1_3_GEP384]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT386:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT383]], i32 [[DOTFCA_1_3_LOAD385]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT98:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP72]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT101:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT98]], i32 [[TMP74]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT104:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT101]], i32 [[TMP76]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT107:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT104]], i32 [[TMP71]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP87:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP78:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP87]], i32 [[TMP78]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT386]], [2 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT107]]) -; POSTPROCESS-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define void @MyIntersectionShader( -; POSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META36]] !lgc.cps [[META42:![0-9]+]] !continuation [[META43:![0-9]+]] !continuation.stacksize [[META32:![0-9]+]] { -; POSTPROCESS-CPS-NEXT: AllocaSpillBB: -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP0]] to ptr addrspace(21) -; POSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 -; POSTPROCESS-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(21) [[TMP3]], align 4 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 3 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = bitcast <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]] to <3 x float> -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, <3 x float> [[TMP4]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], float [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_2_INSERT]], i32 [[TMP5]], 3 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 1 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 2 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 3 -; POSTPROCESS-CPS-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT]], [[SYSTEM_DATA_FCA_0_4_EXTRACT]] -; POSTPROCESS-CPS-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; POSTPROCESS-CPS: callAHit.i: -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_1_INSERT]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_3_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_3_INSERT]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_4_INSERT]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_5_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT350:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> undef, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT8:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT5]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT11:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT8]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT14:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT11]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT17:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT14]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT20:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT17]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT23:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT20]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT26:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT23]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT29:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT26]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT32:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT29]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT35:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT32]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT38:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT35]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT41:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT38]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT44:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT41]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT47:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT44]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT50:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT47]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT53:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT50]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT56:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT53]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT59:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT56]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT62:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT59]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT65:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT62]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT68:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT65]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT71:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT68]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT74:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT71]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT77:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT74]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT80:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT77]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT83:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT80]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT86:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT83]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT89:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT86]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT92:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT89]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShader.resume.0) -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP6]], i64 [[TMP7]], i32 5, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_3_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT350]], {} poison, [30 x i32] [[DOTFCA_29_INSERT92]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: isEnd.i: -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = bitcast i32 [[TMP8]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0353_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP9]], i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP10]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0353_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0353_0_VEC_INSERT]], float [[TMP11]], i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT352:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0353_4_VEC_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT286:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT352]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = bitcast <2 x float> [[DOTFCA_0_EXTRACT286]] to <2 x i32> -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND:%.*]] = shufflevector <2 x i32> [[TMP12]], <2 x i32> poison, <3 x i32> -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND:%.*]] = select <3 x i1> , <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND]], <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]] -; POSTPROCESS-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP13:%.*]], label [[TMP18:%.*]] -; POSTPROCESS-CPS: 13: -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT289:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT292:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT289]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT295:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT292]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT298:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT295]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT301:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT298]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT304:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT301]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT307:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT304]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT310:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT307]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT313:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT310]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT316:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT313]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT319:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT316]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT322:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT319]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT325:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT322]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = add i32 [[TMP14]], -8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP15]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP16]], i32 [[TMP17]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT325]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: 18: -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = add i32 [[TMP19]], -8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP20]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP22:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP21]], i32 [[TMP22]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define dso_local void @MyIntersectionShader.resume.0( -; POSTPROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_ANYHITTRAVERSALDATA:%.*]], [2 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META36]] !lgc.cps [[META42]] !continuation [[META43]] { -; POSTPROCESS-CPS-NEXT: entryresume.0: -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -8 -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP3]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP3]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 1, 3 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP8:%.*]], label [[TMP15:%.*]] -; POSTPROCESS-CPS: 8: -; POSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; POSTPROCESS-CPS-NEXT: [[RETURN_ADDR_RELOAD2:%.*]] = load i32, ptr addrspace(21) [[TMP10]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT289:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT292:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT289]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT295:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT292]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT298:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT295]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT301:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT298]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT304:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT301]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT307:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT304]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT310:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT307]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT313:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT310]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT316:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT313]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT319:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT316]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT322:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT319]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT325:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT322]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = add i32 [[TMP11]], -8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP12]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = zext i32 [[RETURN_ADDR_RELOAD2]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP13]], i32 [[TMP14]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT325]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: 15: -; POSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) -; POSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP16]], i32 0 -; POSTPROCESS-CPS-NEXT: [[RETURN_ADDR_RELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP17]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = add i32 [[TMP18]], -8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP19]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = zext i32 [[RETURN_ADDR_RELOAD]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP20]], i32 [[TMP21]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define void @MyIntersectionShader2( -; POSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [2 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META36]] !lgc.cps [[META42]] !continuation [[META44:![0-9]+]] !continuation.stacksize [[META32]] { -; POSTPROCESS-CPS-NEXT: AllocaSpillBB: -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP0]] to ptr addrspace(21) -; POSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 -; POSTPROCESS-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(21) [[TMP3]], align 4 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 3 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = bitcast <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]] to <3 x float> -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, <3 x float> [[TMP4]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], i32 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], float [[SYSTEM_DATA_ALLOCA_SROA_13_24_VEC_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT:%.*]] = extractelement <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[SYSTEM_DATA_ALLOCA_SROA_13_28_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_2_INSERT]], i32 [[TMP5]], 3 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 1 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 2 -; POSTPROCESS-CPS-NEXT: [[RES_I_FCA_3_INSERT_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_3_INSERT]], 3 -; POSTPROCESS-CPS-NEXT: [[ISNOHIT_I:%.*]] = fcmp fast uge float [[RES_I_FCA_3_INSERT_FCA_2_EXTRACT]], [[SYSTEM_DATA_FCA_0_4_EXTRACT]] -; POSTPROCESS-CPS-NEXT: br i1 [[ISNOHIT_I]], label [[ISEND_I:%.*]], label [[CALLAHIT_I:%.*]] -; POSTPROCESS-CPS: callAHit.i: -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_1_INSERT]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_3_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_3_INSERT]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_4_INSERT]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_5_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT350:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2:%.*]] poison, <2 x float> undef, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT8:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT5]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT11:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT8]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT14:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT11]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT17:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT14]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT20:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT17]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT23:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT20]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT26:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT23]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT29:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT26]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT32:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT29]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT35:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT32]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT38:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT35]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT41:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT38]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT44:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT41]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT47:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT44]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT50:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT47]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT53:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT50]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT56:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT53]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT59:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT56]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT62:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT59]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT65:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT62]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT68:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT65]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT71:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT68]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT74:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT71]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT77:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT74]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT80:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT77]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT83:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT80]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT86:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT83]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT89:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT86]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT92:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT89]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShader2.resume.0) -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP6]], i64 [[TMP7]], i32 5, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_3_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES2]] [[DOTFCA_0_INSERT350]], {} poison, [30 x i32] [[DOTFCA_29_INSERT92]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: isEnd.i: -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = bitcast i32 [[TMP8]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0353_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP9]], i32 0 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP10]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0353_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0353_0_VEC_INSERT]], float [[TMP11]], i32 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT352:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTSROA_0353_4_VEC_INSERT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT286:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT352]], 0 -; POSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = bitcast <2 x float> [[DOTFCA_0_EXTRACT286]] to <2 x i32> -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND:%.*]] = shufflevector <2 x i32> [[TMP12]], <2 x i32> poison, <3 x i32> -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND:%.*]] = select <3 x i1> , <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VEC_EXPAND]], <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]] -; POSTPROCESS-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP13:%.*]], label [[TMP18:%.*]] -; POSTPROCESS-CPS: 13: -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT289:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT292:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT289]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT295:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT292]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT298:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT295]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT301:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT298]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT304:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT301]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT307:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT304]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT310:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT307]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT313:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT310]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT316:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT313]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT319:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT316]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT322:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT319]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT325:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT322]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = add i32 [[TMP14]], -8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP15]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP16]], i32 [[TMP17]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT325]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: 18: -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_ALLOCA_SROA_0_0_VECBLEND]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[SYSTEM_DATA_FCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[SYSTEM_DATA_FCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[SYSTEM_DATA_FCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = add i32 [[TMP19]], -8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP20]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP22:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP21]], i32 [[TMP22]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define dso_local void @MyIntersectionShader2.resume.0( -; POSTPROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_ANYHITTRAVERSALDATA:%.*]], [2 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META36]] !lgc.cps [[META42]] !continuation [[META44]] { -; POSTPROCESS-CPS-NEXT: entryresume.0: -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -8 -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP3]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = extractvalue { [[STRUCT_ANYHITTRAVERSALDATA]], [2 x i32], [30 x i32] } [[TMP3]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP7]], 1, 3 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-CPS-NEXT: [[ISEND_I1:%.*]] = call i1 @opaqueIsEnd() -; POSTPROCESS-CPS-NEXT: br i1 [[ISEND_I1]], label [[TMP8:%.*]], label [[TMP15:%.*]] -; POSTPROCESS-CPS: 8: -; POSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; POSTPROCESS-CPS-NEXT: [[RETURN_ADDR_RELOAD2:%.*]] = load i32, ptr addrspace(21) [[TMP10]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT289:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT292:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT289]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT295:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT292]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT298:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT295]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT301:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT298]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT304:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT301]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT307:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT304]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT310:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT307]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT313:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT310]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT316:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT313]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT319:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT316]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT322:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT319]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT325:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT322]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = add i32 [[TMP11]], -8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP12]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = zext i32 [[RETURN_ADDR_RELOAD2]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP13]], i32 [[TMP14]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT325]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]) -; POSTPROCESS-CPS-NEXT: unreachable -; POSTPROCESS-CPS: 15: -; POSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) -; POSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP16]], i32 0 -; POSTPROCESS-CPS-NEXT: [[RETURN_ADDR_RELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP17]], align 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], 0, 0, 0, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <3 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], <3 x float> [[DOTFCA_0_1_1_EXTRACT]], 0, 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], float [[DOTFCA_0_1_2_EXTRACT]], 0, 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_2_INSERT]], i32 [[DOTFCA_0_1_3_EXTRACT]], 0, 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_3_INSERT]], <3 x float> [[DOTFCA_0_2_EXTRACT]], 0, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_EXTRACT]], 0, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_EXTRACT]], 0, 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_EXTRACT]], 0, 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], <3 x float> [[DOTFCA_1_0_EXTRACT]], 1, 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], <3 x float> [[DOTFCA_1_1_EXTRACT]], 1, 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], float [[DOTFCA_1_2_EXTRACT]], 1, 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_2_INSERT]], i32 [[DOTFCA_1_3_EXTRACT]], 1, 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = add i32 [[TMP18]], -8 -; POSTPROCESS-CPS-NEXT: store i32 [[TMP19]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = zext i32 [[RETURN_ADDR_RELOAD]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP20]], i32 [[TMP21]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_3_INSERT]], [2 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; -; -; POSTPROCESS-CPS-LABEL: define void @MyMissShader( -; POSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [27 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META34]] !lgc.cps [[META39]] !continuation [[META45:![0-9]+]] { -; POSTPROCESS-CPS-NEXT: AllocaSpillBB: -; POSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; POSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; POSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; POSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; POSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 0 -; POSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 1 -; POSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 2 -; POSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 3 -; POSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT9:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[TMP4]], 0 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[TMP5]], 1 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[TMP6]], 2 -; POSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[TMP7]], 3 -; POSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP10]], i32 [[TMP11]], i64 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT9]], [27 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; POSTPROCESS-CPS-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/paq-hit-attribute-size.ll b/llvmraytracing/test/dx/paq-hit-attribute-size.ll index e012e1c201..fe0de858d5 100644 --- a/llvmraytracing/test/dx/paq-hit-attribute-size.ll +++ b/llvmraytracing/test/dx/paq-hit-attribute-size.ll @@ -47,8 +47,8 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: ; CHECK-MAX-8-DAG: %struct.MyPayload.attr_max_8_i32s.layout_0_caller_out = type { [10 x i32] } define void @AnyHit1DWords(%struct.MyPayload* %payload, %struct.Attributes1DWords* %attrs) !pointeetys !60 { -; CHECK-MAX-1-LABEL: define %struct.AnyHitSystemData @AnyHit1DWords( -; CHECK-MAX-1-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES1DWORDS:%.*]] [[TMP1:%.*]], [1 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META18:![0-9]+]] !continuation.registercount [[META15:![0-9]+]] !continuation [[META19:![0-9]+]] { +; CHECK-MAX-1-LABEL: define void @AnyHit1DWords( +; CHECK-MAX-1-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES1DWORDS:%.*]] [[TMP1:%.*]], [1 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META18:![0-9]+]] !continuation.registercount [[META15:![0-9]+]] !continuation [[META19:![0-9]+]] { ; CHECK-MAX-1-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-1-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-1-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -104,11 +104,11 @@ define void @AnyHit1DWords(%struct.MyPayload* %payload, %struct.Attributes1DWord ; CHECK-MAX-1-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP34]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP33]]) ; CHECK-MAX-1-NEXT: [[TMP35:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-1-NEXT: [[TMP36:%.*]] = load [4 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-1-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP35]], [2 x i32] poison, [4 x i32] [[TMP36]]), !continuation.registercount [[META15]] +; CHECK-MAX-1-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP35]], [2 x i32] poison, [4 x i32] [[TMP36]]), !continuation.registercount [[META15]] ; CHECK-MAX-1-NEXT: unreachable ; -; CHECK-MAX-2-LABEL: define %struct.AnyHitSystemData @AnyHit1DWords( -; CHECK-MAX-2-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES1DWORDS:%.*]] [[TMP1:%.*]], [1 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META20:![0-9]+]] !continuation.registercount [[META18:![0-9]+]] !continuation [[META21:![0-9]+]] { +; CHECK-MAX-2-LABEL: define void @AnyHit1DWords( +; CHECK-MAX-2-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES1DWORDS:%.*]] [[TMP1:%.*]], [1 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META20:![0-9]+]] !continuation.registercount [[META18:![0-9]+]] !continuation [[META21:![0-9]+]] { ; CHECK-MAX-2-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-2-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-2-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -164,11 +164,11 @@ define void @AnyHit1DWords(%struct.MyPayload* %payload, %struct.Attributes1DWord ; CHECK-MAX-2-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP34]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP33]]) ; CHECK-MAX-2-NEXT: [[TMP35:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-2-NEXT: [[TMP36:%.*]] = load [4 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-2-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP35]], [2 x i32] poison, [4 x i32] [[TMP36]]), !continuation.registercount [[META18]] +; CHECK-MAX-2-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP35]], [2 x i32] poison, [4 x i32] [[TMP36]]), !continuation.registercount [[META18]] ; CHECK-MAX-2-NEXT: unreachable ; -; CHECK-MAX-4-LABEL: define %struct.AnyHitSystemData @AnyHit1DWords( -; CHECK-MAX-4-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES1DWORDS:%.*]] [[TMP1:%.*]], [3 x i32] [[PADDING:%.*]], [6 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META21:![0-9]+]] !continuation.registercount [[META19:![0-9]+]] !continuation [[META22:![0-9]+]] { +; CHECK-MAX-4-LABEL: define void @AnyHit1DWords( +; CHECK-MAX-4-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES1DWORDS:%.*]] [[TMP1:%.*]], [3 x i32] [[PADDING:%.*]], [6 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META21:![0-9]+]] !continuation.registercount [[META19:![0-9]+]] !continuation [[META22:![0-9]+]] { ; CHECK-MAX-4-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-4-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-4-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -225,11 +225,11 @@ define void @AnyHit1DWords(%struct.MyPayload* %payload, %struct.Attributes1DWord ; CHECK-MAX-4-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP35]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP34]]) ; CHECK-MAX-4-NEXT: [[TMP36:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-4-NEXT: [[TMP37:%.*]] = load [6 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-4-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP36]], [4 x i32] poison, [6 x i32] [[TMP37]]), !continuation.registercount [[META19]] +; CHECK-MAX-4-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP36]], [4 x i32] poison, [6 x i32] [[TMP37]]), !continuation.registercount [[META19]] ; CHECK-MAX-4-NEXT: unreachable ; -; CHECK-MAX-8-LABEL: define %struct.AnyHitSystemData @AnyHit1DWords( -; CHECK-MAX-8-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES1DWORDS:%.*]] [[TMP1:%.*]], [7 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation.registercount [[META20:![0-9]+]] !continuation [[META23:![0-9]+]] { +; CHECK-MAX-8-LABEL: define void @AnyHit1DWords( +; CHECK-MAX-8-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES1DWORDS:%.*]] [[TMP1:%.*]], [7 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation.registercount [[META20:![0-9]+]] !continuation [[META23:![0-9]+]] { ; CHECK-MAX-8-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-8-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-8-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -286,7 +286,7 @@ define void @AnyHit1DWords(%struct.MyPayload* %payload, %struct.Attributes1DWord ; CHECK-MAX-8-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP35]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP34]]) ; CHECK-MAX-8-NEXT: [[TMP36:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-8-NEXT: [[TMP37:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-8-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP36]], [8 x i32] poison, [10 x i32] [[TMP37]]), !continuation.registercount [[META20]] +; CHECK-MAX-8-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP36]], [8 x i32] poison, [10 x i32] [[TMP37]]), !continuation.registercount [[META20]] ; CHECK-MAX-8-NEXT: unreachable ; ret void @@ -297,8 +297,8 @@ define void @AnyHit2DWords(%struct.MyPayload* %payload, %struct.Attributes2DWord ; CHECK-MAX-1-SAME: ptr [[PAYLOAD:%.*]], ptr [[ATTRS:%.*]]) { ; CHECK-MAX-1-NEXT: ret void ; -; CHECK-MAX-2-LABEL: define %struct.AnyHitSystemData @AnyHit2DWords( -; CHECK-MAX-2-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES2DWORDS:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META20]] !continuation.registercount [[META18]] !continuation [[META22:![0-9]+]] { +; CHECK-MAX-2-LABEL: define void @AnyHit2DWords( +; CHECK-MAX-2-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES2DWORDS:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META20]] !continuation.registercount [[META18]] !continuation [[META22:![0-9]+]] { ; CHECK-MAX-2-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-2-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-2-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -362,11 +362,11 @@ define void @AnyHit2DWords(%struct.MyPayload* %payload, %struct.Attributes2DWord ; CHECK-MAX-2-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP40]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP39]]) ; CHECK-MAX-2-NEXT: [[TMP41:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-2-NEXT: [[TMP42:%.*]] = load [4 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-2-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP41]], [2 x i32] poison, [4 x i32] [[TMP42]]), !continuation.registercount [[META18]] +; CHECK-MAX-2-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP41]], [2 x i32] poison, [4 x i32] [[TMP42]]), !continuation.registercount [[META18]] ; CHECK-MAX-2-NEXT: unreachable ; -; CHECK-MAX-4-LABEL: define %struct.AnyHitSystemData @AnyHit2DWords( -; CHECK-MAX-4-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES2DWORDS:%.*]] [[TMP1:%.*]], [2 x i32] [[PADDING:%.*]], [6 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META21]] !continuation.registercount [[META19]] !continuation [[META23:![0-9]+]] { +; CHECK-MAX-4-LABEL: define void @AnyHit2DWords( +; CHECK-MAX-4-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES2DWORDS:%.*]] [[TMP1:%.*]], [2 x i32] [[PADDING:%.*]], [6 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META21]] !continuation.registercount [[META19]] !continuation [[META23:![0-9]+]] { ; CHECK-MAX-4-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-4-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-4-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -431,11 +431,11 @@ define void @AnyHit2DWords(%struct.MyPayload* %payload, %struct.Attributes2DWord ; CHECK-MAX-4-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP41]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP40]]) ; CHECK-MAX-4-NEXT: [[TMP42:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-4-NEXT: [[TMP43:%.*]] = load [6 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-4-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP42]], [4 x i32] poison, [6 x i32] [[TMP43]]), !continuation.registercount [[META19]] +; CHECK-MAX-4-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP42]], [4 x i32] poison, [6 x i32] [[TMP43]]), !continuation.registercount [[META19]] ; CHECK-MAX-4-NEXT: unreachable ; -; CHECK-MAX-8-LABEL: define %struct.AnyHitSystemData @AnyHit2DWords( -; CHECK-MAX-8-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES2DWORDS:%.*]] [[TMP1:%.*]], [6 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META22]] !continuation.registercount [[META20]] !continuation [[META24:![0-9]+]] { +; CHECK-MAX-8-LABEL: define void @AnyHit2DWords( +; CHECK-MAX-8-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES2DWORDS:%.*]] [[TMP1:%.*]], [6 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META22]] !continuation.registercount [[META20]] !continuation [[META24:![0-9]+]] { ; CHECK-MAX-8-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-8-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-8-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -500,7 +500,7 @@ define void @AnyHit2DWords(%struct.MyPayload* %payload, %struct.Attributes2DWord ; CHECK-MAX-8-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP41]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP40]]) ; CHECK-MAX-8-NEXT: [[TMP42:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-8-NEXT: [[TMP43:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-8-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP42]], [8 x i32] poison, [10 x i32] [[TMP43]]), !continuation.registercount [[META20]] +; CHECK-MAX-8-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP42]], [8 x i32] poison, [10 x i32] [[TMP43]]), !continuation.registercount [[META20]] ; CHECK-MAX-8-NEXT: unreachable ; ret void @@ -515,8 +515,8 @@ define void @AnyHit4DWords(%struct.MyPayload* %payload, %struct.Attributes4DWord ; CHECK-MAX-2-SAME: ptr [[PAYLOAD:%.*]], ptr [[ATTRS:%.*]]) { ; CHECK-MAX-2-NEXT: ret void ; -; CHECK-MAX-4-LABEL: define %struct.AnyHitSystemData @AnyHit4DWords( -; CHECK-MAX-4-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES4DWORDS:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [6 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META21]] !continuation.registercount [[META19]] !continuation [[META24:![0-9]+]] { +; CHECK-MAX-4-LABEL: define void @AnyHit4DWords( +; CHECK-MAX-4-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES4DWORDS:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [6 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META21]] !continuation.registercount [[META19]] !continuation [[META24:![0-9]+]] { ; CHECK-MAX-4-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-4-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-4-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -596,11 +596,11 @@ define void @AnyHit4DWords(%struct.MyPayload* %payload, %struct.Attributes4DWord ; CHECK-MAX-4-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP52]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP51]]) ; CHECK-MAX-4-NEXT: [[TMP53:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-4-NEXT: [[TMP54:%.*]] = load [6 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-4-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP53]], [4 x i32] poison, [6 x i32] [[TMP54]]), !continuation.registercount [[META19]] +; CHECK-MAX-4-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP53]], [4 x i32] poison, [6 x i32] [[TMP54]]), !continuation.registercount [[META19]] ; CHECK-MAX-4-NEXT: unreachable ; -; CHECK-MAX-8-LABEL: define %struct.AnyHitSystemData @AnyHit4DWords( -; CHECK-MAX-8-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES4DWORDS:%.*]] [[TMP1:%.*]], [4 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META22]] !continuation.registercount [[META20]] !continuation [[META25:![0-9]+]] { +; CHECK-MAX-8-LABEL: define void @AnyHit4DWords( +; CHECK-MAX-8-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES4DWORDS:%.*]] [[TMP1:%.*]], [4 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META22]] !continuation.registercount [[META20]] !continuation [[META25:![0-9]+]] { ; CHECK-MAX-8-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-8-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-8-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -680,7 +680,7 @@ define void @AnyHit4DWords(%struct.MyPayload* %payload, %struct.Attributes4DWord ; CHECK-MAX-8-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP52]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP51]]) ; CHECK-MAX-8-NEXT: [[TMP53:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-8-NEXT: [[TMP54:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-8-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP53]], [8 x i32] poison, [10 x i32] [[TMP54]]), !continuation.registercount [[META20]] +; CHECK-MAX-8-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP53]], [8 x i32] poison, [10 x i32] [[TMP54]]), !continuation.registercount [[META20]] ; CHECK-MAX-8-NEXT: unreachable ; ret void @@ -699,8 +699,8 @@ define void @AnyHit8DWords(%struct.MyPayload* %payload, %struct.Attributes8DWord ; CHECK-MAX-4-SAME: ptr [[PAYLOAD:%.*]], ptr [[ATTRS:%.*]]) { ; CHECK-MAX-4-NEXT: ret void ; -; CHECK-MAX-8-LABEL: define %struct.AnyHitSystemData @AnyHit8DWords( -; CHECK-MAX-8-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES8DWORDS:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META22]] !continuation.registercount [[META20]] !continuation [[META26:![0-9]+]] { +; CHECK-MAX-8-LABEL: define void @AnyHit8DWords( +; CHECK-MAX-8-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_ANYHITSYSTEMDATA:%.*]] [[TMP0:%.*]], [[STRUCT_ATTRIBUTES8DWORDS:%.*]] [[TMP1:%.*]], {} [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META22]] !continuation.registercount [[META20]] !continuation [[META26:![0-9]+]] { ; CHECK-MAX-8-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; CHECK-MAX-8-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 ; CHECK-MAX-8-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITSYSTEMDATA]], align 8 @@ -812,7 +812,7 @@ define void @AnyHit8DWords(%struct.MyPayload* %payload, %struct.Attributes8DWord ; CHECK-MAX-8-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP76]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP75]]) ; CHECK-MAX-8-NEXT: [[TMP77:%.*]] = load [[STRUCT_ANYHITSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-MAX-8-NEXT: [[TMP78:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-MAX-8-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP77]], [8 x i32] poison, [10 x i32] [[TMP78]]), !continuation.registercount [[META20]] +; CHECK-MAX-8-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, i32 poison, i32 poison, [[STRUCT_ANYHITSYSTEMDATA]] [[TMP77]], [8 x i32] poison, [10 x i32] [[TMP78]]), !continuation.registercount [[META20]] ; CHECK-MAX-8-NEXT: unreachable ; ret void @@ -834,13 +834,7 @@ declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types. declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) #2 ; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #3 - -; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #3 - -; Function Attrs: alwaysinline -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #3 +declare %struct.DispatchSystemData @_AmdAwaitTraversal(i32, %struct.TraversalData) #3 ; Function Attrs: alwaysinline declare !pointeetys !31 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #3 @@ -880,7 +874,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i64 4, %struct.TraversalData %trav_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i32 4, %struct.TraversalData %trav_data) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void diff --git a/llvmraytracing/test/dx/payload-caller-in-paq.ll b/llvmraytracing/test/dx/payload-caller-in-paq.ll index 9f965da17f..794a3b69f3 100644 --- a/llvmraytracing/test/dx/payload-caller-in-paq.ll +++ b/llvmraytracing/test/dx/payload-caller-in-paq.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function RayGen --version 3 -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,inline,lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,inline,lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s ; Test the special case of payload import in the caller after TraceRay. Here, we cast the ; payload storage both to the ClosestHitOut layout and the MissOut layout and import both, @@ -16,7 +16,7 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: %struct.MyPayload = type { float, i32, double } %dx.types.ResourceProperties = type { i32, i32 } %struct.DispatchSystemData = type { i32 } -%struct.TraversalData = type { %struct.SystemData, i64 } +%struct.TraversalData = type { %struct.SystemData, i32 } %struct.SystemData = type { %struct.DispatchSystemData } %struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } %struct.HitData = type { float, i32 } @@ -34,7 +34,7 @@ define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwin ; Function Attrs: nounwind define void @RayGen() #0 { ; LOWERRAYTRACINGPIPELINE-LABEL: define void @RayGen( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META23:![0-9]+]] !continuation.entry [[META13:![0-9]+]] !continuation.registercount [[META23]] !continuation [[META27:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] !continuation [[META27:![0-9]+]] !lgc.rt.shaderstage [[META23:![0-9]+]] !continuation.entry [[META13:![0-9]+]] !continuation.registercount [[META23]] { ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [7 x i32], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 @@ -52,14 +52,14 @@ define void @RayGen() #0 { ; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], 0 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR3:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[ADDR_I]], 1 +; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = call i32 @_AmdGetResumePointAddr() #[[ATTR3:[0-9]+]] +; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i32 [[ADDR_I]], 1 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_MYPAYLOAD]], ptr [[TMP4]], i32 0, i32 0 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP10]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP33]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [12 x i32], [3 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa12i32a3i32s(i64 4, i32 8, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [1 x i32] [[TMP12]]), !continuation.registercount [[META32:![0-9]+]], !waitmask [[META13]], !continuation.returnedRegistercount [[META25:![0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [12 x i32], [3 x i32] } [[TMP20]], 2 +; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [11 x i32], [3 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa11i32a3i32s(i32 4, i32 8, i32 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [1 x i32] [[TMP12]]), !waitmask [[META13]], !continuation.registercount [[META32:![0-9]+]], !continuation.returnedRegistercount [[META25:![0-9]+]] +; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [11 x i32], [3 x i32] } [[TMP17]], 2 ; LOWERRAYTRACINGPIPELINE-NEXT: store [3 x i32] [[TMP15]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = freeze [[STRUCT_MYPAYLOAD]] poison ; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_MYPAYLOAD]] [[TMP27]], ptr [[TMP4]], align 4 @@ -78,7 +78,7 @@ define void @RayGen() #0 { ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[TMP26]], i32 1 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP25]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP23]], ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [12 x i32], [3 x i32] } [[TMP20]], 0 +; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [11 x i32], [3 x i32] } [[TMP17]], 0 ; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP13]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) ; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT:%.*]] @@ -143,13 +143,7 @@ declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types. declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) #2 ; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i64, i64, %struct.TraversalData) #3 - -; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #3 - -; Function Attrs: alwaysinline -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #3 +declare %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i32, i64, %struct.TraversalData) #3 ; Function Attrs: alwaysinline declare !pointeetys !34 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #3 @@ -175,7 +169,7 @@ declare !pointeetys !43 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) declare !pointeetys !44 void @_AmdRestoreSystemDataAnyHit(%struct.AnyHitTraversalData*) #1 ; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #3 +declare i32 @_AmdGetResumePointAddr() #3 ; Function Attrs: alwaysinline define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) #3 !pointeetys !46 { @@ -187,9 +181,9 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %addr = call i64 @_AmdGetResumePointAddr() #3 - %trav_data2 = insertvalue %struct.TraversalData %trav_data, i64 %addr, 1 - %newdata = call %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i64 4, i64 -1, %struct.TraversalData %trav_data2) + %addr = call i32 @_AmdGetResumePointAddr() #3 + %trav_data2 = insertvalue %struct.TraversalData %trav_data, i32 %addr, 1 + %newdata = call %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i32 4, i64 -1, %struct.TraversalData %trav_data2) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void diff --git a/llvmraytracing/test/dx/payload-save-registers.ll b/llvmraytracing/test/dx/payload-save-registers.ll index 14aba15cc7..c937e8cf95 100644 --- a/llvmraytracing/test/dx/payload-save-registers.ll +++ b/llvmraytracing/test/dx/payload-save-registers.ll @@ -30,8 +30,8 @@ declare !pointeetys !48 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, ; Function Attrs: nounwind define void @Miss(%struct.OuterPayload* noalias nocapture %outerPayload) #0 !pointeetys !23 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @Miss( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [4 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META26:![0-9]+]] !continuation.registercount [[META24:![0-9]+]] !continuation [[META27:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-LABEL: define void @Miss( +; LOWERRAYTRACINGPIPELINE-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [4 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META26:![0-9]+]] !continuation.registercount [[META24:![0-9]+]] !continuation [[META27:![0-9]+]] { ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_OUTERPAYLOAD:%.*]], align 8 @@ -147,7 +147,7 @@ define void @Miss(%struct.OuterPayload* noalias nocapture %outerPayload) #0 !poi ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP119:%.*]] = load i32, ptr [[TMP57]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP119]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP79:%.*]] = load [1 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP125:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [4 x i32], [1 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa4i32a1i32s(i64 4, i32 8, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], [4 x i32] poison, [1 x i32] [[TMP79]]), !continuation.registercount [[META32:![0-9]+]], !continuation.returnedRegistercount [[META32]] +; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP125:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [4 x i32], [1 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa4i32a1i32s(i32 4, i32 8, i32 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], [4 x i32] poison, [1 x i32] [[TMP79]]), !continuation.registercount [[META32:![0-9]+]], !continuation.returnedRegistercount [[META32]] ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP61:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [4 x i32], [1 x i32] } [[TMP125]], 2 ; LOWERRAYTRACINGPIPELINE-NEXT: store [1 x i32] [[TMP61]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP117:%.*]] = freeze [[STRUCT_INNERPAYLOAD]] poison @@ -255,7 +255,7 @@ define void @Miss(%struct.OuterPayload* noalias nocapture %outerPayload) #0 !poi ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP94:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP95:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[TMP94]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP143:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP95]], [4 x i32] poison, [30 x i32] [[TMP143]]), !continuation.registercount [[META24]] +; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP95]], [4 x i32] poison, [30 x i32] [[TMP143]]), !continuation.registercount [[META24]] ; LOWERRAYTRACINGPIPELINE-NEXT: unreachable ; %1 = load %dx.types.Handle, %dx.types.Handle* @"\01?myAccelerationStructure@@3URaytracingAccelerationStructure@@A", align 4 @@ -277,8 +277,8 @@ define void @Miss(%struct.OuterPayload* noalias nocapture %outerPayload) #0 !poi ; Function Attrs: nounwind define void @Callable(%struct.OuterPayload* noalias %outerPayload) #0 !pointeetys !23 { -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @Callable( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [4 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0]] !lgc.rt.shaderstage [[META33:![0-9]+]] !continuation.registercount [[META24]] !continuation [[META34:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-LABEL: define void @Callable( +; LOWERRAYTRACINGPIPELINE-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [4 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0]] !lgc.rt.shaderstage [[META33:![0-9]+]] !continuation.registercount [[META24]] !continuation [[META34:![0-9]+]] { ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_OUTERPAYLOAD:%.*]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 @@ -646,7 +646,7 @@ define void @Callable(%struct.OuterPayload* noalias %outerPayload) #0 !pointeety ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP488:%.*]] = load i32, ptr [[TMP270]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP488]], ptr [[TMP269]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP272:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP274:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [4 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa4i32a30i32s(i64 2, i32 4, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], [4 x i32] poison, [30 x i32] [[TMP272]]), !continuation.registercount [[META24]], !continuation.returnedRegistercount [[META24]] +; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP274:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [4 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa4i32a30i32s(i32 2, i32 4, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], [4 x i32] poison, [30 x i32] [[TMP272]]), !continuation.registercount [[META24]], !continuation.returnedRegistercount [[META24]] ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP490:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [4 x i32], [30 x i32] } [[TMP274]], 2 ; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[TMP490]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP358:%.*]] = freeze [[STRUCT_OUTERPAYLOAD]] poison @@ -956,7 +956,7 @@ define void @Callable(%struct.OuterPayload* noalias %outerPayload) #0 !pointeety ; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP484]], ptr [[TMP482]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP382:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP486:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP382]], [4 x i32] poison, [30 x i32] [[TMP486]]), !continuation.registercount [[META24]] +; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP382]], [4 x i32] poison, [30 x i32] [[TMP486]]), !continuation.registercount [[META24]] ; LOWERRAYTRACINGPIPELINE-NEXT: unreachable ; %1 = alloca %struct.OuterPayload, align 8 @@ -1157,10 +1157,10 @@ declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types. declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) #2 ; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #3 +declare %struct.DispatchSystemData @_AmdAwaitTraversal(i32, %struct.TraversalData) #3 ; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, i64, %struct.DispatchSystemData) #3 +declare %struct.DispatchSystemData @_AmdAwaitShader(i32, i32, %struct.DispatchSystemData) #3 ; Function Attrs: alwaysinline declare !pointeetys !32 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #3 @@ -1196,7 +1196,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i64 4, %struct.TraversalData %trav_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i32 4, %struct.TraversalData %trav_data) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void @@ -1205,7 +1205,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i ; Function Attrs: alwaysinline define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #3 !pointeetys !45 { %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, i64 poison, %struct.DispatchSystemData %dis_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i32 2, i32 poison, %struct.DispatchSystemData %dis_data) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void diff --git a/llvmraytracing/test/dx/payload.ll b/llvmraytracing/test/dx/payload.ll deleted file mode 100644 index 9a487a289c..0000000000 --- a/llvmraytracing/test/dx/payload.ll +++ /dev/null @@ -1,7375 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: grep -v SKIP_GLOBAL_ADDRSPACE %s | grep -v lgc.cps.module | opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,continuations-lint,remove-types-metadata' -S --lint-abort-on-error | FileCheck -check-prefix=CLEANUP %s -; RUN: grep -v SKIP_GLOBAL_ADDRSPACE %s | grep -v lgc.cps.module | opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' \ -; RUN: -S --lint-abort-on-error | FileCheck -check-prefix=POST-PROCESS %s -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' \ -; RUN: -S --lint-abort-on-error | FileCheck -check-prefix=POST-PROCESS-GLOBAL %s -; RUN: grep -v SKIP_GLOBAL_ADDRSPACE %s | opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,continuations-lint,remove-types-metadata' -S --lint-abort-on-error | FileCheck -check-prefix=CLEANUP-CPS %s -; RUN: grep -v SKIP_GLOBAL_ADDRSPACE %s | opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' \ -; RUN: -S --lint-abort-on-error | FileCheck -check-prefix=POST-PROCESS-CPS %s -; RUN: opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' \ -; RUN: -S %s --lint-abort-on-error | FileCheck -check-prefix=POST-PROCESS-GLOBAL-CPS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i64 } -%struct.SystemData = type { %struct.DispatchSystemData, %struct.BuiltInTriangleIntersectionAttributes } -%struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } -%struct.HitData = type { float, i32 } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.RayPayload = type { [50 x i32] } -%dx.types.ResourceProperties = type { i32, i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?Scene@@3URaytracingAccelerationStructure@@A" = external constant %dx.types.Handle, align 4 -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -; Function Attrs: alwaysinline -declare i32 @_cont_GetContinuationStackAddr() #0 - -; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i64, i64, %struct.TraversalData) #0 - -; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #0 - -; Function Attrs: alwaysinline -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #0 - -define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwind !pointeetys !{%struct.DispatchSystemData poison} { - ret void -} - -define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData* %data) #0 !pointeetys !17 { - %addr = getelementptr %struct.SystemData, %struct.SystemData* %data, i32 0, i32 1 - %val = load %struct.BuiltInTriangleIntersectionAttributes, %struct.BuiltInTriangleIntersectionAttributes* %addr, align 4 - ret %struct.BuiltInTriangleIntersectionAttributes %val -} - -; Function Attrs: alwaysinline -declare !pointeetys !19 void @_cont_SetTriangleHitAttributes(%struct.SystemData*, %struct.BuiltInTriangleIntersectionAttributes) #0 - -; Function Attrs: alwaysinline -declare !pointeetys !20 i1 @_cont_IsEndSearch(%struct.TraversalData*) #0 - -; Function Attrs: nounwind memory(read) -declare !pointeetys !22 i32 @_cont_HitKind(%struct.SystemData* nocapture readnone, %struct.HitData*) #1 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !24 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) #2 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !26 void @_AmdRestoreSystemDataAnyHit(%struct.AnyHitTraversalData*) #2 - -; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #3 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !26 void @_cont_AcceptHit(%struct.AnyHitTraversalData* nocapture readnone) #2 -declare !pointeetys !28 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -; Function Attrs: alwaysinline -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) #0 !pointeetys !28 { - ret i32 5 -} - -declare i64 @_cont_GetContinuationStackGlobalMemBase() - -; Function Attrs: alwaysinline -define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) #0 !pointeetys !29 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 - %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %addr = call i64 @_AmdGetResumePointAddr() #3 - %trav_data2 = insertvalue %struct.TraversalData %trav_data, i64 %addr, 5 - %newdata = call %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i64 4, i64 -1, %struct.TraversalData %trav_data2) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -; Function Attrs: alwaysinline -define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #0 !pointeetys !30 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, %struct.DispatchSystemData %dis_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -; Function Attrs: alwaysinline -define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) #0 !pointeetys !31 { - %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) - store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 - call void @_AmdRestoreSystemDataAnyHit(%struct.AnyHitTraversalData* %data) - ret i1 true -} - -define void @main() { - %1 = load %dx.types.Handle, %dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 - %2 = load %dx.types.Handle, %dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 - %3 = alloca %struct.RayPayload, align 4 - %4 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %3, i32 0, i32 0 - %5 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %1) - %6 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %5, %dx.types.ResourceProperties { i32 16, i32 0 }) - call void @dx.op.traceRay.struct.RayPayload(i32 157, %dx.types.Handle %6, i32 16, i32 -1, i32 0, i32 1, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0x3F50624DE0000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+04, %struct.RayPayload* nonnull %3) - ret void -} - -; Function Attrs: nounwind -define void @AnyHit(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readonly %attr) #3 !pointeetys !32 { - ret void -} - -; Function Attrs: nounwind -define void @ClosestHit(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readonly %attr) #3 !pointeetys !32 { - %1 = load %dx.types.Handle, %dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 - %2 = load %dx.types.Handle, %dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 - %3 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %1) - %4 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %3, %dx.types.ResourceProperties { i32 16, i32 0 }) - call void @dx.op.traceRay.struct.RayPayload(i32 157, %dx.types.Handle %4, i32 16, i32 -1, i32 0, i32 1, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0x3F50624DE0000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+04, %struct.RayPayload* nonnull %payload) - ret void -} - -; Function Attrs: nounwind -declare !pointeetys !35 void @dx.op.traceRay.struct.RayPayload(i32, %dx.types.Handle, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, %struct.RayPayload*) #3 - -; Function Attrs: nounwind memory(none) -declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types.ResourceProperties) #2 - -; Function Attrs: nounwind memory(read) -declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) #1 - -attributes #0 = { alwaysinline } -attributes #1 = { nounwind memory(read) } -attributes #2 = { nounwind memory(none) } -attributes #3 = { nounwind } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.entryPoints = !{!3, !6, !13, !15} -!continuation.stackAddrspace = !{!36} ; SKIP_GLOBAL_ADDRSPACE -!lgc.cps.module = !{} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{null, !"", null, !4, !12} -!4 = !{!5, !9, null, null} -!5 = !{!6} -!6 = !{void ()* @main, !"main", null, null, !7} -!7 = !{i32 8, i32 7, i32 6, i32 16, i32 7, i32 8, i32 5, !8} -!8 = !{i32 0} -!9 = !{!10} -!10 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !11} -!11 = !{i32 0, i32 9} -!12 = !{i32 0, i64 65536} -!13 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @AnyHit, !"AnyHit", null, null, !14} -!14 = !{i32 8, i32 9, i32 5, !8} -!15 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @ClosestHit, !"ClosestHit", null, null, !16} -!16 = !{i32 8, i32 10, i32 5, !8} -!17 = !{%struct.SystemData poison} -!18 = !{i32 0, %struct.SystemData poison} -!19 = !{%struct.SystemData poison} -!20 = !{%struct.TraversalData poison} -!21 = !{i32 0, %struct.TraversalData poison} -!22 = !{null, %struct.SystemData poison, %struct.HitData poison} -!23 = !{i32 0, %struct.HitData poison} -!24 = !{%struct.DispatchSystemData poison} -!25 = !{i32 0, %struct.DispatchSystemData poison} -!26 = !{%struct.AnyHitTraversalData poison} -!27 = !{i32 0, %struct.AnyHitTraversalData poison} -!28 = !{%struct.DispatchSystemData poison} -!29 = !{%struct.DispatchSystemData poison} -!30 = !{%struct.DispatchSystemData poison} -!31 = !{%struct.AnyHitTraversalData poison} -!32 = !{null, %struct.RayPayload poison, %struct.BuiltInTriangleIntersectionAttributes poison} -!33 = !{i32 0, %struct.RayPayload poison} -!34 = !{i32 0, %struct.BuiltInTriangleIntersectionAttributes poison} -!35 = !{%struct.RayPayload poison} -!36 = !{i32 22} -; CLEANUP-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; CLEANUP-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; CLEANUP-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; CLEANUP-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; CLEANUP-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; CLEANUP-LABEL: define i32 @_cont_GetLocalRootIndex( -; CLEANUP-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; CLEANUP-NEXT: ret i32 5 -; -; -; CLEANUP-LABEL: define void @main( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !continuation.entry [[META19:![0-9]+]] !continuation.registercount [[META8]] !continuation [[META20:![0-9]+]] !continuation.stacksize [[META21:![0-9]+]] !continuation.state [[META8]] { -; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 108) -; CLEANUP-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MAIN_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT56:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-NEXT: [[TMP1:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; CLEANUP-NEXT: [[TMP3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP1]]) -; CLEANUP-NEXT: [[TMP4:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP3]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-NEXT: [[TMP5:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP4]]) -; CLEANUP-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT56]], 0 -; CLEANUP-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; CLEANUP-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; CLEANUP-NEXT: [[ADDR_I:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @main.resume.0) -; CLEANUP-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[ADDR_I]], 5 -; CLEANUP-NEXT: [[TMP6:%.*]] = ptrtoint ptr addrspace(32) [[PAYLOAD_SPILL_ALLOCA]] to i32 -; CLEANUP-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP6]] to ptr addrspace(32) -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP7]], align 4 -; CLEANUP-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 1 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP8]], align 4 -; CLEANUP-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 2 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP9]], align 4 -; CLEANUP-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 3 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP10]], align 4 -; CLEANUP-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 4 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP11]], align 4 -; CLEANUP-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 5 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP12]], align 4 -; CLEANUP-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 6 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP13]], align 4 -; CLEANUP-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 7 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP14]], align 4 -; CLEANUP-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 8 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP15]], align 4 -; CLEANUP-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 9 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP16]], align 4 -; CLEANUP-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 10 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP17]], align 4 -; CLEANUP-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 11 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP18]], align 4 -; CLEANUP-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 12 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP19]], align 4 -; CLEANUP-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 13 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP20]], align 4 -; CLEANUP-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 14 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP21]], align 4 -; CLEANUP-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 15 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP22]], align 4 -; CLEANUP-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 16 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP23]], align 4 -; CLEANUP-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 17 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP24]], align 4 -; CLEANUP-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 18 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP25]], align 4 -; CLEANUP-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 19 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP26]], align 4 -; CLEANUP-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 20 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP27]], align 4 -; CLEANUP-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 21 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP28]], align 4 -; CLEANUP-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 22 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP29]], align 4 -; CLEANUP-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 23 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP30]], align 4 -; CLEANUP-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 24 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP31]], align 4 -; CLEANUP-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 25 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP32]], align 4 -; CLEANUP-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP7]], i32 26 -; CLEANUP-NEXT: store i32 undef, ptr addrspace(32) [[TMP33]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP6]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; CLEANUP-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; CLEANUP-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; CLEANUP-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; CLEANUP-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; CLEANUP-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; CLEANUP-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 undef, 7 -; CLEANUP-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 undef, 8 -; CLEANUP-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 undef, 9 -; CLEANUP-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 undef, 10 -; CLEANUP-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 undef, 11 -; CLEANUP-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 undef, 12 -; CLEANUP-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 undef, 13 -; CLEANUP-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 undef, 14 -; CLEANUP-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 undef, 15 -; CLEANUP-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 undef, 16 -; CLEANUP-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 undef, 17 -; CLEANUP-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 undef, 18 -; CLEANUP-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 undef, 19 -; CLEANUP-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 undef, 20 -; CLEANUP-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 undef, 21 -; CLEANUP-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 undef, 22 -; CLEANUP-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 undef, 23 -; CLEANUP-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 undef, 24 -; CLEANUP-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 undef, 25 -; CLEANUP-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 undef, 26 -; CLEANUP-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 undef, 27 -; CLEANUP-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 undef, 28 -; CLEANUP-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 undef, 29 -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 4, i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META17:![0-9]+]], !waitmask [[META19]], !continuation.returnedRegistercount [[META17]] -; CLEANUP-NEXT: unreachable -; -; -; CLEANUP-LABEL: define dso_local void @main.resume.0( -; CLEANUP-SAME: i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META8]] !continuation.registercount [[META17]] !continuation [[META20]] { -; CLEANUP-NEXT: entryresume.0: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 108) -; CLEANUP-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MAIN_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: [[TMP3:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 2 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 1 -; CLEANUP-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 2 -; CLEANUP-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 3 -; CLEANUP-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 4 -; CLEANUP-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 5 -; CLEANUP-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 6 -; CLEANUP-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 7 -; CLEANUP-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 8 -; CLEANUP-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 9 -; CLEANUP-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 10 -; CLEANUP-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 11 -; CLEANUP-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 12 -; CLEANUP-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 13 -; CLEANUP-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 14 -; CLEANUP-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 15 -; CLEANUP-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 16 -; CLEANUP-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 17 -; CLEANUP-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 18 -; CLEANUP-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 19 -; CLEANUP-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 20 -; CLEANUP-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 21 -; CLEANUP-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 22 -; CLEANUP-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 23 -; CLEANUP-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 24 -; CLEANUP-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 25 -; CLEANUP-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 26 -; CLEANUP-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 27 -; CLEANUP-NEXT: [[TMP23:%.*]] = extractvalue [30 x i32] [[TMP3]], 28 -; CLEANUP-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 29 -; CLEANUP-NEXT: [[TMP4:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; CLEANUP-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 0 -; CLEANUP-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 1 -; CLEANUP-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 2 -; CLEANUP-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 3 -; CLEANUP-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 4 -; CLEANUP-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 5 -; CLEANUP-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 6 -; CLEANUP-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 7 -; CLEANUP-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 8 -; CLEANUP-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 9 -; CLEANUP-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 10 -; CLEANUP-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 11 -; CLEANUP-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 12 -; CLEANUP-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 13 -; CLEANUP-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 14 -; CLEANUP-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 15 -; CLEANUP-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 16 -; CLEANUP-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 17 -; CLEANUP-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 18 -; CLEANUP-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 19 -; CLEANUP-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 20 -; CLEANUP-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 21 -; CLEANUP-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 22 -; CLEANUP-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 23 -; CLEANUP-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 24 -; CLEANUP-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 25 -; CLEANUP-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 26 -; CLEANUP-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 27 -; CLEANUP-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 28 -; CLEANUP-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 29 -; CLEANUP-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 30 -; CLEANUP-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 31 -; CLEANUP-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 32 -; CLEANUP-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 33 -; CLEANUP-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 34 -; CLEANUP-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 35 -; CLEANUP-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 36 -; CLEANUP-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 37 -; CLEANUP-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 38 -; CLEANUP-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 39 -; CLEANUP-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 40 -; CLEANUP-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 41 -; CLEANUP-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 42 -; CLEANUP-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 43 -; CLEANUP-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 44 -; CLEANUP-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 45 -; CLEANUP-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 46 -; CLEANUP-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 47 -; CLEANUP-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 48 -; CLEANUP-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 49 -; CLEANUP-NEXT: [[TMP2:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(32) [[TMP2]], align 4 -; CLEANUP-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 1 -; CLEANUP-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(32) [[TMP27]], align 4 -; CLEANUP-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 2 -; CLEANUP-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(32) [[TMP29]], align 4 -; CLEANUP-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 3 -; CLEANUP-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(32) [[TMP31]], align 4 -; CLEANUP-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 4 -; CLEANUP-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(32) [[TMP33]], align 4 -; CLEANUP-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 5 -; CLEANUP-NEXT: [[TMP16:%.*]] = load i32, ptr addrspace(32) [[TMP35]], align 4 -; CLEANUP-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 6 -; CLEANUP-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(32) [[TMP37]], align 4 -; CLEANUP-NEXT: [[TMP39:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 7 -; CLEANUP-NEXT: [[TMP20:%.*]] = load i32, ptr addrspace(32) [[TMP39]], align 4 -; CLEANUP-NEXT: [[TMP41:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 8 -; CLEANUP-NEXT: [[TMP22:%.*]] = load i32, ptr addrspace(32) [[TMP41]], align 4 -; CLEANUP-NEXT: [[TMP43:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 9 -; CLEANUP-NEXT: [[TMP24:%.*]] = load i32, ptr addrspace(32) [[TMP43]], align 4 -; CLEANUP-NEXT: [[TMP45:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 10 -; CLEANUP-NEXT: [[TMP26:%.*]] = load i32, ptr addrspace(32) [[TMP45]], align 4 -; CLEANUP-NEXT: [[TMP47:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 11 -; CLEANUP-NEXT: [[TMP28:%.*]] = load i32, ptr addrspace(32) [[TMP47]], align 4 -; CLEANUP-NEXT: [[TMP49:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 12 -; CLEANUP-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(32) [[TMP49]], align 4 -; CLEANUP-NEXT: [[TMP51:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 13 -; CLEANUP-NEXT: [[TMP32:%.*]] = load i32, ptr addrspace(32) [[TMP51]], align 4 -; CLEANUP-NEXT: [[TMP53:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 14 -; CLEANUP-NEXT: [[TMP34:%.*]] = load i32, ptr addrspace(32) [[TMP53]], align 4 -; CLEANUP-NEXT: [[TMP55:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 15 -; CLEANUP-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(32) [[TMP55]], align 4 -; CLEANUP-NEXT: [[TMP57:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 16 -; CLEANUP-NEXT: [[TMP38:%.*]] = load i32, ptr addrspace(32) [[TMP57]], align 4 -; CLEANUP-NEXT: [[TMP59:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 17 -; CLEANUP-NEXT: [[TMP40:%.*]] = load i32, ptr addrspace(32) [[TMP59]], align 4 -; CLEANUP-NEXT: [[TMP61:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 18 -; CLEANUP-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(32) [[TMP61]], align 4 -; CLEANUP-NEXT: [[TMP63:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 19 -; CLEANUP-NEXT: [[TMP44:%.*]] = load i32, ptr addrspace(32) [[TMP63]], align 4 -; CLEANUP-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 20 -; CLEANUP-NEXT: [[TMP46:%.*]] = load i32, ptr addrspace(32) [[TMP65]], align 4 -; CLEANUP-NEXT: [[TMP67:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 21 -; CLEANUP-NEXT: [[TMP48:%.*]] = load i32, ptr addrspace(32) [[TMP67]], align 4 -; CLEANUP-NEXT: [[TMP69:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 22 -; CLEANUP-NEXT: [[TMP50:%.*]] = load i32, ptr addrspace(32) [[TMP69]], align 4 -; CLEANUP-NEXT: [[TMP71:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 23 -; CLEANUP-NEXT: [[TMP52:%.*]] = load i32, ptr addrspace(32) [[TMP71]], align 4 -; CLEANUP-NEXT: [[TMP73:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 24 -; CLEANUP-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(32) [[TMP73]], align 4 -; CLEANUP-NEXT: [[TMP75:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 25 -; CLEANUP-NEXT: [[TMP56:%.*]] = load i32, ptr addrspace(32) [[TMP75]], align 4 -; CLEANUP-NEXT: [[TMP77:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 26 -; CLEANUP-NEXT: [[TMP62:%.*]] = load i32, ptr addrspace(32) [[TMP77]], align 4 -; CLEANUP-NEXT: [[TMP60:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP58:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT57:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP58]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-NEXT: call void @lgc.cps.free(i32 108) -; CLEANUP-NEXT: ret void -; -; -; CLEANUP-LABEL: define void @AnyHit( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], [6 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation.registercount [[META17]] !continuation [[META23:![0-9]+]] !continuation.state [[META8]] { -; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; CLEANUP-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; CLEANUP-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; CLEANUP-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; CLEANUP-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; CLEANUP-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; CLEANUP-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; CLEANUP-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; CLEANUP-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; CLEANUP-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; CLEANUP-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; CLEANUP-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; CLEANUP-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; CLEANUP-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; CLEANUP-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; CLEANUP-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; CLEANUP-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; CLEANUP-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; CLEANUP-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; CLEANUP-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; CLEANUP-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; CLEANUP-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; CLEANUP-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; CLEANUP-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; CLEANUP-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; CLEANUP-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; CLEANUP-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; CLEANUP-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; CLEANUP-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; CLEANUP-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; CLEANUP-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 0, 0 -; CLEANUP-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-NEXT: store <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 1, 0 -; CLEANUP-NEXT: [[DOTFCA_0_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; CLEANUP-NEXT: store <2 x float> [[DOTFCA_0_0_1_0_EXTRACT]], ptr [[DOTFCA_0_0_1_0_GEP]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; CLEANUP-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-NEXT: store float [[DOTFCA_0_1_0_EXTRACT]], ptr [[DOTFCA_0_1_0_GEP]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 1 -; CLEANUP-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-NEXT: store i32 [[DOTFCA_0_1_1_EXTRACT]], ptr [[DOTFCA_0_1_1_GEP]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 2 -; CLEANUP-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-NEXT: store <3 x float> [[DOTFCA_0_2_EXTRACT]], ptr [[DOTFCA_0_2_GEP]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 3 -; CLEANUP-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-NEXT: store <3 x float> [[DOTFCA_0_3_EXTRACT]], ptr [[DOTFCA_0_3_GEP]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 4 -; CLEANUP-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-NEXT: store float [[DOTFCA_0_4_EXTRACT]], ptr [[DOTFCA_0_4_GEP]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 5 -; CLEANUP-NEXT: [[DOTFCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-NEXT: store i64 [[DOTFCA_0_5_EXTRACT]], ptr [[DOTFCA_0_5_GEP]], align 4 -; CLEANUP-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 0 -; CLEANUP-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-NEXT: store float [[DOTFCA_1_0_EXTRACT]], ptr [[DOTFCA_1_0_GEP]], align 4 -; CLEANUP-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 1 -; CLEANUP-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-NEXT: store i32 [[DOTFCA_1_1_EXTRACT]], ptr [[DOTFCA_1_1_GEP]], align 4 -; CLEANUP-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-NEXT: [[TMP3:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP4:%.*]] = load i32, ptr addrspace(32) [[TMP3]], align 4 -; CLEANUP-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 1 -; CLEANUP-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(32) [[TMP28]], align 4 -; CLEANUP-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 2 -; CLEANUP-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(32) [[TMP30]], align 4 -; CLEANUP-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 3 -; CLEANUP-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(32) [[TMP32]], align 4 -; CLEANUP-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 4 -; CLEANUP-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(32) [[TMP34]], align 4 -; CLEANUP-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 5 -; CLEANUP-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(32) [[TMP36]], align 4 -; CLEANUP-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 6 -; CLEANUP-NEXT: [[TMP16:%.*]] = load i32, ptr addrspace(32) [[TMP38]], align 4 -; CLEANUP-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 7 -; CLEANUP-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(32) [[TMP40]], align 4 -; CLEANUP-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 8 -; CLEANUP-NEXT: [[TMP20:%.*]] = load i32, ptr addrspace(32) [[TMP42]], align 4 -; CLEANUP-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 9 -; CLEANUP-NEXT: [[TMP22:%.*]] = load i32, ptr addrspace(32) [[TMP44]], align 4 -; CLEANUP-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 10 -; CLEANUP-NEXT: [[TMP24:%.*]] = load i32, ptr addrspace(32) [[TMP46]], align 4 -; CLEANUP-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 11 -; CLEANUP-NEXT: [[TMP26:%.*]] = load i32, ptr addrspace(32) [[TMP48]], align 4 -; CLEANUP-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 12 -; CLEANUP-NEXT: [[TMP29:%.*]] = load i32, ptr addrspace(32) [[TMP50]], align 4 -; CLEANUP-NEXT: [[TMP52:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 13 -; CLEANUP-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(32) [[TMP52]], align 4 -; CLEANUP-NEXT: [[TMP54:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 14 -; CLEANUP-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(32) [[TMP54]], align 4 -; CLEANUP-NEXT: [[TMP56:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 15 -; CLEANUP-NEXT: [[TMP35:%.*]] = load i32, ptr addrspace(32) [[TMP56]], align 4 -; CLEANUP-NEXT: [[TMP58:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 16 -; CLEANUP-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(32) [[TMP58]], align 4 -; CLEANUP-NEXT: [[TMP60:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 17 -; CLEANUP-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(32) [[TMP60]], align 4 -; CLEANUP-NEXT: [[TMP62:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 18 -; CLEANUP-NEXT: [[TMP41:%.*]] = load i32, ptr addrspace(32) [[TMP62]], align 4 -; CLEANUP-NEXT: [[TMP64:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 19 -; CLEANUP-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(32) [[TMP64]], align 4 -; CLEANUP-NEXT: [[TMP66:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 20 -; CLEANUP-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(32) [[TMP66]], align 4 -; CLEANUP-NEXT: [[TMP68:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 21 -; CLEANUP-NEXT: [[TMP47:%.*]] = load i32, ptr addrspace(32) [[TMP68]], align 4 -; CLEANUP-NEXT: [[TMP70:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 22 -; CLEANUP-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(32) [[TMP70]], align 4 -; CLEANUP-NEXT: [[TMP72:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 23 -; CLEANUP-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(32) [[TMP72]], align 4 -; CLEANUP-NEXT: [[TMP74:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 24 -; CLEANUP-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(32) [[TMP74]], align 4 -; CLEANUP-NEXT: [[TMP76:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 25 -; CLEANUP-NEXT: [[TMP55:%.*]] = load i32, ptr addrspace(32) [[TMP76]], align 4 -; CLEANUP-NEXT: [[TMP78:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP3]], i32 26 -; CLEANUP-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(32) [[TMP78]], align 4 -; CLEANUP-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP82]], i32 0, i32 1 -; CLEANUP-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; CLEANUP-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; CLEANUP-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; CLEANUP-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; CLEANUP-NEXT: [[DOTSROA_035_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; CLEANUP-NEXT: [[TMP81:%.*]] = bitcast float [[DOTSROA_035_0_VEC_EXTRACT]] to i32 -; CLEANUP-NEXT: [[DOTSROA_035_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; CLEANUP-NEXT: [[TMP83:%.*]] = bitcast float [[DOTSROA_035_4_VEC_EXTRACT]] to i32 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; CLEANUP-NEXT: [[TMP85:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-NEXT: store i32 [[TMP4]], ptr addrspace(32) [[TMP85]], align 4 -; CLEANUP-NEXT: [[TMP110:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 1 -; CLEANUP-NEXT: store i32 [[TMP6]], ptr addrspace(32) [[TMP110]], align 4 -; CLEANUP-NEXT: [[TMP111:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 2 -; CLEANUP-NEXT: store i32 [[TMP8]], ptr addrspace(32) [[TMP111]], align 4 -; CLEANUP-NEXT: [[TMP86:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 3 -; CLEANUP-NEXT: store i32 [[TMP10]], ptr addrspace(32) [[TMP86]], align 4 -; CLEANUP-NEXT: [[TMP87:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 4 -; CLEANUP-NEXT: store i32 [[TMP12]], ptr addrspace(32) [[TMP87]], align 4 -; CLEANUP-NEXT: [[TMP88:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 5 -; CLEANUP-NEXT: store i32 [[TMP14]], ptr addrspace(32) [[TMP88]], align 4 -; CLEANUP-NEXT: [[TMP89:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 6 -; CLEANUP-NEXT: store i32 [[TMP16]], ptr addrspace(32) [[TMP89]], align 4 -; CLEANUP-NEXT: [[TMP90:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 7 -; CLEANUP-NEXT: store i32 [[TMP18]], ptr addrspace(32) [[TMP90]], align 4 -; CLEANUP-NEXT: [[TMP91:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 8 -; CLEANUP-NEXT: store i32 [[TMP20]], ptr addrspace(32) [[TMP91]], align 4 -; CLEANUP-NEXT: [[TMP92:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 9 -; CLEANUP-NEXT: store i32 [[TMP22]], ptr addrspace(32) [[TMP92]], align 4 -; CLEANUP-NEXT: [[TMP93:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 10 -; CLEANUP-NEXT: store i32 [[TMP24]], ptr addrspace(32) [[TMP93]], align 4 -; CLEANUP-NEXT: [[TMP94:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 11 -; CLEANUP-NEXT: store i32 [[TMP26]], ptr addrspace(32) [[TMP94]], align 4 -; CLEANUP-NEXT: [[TMP95:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 12 -; CLEANUP-NEXT: store i32 [[TMP29]], ptr addrspace(32) [[TMP95]], align 4 -; CLEANUP-NEXT: [[TMP96:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 13 -; CLEANUP-NEXT: store i32 [[TMP31]], ptr addrspace(32) [[TMP96]], align 4 -; CLEANUP-NEXT: [[TMP97:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 14 -; CLEANUP-NEXT: store i32 [[TMP33]], ptr addrspace(32) [[TMP97]], align 4 -; CLEANUP-NEXT: [[TMP98:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 15 -; CLEANUP-NEXT: store i32 [[TMP35]], ptr addrspace(32) [[TMP98]], align 4 -; CLEANUP-NEXT: [[TMP99:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 16 -; CLEANUP-NEXT: store i32 [[TMP37]], ptr addrspace(32) [[TMP99]], align 4 -; CLEANUP-NEXT: [[TMP100:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 17 -; CLEANUP-NEXT: store i32 [[TMP39]], ptr addrspace(32) [[TMP100]], align 4 -; CLEANUP-NEXT: [[TMP101:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 18 -; CLEANUP-NEXT: store i32 [[TMP41]], ptr addrspace(32) [[TMP101]], align 4 -; CLEANUP-NEXT: [[TMP102:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 19 -; CLEANUP-NEXT: store i32 [[TMP43]], ptr addrspace(32) [[TMP102]], align 4 -; CLEANUP-NEXT: [[TMP103:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 20 -; CLEANUP-NEXT: store i32 [[TMP45]], ptr addrspace(32) [[TMP103]], align 4 -; CLEANUP-NEXT: [[TMP104:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 21 -; CLEANUP-NEXT: store i32 [[TMP47]], ptr addrspace(32) [[TMP104]], align 4 -; CLEANUP-NEXT: [[TMP105:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 22 -; CLEANUP-NEXT: store i32 [[TMP49]], ptr addrspace(32) [[TMP105]], align 4 -; CLEANUP-NEXT: [[TMP106:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 23 -; CLEANUP-NEXT: store i32 [[TMP51]], ptr addrspace(32) [[TMP106]], align 4 -; CLEANUP-NEXT: [[TMP107:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 24 -; CLEANUP-NEXT: store i32 [[TMP53]], ptr addrspace(32) [[TMP107]], align 4 -; CLEANUP-NEXT: [[TMP108:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 25 -; CLEANUP-NEXT: store i32 [[TMP55]], ptr addrspace(32) [[TMP108]], align 4 -; CLEANUP-NEXT: [[TMP109:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP85]], i32 26 -; CLEANUP-NEXT: store i32 [[TMP57]], ptr addrspace(32) [[TMP109]], align 4 -; CLEANUP-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; CLEANUP-NEXT: [[TMP112:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-NEXT: [[TMP113:%.*]] = bitcast i32 [[TMP112]] to float -; CLEANUP-NEXT: [[DOTSROA_037_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP113]], i32 0 -; CLEANUP-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; CLEANUP-NEXT: [[TMP114:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-NEXT: [[TMP115:%.*]] = bitcast i32 [[TMP114]] to float -; CLEANUP-NEXT: [[DOTSROA_037_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_037_0_VEC_INSERT]], float [[TMP115]], i32 1 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT36:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_037_4_VEC_INSERT]], 0 -; CLEANUP-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP116]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT36]]) -; CLEANUP-NEXT: [[DOTFCA_0_0_0_0_GEP25:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP25]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; CLEANUP-NEXT: [[DOTFCA_0_0_1_0_GEP26:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; CLEANUP-NEXT: [[DOTFCA_0_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_0_1_0_GEP26]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_0_1_0_LOAD]], 0, 0, 1, 0 -; CLEANUP-NEXT: [[DOTFCA_0_1_0_GEP27:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_0_GEP27]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_1_0_INSERT]], float [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; CLEANUP-NEXT: [[DOTFCA_0_1_1_GEP28:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_1_GEP28]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], i32 [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; CLEANUP-NEXT: [[DOTFCA_0_2_GEP29:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP29]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; CLEANUP-NEXT: [[DOTFCA_0_3_GEP30:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP30]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; CLEANUP-NEXT: [[DOTFCA_0_4_GEP31:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP31]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; CLEANUP-NEXT: [[DOTFCA_0_5_GEP32:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-NEXT: [[DOTFCA_0_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP32]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_LOAD]], 0, 5 -; CLEANUP-NEXT: [[DOTFCA_1_0_GEP33:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP33]], align 4 -; CLEANUP-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; CLEANUP-NEXT: [[DOTFCA_1_1_GEP34:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP34]], align 4 -; CLEANUP-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META17]] -; CLEANUP-NEXT: unreachable -; -; -; CLEANUP-LABEL: define void @ClosestHit( -; CLEANUP-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [21 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META24:![0-9]+]] !continuation.registercount [[META17]] !continuation [[META25:![0-9]+]] !continuation.stacksize [[META26:![0-9]+]] !continuation.state [[META27:![0-9]+]] { -; CLEANUP-NEXT: AllocaSpillBB: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 120) -; CLEANUP-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: [[RETURNADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CLEANUP-NEXT: store i64 [[RETURNADDR]], ptr addrspace(32) [[RETURNADDR_SPILL_ADDR]], align 4 -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT_SPILL_ADDR:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CLEANUP-NEXT: store i32 [[PAYLOAD_FCA_0_EXTRACT]], ptr addrspace(32) [[PAYLOAD_FCA_0_EXTRACT_SPILL_ADDR]], align 4 -; CLEANUP-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; CLEANUP-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; CLEANUP-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; CLEANUP-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; CLEANUP-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; CLEANUP-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; CLEANUP-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; CLEANUP-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; CLEANUP-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; CLEANUP-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; CLEANUP-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; CLEANUP-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; CLEANUP-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; CLEANUP-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; CLEANUP-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; CLEANUP-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; CLEANUP-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; CLEANUP-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; CLEANUP-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; CLEANUP-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; CLEANUP-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; CLEANUP-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; CLEANUP-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; CLEANUP-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; CLEANUP-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; CLEANUP-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; CLEANUP-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; CLEANUP-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; CLEANUP-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; CLEANUP-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; CLEANUP-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 1, 0 -; CLEANUP-NEXT: [[TMP1:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(32) [[TMP1]], align 4 -; CLEANUP-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 1 -; CLEANUP-NEXT: [[TMP4:%.*]] = load i32, ptr addrspace(32) [[TMP26]], align 4 -; CLEANUP-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 2 -; CLEANUP-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(32) [[TMP28]], align 4 -; CLEANUP-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 3 -; CLEANUP-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(32) [[TMP30]], align 4 -; CLEANUP-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 4 -; CLEANUP-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(32) [[TMP32]], align 4 -; CLEANUP-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 5 -; CLEANUP-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(32) [[TMP34]], align 4 -; CLEANUP-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 6 -; CLEANUP-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(32) [[TMP36]], align 4 -; CLEANUP-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 7 -; CLEANUP-NEXT: [[TMP16:%.*]] = load i32, ptr addrspace(32) [[TMP38]], align 4 -; CLEANUP-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 8 -; CLEANUP-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(32) [[TMP40]], align 4 -; CLEANUP-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 9 -; CLEANUP-NEXT: [[TMP20:%.*]] = load i32, ptr addrspace(32) [[TMP42]], align 4 -; CLEANUP-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 10 -; CLEANUP-NEXT: [[TMP22:%.*]] = load i32, ptr addrspace(32) [[TMP44]], align 4 -; CLEANUP-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 11 -; CLEANUP-NEXT: [[TMP24:%.*]] = load i32, ptr addrspace(32) [[TMP46]], align 4 -; CLEANUP-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 12 -; CLEANUP-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(32) [[TMP48]], align 4 -; CLEANUP-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 13 -; CLEANUP-NEXT: [[TMP29:%.*]] = load i32, ptr addrspace(32) [[TMP50]], align 4 -; CLEANUP-NEXT: [[TMP52:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 14 -; CLEANUP-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(32) [[TMP52]], align 4 -; CLEANUP-NEXT: [[TMP54:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 15 -; CLEANUP-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(32) [[TMP54]], align 4 -; CLEANUP-NEXT: [[TMP56:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 16 -; CLEANUP-NEXT: [[TMP35:%.*]] = load i32, ptr addrspace(32) [[TMP56]], align 4 -; CLEANUP-NEXT: [[TMP58:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 17 -; CLEANUP-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(32) [[TMP58]], align 4 -; CLEANUP-NEXT: [[TMP60:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 18 -; CLEANUP-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(32) [[TMP60]], align 4 -; CLEANUP-NEXT: [[TMP62:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 19 -; CLEANUP-NEXT: [[TMP41:%.*]] = load i32, ptr addrspace(32) [[TMP62]], align 4 -; CLEANUP-NEXT: [[TMP64:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 20 -; CLEANUP-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(32) [[TMP64]], align 4 -; CLEANUP-NEXT: [[TMP66:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 21 -; CLEANUP-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(32) [[TMP66]], align 4 -; CLEANUP-NEXT: [[TMP68:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 22 -; CLEANUP-NEXT: [[TMP47:%.*]] = load i32, ptr addrspace(32) [[TMP68]], align 4 -; CLEANUP-NEXT: [[TMP70:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 23 -; CLEANUP-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(32) [[TMP70]], align 4 -; CLEANUP-NEXT: [[TMP72:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 24 -; CLEANUP-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(32) [[TMP72]], align 4 -; CLEANUP-NEXT: [[TMP74:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 25 -; CLEANUP-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(32) [[TMP74]], align 4 -; CLEANUP-NEXT: [[TMP76:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP1]], i32 26 -; CLEANUP-NEXT: [[TMP55:%.*]] = load i32, ptr addrspace(32) [[TMP76]], align 4 -; CLEANUP-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTFCA_1_0_EXTRACT]], 0 -; CLEANUP-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; CLEANUP-NEXT: [[DOTSROA_0256_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; CLEANUP-NEXT: [[TMP57:%.*]] = bitcast float [[DOTSROA_0256_0_VEC_EXTRACT]] to i32 -; CLEANUP-NEXT: [[DOTSROA_0256_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; CLEANUP-NEXT: [[TMP63:%.*]] = bitcast float [[DOTSROA_0256_4_VEC_EXTRACT]] to i32 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: [[TMP59:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-NEXT: [[TMP65:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; CLEANUP-NEXT: [[TMP67:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP59]]) -; CLEANUP-NEXT: [[TMP69:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP67]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-NEXT: [[TMP61:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP69]]) -; CLEANUP-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; CLEANUP-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; CLEANUP-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; CLEANUP-NEXT: [[ADDR_I1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @ClosestHit.resume.0) -; CLEANUP-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[ADDR_I1]], 5 -; CLEANUP-NEXT: [[TMP88:%.*]] = ptrtoint ptr addrspace(32) [[PAYLOAD_SPILL_ALLOCA]] to i32 -; CLEANUP-NEXT: [[TMP89:%.*]] = inttoptr i32 [[TMP88]] to ptr addrspace(32) -; CLEANUP-NEXT: store i32 [[TMP2]], ptr addrspace(32) [[TMP89]], align 4 -; CLEANUP-NEXT: [[TMP114:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 1 -; CLEANUP-NEXT: store i32 [[TMP4]], ptr addrspace(32) [[TMP114]], align 4 -; CLEANUP-NEXT: [[TMP115:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 2 -; CLEANUP-NEXT: store i32 [[TMP6]], ptr addrspace(32) [[TMP115]], align 4 -; CLEANUP-NEXT: [[TMP90:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 3 -; CLEANUP-NEXT: store i32 [[TMP8]], ptr addrspace(32) [[TMP90]], align 4 -; CLEANUP-NEXT: [[TMP91:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 4 -; CLEANUP-NEXT: store i32 [[TMP10]], ptr addrspace(32) [[TMP91]], align 4 -; CLEANUP-NEXT: [[TMP92:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 5 -; CLEANUP-NEXT: store i32 [[TMP12]], ptr addrspace(32) [[TMP92]], align 4 -; CLEANUP-NEXT: [[TMP93:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 6 -; CLEANUP-NEXT: store i32 [[TMP14]], ptr addrspace(32) [[TMP93]], align 4 -; CLEANUP-NEXT: [[TMP94:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 7 -; CLEANUP-NEXT: store i32 [[TMP16]], ptr addrspace(32) [[TMP94]], align 4 -; CLEANUP-NEXT: [[TMP95:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 8 -; CLEANUP-NEXT: store i32 [[TMP18]], ptr addrspace(32) [[TMP95]], align 4 -; CLEANUP-NEXT: [[TMP96:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 9 -; CLEANUP-NEXT: store i32 [[TMP20]], ptr addrspace(32) [[TMP96]], align 4 -; CLEANUP-NEXT: [[TMP97:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 10 -; CLEANUP-NEXT: store i32 [[TMP22]], ptr addrspace(32) [[TMP97]], align 4 -; CLEANUP-NEXT: [[TMP98:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 11 -; CLEANUP-NEXT: store i32 [[TMP24]], ptr addrspace(32) [[TMP98]], align 4 -; CLEANUP-NEXT: [[TMP99:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 12 -; CLEANUP-NEXT: store i32 [[TMP27]], ptr addrspace(32) [[TMP99]], align 4 -; CLEANUP-NEXT: [[TMP100:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 13 -; CLEANUP-NEXT: store i32 [[TMP29]], ptr addrspace(32) [[TMP100]], align 4 -; CLEANUP-NEXT: [[TMP101:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 14 -; CLEANUP-NEXT: store i32 [[TMP31]], ptr addrspace(32) [[TMP101]], align 4 -; CLEANUP-NEXT: [[TMP102:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 15 -; CLEANUP-NEXT: store i32 [[TMP33]], ptr addrspace(32) [[TMP102]], align 4 -; CLEANUP-NEXT: [[TMP103:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 16 -; CLEANUP-NEXT: store i32 [[TMP35]], ptr addrspace(32) [[TMP103]], align 4 -; CLEANUP-NEXT: [[TMP104:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 17 -; CLEANUP-NEXT: store i32 [[TMP37]], ptr addrspace(32) [[TMP104]], align 4 -; CLEANUP-NEXT: [[TMP105:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 18 -; CLEANUP-NEXT: store i32 [[TMP39]], ptr addrspace(32) [[TMP105]], align 4 -; CLEANUP-NEXT: [[TMP106:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 19 -; CLEANUP-NEXT: store i32 [[TMP41]], ptr addrspace(32) [[TMP106]], align 4 -; CLEANUP-NEXT: [[TMP107:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 20 -; CLEANUP-NEXT: store i32 [[TMP43]], ptr addrspace(32) [[TMP107]], align 4 -; CLEANUP-NEXT: [[TMP108:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 21 -; CLEANUP-NEXT: store i32 [[TMP45]], ptr addrspace(32) [[TMP108]], align 4 -; CLEANUP-NEXT: [[TMP109:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 22 -; CLEANUP-NEXT: store i32 [[TMP47]], ptr addrspace(32) [[TMP109]], align 4 -; CLEANUP-NEXT: [[TMP110:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 23 -; CLEANUP-NEXT: store i32 [[TMP49]], ptr addrspace(32) [[TMP110]], align 4 -; CLEANUP-NEXT: [[TMP111:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 24 -; CLEANUP-NEXT: store i32 [[TMP51]], ptr addrspace(32) [[TMP111]], align 4 -; CLEANUP-NEXT: [[TMP112:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 25 -; CLEANUP-NEXT: store i32 [[TMP53]], ptr addrspace(32) [[TMP112]], align 4 -; CLEANUP-NEXT: [[TMP113:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP89]], i32 26 -; CLEANUP-NEXT: store i32 [[TMP55]], ptr addrspace(32) [[TMP113]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT54:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP88]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_INSERT57:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT54]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-NEXT: [[DOTFCA_2_INSERT60:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT57]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-NEXT: [[DOTFCA_3_INSERT63:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT60]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-NEXT: [[DOTFCA_4_INSERT66:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT63]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-NEXT: [[DOTFCA_5_INSERT69:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT66]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-NEXT: [[DOTFCA_6_INSERT72:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT69]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-NEXT: [[DOTFCA_7_INSERT75:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT72]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-NEXT: [[DOTFCA_8_INSERT78:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT75]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-NEXT: [[DOTFCA_9_INSERT81:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT78]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-NEXT: [[DOTFCA_10_INSERT84:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT81]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-NEXT: [[DOTFCA_11_INSERT87:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT84]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-NEXT: [[DOTFCA_12_INSERT90:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT87]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-NEXT: [[DOTFCA_13_INSERT93:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT90]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-NEXT: [[DOTFCA_14_INSERT96:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT93]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-NEXT: [[DOTFCA_15_INSERT99:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT96]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-NEXT: [[DOTFCA_16_INSERT102:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT99]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-NEXT: [[DOTFCA_17_INSERT105:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT102]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-NEXT: [[DOTFCA_18_INSERT108:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT105]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-NEXT: [[DOTFCA_19_INSERT111:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT108]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-NEXT: [[DOTFCA_20_INSERT114:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT111]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-NEXT: [[DOTFCA_21_INSERT117:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT114]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-NEXT: [[DOTFCA_22_INSERT120:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT117]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-NEXT: [[DOTFCA_23_INSERT123:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT120]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-NEXT: [[DOTFCA_24_INSERT126:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT123]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-NEXT: [[DOTFCA_25_INSERT129:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT126]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-NEXT: [[DOTFCA_26_INSERT132:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT129]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-NEXT: [[DOTFCA_27_INSERT135:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT132]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-NEXT: [[DOTFCA_28_INSERT138:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT135]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-NEXT: [[DOTFCA_29_INSERT141:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT138]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 4, i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT141]]), !continuation.registercount [[META17]], !waitmask [[META19]], !continuation.returnedRegistercount [[META17]] -; CLEANUP-NEXT: unreachable -; -; -; CLEANUP-LABEL: define dso_local void @ClosestHit.resume.0( -; CLEANUP-SAME: i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META24]] !continuation.registercount [[META17]] !continuation [[META25]] { -; CLEANUP-NEXT: entryresume.0: -; CLEANUP-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 120) -; CLEANUP-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-NEXT: [[TMP3:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 2 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [30 x i32] [[TMP3]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 1 -; CLEANUP-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 2 -; CLEANUP-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 3 -; CLEANUP-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 4 -; CLEANUP-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 5 -; CLEANUP-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 6 -; CLEANUP-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 7 -; CLEANUP-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 8 -; CLEANUP-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 9 -; CLEANUP-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 10 -; CLEANUP-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 11 -; CLEANUP-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 12 -; CLEANUP-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 13 -; CLEANUP-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 14 -; CLEANUP-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 15 -; CLEANUP-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 16 -; CLEANUP-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 17 -; CLEANUP-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 18 -; CLEANUP-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 19 -; CLEANUP-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 20 -; CLEANUP-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 21 -; CLEANUP-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 22 -; CLEANUP-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 23 -; CLEANUP-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 24 -; CLEANUP-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 25 -; CLEANUP-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 26 -; CLEANUP-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 27 -; CLEANUP-NEXT: [[TMP23:%.*]] = extractvalue [30 x i32] [[TMP3]], 28 -; CLEANUP-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP3]], 29 -; CLEANUP-NEXT: [[TMP4:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; CLEANUP-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 0 -; CLEANUP-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 1 -; CLEANUP-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 2 -; CLEANUP-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 3 -; CLEANUP-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 4 -; CLEANUP-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 5 -; CLEANUP-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 6 -; CLEANUP-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 7 -; CLEANUP-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 8 -; CLEANUP-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 9 -; CLEANUP-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 10 -; CLEANUP-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 11 -; CLEANUP-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 12 -; CLEANUP-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 13 -; CLEANUP-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 14 -; CLEANUP-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 15 -; CLEANUP-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 16 -; CLEANUP-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 17 -; CLEANUP-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 18 -; CLEANUP-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 19 -; CLEANUP-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 20 -; CLEANUP-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 21 -; CLEANUP-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 22 -; CLEANUP-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 23 -; CLEANUP-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 24 -; CLEANUP-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 25 -; CLEANUP-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 26 -; CLEANUP-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 27 -; CLEANUP-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 28 -; CLEANUP-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 29 -; CLEANUP-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 30 -; CLEANUP-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 31 -; CLEANUP-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 32 -; CLEANUP-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 33 -; CLEANUP-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 34 -; CLEANUP-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 35 -; CLEANUP-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 36 -; CLEANUP-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 37 -; CLEANUP-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 38 -; CLEANUP-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 39 -; CLEANUP-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 40 -; CLEANUP-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 41 -; CLEANUP-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 42 -; CLEANUP-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 43 -; CLEANUP-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 44 -; CLEANUP-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 45 -; CLEANUP-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 46 -; CLEANUP-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 47 -; CLEANUP-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 48 -; CLEANUP-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP4]], 0, 49 -; CLEANUP-NEXT: [[TMP2:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT1]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(32) [[TMP2]], align 4 -; CLEANUP-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 1 -; CLEANUP-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(32) [[TMP27]], align 4 -; CLEANUP-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 2 -; CLEANUP-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(32) [[TMP29]], align 4 -; CLEANUP-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 3 -; CLEANUP-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(32) [[TMP31]], align 4 -; CLEANUP-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 4 -; CLEANUP-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(32) [[TMP33]], align 4 -; CLEANUP-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 5 -; CLEANUP-NEXT: [[TMP16:%.*]] = load i32, ptr addrspace(32) [[TMP35]], align 4 -; CLEANUP-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 6 -; CLEANUP-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(32) [[TMP37]], align 4 -; CLEANUP-NEXT: [[TMP39:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 7 -; CLEANUP-NEXT: [[TMP20:%.*]] = load i32, ptr addrspace(32) [[TMP39]], align 4 -; CLEANUP-NEXT: [[TMP41:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 8 -; CLEANUP-NEXT: [[TMP22:%.*]] = load i32, ptr addrspace(32) [[TMP41]], align 4 -; CLEANUP-NEXT: [[TMP43:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 9 -; CLEANUP-NEXT: [[TMP24:%.*]] = load i32, ptr addrspace(32) [[TMP43]], align 4 -; CLEANUP-NEXT: [[TMP45:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 10 -; CLEANUP-NEXT: [[TMP26:%.*]] = load i32, ptr addrspace(32) [[TMP45]], align 4 -; CLEANUP-NEXT: [[TMP47:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 11 -; CLEANUP-NEXT: [[TMP28:%.*]] = load i32, ptr addrspace(32) [[TMP47]], align 4 -; CLEANUP-NEXT: [[TMP49:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 12 -; CLEANUP-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(32) [[TMP49]], align 4 -; CLEANUP-NEXT: [[TMP51:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 13 -; CLEANUP-NEXT: [[TMP32:%.*]] = load i32, ptr addrspace(32) [[TMP51]], align 4 -; CLEANUP-NEXT: [[TMP53:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 14 -; CLEANUP-NEXT: [[TMP34:%.*]] = load i32, ptr addrspace(32) [[TMP53]], align 4 -; CLEANUP-NEXT: [[TMP55:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 15 -; CLEANUP-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(32) [[TMP55]], align 4 -; CLEANUP-NEXT: [[TMP57:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 16 -; CLEANUP-NEXT: [[TMP38:%.*]] = load i32, ptr addrspace(32) [[TMP57]], align 4 -; CLEANUP-NEXT: [[TMP59:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 17 -; CLEANUP-NEXT: [[TMP40:%.*]] = load i32, ptr addrspace(32) [[TMP59]], align 4 -; CLEANUP-NEXT: [[TMP61:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 18 -; CLEANUP-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(32) [[TMP61]], align 4 -; CLEANUP-NEXT: [[TMP63:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 19 -; CLEANUP-NEXT: [[TMP44:%.*]] = load i32, ptr addrspace(32) [[TMP63]], align 4 -; CLEANUP-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 20 -; CLEANUP-NEXT: [[TMP46:%.*]] = load i32, ptr addrspace(32) [[TMP65]], align 4 -; CLEANUP-NEXT: [[TMP67:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 21 -; CLEANUP-NEXT: [[TMP48:%.*]] = load i32, ptr addrspace(32) [[TMP67]], align 4 -; CLEANUP-NEXT: [[TMP69:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 22 -; CLEANUP-NEXT: [[TMP50:%.*]] = load i32, ptr addrspace(32) [[TMP69]], align 4 -; CLEANUP-NEXT: [[TMP71:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 23 -; CLEANUP-NEXT: [[TMP52:%.*]] = load i32, ptr addrspace(32) [[TMP71]], align 4 -; CLEANUP-NEXT: [[TMP73:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 24 -; CLEANUP-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(32) [[TMP73]], align 4 -; CLEANUP-NEXT: [[TMP75:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 25 -; CLEANUP-NEXT: [[TMP56:%.*]] = load i32, ptr addrspace(32) [[TMP75]], align 4 -; CLEANUP-NEXT: [[TMP77:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP2]], i32 26 -; CLEANUP-NEXT: [[TMP62:%.*]] = load i32, ptr addrspace(32) [[TMP77]], align 4 -; CLEANUP-NEXT: [[TMP60:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT1]] to ptr addrspace(32) -; CLEANUP-NEXT: [[TMP58:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP58]], 0 -; CLEANUP-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD_ADDR:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CLEANUP-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD:%.*]] = load i32, ptr addrspace(32) [[PAYLOAD_FCA_0_EXTRACT_RELOAD_ADDR]], align 4 -; CLEANUP-NEXT: [[RETURNADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CLEANUP-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR]], align 4 -; CLEANUP-NEXT: [[TMP81:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]] to ptr addrspace(32) -; CLEANUP-NEXT: store i32 [[TMP6]], ptr addrspace(32) [[TMP81]], align 4 -; CLEANUP-NEXT: [[TMP106:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 1 -; CLEANUP-NEXT: store i32 [[TMP8]], ptr addrspace(32) [[TMP106]], align 4 -; CLEANUP-NEXT: [[TMP107:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 2 -; CLEANUP-NEXT: store i32 [[TMP10]], ptr addrspace(32) [[TMP107]], align 4 -; CLEANUP-NEXT: [[TMP82:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 3 -; CLEANUP-NEXT: store i32 [[TMP12]], ptr addrspace(32) [[TMP82]], align 4 -; CLEANUP-NEXT: [[TMP83:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 4 -; CLEANUP-NEXT: store i32 [[TMP14]], ptr addrspace(32) [[TMP83]], align 4 -; CLEANUP-NEXT: [[TMP84:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 5 -; CLEANUP-NEXT: store i32 [[TMP16]], ptr addrspace(32) [[TMP84]], align 4 -; CLEANUP-NEXT: [[TMP85:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 6 -; CLEANUP-NEXT: store i32 [[TMP18]], ptr addrspace(32) [[TMP85]], align 4 -; CLEANUP-NEXT: [[TMP86:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 7 -; CLEANUP-NEXT: store i32 [[TMP20]], ptr addrspace(32) [[TMP86]], align 4 -; CLEANUP-NEXT: [[TMP87:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 8 -; CLEANUP-NEXT: store i32 [[TMP22]], ptr addrspace(32) [[TMP87]], align 4 -; CLEANUP-NEXT: [[TMP88:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 9 -; CLEANUP-NEXT: store i32 [[TMP24]], ptr addrspace(32) [[TMP88]], align 4 -; CLEANUP-NEXT: [[TMP89:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 10 -; CLEANUP-NEXT: store i32 [[TMP26]], ptr addrspace(32) [[TMP89]], align 4 -; CLEANUP-NEXT: [[TMP90:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 11 -; CLEANUP-NEXT: store i32 [[TMP28]], ptr addrspace(32) [[TMP90]], align 4 -; CLEANUP-NEXT: [[TMP91:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 12 -; CLEANUP-NEXT: store i32 [[TMP30]], ptr addrspace(32) [[TMP91]], align 4 -; CLEANUP-NEXT: [[TMP92:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 13 -; CLEANUP-NEXT: store i32 [[TMP32]], ptr addrspace(32) [[TMP92]], align 4 -; CLEANUP-NEXT: [[TMP93:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 14 -; CLEANUP-NEXT: store i32 [[TMP34]], ptr addrspace(32) [[TMP93]], align 4 -; CLEANUP-NEXT: [[TMP94:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 15 -; CLEANUP-NEXT: store i32 [[TMP36]], ptr addrspace(32) [[TMP94]], align 4 -; CLEANUP-NEXT: [[TMP95:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 16 -; CLEANUP-NEXT: store i32 [[TMP38]], ptr addrspace(32) [[TMP95]], align 4 -; CLEANUP-NEXT: [[TMP96:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 17 -; CLEANUP-NEXT: store i32 [[TMP40]], ptr addrspace(32) [[TMP96]], align 4 -; CLEANUP-NEXT: [[TMP97:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 18 -; CLEANUP-NEXT: store i32 [[TMP42]], ptr addrspace(32) [[TMP97]], align 4 -; CLEANUP-NEXT: [[TMP98:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 19 -; CLEANUP-NEXT: store i32 [[TMP44]], ptr addrspace(32) [[TMP98]], align 4 -; CLEANUP-NEXT: [[TMP99:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 20 -; CLEANUP-NEXT: store i32 [[TMP46]], ptr addrspace(32) [[TMP99]], align 4 -; CLEANUP-NEXT: [[TMP100:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 21 -; CLEANUP-NEXT: store i32 [[TMP48]], ptr addrspace(32) [[TMP100]], align 4 -; CLEANUP-NEXT: [[TMP101:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 22 -; CLEANUP-NEXT: store i32 [[TMP50]], ptr addrspace(32) [[TMP101]], align 4 -; CLEANUP-NEXT: [[TMP102:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 23 -; CLEANUP-NEXT: store i32 [[TMP52]], ptr addrspace(32) [[TMP102]], align 4 -; CLEANUP-NEXT: [[TMP103:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 24 -; CLEANUP-NEXT: store i32 [[TMP54]], ptr addrspace(32) [[TMP103]], align 4 -; CLEANUP-NEXT: [[TMP104:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 25 -; CLEANUP-NEXT: store i32 [[TMP56]], ptr addrspace(32) [[TMP104]], align 4 -; CLEANUP-NEXT: [[TMP105:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP81]], i32 26 -; CLEANUP-NEXT: store i32 [[TMP62]], ptr addrspace(32) [[TMP105]], align 4 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 0 -; CLEANUP-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT1]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[TMP23]], 28 -; CLEANUP-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-NEXT: call void @lgc.cps.free(i32 120) -; CLEANUP-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR_RELOAD]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [23 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META17]] -; CLEANUP-NEXT: unreachable -; -; -; POST-PROCESS-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; POST-PROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; POST-PROCESS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; POST-PROCESS-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; POST-PROCESS-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; POST-PROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POST-PROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; POST-PROCESS-NEXT: ret i32 5 -; -; -; POST-PROCESS-LABEL: define void @main( -; POST-PROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !continuation.entry [[META19:![0-9]+]] !continuation [[META20:![0-9]+]] !continuation.stacksize [[META21:![0-9]+]] { -; POST-PROCESS-NEXT: AllocaSpillBB: -; POST-PROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 108 -; POST-PROCESS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_EXTRACT56:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POST-PROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POST-PROCESS-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POST-PROCESS-NEXT: [[TMP4:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POST-PROCESS-NEXT: [[TMP5:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP3]]) -; POST-PROCESS-NEXT: [[TMP6:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP5]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POST-PROCESS-NEXT: [[TMP7:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP6]]) -; POST-PROCESS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT56]], 0 -; POST-PROCESS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POST-PROCESS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POST-PROCESS-NEXT: [[TMP9:%.*]] = call i64 @continuation.getAddrAndMD(ptr @main.resume.0) -; POST-PROCESS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP9]], 5 -; POST-PROCESS-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP11]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP10]], align 4 -; POST-PROCESS-NEXT: [[TMP12:%.*]] = add i32 [[TMP1]], 4 -; POST-PROCESS-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP12]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP14]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP13]], align 4 -; POST-PROCESS-NEXT: [[TMP15:%.*]] = add i32 [[TMP1]], 8 -; POST-PROCESS-NEXT: [[TMP17:%.*]] = inttoptr i32 [[TMP15]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP17]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP16]], align 4 -; POST-PROCESS-NEXT: [[TMP18:%.*]] = add i32 [[TMP1]], 12 -; POST-PROCESS-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP18]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP20]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP19]], align 4 -; POST-PROCESS-NEXT: [[TMP21:%.*]] = add i32 [[TMP1]], 16 -; POST-PROCESS-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP21]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP23]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP22]], align 4 -; POST-PROCESS-NEXT: [[TMP24:%.*]] = add i32 [[TMP1]], 20 -; POST-PROCESS-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP24]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP26]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP25]], align 4 -; POST-PROCESS-NEXT: [[TMP27:%.*]] = add i32 [[TMP1]], 24 -; POST-PROCESS-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP27]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP29]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP28]], align 4 -; POST-PROCESS-NEXT: [[TMP30:%.*]] = add i32 [[TMP1]], 28 -; POST-PROCESS-NEXT: [[TMP32:%.*]] = inttoptr i32 [[TMP30]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP32]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP31]], align 4 -; POST-PROCESS-NEXT: [[TMP33:%.*]] = add i32 [[TMP1]], 32 -; POST-PROCESS-NEXT: [[TMP35:%.*]] = inttoptr i32 [[TMP33]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP35]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP34]], align 4 -; POST-PROCESS-NEXT: [[TMP36:%.*]] = add i32 [[TMP1]], 36 -; POST-PROCESS-NEXT: [[TMP38:%.*]] = inttoptr i32 [[TMP36]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP38]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP37]], align 4 -; POST-PROCESS-NEXT: [[TMP39:%.*]] = add i32 [[TMP1]], 40 -; POST-PROCESS-NEXT: [[TMP41:%.*]] = inttoptr i32 [[TMP39]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP41]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP40]], align 4 -; POST-PROCESS-NEXT: [[TMP42:%.*]] = add i32 [[TMP1]], 44 -; POST-PROCESS-NEXT: [[TMP44:%.*]] = inttoptr i32 [[TMP42]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP43:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP44]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP43]], align 4 -; POST-PROCESS-NEXT: [[TMP45:%.*]] = add i32 [[TMP1]], 48 -; POST-PROCESS-NEXT: [[TMP47:%.*]] = inttoptr i32 [[TMP45]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP46:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP47]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP46]], align 4 -; POST-PROCESS-NEXT: [[TMP48:%.*]] = add i32 [[TMP1]], 52 -; POST-PROCESS-NEXT: [[TMP50:%.*]] = inttoptr i32 [[TMP48]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP49:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP50]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP49]], align 4 -; POST-PROCESS-NEXT: [[TMP51:%.*]] = add i32 [[TMP1]], 56 -; POST-PROCESS-NEXT: [[TMP53:%.*]] = inttoptr i32 [[TMP51]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP52:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP53]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP52]], align 4 -; POST-PROCESS-NEXT: [[TMP54:%.*]] = add i32 [[TMP1]], 60 -; POST-PROCESS-NEXT: [[TMP56:%.*]] = inttoptr i32 [[TMP54]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP56]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP55]], align 4 -; POST-PROCESS-NEXT: [[TMP57:%.*]] = add i32 [[TMP1]], 64 -; POST-PROCESS-NEXT: [[TMP59:%.*]] = inttoptr i32 [[TMP57]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP58:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP59]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP58]], align 4 -; POST-PROCESS-NEXT: [[TMP60:%.*]] = add i32 [[TMP1]], 68 -; POST-PROCESS-NEXT: [[TMP62:%.*]] = inttoptr i32 [[TMP60]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP61:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP62]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP61]], align 4 -; POST-PROCESS-NEXT: [[TMP63:%.*]] = add i32 [[TMP1]], 72 -; POST-PROCESS-NEXT: [[TMP65:%.*]] = inttoptr i32 [[TMP63]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP64:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP65]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP64]], align 4 -; POST-PROCESS-NEXT: [[TMP66:%.*]] = add i32 [[TMP1]], 76 -; POST-PROCESS-NEXT: [[TMP68:%.*]] = inttoptr i32 [[TMP66]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP67:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP68]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP67]], align 4 -; POST-PROCESS-NEXT: [[TMP69:%.*]] = add i32 [[TMP1]], 80 -; POST-PROCESS-NEXT: [[TMP71:%.*]] = inttoptr i32 [[TMP69]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP70:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP71]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP70]], align 4 -; POST-PROCESS-NEXT: [[TMP72:%.*]] = add i32 [[TMP1]], 84 -; POST-PROCESS-NEXT: [[TMP74:%.*]] = inttoptr i32 [[TMP72]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP73:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP74]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP73]], align 4 -; POST-PROCESS-NEXT: [[TMP75:%.*]] = add i32 [[TMP1]], 88 -; POST-PROCESS-NEXT: [[TMP77:%.*]] = inttoptr i32 [[TMP75]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP76:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP77]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP76]], align 4 -; POST-PROCESS-NEXT: [[TMP78:%.*]] = add i32 [[TMP1]], 92 -; POST-PROCESS-NEXT: [[TMP80:%.*]] = inttoptr i32 [[TMP78]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP79:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP80]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP79]], align 4 -; POST-PROCESS-NEXT: [[TMP81:%.*]] = add i32 [[TMP1]], 96 -; POST-PROCESS-NEXT: [[TMP83:%.*]] = inttoptr i32 [[TMP81]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP82:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP83]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP82]], align 4 -; POST-PROCESS-NEXT: [[TMP84:%.*]] = add i32 [[TMP1]], 100 -; POST-PROCESS-NEXT: [[TMP86:%.*]] = inttoptr i32 [[TMP84]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP85:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP86]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP85]], align 4 -; POST-PROCESS-NEXT: [[TMP87:%.*]] = add i32 [[TMP1]], 104 -; POST-PROCESS-NEXT: [[TMP90:%.*]] = inttoptr i32 [[TMP87]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP88:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP90]], i32 0 -; POST-PROCESS-NEXT: store i32 undef, ptr addrspace(21) [[TMP88]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP1]], 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; POST-PROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; POST-PROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; POST-PROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; POST-PROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; POST-PROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; POST-PROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 undef, 7 -; POST-PROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 undef, 8 -; POST-PROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 undef, 9 -; POST-PROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 undef, 10 -; POST-PROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 undef, 11 -; POST-PROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 undef, 12 -; POST-PROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 undef, 13 -; POST-PROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 undef, 14 -; POST-PROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 undef, 15 -; POST-PROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 undef, 16 -; POST-PROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 undef, 17 -; POST-PROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 undef, 18 -; POST-PROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 undef, 19 -; POST-PROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 undef, 20 -; POST-PROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 undef, 21 -; POST-PROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 undef, 22 -; POST-PROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 undef, 23 -; POST-PROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 undef, 24 -; POST-PROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 undef, 25 -; POST-PROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 undef, 26 -; POST-PROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 undef, 27 -; POST-PROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 undef, 28 -; POST-PROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 undef, 29 -; POST-PROCESS-NEXT: [[TMP89:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP89]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-NEXT: unreachable -; -; -; POST-PROCESS-LABEL: define dso_local void @main.resume.0( -; POST-PROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META8]] !continuation [[META20]] { -; POST-PROCESS-NEXT: entryresume.0: -; POST-PROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP27:%.*]] = add i32 [[TMP2]], -108 -; POST-PROCESS-NEXT: [[TMP4:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 2 -; POST-PROCESS-NEXT: [[TMP3:%.*]] = extractvalue [30 x i32] [[TMP4]], 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 1 -; POST-PROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 2 -; POST-PROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 3 -; POST-PROCESS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 4 -; POST-PROCESS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 5 -; POST-PROCESS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 6 -; POST-PROCESS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 7 -; POST-PROCESS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 8 -; POST-PROCESS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 9 -; POST-PROCESS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 10 -; POST-PROCESS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 11 -; POST-PROCESS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 12 -; POST-PROCESS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 13 -; POST-PROCESS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 14 -; POST-PROCESS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 15 -; POST-PROCESS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 16 -; POST-PROCESS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 17 -; POST-PROCESS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 18 -; POST-PROCESS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 19 -; POST-PROCESS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 20 -; POST-PROCESS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 21 -; POST-PROCESS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 22 -; POST-PROCESS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 23 -; POST-PROCESS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 24 -; POST-PROCESS-NEXT: [[TMP22:%.*]] = extractvalue [30 x i32] [[TMP4]], 25 -; POST-PROCESS-NEXT: [[TMP23:%.*]] = extractvalue [30 x i32] [[TMP4]], 26 -; POST-PROCESS-NEXT: [[TMP24:%.*]] = extractvalue [30 x i32] [[TMP4]], 27 -; POST-PROCESS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 28 -; POST-PROCESS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 29 -; POST-PROCESS-NEXT: [[TMP5:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POST-PROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 1 -; POST-PROCESS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 2 -; POST-PROCESS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 3 -; POST-PROCESS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 5 -; POST-PROCESS-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 6 -; POST-PROCESS-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 7 -; POST-PROCESS-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 8 -; POST-PROCESS-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 9 -; POST-PROCESS-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 10 -; POST-PROCESS-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 11 -; POST-PROCESS-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 12 -; POST-PROCESS-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 13 -; POST-PROCESS-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 14 -; POST-PROCESS-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 15 -; POST-PROCESS-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 16 -; POST-PROCESS-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 17 -; POST-PROCESS-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 18 -; POST-PROCESS-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 19 -; POST-PROCESS-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 20 -; POST-PROCESS-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 21 -; POST-PROCESS-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 22 -; POST-PROCESS-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 23 -; POST-PROCESS-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 24 -; POST-PROCESS-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 25 -; POST-PROCESS-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 26 -; POST-PROCESS-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 27 -; POST-PROCESS-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 28 -; POST-PROCESS-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 29 -; POST-PROCESS-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 30 -; POST-PROCESS-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 31 -; POST-PROCESS-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 32 -; POST-PROCESS-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 33 -; POST-PROCESS-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 34 -; POST-PROCESS-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 35 -; POST-PROCESS-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 36 -; POST-PROCESS-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 37 -; POST-PROCESS-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 38 -; POST-PROCESS-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 39 -; POST-PROCESS-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 40 -; POST-PROCESS-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 41 -; POST-PROCESS-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 42 -; POST-PROCESS-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 43 -; POST-PROCESS-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 44 -; POST-PROCESS-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 45 -; POST-PROCESS-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 46 -; POST-PROCESS-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 47 -; POST-PROCESS-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 48 -; POST-PROCESS-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 49 -; POST-PROCESS-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP6]], i32 0 -; POST-PROCESS-NEXT: [[TMP8:%.*]] = load i32, ptr addrspace(21) [[TMP7]], align 4 -; POST-PROCESS-NEXT: [[TMP30:%.*]] = add i32 [[TMP3]], 4 -; POST-PROCESS-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP30]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP10]], i32 0 -; POST-PROCESS-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(21) [[TMP11]], align 4 -; POST-PROCESS-NEXT: [[TMP34:%.*]] = add i32 [[TMP3]], 8 -; POST-PROCESS-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP34]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP14]], i32 0 -; POST-PROCESS-NEXT: [[TMP16:%.*]] = load i32, ptr addrspace(21) [[TMP15]], align 4 -; POST-PROCESS-NEXT: [[TMP38:%.*]] = add i32 [[TMP3]], 12 -; POST-PROCESS-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP38]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP18]], i32 0 -; POST-PROCESS-NEXT: [[TMP20:%.*]] = load i32, ptr addrspace(21) [[TMP19]], align 4 -; POST-PROCESS-NEXT: [[TMP42:%.*]] = add i32 [[TMP3]], 16 -; POST-PROCESS-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP42]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP25]], i32 0 -; POST-PROCESS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(21) [[TMP29]], align 4 -; POST-PROCESS-NEXT: [[TMP46:%.*]] = add i32 [[TMP3]], 20 -; POST-PROCESS-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP46]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP26]], i32 0 -; POST-PROCESS-NEXT: [[TMP28:%.*]] = load i32, ptr addrspace(21) [[TMP37]], align 4 -; POST-PROCESS-NEXT: [[TMP50:%.*]] = add i32 [[TMP3]], 24 -; POST-PROCESS-NEXT: [[TMP41:%.*]] = inttoptr i32 [[TMP50]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP41]], i32 0 -; POST-PROCESS-NEXT: [[TMP32:%.*]] = load i32, ptr addrspace(21) [[TMP31]], align 4 -; POST-PROCESS-NEXT: [[TMP54:%.*]] = add i32 [[TMP3]], 28 -; POST-PROCESS-NEXT: [[TMP45:%.*]] = inttoptr i32 [[TMP54]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP45]], i32 0 -; POST-PROCESS-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(21) [[TMP35]], align 4 -; POST-PROCESS-NEXT: [[TMP58:%.*]] = add i32 [[TMP3]], 32 -; POST-PROCESS-NEXT: [[TMP49:%.*]] = inttoptr i32 [[TMP58]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP49]], i32 0 -; POST-PROCESS-NEXT: [[TMP40:%.*]] = load i32, ptr addrspace(21) [[TMP39]], align 4 -; POST-PROCESS-NEXT: [[TMP62:%.*]] = add i32 [[TMP3]], 36 -; POST-PROCESS-NEXT: [[TMP53:%.*]] = inttoptr i32 [[TMP62]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP43:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP53]], i32 0 -; POST-PROCESS-NEXT: [[TMP44:%.*]] = load i32, ptr addrspace(21) [[TMP43]], align 4 -; POST-PROCESS-NEXT: [[TMP66:%.*]] = add i32 [[TMP3]], 40 -; POST-PROCESS-NEXT: [[TMP57:%.*]] = inttoptr i32 [[TMP66]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP57]], i32 0 -; POST-PROCESS-NEXT: [[TMP48:%.*]] = load i32, ptr addrspace(21) [[TMP47]], align 4 -; POST-PROCESS-NEXT: [[TMP70:%.*]] = add i32 [[TMP3]], 44 -; POST-PROCESS-NEXT: [[TMP61:%.*]] = inttoptr i32 [[TMP70]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP51:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP61]], i32 0 -; POST-PROCESS-NEXT: [[TMP52:%.*]] = load i32, ptr addrspace(21) [[TMP51]], align 4 -; POST-PROCESS-NEXT: [[TMP74:%.*]] = add i32 [[TMP3]], 48 -; POST-PROCESS-NEXT: [[TMP65:%.*]] = inttoptr i32 [[TMP74]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP65]], i32 0 -; POST-PROCESS-NEXT: [[TMP56:%.*]] = load i32, ptr addrspace(21) [[TMP55]], align 4 -; POST-PROCESS-NEXT: [[TMP78:%.*]] = add i32 [[TMP3]], 52 -; POST-PROCESS-NEXT: [[TMP69:%.*]] = inttoptr i32 [[TMP78]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP69]], i32 0 -; POST-PROCESS-NEXT: [[TMP60:%.*]] = load i32, ptr addrspace(21) [[TMP59]], align 4 -; POST-PROCESS-NEXT: [[TMP82:%.*]] = add i32 [[TMP3]], 56 -; POST-PROCESS-NEXT: [[TMP73:%.*]] = inttoptr i32 [[TMP82]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP63:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP73]], i32 0 -; POST-PROCESS-NEXT: [[TMP64:%.*]] = load i32, ptr addrspace(21) [[TMP63]], align 4 -; POST-PROCESS-NEXT: [[TMP86:%.*]] = add i32 [[TMP3]], 60 -; POST-PROCESS-NEXT: [[TMP77:%.*]] = inttoptr i32 [[TMP86]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP67:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP77]], i32 0 -; POST-PROCESS-NEXT: [[TMP68:%.*]] = load i32, ptr addrspace(21) [[TMP67]], align 4 -; POST-PROCESS-NEXT: [[TMP90:%.*]] = add i32 [[TMP3]], 64 -; POST-PROCESS-NEXT: [[TMP81:%.*]] = inttoptr i32 [[TMP90]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP71:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP81]], i32 0 -; POST-PROCESS-NEXT: [[TMP72:%.*]] = load i32, ptr addrspace(21) [[TMP71]], align 4 -; POST-PROCESS-NEXT: [[TMP94:%.*]] = add i32 [[TMP3]], 68 -; POST-PROCESS-NEXT: [[TMP85:%.*]] = inttoptr i32 [[TMP94]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP75:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP85]], i32 0 -; POST-PROCESS-NEXT: [[TMP76:%.*]] = load i32, ptr addrspace(21) [[TMP75]], align 4 -; POST-PROCESS-NEXT: [[TMP98:%.*]] = add i32 [[TMP3]], 72 -; POST-PROCESS-NEXT: [[TMP89:%.*]] = inttoptr i32 [[TMP98]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP79:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP89]], i32 0 -; POST-PROCESS-NEXT: [[TMP80:%.*]] = load i32, ptr addrspace(21) [[TMP79]], align 4 -; POST-PROCESS-NEXT: [[TMP102:%.*]] = add i32 [[TMP3]], 76 -; POST-PROCESS-NEXT: [[TMP93:%.*]] = inttoptr i32 [[TMP102]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP83:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP93]], i32 0 -; POST-PROCESS-NEXT: [[TMP84:%.*]] = load i32, ptr addrspace(21) [[TMP83]], align 4 -; POST-PROCESS-NEXT: [[TMP106:%.*]] = add i32 [[TMP3]], 80 -; POST-PROCESS-NEXT: [[TMP97:%.*]] = inttoptr i32 [[TMP106]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP87:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP97]], i32 0 -; POST-PROCESS-NEXT: [[TMP88:%.*]] = load i32, ptr addrspace(21) [[TMP87]], align 4 -; POST-PROCESS-NEXT: [[TMP110:%.*]] = add i32 [[TMP3]], 84 -; POST-PROCESS-NEXT: [[TMP101:%.*]] = inttoptr i32 [[TMP110]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP91:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP101]], i32 0 -; POST-PROCESS-NEXT: [[TMP92:%.*]] = load i32, ptr addrspace(21) [[TMP91]], align 4 -; POST-PROCESS-NEXT: [[TMP114:%.*]] = add i32 [[TMP3]], 88 -; POST-PROCESS-NEXT: [[TMP105:%.*]] = inttoptr i32 [[TMP114]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP95:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP105]], i32 0 -; POST-PROCESS-NEXT: [[TMP96:%.*]] = load i32, ptr addrspace(21) [[TMP95]], align 4 -; POST-PROCESS-NEXT: [[TMP118:%.*]] = add i32 [[TMP3]], 92 -; POST-PROCESS-NEXT: [[TMP109:%.*]] = inttoptr i32 [[TMP118]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP99:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP109]], i32 0 -; POST-PROCESS-NEXT: [[TMP100:%.*]] = load i32, ptr addrspace(21) [[TMP99]], align 4 -; POST-PROCESS-NEXT: [[TMP122:%.*]] = add i32 [[TMP3]], 96 -; POST-PROCESS-NEXT: [[TMP115:%.*]] = inttoptr i32 [[TMP122]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP103:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP115]], i32 0 -; POST-PROCESS-NEXT: [[TMP104:%.*]] = load i32, ptr addrspace(21) [[TMP103]], align 4 -; POST-PROCESS-NEXT: [[TMP126:%.*]] = add i32 [[TMP3]], 100 -; POST-PROCESS-NEXT: [[TMP116:%.*]] = inttoptr i32 [[TMP126]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP107:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP116]], i32 0 -; POST-PROCESS-NEXT: [[TMP108:%.*]] = load i32, ptr addrspace(21) [[TMP107]], align 4 -; POST-PROCESS-NEXT: [[TMP130:%.*]] = add i32 [[TMP3]], 104 -; POST-PROCESS-NEXT: [[TMP117:%.*]] = inttoptr i32 [[TMP130]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP111:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP117]], i32 0 -; POST-PROCESS-NEXT: [[TMP120:%.*]] = load i32, ptr addrspace(21) [[TMP111]], align 4 -; POST-PROCESS-NEXT: [[TMP119:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_EXTRACT57:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP119]], 0 -; POST-PROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POST-PROCESS-NEXT: [[TMP112:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP113:%.*]] = add i32 [[TMP112]], -108 -; POST-PROCESS-NEXT: store i32 [[TMP113]], ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: ret void -; -; -; POST-PROCESS-LABEL: define void @AnyHit( -; POST-PROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], [6 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation [[META23:![0-9]+]] { -; POST-PROCESS-NEXT: AllocaSpillBB: -; POST-PROCESS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; POST-PROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 0, 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-NEXT: store <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 1, 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-NEXT: store <2 x float> [[DOTFCA_0_0_1_0_EXTRACT]], ptr [[DOTFCA_0_0_1_0_GEP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-NEXT: store float [[DOTFCA_0_1_0_EXTRACT]], ptr [[DOTFCA_0_1_0_GEP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 1 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POST-PROCESS-NEXT: store i32 [[DOTFCA_0_1_1_EXTRACT]], ptr [[DOTFCA_0_1_1_GEP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 2 -; POST-PROCESS-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POST-PROCESS-NEXT: store <3 x float> [[DOTFCA_0_2_EXTRACT]], ptr [[DOTFCA_0_2_GEP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 3 -; POST-PROCESS-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POST-PROCESS-NEXT: store <3 x float> [[DOTFCA_0_3_EXTRACT]], ptr [[DOTFCA_0_3_GEP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POST-PROCESS-NEXT: store float [[DOTFCA_0_4_EXTRACT]], ptr [[DOTFCA_0_4_GEP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 5 -; POST-PROCESS-NEXT: [[DOTFCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POST-PROCESS-NEXT: store i64 [[DOTFCA_0_5_EXTRACT]], ptr [[DOTFCA_0_5_GEP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POST-PROCESS-NEXT: store float [[DOTFCA_1_0_EXTRACT]], ptr [[DOTFCA_1_0_GEP]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 1 -; POST-PROCESS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POST-PROCESS-NEXT: store i32 [[DOTFCA_1_1_EXTRACT]], ptr [[DOTFCA_1_1_GEP]], align 4 -; POST-PROCESS-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-NEXT: [[TMP3:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 -; POST-PROCESS-NEXT: [[TMP5:%.*]] = load i32, ptr addrspace(21) [[TMP4]], align 4 -; POST-PROCESS-NEXT: [[TMP6:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP6]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP7]], i32 0 -; POST-PROCESS-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(21) [[TMP8]], align 4 -; POST-PROCESS-NEXT: [[TMP10:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP11]], i32 0 -; POST-PROCESS-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(21) [[TMP12]], align 4 -; POST-PROCESS-NEXT: [[TMP14:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP15]], i32 0 -; POST-PROCESS-NEXT: [[TMP17:%.*]] = load i32, ptr addrspace(21) [[TMP16]], align 4 -; POST-PROCESS-NEXT: [[TMP18:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP18]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP19]], i32 0 -; POST-PROCESS-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(21) [[TMP20]], align 4 -; POST-PROCESS-NEXT: [[TMP22:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP22]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP23]], i32 0 -; POST-PROCESS-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(21) [[TMP24]], align 4 -; POST-PROCESS-NEXT: [[TMP26:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP26]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP27]], i32 0 -; POST-PROCESS-NEXT: [[TMP29:%.*]] = load i32, ptr addrspace(21) [[TMP28]], align 4 -; POST-PROCESS-NEXT: [[TMP30:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP30]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP31]], i32 0 -; POST-PROCESS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(21) [[TMP32]], align 4 -; POST-PROCESS-NEXT: [[TMP34:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-NEXT: [[TMP35:%.*]] = inttoptr i32 [[TMP34]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP35]], i32 0 -; POST-PROCESS-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(21) [[TMP36]], align 4 -; POST-PROCESS-NEXT: [[TMP38:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-NEXT: [[TMP39:%.*]] = inttoptr i32 [[TMP38]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP39]], i32 0 -; POST-PROCESS-NEXT: [[TMP41:%.*]] = load i32, ptr addrspace(21) [[TMP40]], align 4 -; POST-PROCESS-NEXT: [[TMP42:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-NEXT: [[TMP43:%.*]] = inttoptr i32 [[TMP42]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP43]], i32 0 -; POST-PROCESS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(21) [[TMP44]], align 4 -; POST-PROCESS-NEXT: [[TMP46:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-NEXT: [[TMP47:%.*]] = inttoptr i32 [[TMP46]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP48:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP47]], i32 0 -; POST-PROCESS-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(21) [[TMP48]], align 4 -; POST-PROCESS-NEXT: [[TMP50:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-NEXT: [[TMP51:%.*]] = inttoptr i32 [[TMP50]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP52:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP51]], i32 0 -; POST-PROCESS-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(21) [[TMP52]], align 4 -; POST-PROCESS-NEXT: [[TMP54:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-NEXT: [[TMP55:%.*]] = inttoptr i32 [[TMP54]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP56:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP55]], i32 0 -; POST-PROCESS-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(21) [[TMP56]], align 4 -; POST-PROCESS-NEXT: [[TMP58:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-NEXT: [[TMP59:%.*]] = inttoptr i32 [[TMP58]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP60:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP59]], i32 0 -; POST-PROCESS-NEXT: [[TMP61:%.*]] = load i32, ptr addrspace(21) [[TMP60]], align 4 -; POST-PROCESS-NEXT: [[TMP62:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-NEXT: [[TMP63:%.*]] = inttoptr i32 [[TMP62]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP64:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP63]], i32 0 -; POST-PROCESS-NEXT: [[TMP65:%.*]] = load i32, ptr addrspace(21) [[TMP64]], align 4 -; POST-PROCESS-NEXT: [[TMP66:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-NEXT: [[TMP67:%.*]] = inttoptr i32 [[TMP66]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP68:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP67]], i32 0 -; POST-PROCESS-NEXT: [[TMP69:%.*]] = load i32, ptr addrspace(21) [[TMP68]], align 4 -; POST-PROCESS-NEXT: [[TMP70:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-NEXT: [[TMP71:%.*]] = inttoptr i32 [[TMP70]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP72:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP71]], i32 0 -; POST-PROCESS-NEXT: [[TMP73:%.*]] = load i32, ptr addrspace(21) [[TMP72]], align 4 -; POST-PROCESS-NEXT: [[TMP74:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-NEXT: [[TMP75:%.*]] = inttoptr i32 [[TMP74]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP76:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP75]], i32 0 -; POST-PROCESS-NEXT: [[TMP77:%.*]] = load i32, ptr addrspace(21) [[TMP76]], align 4 -; POST-PROCESS-NEXT: [[TMP78:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-NEXT: [[TMP79:%.*]] = inttoptr i32 [[TMP78]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP80:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP79]], i32 0 -; POST-PROCESS-NEXT: [[TMP81:%.*]] = load i32, ptr addrspace(21) [[TMP80]], align 4 -; POST-PROCESS-NEXT: [[TMP82:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-NEXT: [[TMP83:%.*]] = inttoptr i32 [[TMP82]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP84:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP83]], i32 0 -; POST-PROCESS-NEXT: [[TMP85:%.*]] = load i32, ptr addrspace(21) [[TMP84]], align 4 -; POST-PROCESS-NEXT: [[TMP86:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-NEXT: [[TMP87:%.*]] = inttoptr i32 [[TMP86]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP88:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP87]], i32 0 -; POST-PROCESS-NEXT: [[TMP89:%.*]] = load i32, ptr addrspace(21) [[TMP88]], align 4 -; POST-PROCESS-NEXT: [[TMP90:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-NEXT: [[TMP91:%.*]] = inttoptr i32 [[TMP90]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP92:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP91]], i32 0 -; POST-PROCESS-NEXT: [[TMP93:%.*]] = load i32, ptr addrspace(21) [[TMP92]], align 4 -; POST-PROCESS-NEXT: [[TMP94:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-NEXT: [[TMP95:%.*]] = inttoptr i32 [[TMP94]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP96:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP95]], i32 0 -; POST-PROCESS-NEXT: [[TMP97:%.*]] = load i32, ptr addrspace(21) [[TMP96]], align 4 -; POST-PROCESS-NEXT: [[TMP98:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-NEXT: [[TMP99:%.*]] = inttoptr i32 [[TMP98]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP100:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP99]], i32 0 -; POST-PROCESS-NEXT: [[TMP101:%.*]] = load i32, ptr addrspace(21) [[TMP100]], align 4 -; POST-PROCESS-NEXT: [[TMP102:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-NEXT: [[TMP103:%.*]] = inttoptr i32 [[TMP102]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP104:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP103]], i32 0 -; POST-PROCESS-NEXT: [[TMP105:%.*]] = load i32, ptr addrspace(21) [[TMP104]], align 4 -; POST-PROCESS-NEXT: [[TMP106:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-NEXT: [[TMP107:%.*]] = inttoptr i32 [[TMP106]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP108:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP107]], i32 0 -; POST-PROCESS-NEXT: [[TMP109:%.*]] = load i32, ptr addrspace(21) [[TMP108]], align 4 -; POST-PROCESS-NEXT: [[TMP110:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POST-PROCESS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP110]], i32 0, i32 1 -; POST-PROCESS-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; POST-PROCESS-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; POST-PROCESS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; POST-PROCESS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; POST-PROCESS-NEXT: [[DOTSROA_035_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-NEXT: [[TMP111:%.*]] = bitcast float [[DOTSROA_035_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-NEXT: [[DOTSROA_035_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-NEXT: [[TMP112:%.*]] = bitcast float [[DOTSROA_035_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], 0 -; POST-PROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POST-PROCESS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; POST-PROCESS-NEXT: [[TMP113:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP114:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP113]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP5]], ptr addrspace(21) [[TMP114]], align 4 -; POST-PROCESS-NEXT: [[TMP115:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-NEXT: [[TMP116:%.*]] = inttoptr i32 [[TMP115]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP117:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP116]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP9]], ptr addrspace(21) [[TMP117]], align 4 -; POST-PROCESS-NEXT: [[TMP118:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-NEXT: [[TMP119:%.*]] = inttoptr i32 [[TMP118]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP120:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP119]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP13]], ptr addrspace(21) [[TMP120]], align 4 -; POST-PROCESS-NEXT: [[TMP121:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-NEXT: [[TMP122:%.*]] = inttoptr i32 [[TMP121]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP123:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP122]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP17]], ptr addrspace(21) [[TMP123]], align 4 -; POST-PROCESS-NEXT: [[TMP124:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-NEXT: [[TMP125:%.*]] = inttoptr i32 [[TMP124]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP126:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP125]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP21]], ptr addrspace(21) [[TMP126]], align 4 -; POST-PROCESS-NEXT: [[TMP127:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-NEXT: [[TMP128:%.*]] = inttoptr i32 [[TMP127]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP129:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP128]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP25]], ptr addrspace(21) [[TMP129]], align 4 -; POST-PROCESS-NEXT: [[TMP130:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-NEXT: [[TMP131:%.*]] = inttoptr i32 [[TMP130]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP132:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP131]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP29]], ptr addrspace(21) [[TMP132]], align 4 -; POST-PROCESS-NEXT: [[TMP133:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-NEXT: [[TMP134:%.*]] = inttoptr i32 [[TMP133]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP135:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP134]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP33]], ptr addrspace(21) [[TMP135]], align 4 -; POST-PROCESS-NEXT: [[TMP136:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-NEXT: [[TMP137:%.*]] = inttoptr i32 [[TMP136]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP138:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP137]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP37]], ptr addrspace(21) [[TMP138]], align 4 -; POST-PROCESS-NEXT: [[TMP139:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-NEXT: [[TMP140:%.*]] = inttoptr i32 [[TMP139]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP141:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP140]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP41]], ptr addrspace(21) [[TMP141]], align 4 -; POST-PROCESS-NEXT: [[TMP142:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-NEXT: [[TMP143:%.*]] = inttoptr i32 [[TMP142]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP144:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP143]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP45]], ptr addrspace(21) [[TMP144]], align 4 -; POST-PROCESS-NEXT: [[TMP145:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-NEXT: [[TMP146:%.*]] = inttoptr i32 [[TMP145]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP147:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP146]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP49]], ptr addrspace(21) [[TMP147]], align 4 -; POST-PROCESS-NEXT: [[TMP148:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-NEXT: [[TMP149:%.*]] = inttoptr i32 [[TMP148]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP150:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP149]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP53]], ptr addrspace(21) [[TMP150]], align 4 -; POST-PROCESS-NEXT: [[TMP151:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-NEXT: [[TMP152:%.*]] = inttoptr i32 [[TMP151]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP153:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP152]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP57]], ptr addrspace(21) [[TMP153]], align 4 -; POST-PROCESS-NEXT: [[TMP154:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-NEXT: [[TMP155:%.*]] = inttoptr i32 [[TMP154]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP156:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP155]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP61]], ptr addrspace(21) [[TMP156]], align 4 -; POST-PROCESS-NEXT: [[TMP157:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-NEXT: [[TMP158:%.*]] = inttoptr i32 [[TMP157]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP159:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP158]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP65]], ptr addrspace(21) [[TMP159]], align 4 -; POST-PROCESS-NEXT: [[TMP160:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-NEXT: [[TMP161:%.*]] = inttoptr i32 [[TMP160]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP162:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP161]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP69]], ptr addrspace(21) [[TMP162]], align 4 -; POST-PROCESS-NEXT: [[TMP163:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-NEXT: [[TMP164:%.*]] = inttoptr i32 [[TMP163]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP165:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP164]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP73]], ptr addrspace(21) [[TMP165]], align 4 -; POST-PROCESS-NEXT: [[TMP166:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-NEXT: [[TMP167:%.*]] = inttoptr i32 [[TMP166]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP168:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP167]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP77]], ptr addrspace(21) [[TMP168]], align 4 -; POST-PROCESS-NEXT: [[TMP169:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-NEXT: [[TMP170:%.*]] = inttoptr i32 [[TMP169]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP171:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP170]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP81]], ptr addrspace(21) [[TMP171]], align 4 -; POST-PROCESS-NEXT: [[TMP172:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-NEXT: [[TMP173:%.*]] = inttoptr i32 [[TMP172]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP174:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP173]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP85]], ptr addrspace(21) [[TMP174]], align 4 -; POST-PROCESS-NEXT: [[TMP175:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-NEXT: [[TMP176:%.*]] = inttoptr i32 [[TMP175]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP177:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP176]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP89]], ptr addrspace(21) [[TMP177]], align 4 -; POST-PROCESS-NEXT: [[TMP178:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-NEXT: [[TMP179:%.*]] = inttoptr i32 [[TMP178]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP180:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP179]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP93]], ptr addrspace(21) [[TMP180]], align 4 -; POST-PROCESS-NEXT: [[TMP181:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-NEXT: [[TMP182:%.*]] = inttoptr i32 [[TMP181]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP183:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP182]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP97]], ptr addrspace(21) [[TMP183]], align 4 -; POST-PROCESS-NEXT: [[TMP184:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-NEXT: [[TMP185:%.*]] = inttoptr i32 [[TMP184]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP186:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP185]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP101]], ptr addrspace(21) [[TMP186]], align 4 -; POST-PROCESS-NEXT: [[TMP187:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-NEXT: [[TMP188:%.*]] = inttoptr i32 [[TMP187]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP189:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP188]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP105]], ptr addrspace(21) [[TMP189]], align 4 -; POST-PROCESS-NEXT: [[TMP190:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-NEXT: [[TMP191:%.*]] = inttoptr i32 [[TMP190]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP192:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP191]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP109]], ptr addrspace(21) [[TMP192]], align 4 -; POST-PROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; POST-PROCESS-NEXT: [[TMP193:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-NEXT: [[TMP194:%.*]] = bitcast i32 [[TMP193]] to float -; POST-PROCESS-NEXT: [[DOTSROA_037_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP194]], i32 0 -; POST-PROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; POST-PROCESS-NEXT: [[TMP195:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-NEXT: [[TMP196:%.*]] = bitcast i32 [[TMP195]] to float -; POST-PROCESS-NEXT: [[DOTSROA_037_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_037_0_VEC_INSERT]], float [[TMP196]], i32 1 -; POST-PROCESS-NEXT: [[DOTFCA_0_INSERT36:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_037_4_VEC_INSERT]], 0 -; POST-PROCESS-NEXT: [[TMP197:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POST-PROCESS-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP197]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT36]]) -; POST-PROCESS-NEXT: [[DOTFCA_0_0_0_0_GEP25:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP25]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_1_0_GEP26:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_0_1_0_GEP26]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_0_1_0_LOAD]], 0, 0, 1, 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_0_GEP27:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_0_GEP27]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_1_0_INSERT]], float [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_1_GEP28:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_1_GEP28]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], i32 [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; POST-PROCESS-NEXT: [[DOTFCA_0_2_GEP29:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POST-PROCESS-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP29]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; POST-PROCESS-NEXT: [[DOTFCA_0_3_GEP30:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POST-PROCESS-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP30]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; POST-PROCESS-NEXT: [[DOTFCA_0_4_GEP31:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP31]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_5_GEP32:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POST-PROCESS-NEXT: [[DOTFCA_0_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP32]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_LOAD]], 0, 5 -; POST-PROCESS-NEXT: [[DOTFCA_1_0_GEP33:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP33]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_1_GEP34:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POST-PROCESS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP34]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; POST-PROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POST-PROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POST-PROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POST-PROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POST-PROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POST-PROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POST-PROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POST-PROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POST-PROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POST-PROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POST-PROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POST-PROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POST-PROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POST-PROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POST-PROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POST-PROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POST-PROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POST-PROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POST-PROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POST-PROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POST-PROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POST-PROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POST-PROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POST-PROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POST-PROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POST-PROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POST-PROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POST-PROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POST-PROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POST-PROCESS-NEXT: [[TMP223:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP223]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-NEXT: unreachable -; -; -; POST-PROCESS-LABEL: define void @ClosestHit( -; POST-PROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [21 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META24:![0-9]+]] !continuation [[META25:![0-9]+]] !continuation.stacksize [[META26:![0-9]+]] { -; POST-PROCESS-NEXT: AllocaSpillBB: -; POST-PROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 120 -; POST-PROCESS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP3:%.*]] = add i32 [[TMP1]], 108 -; POST-PROCESS-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 -; POST-PROCESS-NEXT: store i64 [[RETURNADDR]], ptr addrspace(21) [[TMP5]], align 4 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POST-PROCESS-NEXT: [[TMP6:%.*]] = add i32 [[TMP1]], 116 -; POST-PROCESS-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP6]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP7]], i32 0 -; POST-PROCESS-NEXT: store i32 [[PAYLOAD_FCA_0_EXTRACT]], ptr addrspace(21) [[TMP8]], align 4 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POST-PROCESS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POST-PROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 1, 0 -; POST-PROCESS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; POST-PROCESS-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(21) [[TMP10]], align 4 -; POST-PROCESS-NEXT: [[TMP12:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP12]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP13]], i32 0 -; POST-PROCESS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(21) [[TMP14]], align 4 -; POST-PROCESS-NEXT: [[TMP16:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-NEXT: [[TMP17:%.*]] = inttoptr i32 [[TMP16]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP17]], i32 0 -; POST-PROCESS-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(21) [[TMP18]], align 4 -; POST-PROCESS-NEXT: [[TMP20:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP20]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP21]], i32 0 -; POST-PROCESS-NEXT: [[TMP23:%.*]] = load i32, ptr addrspace(21) [[TMP22]], align 4 -; POST-PROCESS-NEXT: [[TMP24:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP24]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP25]], i32 0 -; POST-PROCESS-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(21) [[TMP26]], align 4 -; POST-PROCESS-NEXT: [[TMP28:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP28]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP29]], i32 0 -; POST-PROCESS-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(21) [[TMP30]], align 4 -; POST-PROCESS-NEXT: [[TMP32:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-NEXT: [[TMP33:%.*]] = inttoptr i32 [[TMP32]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP33]], i32 0 -; POST-PROCESS-NEXT: [[TMP35:%.*]] = load i32, ptr addrspace(21) [[TMP34]], align 4 -; POST-PROCESS-NEXT: [[TMP36:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-NEXT: [[TMP37:%.*]] = inttoptr i32 [[TMP36]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP37]], i32 0 -; POST-PROCESS-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(21) [[TMP38]], align 4 -; POST-PROCESS-NEXT: [[TMP40:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-NEXT: [[TMP41:%.*]] = inttoptr i32 [[TMP40]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP41]], i32 0 -; POST-PROCESS-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(21) [[TMP42]], align 4 -; POST-PROCESS-NEXT: [[TMP44:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-NEXT: [[TMP45:%.*]] = inttoptr i32 [[TMP44]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP46:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP45]], i32 0 -; POST-PROCESS-NEXT: [[TMP47:%.*]] = load i32, ptr addrspace(21) [[TMP46]], align 4 -; POST-PROCESS-NEXT: [[TMP48:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-NEXT: [[TMP49:%.*]] = inttoptr i32 [[TMP48]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP49]], i32 0 -; POST-PROCESS-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(21) [[TMP50]], align 4 -; POST-PROCESS-NEXT: [[TMP52:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-NEXT: [[TMP53:%.*]] = inttoptr i32 [[TMP52]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP54:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP53]], i32 0 -; POST-PROCESS-NEXT: [[TMP55:%.*]] = load i32, ptr addrspace(21) [[TMP54]], align 4 -; POST-PROCESS-NEXT: [[TMP56:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-NEXT: [[TMP57:%.*]] = inttoptr i32 [[TMP56]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP58:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP57]], i32 0 -; POST-PROCESS-NEXT: [[TMP59:%.*]] = load i32, ptr addrspace(21) [[TMP58]], align 4 -; POST-PROCESS-NEXT: [[TMP60:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-NEXT: [[TMP61:%.*]] = inttoptr i32 [[TMP60]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP62:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP61]], i32 0 -; POST-PROCESS-NEXT: [[TMP63:%.*]] = load i32, ptr addrspace(21) [[TMP62]], align 4 -; POST-PROCESS-NEXT: [[TMP64:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-NEXT: [[TMP65:%.*]] = inttoptr i32 [[TMP64]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP66:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP65]], i32 0 -; POST-PROCESS-NEXT: [[TMP67:%.*]] = load i32, ptr addrspace(21) [[TMP66]], align 4 -; POST-PROCESS-NEXT: [[TMP68:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-NEXT: [[TMP69:%.*]] = inttoptr i32 [[TMP68]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP70:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP69]], i32 0 -; POST-PROCESS-NEXT: [[TMP71:%.*]] = load i32, ptr addrspace(21) [[TMP70]], align 4 -; POST-PROCESS-NEXT: [[TMP72:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-NEXT: [[TMP73:%.*]] = inttoptr i32 [[TMP72]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP74:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP73]], i32 0 -; POST-PROCESS-NEXT: [[TMP75:%.*]] = load i32, ptr addrspace(21) [[TMP74]], align 4 -; POST-PROCESS-NEXT: [[TMP76:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-NEXT: [[TMP77:%.*]] = inttoptr i32 [[TMP76]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP78:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP77]], i32 0 -; POST-PROCESS-NEXT: [[TMP79:%.*]] = load i32, ptr addrspace(21) [[TMP78]], align 4 -; POST-PROCESS-NEXT: [[TMP80:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-NEXT: [[TMP81:%.*]] = inttoptr i32 [[TMP80]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP82:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP81]], i32 0 -; POST-PROCESS-NEXT: [[TMP83:%.*]] = load i32, ptr addrspace(21) [[TMP82]], align 4 -; POST-PROCESS-NEXT: [[TMP84:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-NEXT: [[TMP85:%.*]] = inttoptr i32 [[TMP84]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP86:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP85]], i32 0 -; POST-PROCESS-NEXT: [[TMP87:%.*]] = load i32, ptr addrspace(21) [[TMP86]], align 4 -; POST-PROCESS-NEXT: [[TMP88:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-NEXT: [[TMP89:%.*]] = inttoptr i32 [[TMP88]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP90:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP89]], i32 0 -; POST-PROCESS-NEXT: [[TMP91:%.*]] = load i32, ptr addrspace(21) [[TMP90]], align 4 -; POST-PROCESS-NEXT: [[TMP92:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-NEXT: [[TMP93:%.*]] = inttoptr i32 [[TMP92]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP94:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP93]], i32 0 -; POST-PROCESS-NEXT: [[TMP95:%.*]] = load i32, ptr addrspace(21) [[TMP94]], align 4 -; POST-PROCESS-NEXT: [[TMP96:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-NEXT: [[TMP97:%.*]] = inttoptr i32 [[TMP96]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP98:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP97]], i32 0 -; POST-PROCESS-NEXT: [[TMP99:%.*]] = load i32, ptr addrspace(21) [[TMP98]], align 4 -; POST-PROCESS-NEXT: [[TMP100:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-NEXT: [[TMP101:%.*]] = inttoptr i32 [[TMP100]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP102:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP101]], i32 0 -; POST-PROCESS-NEXT: [[TMP103:%.*]] = load i32, ptr addrspace(21) [[TMP102]], align 4 -; POST-PROCESS-NEXT: [[TMP104:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-NEXT: [[TMP105:%.*]] = inttoptr i32 [[TMP104]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP106:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP105]], i32 0 -; POST-PROCESS-NEXT: [[TMP107:%.*]] = load i32, ptr addrspace(21) [[TMP106]], align 4 -; POST-PROCESS-NEXT: [[TMP108:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-NEXT: [[TMP109:%.*]] = inttoptr i32 [[TMP108]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP110:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP109]], i32 0 -; POST-PROCESS-NEXT: [[TMP111:%.*]] = load i32, ptr addrspace(21) [[TMP110]], align 4 -; POST-PROCESS-NEXT: [[TMP112:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-NEXT: [[TMP113:%.*]] = inttoptr i32 [[TMP112]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP114:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP113]], i32 0 -; POST-PROCESS-NEXT: [[TMP115:%.*]] = load i32, ptr addrspace(21) [[TMP114]], align 4 -; POST-PROCESS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTFCA_1_0_EXTRACT]], 0 -; POST-PROCESS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; POST-PROCESS-NEXT: [[DOTSROA_0256_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-NEXT: [[TMP116:%.*]] = bitcast float [[DOTSROA_0256_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-NEXT: [[DOTSROA_0256_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-NEXT: [[TMP117:%.*]] = bitcast float [[DOTSROA_0256_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POST-PROCESS-NEXT: [[TMP118:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POST-PROCESS-NEXT: [[TMP119:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POST-PROCESS-NEXT: [[TMP120:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP118]]) -; POST-PROCESS-NEXT: [[TMP121:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP120]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POST-PROCESS-NEXT: [[TMP122:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP121]]) -; POST-PROCESS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; POST-PROCESS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POST-PROCESS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POST-PROCESS-NEXT: [[TMP149:%.*]] = call i64 @continuation.getAddrAndMD(ptr @ClosestHit.resume.0) -; POST-PROCESS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP149]], 5 -; POST-PROCESS-NEXT: [[TMP124:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP125:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP124]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP11]], ptr addrspace(21) [[TMP125]], align 4 -; POST-PROCESS-NEXT: [[TMP126:%.*]] = add i32 [[TMP1]], 4 -; POST-PROCESS-NEXT: [[TMP127:%.*]] = inttoptr i32 [[TMP126]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP128:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP127]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP15]], ptr addrspace(21) [[TMP128]], align 4 -; POST-PROCESS-NEXT: [[TMP129:%.*]] = add i32 [[TMP1]], 8 -; POST-PROCESS-NEXT: [[TMP130:%.*]] = inttoptr i32 [[TMP129]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP131:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP130]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP19]], ptr addrspace(21) [[TMP131]], align 4 -; POST-PROCESS-NEXT: [[TMP132:%.*]] = add i32 [[TMP1]], 12 -; POST-PROCESS-NEXT: [[TMP133:%.*]] = inttoptr i32 [[TMP132]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP134:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP133]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP23]], ptr addrspace(21) [[TMP134]], align 4 -; POST-PROCESS-NEXT: [[TMP135:%.*]] = add i32 [[TMP1]], 16 -; POST-PROCESS-NEXT: [[TMP136:%.*]] = inttoptr i32 [[TMP135]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP137:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP136]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP27]], ptr addrspace(21) [[TMP137]], align 4 -; POST-PROCESS-NEXT: [[TMP138:%.*]] = add i32 [[TMP1]], 20 -; POST-PROCESS-NEXT: [[TMP139:%.*]] = inttoptr i32 [[TMP138]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP140:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP139]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP31]], ptr addrspace(21) [[TMP140]], align 4 -; POST-PROCESS-NEXT: [[TMP141:%.*]] = add i32 [[TMP1]], 24 -; POST-PROCESS-NEXT: [[TMP142:%.*]] = inttoptr i32 [[TMP141]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP143:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP142]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP35]], ptr addrspace(21) [[TMP143]], align 4 -; POST-PROCESS-NEXT: [[TMP144:%.*]] = add i32 [[TMP1]], 28 -; POST-PROCESS-NEXT: [[TMP145:%.*]] = inttoptr i32 [[TMP144]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP146:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP145]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP39]], ptr addrspace(21) [[TMP146]], align 4 -; POST-PROCESS-NEXT: [[TMP147:%.*]] = add i32 [[TMP1]], 32 -; POST-PROCESS-NEXT: [[TMP148:%.*]] = inttoptr i32 [[TMP147]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP204:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP148]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP43]], ptr addrspace(21) [[TMP204]], align 4 -; POST-PROCESS-NEXT: [[TMP150:%.*]] = add i32 [[TMP1]], 36 -; POST-PROCESS-NEXT: [[TMP151:%.*]] = inttoptr i32 [[TMP150]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP152:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP151]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP47]], ptr addrspace(21) [[TMP152]], align 4 -; POST-PROCESS-NEXT: [[TMP153:%.*]] = add i32 [[TMP1]], 40 -; POST-PROCESS-NEXT: [[TMP154:%.*]] = inttoptr i32 [[TMP153]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP155:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP154]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP51]], ptr addrspace(21) [[TMP155]], align 4 -; POST-PROCESS-NEXT: [[TMP156:%.*]] = add i32 [[TMP1]], 44 -; POST-PROCESS-NEXT: [[TMP157:%.*]] = inttoptr i32 [[TMP156]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP158:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP157]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP55]], ptr addrspace(21) [[TMP158]], align 4 -; POST-PROCESS-NEXT: [[TMP159:%.*]] = add i32 [[TMP1]], 48 -; POST-PROCESS-NEXT: [[TMP160:%.*]] = inttoptr i32 [[TMP159]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP161:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP160]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP59]], ptr addrspace(21) [[TMP161]], align 4 -; POST-PROCESS-NEXT: [[TMP162:%.*]] = add i32 [[TMP1]], 52 -; POST-PROCESS-NEXT: [[TMP163:%.*]] = inttoptr i32 [[TMP162]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP164:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP163]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP63]], ptr addrspace(21) [[TMP164]], align 4 -; POST-PROCESS-NEXT: [[TMP165:%.*]] = add i32 [[TMP1]], 56 -; POST-PROCESS-NEXT: [[TMP166:%.*]] = inttoptr i32 [[TMP165]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP167:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP166]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP67]], ptr addrspace(21) [[TMP167]], align 4 -; POST-PROCESS-NEXT: [[TMP168:%.*]] = add i32 [[TMP1]], 60 -; POST-PROCESS-NEXT: [[TMP169:%.*]] = inttoptr i32 [[TMP168]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP170:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP169]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP71]], ptr addrspace(21) [[TMP170]], align 4 -; POST-PROCESS-NEXT: [[TMP171:%.*]] = add i32 [[TMP1]], 64 -; POST-PROCESS-NEXT: [[TMP172:%.*]] = inttoptr i32 [[TMP171]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP173:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP172]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP75]], ptr addrspace(21) [[TMP173]], align 4 -; POST-PROCESS-NEXT: [[TMP174:%.*]] = add i32 [[TMP1]], 68 -; POST-PROCESS-NEXT: [[TMP175:%.*]] = inttoptr i32 [[TMP174]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP176:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP175]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP79]], ptr addrspace(21) [[TMP176]], align 4 -; POST-PROCESS-NEXT: [[TMP177:%.*]] = add i32 [[TMP1]], 72 -; POST-PROCESS-NEXT: [[TMP178:%.*]] = inttoptr i32 [[TMP177]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP179:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP178]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP83]], ptr addrspace(21) [[TMP179]], align 4 -; POST-PROCESS-NEXT: [[TMP180:%.*]] = add i32 [[TMP1]], 76 -; POST-PROCESS-NEXT: [[TMP181:%.*]] = inttoptr i32 [[TMP180]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP182:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP181]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP87]], ptr addrspace(21) [[TMP182]], align 4 -; POST-PROCESS-NEXT: [[TMP183:%.*]] = add i32 [[TMP1]], 80 -; POST-PROCESS-NEXT: [[TMP184:%.*]] = inttoptr i32 [[TMP183]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP185:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP184]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP91]], ptr addrspace(21) [[TMP185]], align 4 -; POST-PROCESS-NEXT: [[TMP186:%.*]] = add i32 [[TMP1]], 84 -; POST-PROCESS-NEXT: [[TMP187:%.*]] = inttoptr i32 [[TMP186]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP188:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP187]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP95]], ptr addrspace(21) [[TMP188]], align 4 -; POST-PROCESS-NEXT: [[TMP189:%.*]] = add i32 [[TMP1]], 88 -; POST-PROCESS-NEXT: [[TMP190:%.*]] = inttoptr i32 [[TMP189]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP191:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP190]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP99]], ptr addrspace(21) [[TMP191]], align 4 -; POST-PROCESS-NEXT: [[TMP192:%.*]] = add i32 [[TMP1]], 92 -; POST-PROCESS-NEXT: [[TMP193:%.*]] = inttoptr i32 [[TMP192]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP194:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP193]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP103]], ptr addrspace(21) [[TMP194]], align 4 -; POST-PROCESS-NEXT: [[TMP195:%.*]] = add i32 [[TMP1]], 96 -; POST-PROCESS-NEXT: [[TMP196:%.*]] = inttoptr i32 [[TMP195]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP197:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP196]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP107]], ptr addrspace(21) [[TMP197]], align 4 -; POST-PROCESS-NEXT: [[TMP198:%.*]] = add i32 [[TMP1]], 100 -; POST-PROCESS-NEXT: [[TMP199:%.*]] = inttoptr i32 [[TMP198]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP200:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP199]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP111]], ptr addrspace(21) [[TMP200]], align 4 -; POST-PROCESS-NEXT: [[TMP201:%.*]] = add i32 [[TMP1]], 104 -; POST-PROCESS-NEXT: [[TMP202:%.*]] = inttoptr i32 [[TMP201]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP203:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP202]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP115]], ptr addrspace(21) [[TMP203]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_INSERT54:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP1]], 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_INSERT57:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT54]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POST-PROCESS-NEXT: [[DOTFCA_2_INSERT60:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT57]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POST-PROCESS-NEXT: [[DOTFCA_3_INSERT63:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT60]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POST-PROCESS-NEXT: [[DOTFCA_4_INSERT66:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT63]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POST-PROCESS-NEXT: [[DOTFCA_5_INSERT69:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT66]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POST-PROCESS-NEXT: [[DOTFCA_6_INSERT72:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT69]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POST-PROCESS-NEXT: [[DOTFCA_7_INSERT75:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT72]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POST-PROCESS-NEXT: [[DOTFCA_8_INSERT78:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT75]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POST-PROCESS-NEXT: [[DOTFCA_9_INSERT81:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT78]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POST-PROCESS-NEXT: [[DOTFCA_10_INSERT84:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT81]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POST-PROCESS-NEXT: [[DOTFCA_11_INSERT87:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT84]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POST-PROCESS-NEXT: [[DOTFCA_12_INSERT90:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT87]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POST-PROCESS-NEXT: [[DOTFCA_13_INSERT93:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT90]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POST-PROCESS-NEXT: [[DOTFCA_14_INSERT96:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT93]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POST-PROCESS-NEXT: [[DOTFCA_15_INSERT99:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT96]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POST-PROCESS-NEXT: [[DOTFCA_16_INSERT102:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT99]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POST-PROCESS-NEXT: [[DOTFCA_17_INSERT105:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT102]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POST-PROCESS-NEXT: [[DOTFCA_18_INSERT108:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT105]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POST-PROCESS-NEXT: [[DOTFCA_19_INSERT111:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT108]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POST-PROCESS-NEXT: [[DOTFCA_20_INSERT114:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT111]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POST-PROCESS-NEXT: [[DOTFCA_21_INSERT117:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT114]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POST-PROCESS-NEXT: [[DOTFCA_22_INSERT120:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT117]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POST-PROCESS-NEXT: [[DOTFCA_23_INSERT123:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT120]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POST-PROCESS-NEXT: [[DOTFCA_24_INSERT126:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT123]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POST-PROCESS-NEXT: [[DOTFCA_25_INSERT129:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT126]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POST-PROCESS-NEXT: [[DOTFCA_26_INSERT132:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT129]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POST-PROCESS-NEXT: [[DOTFCA_27_INSERT135:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT132]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POST-PROCESS-NEXT: [[DOTFCA_28_INSERT138:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT135]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POST-PROCESS-NEXT: [[DOTFCA_29_INSERT141:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT138]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POST-PROCESS-NEXT: [[TMP229:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP229]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT141]]) -; POST-PROCESS-NEXT: unreachable -; -; -; POST-PROCESS-LABEL: define dso_local void @ClosestHit.resume.0( -; POST-PROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META24]] !continuation [[META25]] { -; POST-PROCESS-NEXT: entryresume.0: -; POST-PROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP27:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP27]], -120 -; POST-PROCESS-NEXT: [[TMP4:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 2 -; POST-PROCESS-NEXT: [[TMP3:%.*]] = extractvalue [30 x i32] [[TMP4]], 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 1 -; POST-PROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 2 -; POST-PROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 3 -; POST-PROCESS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 4 -; POST-PROCESS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 5 -; POST-PROCESS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 6 -; POST-PROCESS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 7 -; POST-PROCESS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 8 -; POST-PROCESS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 9 -; POST-PROCESS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 10 -; POST-PROCESS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 11 -; POST-PROCESS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 12 -; POST-PROCESS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 13 -; POST-PROCESS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 14 -; POST-PROCESS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 15 -; POST-PROCESS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 16 -; POST-PROCESS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 17 -; POST-PROCESS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 18 -; POST-PROCESS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 19 -; POST-PROCESS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 20 -; POST-PROCESS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 21 -; POST-PROCESS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 22 -; POST-PROCESS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 23 -; POST-PROCESS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 24 -; POST-PROCESS-NEXT: [[TMP22:%.*]] = extractvalue [30 x i32] [[TMP4]], 25 -; POST-PROCESS-NEXT: [[TMP23:%.*]] = extractvalue [30 x i32] [[TMP4]], 26 -; POST-PROCESS-NEXT: [[TMP24:%.*]] = extractvalue [30 x i32] [[TMP4]], 27 -; POST-PROCESS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 28 -; POST-PROCESS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP4]], 29 -; POST-PROCESS-NEXT: [[TMP5:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POST-PROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 1 -; POST-PROCESS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 2 -; POST-PROCESS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 3 -; POST-PROCESS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 5 -; POST-PROCESS-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 6 -; POST-PROCESS-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 7 -; POST-PROCESS-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 8 -; POST-PROCESS-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 9 -; POST-PROCESS-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 10 -; POST-PROCESS-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 11 -; POST-PROCESS-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 12 -; POST-PROCESS-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 13 -; POST-PROCESS-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 14 -; POST-PROCESS-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 15 -; POST-PROCESS-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 16 -; POST-PROCESS-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 17 -; POST-PROCESS-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 18 -; POST-PROCESS-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 19 -; POST-PROCESS-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 20 -; POST-PROCESS-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 21 -; POST-PROCESS-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 22 -; POST-PROCESS-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 23 -; POST-PROCESS-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 24 -; POST-PROCESS-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 25 -; POST-PROCESS-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 26 -; POST-PROCESS-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 27 -; POST-PROCESS-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 28 -; POST-PROCESS-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 29 -; POST-PROCESS-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 30 -; POST-PROCESS-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 31 -; POST-PROCESS-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 32 -; POST-PROCESS-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 33 -; POST-PROCESS-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 34 -; POST-PROCESS-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 35 -; POST-PROCESS-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 36 -; POST-PROCESS-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 37 -; POST-PROCESS-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 38 -; POST-PROCESS-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 39 -; POST-PROCESS-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 40 -; POST-PROCESS-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 41 -; POST-PROCESS-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 42 -; POST-PROCESS-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 43 -; POST-PROCESS-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 44 -; POST-PROCESS-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 45 -; POST-PROCESS-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 46 -; POST-PROCESS-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 47 -; POST-PROCESS-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 48 -; POST-PROCESS-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP5]], 0, 49 -; POST-PROCESS-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP6]], i32 0 -; POST-PROCESS-NEXT: [[TMP29:%.*]] = load i32, ptr addrspace(21) [[TMP7]], align 4 -; POST-PROCESS-NEXT: [[TMP30:%.*]] = add i32 [[TMP3]], 4 -; POST-PROCESS-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP30]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP10]], i32 0 -; POST-PROCESS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(21) [[TMP11]], align 4 -; POST-PROCESS-NEXT: [[TMP34:%.*]] = add i32 [[TMP3]], 8 -; POST-PROCESS-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP34]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP14]], i32 0 -; POST-PROCESS-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(21) [[TMP15]], align 4 -; POST-PROCESS-NEXT: [[TMP38:%.*]] = add i32 [[TMP3]], 12 -; POST-PROCESS-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP38]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP18]], i32 0 -; POST-PROCESS-NEXT: [[TMP41:%.*]] = load i32, ptr addrspace(21) [[TMP19]], align 4 -; POST-PROCESS-NEXT: [[TMP42:%.*]] = add i32 [[TMP3]], 16 -; POST-PROCESS-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP42]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP25]], i32 0 -; POST-PROCESS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(21) [[TMP28]], align 4 -; POST-PROCESS-NEXT: [[TMP46:%.*]] = add i32 [[TMP3]], 20 -; POST-PROCESS-NEXT: [[TMP26:%.*]] = inttoptr i32 [[TMP46]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP26]], i32 0 -; POST-PROCESS-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(21) [[TMP32]], align 4 -; POST-PROCESS-NEXT: [[TMP50:%.*]] = add i32 [[TMP3]], 24 -; POST-PROCESS-NEXT: [[TMP36:%.*]] = inttoptr i32 [[TMP50]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP36]], i32 0 -; POST-PROCESS-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(21) [[TMP31]], align 4 -; POST-PROCESS-NEXT: [[TMP54:%.*]] = add i32 [[TMP3]], 28 -; POST-PROCESS-NEXT: [[TMP40:%.*]] = inttoptr i32 [[TMP54]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP40]], i32 0 -; POST-PROCESS-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(21) [[TMP35]], align 4 -; POST-PROCESS-NEXT: [[TMP58:%.*]] = add i32 [[TMP3]], 32 -; POST-PROCESS-NEXT: [[TMP44:%.*]] = inttoptr i32 [[TMP58]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP44]], i32 0 -; POST-PROCESS-NEXT: [[TMP61:%.*]] = load i32, ptr addrspace(21) [[TMP39]], align 4 -; POST-PROCESS-NEXT: [[TMP62:%.*]] = add i32 [[TMP3]], 36 -; POST-PROCESS-NEXT: [[TMP48:%.*]] = inttoptr i32 [[TMP62]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP43:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP48]], i32 0 -; POST-PROCESS-NEXT: [[TMP65:%.*]] = load i32, ptr addrspace(21) [[TMP43]], align 4 -; POST-PROCESS-NEXT: [[TMP66:%.*]] = add i32 [[TMP3]], 40 -; POST-PROCESS-NEXT: [[TMP52:%.*]] = inttoptr i32 [[TMP66]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP52]], i32 0 -; POST-PROCESS-NEXT: [[TMP69:%.*]] = load i32, ptr addrspace(21) [[TMP47]], align 4 -; POST-PROCESS-NEXT: [[TMP70:%.*]] = add i32 [[TMP3]], 44 -; POST-PROCESS-NEXT: [[TMP56:%.*]] = inttoptr i32 [[TMP70]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP51:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP56]], i32 0 -; POST-PROCESS-NEXT: [[TMP73:%.*]] = load i32, ptr addrspace(21) [[TMP51]], align 4 -; POST-PROCESS-NEXT: [[TMP74:%.*]] = add i32 [[TMP3]], 48 -; POST-PROCESS-NEXT: [[TMP60:%.*]] = inttoptr i32 [[TMP74]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP60]], i32 0 -; POST-PROCESS-NEXT: [[TMP77:%.*]] = load i32, ptr addrspace(21) [[TMP55]], align 4 -; POST-PROCESS-NEXT: [[TMP78:%.*]] = add i32 [[TMP3]], 52 -; POST-PROCESS-NEXT: [[TMP64:%.*]] = inttoptr i32 [[TMP78]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP64]], i32 0 -; POST-PROCESS-NEXT: [[TMP81:%.*]] = load i32, ptr addrspace(21) [[TMP59]], align 4 -; POST-PROCESS-NEXT: [[TMP82:%.*]] = add i32 [[TMP3]], 56 -; POST-PROCESS-NEXT: [[TMP68:%.*]] = inttoptr i32 [[TMP82]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP63:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP68]], i32 0 -; POST-PROCESS-NEXT: [[TMP85:%.*]] = load i32, ptr addrspace(21) [[TMP63]], align 4 -; POST-PROCESS-NEXT: [[TMP86:%.*]] = add i32 [[TMP3]], 60 -; POST-PROCESS-NEXT: [[TMP72:%.*]] = inttoptr i32 [[TMP86]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP67:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP72]], i32 0 -; POST-PROCESS-NEXT: [[TMP89:%.*]] = load i32, ptr addrspace(21) [[TMP67]], align 4 -; POST-PROCESS-NEXT: [[TMP90:%.*]] = add i32 [[TMP3]], 64 -; POST-PROCESS-NEXT: [[TMP76:%.*]] = inttoptr i32 [[TMP90]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP71:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP76]], i32 0 -; POST-PROCESS-NEXT: [[TMP93:%.*]] = load i32, ptr addrspace(21) [[TMP71]], align 4 -; POST-PROCESS-NEXT: [[TMP94:%.*]] = add i32 [[TMP3]], 68 -; POST-PROCESS-NEXT: [[TMP80:%.*]] = inttoptr i32 [[TMP94]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP75:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP80]], i32 0 -; POST-PROCESS-NEXT: [[TMP97:%.*]] = load i32, ptr addrspace(21) [[TMP75]], align 4 -; POST-PROCESS-NEXT: [[TMP98:%.*]] = add i32 [[TMP3]], 72 -; POST-PROCESS-NEXT: [[TMP84:%.*]] = inttoptr i32 [[TMP98]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP79:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP84]], i32 0 -; POST-PROCESS-NEXT: [[TMP101:%.*]] = load i32, ptr addrspace(21) [[TMP79]], align 4 -; POST-PROCESS-NEXT: [[TMP102:%.*]] = add i32 [[TMP3]], 76 -; POST-PROCESS-NEXT: [[TMP88:%.*]] = inttoptr i32 [[TMP102]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP83:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP88]], i32 0 -; POST-PROCESS-NEXT: [[TMP105:%.*]] = load i32, ptr addrspace(21) [[TMP83]], align 4 -; POST-PROCESS-NEXT: [[TMP106:%.*]] = add i32 [[TMP3]], 80 -; POST-PROCESS-NEXT: [[TMP92:%.*]] = inttoptr i32 [[TMP106]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP87:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP92]], i32 0 -; POST-PROCESS-NEXT: [[TMP109:%.*]] = load i32, ptr addrspace(21) [[TMP87]], align 4 -; POST-PROCESS-NEXT: [[TMP110:%.*]] = add i32 [[TMP3]], 84 -; POST-PROCESS-NEXT: [[TMP96:%.*]] = inttoptr i32 [[TMP110]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP91:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP96]], i32 0 -; POST-PROCESS-NEXT: [[TMP113:%.*]] = load i32, ptr addrspace(21) [[TMP91]], align 4 -; POST-PROCESS-NEXT: [[TMP114:%.*]] = add i32 [[TMP3]], 88 -; POST-PROCESS-NEXT: [[TMP100:%.*]] = inttoptr i32 [[TMP114]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP95:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP100]], i32 0 -; POST-PROCESS-NEXT: [[TMP117:%.*]] = load i32, ptr addrspace(21) [[TMP95]], align 4 -; POST-PROCESS-NEXT: [[TMP118:%.*]] = add i32 [[TMP3]], 92 -; POST-PROCESS-NEXT: [[TMP104:%.*]] = inttoptr i32 [[TMP118]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP99:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP104]], i32 0 -; POST-PROCESS-NEXT: [[TMP121:%.*]] = load i32, ptr addrspace(21) [[TMP99]], align 4 -; POST-PROCESS-NEXT: [[TMP122:%.*]] = add i32 [[TMP3]], 96 -; POST-PROCESS-NEXT: [[TMP108:%.*]] = inttoptr i32 [[TMP122]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP103:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP108]], i32 0 -; POST-PROCESS-NEXT: [[TMP125:%.*]] = load i32, ptr addrspace(21) [[TMP103]], align 4 -; POST-PROCESS-NEXT: [[TMP126:%.*]] = add i32 [[TMP3]], 100 -; POST-PROCESS-NEXT: [[TMP119:%.*]] = inttoptr i32 [[TMP126]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP107:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP119]], i32 0 -; POST-PROCESS-NEXT: [[TMP129:%.*]] = load i32, ptr addrspace(21) [[TMP107]], align 4 -; POST-PROCESS-NEXT: [[TMP130:%.*]] = add i32 [[TMP3]], 104 -; POST-PROCESS-NEXT: [[TMP124:%.*]] = inttoptr i32 [[TMP130]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP111:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP124]], i32 0 -; POST-PROCESS-NEXT: [[TMP133:%.*]] = load i32, ptr addrspace(21) [[TMP111]], align 4 -; POST-PROCESS-NEXT: [[TMP112:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP112]], 0 -; POST-PROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POST-PROCESS-NEXT: [[TMP135:%.*]] = add i32 [[TMP2]], 116 -; POST-PROCESS-NEXT: [[TMP115:%.*]] = inttoptr i32 [[TMP135]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP116:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP115]], i32 0 -; POST-PROCESS-NEXT: [[TMP141:%.*]] = load i32, ptr addrspace(21) [[TMP116]], align 4 -; POST-PROCESS-NEXT: [[TMP138:%.*]] = add i32 [[TMP2]], 108 -; POST-PROCESS-NEXT: [[TMP127:%.*]] = inttoptr i32 [[TMP138]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP140:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP127]], i32 0 -; POST-PROCESS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(21) [[TMP140]], align 4 -; POST-PROCESS-NEXT: [[TMP120:%.*]] = inttoptr i32 [[TMP141]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP143:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP120]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP29]], ptr addrspace(21) [[TMP143]], align 4 -; POST-PROCESS-NEXT: [[TMP144:%.*]] = add i32 [[TMP141]], 4 -; POST-PROCESS-NEXT: [[TMP123:%.*]] = inttoptr i32 [[TMP144]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP146:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP123]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP33]], ptr addrspace(21) [[TMP146]], align 4 -; POST-PROCESS-NEXT: [[TMP147:%.*]] = add i32 [[TMP141]], 8 -; POST-PROCESS-NEXT: [[TMP128:%.*]] = inttoptr i32 [[TMP147]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP149:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP128]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP37]], ptr addrspace(21) [[TMP149]], align 4 -; POST-PROCESS-NEXT: [[TMP150:%.*]] = add i32 [[TMP141]], 12 -; POST-PROCESS-NEXT: [[TMP131:%.*]] = inttoptr i32 [[TMP150]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP152:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP131]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP41]], ptr addrspace(21) [[TMP152]], align 4 -; POST-PROCESS-NEXT: [[TMP153:%.*]] = add i32 [[TMP141]], 16 -; POST-PROCESS-NEXT: [[TMP132:%.*]] = inttoptr i32 [[TMP153]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP155:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP132]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP45]], ptr addrspace(21) [[TMP155]], align 4 -; POST-PROCESS-NEXT: [[TMP156:%.*]] = add i32 [[TMP141]], 20 -; POST-PROCESS-NEXT: [[TMP136:%.*]] = inttoptr i32 [[TMP156]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP158:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP136]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP49]], ptr addrspace(21) [[TMP158]], align 4 -; POST-PROCESS-NEXT: [[TMP159:%.*]] = add i32 [[TMP141]], 24 -; POST-PROCESS-NEXT: [[TMP139:%.*]] = inttoptr i32 [[TMP159]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP161:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP139]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP53]], ptr addrspace(21) [[TMP161]], align 4 -; POST-PROCESS-NEXT: [[TMP162:%.*]] = add i32 [[TMP141]], 28 -; POST-PROCESS-NEXT: [[TMP142:%.*]] = inttoptr i32 [[TMP162]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP164:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP142]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP57]], ptr addrspace(21) [[TMP164]], align 4 -; POST-PROCESS-NEXT: [[TMP165:%.*]] = add i32 [[TMP141]], 32 -; POST-PROCESS-NEXT: [[TMP145:%.*]] = inttoptr i32 [[TMP165]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP167:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP145]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP61]], ptr addrspace(21) [[TMP167]], align 4 -; POST-PROCESS-NEXT: [[TMP168:%.*]] = add i32 [[TMP141]], 36 -; POST-PROCESS-NEXT: [[TMP148:%.*]] = inttoptr i32 [[TMP168]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP170:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP148]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP65]], ptr addrspace(21) [[TMP170]], align 4 -; POST-PROCESS-NEXT: [[TMP171:%.*]] = add i32 [[TMP141]], 40 -; POST-PROCESS-NEXT: [[TMP151:%.*]] = inttoptr i32 [[TMP171]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP173:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP151]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP69]], ptr addrspace(21) [[TMP173]], align 4 -; POST-PROCESS-NEXT: [[TMP174:%.*]] = add i32 [[TMP141]], 44 -; POST-PROCESS-NEXT: [[TMP154:%.*]] = inttoptr i32 [[TMP174]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP176:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP154]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP73]], ptr addrspace(21) [[TMP176]], align 4 -; POST-PROCESS-NEXT: [[TMP177:%.*]] = add i32 [[TMP141]], 48 -; POST-PROCESS-NEXT: [[TMP157:%.*]] = inttoptr i32 [[TMP177]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP179:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP157]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP77]], ptr addrspace(21) [[TMP179]], align 4 -; POST-PROCESS-NEXT: [[TMP180:%.*]] = add i32 [[TMP141]], 52 -; POST-PROCESS-NEXT: [[TMP160:%.*]] = inttoptr i32 [[TMP180]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP182:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP160]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP81]], ptr addrspace(21) [[TMP182]], align 4 -; POST-PROCESS-NEXT: [[TMP183:%.*]] = add i32 [[TMP141]], 56 -; POST-PROCESS-NEXT: [[TMP163:%.*]] = inttoptr i32 [[TMP183]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP185:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP163]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP85]], ptr addrspace(21) [[TMP185]], align 4 -; POST-PROCESS-NEXT: [[TMP186:%.*]] = add i32 [[TMP141]], 60 -; POST-PROCESS-NEXT: [[TMP166:%.*]] = inttoptr i32 [[TMP186]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP188:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP166]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP89]], ptr addrspace(21) [[TMP188]], align 4 -; POST-PROCESS-NEXT: [[TMP189:%.*]] = add i32 [[TMP141]], 64 -; POST-PROCESS-NEXT: [[TMP169:%.*]] = inttoptr i32 [[TMP189]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP191:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP169]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP93]], ptr addrspace(21) [[TMP191]], align 4 -; POST-PROCESS-NEXT: [[TMP192:%.*]] = add i32 [[TMP141]], 68 -; POST-PROCESS-NEXT: [[TMP172:%.*]] = inttoptr i32 [[TMP192]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP194:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP172]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP97]], ptr addrspace(21) [[TMP194]], align 4 -; POST-PROCESS-NEXT: [[TMP195:%.*]] = add i32 [[TMP141]], 72 -; POST-PROCESS-NEXT: [[TMP175:%.*]] = inttoptr i32 [[TMP195]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP197:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP175]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP101]], ptr addrspace(21) [[TMP197]], align 4 -; POST-PROCESS-NEXT: [[TMP198:%.*]] = add i32 [[TMP141]], 76 -; POST-PROCESS-NEXT: [[TMP178:%.*]] = inttoptr i32 [[TMP198]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP200:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP178]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP105]], ptr addrspace(21) [[TMP200]], align 4 -; POST-PROCESS-NEXT: [[TMP201:%.*]] = add i32 [[TMP141]], 80 -; POST-PROCESS-NEXT: [[TMP181:%.*]] = inttoptr i32 [[TMP201]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP203:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP181]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP109]], ptr addrspace(21) [[TMP203]], align 4 -; POST-PROCESS-NEXT: [[TMP204:%.*]] = add i32 [[TMP141]], 84 -; POST-PROCESS-NEXT: [[TMP184:%.*]] = inttoptr i32 [[TMP204]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP206:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP184]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP113]], ptr addrspace(21) [[TMP206]], align 4 -; POST-PROCESS-NEXT: [[TMP207:%.*]] = add i32 [[TMP141]], 88 -; POST-PROCESS-NEXT: [[TMP187:%.*]] = inttoptr i32 [[TMP207]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP209:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP187]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP117]], ptr addrspace(21) [[TMP209]], align 4 -; POST-PROCESS-NEXT: [[TMP210:%.*]] = add i32 [[TMP141]], 92 -; POST-PROCESS-NEXT: [[TMP190:%.*]] = inttoptr i32 [[TMP210]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP212:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP190]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP121]], ptr addrspace(21) [[TMP212]], align 4 -; POST-PROCESS-NEXT: [[TMP213:%.*]] = add i32 [[TMP141]], 96 -; POST-PROCESS-NEXT: [[TMP193:%.*]] = inttoptr i32 [[TMP213]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP215:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP193]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP125]], ptr addrspace(21) [[TMP215]], align 4 -; POST-PROCESS-NEXT: [[TMP216:%.*]] = add i32 [[TMP141]], 100 -; POST-PROCESS-NEXT: [[TMP196:%.*]] = inttoptr i32 [[TMP216]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP218:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP196]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP129]], ptr addrspace(21) [[TMP218]], align 4 -; POST-PROCESS-NEXT: [[TMP219:%.*]] = add i32 [[TMP141]], 104 -; POST-PROCESS-NEXT: [[TMP199:%.*]] = inttoptr i32 [[TMP219]] to ptr addrspace(21) -; POST-PROCESS-NEXT: [[TMP221:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP199]], i32 0 -; POST-PROCESS-NEXT: store i32 [[TMP133]], ptr addrspace(21) [[TMP221]], align 4 -; POST-PROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT]], 0 -; POST-PROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP141]], 0 -; POST-PROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT1]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POST-PROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POST-PROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POST-PROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POST-PROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POST-PROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POST-PROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POST-PROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POST-PROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POST-PROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POST-PROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POST-PROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POST-PROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POST-PROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POST-PROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POST-PROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POST-PROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POST-PROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POST-PROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POST-PROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POST-PROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POST-PROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POST-PROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POST-PROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POST-PROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[TMP22]], 25 -; POST-PROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[TMP23]], 26 -; POST-PROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[TMP24]], 27 -; POST-PROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POST-PROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POST-PROCESS-NEXT: [[TMP222:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP223:%.*]] = add i32 [[TMP222]], -120 -; POST-PROCESS-NEXT: store i32 [[TMP223]], ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: [[TMP224:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP224]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [23 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-NEXT: unreachable -; -; -; POST-PROCESS-GLOBAL-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; POST-PROCESS-GLOBAL-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; POST-PROCESS-GLOBAL-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; POST-PROCESS-GLOBAL-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; POST-PROCESS-GLOBAL-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; POST-PROCESS-GLOBAL-LABEL: define i32 @_cont_GetLocalRootIndex( -; POST-PROCESS-GLOBAL-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; POST-PROCESS-GLOBAL-NEXT: ret i32 5 -; -; -; POST-PROCESS-GLOBAL-LABEL: define void @main( -; POST-PROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !continuation.entry [[META19:![0-9]+]] !continuation [[META20:![0-9]+]] !continuation.stacksize [[META21:![0-9]+]] { -; POST-PROCESS-GLOBAL-NEXT: AllocaSpillBB: -; POST-PROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 108 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP4]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT56:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POST-PROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POST-PROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP5]]) -; POST-PROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP7]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POST-PROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP8]]) -; POST-PROCESS-GLOBAL-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT56]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = call i64 @continuation.getAddrAndMD(ptr @main.resume.0) -; POST-PROCESS-GLOBAL-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP11]], 5 -; POST-PROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP3]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP12]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = add i32 [[TMP3]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP13]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP14]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = add i32 [[TMP3]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP15]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP16]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = add i32 [[TMP3]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP17]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP18]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP19:%.*]] = add i32 [[TMP3]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP19]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP20]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP21:%.*]] = add i32 [[TMP3]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP21]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP22]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP23:%.*]] = add i32 [[TMP3]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP23]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP24]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP25:%.*]] = add i32 [[TMP3]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP25]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP26]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP27:%.*]] = add i32 [[TMP3]], 32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP27]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP28]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP29:%.*]] = add i32 [[TMP3]], 36 -; POST-PROCESS-GLOBAL-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP29]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP30]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP31:%.*]] = add i32 [[TMP3]], 40 -; POST-PROCESS-GLOBAL-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP31]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP32]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP33:%.*]] = add i32 [[TMP3]], 44 -; POST-PROCESS-GLOBAL-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP33]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP34]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP35:%.*]] = add i32 [[TMP3]], 48 -; POST-PROCESS-GLOBAL-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP35]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP36]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP37:%.*]] = add i32 [[TMP3]], 52 -; POST-PROCESS-GLOBAL-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP37]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP38]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP39:%.*]] = add i32 [[TMP3]], 56 -; POST-PROCESS-GLOBAL-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP39]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP40]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP41:%.*]] = add i32 [[TMP3]], 60 -; POST-PROCESS-GLOBAL-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP41]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP42]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP43:%.*]] = add i32 [[TMP3]], 64 -; POST-PROCESS-GLOBAL-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP43]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP44]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP45:%.*]] = add i32 [[TMP3]], 68 -; POST-PROCESS-GLOBAL-NEXT: [[TMP46:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP45]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP46]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP47:%.*]] = add i32 [[TMP3]], 72 -; POST-PROCESS-GLOBAL-NEXT: [[TMP48:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP47]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP48]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP49:%.*]] = add i32 [[TMP3]], 76 -; POST-PROCESS-GLOBAL-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP49]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP50]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP51:%.*]] = add i32 [[TMP3]], 80 -; POST-PROCESS-GLOBAL-NEXT: [[TMP52:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP51]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP52]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP53:%.*]] = add i32 [[TMP3]], 84 -; POST-PROCESS-GLOBAL-NEXT: [[TMP54:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP53]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP54]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP55:%.*]] = add i32 [[TMP3]], 88 -; POST-PROCESS-GLOBAL-NEXT: [[TMP56:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP55]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP56]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP57:%.*]] = add i32 [[TMP3]], 92 -; POST-PROCESS-GLOBAL-NEXT: [[TMP58:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP57]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP58]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP59:%.*]] = add i32 [[TMP3]], 96 -; POST-PROCESS-GLOBAL-NEXT: [[TMP60:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP59]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP60]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP61:%.*]] = add i32 [[TMP3]], 100 -; POST-PROCESS-GLOBAL-NEXT: [[TMP62:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP61]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP62]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP63:%.*]] = add i32 [[TMP3]], 104 -; POST-PROCESS-GLOBAL-NEXT: [[TMP65:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP63]] -; POST-PROCESS-GLOBAL-NEXT: store i32 undef, ptr addrspace(22) [[TMP65]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP3]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 undef, 7 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 undef, 8 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 undef, 9 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 undef, 10 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 undef, 11 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 undef, 12 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 undef, 13 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 undef, 14 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 undef, 15 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 undef, 16 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 undef, 17 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 undef, 18 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 undef, 19 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 undef, 20 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 undef, 21 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 undef, 22 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 undef, 23 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 undef, 24 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 undef, 25 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 undef, 26 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 undef, 27 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 undef, 28 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 undef, 29 -; POST-PROCESS-GLOBAL-NEXT: [[TMP64:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP64]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-GLOBAL-NEXT: unreachable -; -; -; POST-PROCESS-GLOBAL-LABEL: define dso_local void @main.resume.0( -; POST-PROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META8]] !continuation [[META20]] { -; POST-PROCESS-GLOBAL-NEXT: entryresume.0: -; POST-PROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP2]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -108 -; POST-PROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 2 -; POST-PROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = extractvalue [30 x i32] [[TMP6]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 6 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 7 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 9 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 10 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 11 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 13 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 14 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 15 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 17 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 18 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 19 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 21 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 22 -; POST-PROCESS-GLOBAL-NEXT: [[TMP22:%.*]] = extractvalue [30 x i32] [[TMP6]], 23 -; POST-PROCESS-GLOBAL-NEXT: [[TMP23:%.*]] = extractvalue [30 x i32] [[TMP6]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 25 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 26 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 27 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 29 -; POST-PROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 6 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 7 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 8 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 9 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 10 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 11 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 12 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 13 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 14 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 15 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 16 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 17 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 18 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 19 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 20 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 21 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 22 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 23 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 24 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 25 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 26 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 27 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 28 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 29 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 30 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 31 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 32 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 33 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 34 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 35 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 36 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 37 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 38 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 39 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 40 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 41 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 42 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 43 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 44 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 45 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 46 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 47 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 48 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 49 -; POST-PROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP5]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(22) [[TMP8]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP31:%.*]] = add i32 [[TMP5]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP31]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(22) [[TMP11]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP34:%.*]] = add i32 [[TMP5]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP34]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(22) [[TMP14]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP37:%.*]] = add i32 [[TMP5]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP37]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(22) [[TMP17]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP40:%.*]] = add i32 [[TMP5]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP40]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(22) [[TMP20]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP43:%.*]] = add i32 [[TMP5]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP43]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP24:%.*]] = load i32, ptr addrspace(22) [[TMP25]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP46:%.*]] = add i32 [[TMP5]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP46]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(22) [[TMP26]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP49:%.*]] = add i32 [[TMP5]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[TMP90:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP49]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(22) [[TMP90]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP52:%.*]] = add i32 [[TMP5]], 32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP52]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(22) [[TMP32]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP55:%.*]] = add i32 [[TMP5]], 36 -; POST-PROCESS-GLOBAL-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP55]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(22) [[TMP35]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP58:%.*]] = add i32 [[TMP5]], 40 -; POST-PROCESS-GLOBAL-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP58]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(22) [[TMP38]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP61:%.*]] = add i32 [[TMP5]], 44 -; POST-PROCESS-GLOBAL-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP61]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(22) [[TMP41]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP64:%.*]] = add i32 [[TMP5]], 48 -; POST-PROCESS-GLOBAL-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP64]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(22) [[TMP44]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP67:%.*]] = add i32 [[TMP5]], 52 -; POST-PROCESS-GLOBAL-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP67]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP48:%.*]] = load i32, ptr addrspace(22) [[TMP47]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP70:%.*]] = add i32 [[TMP5]], 56 -; POST-PROCESS-GLOBAL-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP70]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(22) [[TMP50]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP73:%.*]] = add i32 [[TMP5]], 60 -; POST-PROCESS-GLOBAL-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP73]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(22) [[TMP53]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP76:%.*]] = add i32 [[TMP5]], 64 -; POST-PROCESS-GLOBAL-NEXT: [[TMP56:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP76]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(22) [[TMP56]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP79:%.*]] = add i32 [[TMP5]], 68 -; POST-PROCESS-GLOBAL-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP79]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP60:%.*]] = load i32, ptr addrspace(22) [[TMP59]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP82:%.*]] = add i32 [[TMP5]], 72 -; POST-PROCESS-GLOBAL-NEXT: [[TMP62:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP82]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP63:%.*]] = load i32, ptr addrspace(22) [[TMP62]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP85:%.*]] = add i32 [[TMP5]], 76 -; POST-PROCESS-GLOBAL-NEXT: [[TMP65:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP85]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP66:%.*]] = load i32, ptr addrspace(22) [[TMP65]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP88:%.*]] = add i32 [[TMP5]], 80 -; POST-PROCESS-GLOBAL-NEXT: [[TMP68:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP88]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP69:%.*]] = load i32, ptr addrspace(22) [[TMP68]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP91:%.*]] = add i32 [[TMP5]], 84 -; POST-PROCESS-GLOBAL-NEXT: [[TMP71:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP91]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP72:%.*]] = load i32, ptr addrspace(22) [[TMP71]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP94:%.*]] = add i32 [[TMP5]], 88 -; POST-PROCESS-GLOBAL-NEXT: [[TMP74:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP94]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP75:%.*]] = load i32, ptr addrspace(22) [[TMP74]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP97:%.*]] = add i32 [[TMP5]], 92 -; POST-PROCESS-GLOBAL-NEXT: [[TMP77:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP97]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP78:%.*]] = load i32, ptr addrspace(22) [[TMP77]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP100:%.*]] = add i32 [[TMP5]], 96 -; POST-PROCESS-GLOBAL-NEXT: [[TMP80:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP100]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP81:%.*]] = load i32, ptr addrspace(22) [[TMP80]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP103:%.*]] = add i32 [[TMP5]], 100 -; POST-PROCESS-GLOBAL-NEXT: [[TMP83:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP103]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP84:%.*]] = load i32, ptr addrspace(22) [[TMP83]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP106:%.*]] = add i32 [[TMP5]], 104 -; POST-PROCESS-GLOBAL-NEXT: [[TMP86:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP106]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP93:%.*]] = load i32, ptr addrspace(22) [[TMP86]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP92:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT57:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP92]], 0 -; POST-PROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POST-PROCESS-GLOBAL-NEXT: [[TMP87:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP89:%.*]] = add i32 [[TMP87]], -108 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP89]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: ret void -; -; -; POST-PROCESS-GLOBAL-LABEL: define void @AnyHit( -; POST-PROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], [6 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation [[META23:![0-9]+]] { -; POST-PROCESS-GLOBAL-NEXT: AllocaSpillBB: -; POST-PROCESS-GLOBAL-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; POST-PROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 0, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-GLOBAL-NEXT: store <3 x i32> [[DOTFCA_0_0_0_0_EXTRACT]], ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 0, 1, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-NEXT: store <2 x float> [[DOTFCA_0_0_1_0_EXTRACT]], ptr [[DOTFCA_0_0_1_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-NEXT: store float [[DOTFCA_0_1_0_EXTRACT]], ptr [[DOTFCA_0_1_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 1, 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[DOTFCA_0_1_1_EXTRACT]], ptr [[DOTFCA_0_1_1_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POST-PROCESS-GLOBAL-NEXT: store <3 x float> [[DOTFCA_0_2_EXTRACT]], ptr [[DOTFCA_0_2_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POST-PROCESS-GLOBAL-NEXT: store <3 x float> [[DOTFCA_0_3_EXTRACT]], ptr [[DOTFCA_0_3_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POST-PROCESS-GLOBAL-NEXT: store float [[DOTFCA_0_4_EXTRACT]], ptr [[DOTFCA_0_4_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 0, 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POST-PROCESS-GLOBAL-NEXT: store i64 [[DOTFCA_0_5_EXTRACT]], ptr [[DOTFCA_0_5_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-NEXT: store float [[DOTFCA_1_0_EXTRACT]], ptr [[DOTFCA_1_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[TMP0]], 1, 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[DOTFCA_1_1_EXTRACT]], ptr [[DOTFCA_1_1_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[PAYLOAD_FCA_0_EXTRACT]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(22) [[TMP5]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP7]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(22) [[TMP8]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP10:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP10]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(22) [[TMP11]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP13]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(22) [[TMP14]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP16:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP16]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(22) [[TMP17]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP19:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP19]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(22) [[TMP20]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP22:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP22]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP24:%.*]] = load i32, ptr addrspace(22) [[TMP23]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP25:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP25]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(22) [[TMP26]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP28:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP28]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(22) [[TMP29]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP31:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-GLOBAL-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP31]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(22) [[TMP32]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP34:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-GLOBAL-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP34]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(22) [[TMP35]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP37:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-GLOBAL-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP37]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(22) [[TMP38]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP40:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-GLOBAL-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP40]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(22) [[TMP41]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP43:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-GLOBAL-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP43]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(22) [[TMP44]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP46:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-GLOBAL-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP46]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP48:%.*]] = load i32, ptr addrspace(22) [[TMP47]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP49:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-GLOBAL-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP49]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(22) [[TMP50]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP52:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-GLOBAL-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP52]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(22) [[TMP53]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP55:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-GLOBAL-NEXT: [[TMP56:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP55]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(22) [[TMP56]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP58:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-GLOBAL-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP58]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP60:%.*]] = load i32, ptr addrspace(22) [[TMP59]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP61:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-GLOBAL-NEXT: [[TMP62:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP61]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP63:%.*]] = load i32, ptr addrspace(22) [[TMP62]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP64:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-GLOBAL-NEXT: [[TMP65:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP64]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP66:%.*]] = load i32, ptr addrspace(22) [[TMP65]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP67:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-GLOBAL-NEXT: [[TMP68:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP67]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP69:%.*]] = load i32, ptr addrspace(22) [[TMP68]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP70:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-GLOBAL-NEXT: [[TMP71:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP70]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP72:%.*]] = load i32, ptr addrspace(22) [[TMP71]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP73:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-GLOBAL-NEXT: [[TMP74:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP73]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP75:%.*]] = load i32, ptr addrspace(22) [[TMP74]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP76:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-GLOBAL-NEXT: [[TMP77:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP76]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP78:%.*]] = load i32, ptr addrspace(22) [[TMP77]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP79:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-GLOBAL-NEXT: [[TMP80:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP79]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP81:%.*]] = load i32, ptr addrspace(22) [[TMP80]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP82:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-GLOBAL-NEXT: [[TMP83:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP82]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP84:%.*]] = load i32, ptr addrspace(22) [[TMP83]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP85]], i32 0, i32 1 -; POST-PROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTSROA_035_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[TMP86:%.*]] = bitcast float [[DOTSROA_035_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-NEXT: [[DOTSROA_035_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-GLOBAL-NEXT: [[TMP87:%.*]] = bitcast float [[DOTSROA_035_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], 0 -; POST-PROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POST-PROCESS-GLOBAL-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; POST-PROCESS-GLOBAL-NEXT: [[TMP88:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[PAYLOAD_FCA_0_EXTRACT]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP6]], ptr addrspace(22) [[TMP88]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP89:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP90:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP89]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP9]], ptr addrspace(22) [[TMP90]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP91:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[TMP92:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP91]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP12]], ptr addrspace(22) [[TMP92]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP93:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[TMP94:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP93]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP15]], ptr addrspace(22) [[TMP94]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP95:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[TMP96:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP95]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP18]], ptr addrspace(22) [[TMP96]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP97:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[TMP98:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP97]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP21]], ptr addrspace(22) [[TMP98]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP99:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[TMP100:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP99]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP24]], ptr addrspace(22) [[TMP100]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP101:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[TMP102:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP101]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP27]], ptr addrspace(22) [[TMP102]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP103:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP104:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP103]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP30]], ptr addrspace(22) [[TMP104]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP105:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-GLOBAL-NEXT: [[TMP106:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP105]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP33]], ptr addrspace(22) [[TMP106]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP107:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-GLOBAL-NEXT: [[TMP108:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP107]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP36]], ptr addrspace(22) [[TMP108]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP109:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-GLOBAL-NEXT: [[TMP110:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP109]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP39]], ptr addrspace(22) [[TMP110]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP111:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-GLOBAL-NEXT: [[TMP112:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP111]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP42]], ptr addrspace(22) [[TMP112]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP113:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-GLOBAL-NEXT: [[TMP114:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP113]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP45]], ptr addrspace(22) [[TMP114]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP115:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-GLOBAL-NEXT: [[TMP116:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP115]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP48]], ptr addrspace(22) [[TMP116]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP117:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-GLOBAL-NEXT: [[TMP118:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP117]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP51]], ptr addrspace(22) [[TMP118]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP119:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-GLOBAL-NEXT: [[TMP120:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP119]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP54]], ptr addrspace(22) [[TMP120]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP121:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-GLOBAL-NEXT: [[TMP122:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP121]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP57]], ptr addrspace(22) [[TMP122]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP123:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-GLOBAL-NEXT: [[TMP124:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP123]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP60]], ptr addrspace(22) [[TMP124]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP125:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-GLOBAL-NEXT: [[TMP126:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP125]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP63]], ptr addrspace(22) [[TMP126]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP127:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-GLOBAL-NEXT: [[TMP128:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP127]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP66]], ptr addrspace(22) [[TMP128]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP129:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-GLOBAL-NEXT: [[TMP130:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP129]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP69]], ptr addrspace(22) [[TMP130]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP131:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-GLOBAL-NEXT: [[TMP132:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP131]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP72]], ptr addrspace(22) [[TMP132]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP133:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-GLOBAL-NEXT: [[TMP134:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP133]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP75]], ptr addrspace(22) [[TMP134]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP135:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-GLOBAL-NEXT: [[TMP136:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP135]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP78]], ptr addrspace(22) [[TMP136]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP137:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-GLOBAL-NEXT: [[TMP138:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP137]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP81]], ptr addrspace(22) [[TMP138]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP139:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-GLOBAL-NEXT: [[TMP140:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP139]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP84]], ptr addrspace(22) [[TMP140]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[TMP141:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP142:%.*]] = bitcast i32 [[TMP141]] to float -; POST-PROCESS-GLOBAL-NEXT: [[DOTSROA_037_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP142]], i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; POST-PROCESS-GLOBAL-NEXT: [[TMP143:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP144:%.*]] = bitcast i32 [[TMP143]] to float -; POST-PROCESS-GLOBAL-NEXT: [[DOTSROA_037_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_037_0_VEC_INSERT]], float [[TMP144]], i32 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT36:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_037_4_VEC_INSERT]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[TMP145:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POST-PROCESS-GLOBAL-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP145]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT36]]) -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_0_GEP25:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP25]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_1_0_GEP26:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_0_1_0_GEP26]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_0_1_0_LOAD]], 0, 0, 1, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_GEP27:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_0_GEP27]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_1_0_INSERT]], float [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_1_GEP28:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_1_GEP28]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], i32 [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_2_GEP29:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP29]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_3_GEP30:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP30]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_4_GEP31:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP31]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_5_GEP32:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP32]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_LOAD]], 0, 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_GEP33:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP33]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_GEP34:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP34]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POST-PROCESS-GLOBAL-NEXT: [[TMP171:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP171]], i64 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-GLOBAL-NEXT: unreachable -; -; -; POST-PROCESS-GLOBAL-LABEL: define void @ClosestHit( -; POST-PROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [21 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META24:![0-9]+]] !continuation [[META25:![0-9]+]] !continuation.stacksize [[META26:![0-9]+]] { -; POST-PROCESS-GLOBAL-NEXT: AllocaSpillBB: -; POST-PROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 120 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP4]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = add i32 [[TMP3]], 108 -; POST-PROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP5]] -; POST-PROCESS-GLOBAL-NEXT: store i64 [[RETURNADDR]], ptr addrspace(22) [[TMP6]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = add i32 [[TMP3]], 116 -; POST-PROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP7]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[PAYLOAD_FCA_0_EXTRACT]], ptr addrspace(22) [[TMP8]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 1, 0 -; POST-PROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[PAYLOAD_FCA_0_EXTRACT]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(22) [[TMP9]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP11]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(22) [[TMP12]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP14]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP16:%.*]] = load i32, ptr addrspace(22) [[TMP15]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP17]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(22) [[TMP18]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP20:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP20]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP22:%.*]] = load i32, ptr addrspace(22) [[TMP21]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP23:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP23]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(22) [[TMP24]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP26:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP26]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP28:%.*]] = load i32, ptr addrspace(22) [[TMP27]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP29:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP29]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(22) [[TMP30]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP32:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP32]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP34:%.*]] = load i32, ptr addrspace(22) [[TMP33]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP35:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-GLOBAL-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP35]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(22) [[TMP36]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP38:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-GLOBAL-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP38]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP40:%.*]] = load i32, ptr addrspace(22) [[TMP39]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP41:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-GLOBAL-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP41]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(22) [[TMP42]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP44:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-GLOBAL-NEXT: [[TMP45:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP44]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP46:%.*]] = load i32, ptr addrspace(22) [[TMP45]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP47:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-GLOBAL-NEXT: [[TMP48:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP47]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(22) [[TMP48]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP50:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-GLOBAL-NEXT: [[TMP51:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP50]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP52:%.*]] = load i32, ptr addrspace(22) [[TMP51]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP53:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-GLOBAL-NEXT: [[TMP54:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP53]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP55:%.*]] = load i32, ptr addrspace(22) [[TMP54]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP56:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-GLOBAL-NEXT: [[TMP57:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP56]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP58:%.*]] = load i32, ptr addrspace(22) [[TMP57]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP59:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-GLOBAL-NEXT: [[TMP60:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP59]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP61:%.*]] = load i32, ptr addrspace(22) [[TMP60]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP62:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-GLOBAL-NEXT: [[TMP63:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP62]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP64:%.*]] = load i32, ptr addrspace(22) [[TMP63]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP65:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-GLOBAL-NEXT: [[TMP66:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP65]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP67:%.*]] = load i32, ptr addrspace(22) [[TMP66]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP68:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-GLOBAL-NEXT: [[TMP69:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP68]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP70:%.*]] = load i32, ptr addrspace(22) [[TMP69]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP71:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-GLOBAL-NEXT: [[TMP72:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP71]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP73:%.*]] = load i32, ptr addrspace(22) [[TMP72]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP74:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-GLOBAL-NEXT: [[TMP75:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP74]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP76:%.*]] = load i32, ptr addrspace(22) [[TMP75]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP77:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-GLOBAL-NEXT: [[TMP78:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP77]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP79:%.*]] = load i32, ptr addrspace(22) [[TMP78]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP80:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-GLOBAL-NEXT: [[TMP81:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP80]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP82:%.*]] = load i32, ptr addrspace(22) [[TMP81]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP83:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-GLOBAL-NEXT: [[TMP84:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP83]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP85:%.*]] = load i32, ptr addrspace(22) [[TMP84]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP86:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-GLOBAL-NEXT: [[TMP87:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP86]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP88:%.*]] = load i32, ptr addrspace(22) [[TMP87]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTFCA_1_0_EXTRACT]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTSROA_0256_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-GLOBAL-NEXT: [[TMP89:%.*]] = bitcast float [[DOTSROA_0256_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-NEXT: [[DOTSROA_0256_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-GLOBAL-NEXT: [[TMP90:%.*]] = bitcast float [[DOTSROA_0256_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POST-PROCESS-GLOBAL-NEXT: [[TMP91:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP92:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP93:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP91]]) -; POST-PROCESS-GLOBAL-NEXT: [[TMP94:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP93]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POST-PROCESS-GLOBAL-NEXT: [[TMP95:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP94]]) -; POST-PROCESS-GLOBAL-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[TMP122:%.*]] = call i64 @continuation.getAddrAndMD(ptr @ClosestHit.resume.0) -; POST-PROCESS-GLOBAL-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP122]], 5 -; POST-PROCESS-GLOBAL-NEXT: [[TMP97:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP3]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP10]], ptr addrspace(22) [[TMP97]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP98:%.*]] = add i32 [[TMP3]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP99:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP98]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP13]], ptr addrspace(22) [[TMP99]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP100:%.*]] = add i32 [[TMP3]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[TMP101:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP100]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP16]], ptr addrspace(22) [[TMP101]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP102:%.*]] = add i32 [[TMP3]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[TMP103:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP102]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP19]], ptr addrspace(22) [[TMP103]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP104:%.*]] = add i32 [[TMP3]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[TMP105:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP104]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP22]], ptr addrspace(22) [[TMP105]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP106:%.*]] = add i32 [[TMP3]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[TMP107:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP106]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP25]], ptr addrspace(22) [[TMP107]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP108:%.*]] = add i32 [[TMP3]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[TMP109:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP108]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP28]], ptr addrspace(22) [[TMP109]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP110:%.*]] = add i32 [[TMP3]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[TMP111:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP110]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP31]], ptr addrspace(22) [[TMP111]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP112:%.*]] = add i32 [[TMP3]], 32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP113:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP112]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP34]], ptr addrspace(22) [[TMP113]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP114:%.*]] = add i32 [[TMP3]], 36 -; POST-PROCESS-GLOBAL-NEXT: [[TMP115:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP114]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP37]], ptr addrspace(22) [[TMP115]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP116:%.*]] = add i32 [[TMP3]], 40 -; POST-PROCESS-GLOBAL-NEXT: [[TMP117:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP116]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP40]], ptr addrspace(22) [[TMP117]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP118:%.*]] = add i32 [[TMP3]], 44 -; POST-PROCESS-GLOBAL-NEXT: [[TMP119:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP118]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP43]], ptr addrspace(22) [[TMP119]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP120:%.*]] = add i32 [[TMP3]], 48 -; POST-PROCESS-GLOBAL-NEXT: [[TMP121:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP120]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP46]], ptr addrspace(22) [[TMP121]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP150:%.*]] = add i32 [[TMP3]], 52 -; POST-PROCESS-GLOBAL-NEXT: [[TMP123:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP150]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP49]], ptr addrspace(22) [[TMP123]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP124:%.*]] = add i32 [[TMP3]], 56 -; POST-PROCESS-GLOBAL-NEXT: [[TMP125:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP124]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP52]], ptr addrspace(22) [[TMP125]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP126:%.*]] = add i32 [[TMP3]], 60 -; POST-PROCESS-GLOBAL-NEXT: [[TMP127:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP126]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP55]], ptr addrspace(22) [[TMP127]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP128:%.*]] = add i32 [[TMP3]], 64 -; POST-PROCESS-GLOBAL-NEXT: [[TMP129:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP128]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP58]], ptr addrspace(22) [[TMP129]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP130:%.*]] = add i32 [[TMP3]], 68 -; POST-PROCESS-GLOBAL-NEXT: [[TMP131:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP130]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP61]], ptr addrspace(22) [[TMP131]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP132:%.*]] = add i32 [[TMP3]], 72 -; POST-PROCESS-GLOBAL-NEXT: [[TMP133:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP132]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP64]], ptr addrspace(22) [[TMP133]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP134:%.*]] = add i32 [[TMP3]], 76 -; POST-PROCESS-GLOBAL-NEXT: [[TMP135:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP134]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP67]], ptr addrspace(22) [[TMP135]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP136:%.*]] = add i32 [[TMP3]], 80 -; POST-PROCESS-GLOBAL-NEXT: [[TMP137:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP136]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP70]], ptr addrspace(22) [[TMP137]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP138:%.*]] = add i32 [[TMP3]], 84 -; POST-PROCESS-GLOBAL-NEXT: [[TMP139:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP138]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP73]], ptr addrspace(22) [[TMP139]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP140:%.*]] = add i32 [[TMP3]], 88 -; POST-PROCESS-GLOBAL-NEXT: [[TMP141:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP140]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP76]], ptr addrspace(22) [[TMP141]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP142:%.*]] = add i32 [[TMP3]], 92 -; POST-PROCESS-GLOBAL-NEXT: [[TMP143:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP142]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP79]], ptr addrspace(22) [[TMP143]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP144:%.*]] = add i32 [[TMP3]], 96 -; POST-PROCESS-GLOBAL-NEXT: [[TMP145:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP144]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP82]], ptr addrspace(22) [[TMP145]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP146:%.*]] = add i32 [[TMP3]], 100 -; POST-PROCESS-GLOBAL-NEXT: [[TMP147:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP146]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP85]], ptr addrspace(22) [[TMP147]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP148:%.*]] = add i32 [[TMP3]], 104 -; POST-PROCESS-GLOBAL-NEXT: [[TMP149:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP148]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP88]], ptr addrspace(22) [[TMP149]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT54:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP3]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT57:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT54]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT60:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT57]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT63:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT60]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT66:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT63]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT69:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT66]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT72:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT69]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT75:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT72]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT78:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT75]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT81:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT78]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT84:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT81]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT87:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT84]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT90:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT87]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT93:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT90]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT96:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT93]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT99:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT96]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT102:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT99]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT105:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT102]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT108:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT105]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT111:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT108]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT114:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT111]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT117:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT114]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT120:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT117]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT123:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT120]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT126:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT123]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT129:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT126]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT132:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT129]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT135:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT132]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT138:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT135]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT141:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT138]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POST-PROCESS-GLOBAL-NEXT: [[TMP175:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP175]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT141]]) -; POST-PROCESS-GLOBAL-NEXT: unreachable -; -; -; POST-PROCESS-GLOBAL-LABEL: define dso_local void @ClosestHit.resume.0( -; POST-PROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META24]] !continuation [[META25]] { -; POST-PROCESS-GLOBAL-NEXT: entryresume.0: -; POST-PROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-NEXT: [[TMP29:%.*]] = inttoptr i64 [[TMP2]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -120 -; POST-PROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 2 -; POST-PROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = extractvalue [30 x i32] [[TMP6]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 6 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 7 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 9 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 10 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 11 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 13 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 14 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 15 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 17 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 18 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 19 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 21 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 22 -; POST-PROCESS-GLOBAL-NEXT: [[TMP22:%.*]] = extractvalue [30 x i32] [[TMP6]], 23 -; POST-PROCESS-GLOBAL-NEXT: [[TMP23:%.*]] = extractvalue [30 x i32] [[TMP6]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 25 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 26 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 27 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 29 -; POST-PROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 6 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 7 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 8 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 9 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 10 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 11 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 12 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 13 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 14 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 15 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 16 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 17 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 18 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 19 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 20 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 21 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 22 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 23 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 24 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 25 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 26 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 27 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 28 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 29 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 30 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 31 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 32 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 33 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 34 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 35 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 36 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 37 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 38 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 39 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 40 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 41 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 42 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 43 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 44 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 45 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 46 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 47 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 48 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 49 -; POST-PROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP5]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(22) [[TMP8]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP31:%.*]] = add i32 [[TMP5]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP31]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(22) [[TMP11]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP34:%.*]] = add i32 [[TMP5]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP34]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(22) [[TMP14]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP37:%.*]] = add i32 [[TMP5]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP37]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(22) [[TMP17]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP40:%.*]] = add i32 [[TMP5]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP40]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(22) [[TMP20]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP43:%.*]] = add i32 [[TMP5]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP43]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(22) [[TMP24]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP46:%.*]] = add i32 [[TMP5]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP46]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP48:%.*]] = load i32, ptr addrspace(22) [[TMP26]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP49:%.*]] = add i32 [[TMP5]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[TMP89:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP49]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(22) [[TMP89]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP52:%.*]] = add i32 [[TMP5]], 32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP52]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(22) [[TMP32]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP55:%.*]] = add i32 [[TMP5]], 36 -; POST-PROCESS-GLOBAL-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP55]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(22) [[TMP35]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP58:%.*]] = add i32 [[TMP5]], 40 -; POST-PROCESS-GLOBAL-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP58]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP60:%.*]] = load i32, ptr addrspace(22) [[TMP38]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP61:%.*]] = add i32 [[TMP5]], 44 -; POST-PROCESS-GLOBAL-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP61]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP63:%.*]] = load i32, ptr addrspace(22) [[TMP41]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP64:%.*]] = add i32 [[TMP5]], 48 -; POST-PROCESS-GLOBAL-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP64]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP66:%.*]] = load i32, ptr addrspace(22) [[TMP44]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP67:%.*]] = add i32 [[TMP5]], 52 -; POST-PROCESS-GLOBAL-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP67]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP69:%.*]] = load i32, ptr addrspace(22) [[TMP47]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP70:%.*]] = add i32 [[TMP5]], 56 -; POST-PROCESS-GLOBAL-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP70]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP72:%.*]] = load i32, ptr addrspace(22) [[TMP50]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP73:%.*]] = add i32 [[TMP5]], 60 -; POST-PROCESS-GLOBAL-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP73]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP75:%.*]] = load i32, ptr addrspace(22) [[TMP53]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP76:%.*]] = add i32 [[TMP5]], 64 -; POST-PROCESS-GLOBAL-NEXT: [[TMP56:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP76]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP78:%.*]] = load i32, ptr addrspace(22) [[TMP56]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP79:%.*]] = add i32 [[TMP5]], 68 -; POST-PROCESS-GLOBAL-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP79]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP81:%.*]] = load i32, ptr addrspace(22) [[TMP59]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP82:%.*]] = add i32 [[TMP5]], 72 -; POST-PROCESS-GLOBAL-NEXT: [[TMP62:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP82]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP84:%.*]] = load i32, ptr addrspace(22) [[TMP62]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP85:%.*]] = add i32 [[TMP5]], 76 -; POST-PROCESS-GLOBAL-NEXT: [[TMP65:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP85]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP87:%.*]] = load i32, ptr addrspace(22) [[TMP65]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP88:%.*]] = add i32 [[TMP5]], 80 -; POST-PROCESS-GLOBAL-NEXT: [[TMP68:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP88]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP90:%.*]] = load i32, ptr addrspace(22) [[TMP68]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP91:%.*]] = add i32 [[TMP5]], 84 -; POST-PROCESS-GLOBAL-NEXT: [[TMP71:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP91]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP93:%.*]] = load i32, ptr addrspace(22) [[TMP71]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP94:%.*]] = add i32 [[TMP5]], 88 -; POST-PROCESS-GLOBAL-NEXT: [[TMP74:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP94]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP96:%.*]] = load i32, ptr addrspace(22) [[TMP74]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP97:%.*]] = add i32 [[TMP5]], 92 -; POST-PROCESS-GLOBAL-NEXT: [[TMP77:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP97]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP99:%.*]] = load i32, ptr addrspace(22) [[TMP77]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP100:%.*]] = add i32 [[TMP5]], 96 -; POST-PROCESS-GLOBAL-NEXT: [[TMP80:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP100]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP102:%.*]] = load i32, ptr addrspace(22) [[TMP80]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP103:%.*]] = add i32 [[TMP5]], 100 -; POST-PROCESS-GLOBAL-NEXT: [[TMP83:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP103]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP105:%.*]] = load i32, ptr addrspace(22) [[TMP83]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP106:%.*]] = add i32 [[TMP5]], 104 -; POST-PROCESS-GLOBAL-NEXT: [[TMP86:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP106]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP108:%.*]] = load i32, ptr addrspace(22) [[TMP86]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP92:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP1]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP92]], 0 -; POST-PROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POST-PROCESS-GLOBAL-NEXT: [[TMP110:%.*]] = add i32 [[TMP4]], 116 -; POST-PROCESS-GLOBAL-NEXT: [[TMP95:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP110]] -; POST-PROCESS-GLOBAL-NEXT: [[TMP114:%.*]] = load i32, ptr addrspace(22) [[TMP95]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP112:%.*]] = add i32 [[TMP4]], 108 -; POST-PROCESS-GLOBAL-NEXT: [[TMP113:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP112]] -; POST-PROCESS-GLOBAL-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(22) [[TMP113]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP115:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP114]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP30]], ptr addrspace(22) [[TMP115]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP116:%.*]] = add i32 [[TMP114]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP117:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP116]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP33]], ptr addrspace(22) [[TMP117]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP118:%.*]] = add i32 [[TMP114]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[TMP119:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP118]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP36]], ptr addrspace(22) [[TMP119]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP120:%.*]] = add i32 [[TMP114]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[TMP121:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP120]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP39]], ptr addrspace(22) [[TMP121]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP122:%.*]] = add i32 [[TMP114]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[TMP123:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP122]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP42]], ptr addrspace(22) [[TMP123]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP124:%.*]] = add i32 [[TMP114]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[TMP125:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP124]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP45]], ptr addrspace(22) [[TMP125]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP126:%.*]] = add i32 [[TMP114]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[TMP127:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP126]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP48]], ptr addrspace(22) [[TMP127]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP128:%.*]] = add i32 [[TMP114]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[TMP129:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP128]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP51]], ptr addrspace(22) [[TMP129]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP130:%.*]] = add i32 [[TMP114]], 32 -; POST-PROCESS-GLOBAL-NEXT: [[TMP131:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP130]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP54]], ptr addrspace(22) [[TMP131]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP132:%.*]] = add i32 [[TMP114]], 36 -; POST-PROCESS-GLOBAL-NEXT: [[TMP133:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP132]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP57]], ptr addrspace(22) [[TMP133]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP134:%.*]] = add i32 [[TMP114]], 40 -; POST-PROCESS-GLOBAL-NEXT: [[TMP135:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP134]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP60]], ptr addrspace(22) [[TMP135]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP136:%.*]] = add i32 [[TMP114]], 44 -; POST-PROCESS-GLOBAL-NEXT: [[TMP137:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP136]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP63]], ptr addrspace(22) [[TMP137]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP138:%.*]] = add i32 [[TMP114]], 48 -; POST-PROCESS-GLOBAL-NEXT: [[TMP139:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP138]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP66]], ptr addrspace(22) [[TMP139]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP140:%.*]] = add i32 [[TMP114]], 52 -; POST-PROCESS-GLOBAL-NEXT: [[TMP141:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP140]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP69]], ptr addrspace(22) [[TMP141]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP142:%.*]] = add i32 [[TMP114]], 56 -; POST-PROCESS-GLOBAL-NEXT: [[TMP143:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP142]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP72]], ptr addrspace(22) [[TMP143]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP144:%.*]] = add i32 [[TMP114]], 60 -; POST-PROCESS-GLOBAL-NEXT: [[TMP145:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP144]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP75]], ptr addrspace(22) [[TMP145]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP146:%.*]] = add i32 [[TMP114]], 64 -; POST-PROCESS-GLOBAL-NEXT: [[TMP147:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP146]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP78]], ptr addrspace(22) [[TMP147]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP148:%.*]] = add i32 [[TMP114]], 68 -; POST-PROCESS-GLOBAL-NEXT: [[TMP149:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP148]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP81]], ptr addrspace(22) [[TMP149]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP150:%.*]] = add i32 [[TMP114]], 72 -; POST-PROCESS-GLOBAL-NEXT: [[TMP151:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP150]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP84]], ptr addrspace(22) [[TMP151]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP152:%.*]] = add i32 [[TMP114]], 76 -; POST-PROCESS-GLOBAL-NEXT: [[TMP153:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP152]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP87]], ptr addrspace(22) [[TMP153]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP154:%.*]] = add i32 [[TMP114]], 80 -; POST-PROCESS-GLOBAL-NEXT: [[TMP155:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP154]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP90]], ptr addrspace(22) [[TMP155]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP156:%.*]] = add i32 [[TMP114]], 84 -; POST-PROCESS-GLOBAL-NEXT: [[TMP157:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP156]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP93]], ptr addrspace(22) [[TMP157]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP158:%.*]] = add i32 [[TMP114]], 88 -; POST-PROCESS-GLOBAL-NEXT: [[TMP159:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP158]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP96]], ptr addrspace(22) [[TMP159]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP160:%.*]] = add i32 [[TMP114]], 92 -; POST-PROCESS-GLOBAL-NEXT: [[TMP161:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP160]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP99]], ptr addrspace(22) [[TMP161]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP162:%.*]] = add i32 [[TMP114]], 96 -; POST-PROCESS-GLOBAL-NEXT: [[TMP163:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP162]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP102]], ptr addrspace(22) [[TMP163]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP164:%.*]] = add i32 [[TMP114]], 100 -; POST-PROCESS-GLOBAL-NEXT: [[TMP165:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP164]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP105]], ptr addrspace(22) [[TMP165]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP166:%.*]] = add i32 [[TMP114]], 104 -; POST-PROCESS-GLOBAL-NEXT: [[TMP167:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP29]], i32 [[TMP166]] -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP108]], ptr addrspace(22) [[TMP167]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP114]], 0 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT1]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[TMP22]], 23 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[TMP23]], 24 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POST-PROCESS-GLOBAL-NEXT: [[TMP168:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP169:%.*]] = add i32 [[TMP168]], -120 -; POST-PROCESS-GLOBAL-NEXT: store i32 [[TMP169]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: [[TMP170:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP170]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [23 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-GLOBAL-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; CLEANUP-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; CLEANUP-CPS-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; CLEANUP-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; CLEANUP-CPS-NEXT: ret i32 5 -; -; -; CLEANUP-CPS-LABEL: define void @main( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !lgc.cps [[META19:![0-9]+]] !continuation [[META20:![0-9]+]] !continuation.stacksize [[META21:![0-9]+]] !continuation.state [[META8]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 108) -; CLEANUP-CPS-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MAIN_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT56:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP1]]) -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP3]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP4]]) -; CLEANUP-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT56]], 0 -; CLEANUP-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @main.resume.0) -; CLEANUP-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP6]], 5 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = ptrtoint ptr addrspace(32) [[PAYLOAD_SPILL_ALLOCA]] to i32 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP8]], align 4 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 1 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP9]], align 4 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 2 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP10]], align 4 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 3 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP11]], align 4 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 4 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP12]], align 4 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 5 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP13]], align 4 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 6 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP14]], align 4 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 7 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP15]], align 4 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 8 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP16]], align 4 -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 9 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP17]], align 4 -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 10 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP18]], align 4 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 11 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP19]], align 4 -; CLEANUP-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 12 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP20]], align 4 -; CLEANUP-CPS-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 13 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP21]], align 4 -; CLEANUP-CPS-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 14 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP22]], align 4 -; CLEANUP-CPS-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 15 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP23]], align 4 -; CLEANUP-CPS-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 16 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP24]], align 4 -; CLEANUP-CPS-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 17 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP25]], align 4 -; CLEANUP-CPS-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 18 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP26]], align 4 -; CLEANUP-CPS-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 19 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP27]], align 4 -; CLEANUP-CPS-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 20 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP28]], align 4 -; CLEANUP-CPS-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 21 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP29]], align 4 -; CLEANUP-CPS-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 22 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP30]], align 4 -; CLEANUP-CPS-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 23 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP31]], align 4 -; CLEANUP-CPS-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 24 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP32]], align 4 -; CLEANUP-CPS-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 25 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP33]], align 4 -; CLEANUP-CPS-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP8]], i32 26 -; CLEANUP-CPS-NEXT: store i32 undef, ptr addrspace(32) [[TMP34]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP7]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 undef, 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 undef, 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 undef, 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 undef, 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 undef, 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 undef, 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 undef, 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 undef, 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 undef, 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 undef, 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 undef, 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 undef, 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 undef, 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 undef, 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 undef, 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 undef, 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 undef, 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 undef, 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 undef, 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 undef, 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 undef, 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 undef, 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 undef, 29 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 5, {} poison, i32 poison, i64 [[TMP6]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !waitmask [[META22:![0-9]+]], !continuation.returnedRegistercount [[META17:![0-9]+]], !continuation.registercount [[META17]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @main.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META8]] !lgc.cps [[META19]] !continuation [[META20]] !continuation.registercount [[META17]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 108) -; CLEANUP-CPS-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[MAIN_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 29 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 29 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 30 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 31 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 32 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 33 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 34 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 35 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 36 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 37 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 38 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 39 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 40 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 41 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 42 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 43 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 44 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 45 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 46 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 47 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 48 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 49 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(32) [[TMP6]], align 4 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(32) [[TMP8]], align 4 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(32) [[TMP10]], align 4 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(32) [[TMP12]], align 4 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 4 -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr addrspace(32) [[TMP14]], align 4 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 5 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(32) [[TMP16]], align 4 -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 6 -; CLEANUP-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(32) [[TMP18]], align 4 -; CLEANUP-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 7 -; CLEANUP-CPS-NEXT: [[TMP23:%.*]] = load i32, ptr addrspace(32) [[TMP20]], align 4 -; CLEANUP-CPS-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 8 -; CLEANUP-CPS-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(32) [[TMP22]], align 4 -; CLEANUP-CPS-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 9 -; CLEANUP-CPS-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(32) [[TMP24]], align 4 -; CLEANUP-CPS-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 10 -; CLEANUP-CPS-NEXT: [[TMP29:%.*]] = load i32, ptr addrspace(32) [[TMP26]], align 4 -; CLEANUP-CPS-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 11 -; CLEANUP-CPS-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(32) [[TMP28]], align 4 -; CLEANUP-CPS-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 12 -; CLEANUP-CPS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(32) [[TMP30]], align 4 -; CLEANUP-CPS-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 13 -; CLEANUP-CPS-NEXT: [[TMP35:%.*]] = load i32, ptr addrspace(32) [[TMP32]], align 4 -; CLEANUP-CPS-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 14 -; CLEANUP-CPS-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(32) [[TMP34]], align 4 -; CLEANUP-CPS-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 15 -; CLEANUP-CPS-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(32) [[TMP36]], align 4 -; CLEANUP-CPS-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 16 -; CLEANUP-CPS-NEXT: [[TMP41:%.*]] = load i32, ptr addrspace(32) [[TMP38]], align 4 -; CLEANUP-CPS-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 17 -; CLEANUP-CPS-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(32) [[TMP40]], align 4 -; CLEANUP-CPS-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 18 -; CLEANUP-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(32) [[TMP42]], align 4 -; CLEANUP-CPS-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 19 -; CLEANUP-CPS-NEXT: [[TMP47:%.*]] = load i32, ptr addrspace(32) [[TMP44]], align 4 -; CLEANUP-CPS-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 20 -; CLEANUP-CPS-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(32) [[TMP46]], align 4 -; CLEANUP-CPS-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 21 -; CLEANUP-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(32) [[TMP48]], align 4 -; CLEANUP-CPS-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 22 -; CLEANUP-CPS-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(32) [[TMP50]], align 4 -; CLEANUP-CPS-NEXT: [[TMP52:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 23 -; CLEANUP-CPS-NEXT: [[TMP55:%.*]] = load i32, ptr addrspace(32) [[TMP52]], align 4 -; CLEANUP-CPS-NEXT: [[TMP54:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 24 -; CLEANUP-CPS-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(32) [[TMP54]], align 4 -; CLEANUP-CPS-NEXT: [[TMP56:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 25 -; CLEANUP-CPS-NEXT: [[TMP59:%.*]] = load i32, ptr addrspace(32) [[TMP56]], align 4 -; CLEANUP-CPS-NEXT: [[TMP58:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 26 -; CLEANUP-CPS-NEXT: [[TMP62:%.*]] = load i32, ptr addrspace(32) [[TMP58]], align 4 -; CLEANUP-CPS-NEXT: [[TMP60:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP61:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT57:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP61]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 108) -; CLEANUP-CPS-NEXT: ret void -; -; -; CLEANUP-CPS-LABEL: define void @AnyHit( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[HIT_ATTRS:%.*]], [6 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META23:![0-9]+]] !lgc.cps [[META24:![0-9]+]] !continuation [[META25:![0-9]+]] !continuation.state [[META8]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_0_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: store <2 x float> [[SYSTEM_DATA_FCA_0_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_4_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 5 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-CPS-NEXT: store i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_5_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: store float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(32) [[TMP0]], align 4 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(32) [[TMP2]], align 4 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = load i32, ptr addrspace(32) [[TMP4]], align 4 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(32) [[TMP6]], align 4 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 4 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(32) [[TMP8]], align 4 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 5 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(32) [[TMP10]], align 4 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 6 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(32) [[TMP12]], align 4 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 7 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(32) [[TMP14]], align 4 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 8 -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr addrspace(32) [[TMP16]], align 4 -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 9 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(32) [[TMP18]], align 4 -; CLEANUP-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 10 -; CLEANUP-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(32) [[TMP20]], align 4 -; CLEANUP-CPS-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 11 -; CLEANUP-CPS-NEXT: [[TMP23:%.*]] = load i32, ptr addrspace(32) [[TMP22]], align 4 -; CLEANUP-CPS-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 12 -; CLEANUP-CPS-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(32) [[TMP24]], align 4 -; CLEANUP-CPS-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 13 -; CLEANUP-CPS-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(32) [[TMP26]], align 4 -; CLEANUP-CPS-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 14 -; CLEANUP-CPS-NEXT: [[TMP29:%.*]] = load i32, ptr addrspace(32) [[TMP28]], align 4 -; CLEANUP-CPS-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 15 -; CLEANUP-CPS-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(32) [[TMP30]], align 4 -; CLEANUP-CPS-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 16 -; CLEANUP-CPS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(32) [[TMP32]], align 4 -; CLEANUP-CPS-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 17 -; CLEANUP-CPS-NEXT: [[TMP35:%.*]] = load i32, ptr addrspace(32) [[TMP34]], align 4 -; CLEANUP-CPS-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 18 -; CLEANUP-CPS-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(32) [[TMP36]], align 4 -; CLEANUP-CPS-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 19 -; CLEANUP-CPS-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(32) [[TMP38]], align 4 -; CLEANUP-CPS-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 20 -; CLEANUP-CPS-NEXT: [[TMP41:%.*]] = load i32, ptr addrspace(32) [[TMP40]], align 4 -; CLEANUP-CPS-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 21 -; CLEANUP-CPS-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(32) [[TMP42]], align 4 -; CLEANUP-CPS-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 22 -; CLEANUP-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(32) [[TMP44]], align 4 -; CLEANUP-CPS-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 23 -; CLEANUP-CPS-NEXT: [[TMP47:%.*]] = load i32, ptr addrspace(32) [[TMP46]], align 4 -; CLEANUP-CPS-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 24 -; CLEANUP-CPS-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(32) [[TMP48]], align 4 -; CLEANUP-CPS-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 25 -; CLEANUP-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(32) [[TMP50]], align 4 -; CLEANUP-CPS-NEXT: [[TMP52:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 26 -; CLEANUP-CPS-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(32) [[TMP52]], align 4 -; CLEANUP-CPS-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP54]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_025_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP55:%.*]] = bitcast float [[DOTSROA_025_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_025_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP56:%.*]] = bitcast float [[DOTSROA_025_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[HIT_ATTRS_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[HIT_ATTRS]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; CLEANUP-CPS-NEXT: [[TMP57:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: store i32 [[TMP1]], ptr addrspace(32) [[TMP57]], align 4 -; CLEANUP-CPS-NEXT: [[TMP58:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 1 -; CLEANUP-CPS-NEXT: store i32 [[TMP3]], ptr addrspace(32) [[TMP58]], align 4 -; CLEANUP-CPS-NEXT: [[TMP59:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 2 -; CLEANUP-CPS-NEXT: store i32 [[TMP5]], ptr addrspace(32) [[TMP59]], align 4 -; CLEANUP-CPS-NEXT: [[TMP60:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 3 -; CLEANUP-CPS-NEXT: store i32 [[TMP7]], ptr addrspace(32) [[TMP60]], align 4 -; CLEANUP-CPS-NEXT: [[TMP61:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 4 -; CLEANUP-CPS-NEXT: store i32 [[TMP9]], ptr addrspace(32) [[TMP61]], align 4 -; CLEANUP-CPS-NEXT: [[TMP62:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 5 -; CLEANUP-CPS-NEXT: store i32 [[TMP11]], ptr addrspace(32) [[TMP62]], align 4 -; CLEANUP-CPS-NEXT: [[TMP63:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 6 -; CLEANUP-CPS-NEXT: store i32 [[TMP13]], ptr addrspace(32) [[TMP63]], align 4 -; CLEANUP-CPS-NEXT: [[TMP64:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 7 -; CLEANUP-CPS-NEXT: store i32 [[TMP15]], ptr addrspace(32) [[TMP64]], align 4 -; CLEANUP-CPS-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 8 -; CLEANUP-CPS-NEXT: store i32 [[TMP17]], ptr addrspace(32) [[TMP65]], align 4 -; CLEANUP-CPS-NEXT: [[TMP66:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 9 -; CLEANUP-CPS-NEXT: store i32 [[TMP19]], ptr addrspace(32) [[TMP66]], align 4 -; CLEANUP-CPS-NEXT: [[TMP67:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 10 -; CLEANUP-CPS-NEXT: store i32 [[TMP21]], ptr addrspace(32) [[TMP67]], align 4 -; CLEANUP-CPS-NEXT: [[TMP68:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 11 -; CLEANUP-CPS-NEXT: store i32 [[TMP23]], ptr addrspace(32) [[TMP68]], align 4 -; CLEANUP-CPS-NEXT: [[TMP69:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 12 -; CLEANUP-CPS-NEXT: store i32 [[TMP25]], ptr addrspace(32) [[TMP69]], align 4 -; CLEANUP-CPS-NEXT: [[TMP70:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 13 -; CLEANUP-CPS-NEXT: store i32 [[TMP27]], ptr addrspace(32) [[TMP70]], align 4 -; CLEANUP-CPS-NEXT: [[TMP71:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 14 -; CLEANUP-CPS-NEXT: store i32 [[TMP29]], ptr addrspace(32) [[TMP71]], align 4 -; CLEANUP-CPS-NEXT: [[TMP72:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 15 -; CLEANUP-CPS-NEXT: store i32 [[TMP31]], ptr addrspace(32) [[TMP72]], align 4 -; CLEANUP-CPS-NEXT: [[TMP73:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 16 -; CLEANUP-CPS-NEXT: store i32 [[TMP33]], ptr addrspace(32) [[TMP73]], align 4 -; CLEANUP-CPS-NEXT: [[TMP74:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 17 -; CLEANUP-CPS-NEXT: store i32 [[TMP35]], ptr addrspace(32) [[TMP74]], align 4 -; CLEANUP-CPS-NEXT: [[TMP75:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 18 -; CLEANUP-CPS-NEXT: store i32 [[TMP37]], ptr addrspace(32) [[TMP75]], align 4 -; CLEANUP-CPS-NEXT: [[TMP76:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 19 -; CLEANUP-CPS-NEXT: store i32 [[TMP39]], ptr addrspace(32) [[TMP76]], align 4 -; CLEANUP-CPS-NEXT: [[TMP77:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 20 -; CLEANUP-CPS-NEXT: store i32 [[TMP41]], ptr addrspace(32) [[TMP77]], align 4 -; CLEANUP-CPS-NEXT: [[TMP78:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 21 -; CLEANUP-CPS-NEXT: store i32 [[TMP43]], ptr addrspace(32) [[TMP78]], align 4 -; CLEANUP-CPS-NEXT: [[TMP79:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 22 -; CLEANUP-CPS-NEXT: store i32 [[TMP45]], ptr addrspace(32) [[TMP79]], align 4 -; CLEANUP-CPS-NEXT: [[TMP80:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 23 -; CLEANUP-CPS-NEXT: store i32 [[TMP47]], ptr addrspace(32) [[TMP80]], align 4 -; CLEANUP-CPS-NEXT: [[TMP81:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 24 -; CLEANUP-CPS-NEXT: store i32 [[TMP49]], ptr addrspace(32) [[TMP81]], align 4 -; CLEANUP-CPS-NEXT: [[TMP82:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 25 -; CLEANUP-CPS-NEXT: store i32 [[TMP51]], ptr addrspace(32) [[TMP82]], align 4 -; CLEANUP-CPS-NEXT: [[TMP83:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP57]], i32 26 -; CLEANUP-CPS-NEXT: store i32 [[TMP53]], ptr addrspace(32) [[TMP83]], align 4 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP84:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP85:%.*]] = bitcast i32 [[TMP84]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_027_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP85]], i32 0 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP86:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP87:%.*]] = bitcast i32 [[TMP86]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_027_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_027_0_VEC_INSERT]], float [[TMP87]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT26:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_027_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TMP88:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP88]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT26]]) -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_0_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_0_1_0_LOAD]], 0, 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_1_0_INSERT]], float [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], i32 [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_LOAD]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META17]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define void @ClosestHit( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [21 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META26:![0-9]+]] !lgc.cps [[META23]] !continuation [[META27:![0-9]+]] !continuation.stacksize [[META28:![0-9]+]] !continuation.state [[META29:![0-9]+]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 116) -; CLEANUP-CPS-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURNADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(32) [[RETURNADDR_SPILL_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT_SPILL_ADDR:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: store i32 [[PAYLOAD_FCA_0_EXTRACT]], ptr addrspace(32) [[PAYLOAD_FCA_0_EXTRACT_SPILL_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(32) [[TMP0]], align 4 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(32) [[TMP2]], align 4 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = load i32, ptr addrspace(32) [[TMP4]], align 4 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = load i32, ptr addrspace(32) [[TMP6]], align 4 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 4 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(32) [[TMP8]], align 4 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 5 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(32) [[TMP10]], align 4 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 6 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(32) [[TMP12]], align 4 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 7 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(32) [[TMP14]], align 4 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 8 -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr addrspace(32) [[TMP16]], align 4 -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 9 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(32) [[TMP18]], align 4 -; CLEANUP-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 10 -; CLEANUP-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(32) [[TMP20]], align 4 -; CLEANUP-CPS-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 11 -; CLEANUP-CPS-NEXT: [[TMP23:%.*]] = load i32, ptr addrspace(32) [[TMP22]], align 4 -; CLEANUP-CPS-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 12 -; CLEANUP-CPS-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(32) [[TMP24]], align 4 -; CLEANUP-CPS-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 13 -; CLEANUP-CPS-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(32) [[TMP26]], align 4 -; CLEANUP-CPS-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 14 -; CLEANUP-CPS-NEXT: [[TMP29:%.*]] = load i32, ptr addrspace(32) [[TMP28]], align 4 -; CLEANUP-CPS-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 15 -; CLEANUP-CPS-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(32) [[TMP30]], align 4 -; CLEANUP-CPS-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 16 -; CLEANUP-CPS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(32) [[TMP32]], align 4 -; CLEANUP-CPS-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 17 -; CLEANUP-CPS-NEXT: [[TMP35:%.*]] = load i32, ptr addrspace(32) [[TMP34]], align 4 -; CLEANUP-CPS-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 18 -; CLEANUP-CPS-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(32) [[TMP36]], align 4 -; CLEANUP-CPS-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 19 -; CLEANUP-CPS-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(32) [[TMP38]], align 4 -; CLEANUP-CPS-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 20 -; CLEANUP-CPS-NEXT: [[TMP41:%.*]] = load i32, ptr addrspace(32) [[TMP40]], align 4 -; CLEANUP-CPS-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 21 -; CLEANUP-CPS-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(32) [[TMP42]], align 4 -; CLEANUP-CPS-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 22 -; CLEANUP-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(32) [[TMP44]], align 4 -; CLEANUP-CPS-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 23 -; CLEANUP-CPS-NEXT: [[TMP47:%.*]] = load i32, ptr addrspace(32) [[TMP46]], align 4 -; CLEANUP-CPS-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 24 -; CLEANUP-CPS-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(32) [[TMP48]], align 4 -; CLEANUP-CPS-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 25 -; CLEANUP-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(32) [[TMP50]], align 4 -; CLEANUP-CPS-NEXT: [[TMP52:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP0]], i32 26 -; CLEANUP-CPS-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(32) [[TMP52]], align 4 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_0257_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP54:%.*]] = bitcast float [[DOTSROA_0257_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0257_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP55:%.*]] = bitcast float [[DOTSROA_0257_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[TMP56:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-CPS-NEXT: [[TMP57:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; CLEANUP-CPS-NEXT: [[TMP58:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP56]]) -; CLEANUP-CPS-NEXT: [[TMP59:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP58]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-CPS-NEXT: [[TMP60:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP59]]) -; CLEANUP-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; CLEANUP-CPS-NEXT: [[TMP61:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @ClosestHit.resume.0) -; CLEANUP-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP61]], 5 -; CLEANUP-CPS-NEXT: [[TMP62:%.*]] = ptrtoint ptr addrspace(32) [[PAYLOAD_SPILL_ALLOCA]] to i32 -; CLEANUP-CPS-NEXT: [[TMP63:%.*]] = inttoptr i32 [[TMP62]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: store i32 [[TMP1]], ptr addrspace(32) [[TMP63]], align 4 -; CLEANUP-CPS-NEXT: [[TMP64:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 1 -; CLEANUP-CPS-NEXT: store i32 [[TMP3]], ptr addrspace(32) [[TMP64]], align 4 -; CLEANUP-CPS-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 2 -; CLEANUP-CPS-NEXT: store i32 [[TMP5]], ptr addrspace(32) [[TMP65]], align 4 -; CLEANUP-CPS-NEXT: [[TMP66:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 3 -; CLEANUP-CPS-NEXT: store i32 [[TMP7]], ptr addrspace(32) [[TMP66]], align 4 -; CLEANUP-CPS-NEXT: [[TMP67:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 4 -; CLEANUP-CPS-NEXT: store i32 [[TMP9]], ptr addrspace(32) [[TMP67]], align 4 -; CLEANUP-CPS-NEXT: [[TMP68:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 5 -; CLEANUP-CPS-NEXT: store i32 [[TMP11]], ptr addrspace(32) [[TMP68]], align 4 -; CLEANUP-CPS-NEXT: [[TMP69:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 6 -; CLEANUP-CPS-NEXT: store i32 [[TMP13]], ptr addrspace(32) [[TMP69]], align 4 -; CLEANUP-CPS-NEXT: [[TMP70:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 7 -; CLEANUP-CPS-NEXT: store i32 [[TMP15]], ptr addrspace(32) [[TMP70]], align 4 -; CLEANUP-CPS-NEXT: [[TMP71:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 8 -; CLEANUP-CPS-NEXT: store i32 [[TMP17]], ptr addrspace(32) [[TMP71]], align 4 -; CLEANUP-CPS-NEXT: [[TMP72:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 9 -; CLEANUP-CPS-NEXT: store i32 [[TMP19]], ptr addrspace(32) [[TMP72]], align 4 -; CLEANUP-CPS-NEXT: [[TMP73:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 10 -; CLEANUP-CPS-NEXT: store i32 [[TMP21]], ptr addrspace(32) [[TMP73]], align 4 -; CLEANUP-CPS-NEXT: [[TMP74:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 11 -; CLEANUP-CPS-NEXT: store i32 [[TMP23]], ptr addrspace(32) [[TMP74]], align 4 -; CLEANUP-CPS-NEXT: [[TMP75:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 12 -; CLEANUP-CPS-NEXT: store i32 [[TMP25]], ptr addrspace(32) [[TMP75]], align 4 -; CLEANUP-CPS-NEXT: [[TMP76:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 13 -; CLEANUP-CPS-NEXT: store i32 [[TMP27]], ptr addrspace(32) [[TMP76]], align 4 -; CLEANUP-CPS-NEXT: [[TMP77:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 14 -; CLEANUP-CPS-NEXT: store i32 [[TMP29]], ptr addrspace(32) [[TMP77]], align 4 -; CLEANUP-CPS-NEXT: [[TMP78:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 15 -; CLEANUP-CPS-NEXT: store i32 [[TMP31]], ptr addrspace(32) [[TMP78]], align 4 -; CLEANUP-CPS-NEXT: [[TMP79:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 16 -; CLEANUP-CPS-NEXT: store i32 [[TMP33]], ptr addrspace(32) [[TMP79]], align 4 -; CLEANUP-CPS-NEXT: [[TMP80:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 17 -; CLEANUP-CPS-NEXT: store i32 [[TMP35]], ptr addrspace(32) [[TMP80]], align 4 -; CLEANUP-CPS-NEXT: [[TMP81:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 18 -; CLEANUP-CPS-NEXT: store i32 [[TMP37]], ptr addrspace(32) [[TMP81]], align 4 -; CLEANUP-CPS-NEXT: [[TMP82:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 19 -; CLEANUP-CPS-NEXT: store i32 [[TMP39]], ptr addrspace(32) [[TMP82]], align 4 -; CLEANUP-CPS-NEXT: [[TMP83:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 20 -; CLEANUP-CPS-NEXT: store i32 [[TMP41]], ptr addrspace(32) [[TMP83]], align 4 -; CLEANUP-CPS-NEXT: [[TMP84:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 21 -; CLEANUP-CPS-NEXT: store i32 [[TMP43]], ptr addrspace(32) [[TMP84]], align 4 -; CLEANUP-CPS-NEXT: [[TMP85:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 22 -; CLEANUP-CPS-NEXT: store i32 [[TMP45]], ptr addrspace(32) [[TMP85]], align 4 -; CLEANUP-CPS-NEXT: [[TMP86:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 23 -; CLEANUP-CPS-NEXT: store i32 [[TMP47]], ptr addrspace(32) [[TMP86]], align 4 -; CLEANUP-CPS-NEXT: [[TMP87:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 24 -; CLEANUP-CPS-NEXT: store i32 [[TMP49]], ptr addrspace(32) [[TMP87]], align 4 -; CLEANUP-CPS-NEXT: [[TMP88:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 25 -; CLEANUP-CPS-NEXT: store i32 [[TMP51]], ptr addrspace(32) [[TMP88]], align 4 -; CLEANUP-CPS-NEXT: [[TMP89:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP63]], i32 26 -; CLEANUP-CPS-NEXT: store i32 [[TMP53]], ptr addrspace(32) [[TMP89]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT54:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP62]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT57:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT54]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT60:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT57]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT63:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT60]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT66:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT63]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT69:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT66]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT72:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT69]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT75:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT72]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT78:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT75]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT81:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT78]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT84:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT81]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT87:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT84]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT90:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT87]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT93:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT90]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT96:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT93]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT99:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT96]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT102:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT99]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT105:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT102]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT108:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT105]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT111:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT108]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT114:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT111]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT117:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT114]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT120:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT117]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT123:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT120]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT126:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT123]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT129:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT126]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT132:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT129]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT135:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT132]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT138:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT135]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT141:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT138]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 5, {} poison, i32 poison, i64 [[TMP61]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT141]]), !waitmask [[META22]], !continuation.returnedRegistercount [[META17]], !continuation.registercount [[META17]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @ClosestHit.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META26]] !lgc.cps [[META23]] !continuation [[META27]] !continuation.registercount [[META17]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 116) -; CLEANUP-CPS-NEXT: [[PAYLOAD_SPILL_ALLOCA:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 29 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 29 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 30 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 31 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 32 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 33 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 34 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 35 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 36 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 37 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 38 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 39 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 40 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 41 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 42 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 43 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 44 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 45 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 46 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 47 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 48 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 49 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(32) [[TMP6]], align 4 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(32) [[TMP8]], align 4 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(32) [[TMP10]], align 4 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(32) [[TMP12]], align 4 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 4 -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr addrspace(32) [[TMP14]], align 4 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 5 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(32) [[TMP16]], align 4 -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 6 -; CLEANUP-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(32) [[TMP18]], align 4 -; CLEANUP-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 7 -; CLEANUP-CPS-NEXT: [[TMP23:%.*]] = load i32, ptr addrspace(32) [[TMP20]], align 4 -; CLEANUP-CPS-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 8 -; CLEANUP-CPS-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(32) [[TMP22]], align 4 -; CLEANUP-CPS-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 9 -; CLEANUP-CPS-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(32) [[TMP24]], align 4 -; CLEANUP-CPS-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 10 -; CLEANUP-CPS-NEXT: [[TMP29:%.*]] = load i32, ptr addrspace(32) [[TMP26]], align 4 -; CLEANUP-CPS-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 11 -; CLEANUP-CPS-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(32) [[TMP28]], align 4 -; CLEANUP-CPS-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 12 -; CLEANUP-CPS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(32) [[TMP30]], align 4 -; CLEANUP-CPS-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 13 -; CLEANUP-CPS-NEXT: [[TMP35:%.*]] = load i32, ptr addrspace(32) [[TMP32]], align 4 -; CLEANUP-CPS-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 14 -; CLEANUP-CPS-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(32) [[TMP34]], align 4 -; CLEANUP-CPS-NEXT: [[TMP36:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 15 -; CLEANUP-CPS-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(32) [[TMP36]], align 4 -; CLEANUP-CPS-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 16 -; CLEANUP-CPS-NEXT: [[TMP41:%.*]] = load i32, ptr addrspace(32) [[TMP38]], align 4 -; CLEANUP-CPS-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 17 -; CLEANUP-CPS-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(32) [[TMP40]], align 4 -; CLEANUP-CPS-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 18 -; CLEANUP-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(32) [[TMP42]], align 4 -; CLEANUP-CPS-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 19 -; CLEANUP-CPS-NEXT: [[TMP47:%.*]] = load i32, ptr addrspace(32) [[TMP44]], align 4 -; CLEANUP-CPS-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 20 -; CLEANUP-CPS-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(32) [[TMP46]], align 4 -; CLEANUP-CPS-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 21 -; CLEANUP-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(32) [[TMP48]], align 4 -; CLEANUP-CPS-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 22 -; CLEANUP-CPS-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(32) [[TMP50]], align 4 -; CLEANUP-CPS-NEXT: [[TMP52:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 23 -; CLEANUP-CPS-NEXT: [[TMP55:%.*]] = load i32, ptr addrspace(32) [[TMP52]], align 4 -; CLEANUP-CPS-NEXT: [[TMP54:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 24 -; CLEANUP-CPS-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(32) [[TMP54]], align 4 -; CLEANUP-CPS-NEXT: [[TMP56:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 25 -; CLEANUP-CPS-NEXT: [[TMP59:%.*]] = load i32, ptr addrspace(32) [[TMP56]], align 4 -; CLEANUP-CPS-NEXT: [[TMP58:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP6]], i32 26 -; CLEANUP-CPS-NEXT: [[TMP89:%.*]] = load i32, ptr addrspace(32) [[TMP58]], align 4 -; CLEANUP-CPS-NEXT: [[TMP60:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: [[TMP61:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT254:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP61]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD_ADDR:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD:%.*]] = load i32, ptr addrspace(32) [[PAYLOAD_FCA_0_EXTRACT_RELOAD_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[CLOSESTHIT_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[TMP62:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]] to ptr addrspace(32) -; CLEANUP-CPS-NEXT: store i32 [[TMP9]], ptr addrspace(32) [[TMP62]], align 4 -; CLEANUP-CPS-NEXT: [[TMP63:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 1 -; CLEANUP-CPS-NEXT: store i32 [[TMP11]], ptr addrspace(32) [[TMP63]], align 4 -; CLEANUP-CPS-NEXT: [[TMP64:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 2 -; CLEANUP-CPS-NEXT: store i32 [[TMP13]], ptr addrspace(32) [[TMP64]], align 4 -; CLEANUP-CPS-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 3 -; CLEANUP-CPS-NEXT: store i32 [[TMP15]], ptr addrspace(32) [[TMP65]], align 4 -; CLEANUP-CPS-NEXT: [[TMP66:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 4 -; CLEANUP-CPS-NEXT: store i32 [[TMP17]], ptr addrspace(32) [[TMP66]], align 4 -; CLEANUP-CPS-NEXT: [[TMP67:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 5 -; CLEANUP-CPS-NEXT: store i32 [[TMP19]], ptr addrspace(32) [[TMP67]], align 4 -; CLEANUP-CPS-NEXT: [[TMP68:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 6 -; CLEANUP-CPS-NEXT: store i32 [[TMP21]], ptr addrspace(32) [[TMP68]], align 4 -; CLEANUP-CPS-NEXT: [[TMP69:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 7 -; CLEANUP-CPS-NEXT: store i32 [[TMP23]], ptr addrspace(32) [[TMP69]], align 4 -; CLEANUP-CPS-NEXT: [[TMP70:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 8 -; CLEANUP-CPS-NEXT: store i32 [[TMP25]], ptr addrspace(32) [[TMP70]], align 4 -; CLEANUP-CPS-NEXT: [[TMP71:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 9 -; CLEANUP-CPS-NEXT: store i32 [[TMP27]], ptr addrspace(32) [[TMP71]], align 4 -; CLEANUP-CPS-NEXT: [[TMP72:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 10 -; CLEANUP-CPS-NEXT: store i32 [[TMP29]], ptr addrspace(32) [[TMP72]], align 4 -; CLEANUP-CPS-NEXT: [[TMP73:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 11 -; CLEANUP-CPS-NEXT: store i32 [[TMP31]], ptr addrspace(32) [[TMP73]], align 4 -; CLEANUP-CPS-NEXT: [[TMP74:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 12 -; CLEANUP-CPS-NEXT: store i32 [[TMP33]], ptr addrspace(32) [[TMP74]], align 4 -; CLEANUP-CPS-NEXT: [[TMP75:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 13 -; CLEANUP-CPS-NEXT: store i32 [[TMP35]], ptr addrspace(32) [[TMP75]], align 4 -; CLEANUP-CPS-NEXT: [[TMP76:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 14 -; CLEANUP-CPS-NEXT: store i32 [[TMP37]], ptr addrspace(32) [[TMP76]], align 4 -; CLEANUP-CPS-NEXT: [[TMP77:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 15 -; CLEANUP-CPS-NEXT: store i32 [[TMP39]], ptr addrspace(32) [[TMP77]], align 4 -; CLEANUP-CPS-NEXT: [[TMP78:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 16 -; CLEANUP-CPS-NEXT: store i32 [[TMP41]], ptr addrspace(32) [[TMP78]], align 4 -; CLEANUP-CPS-NEXT: [[TMP79:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 17 -; CLEANUP-CPS-NEXT: store i32 [[TMP43]], ptr addrspace(32) [[TMP79]], align 4 -; CLEANUP-CPS-NEXT: [[TMP80:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 18 -; CLEANUP-CPS-NEXT: store i32 [[TMP45]], ptr addrspace(32) [[TMP80]], align 4 -; CLEANUP-CPS-NEXT: [[TMP81:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 19 -; CLEANUP-CPS-NEXT: store i32 [[TMP47]], ptr addrspace(32) [[TMP81]], align 4 -; CLEANUP-CPS-NEXT: [[TMP82:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 20 -; CLEANUP-CPS-NEXT: store i32 [[TMP49]], ptr addrspace(32) [[TMP82]], align 4 -; CLEANUP-CPS-NEXT: [[TMP83:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 21 -; CLEANUP-CPS-NEXT: store i32 [[TMP51]], ptr addrspace(32) [[TMP83]], align 4 -; CLEANUP-CPS-NEXT: [[TMP84:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 22 -; CLEANUP-CPS-NEXT: store i32 [[TMP53]], ptr addrspace(32) [[TMP84]], align 4 -; CLEANUP-CPS-NEXT: [[TMP85:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 23 -; CLEANUP-CPS-NEXT: store i32 [[TMP55]], ptr addrspace(32) [[TMP85]], align 4 -; CLEANUP-CPS-NEXT: [[TMP86:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 24 -; CLEANUP-CPS-NEXT: store i32 [[TMP57]], ptr addrspace(32) [[TMP86]], align 4 -; CLEANUP-CPS-NEXT: [[TMP87:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 25 -; CLEANUP-CPS-NEXT: store i32 [[TMP59]], ptr addrspace(32) [[TMP87]], align 4 -; CLEANUP-CPS-NEXT: [[TMP88:%.*]] = getelementptr inbounds i32, ptr addrspace(32) [[TMP62]], i32 26 -; CLEANUP-CPS-NEXT: store i32 [[TMP89]], ptr addrspace(32) [[TMP88]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT253:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT254]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 116) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT253]], [23 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META17]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; POST-PROCESS-CPS-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; POST-PROCESS-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; POST-PROCESS-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; POST-PROCESS-CPS-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; POST-PROCESS-CPS-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; POST-PROCESS-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POST-PROCESS-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; POST-PROCESS-CPS-NEXT: ret i32 5 -; -; -; POST-PROCESS-CPS-LABEL: define void @main( -; POST-PROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !lgc.cps [[META19:![0-9]+]] !continuation [[META20:![0-9]+]] !continuation.stacksize [[META21:![0-9]+]] { -; POST-PROCESS-CPS-NEXT: AllocaSpillBB: -; POST-PROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 108 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT56:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POST-PROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POST-PROCESS-CPS-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POST-PROCESS-CPS-NEXT: [[TMP4:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POST-PROCESS-CPS-NEXT: [[TMP5:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP3]]) -; POST-PROCESS-CPS-NEXT: [[TMP6:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP5]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POST-PROCESS-CPS-NEXT: [[TMP7:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP6]]) -; POST-PROCESS-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT56]], 0 -; POST-PROCESS-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POST-PROCESS-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POST-PROCESS-CPS-NEXT: [[TMP8:%.*]] = call i64 @continuation.getAddrAndMD(ptr @main.resume.0) -; POST-PROCESS-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP8]], 5 -; POST-PROCESS-CPS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP10]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP11:%.*]] = add i32 [[TMP1]], 4 -; POST-PROCESS-CPS-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP11]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP12]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP13]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP14:%.*]] = add i32 [[TMP1]], 8 -; POST-PROCESS-CPS-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP15]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP16]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP17:%.*]] = add i32 [[TMP1]], 12 -; POST-PROCESS-CPS-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP17]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP18]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP19]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP20:%.*]] = add i32 [[TMP1]], 16 -; POST-PROCESS-CPS-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP20]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP21]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP22]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP23:%.*]] = add i32 [[TMP1]], 20 -; POST-PROCESS-CPS-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP23]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP24]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP25]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP26:%.*]] = add i32 [[TMP1]], 24 -; POST-PROCESS-CPS-NEXT: [[TMP27:%.*]] = inttoptr i32 [[TMP26]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP27]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP28]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP29:%.*]] = add i32 [[TMP1]], 28 -; POST-PROCESS-CPS-NEXT: [[TMP30:%.*]] = inttoptr i32 [[TMP29]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP30]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP31]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP32:%.*]] = add i32 [[TMP1]], 32 -; POST-PROCESS-CPS-NEXT: [[TMP33:%.*]] = inttoptr i32 [[TMP32]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP33]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP34]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP35:%.*]] = add i32 [[TMP1]], 36 -; POST-PROCESS-CPS-NEXT: [[TMP36:%.*]] = inttoptr i32 [[TMP35]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP36]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP37]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP38:%.*]] = add i32 [[TMP1]], 40 -; POST-PROCESS-CPS-NEXT: [[TMP39:%.*]] = inttoptr i32 [[TMP38]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP39]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP40]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP41:%.*]] = add i32 [[TMP1]], 44 -; POST-PROCESS-CPS-NEXT: [[TMP42:%.*]] = inttoptr i32 [[TMP41]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP43:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP42]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP43]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP44:%.*]] = add i32 [[TMP1]], 48 -; POST-PROCESS-CPS-NEXT: [[TMP45:%.*]] = inttoptr i32 [[TMP44]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP46:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP45]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP46]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP47:%.*]] = add i32 [[TMP1]], 52 -; POST-PROCESS-CPS-NEXT: [[TMP48:%.*]] = inttoptr i32 [[TMP47]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP49:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP48]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP49]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP50:%.*]] = add i32 [[TMP1]], 56 -; POST-PROCESS-CPS-NEXT: [[TMP51:%.*]] = inttoptr i32 [[TMP50]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP52:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP51]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP52]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP53:%.*]] = add i32 [[TMP1]], 60 -; POST-PROCESS-CPS-NEXT: [[TMP54:%.*]] = inttoptr i32 [[TMP53]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP54]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP55]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP56:%.*]] = add i32 [[TMP1]], 64 -; POST-PROCESS-CPS-NEXT: [[TMP57:%.*]] = inttoptr i32 [[TMP56]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP58:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP57]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP58]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP59:%.*]] = add i32 [[TMP1]], 68 -; POST-PROCESS-CPS-NEXT: [[TMP60:%.*]] = inttoptr i32 [[TMP59]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP61:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP60]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP61]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP62:%.*]] = add i32 [[TMP1]], 72 -; POST-PROCESS-CPS-NEXT: [[TMP63:%.*]] = inttoptr i32 [[TMP62]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP64:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP63]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP64]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP65:%.*]] = add i32 [[TMP1]], 76 -; POST-PROCESS-CPS-NEXT: [[TMP66:%.*]] = inttoptr i32 [[TMP65]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP67:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP66]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP67]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP68:%.*]] = add i32 [[TMP1]], 80 -; POST-PROCESS-CPS-NEXT: [[TMP69:%.*]] = inttoptr i32 [[TMP68]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP70:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP69]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP70]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP71:%.*]] = add i32 [[TMP1]], 84 -; POST-PROCESS-CPS-NEXT: [[TMP72:%.*]] = inttoptr i32 [[TMP71]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP73:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP72]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP73]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP74:%.*]] = add i32 [[TMP1]], 88 -; POST-PROCESS-CPS-NEXT: [[TMP75:%.*]] = inttoptr i32 [[TMP74]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP76:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP75]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP76]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP77:%.*]] = add i32 [[TMP1]], 92 -; POST-PROCESS-CPS-NEXT: [[TMP78:%.*]] = inttoptr i32 [[TMP77]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP79:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP78]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP79]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP80:%.*]] = add i32 [[TMP1]], 96 -; POST-PROCESS-CPS-NEXT: [[TMP81:%.*]] = inttoptr i32 [[TMP80]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP82:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP81]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP82]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP83:%.*]] = add i32 [[TMP1]], 100 -; POST-PROCESS-CPS-NEXT: [[TMP84:%.*]] = inttoptr i32 [[TMP83]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP85:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP84]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP85]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP86:%.*]] = add i32 [[TMP1]], 104 -; POST-PROCESS-CPS-NEXT: [[TMP87:%.*]] = inttoptr i32 [[TMP86]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP88:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP87]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 undef, ptr addrspace(21) [[TMP88]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP1]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 undef, 7 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 undef, 8 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 undef, 9 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 undef, 10 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 undef, 11 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 undef, 12 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 undef, 13 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 undef, 14 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 undef, 15 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 undef, 16 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 undef, 17 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 undef, 18 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 undef, 19 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 undef, 20 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 undef, 21 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 undef, 22 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 undef, 23 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 undef, 24 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 undef, 25 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 undef, 26 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 undef, 27 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 undef, 28 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 undef, 29 -; POST-PROCESS-CPS-NEXT: [[TMP89:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP89]], i64 [[TMP8]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-CPS-NEXT: unreachable -; -; -; POST-PROCESS-CPS-LABEL: define dso_local void @main.resume.0( -; POST-PROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META8]] !lgc.cps [[META19]] !continuation [[META20]] { -; POST-PROCESS-CPS-NEXT: entryresume.0: -; POST-PROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -108 -; POST-PROCESS-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 6 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 7 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 8 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 9 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 10 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 11 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 12 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 13 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 14 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 15 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 16 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 17 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 18 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 19 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 20 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 21 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 22 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 23 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 24 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 25 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 26 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 27 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 28 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 29 -; POST-PROCESS-CPS-NEXT: [[TMP7:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 6 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 7 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 8 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 9 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 10 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 11 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 12 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 13 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 14 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 15 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 16 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 17 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 18 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 19 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 20 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 21 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 22 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 23 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 24 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 25 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 26 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 27 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 28 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 29 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 30 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 31 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 32 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 33 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 34 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 35 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 36 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 37 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 38 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 39 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 40 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 41 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 42 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 43 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 44 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 45 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 46 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 47 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 48 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 49 -; POST-PROCESS-CPS-NEXT: [[TMP8:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP8]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr addrspace(21) [[TMP9]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP10:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 4 -; POST-PROCESS-CPS-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP12]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(21) [[TMP13]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP14:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 8 -; POST-PROCESS-CPS-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP16]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(21) [[TMP17]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP18:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 12 -; POST-PROCESS-CPS-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP18]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP20]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP23:%.*]] = load i32, ptr addrspace(21) [[TMP21]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP22:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 16 -; POST-PROCESS-CPS-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP22]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP24]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(21) [[TMP25]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP26:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 20 -; POST-PROCESS-CPS-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP26]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP28]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(21) [[TMP29]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP30:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 24 -; POST-PROCESS-CPS-NEXT: [[TMP32:%.*]] = inttoptr i32 [[TMP30]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP32]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP35:%.*]] = load i32, ptr addrspace(21) [[TMP33]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP34:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 28 -; POST-PROCESS-CPS-NEXT: [[TMP36:%.*]] = inttoptr i32 [[TMP34]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP36]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(21) [[TMP37]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP38:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 32 -; POST-PROCESS-CPS-NEXT: [[TMP40:%.*]] = inttoptr i32 [[TMP38]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP40]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(21) [[TMP41]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP42:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 36 -; POST-PROCESS-CPS-NEXT: [[TMP44:%.*]] = inttoptr i32 [[TMP42]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP45:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP44]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP47:%.*]] = load i32, ptr addrspace(21) [[TMP45]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP46:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 40 -; POST-PROCESS-CPS-NEXT: [[TMP48:%.*]] = inttoptr i32 [[TMP46]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP49:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP48]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(21) [[TMP49]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP50:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 44 -; POST-PROCESS-CPS-NEXT: [[TMP52:%.*]] = inttoptr i32 [[TMP50]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP52]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP55:%.*]] = load i32, ptr addrspace(21) [[TMP53]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP54:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 48 -; POST-PROCESS-CPS-NEXT: [[TMP56:%.*]] = inttoptr i32 [[TMP54]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP57:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP56]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP59:%.*]] = load i32, ptr addrspace(21) [[TMP57]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP58:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 52 -; POST-PROCESS-CPS-NEXT: [[TMP60:%.*]] = inttoptr i32 [[TMP58]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP61:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP60]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP63:%.*]] = load i32, ptr addrspace(21) [[TMP61]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP62:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 56 -; POST-PROCESS-CPS-NEXT: [[TMP64:%.*]] = inttoptr i32 [[TMP62]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP65:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP64]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP67:%.*]] = load i32, ptr addrspace(21) [[TMP65]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP66:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 60 -; POST-PROCESS-CPS-NEXT: [[TMP68:%.*]] = inttoptr i32 [[TMP66]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP69:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP68]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP71:%.*]] = load i32, ptr addrspace(21) [[TMP69]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP70:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 64 -; POST-PROCESS-CPS-NEXT: [[TMP72:%.*]] = inttoptr i32 [[TMP70]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP73:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP72]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP75:%.*]] = load i32, ptr addrspace(21) [[TMP73]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP74:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 68 -; POST-PROCESS-CPS-NEXT: [[TMP76:%.*]] = inttoptr i32 [[TMP74]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP77:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP76]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP79:%.*]] = load i32, ptr addrspace(21) [[TMP77]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP78:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 72 -; POST-PROCESS-CPS-NEXT: [[TMP80:%.*]] = inttoptr i32 [[TMP78]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP81:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP80]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP83:%.*]] = load i32, ptr addrspace(21) [[TMP81]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP82:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 76 -; POST-PROCESS-CPS-NEXT: [[TMP84:%.*]] = inttoptr i32 [[TMP82]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP85:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP84]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP87:%.*]] = load i32, ptr addrspace(21) [[TMP85]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP86:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 80 -; POST-PROCESS-CPS-NEXT: [[TMP88:%.*]] = inttoptr i32 [[TMP86]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP89:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP88]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP91:%.*]] = load i32, ptr addrspace(21) [[TMP89]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP90:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 84 -; POST-PROCESS-CPS-NEXT: [[TMP92:%.*]] = inttoptr i32 [[TMP90]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP93:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP92]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP95:%.*]] = load i32, ptr addrspace(21) [[TMP93]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP94:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 88 -; POST-PROCESS-CPS-NEXT: [[TMP96:%.*]] = inttoptr i32 [[TMP94]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP97:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP96]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP99:%.*]] = load i32, ptr addrspace(21) [[TMP97]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP98:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 92 -; POST-PROCESS-CPS-NEXT: [[TMP100:%.*]] = inttoptr i32 [[TMP98]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP101:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP100]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP103:%.*]] = load i32, ptr addrspace(21) [[TMP101]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP102:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 96 -; POST-PROCESS-CPS-NEXT: [[TMP104:%.*]] = inttoptr i32 [[TMP102]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP105:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP104]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP107:%.*]] = load i32, ptr addrspace(21) [[TMP105]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP106:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 100 -; POST-PROCESS-CPS-NEXT: [[TMP108:%.*]] = inttoptr i32 [[TMP106]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP109:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP108]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP111:%.*]] = load i32, ptr addrspace(21) [[TMP109]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP110:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 104 -; POST-PROCESS-CPS-NEXT: [[TMP112:%.*]] = inttoptr i32 [[TMP110]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP113:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP112]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP117:%.*]] = load i32, ptr addrspace(21) [[TMP113]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP114:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT57:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP114]], 0 -; POST-PROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POST-PROCESS-CPS-NEXT: [[TMP115:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP116:%.*]] = add i32 [[TMP115]], -108 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP116]], ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: ret void -; -; -; POST-PROCESS-CPS-LABEL: define void @AnyHit( -; POST-PROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[HIT_ATTRS:%.*]], [6 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !lgc.cps [[META23:![0-9]+]] !continuation [[META24:![0-9]+]] { -; POST-PROCESS-CPS-NEXT: AllocaSpillBB: -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; POST-PROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0, 0 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-CPS-NEXT: store <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_0_0_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 1, 0 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-CPS-NEXT: store <2 x float> [[SYSTEM_DATA_FCA_0_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_1_0_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_0_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 1 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POST-PROCESS-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_1_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 2 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POST-PROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_2_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 3 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POST-PROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_3_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POST-PROCESS-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_4_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 5 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POST-PROCESS-CPS-NEXT: store i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_5_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POST-PROCESS-CPS-NEXT: store float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_0_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POST-PROCESS-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_1_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP0:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP0]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP2:%.*]] = load i32, ptr addrspace(21) [[TMP1]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP3:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-CPS-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(21) [[TMP5]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP7:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-CPS-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP8]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(21) [[TMP9]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP11:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-CPS-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP11]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP12]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(21) [[TMP13]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP15:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-CPS-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP15]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP16]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(21) [[TMP17]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP19:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-CPS-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP19]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP20]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP22:%.*]] = load i32, ptr addrspace(21) [[TMP21]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP23:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-CPS-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP23]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP24]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP26:%.*]] = load i32, ptr addrspace(21) [[TMP25]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP27:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-CPS-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP27]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP28]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(21) [[TMP29]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP31:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-CPS-NEXT: [[TMP32:%.*]] = inttoptr i32 [[TMP31]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP32]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP34:%.*]] = load i32, ptr addrspace(21) [[TMP33]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP35:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-CPS-NEXT: [[TMP36:%.*]] = inttoptr i32 [[TMP35]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP36]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP38:%.*]] = load i32, ptr addrspace(21) [[TMP37]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP39:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-CPS-NEXT: [[TMP40:%.*]] = inttoptr i32 [[TMP39]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP40]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(21) [[TMP41]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP43:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-CPS-NEXT: [[TMP44:%.*]] = inttoptr i32 [[TMP43]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP45:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP44]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP46:%.*]] = load i32, ptr addrspace(21) [[TMP45]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP47:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-CPS-NEXT: [[TMP48:%.*]] = inttoptr i32 [[TMP47]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP49:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP48]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP50:%.*]] = load i32, ptr addrspace(21) [[TMP49]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP51:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-CPS-NEXT: [[TMP52:%.*]] = inttoptr i32 [[TMP51]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP52]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(21) [[TMP53]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP55:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-CPS-NEXT: [[TMP56:%.*]] = inttoptr i32 [[TMP55]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP57:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP56]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP58:%.*]] = load i32, ptr addrspace(21) [[TMP57]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP59:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-CPS-NEXT: [[TMP60:%.*]] = inttoptr i32 [[TMP59]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP61:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP60]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP62:%.*]] = load i32, ptr addrspace(21) [[TMP61]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP63:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-CPS-NEXT: [[TMP64:%.*]] = inttoptr i32 [[TMP63]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP65:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP64]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP66:%.*]] = load i32, ptr addrspace(21) [[TMP65]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP67:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-CPS-NEXT: [[TMP68:%.*]] = inttoptr i32 [[TMP67]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP69:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP68]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP70:%.*]] = load i32, ptr addrspace(21) [[TMP69]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP71:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-CPS-NEXT: [[TMP72:%.*]] = inttoptr i32 [[TMP71]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP73:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP72]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP74:%.*]] = load i32, ptr addrspace(21) [[TMP73]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP75:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-CPS-NEXT: [[TMP76:%.*]] = inttoptr i32 [[TMP75]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP77:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP76]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP78:%.*]] = load i32, ptr addrspace(21) [[TMP77]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP79:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-CPS-NEXT: [[TMP80:%.*]] = inttoptr i32 [[TMP79]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP81:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP80]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP82:%.*]] = load i32, ptr addrspace(21) [[TMP81]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP83:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-CPS-NEXT: [[TMP84:%.*]] = inttoptr i32 [[TMP83]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP85:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP84]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP86:%.*]] = load i32, ptr addrspace(21) [[TMP85]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP87:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-CPS-NEXT: [[TMP88:%.*]] = inttoptr i32 [[TMP87]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP89:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP88]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP90:%.*]] = load i32, ptr addrspace(21) [[TMP89]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP91:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-CPS-NEXT: [[TMP92:%.*]] = inttoptr i32 [[TMP91]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP93:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP92]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP94:%.*]] = load i32, ptr addrspace(21) [[TMP93]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP95:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-CPS-NEXT: [[TMP96:%.*]] = inttoptr i32 [[TMP95]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP97:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP96]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP98:%.*]] = load i32, ptr addrspace(21) [[TMP97]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP99:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-CPS-NEXT: [[TMP100:%.*]] = inttoptr i32 [[TMP99]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP101:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP100]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP102:%.*]] = load i32, ptr addrspace(21) [[TMP101]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP103:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-CPS-NEXT: [[TMP104:%.*]] = inttoptr i32 [[TMP103]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP105:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP104]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP106:%.*]] = load i32, ptr addrspace(21) [[TMP105]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP107:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POST-PROCESS-CPS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP107]], i32 0, i32 1 -; POST-PROCESS-CPS-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; POST-PROCESS-CPS-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; POST-PROCESS-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTSROA_025_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP108:%.*]] = bitcast float [[DOTSROA_025_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-CPS-NEXT: [[DOTSROA_025_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-CPS-NEXT: [[TMP109:%.*]] = bitcast float [[DOTSROA_025_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-CPS-NEXT: [[HIT_ATTRS_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[HIT_ATTRS]], 0 -; POST-PROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POST-PROCESS-CPS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; POST-PROCESS-CPS-NEXT: [[TMP110:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP111:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP110]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP2]], ptr addrspace(21) [[TMP111]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP112:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-CPS-NEXT: [[TMP113:%.*]] = inttoptr i32 [[TMP112]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP114:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP113]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP6]], ptr addrspace(21) [[TMP114]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP115:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-CPS-NEXT: [[TMP116:%.*]] = inttoptr i32 [[TMP115]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP117:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP116]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP10]], ptr addrspace(21) [[TMP117]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP118:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-CPS-NEXT: [[TMP119:%.*]] = inttoptr i32 [[TMP118]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP120:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP119]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP14]], ptr addrspace(21) [[TMP120]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP121:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-CPS-NEXT: [[TMP122:%.*]] = inttoptr i32 [[TMP121]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP123:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP122]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP18]], ptr addrspace(21) [[TMP123]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP124:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-CPS-NEXT: [[TMP125:%.*]] = inttoptr i32 [[TMP124]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP126:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP125]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP22]], ptr addrspace(21) [[TMP126]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP127:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-CPS-NEXT: [[TMP128:%.*]] = inttoptr i32 [[TMP127]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP129:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP128]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP26]], ptr addrspace(21) [[TMP129]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP130:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-CPS-NEXT: [[TMP131:%.*]] = inttoptr i32 [[TMP130]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP132:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP131]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP30]], ptr addrspace(21) [[TMP132]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP133:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-CPS-NEXT: [[TMP134:%.*]] = inttoptr i32 [[TMP133]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP135:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP134]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP34]], ptr addrspace(21) [[TMP135]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP136:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-CPS-NEXT: [[TMP137:%.*]] = inttoptr i32 [[TMP136]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP138:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP137]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP38]], ptr addrspace(21) [[TMP138]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP139:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-CPS-NEXT: [[TMP140:%.*]] = inttoptr i32 [[TMP139]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP141:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP140]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP42]], ptr addrspace(21) [[TMP141]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP142:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-CPS-NEXT: [[TMP143:%.*]] = inttoptr i32 [[TMP142]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP144:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP143]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP46]], ptr addrspace(21) [[TMP144]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP145:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-CPS-NEXT: [[TMP146:%.*]] = inttoptr i32 [[TMP145]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP147:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP146]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP50]], ptr addrspace(21) [[TMP147]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP148:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-CPS-NEXT: [[TMP149:%.*]] = inttoptr i32 [[TMP148]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP150:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP149]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP54]], ptr addrspace(21) [[TMP150]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP151:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-CPS-NEXT: [[TMP152:%.*]] = inttoptr i32 [[TMP151]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP153:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP152]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP58]], ptr addrspace(21) [[TMP153]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP154:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-CPS-NEXT: [[TMP155:%.*]] = inttoptr i32 [[TMP154]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP156:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP155]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP62]], ptr addrspace(21) [[TMP156]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP157:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-CPS-NEXT: [[TMP158:%.*]] = inttoptr i32 [[TMP157]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP159:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP158]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP66]], ptr addrspace(21) [[TMP159]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP160:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-CPS-NEXT: [[TMP161:%.*]] = inttoptr i32 [[TMP160]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP162:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP161]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP70]], ptr addrspace(21) [[TMP162]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP163:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-CPS-NEXT: [[TMP164:%.*]] = inttoptr i32 [[TMP163]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP165:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP164]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP74]], ptr addrspace(21) [[TMP165]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP166:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-CPS-NEXT: [[TMP167:%.*]] = inttoptr i32 [[TMP166]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP168:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP167]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP78]], ptr addrspace(21) [[TMP168]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP169:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-CPS-NEXT: [[TMP170:%.*]] = inttoptr i32 [[TMP169]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP171:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP170]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP82]], ptr addrspace(21) [[TMP171]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP172:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-CPS-NEXT: [[TMP173:%.*]] = inttoptr i32 [[TMP172]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP174:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP173]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP86]], ptr addrspace(21) [[TMP174]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP175:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-CPS-NEXT: [[TMP176:%.*]] = inttoptr i32 [[TMP175]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP177:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP176]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP90]], ptr addrspace(21) [[TMP177]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP178:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-CPS-NEXT: [[TMP179:%.*]] = inttoptr i32 [[TMP178]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP180:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP179]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP94]], ptr addrspace(21) [[TMP180]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP181:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-CPS-NEXT: [[TMP182:%.*]] = inttoptr i32 [[TMP181]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP183:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP182]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP98]], ptr addrspace(21) [[TMP183]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP184:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-CPS-NEXT: [[TMP185:%.*]] = inttoptr i32 [[TMP184]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP186:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP185]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP102]], ptr addrspace(21) [[TMP186]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP187:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-CPS-NEXT: [[TMP188:%.*]] = inttoptr i32 [[TMP187]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP189:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP188]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP106]], ptr addrspace(21) [[TMP189]], align 4 -; POST-PROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP190:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-CPS-NEXT: [[TMP191:%.*]] = bitcast i32 [[TMP190]] to float -; POST-PROCESS-CPS-NEXT: [[DOTSROA_027_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP191]], i32 0 -; POST-PROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-CPS-NEXT: [[TMP192:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-CPS-NEXT: [[TMP193:%.*]] = bitcast i32 [[TMP192]] to float -; POST-PROCESS-CPS-NEXT: [[DOTSROA_027_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_027_0_VEC_INSERT]], float [[TMP193]], i32 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_INSERT26:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_027_4_VEC_INSERT]], 0 -; POST-PROCESS-CPS-NEXT: [[TMP194:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POST-PROCESS-CPS-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP194]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT26]]) -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_0_1_0_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_0_1_0_LOAD]], 0, 0, 1, 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_0_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_1_0_INSERT]], float [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_1_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], i32 [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_LOAD]], 0, 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POST-PROCESS-CPS-NEXT: [[TMP195:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POST-PROCESS-CPS-NEXT: [[TMP196:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP195]], i32 [[TMP196]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-CPS-NEXT: unreachable -; -; -; POST-PROCESS-CPS-LABEL: define void @ClosestHit( -; POST-PROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [21 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META25:![0-9]+]] !lgc.cps [[META22]] !continuation [[META26:![0-9]+]] !continuation.stacksize [[META27:![0-9]+]] { -; POST-PROCESS-CPS-NEXT: AllocaSpillBB: -; POST-PROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 116 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP2:%.*]] = add i32 [[TMP0]], 108 -; POST-PROCESS-CPS-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(21) [[TMP4]], align 4 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POST-PROCESS-CPS-NEXT: [[TMP5:%.*]] = add i32 [[TMP0]], 112 -; POST-PROCESS-CPS-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP6]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[PAYLOAD_FCA_0_EXTRACT]], ptr addrspace(21) [[TMP7]], align 4 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; POST-PROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 1, 0 -; POST-PROCESS-CPS-NEXT: [[TMP8:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP8]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(21) [[TMP9]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP11:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-CPS-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP11]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP12]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr addrspace(21) [[TMP13]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP15:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-CPS-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP15]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP16]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(21) [[TMP17]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP19:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-CPS-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP19]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP20]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP22:%.*]] = load i32, ptr addrspace(21) [[TMP21]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP23:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-CPS-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP23]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP24]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP26:%.*]] = load i32, ptr addrspace(21) [[TMP25]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP27:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-CPS-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP27]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP28]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(21) [[TMP29]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP31:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-CPS-NEXT: [[TMP32:%.*]] = inttoptr i32 [[TMP31]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP32]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP34:%.*]] = load i32, ptr addrspace(21) [[TMP33]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP35:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-CPS-NEXT: [[TMP36:%.*]] = inttoptr i32 [[TMP35]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP36]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP38:%.*]] = load i32, ptr addrspace(21) [[TMP37]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP39:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-CPS-NEXT: [[TMP40:%.*]] = inttoptr i32 [[TMP39]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP40]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(21) [[TMP41]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP43:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-CPS-NEXT: [[TMP44:%.*]] = inttoptr i32 [[TMP43]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP45:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP44]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP46:%.*]] = load i32, ptr addrspace(21) [[TMP45]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP47:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-CPS-NEXT: [[TMP48:%.*]] = inttoptr i32 [[TMP47]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP49:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP48]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP50:%.*]] = load i32, ptr addrspace(21) [[TMP49]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP51:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-CPS-NEXT: [[TMP52:%.*]] = inttoptr i32 [[TMP51]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP52]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(21) [[TMP53]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP55:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-CPS-NEXT: [[TMP56:%.*]] = inttoptr i32 [[TMP55]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP57:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP56]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP58:%.*]] = load i32, ptr addrspace(21) [[TMP57]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP59:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-CPS-NEXT: [[TMP60:%.*]] = inttoptr i32 [[TMP59]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP61:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP60]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP62:%.*]] = load i32, ptr addrspace(21) [[TMP61]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP63:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-CPS-NEXT: [[TMP64:%.*]] = inttoptr i32 [[TMP63]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP65:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP64]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP66:%.*]] = load i32, ptr addrspace(21) [[TMP65]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP67:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-CPS-NEXT: [[TMP68:%.*]] = inttoptr i32 [[TMP67]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP69:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP68]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP70:%.*]] = load i32, ptr addrspace(21) [[TMP69]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP71:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-CPS-NEXT: [[TMP72:%.*]] = inttoptr i32 [[TMP71]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP73:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP72]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP74:%.*]] = load i32, ptr addrspace(21) [[TMP73]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP75:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-CPS-NEXT: [[TMP76:%.*]] = inttoptr i32 [[TMP75]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP77:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP76]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP78:%.*]] = load i32, ptr addrspace(21) [[TMP77]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP79:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-CPS-NEXT: [[TMP80:%.*]] = inttoptr i32 [[TMP79]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP81:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP80]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP82:%.*]] = load i32, ptr addrspace(21) [[TMP81]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP83:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-CPS-NEXT: [[TMP84:%.*]] = inttoptr i32 [[TMP83]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP85:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP84]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP86:%.*]] = load i32, ptr addrspace(21) [[TMP85]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP87:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-CPS-NEXT: [[TMP88:%.*]] = inttoptr i32 [[TMP87]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP89:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP88]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP90:%.*]] = load i32, ptr addrspace(21) [[TMP89]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP91:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-CPS-NEXT: [[TMP92:%.*]] = inttoptr i32 [[TMP91]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP93:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP92]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP94:%.*]] = load i32, ptr addrspace(21) [[TMP93]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP95:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-CPS-NEXT: [[TMP96:%.*]] = inttoptr i32 [[TMP95]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP97:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP96]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP98:%.*]] = load i32, ptr addrspace(21) [[TMP97]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP99:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-CPS-NEXT: [[TMP100:%.*]] = inttoptr i32 [[TMP99]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP101:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP100]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP102:%.*]] = load i32, ptr addrspace(21) [[TMP101]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP103:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-CPS-NEXT: [[TMP104:%.*]] = inttoptr i32 [[TMP103]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP105:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP104]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP106:%.*]] = load i32, ptr addrspace(21) [[TMP105]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP107:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-CPS-NEXT: [[TMP108:%.*]] = inttoptr i32 [[TMP107]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP109:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP108]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP110:%.*]] = load i32, ptr addrspace(21) [[TMP109]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP111:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-CPS-NEXT: [[TMP112:%.*]] = inttoptr i32 [[TMP111]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP113:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP112]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP114:%.*]] = load i32, ptr addrspace(21) [[TMP113]], align 4 -; POST-PROCESS-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 0 -; POST-PROCESS-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTSROA_0257_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP115:%.*]] = bitcast float [[DOTSROA_0257_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-CPS-NEXT: [[DOTSROA_0257_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-CPS-NEXT: [[TMP116:%.*]] = bitcast float [[DOTSROA_0257_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POST-PROCESS-CPS-NEXT: [[TMP117:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POST-PROCESS-CPS-NEXT: [[TMP118:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POST-PROCESS-CPS-NEXT: [[TMP119:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP117]]) -; POST-PROCESS-CPS-NEXT: [[TMP120:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP119]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POST-PROCESS-CPS-NEXT: [[TMP121:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP120]]) -; POST-PROCESS-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; POST-PROCESS-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POST-PROCESS-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POST-PROCESS-CPS-NEXT: [[TMP122:%.*]] = call i64 @continuation.getAddrAndMD(ptr @ClosestHit.resume.0) -; POST-PROCESS-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP122]], 5 -; POST-PROCESS-CPS-NEXT: [[TMP123:%.*]] = inttoptr i32 [[TMP0]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP124:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP123]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP10]], ptr addrspace(21) [[TMP124]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP125:%.*]] = add i32 [[TMP0]], 4 -; POST-PROCESS-CPS-NEXT: [[TMP126:%.*]] = inttoptr i32 [[TMP125]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP127:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP126]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP14]], ptr addrspace(21) [[TMP127]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP128:%.*]] = add i32 [[TMP0]], 8 -; POST-PROCESS-CPS-NEXT: [[TMP129:%.*]] = inttoptr i32 [[TMP128]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP130:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP129]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP18]], ptr addrspace(21) [[TMP130]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP131:%.*]] = add i32 [[TMP0]], 12 -; POST-PROCESS-CPS-NEXT: [[TMP132:%.*]] = inttoptr i32 [[TMP131]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP133:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP132]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP22]], ptr addrspace(21) [[TMP133]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP134:%.*]] = add i32 [[TMP0]], 16 -; POST-PROCESS-CPS-NEXT: [[TMP135:%.*]] = inttoptr i32 [[TMP134]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP136:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP135]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP26]], ptr addrspace(21) [[TMP136]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP137:%.*]] = add i32 [[TMP0]], 20 -; POST-PROCESS-CPS-NEXT: [[TMP138:%.*]] = inttoptr i32 [[TMP137]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP139:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP138]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP30]], ptr addrspace(21) [[TMP139]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP140:%.*]] = add i32 [[TMP0]], 24 -; POST-PROCESS-CPS-NEXT: [[TMP141:%.*]] = inttoptr i32 [[TMP140]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP142:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP141]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP34]], ptr addrspace(21) [[TMP142]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP143:%.*]] = add i32 [[TMP0]], 28 -; POST-PROCESS-CPS-NEXT: [[TMP144:%.*]] = inttoptr i32 [[TMP143]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP145:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP144]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP38]], ptr addrspace(21) [[TMP145]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP146:%.*]] = add i32 [[TMP0]], 32 -; POST-PROCESS-CPS-NEXT: [[TMP147:%.*]] = inttoptr i32 [[TMP146]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP148:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP147]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP42]], ptr addrspace(21) [[TMP148]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP149:%.*]] = add i32 [[TMP0]], 36 -; POST-PROCESS-CPS-NEXT: [[TMP150:%.*]] = inttoptr i32 [[TMP149]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP151:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP150]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP46]], ptr addrspace(21) [[TMP151]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP152:%.*]] = add i32 [[TMP0]], 40 -; POST-PROCESS-CPS-NEXT: [[TMP153:%.*]] = inttoptr i32 [[TMP152]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP154:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP153]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP50]], ptr addrspace(21) [[TMP154]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP155:%.*]] = add i32 [[TMP0]], 44 -; POST-PROCESS-CPS-NEXT: [[TMP156:%.*]] = inttoptr i32 [[TMP155]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP157:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP156]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP54]], ptr addrspace(21) [[TMP157]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP158:%.*]] = add i32 [[TMP0]], 48 -; POST-PROCESS-CPS-NEXT: [[TMP159:%.*]] = inttoptr i32 [[TMP158]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP160:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP159]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP58]], ptr addrspace(21) [[TMP160]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP161:%.*]] = add i32 [[TMP0]], 52 -; POST-PROCESS-CPS-NEXT: [[TMP162:%.*]] = inttoptr i32 [[TMP161]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP163:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP162]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP62]], ptr addrspace(21) [[TMP163]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP164:%.*]] = add i32 [[TMP0]], 56 -; POST-PROCESS-CPS-NEXT: [[TMP165:%.*]] = inttoptr i32 [[TMP164]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP166:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP165]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP66]], ptr addrspace(21) [[TMP166]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP167:%.*]] = add i32 [[TMP0]], 60 -; POST-PROCESS-CPS-NEXT: [[TMP168:%.*]] = inttoptr i32 [[TMP167]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP169:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP168]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP70]], ptr addrspace(21) [[TMP169]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP170:%.*]] = add i32 [[TMP0]], 64 -; POST-PROCESS-CPS-NEXT: [[TMP171:%.*]] = inttoptr i32 [[TMP170]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP172:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP171]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP74]], ptr addrspace(21) [[TMP172]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP173:%.*]] = add i32 [[TMP0]], 68 -; POST-PROCESS-CPS-NEXT: [[TMP174:%.*]] = inttoptr i32 [[TMP173]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP175:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP174]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP78]], ptr addrspace(21) [[TMP175]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP176:%.*]] = add i32 [[TMP0]], 72 -; POST-PROCESS-CPS-NEXT: [[TMP177:%.*]] = inttoptr i32 [[TMP176]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP178:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP177]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP82]], ptr addrspace(21) [[TMP178]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP179:%.*]] = add i32 [[TMP0]], 76 -; POST-PROCESS-CPS-NEXT: [[TMP180:%.*]] = inttoptr i32 [[TMP179]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP181:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP180]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP86]], ptr addrspace(21) [[TMP181]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP182:%.*]] = add i32 [[TMP0]], 80 -; POST-PROCESS-CPS-NEXT: [[TMP183:%.*]] = inttoptr i32 [[TMP182]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP184:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP183]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP90]], ptr addrspace(21) [[TMP184]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP185:%.*]] = add i32 [[TMP0]], 84 -; POST-PROCESS-CPS-NEXT: [[TMP186:%.*]] = inttoptr i32 [[TMP185]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP187:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP186]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP94]], ptr addrspace(21) [[TMP187]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP188:%.*]] = add i32 [[TMP0]], 88 -; POST-PROCESS-CPS-NEXT: [[TMP189:%.*]] = inttoptr i32 [[TMP188]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP190:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP189]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP98]], ptr addrspace(21) [[TMP190]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP191:%.*]] = add i32 [[TMP0]], 92 -; POST-PROCESS-CPS-NEXT: [[TMP192:%.*]] = inttoptr i32 [[TMP191]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP193:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP192]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP102]], ptr addrspace(21) [[TMP193]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP194:%.*]] = add i32 [[TMP0]], 96 -; POST-PROCESS-CPS-NEXT: [[TMP195:%.*]] = inttoptr i32 [[TMP194]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP196:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP195]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP106]], ptr addrspace(21) [[TMP196]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP197:%.*]] = add i32 [[TMP0]], 100 -; POST-PROCESS-CPS-NEXT: [[TMP198:%.*]] = inttoptr i32 [[TMP197]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP199:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP198]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP110]], ptr addrspace(21) [[TMP199]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP200:%.*]] = add i32 [[TMP0]], 104 -; POST-PROCESS-CPS-NEXT: [[TMP201:%.*]] = inttoptr i32 [[TMP200]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP202:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP201]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP114]], ptr addrspace(21) [[TMP202]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_INSERT54:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP0]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_INSERT57:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT54]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_2_INSERT60:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT57]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_3_INSERT63:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT60]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_4_INSERT66:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT63]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_5_INSERT69:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT66]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_6_INSERT72:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT69]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_7_INSERT75:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT72]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_8_INSERT78:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT75]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_9_INSERT81:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT78]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_10_INSERT84:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT81]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_11_INSERT87:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT84]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_12_INSERT90:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT87]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_13_INSERT93:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT90]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_14_INSERT96:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT93]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_15_INSERT99:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT96]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_16_INSERT102:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT99]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_17_INSERT105:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT102]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_18_INSERT108:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT105]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_19_INSERT111:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT108]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_20_INSERT114:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT111]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_21_INSERT117:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT114]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_22_INSERT120:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT117]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_23_INSERT123:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT120]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_24_INSERT126:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT123]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_25_INSERT129:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT126]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_26_INSERT132:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT129]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_27_INSERT135:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT132]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_28_INSERT138:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT135]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_29_INSERT141:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT138]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POST-PROCESS-CPS-NEXT: [[TMP203:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP203]], i64 [[TMP122]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT141]]) -; POST-PROCESS-CPS-NEXT: unreachable -; -; -; POST-PROCESS-CPS-LABEL: define dso_local void @ClosestHit.resume.0( -; POST-PROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META25]] !lgc.cps [[META22]] !continuation [[META26]] { -; POST-PROCESS-CPS-NEXT: entryresume.0: -; POST-PROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -116 -; POST-PROCESS-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 6 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 7 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 8 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 9 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 10 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 11 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 12 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 13 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 14 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 15 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 16 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 17 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 18 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 19 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 20 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 21 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 22 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 23 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 24 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 25 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 26 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 27 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 28 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 29 -; POST-PROCESS-CPS-NEXT: [[TMP7:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 6 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 7 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 8 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 9 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 10 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 11 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 12 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 13 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 14 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 15 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 16 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 17 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 18 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 19 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 20 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 21 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 22 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 23 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 24 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 25 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 26 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 27 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 28 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 29 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 30 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 31 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 32 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 33 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 34 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 35 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 36 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 37 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 38 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 39 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 40 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 41 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 42 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 43 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 44 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 45 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 46 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 47 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 48 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP7]], 0, 49 -; POST-PROCESS-CPS-NEXT: [[TMP8:%.*]] = inttoptr i32 [[DOTFCA_0_EXTRACT]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP8]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(21) [[TMP11]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP10:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 4 -; POST-PROCESS-CPS-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP12]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(21) [[TMP15]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP14:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 8 -; POST-PROCESS-CPS-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP16]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr addrspace(21) [[TMP19]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP18:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 12 -; POST-PROCESS-CPS-NEXT: [[TMP20:%.*]] = inttoptr i32 [[TMP18]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP20]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(21) [[TMP23]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP22:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 16 -; POST-PROCESS-CPS-NEXT: [[TMP24:%.*]] = inttoptr i32 [[TMP22]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP24]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(21) [[TMP27]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP26:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 20 -; POST-PROCESS-CPS-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP26]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP28]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP29:%.*]] = load i32, ptr addrspace(21) [[TMP31]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP30:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 24 -; POST-PROCESS-CPS-NEXT: [[TMP32:%.*]] = inttoptr i32 [[TMP30]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP32]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(21) [[TMP35]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP34:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 28 -; POST-PROCESS-CPS-NEXT: [[TMP36:%.*]] = inttoptr i32 [[TMP34]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP36]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(21) [[TMP39]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP38:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 32 -; POST-PROCESS-CPS-NEXT: [[TMP40:%.*]] = inttoptr i32 [[TMP38]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP43:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP40]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP41:%.*]] = load i32, ptr addrspace(21) [[TMP43]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP42:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 36 -; POST-PROCESS-CPS-NEXT: [[TMP44:%.*]] = inttoptr i32 [[TMP42]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP44]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(21) [[TMP47]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP46:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 40 -; POST-PROCESS-CPS-NEXT: [[TMP48:%.*]] = inttoptr i32 [[TMP46]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP51:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP48]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(21) [[TMP51]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP50:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 44 -; POST-PROCESS-CPS-NEXT: [[TMP52:%.*]] = inttoptr i32 [[TMP50]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP52]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP53:%.*]] = load i32, ptr addrspace(21) [[TMP55]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP54:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 48 -; POST-PROCESS-CPS-NEXT: [[TMP56:%.*]] = inttoptr i32 [[TMP54]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP56]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(21) [[TMP59]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP58:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 52 -; POST-PROCESS-CPS-NEXT: [[TMP60:%.*]] = inttoptr i32 [[TMP58]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP63:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP60]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP61:%.*]] = load i32, ptr addrspace(21) [[TMP63]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP62:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 56 -; POST-PROCESS-CPS-NEXT: [[TMP64:%.*]] = inttoptr i32 [[TMP62]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP67:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP64]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP65:%.*]] = load i32, ptr addrspace(21) [[TMP67]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP66:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 60 -; POST-PROCESS-CPS-NEXT: [[TMP68:%.*]] = inttoptr i32 [[TMP66]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP71:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP68]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP69:%.*]] = load i32, ptr addrspace(21) [[TMP71]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP70:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 64 -; POST-PROCESS-CPS-NEXT: [[TMP72:%.*]] = inttoptr i32 [[TMP70]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP75:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP72]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP73:%.*]] = load i32, ptr addrspace(21) [[TMP75]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP74:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 68 -; POST-PROCESS-CPS-NEXT: [[TMP76:%.*]] = inttoptr i32 [[TMP74]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP79:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP76]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP77:%.*]] = load i32, ptr addrspace(21) [[TMP79]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP78:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 72 -; POST-PROCESS-CPS-NEXT: [[TMP80:%.*]] = inttoptr i32 [[TMP78]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP83:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP80]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP81:%.*]] = load i32, ptr addrspace(21) [[TMP83]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP82:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 76 -; POST-PROCESS-CPS-NEXT: [[TMP84:%.*]] = inttoptr i32 [[TMP82]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP87:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP84]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP85:%.*]] = load i32, ptr addrspace(21) [[TMP87]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP86:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 80 -; POST-PROCESS-CPS-NEXT: [[TMP88:%.*]] = inttoptr i32 [[TMP86]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP91:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP88]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP89:%.*]] = load i32, ptr addrspace(21) [[TMP91]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP90:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 84 -; POST-PROCESS-CPS-NEXT: [[TMP92:%.*]] = inttoptr i32 [[TMP90]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP95:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP92]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP93:%.*]] = load i32, ptr addrspace(21) [[TMP95]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP94:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 88 -; POST-PROCESS-CPS-NEXT: [[TMP96:%.*]] = inttoptr i32 [[TMP94]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP99:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP96]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP97:%.*]] = load i32, ptr addrspace(21) [[TMP99]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP98:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 92 -; POST-PROCESS-CPS-NEXT: [[TMP100:%.*]] = inttoptr i32 [[TMP98]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP103:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP100]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP101:%.*]] = load i32, ptr addrspace(21) [[TMP103]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP102:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 96 -; POST-PROCESS-CPS-NEXT: [[TMP104:%.*]] = inttoptr i32 [[TMP102]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP107:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP104]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP105:%.*]] = load i32, ptr addrspace(21) [[TMP107]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP106:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 100 -; POST-PROCESS-CPS-NEXT: [[TMP108:%.*]] = inttoptr i32 [[TMP106]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP111:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP108]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP109:%.*]] = load i32, ptr addrspace(21) [[TMP111]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP110:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 104 -; POST-PROCESS-CPS-NEXT: [[TMP112:%.*]] = inttoptr i32 [[TMP110]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP116:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP112]], i32 0 -; POST-PROCESS-CPS-NEXT: [[TMP113:%.*]] = load i32, ptr addrspace(21) [[TMP116]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP114:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT254:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP114]], 0 -; POST-PROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POST-PROCESS-CPS-NEXT: [[TMP115:%.*]] = add i32 [[TMP5]], 112 -; POST-PROCESS-CPS-NEXT: [[TMP117:%.*]] = inttoptr i32 [[TMP115]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP119:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP117]], i32 0 -; POST-PROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP119]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP118:%.*]] = add i32 [[TMP5]], 108 -; POST-PROCESS-CPS-NEXT: [[TMP120:%.*]] = inttoptr i32 [[TMP118]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP121:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP120]], i32 0 -; POST-PROCESS-CPS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP121]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP124:%.*]] = inttoptr i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP122:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP124]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP9]], ptr addrspace(21) [[TMP122]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP123:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 4 -; POST-PROCESS-CPS-NEXT: [[TMP127:%.*]] = inttoptr i32 [[TMP123]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP125:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP127]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP13]], ptr addrspace(21) [[TMP125]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP126:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 8 -; POST-PROCESS-CPS-NEXT: [[TMP130:%.*]] = inttoptr i32 [[TMP126]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP128:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP130]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP17]], ptr addrspace(21) [[TMP128]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP129:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 12 -; POST-PROCESS-CPS-NEXT: [[TMP133:%.*]] = inttoptr i32 [[TMP129]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP131:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP133]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP21]], ptr addrspace(21) [[TMP131]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP132:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 16 -; POST-PROCESS-CPS-NEXT: [[TMP136:%.*]] = inttoptr i32 [[TMP132]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP134:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP136]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP25]], ptr addrspace(21) [[TMP134]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP135:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 20 -; POST-PROCESS-CPS-NEXT: [[TMP139:%.*]] = inttoptr i32 [[TMP135]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP137:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP139]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP29]], ptr addrspace(21) [[TMP137]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP138:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 24 -; POST-PROCESS-CPS-NEXT: [[TMP142:%.*]] = inttoptr i32 [[TMP138]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP140:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP142]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP33]], ptr addrspace(21) [[TMP140]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP141:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 28 -; POST-PROCESS-CPS-NEXT: [[TMP145:%.*]] = inttoptr i32 [[TMP141]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP143:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP145]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP37]], ptr addrspace(21) [[TMP143]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP144:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 32 -; POST-PROCESS-CPS-NEXT: [[TMP148:%.*]] = inttoptr i32 [[TMP144]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP146:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP148]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP41]], ptr addrspace(21) [[TMP146]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP147:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 36 -; POST-PROCESS-CPS-NEXT: [[TMP151:%.*]] = inttoptr i32 [[TMP147]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP149:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP151]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP45]], ptr addrspace(21) [[TMP149]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP150:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 40 -; POST-PROCESS-CPS-NEXT: [[TMP154:%.*]] = inttoptr i32 [[TMP150]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP152:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP154]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP49]], ptr addrspace(21) [[TMP152]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP153:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 44 -; POST-PROCESS-CPS-NEXT: [[TMP157:%.*]] = inttoptr i32 [[TMP153]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP155:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP157]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP53]], ptr addrspace(21) [[TMP155]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP156:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 48 -; POST-PROCESS-CPS-NEXT: [[TMP160:%.*]] = inttoptr i32 [[TMP156]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP158:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP160]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP57]], ptr addrspace(21) [[TMP158]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP159:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 52 -; POST-PROCESS-CPS-NEXT: [[TMP163:%.*]] = inttoptr i32 [[TMP159]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP161:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP163]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP61]], ptr addrspace(21) [[TMP161]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP162:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 56 -; POST-PROCESS-CPS-NEXT: [[TMP166:%.*]] = inttoptr i32 [[TMP162]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP164:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP166]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP65]], ptr addrspace(21) [[TMP164]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP165:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 60 -; POST-PROCESS-CPS-NEXT: [[TMP169:%.*]] = inttoptr i32 [[TMP165]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP167:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP169]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP69]], ptr addrspace(21) [[TMP167]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP168:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 64 -; POST-PROCESS-CPS-NEXT: [[TMP172:%.*]] = inttoptr i32 [[TMP168]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP170:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP172]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP73]], ptr addrspace(21) [[TMP170]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP171:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 68 -; POST-PROCESS-CPS-NEXT: [[TMP175:%.*]] = inttoptr i32 [[TMP171]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP173:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP175]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP77]], ptr addrspace(21) [[TMP173]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP174:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 72 -; POST-PROCESS-CPS-NEXT: [[TMP178:%.*]] = inttoptr i32 [[TMP174]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP176:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP178]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP81]], ptr addrspace(21) [[TMP176]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP177:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 76 -; POST-PROCESS-CPS-NEXT: [[TMP181:%.*]] = inttoptr i32 [[TMP177]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP179:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP181]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP85]], ptr addrspace(21) [[TMP179]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP180:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 80 -; POST-PROCESS-CPS-NEXT: [[TMP184:%.*]] = inttoptr i32 [[TMP180]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP182:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP184]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP89]], ptr addrspace(21) [[TMP182]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP183:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 84 -; POST-PROCESS-CPS-NEXT: [[TMP187:%.*]] = inttoptr i32 [[TMP183]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP185:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP187]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP93]], ptr addrspace(21) [[TMP185]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP186:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 88 -; POST-PROCESS-CPS-NEXT: [[TMP190:%.*]] = inttoptr i32 [[TMP186]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP188:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP190]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP97]], ptr addrspace(21) [[TMP188]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP189:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 92 -; POST-PROCESS-CPS-NEXT: [[TMP193:%.*]] = inttoptr i32 [[TMP189]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP191:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP193]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP101]], ptr addrspace(21) [[TMP191]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP192:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 96 -; POST-PROCESS-CPS-NEXT: [[TMP196:%.*]] = inttoptr i32 [[TMP192]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP194:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP196]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP105]], ptr addrspace(21) [[TMP194]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP195:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 100 -; POST-PROCESS-CPS-NEXT: [[TMP199:%.*]] = inttoptr i32 [[TMP195]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP197:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP199]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP109]], ptr addrspace(21) [[TMP197]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP198:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 104 -; POST-PROCESS-CPS-NEXT: [[TMP205:%.*]] = inttoptr i32 [[TMP198]] to ptr addrspace(21) -; POST-PROCESS-CPS-NEXT: [[TMP200:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP205]], i32 0 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP113]], ptr addrspace(21) [[TMP200]], align 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_INSERT253:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT254]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 0 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POST-PROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POST-PROCESS-CPS-NEXT: [[TMP201:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP202:%.*]] = add i32 [[TMP201]], -116 -; POST-PROCESS-CPS-NEXT: store i32 [[TMP202]], ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: [[TMP203:%.*]] = zext i32 [[RETURNADDR_RELOAD]] to i64 -; POST-PROCESS-CPS-NEXT: [[TMP204:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP203]], i32 [[TMP204]], i64 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT253]], [23 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-CPS-NEXT: unreachable -; -; -; POST-PROCESS-GLOBAL-CPS-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; POST-PROCESS-GLOBAL-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; POST-PROCESS-GLOBAL-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; POST-PROCESS-GLOBAL-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POST-PROCESS-GLOBAL-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; POST-PROCESS-GLOBAL-CPS-NEXT: ret i32 5 -; -; -; POST-PROCESS-GLOBAL-CPS-LABEL: define void @main( -; POST-PROCESS-GLOBAL-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META8:![0-9]+]] !lgc.cps [[META19:![0-9]+]] !continuation [[META20:![0-9]+]] !continuation.stacksize [[META21:![0-9]+]] { -; POST-PROCESS-GLOBAL-CPS-NEXT: AllocaSpillBB: -; POST-PROCESS-GLOBAL-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 108 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP4]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_EXTRACT56:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP5:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP6:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP5]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP7]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP9:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP8]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT56]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP10:%.*]] = call i64 @continuation.getAddrAndMD(ptr @main.resume.0) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP10]], 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP3]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP11]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP12:%.*]] = add i32 [[TMP3]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP12]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP13]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP14:%.*]] = add i32 [[TMP3]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP14]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP15]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP16:%.*]] = add i32 [[TMP3]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP16]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP17]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP18:%.*]] = add i32 [[TMP3]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP18]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP19]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP20:%.*]] = add i32 [[TMP3]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP20]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP21]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP22:%.*]] = add i32 [[TMP3]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP22]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP23]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP24:%.*]] = add i32 [[TMP3]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP24]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP25]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP26:%.*]] = add i32 [[TMP3]], 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP26]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP27]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP28:%.*]] = add i32 [[TMP3]], 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP28]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP29]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP30:%.*]] = add i32 [[TMP3]], 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP30]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP31]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP32:%.*]] = add i32 [[TMP3]], 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP32]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP33]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP34:%.*]] = add i32 [[TMP3]], 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP34]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP35]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP36:%.*]] = add i32 [[TMP3]], 52 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP36]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP37]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP38:%.*]] = add i32 [[TMP3]], 56 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP38]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP39]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP40:%.*]] = add i32 [[TMP3]], 60 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP40]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP41]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP42:%.*]] = add i32 [[TMP3]], 64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP43:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP42]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP43]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP44:%.*]] = add i32 [[TMP3]], 68 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP45:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP44]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP45]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP46:%.*]] = add i32 [[TMP3]], 72 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP46]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP47]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP48:%.*]] = add i32 [[TMP3]], 76 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP49:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP48]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP49]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP50:%.*]] = add i32 [[TMP3]], 80 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP51:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP50]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP51]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP52:%.*]] = add i32 [[TMP3]], 84 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP52]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP53]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP54:%.*]] = add i32 [[TMP3]], 88 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP54]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP55]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP56:%.*]] = add i32 [[TMP3]], 92 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP57:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP56]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP57]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP58:%.*]] = add i32 [[TMP3]], 96 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP58]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP59]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP60:%.*]] = add i32 [[TMP3]], 100 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP61:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP60]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP61]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP62:%.*]] = add i32 [[TMP3]], 104 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP63:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP62]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 undef, ptr addrspace(22) [[TMP63]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP3]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 undef, 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 undef, 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 undef, 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 undef, 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 undef, 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 undef, 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 undef, 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 undef, 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 undef, 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 undef, 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 undef, 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 undef, 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 undef, 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 undef, 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 undef, 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 undef, 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 undef, 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 undef, 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 undef, 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 undef, 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 undef, 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 undef, 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 undef, 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP64:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP64]], i64 [[TMP10]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: unreachable -; -; -; POST-PROCESS-GLOBAL-CPS-LABEL: define dso_local void @main.resume.0( -; POST-PROCESS-GLOBAL-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META8]] !lgc.cps [[META19]] !continuation [[META20]] { -; POST-PROCESS-GLOBAL-CPS-NEXT: entryresume.0: -; POST-PROCESS-GLOBAL-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP4:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], -108 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP8:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP9:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 30 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 31 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 33 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 34 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 35 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 37 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 38 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 39 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 41 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 42 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 43 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 45 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 46 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 47 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 49 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[DOTFCA_0_EXTRACT]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(22) [[TMP10]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP11:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP11]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(22) [[TMP13]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP14:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP14]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(22) [[TMP16]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP17:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP17]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(22) [[TMP19]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP20:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP20]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP24:%.*]] = load i32, ptr addrspace(22) [[TMP22]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP23:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP23]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(22) [[TMP25]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP26:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP26]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(22) [[TMP28]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP29:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP29]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(22) [[TMP31]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP32:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP32]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(22) [[TMP34]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP35:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP35]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(22) [[TMP37]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP38:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP38]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(22) [[TMP40]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP41:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP43:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP41]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(22) [[TMP43]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP44:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP46:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP44]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP48:%.*]] = load i32, ptr addrspace(22) [[TMP46]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP47:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 52 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP49:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP47]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(22) [[TMP49]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP50:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 56 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP52:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP50]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(22) [[TMP52]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP53:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 60 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP53]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(22) [[TMP55]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP56:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP58:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP56]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP60:%.*]] = load i32, ptr addrspace(22) [[TMP58]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP59:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 68 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP61:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP59]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP63:%.*]] = load i32, ptr addrspace(22) [[TMP61]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP62:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 72 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP64:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP62]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP66:%.*]] = load i32, ptr addrspace(22) [[TMP64]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP65:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 76 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP67:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP65]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP69:%.*]] = load i32, ptr addrspace(22) [[TMP67]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP68:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 80 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP70:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP68]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP72:%.*]] = load i32, ptr addrspace(22) [[TMP70]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP71:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 84 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP73:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP71]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP75:%.*]] = load i32, ptr addrspace(22) [[TMP73]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP74:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 88 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP76:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP74]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP78:%.*]] = load i32, ptr addrspace(22) [[TMP76]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP77:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 92 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP79:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP77]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP81:%.*]] = load i32, ptr addrspace(22) [[TMP79]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP80:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 96 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP82:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP80]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP84:%.*]] = load i32, ptr addrspace(22) [[TMP82]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP83:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 100 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP85:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP83]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP87:%.*]] = load i32, ptr addrspace(22) [[TMP85]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP86:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 104 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP88:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP86]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP92:%.*]] = load i32, ptr addrspace(22) [[TMP88]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP89:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_EXTRACT57:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP89]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP90:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP91:%.*]] = add i32 [[TMP90]], -108 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP91]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: ret void -; -; -; POST-PROCESS-GLOBAL-CPS-LABEL: define void @AnyHit( -; POST-PROCESS-GLOBAL-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_ANYHITTRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[HIT_ATTRS:%.*]], [6 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !lgc.cps [[META23:![0-9]+]] !continuation [[META24:![0-9]+]] { -; POST-PROCESS-GLOBAL-CPS-NEXT: AllocaSpillBB: -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_ANYHITTRAVERSALDATA]], align 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP0:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: store <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_0_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 1, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: store <2 x float> [[SYSTEM_DATA_FCA_0_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_1_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_0_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_1_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_2_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_0_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_3_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: store float [[SYSTEM_DATA_FCA_0_4_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_4_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 0, 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i64 [[SYSTEM_DATA_FCA_0_5_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_5_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: store float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_1_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[PAYLOAD_FCA_0_EXTRACT]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP3:%.*]] = load i32, ptr addrspace(22) [[TMP2]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP4:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP4]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP6:%.*]] = load i32, ptr addrspace(22) [[TMP5]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP7:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP7]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(22) [[TMP8]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP10:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP10]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(22) [[TMP11]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP13:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP13]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(22) [[TMP14]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP16:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP16]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(22) [[TMP17]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP19:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP19]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(22) [[TMP20]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP22:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP22]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP24:%.*]] = load i32, ptr addrspace(22) [[TMP23]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP25:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP25]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(22) [[TMP26]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP28:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP28]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(22) [[TMP29]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP31:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP31]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(22) [[TMP32]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP34:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP34]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(22) [[TMP35]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP37:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP37]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(22) [[TMP38]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP40:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP40]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(22) [[TMP41]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP43:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP43]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(22) [[TMP44]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP46:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP46]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP48:%.*]] = load i32, ptr addrspace(22) [[TMP47]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP49:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP49]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(22) [[TMP50]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP52:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP52]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(22) [[TMP53]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP55:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP56:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP55]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(22) [[TMP56]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP58:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP58]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP60:%.*]] = load i32, ptr addrspace(22) [[TMP59]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP61:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP62:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP61]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP63:%.*]] = load i32, ptr addrspace(22) [[TMP62]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP64:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP65:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP64]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP66:%.*]] = load i32, ptr addrspace(22) [[TMP65]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP67:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP68:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP67]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP69:%.*]] = load i32, ptr addrspace(22) [[TMP68]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP70:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP71:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP70]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP72:%.*]] = load i32, ptr addrspace(22) [[TMP71]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP73:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP74:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP73]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP75:%.*]] = load i32, ptr addrspace(22) [[TMP74]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP76:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP77:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP76]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP78:%.*]] = load i32, ptr addrspace(22) [[TMP77]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP79:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP80:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP79]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP81:%.*]] = load i32, ptr addrspace(22) [[TMP80]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP82]], i32 0, i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTSROA_025_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP83:%.*]] = bitcast float [[DOTSROA_025_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTSROA_025_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP84:%.*]] = bitcast float [[DOTSROA_025_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[HIT_ATTRS_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[HIT_ATTRS]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP85:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[PAYLOAD_FCA_0_EXTRACT]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP3]], ptr addrspace(22) [[TMP85]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP86:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP87:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP86]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP6]], ptr addrspace(22) [[TMP87]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP88:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP89:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP88]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP9]], ptr addrspace(22) [[TMP89]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP90:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP91:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP90]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP12]], ptr addrspace(22) [[TMP91]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP92:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP93:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP92]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP15]], ptr addrspace(22) [[TMP93]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP94:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP95:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP94]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP18]], ptr addrspace(22) [[TMP95]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP96:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP97:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP96]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP21]], ptr addrspace(22) [[TMP97]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP98:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP99:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP98]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP24]], ptr addrspace(22) [[TMP99]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP100:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP101:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP100]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP27]], ptr addrspace(22) [[TMP101]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP102:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP103:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP102]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP30]], ptr addrspace(22) [[TMP103]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP104:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP105:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP104]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP33]], ptr addrspace(22) [[TMP105]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP106:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP107:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP106]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP36]], ptr addrspace(22) [[TMP107]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP108:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP109:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP108]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP39]], ptr addrspace(22) [[TMP109]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP110:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP111:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP110]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP42]], ptr addrspace(22) [[TMP111]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP112:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP113:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP112]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP45]], ptr addrspace(22) [[TMP113]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP114:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP115:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP114]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP48]], ptr addrspace(22) [[TMP115]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP116:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP117:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP116]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP51]], ptr addrspace(22) [[TMP117]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP118:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP119:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP118]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP54]], ptr addrspace(22) [[TMP119]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP120:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP121:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP120]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP57]], ptr addrspace(22) [[TMP121]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP122:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP123:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP122]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP60]], ptr addrspace(22) [[TMP123]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP124:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP125:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP124]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP63]], ptr addrspace(22) [[TMP125]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP126:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP127:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP126]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP66]], ptr addrspace(22) [[TMP127]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP128:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP129:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP128]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP69]], ptr addrspace(22) [[TMP129]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP130:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP131:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP130]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP72]], ptr addrspace(22) [[TMP131]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP132:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP133:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP132]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP75]], ptr addrspace(22) [[TMP133]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP134:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP135:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP134]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP78]], ptr addrspace(22) [[TMP135]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP136:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP137:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP136]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP81]], ptr addrspace(22) [[TMP137]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP138:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP139:%.*]] = bitcast i32 [[TMP138]] to float -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTSROA_027_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP139]], i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP140:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP141:%.*]] = bitcast i32 [[TMP140]] to float -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTSROA_027_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_027_0_VEC_INSERT]], float [[TMP141]], i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_INSERT26:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_027_4_VEC_INSERT]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP142:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void @_cont_SetTriangleHitAttributes(ptr [[TMP142]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT26]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_0_LOAD]], 0, 0, 0, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_0_1_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_0_1_0_LOAD]], 0, 0, 1, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_0_1_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_0_1_0_INSERT]], float [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_0_1_1_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], i32 [[DOTFCA_0_1_1_LOAD]], 0, 1, 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_2_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_1_1_INSERT]], <3 x float> [[DOTFCA_0_2_LOAD]], 0, 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_0_3_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_2_INSERT]], <3 x float> [[DOTFCA_0_3_LOAD]], 0, 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_4_LOAD:%.*]] = load float, ptr [[DOTFCA_0_4_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_3_INSERT]], float [[DOTFCA_0_4_LOAD]], 0, 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_0_5_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_4_INSERT]], i64 [[DOTFCA_0_5_LOAD]], 0, 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_0_5_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP143:%.*]] = zext i32 [[RETURNADDR]] to i64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP144:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP143]], i32 [[TMP144]], i64 poison, i32 poison, [[STRUCT_ANYHITTRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: unreachable -; -; -; POST-PROCESS-GLOBAL-CPS-LABEL: define void @ClosestHit( -; POST-PROCESS-GLOBAL-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [21 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META25:![0-9]+]] !lgc.cps [[META22]] !continuation [[META26:![0-9]+]] !continuation.stacksize [[META27:![0-9]+]] { -; POST-PROCESS-GLOBAL-CPS-NEXT: AllocaSpillBB: -; POST-PROCESS-GLOBAL-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP0:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 116 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP3]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], 108 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP4]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(22) [[TMP5]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP6:%.*]] = add i32 [[TMP2]], 112 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP6]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[PAYLOAD_FCA_0_EXTRACT]], ptr addrspace(22) [[TMP7]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 1, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[PAYLOAD_FCA_0_EXTRACT]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr addrspace(22) [[TMP8]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP10:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP10]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(22) [[TMP11]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP13:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP13]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(22) [[TMP14]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP16:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP16]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr addrspace(22) [[TMP17]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP19:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP19]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr addrspace(22) [[TMP20]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP22:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP22]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP24:%.*]] = load i32, ptr addrspace(22) [[TMP23]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP25:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP25]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP27:%.*]] = load i32, ptr addrspace(22) [[TMP26]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP28:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP28]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP30:%.*]] = load i32, ptr addrspace(22) [[TMP29]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP31:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP31]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP33:%.*]] = load i32, ptr addrspace(22) [[TMP32]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP34:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP34]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP36:%.*]] = load i32, ptr addrspace(22) [[TMP35]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP37:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP37]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP39:%.*]] = load i32, ptr addrspace(22) [[TMP38]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP40:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP40]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP42:%.*]] = load i32, ptr addrspace(22) [[TMP41]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP43:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP43]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr addrspace(22) [[TMP44]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP46:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 52 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP46]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP48:%.*]] = load i32, ptr addrspace(22) [[TMP47]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP49:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 56 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP49]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr addrspace(22) [[TMP50]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP52:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 60 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP52]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP54:%.*]] = load i32, ptr addrspace(22) [[TMP53]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP55:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP56:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP55]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP57:%.*]] = load i32, ptr addrspace(22) [[TMP56]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP58:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 68 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP59:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP58]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP60:%.*]] = load i32, ptr addrspace(22) [[TMP59]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP61:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 72 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP62:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP61]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP63:%.*]] = load i32, ptr addrspace(22) [[TMP62]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP64:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 76 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP65:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP64]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP66:%.*]] = load i32, ptr addrspace(22) [[TMP65]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP67:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 80 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP68:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP67]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP69:%.*]] = load i32, ptr addrspace(22) [[TMP68]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP70:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 84 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP71:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP70]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP72:%.*]] = load i32, ptr addrspace(22) [[TMP71]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP73:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 88 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP74:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP73]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP75:%.*]] = load i32, ptr addrspace(22) [[TMP74]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP76:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 92 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP77:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP76]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP78:%.*]] = load i32, ptr addrspace(22) [[TMP77]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP79:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 96 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP80:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP79]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP81:%.*]] = load i32, ptr addrspace(22) [[TMP80]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP82:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 100 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP83:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP82]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP84:%.*]] = load i32, ptr addrspace(22) [[TMP83]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP85:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT]], 104 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP86:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP85]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP87:%.*]] = load i32, ptr addrspace(22) [[TMP86]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTSROA_0257_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP88:%.*]] = bitcast float [[DOTSROA_0257_0_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTSROA_0257_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP89:%.*]] = bitcast float [[DOTSROA_0257_4_VEC_EXTRACT]] to i32 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP90:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP91:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP92:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP90]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP93:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP92]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP94:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP93]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP95:%.*]] = call i64 @continuation.getAddrAndMD(ptr @ClosestHit.resume.0) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP95]], 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP96:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP2]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP9]], ptr addrspace(22) [[TMP96]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP97:%.*]] = add i32 [[TMP2]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP98:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP97]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP12]], ptr addrspace(22) [[TMP98]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP99:%.*]] = add i32 [[TMP2]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP100:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP99]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP15]], ptr addrspace(22) [[TMP100]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP101:%.*]] = add i32 [[TMP2]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP102:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP101]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP18]], ptr addrspace(22) [[TMP102]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP103:%.*]] = add i32 [[TMP2]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP104:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP103]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP21]], ptr addrspace(22) [[TMP104]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP105:%.*]] = add i32 [[TMP2]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP106:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP105]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP24]], ptr addrspace(22) [[TMP106]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP107:%.*]] = add i32 [[TMP2]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP108:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP107]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP27]], ptr addrspace(22) [[TMP108]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP109:%.*]] = add i32 [[TMP2]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP110:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP109]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP30]], ptr addrspace(22) [[TMP110]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP111:%.*]] = add i32 [[TMP2]], 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP112:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP111]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP33]], ptr addrspace(22) [[TMP112]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP113:%.*]] = add i32 [[TMP2]], 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP114:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP113]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP36]], ptr addrspace(22) [[TMP114]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP115:%.*]] = add i32 [[TMP2]], 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP116:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP115]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP39]], ptr addrspace(22) [[TMP116]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP117:%.*]] = add i32 [[TMP2]], 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP118:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP117]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP42]], ptr addrspace(22) [[TMP118]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP119:%.*]] = add i32 [[TMP2]], 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP120:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP119]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP45]], ptr addrspace(22) [[TMP120]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP121:%.*]] = add i32 [[TMP2]], 52 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP122:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP121]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP48]], ptr addrspace(22) [[TMP122]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP123:%.*]] = add i32 [[TMP2]], 56 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP124:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP123]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP51]], ptr addrspace(22) [[TMP124]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP125:%.*]] = add i32 [[TMP2]], 60 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP126:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP125]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP54]], ptr addrspace(22) [[TMP126]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP127:%.*]] = add i32 [[TMP2]], 64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP128:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP127]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP57]], ptr addrspace(22) [[TMP128]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP129:%.*]] = add i32 [[TMP2]], 68 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP130:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP129]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP60]], ptr addrspace(22) [[TMP130]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP131:%.*]] = add i32 [[TMP2]], 72 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP132:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP131]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP63]], ptr addrspace(22) [[TMP132]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP133:%.*]] = add i32 [[TMP2]], 76 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP134:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP133]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP66]], ptr addrspace(22) [[TMP134]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP135:%.*]] = add i32 [[TMP2]], 80 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP136:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP135]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP69]], ptr addrspace(22) [[TMP136]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP137:%.*]] = add i32 [[TMP2]], 84 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP138:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP137]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP72]], ptr addrspace(22) [[TMP138]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP139:%.*]] = add i32 [[TMP2]], 88 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP140:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP139]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP75]], ptr addrspace(22) [[TMP140]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP141:%.*]] = add i32 [[TMP2]], 92 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP142:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP141]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP78]], ptr addrspace(22) [[TMP142]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP143:%.*]] = add i32 [[TMP2]], 96 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP144:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP143]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP81]], ptr addrspace(22) [[TMP144]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP145:%.*]] = add i32 [[TMP2]], 100 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP146:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP145]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP84]], ptr addrspace(22) [[TMP146]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP147:%.*]] = add i32 [[TMP2]], 104 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP148:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[TMP147]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP87]], ptr addrspace(22) [[TMP148]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_INSERT54:%.*]] = insertvalue [30 x i32] poison, i32 [[TMP2]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_INSERT57:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT54]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_2_INSERT60:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT57]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_3_INSERT63:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT60]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_4_INSERT66:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT63]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_5_INSERT69:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT66]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_6_INSERT72:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT69]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_7_INSERT75:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT72]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_8_INSERT78:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT75]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_9_INSERT81:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT78]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_10_INSERT84:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT81]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_11_INSERT87:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT84]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_12_INSERT90:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT87]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_13_INSERT93:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT90]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_14_INSERT96:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT93]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_15_INSERT99:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT96]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_16_INSERT102:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT99]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_17_INSERT105:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT102]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_18_INSERT108:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT105]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_19_INSERT111:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT108]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_20_INSERT114:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT111]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_21_INSERT117:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT114]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_22_INSERT120:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT117]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_23_INSERT123:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT120]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_24_INSERT126:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT123]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_25_INSERT129:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT126]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_26_INSERT132:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT129]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_27_INSERT135:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT132]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_28_INSERT138:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT135]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_29_INSERT141:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT138]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP149:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP149]], i64 [[TMP95]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [10 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT141]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: unreachable -; -; -; POST-PROCESS-GLOBAL-CPS-LABEL: define dso_local void @ClosestHit.resume.0( -; POST-PROCESS-GLOBAL-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [23 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META25]] !lgc.cps [[META22]] !continuation [[META26]] { -; POST-PROCESS-GLOBAL-CPS-NEXT: entryresume.0: -; POST-PROCESS-GLOBAL-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP4:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr addrspace(22) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], -116 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP8:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP8]], 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP9:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_2_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_3_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_4_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_5_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_6_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_7_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_8_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_9_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_10_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_11_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_12_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_13_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_14_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_15_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_16_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_17_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_18_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_19_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_20_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_21_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_22_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_23_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_24_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_25_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_26_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_27_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_28_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_29_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_30_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 30 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_31_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 31 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_32_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_33_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 33 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_34_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 34 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_35_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 35 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_36_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_37_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 37 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_38_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 38 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_39_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 39 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_40_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_41_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 41 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_42_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 42 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_43_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 43 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_44_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_45_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 45 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_46_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 46 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_47_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 47 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_48_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_49_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP9]], 0, 49 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[DOTFCA_0_EXTRACT]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(22) [[TMP12]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP11:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP11]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP13:%.*]] = load i32, ptr addrspace(22) [[TMP15]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP14:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP14]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP16:%.*]] = load i32, ptr addrspace(22) [[TMP18]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP17:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP21:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP17]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr addrspace(22) [[TMP21]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP20:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP20]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP22:%.*]] = load i32, ptr addrspace(22) [[TMP24]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP23:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP23]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(22) [[TMP27]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP26:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP26]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP28:%.*]] = load i32, ptr addrspace(22) [[TMP30]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP29:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP29]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP31:%.*]] = load i32, ptr addrspace(22) [[TMP33]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP32:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP32]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP34:%.*]] = load i32, ptr addrspace(22) [[TMP36]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP35:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP35]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP37:%.*]] = load i32, ptr addrspace(22) [[TMP39]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP38:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP42:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP38]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP40:%.*]] = load i32, ptr addrspace(22) [[TMP42]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP41:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP45:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP41]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP43:%.*]] = load i32, ptr addrspace(22) [[TMP45]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP44:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP48:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP44]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP46:%.*]] = load i32, ptr addrspace(22) [[TMP48]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP47:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 52 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP51:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP47]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(22) [[TMP51]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP50:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 56 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP54:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP50]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP52:%.*]] = load i32, ptr addrspace(22) [[TMP54]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP53:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 60 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP57:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP53]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP55:%.*]] = load i32, ptr addrspace(22) [[TMP57]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP56:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP60:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP56]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP58:%.*]] = load i32, ptr addrspace(22) [[TMP60]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP59:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 68 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP63:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP59]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP61:%.*]] = load i32, ptr addrspace(22) [[TMP63]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP62:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 72 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP66:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP62]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP64:%.*]] = load i32, ptr addrspace(22) [[TMP66]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP65:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 76 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP69:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP65]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP67:%.*]] = load i32, ptr addrspace(22) [[TMP69]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP68:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 80 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP72:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP68]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP70:%.*]] = load i32, ptr addrspace(22) [[TMP72]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP71:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 84 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP75:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP71]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP73:%.*]] = load i32, ptr addrspace(22) [[TMP75]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP74:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 88 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP78:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP74]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP76:%.*]] = load i32, ptr addrspace(22) [[TMP78]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP77:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 92 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP81:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP77]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP79:%.*]] = load i32, ptr addrspace(22) [[TMP81]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP80:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 96 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP84:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP80]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP82:%.*]] = load i32, ptr addrspace(22) [[TMP84]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP83:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 100 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP87:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP83]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP85:%.*]] = load i32, ptr addrspace(22) [[TMP87]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP86:%.*]] = add i32 [[DOTFCA_0_EXTRACT]], 104 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP91:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP86]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP88:%.*]] = load i32, ptr addrspace(22) [[TMP91]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP89:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [23 x i32], [30 x i32] } [[TMP3]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_EXTRACT254:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP89]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP90:%.*]] = add i32 [[TMP7]], 112 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP93:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP90]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT_RELOAD:%.*]] = load i32, ptr addrspace(22) [[TMP93]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP92:%.*]] = add i32 [[TMP7]], 108 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP151:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP92]] -; POST-PROCESS-GLOBAL-CPS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i32, ptr addrspace(22) [[TMP151]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP94:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP10]], ptr addrspace(22) [[TMP94]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP95:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP96:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP95]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP13]], ptr addrspace(22) [[TMP96]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP97:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP98:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP97]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP16]], ptr addrspace(22) [[TMP98]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP99:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP100:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP99]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP19]], ptr addrspace(22) [[TMP100]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP101:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP102:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP101]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP22]], ptr addrspace(22) [[TMP102]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP103:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP104:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP103]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP25]], ptr addrspace(22) [[TMP104]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP105:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP106:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP105]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP28]], ptr addrspace(22) [[TMP106]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP107:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP108:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP107]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP31]], ptr addrspace(22) [[TMP108]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP109:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 32 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP110:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP109]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP34]], ptr addrspace(22) [[TMP110]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP111:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 36 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP112:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP111]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP37]], ptr addrspace(22) [[TMP112]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP113:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 40 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP114:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP113]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP40]], ptr addrspace(22) [[TMP114]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP115:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 44 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP116:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP115]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP43]], ptr addrspace(22) [[TMP116]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP117:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 48 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP118:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP117]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP46]], ptr addrspace(22) [[TMP118]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP119:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 52 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP120:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP119]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP49]], ptr addrspace(22) [[TMP120]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP121:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 56 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP122:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP121]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP52]], ptr addrspace(22) [[TMP122]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP123:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 60 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP124:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP123]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP55]], ptr addrspace(22) [[TMP124]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP125:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP126:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP125]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP58]], ptr addrspace(22) [[TMP126]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP127:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 68 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP128:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP127]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP61]], ptr addrspace(22) [[TMP128]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP129:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 72 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP130:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP129]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP64]], ptr addrspace(22) [[TMP130]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP131:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 76 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP132:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP131]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP67]], ptr addrspace(22) [[TMP132]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP133:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 80 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP134:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP133]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP70]], ptr addrspace(22) [[TMP134]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP135:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 84 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP136:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP135]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP73]], ptr addrspace(22) [[TMP136]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP137:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 88 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP138:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP137]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP76]], ptr addrspace(22) [[TMP138]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP139:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 92 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP140:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP139]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP79]], ptr addrspace(22) [[TMP140]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP141:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 96 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP142:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP141]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP82]], ptr addrspace(22) [[TMP142]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP143:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 100 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP144:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP143]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP85]], ptr addrspace(22) [[TMP144]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP145:%.*]] = add i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 104 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP146:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP5]], i32 [[TMP145]] -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP88]], ptr addrspace(22) [[TMP146]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_INSERT253:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT254]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT_RELOAD]], 0 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP147:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP148:%.*]] = add i32 [[TMP147]], -116 -; POST-PROCESS-GLOBAL-CPS-NEXT: store i32 [[TMP148]], ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP149:%.*]] = zext i32 [[RETURNADDR_RELOAD]] to i64 -; POST-PROCESS-GLOBAL-CPS-NEXT: [[TMP150:%.*]] = load i32, ptr [[CSP]], align 4 -; POST-PROCESS-GLOBAL-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP149]], i32 [[TMP150]], i64 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT253]], [23 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; POST-PROCESS-GLOBAL-CPS-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/remat-indirect-load.ll b/llvmraytracing/test/dx/remat-indirect-load.ll new file mode 100644 index 0000000000..73ccacc1f6 --- /dev/null +++ b/llvmraytracing/test/dx/remat-indirect-load.ll @@ -0,0 +1,46 @@ +; NOTE: Do not autogenerate +; RUN: opt -debug-only=dxil-coro-split -passes='dxil-coro-split' -S %s 2>&1 | FileCheck %s +; +; Test that an indirect handle load pattern does not produce a rematerialization +; warning. We know that remat in this case is not profitable. +; +; REQUIRES: assertions + +; CHECK-NOT: Warning: isRematerializableDxilLoad unhandled pattern: {{.*}} = extractvalue %dx.types.ResRet.i32 + +target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" +target triple = "dxil-ms-dx" + +%dx.types.ResRet.i32 = type { i32, i32, i32, i32, i32 } +%dx.types.Handle = type { ptr } + +; Function Attrs: presplitcoroutine +define { ptr, ptr } @"indirect_handle_load"() #0 { +_cont_RayTCurrent.exit: + %0 = call token @llvm.coro.id.retcon(i32 0, i32 0, ptr null, ptr @"continuation.prototype.indirect_handle_load", ptr @continuation.malloc, ptr @continuation.free) + %1 = call ptr @llvm.coro.begin(token %0, ptr null) + %2 = call %dx.types.ResRet.i32 @dx.op.rawBufferLoad.i32(i32 0, %dx.types.Handle zeroinitializer) + %3 = extractvalue %dx.types.ResRet.i32 %2, 0 + %4 = call %dx.types.Handle @dx.op.createHandleFromHeap(i32 0, i32 %3) + %5 = call %dx.types.ResRet.i32 @dx.op.rawBufferLoad.i32(i32 0, %dx.types.Handle %4) + ret { ptr, ptr } zeroinitializer +} + +declare %dx.types.Handle @dx.op.createHandleFromHeap(i32, i32) + +declare %dx.types.ResRet.i32 @dx.op.rawBufferLoad.i32(i32, %dx.types.Handle) + +declare ptr @continuation.malloc(i32) + +declare void @continuation.free(ptr) + +; Function Attrs: nounwind +declare token @llvm.coro.id.retcon(i32, i32, ptr, ptr, ptr, ptr) #1 + +; Function Attrs: nounwind +declare ptr @llvm.coro.begin(token, ptr writeonly) #1 + +declare { ptr, ptr } @"continuation.prototype.indirect_handle_load"(ptr) + +attributes #0 = { presplitcoroutine } +attributes #1 = { nounwind } diff --git a/llvmraytracing/test/dx/remat-intrinsic.ll b/llvmraytracing/test/dx/remat-intrinsic.ll deleted file mode 100644 index f0cf8e5df2..0000000000 --- a/llvmraytracing/test/dx/remat-intrinsic.ll +++ /dev/null @@ -1,209 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' \ -; RUN: -S %s --lint-abort-on-error | FileCheck -check-prefix=POSTPROCESS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.DispatchSystemData = type { i32 } -%struct.TraversalData = type { %struct.SystemData } -%struct.SystemData = type { %struct.DispatchSystemData } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.MyParams = type { i32 } -%dx.types.fouri32 = type { i32, i32, i32, i32 } -%dx.types.ResourceProperties = type { i32, i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -; Need _cont_ReportHit to get system data type -declare !pointeetys !25 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) - -declare i32 @_cont_GetContinuationStackAddr() - -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, i64, %struct.DispatchSystemData) - -declare !pointeetys !14 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) - -; Function Attrs: nounwind memory(none) -declare !pointeetys !16 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData* nocapture readnone) #0 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !18 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) #0 - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) !pointeetys !19 { - ret i32 5 -} - -define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) !pointeetys !20 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, i64 poison, %struct.DispatchSystemData %dis_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -define void @called(%struct.MyParams* %params) !pointeetys !21 { - %i = call i32 @dx.op.dispatchRaysIndex.i32(i32 145, i8 0) - %unpacked = call %dx.types.fouri32 @dx.op.unpack4x8.i32(i32 219, i8 1, i32 %i) - %params_i = getelementptr %struct.MyParams, %struct.MyParams* %params, i32 0, i32 0 - %handle0 = load %dx.types.Handle, %dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 - %handle1 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %handle0) - %handle2 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %handle1, %dx.types.ResourceProperties { i32 16, i32 0 }) - call void @dx.op.callShader.struct.MyParams(i32 159, i32 2, %struct.MyParams* nonnull %params) - %a = extractvalue %dx.types.fouri32 %unpacked, 0 - %b = extractvalue %dx.types.fouri32 %unpacked, 1 - %c = extractvalue %dx.types.fouri32 %unpacked, 2 - %d = extractvalue %dx.types.fouri32 %unpacked, 3 - %packed = call i32 @dx.op.pack4x8.i32(i32 220, i8 0, i32 %a, i32 %b, i32 %c, i32 %d) - call void @dx.op.textureStore.f32(i32 67, %dx.types.Handle %handle2, i32 0, i32 0, i32 undef, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, i8 15) - store i32 %packed, i32* %params_i, align 4 - ret void -} - -; Function Attrs: nounwind -declare !pointeetys !23 void @dx.op.callShader.struct.MyParams(i32, i32, %struct.MyParams*) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysIndex.i32(i32, i8) #0 - -; Function Attrs: nounwind memory(none) -declare %dx.types.fouri32 @dx.op.unpack4x8.i32(i32, i8, i32) #0 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.pack4x8.i32(i32, i8, i32, i32, i32, i32) #0 - -; Function Attrs: nounwind memory(none) -declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) #0 - -; Function Attrs: nounwind memory(none) -declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types.ResourceProperties) #0 - -; Function Attrs: nounwind -declare void @dx.op.textureStore.f32(i32, %dx.types.Handle, i32, i32, i32, float, float, float, float, i8) #1 - -attributes #0 = { nounwind memory(none) } -attributes #1 = { nounwind } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.entryPoints = !{!3, !6} -!continuation.maxPayloadRegisterCount = !{!13} -!lgc.rt.max.attribute.size = !{!26} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{null, !"", null, !4, !12} -!4 = !{!5, !9, null, null} -!5 = !{!6} -!6 = !{void (%struct.MyParams*)* @called, !"called", null, null, !7} -!7 = !{i32 8, i32 12, i32 6, i32 16, i32 7, i32 8, i32 5, !8} -!8 = !{i32 0} -!9 = !{!10} -!10 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !11} -!11 = !{i32 0, i32 9} -!12 = !{i32 0, i64 65536} -!13 = !{i32 30} -!14 = !{%struct.SystemData poison} -!15 = !{i32 0, %struct.SystemData poison} -!16 = !{%struct.DispatchSystemData poison} -!17 = !{i32 0, %struct.DispatchSystemData poison} -!18 = !{%struct.DispatchSystemData poison} -!19 = !{%struct.DispatchSystemData poison} -!20 = !{%struct.DispatchSystemData poison} -!21 = !{%struct.MyParams poison} -!22 = !{i32 0, %struct.MyParams poison} -!23 = !{%struct.MyParams poison} -!24 = !{i32 0, %struct.TraversalData poison} -!25 = !{%struct.TraversalData poison} -!26 = !{i32 8} -; POSTPROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; POSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR1:[0-9]+]] { -; POSTPROCESS-NEXT: ret i32 5 -; -; -; POSTPROCESS-LABEL: define void @called( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [2 x i32] [[PADDING:%.*]], [1 x i32] [[PAYLOAD:%.*]]) !continuation [[META17:![0-9]+]] !lgc.rt.shaderstage [[META18:![0-9]+]] !continuation.stacksize [[META14:![0-9]+]] { -; POSTPROCESS-NEXT: AllocaSpillBB: -; POSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; POSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 8 -; POSTPROCESS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 -; POSTPROCESS-NEXT: store i64 [[RETURNADDR]], ptr addrspace(21) [[TMP4]], align 4 -; POSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[PAYLOAD]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT9:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[TMP6:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[SYSTEM_DATA_ALLOCA]]) -; POSTPROCESS-NEXT: [[I:%.*]] = extractelement <3 x i32> [[TMP6]], i8 0 -; POSTPROCESS-NEXT: [[UNPACKED:%.*]] = call [[DX_TYPES_FOURI32:%.*]] @[[DX_OP_UNPACK4X8_I32:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 219, i8 1, i32 [[I]]) -; POSTPROCESS-NEXT: [[HANDLE0:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POSTPROCESS-NEXT: [[HANDLE1:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[HANDLE0]]) -; POSTPROCESS-NEXT: [[HANDLE2:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[HANDLE1]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POSTPROCESS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT9]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [1 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; POSTPROCESS-NEXT: [[TMP8:%.*]] = call i64 @continuation.getAddrAndMD(ptr @called.resume.0) -; POSTPROCESS-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 2, i32 [[TMP7]], i64 [[TMP8]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], [2 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT4]]) -; POSTPROCESS-NEXT: unreachable -; -; -; POSTPROCESS-LABEL: define dso_local void @called.resume.0( -; POSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [2 x i32], [1 x i32] } [[TMP1:%.*]]) !continuation [[META17]] !lgc.rt.shaderstage [[META18]] { -; POSTPROCESS-NEXT: entryresume.0: -; POSTPROCESS-NEXT: [[TMP16:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; POSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; POSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP3:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } [[TMP1]], 0 -; POSTPROCESS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP3]], ptr [[TMP16]], align 4 -; POSTPROCESS-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP13]], -8 -; POSTPROCESS-NEXT: [[TMP4:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } [[TMP1]], 2 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [1 x i32] [[TMP4]], 0 -; POSTPROCESS-NEXT: [[TMP14:%.*]] = freeze [[STRUCT_MYPARAMS:%.*]] poison -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [[STRUCT_MYPARAMS]] [[TMP14]], 0 -; POSTPROCESS-NEXT: [[TMP15:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [2 x i32], [1 x i32] } [[TMP1]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT3:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP15]], 0 -; POSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; POSTPROCESS-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; POSTPROCESS-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP5]], i32 0 -; POSTPROCESS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(21) [[TMP6]], align 4 -; POSTPROCESS-NEXT: [[HANDLE011:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; POSTPROCESS-NEXT: [[HANDLE110:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[HANDLE011]]) -; POSTPROCESS-NEXT: [[HANDLE29:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[HANDLE110]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; POSTPROCESS-NEXT: [[TMP17:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP16]]) -; POSTPROCESS-NEXT: [[I8:%.*]] = extractelement <3 x i32> [[TMP17]], i8 0 -; POSTPROCESS-NEXT: [[UNPACKED7:%.*]] = call [[DX_TYPES_FOURI32:%.*]] @[[DX_OP_UNPACK4X8_I32]](i32 219, i8 1, i32 [[I8]]) -; POSTPROCESS-NEXT: [[TMP7:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP16]]) -; POSTPROCESS-NEXT: [[I6:%.*]] = extractelement <3 x i32> [[TMP7]], i8 0 -; POSTPROCESS-NEXT: [[UNPACKED5:%.*]] = call [[DX_TYPES_FOURI32]] @[[DX_OP_UNPACK4X8_I32]](i32 219, i8 1, i32 [[I6]]) -; POSTPROCESS-NEXT: [[TMP8:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP16]]) -; POSTPROCESS-NEXT: [[I4:%.*]] = extractelement <3 x i32> [[TMP8]], i8 0 -; POSTPROCESS-NEXT: [[UNPACKED3:%.*]] = call [[DX_TYPES_FOURI32]] @[[DX_OP_UNPACK4X8_I32]](i32 219, i8 1, i32 [[I4]]) -; POSTPROCESS-NEXT: [[TMP9:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP16]]) -; POSTPROCESS-NEXT: [[I2:%.*]] = extractelement <3 x i32> [[TMP9]], i8 0 -; POSTPROCESS-NEXT: [[UNPACKED1:%.*]] = call [[DX_TYPES_FOURI32]] @[[DX_OP_UNPACK4X8_I32]](i32 219, i8 1, i32 [[I2]]) -; POSTPROCESS-NEXT: [[A:%.*]] = extractvalue [[DX_TYPES_FOURI32]] [[UNPACKED7]], 0 -; POSTPROCESS-NEXT: [[B:%.*]] = extractvalue [[DX_TYPES_FOURI32]] [[UNPACKED5]], 1 -; POSTPROCESS-NEXT: [[C:%.*]] = extractvalue [[DX_TYPES_FOURI32]] [[UNPACKED3]], 2 -; POSTPROCESS-NEXT: [[D:%.*]] = extractvalue [[DX_TYPES_FOURI32]] [[UNPACKED1]], 3 -; POSTPROCESS-NEXT: [[PACKED:%.*]] = call i32 @dx.op.pack4x8.i32(i32 220, i8 0, i32 [[A]], i32 [[B]], i32 [[C]], i32 [[D]]) -; POSTPROCESS-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[HANDLE29]], i32 0, i32 0, i32 undef, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 1.000000e+00, i8 15) -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT3]], 0 -; POSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [1 x i32] poison, i32 [[PACKED]], 0 -; POSTPROCESS-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], -8 -; POSTPROCESS-NEXT: store i32 [[TMP11]], ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; POSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP12]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [2 x i32] poison, [1 x i32] [[DOTFCA_0_INSERT1]]) -; POSTPROCESS-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/remove-types-metadata.ll b/llvmraytracing/test/dx/remove-types-metadata.ll index b0d69036da..8076be668b 100644 --- a/llvmraytracing/test/dx/remove-types-metadata.ll +++ b/llvmraytracing/test/dx/remove-types-metadata.ll @@ -5,7 +5,7 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: %dx.types.Handle = type { i8* } %struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i64 } +%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i32 } %struct.SystemData = type { %struct.DispatchSystemData } %struct.HitData = type { <3 x float>, <3 x float>, float, i32 } %struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } @@ -20,11 +20,11 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: declare i32 @_cont_GetContinuationStackAddr() #0 -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #0 +declare %struct.DispatchSystemData @_AmdAwaitTraversal(i32, %struct.TraversalData) #0 -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #0 +declare %struct.DispatchSystemData @_AmdAwaitShader(i32, %struct.DispatchSystemData) #0 -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, %struct.AnyHitTraversalData, float, i32) #0 +declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32, %struct.AnyHitTraversalData, float, i32) #0 declare !pointeetys !31 %struct.HitData @_cont_GetCandidateState(%struct.AnyHitTraversalData*) #0 @@ -41,7 +41,7 @@ declare !pointeetys !39 i1 @_cont_IsEndSearch(%struct.TraversalData*) #0 declare !pointeetys !41 i32 @_cont_HitKind(%struct.SystemData*) #0 ; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #1 +declare i32 @_AmdGetResumePointAddr() #1 ; Function Attrs: nounwind declare !pointeetys !42 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) #1 @@ -67,9 +67,9 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i ; METADATA-NEXT: [[DIS_DATA:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[DATA]], align 4 ; METADATA-NEXT: [[SYS_DATA:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA]], 0 ; METADATA-NEXT: [[TRAV_DATA:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA]], 0 -; METADATA-NEXT: [[ADDR:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR3:[0-9]+]] -; METADATA-NEXT: [[TRAV_DATA2:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA]], i64 [[ADDR]], 5 -; METADATA-NEXT: [[NEWDATA:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] [[_AMDAWAITTRAVERSAL:@[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i64 4, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2]]) +; METADATA-NEXT: [[ADDR:%.*]] = call i32 @_AmdGetResumePointAddr() #[[ATTR3:[0-9]+]] +; METADATA-NEXT: [[TRAV_DATA2:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA]], i32 [[ADDR]], 5 +; METADATA-NEXT: [[NEWDATA:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] @[[_AMDAWAITTRAVERSAL:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 4, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2]]) ; METADATA-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[NEWDATA]], ptr [[DATA]], align 4 ; METADATA-NEXT: call void @_AmdRestoreSystemData(ptr [[DATA]]) ; METADATA-NEXT: ret void @@ -77,9 +77,9 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %addr = call i64 @_AmdGetResumePointAddr() #3 - %trav_data2 = insertvalue %struct.TraversalData %trav_data, i64 %addr, 5 - %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i64 4, %struct.TraversalData %trav_data2) + %addr = call i32 @_AmdGetResumePointAddr() #3 + %trav_data2 = insertvalue %struct.TraversalData %trav_data, i32 %addr, 5 + %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i32 4, %struct.TraversalData %trav_data2) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void @@ -89,13 +89,13 @@ define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #0 !poi ; METADATA-LABEL: define void @_cont_CallShader( ; METADATA-SAME: ptr [[DATA:%.*]], i32 [[TMP0:%.*]]) #[[ATTR0]] { ; METADATA-NEXT: [[DIS_DATA:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[DATA]], align 4 -; METADATA-NEXT: [[NEWDATA:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] [[_AMDAWAITSHADER:@[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i64 2, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA]]) +; METADATA-NEXT: [[NEWDATA:%.*]] = call [[STRUCT_DISPATCHSYSTEMDATA]] @[[_AMDAWAITSHADER:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 2, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA]]) ; METADATA-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[NEWDATA]], ptr [[DATA]], align 4 ; METADATA-NEXT: call void @_AmdRestoreSystemData(ptr [[DATA]]) ; METADATA-NEXT: ret void ; %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, %struct.DispatchSystemData %dis_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i32 2, %struct.DispatchSystemData %dis_data) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void @@ -110,7 +110,7 @@ define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hi ; METADATA-NEXT: br i1 [[ISNOHIT]], label [[ISEND:%.*]], label [[CALLAHIT:%.*]] ; METADATA: callAHit: ; METADATA-NEXT: [[TRAV_DATA:%.*]] = load [[STRUCT_ANYHITTRAVERSALDATA]], ptr [[DATA]], align 4 -; METADATA-NEXT: [[NEWDATA:%.*]] = call [[STRUCT_ANYHITTRAVERSALDATA]] [[_AMDAWAITANYHIT:@[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i64 3, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA]], float [[T]], i32 [[HITKIND]]) +; METADATA-NEXT: [[NEWDATA:%.*]] = call [[STRUCT_ANYHITTRAVERSALDATA]] @[[_AMDAWAITANYHIT:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 3, [[STRUCT_ANYHITTRAVERSALDATA]] [[TRAV_DATA]], float [[T]], i32 [[HITKIND]]) ; METADATA-NEXT: store [[STRUCT_ANYHITTRAVERSALDATA]] [[NEWDATA]], ptr [[DATA]], align 4 ; METADATA-NEXT: call void @_AmdRestoreSystemDataAnyHit(ptr [[DATA]]) ; METADATA-NEXT: ret i1 true @@ -125,7 +125,7 @@ define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hi callAHit: ; preds = %0 %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) + %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32 3, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 call void @_AmdRestoreSystemDataAnyHit(%struct.AnyHitTraversalData* %data) ret i1 true @@ -195,14 +195,14 @@ define void @MyRayGen() #2 { ; METADATA-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP4]]) #[[ATTR1:[0-9]+]] ; METADATA-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0, i32 0 ; METADATA-NEXT: store <4 x float> zeroinitializer, ptr [[TMP5]], align 4, !tbaa [[TBAA31:![0-9]+]] -; METADATA-NEXT: [[TMP6:%.*]] = call [[DX_TYPES_HANDLE]] [[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:@[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP1]]) -; METADATA-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] [[DX_OP_ANNOTATEHANDLE:@[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP6]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) +; METADATA-NEXT: [[TMP6:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP1]]) +; METADATA-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP6]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) ; METADATA-NEXT: call void @dx.op.traceRay.struct.RayPayload(i32 157, [[DX_TYPES_HANDLE]] [[TMP7]], i32 16, i32 -1, i32 0, i32 1, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0x3F50624DE0000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+04, ptr nonnull [[TMP3]]) ; METADATA-NEXT: [[TMP8:%.*]] = load <4 x float>, ptr [[TMP5]], align 4, !tbaa [[TBAA31]] ; METADATA-NEXT: [[TMP9:%.*]] = call i32 @dx.op.dispatchRaysIndex.i32(i32 145, i8 0) ; METADATA-NEXT: [[TMP10:%.*]] = call i32 @dx.op.dispatchRaysIndex.i32(i32 145, i8 1) -; METADATA-NEXT: [[TMP11:%.*]] = call [[DX_TYPES_HANDLE]] [[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) -; METADATA-NEXT: [[TMP12:%.*]] = call [[DX_TYPES_HANDLE]] [[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP11]], [[DX_TYPES_RESOURCEPROPERTIES]] { i32 4098, i32 1033 }) +; METADATA-NEXT: [[TMP11:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) +; METADATA-NEXT: [[TMP12:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP11]], [[DX_TYPES_RESOURCEPROPERTIES]] { i32 4098, i32 1033 }) ; METADATA-NEXT: [[TMP13:%.*]] = extractelement <4 x float> [[TMP8]], i64 0 ; METADATA-NEXT: [[TMP14:%.*]] = extractelement <4 x float> [[TMP8]], i64 1 ; METADATA-NEXT: [[TMP15:%.*]] = extractelement <4 x float> [[TMP8]], i64 2 diff --git a/llvmraytracing/test/dx/remove-unused-declarations.ll b/llvmraytracing/test/dx/remove-unused-declarations.ll index 03fc42b3c2..3667dee5bf 100644 --- a/llvmraytracing/test/dx/remove-unused-declarations.ll +++ b/llvmraytracing/test/dx/remove-unused-declarations.ll @@ -1,5 +1,6 @@ -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE-DECL %s -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS-DECL %s +; NOTE: Do not autogenerate +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE-DECL %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint,dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,cleanup-continuations,lint,dxil-cont-post-process,lint' -S %s --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS-DECL %s target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" diff --git a/llvmraytracing/test/dx/specialize-driver-shaders/analysis.ll b/llvmraytracing/test/dx/specialize-driver-shaders/analysis.ll index d2cdfa6449..f372f2da9e 100644 --- a/llvmraytracing/test/dx/specialize-driver-shaders/analysis.ll +++ b/llvmraytracing/test/dx/specialize-driver-shaders/analysis.ll @@ -1,3 +1,4 @@ +; NOTE: Do not autogenerate ; RUN: opt --verify-each -passes='specialize-driver-shaders' -S %s -debug-only='specialize-driver-shaders' 2>&1 | FileCheck %s ; ; REQUIRES: assertions @@ -29,12 +30,12 @@ declare %args.type @opaque(...) ; Simple AHS that just forwards args ; CHECK-LABEL: [SDS] Analyzing function AnyHit1 -define void @AnyHit1({}, i32, i32, %args.type %args) !lgc.rt.shaderstage !2 { +define void @AnyHit1(i32, i32, %args.type %args) !lgc.rt.shaderstage !2 { ; CHECK-NEXT: [SDS] Analyzed outgoing call {{.*}} @lgc.cps.jump({{.*}} %args) ; CHECK-NEXT: [SDS] 0 1 2 3{{$}} ; CHECK-NEXT: [SDS] 0123456789012345678901234567890{{$}} ; CHECK-NEXT: [SDS] PPPPPPPPPPPPPPPPPPPPPPPPPPPPPPP{{$}} - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %args) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, %args.type %args) unreachable ; CHECK-NEXT: [SDS] Finished analysis of function AnyHit1 ; CHECK-NEXT: [SDS] 0 1 2 3{{$}} @@ -53,7 +54,7 @@ define void @AnyHit1({}, i32, i32, %args.type %args) !lgc.rt.shaderstage !2 { ; * writes same constants to dword 25 (constant) ; * writes different constants to dword 26 (dynamic) ; CHECK-LABEL: [SDS] Analyzing function AnyHit2 -define void @AnyHit2({}, i32, i32, %args.type %args) !lgc.rt.shaderstage !2 { +define void @AnyHit2(i32, i32, %args.type %args) !lgc.rt.shaderstage !2 { entry: %dw0 = extractvalue %args.type %args, 0, 0 %dw1 = extractvalue %args.type %args, 0, 1 @@ -82,7 +83,7 @@ exit: ; CHECK-NEXT: [SDS] 0 1 2 3{{$}} ; CHECK-NEXT: [SDS] 0123456789012345678901234567890{{$}} ; CHECK-NEXT: [SDS] DDPPPPPPPPCUPPPPPPPPCUCDPCDPPPP{{$}} - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %args.final) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, %args.type %args.final) unreachable } @@ -93,7 +94,7 @@ exit: ; * write matching constants to dword 2 ; CHECK-LABEL: [SDS] Analyzing function AnyHit3 ; * write non-matching constants to dword 3 -define void @AnyHit3({}, i32, i32, %args.type %args) !lgc.rt.shaderstage !2 { +define void @AnyHit3(i32, i32, %args.type %args) !lgc.rt.shaderstage !2 { entry: %dw0 = extractvalue %args.type %args, 0, 0 %cond = trunc i32 %dw0 to i1 @@ -102,13 +103,13 @@ exit0: %tmp0 = insertvalue %args.type %args, i32 -1, 0, 0 %tmp1 = insertvalue %args.type %tmp0, i32 -1, 0, 2 %tmp2 = insertvalue %args.type %tmp1, i32 -1, 0, 3 - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %tmp2) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, %args.type %tmp2) unreachable exit1: %tmp3 = insertvalue %args.type %args, i32 -1, 0, 1 %tmp4 = insertvalue %args.type %tmp3, i32 -1, 0, 2 %tmp5 = insertvalue %args.type %tmp4, i32 -2, 0, 3 - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %tmp5) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, %args.type %tmp5) unreachable ; CHECK: [SDS] Finished analysis of function AnyHit3 ; CHECK-NEXT: [SDS] 0 1 2 3{{$}} @@ -124,7 +125,7 @@ exit1: ; would be loaded from continuation state and their origin unknown. ; This uses lgc.cps.await. ; CHECK-LABEL: [SDS] Analyzing function Intersection1 -define void @Intersection1({}, i32, i32, %args.type %args) !lgc.rt.shaderstage !1 { +define void @Intersection1(i32, i32, %args.type %args) !lgc.rt.shaderstage !1 { entry: %dw0 = extractvalue %args.type %args, 0, 0 %cond = trunc i32 %dw0 to i1 @@ -159,30 +160,15 @@ exit: ; CHECK-NEXT: [SDS] 0 1 2 3{{$}} ; CHECK-NEXT: [SDS] 0123456789012345678901234567890{{$}} ; CHECK-NEXT: [SDS] PPPPPPPPPPPPPPPPPPPPPPPPPPPPPPP{{$}} - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %args.final) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, %args.type %args.final) unreachable } -; Basic test that legacy await is also handled. -; Note: This test is a bit odd, because this is an lgc.cps module, and we only expect legacy awaits in non-lgc.cps modules. -; Thus, we use the lgc.cps mode version of lgc.cps.jump including a to-be-ignored shader record index. -; CHECK-LABEL: [SDS] Analyzing function Intersection2 -define void @Intersection2({}, i32, i32, %args.type %args) !lgc.rt.shaderstage !1 { - %handle = call ptr inttoptr (i32 poison to ptr)(%args.type %args) - %awaited = call %args.type @await(ptr %handle) - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %awaited) - ret void -; CHECK: [SDS] Finished analysis of function Intersection2 -; CHECK-NEXT: [SDS] 0 1 2 3{{$}} -; CHECK-NEXT: [SDS] 0123456789012345678901234567890{{$}} -; CHECK-NEXT: [SDS] PPPPPPPPPPPPPPPPPPPPPPPPPPPPPPP{{$}} -} - ; Check that other function calls to non-await functions are not accidentally considered as preserved. ; CHECK-LABEL: [SDS] Analyzing function Intersection3 -define void @Intersection3({}, i32, i32, %args.type %args) !lgc.rt.shaderstage !1 { +define void @Intersection3(i32, i32, %args.type %args) !lgc.rt.shaderstage !1 { %not.awaited = call %args.type @opaque(%args.type %args) - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %not.awaited) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, %args.type %not.awaited) ret void ; CHECK: [SDS] Finished analysis of function Intersection3 ; CHECK-NEXT: [SDS] 0 1 2 3{{$}} @@ -201,7 +187,7 @@ define void @Intersection3({}, i32, i32, %args.type %args) !lgc.rt.shaderstage ! ; dynamic values coming into the phi node. With just a single one, value origin tracking ; can see through the phi node and our phi node handling is not triggered. ; CHECK-LABEL: [SDS] Analyzing function Intersection4 -define void @Intersection4({}, i32, i32, %args.type %args) !lgc.rt.shaderstage !1 { +define void @Intersection4(i32, i32, %args.type %args) !lgc.rt.shaderstage !1 { entry: %dw1 = extractvalue %args.type %args, 0, 1 %args.modified.0 = insertvalue %args.type %args, i32 %dw1, 0, 0 @@ -234,7 +220,7 @@ exit: ; CHECK-NEXT: [SDS] 0 1 2 3{{$}} ; CHECK-NEXT: [SDS] 0123456789012345678901234567890{{$}} ; CHECK-NEXT: [SDS] DCPPPPPPPPPPPPPPPPPPPPPPPPPPPPP{{$}} - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %args.final) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, %args.type %args.final) unreachable } @@ -242,18 +228,18 @@ declare [4 x i32] @opaqueCandidate() ; Traversal shader that contains jumps to an AHS setting a dynamic candidate, and a return back to raygen that preserves only parts of the args. ; CHECK-LABEL: [SDS] Analyzing function Traversal1 (shader stage compute) -define void @Traversal1({}, i32 %ret.addr, i32, { [2 x i32], [8 x i32] } %system.data, [4 x i32] %padding, [8 x i32] %payload) !lgc.rt.shaderstage !6 { +define void @Traversal1(i32 %ret.addr, i32, { [2 x i32], [8 x i32] } %system.data, [4 x i32] %padding, [8 x i32] %payload) !lgc.rt.shaderstage !6 { %cond = trunc i32 %ret.addr to i1 br i1 %cond, label %rgs.resume, label %ahs ahs: %ahs.system.data.0 = insertvalue { { [2 x i32], [8 x i32] }, [4 x i32] } poison, { [2 x i32], [8 x i32] } %system.data, 0 %candidate = call [4 x i32] @opaqueCandidate() %ahs.system.data = insertvalue { { [2 x i32], [8 x i32] }, [4 x i32] } %ahs.system.data.0, [4 x i32] %candidate, 1 - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, { { [2 x i32], [8 x i32] }, [4 x i32] } %ahs.system.data, [8 x i32] %payload) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, { { [2 x i32], [8 x i32] }, [4 x i32] } %ahs.system.data, [8 x i32] %payload) unreachable rgs.resume: %dispatch.system.data = extractvalue { [2 x i32], [8 x i32] } %system.data, 0 - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, [2 x i32] %dispatch.system.data, [12 x i32] poison, [8 x i32] %payload) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, [2 x i32] %dispatch.system.data, [12 x i32] poison, [8 x i32] %payload) unreachable ; CHECK-LABEL: [SDS] Finished analysis of function Traversal1 ; CHECK-NEXT: [SDS] 0 1 2 @@ -265,26 +251,26 @@ rgs.resume: ; Hypothetical traversal calling an AHS with a larger arg size, and a RGS with smaller arg size. ; This tests mismatching incoming vs outgoing arg sizes. ; CHECK-LABEL: [SDS] Analyzing function Traversal2 (shader stage compute) -define void @Traversal2({}, i32 %ret.addr, i32, { [2 x i32], [8 x i32] } %system.data, [8 x i32] %payload) !lgc.rt.shaderstage !6 { +define void @Traversal2(i32 %ret.addr, i32, { [2 x i32], [8 x i32] } %system.data, [8 x i32] %payload) !lgc.rt.shaderstage !6 { %cond = trunc i32 %ret.addr to i1 br i1 %cond, label %rgs.resume, label %ahs ahs: %ahs.system.data.0 = insertvalue { { [2 x i32], [8 x i32] }, [4 x i32] } poison, { [2 x i32], [8 x i32] } %system.data, 0 %candidate = call [4 x i32] @opaqueCandidate() %ahs.system.data = insertvalue { { [2 x i32], [8 x i32] }, [4 x i32] } %ahs.system.data.0, [4 x i32] %candidate, 1 -; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, { { [2 x i32], [8 x i32] }, [4 x i32] } %ahs.system.data, [8 x i32] %payload) +; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, { { [2 x i32], [8 x i32] }, [4 x i32] } %ahs.system.data, [8 x i32] %payload) ; CHECK-NEXT: [SDS] 0 1 2 ; CHECK-NEXT: [SDS] 0123456789012345678901 ; CHECK-NEXT: [SDS] PPPPPPPPPPDDDDDDDDDDDD - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, { { [2 x i32], [8 x i32] }, [4 x i32] } %ahs.system.data, [8 x i32] %payload) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, { { [2 x i32], [8 x i32] }, [4 x i32] } %ahs.system.data, [8 x i32] %payload) unreachable rgs.resume: %dispatch.system.data = extractvalue { [2 x i32], [8 x i32] } %system.data, 0 -; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, [2 x i32] %dispatch.system.data, [8 x i32] %payload) +; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, [2 x i32] %dispatch.system.data, [8 x i32] %payload) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 0123456789 ; CHECK-NEXT: [SDS] PPDDDDDDDD - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, [2 x i32] %dispatch.system.data, [8 x i32] %payload) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, [2 x i32] %dispatch.system.data, [8 x i32] %payload) unreachable ; CHECK-NEXT: [SDS] Finished analysis of function Traversal2 ; CHECK-NEXT: [SDS] 0 1 2 @@ -297,12 +283,12 @@ rgs.resume: ; by extracting the individual dword values, and passing them as scalars to an outgoing jump. ; This should be detected as preserve. ; CHECK-LABEL: [SDS] Analyzing function JumpWithPaddingInType -define void @JumpWithPaddingInType({}, i32 %ret.addr, i32, %args.with.padding %args) !lgc.rt.shaderstage !2 { +define void @JumpWithPaddingInType(i32 %ret.addr, i32, %args.with.padding %args) !lgc.rt.shaderstage !2 { %scalar.0 = extractvalue %args.with.padding %args, 0 %scalar.1 = extractvalue %args.with.padding %args, 1 %scalar.2 = extractvalue %args.with.padding %args, 2, 0 %scalar.3 = extractvalue %args.with.padding %args, 2, 1 - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i32 %scalar.0, i64 %scalar.1, i32 %scalar.2, i64 %scalar.3) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 %scalar.0, i64 %scalar.1, i32 %scalar.2, i64 %scalar.3) unreachable ; CHECK-LABEL: [SDS] Finished analysis of function JumpWithPaddingInType ; CHECK-NEXT: [SDS] 0 @@ -312,7 +298,7 @@ define void @JumpWithPaddingInType({}, i32 %ret.addr, i32, %args.with.padding %a ; Same as above, but for awaits results. ; CHECK-LABEL: [SDS] Analyzing function AwaitWithPaddingInType -define void @AwaitWithPaddingInType({}, i32 %ret.addr, i32, %args.with.padding %args) !lgc.rt.shaderstage !1 { +define void @AwaitWithPaddingInType(i32 %ret.addr, i32, %args.with.padding %args) !lgc.rt.shaderstage !1 { ; Intentionally do not wrap %args in a struct -- instead pretend the await function returns ; the elements of %args as separate args, so we can test the mapping of arg slots into the returned struct ; with multiple struct elements. @@ -321,7 +307,7 @@ define void @AwaitWithPaddingInType({}, i32 %ret.addr, i32, %args.with.padding % %scalar.1 = extractvalue %args.with.padding %awaited, 1 %scalar.2 = extractvalue %args.with.padding %awaited, 2, 0 %scalar.3 = extractvalue %args.with.padding %awaited, 2, 1 - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i32 %scalar.0, i64 %scalar.1, i32 %scalar.2, i64 %scalar.3) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 %scalar.0, i64 %scalar.1, i32 %scalar.2, i64 %scalar.3) unreachable ; CHECK-LABEL: [SDS] Finished analysis of function AwaitWithPaddingInType ; CHECK-NEXT: [SDS] 0 @@ -336,40 +322,40 @@ define void @AwaitWithPaddingInType({}, i32 %ret.addr, i32, %args.with.padding % ; For instance, consider the example that forwards an incoming <2 x i16> argument to a bitcast outgoing i32 argument ; in the JumpWithOverlappingi16s test case. ; CHECK-LABEL: [SDS] Analyzing function JumpWithSinglei16 -define void @JumpWithSinglei16({}, i32 %ret.addr, i32, i16 %arg) !lgc.rt.shaderstage !2 { +define void @JumpWithSinglei16(i32 %ret.addr, i32, i16 %arg) !lgc.rt.shaderstage !2 { ; Forward arg as-is. -; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i16 %arg) +; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i16 %arg) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] D - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i16 %arg) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i16 %arg) unreachable } ; Check that we don't treat a misaligned passed-through dword as preserve. Use a packed struct to force misalignment. ; CHECK-LABEL: [SDS] Analyzing function JumpWithMisalignedDword -define void @JumpWithMisalignedDword({}, i32 %ret.addr, i32, <{ i16, i32 }> %args) !lgc.rt.shaderstage !2 { +define void @JumpWithMisalignedDword(i32 %ret.addr, i32, <{ i16, i32 }> %args) !lgc.rt.shaderstage !2 { switch i32 %ret.addr, label %conditional.0 [ i32 0, label %conditional.0 i32 1, label %conditional.1 ] conditional.0: ; Forward args as-is. -; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, <{ i16, i32 }> %args) +; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, <{ i16, i32 }> %args) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 01 ; CHECK-NEXT: [SDS] DD - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, <{ i16, i32 }> %args) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, <{ i16, i32 }> %args) unreachable conditional.1: ; Forward extracted scalars. %scalar.0 = extractvalue <{ i16, i32 }> %args, 0 %scalar.1 = extractvalue <{ i16, i32 }> %args, 1 -; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i16 %scalar.0, i32 %scalar.1) +; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i16 %scalar.0, i32 %scalar.1) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 01 ; CHECK-NEXT: [SDS] DD - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i16 %scalar.0, i32 %scalar.1) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i16 %scalar.0, i32 %scalar.1) unreachable unreachable } @@ -377,28 +363,28 @@ conditional.1: ; All cases involving i16 scalars should not be treated as preserve, as the i16 cannot guarantee to preserve high bits. ; Additionally, there can be issues with alignment. ; CHECK-LABEL: [SDS] Analyzing function JumpWithOverlappingi16s -define void @JumpWithOverlappingi16s({}, i32 %ret.addr, i32, <2 x i16> %args) !lgc.rt.shaderstage !2 { +define void @JumpWithOverlappingi16s(i32 %ret.addr, i32, <2 x i16> %args) !lgc.rt.shaderstage !2 { switch i32 %ret.addr, label %conditional.2 [ i32 0, label %conditional.0 i32 1, label %conditional.1 i32 2, label %conditional.2 ] conditional.0: -; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, <2 x i16> %args) +; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, <2 x i16> %args) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 01 ; CHECK-NEXT: [SDS] DD - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, <2 x i16> %args) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, <2 x i16> %args) unreachable conditional.1: ; Forward extracted scalars. This preserves arg slots, but we can't detect it. %scalar.0 = extractelement <2 x i16> %args, i32 0 %scalar.1 = extractelement <2 x i16> %args, i32 1 -; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i16 %scalar.0, i16 %scalar.1) +; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i16 %scalar.0, i16 %scalar.1) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 01 ; CHECK-NEXT: [SDS] DD - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i16 %scalar.0, i16 %scalar.1) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i16 %scalar.0, i16 %scalar.1) unreachable conditional.2: ; Forward just the bitcast. This does *not* preserve arg slots, as we merge both i16s into a single i32 arg slot. @@ -407,18 +393,18 @@ conditional.2: ; outgoing %bitcast argument with the corresponding incoming argument slot (value %args, offset 0) might come to the conclusion that it is ; preserved. But when allowing i16s, we need to additionally account for the incoming high poison bits that are implicit ; in the in-memory representation of %args. -; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i32 %bitcast) +; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 %bitcast) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] D %bitcast = bitcast <2 x i16> %args to i32 - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i32 %bitcast) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 %bitcast) unreachable } ; Same as above, but with awaits. ; CHECK-LABEL: [SDS] Analyzing function AwaitWithOverlappingi16s -define void @AwaitWithOverlappingi16s({}, i32 %ret.addr, i32, <2 x i16> %args) !lgc.rt.shaderstage !2 { +define void @AwaitWithOverlappingi16s(i32 %ret.addr, i32, <2 x i16> %args) !lgc.rt.shaderstage !2 { switch i32 %ret.addr, label %conditional.2 [ i32 0, label %conditional.0 i32 1, label %conditional.1 @@ -428,11 +414,11 @@ conditional.0: ; Forward args as-is through an await. %awaited.0.struct = call { <2 x i16> } (...) @lgc.cps.await__2xi16(i32 poison, i32 poison, i32 poison, <2 x i16> %args) %awaited.0 = extractvalue { <2 x i16> } %awaited.0.struct, 0 -; CHECK-LABEL: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, <2 x i16> %awaited.0) +; CHECK-LABEL: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, <2 x i16> %awaited.0) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 01 ; CHECK-NEXT: [SDS] DD - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, <2 x i16> %awaited.0) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, <2 x i16> %awaited.0) unreachable conditional.1: ; Forward extracted scalars through an await. @@ -441,33 +427,33 @@ conditional.1: %awaited.1.struct = call { i16, i16 } (...) @lgc.cps.await__i16i16(i32 poison, i32 poison, i32 poison, i16 %scalar.0, i16 %scalar.1) %awaited.1.0 = extractvalue { i16, i16 } %awaited.1.struct, 0 %awaited.1.1 = extractvalue { i16, i16 } %awaited.1.struct, 1 -; CHECK: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i16 %awaited.1.0, i16 %awaited.1.1) +; CHECK: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i16 %awaited.1.0, i16 %awaited.1.1) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 01 ; CHECK-NEXT: [SDS] DD - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i16 %awaited.1.0, i16 %awaited.1.1) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i16 %awaited.1.0, i16 %awaited.1.1) unreachable conditional.2: ; Forward just the bitcast. This does *not* preserve arg slots, as we merge both i16s into a single arg slot. -; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i32 %bitcast) +; CHECK-NEXT: [SDS] Analyzed outgoing call call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 %bitcast) ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] 0 ; CHECK-NEXT: [SDS] D %bitcast = bitcast <2 x i16> %args to i32 - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, i32 %bitcast) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 %bitcast) unreachable } ; Check that we ignore callable shaders -define void @Callable({}, i32 %ret.addr, i32, %args.type %args) !lgc.rt.shaderstage !5 { - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %args) +define void @Callable(i32 %ret.addr, i32, %args.type %args) !lgc.rt.shaderstage !5 { + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, %args.type %args) unreachable ; CHECK-NOT: [SDS] Finished analysis of function Callable } ; Check that we ignore launch kernel shaders -define void @LaunchKernel({}, i32 %ret.addr, i32, %args.type %args) !lgc.rt.shaderstage !7 { - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 poison, %args.type %args) +define void @LaunchKernel(i32 %ret.addr, i32, %args.type %args) !lgc.rt.shaderstage !7 { + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, %args.type %args) unreachable ; CHECK-NOT: [SDS] Finished analysis of function LaunchKernel } diff --git a/llvmraytracing/test/dx/specialize-driver-shaders/lower-rt-pipeline-args.ll b/llvmraytracing/test/dx/specialize-driver-shaders/lower-rt-pipeline-args.ll index 576a600141..a5c9ac49ee 100644 --- a/llvmraytracing/test/dx/specialize-driver-shaders/lower-rt-pipeline-args.ll +++ b/llvmraytracing/test/dx/specialize-driver-shaders/lower-rt-pipeline-args.ll @@ -1,3 +1,4 @@ +; NOTE: Do not autogenerate ; RUN: opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,sroa,specialize-driver-shaders,lint,remove-types-metadata" -S --lint-abort-on-error -debug-only='specialize-driver-shaders' %s 2>&1 | FileCheck %s ; ; Test that argument layouts (number of ignored arguments) expected in specialize-driver-shaders matches what lower-raytracing-pipeline does. @@ -10,7 +11,7 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: %dx.types.Handle = type { i8* } %struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i64 } +%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i32 } %struct.SystemData = type { %struct.DispatchSystemData } %struct.HitData = type { <3 x float>, <3 x float>, float, i32 } %struct.AnyHitTraversalData = type { %struct.TraversalData, %struct.HitData } @@ -32,11 +33,11 @@ define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwin ret void } -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #0 +declare %struct.DispatchSystemData @_AmdAwaitTraversal(i32, %struct.TraversalData) #0 -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, i64, %struct.DispatchSystemData) #0 +declare %struct.DispatchSystemData @_AmdAwaitShader(i32, i32, %struct.DispatchSystemData) #0 -declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64, i64, %struct.AnyHitTraversalData, float, i32) #0 +declare %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32, i32, %struct.AnyHitTraversalData, float, i32) #0 define %struct.HitData @_cont_GetCandidateState(%struct.AnyHitTraversalData* %data) #0 !pointeetys !32 { %resPtr = getelementptr %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, i32 0, i32 0 @@ -68,7 +69,7 @@ define i1 @_cont_IsEndSearch(%struct.TraversalData*) #0 !pointeetys !40 { declare !pointeetys !42 i32 @_cont_HitKind(%struct.SystemData*) #0 ; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #1 +declare i32 @_AmdGetResumePointAddr() #1 ; Function Attrs: nounwind declare !pointeetys !43 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) #1 @@ -92,9 +93,9 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 %sys_data = insertvalue %struct.SystemData zeroinitializer, %struct.DispatchSystemData %dis_data, 0 %trav_data = insertvalue %struct.TraversalData zeroinitializer, %struct.SystemData %sys_data, 0 - %addr = call i64 @_AmdGetResumePointAddr() #3 - %trav_data2 = insertvalue %struct.TraversalData %trav_data, i64 %addr, 5 - %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i64 4, %struct.TraversalData %trav_data2) + %addr = call i32 @_AmdGetResumePointAddr() #3 + %trav_data2 = insertvalue %struct.TraversalData %trav_data, i32 %addr, 5 + %newdata = call %struct.DispatchSystemData @_AmdAwaitTraversal(i32 4, %struct.TraversalData %trav_data2) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void @@ -102,7 +103,7 @@ define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #0 !pointeetys !46 { %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, i64 poison, %struct.DispatchSystemData %dis_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i32 2, i32 poison, %struct.DispatchSystemData %dis_data) store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) ret void @@ -116,7 +117,7 @@ define i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hi callAHit: ; preds = %0 %trav_data = load %struct.AnyHitTraversalData, %struct.AnyHitTraversalData* %data, align 4 - %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i64 3, i64 poison, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) + %newdata = call %struct.AnyHitTraversalData @_AmdAwaitAnyHit(i32 3, i32 poison, %struct.AnyHitTraversalData %trav_data, float %t, i32 %hitKind) store %struct.AnyHitTraversalData %newdata, %struct.AnyHitTraversalData* %data, align 4 call void @_AmdRestoreSystemDataAnyHit(%struct.AnyHitTraversalData* %data) ret i1 true @@ -179,8 +180,8 @@ define float @_cont_RayTCurrent(%struct.DispatchSystemData* nocapture readnone % ; argument incoming to RayGen. This is because we only allow arg preservation *within* Traversal. ; CHECK-LABEL: [SDS] Finished analysis of function MyRayGen ; CHECK-NEXT: [SDS] 0 1 2 3 4 {{$}} -; CHECK-NEXT: [SDS] 0123456789012345678901234567890123456789012345{{$}} -; CHECK-NEXT: [SDS] DDDCCCCCCCCCCCCCCCDDUUUUUUUUUUUUUUUUCUUUUUUCCC{{$}} +; CHECK-NEXT: [SDS] 012345678901234567890123456789012345678901234{{$}} +; CHECK-NEXT: [SDS] DDDCCCCCCCCCCCCCCCDUUUUUUUUUUUUUUUUCUUUUUUCCC{{$}} ; ^^^ dynamic dispatch system data ; ^^^^^^^^^^^^^^^ constant ray ; ^^ dynamic raygen.resume return addr @@ -234,8 +235,8 @@ define void @MyClosestHitShader(%struct.RayPayload* noalias nocapture %payload, ; AnyHit: Payload and committed hit attrs are preserved. ; CHECK-LABEL: [SDS] Finished analysis of function MyAnyHitShader ; CHECK-NEXT: [SDS] 0 1 2 3 4 {{$}} -; CHECK-NEXT: [SDS] 0123456789012345678901234567890123456789012345{{$}} -; CHECK-NEXT: [SDS] DDDDDDDDDDDDDDDDDDDDDDDDDDDDUUUUUUUUPPPPPPPPPP{{$}} +; CHECK-NEXT: [SDS] 012345678901234567890123456789012345678901234{{$}} +; CHECK-NEXT: [SDS] DDDDDDDDDDDDDDDDDDDDDDDDDDDUUUUUUUUPPPPPPPPPP{{$}} define void @MyAnyHitShader(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readnone %attr) #2 !pointeetys !55 { %1 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %payload, i32 0, i32 0 %2 = load <4 x float>, <4 x float>* %1, align 4 @@ -292,8 +293,8 @@ define void @MyAnyHitShader(%struct.RayPayload* noalias nocapture %payload, %str ; Six Argument slots unused by the small hit attributes are undef. ; CHECK-LABEL: [SDS] Finished analysis of function MyIntersectionShader ; CHECK-NEXT: [SDS] 0 1 2 3 4 5 6 {{$}} -; CHECK-NEXT: [SDS] 012345678901234567890123456789012345678901234567890123456789012345{{$}} -; CHECK-NEXT: [SDS] DDDPPPPPPPPPPPPPPPPPPPPPPPPPDCUUUUUUPPPPPPPPPPPPPPPPPPPPPPPPPPPPPP{{$}} +; CHECK-NEXT: [SDS] 01234567890123456789012345678901234567890123456789012345678901234{{$}} +; CHECK-NEXT: [SDS] DDDPPPPPPPPPPPPPPPPPPPPPPPPDCUUUUUUPPPPPPPPPPPPPPPPPPPPPPPPPPPPPP{{$}} define void @MyIntersectionShader() #2 { %1 = alloca %struct.BuiltInTriangleIntersectionAttributes, align 4 %2 = call float @dx.op.rayTCurrent.f32(i32 154) @@ -308,8 +309,8 @@ define void @MyIntersectionShader() #2 { ; because we don't repeatedly propagate through loops. This could be improved in ValueOriginTracking. ; CHECK-LABEL: [SDS] Finished analysis of function MyIntersectionShaderLoop ; CHECK-NEXT: [SDS] 0 1 2 3 4 5 6 {{$}} -; CHECK-NEXT: [SDS] 012345678901234567890123456789012345678901234567890123456789012345{{$}} -; CHECK-NEXT: [SDS] DDDDDDDDDDDDDDDDDDDDDDDDDDDDDCUUUUUUDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD{{$}} +; CHECK-NEXT: [SDS] 01234567890123456789012345678901234567890123456789012345678901234{{$}} +; CHECK-NEXT: [SDS] DDDDDDDDDDDDDDDDDDDDDDDDDDDDCUUUUUUDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD{{$}} define void @MyIntersectionShaderLoop() #2 { %1 = alloca %struct.BuiltInTriangleIntersectionAttributes, align 4 %2 = call float @dx.op.rayTCurrent.f32(i32 154) @@ -334,8 +335,8 @@ define void @MyMissShader(%struct.RayPayload* noalias nocapture %payload) #2 !po ; Recursive Miss: The passes through the incoming payload to traceRay, but it's treated as dynamic because miss is outside of Traversal. ; CHECK-LABEL: [SDS] Finished analysis of function MyMissShaderRecursive ; CHECK-NEXT: [SDS] 0 1 2 3 4 {{$}} -; CHECK-NEXT: [SDS] 0123456789012345678901234567890123456789012345{{$}} -; CHECK-NEXT: [SDS] DDDCCCCCCCCCCCCCCCDDUUUUUUUUUUUUUUUUDDDDDDDDDD{{$}} +; CHECK-NEXT: [SDS] 012345678901234567890123456789012345678901234{{$}} +; CHECK-NEXT: [SDS] DDDCCCCCCCCCCCCCCCDUUUUUUUUUUUUUUUUDDDDDDDDDD{{$}} define void @MyMissShaderRecursive(%struct.RayPayload* noalias nocapture %payload) #2 !pointeetys !58 { %tmp1 = load %dx.types.Handle, %dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 %tmp6 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %tmp1) diff --git a/llvmraytracing/test/dx/specialize-driver-shaders/specialization.ll b/llvmraytracing/test/dx/specialize-driver-shaders/specialization.ll index 4cea4eaad6..7149986ae8 100644 --- a/llvmraytracing/test/dx/specialize-driver-shaders/specialization.ll +++ b/llvmraytracing/test/dx/specialize-driver-shaders/specialization.ll @@ -15,66 +15,66 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: ; Ignored prefix args: shaderAddr, levels, state, returnAddr, shaderRecIdx declare void @lgc.cps.jump(...) -define void @SimpleArray({}, i32 %ret.addr, i32, [4 x i32] %args) !lgc.rt.shaderstage !{i32 6} { +define void @SimpleArray(i32 %ret.addr, i32, [4 x i32] %args) !lgc.rt.shaderstage !{i32 6} { ; CHECK-LABEL: define void @SimpleArray( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[RET_ADDR:%.*]], i32 [[TMP1:%.*]], [4 x i32] [[ARGS:%.*]]) !lgc.rt.shaderstage [[META2:![0-9]+]] { +; CHECK-SAME: i32 [[RET_ADDR:%.*]], i32 [[TMP0:%.*]], [4 x i32] [[ARGS:%.*]]) !lgc.rt.shaderstage [[META2:![0-9]+]] { ; CHECK-NEXT: [[ARGS_SPECIALIZED:%.*]] = insertvalue [4 x i32] [[ARGS]], i32 42, 1 ; CHECK-NEXT: [[TMP3:%.*]] = freeze i32 poison ; CHECK-NEXT: [[ARGS_SPECIALIZED1:%.*]] = insertvalue [4 x i32] [[ARGS_SPECIALIZED]], i32 [[TMP3]], 2 ; CHECK-NEXT: [[TMP4:%.*]] = freeze i32 poison ; CHECK-NEXT: [[ARGS_SPECIALIZED2:%.*]] = insertvalue [4 x i32] [[ARGS_SPECIALIZED1]], i32 [[TMP4]], 3 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, [4 x i32] [[ARGS_SPECIALIZED2]]) +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, [4 x i32] [[ARGS_SPECIALIZED2]]) ; CHECK-NEXT: unreachable ; - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, [4 x i32] %args) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, [4 x i32] %args) unreachable } -define void @SimpleScalars({}, i32 %ret.addr, i32, i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3) !lgc.rt.shaderstage !{i32 6} { +define void @SimpleScalars(i32 %ret.addr, i32, i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3) !lgc.rt.shaderstage !{i32 6} { ; CHECK-LABEL: define void @SimpleScalars( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[RET_ADDR:%.*]], i32 [[TMP1:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 [[ARG3:%.*]]) !lgc.rt.shaderstage [[META2]] { +; CHECK-SAME: i32 [[RET_ADDR:%.*]], i32 [[TMP0:%.*]], i32 [[ARG0:%.*]], i32 [[ARG1:%.*]], i32 [[ARG2:%.*]], i32 [[ARG3:%.*]]) !lgc.rt.shaderstage [[META2]] { ; CHECK-NEXT: [[TMP3:%.*]] = freeze i32 poison ; CHECK-NEXT: [[TMP4:%.*]] = freeze i32 poison -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 [[ARG0]], i32 42, i32 [[TMP3]], i32 [[TMP4]]) +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 [[ARG0]], i32 42, i32 [[TMP3]], i32 [[TMP4]]) ; CHECK-NEXT: unreachable ; - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3) unreachable } -define void @I16s({}, i32 %ret.addr, i32, i16 %arg0, i16 %arg1, i16 %arg2, i16 %arg3) !lgc.rt.shaderstage !{i32 6} { +define void @I16s(i32 %ret.addr, i32, i16 %arg0, i16 %arg1, i16 %arg2, i16 %arg3) !lgc.rt.shaderstage !{i32 6} { ; CHECK-LABEL: define void @I16s( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[RET_ADDR:%.*]], i32 [[TMP1:%.*]], i16 [[ARG0:%.*]], i16 [[ARG1:%.*]], i16 [[ARG2:%.*]], i16 [[ARG3:%.*]]) !lgc.rt.shaderstage [[META2]] { -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i16 [[ARG0]], i16 [[ARG1]], i16 [[ARG2]], i16 [[ARG3]]) +; CHECK-SAME: i32 [[RET_ADDR:%.*]], i32 [[TMP0:%.*]], i16 [[ARG0:%.*]], i16 [[ARG1:%.*]], i16 [[ARG2:%.*]], i16 [[ARG3:%.*]]) !lgc.rt.shaderstage [[META2]] { +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i16 [[ARG0]], i16 [[ARG1]], i16 [[ARG2]], i16 [[ARG3]]) ; CHECK-NEXT: unreachable ; - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i16 %arg0, i16 %arg1, i16 %arg2, i16 %arg3) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i16 %arg0, i16 %arg1, i16 %arg2, i16 %arg3) unreachable } ; Test that even if specialization of i16 arguments is ignored, we still specialize i32s. -define void @MixedI16I32s({}, i32 %ret.addr, i32, i16 %arg0, i32 %arg1, i16 %arg2, i32 %arg3) !lgc.rt.shaderstage !{i32 6} { +define void @MixedI16I32s(i32 %ret.addr, i32, i16 %arg0, i32 %arg1, i16 %arg2, i32 %arg3) !lgc.rt.shaderstage !{i32 6} { ; CHECK-LABEL: define void @MixedI16I32s( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[RET_ADDR:%.*]], i32 [[TMP1:%.*]], i16 [[ARG0:%.*]], i32 [[ARG1:%.*]], i16 [[ARG2:%.*]], i32 [[ARG3:%.*]]) !lgc.rt.shaderstage [[META2]] { +; CHECK-SAME: i32 [[RET_ADDR:%.*]], i32 [[TMP0:%.*]], i16 [[ARG0:%.*]], i32 [[ARG1:%.*]], i16 [[ARG2:%.*]], i32 [[ARG3:%.*]]) !lgc.rt.shaderstage [[META2]] { ; CHECK-NEXT: [[TMP3:%.*]] = freeze i32 poison -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i16 [[ARG0]], i32 42, i16 [[ARG2]], i32 [[TMP3]]) +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i16 [[ARG0]], i32 42, i16 [[ARG2]], i32 [[TMP3]]) ; CHECK-NEXT: unreachable ; - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, i16 %arg0, i32 %arg1, i16 %arg2, i32 %arg3) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, i16 %arg0, i32 %arg1, i16 %arg2, i32 %arg3) unreachable } ; Test that specializing an arg slot that occupies a full misaligned dword in the argument isn't supported ; In this test, the first contained float scalar is specialized, because it is dword-aligned, ; but the second isn't, because it is not aligned. This is because i16 and float use 16-bit alignment in this test. -define void @MisalignedDwords({}, i32 %ret.addr, i32, { i32, float, i16, float, i32 } %args) !lgc.rt.shaderstage !{i32 6} { +define void @MisalignedDwords(i32 %ret.addr, i32, { i32, float, i16, float, i32 } %args) !lgc.rt.shaderstage !{i32 6} { ; CHECK-LABEL: define void @MisalignedDwords( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[RET_ADDR:%.*]], i32 [[TMP1:%.*]], { i32, float, i16, float, i32 } [[ARGS:%.*]]) !lgc.rt.shaderstage [[META2]] { +; CHECK-SAME: i32 [[RET_ADDR:%.*]], i32 [[TMP0:%.*]], { i32, float, i16, float, i32 } [[ARGS:%.*]]) !lgc.rt.shaderstage [[META2]] { ; CHECK-NEXT: [[ARGS_SPECIALIZED:%.*]] = insertvalue { i32, float, i16, float, i32 } [[ARGS]], float 0x36F5000000000000, 1 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, { i32, float, i16, float, i32 } [[ARGS_SPECIALIZED]]) +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, { i32, float, i16, float, i32 } [[ARGS_SPECIALIZED]]) ; CHECK-NEXT: unreachable ; - call void (...) @lgc.cps.jump(i32 poison, i32 poison, {} poison, i32 poison, i32 poison, { i32, float, i16, float, i32 } %args) + call void (...) @lgc.cps.jump(i32 poison, i32 poison, i32 poison, i32 poison, { i32, float, i16, float, i32 } %args) unreachable } diff --git a/llvmraytracing/test/dx/stats-report-sizes.ll b/llvmraytracing/test/dx/stats-report-sizes.ll index 58348b9fb1..a534787078 100644 --- a/llvmraytracing/test/dx/stats-report-sizes.ll +++ b/llvmraytracing/test/dx/stats-report-sizes.ll @@ -1,3 +1,4 @@ +; NOTE: Do not autogenerate ; RUN: opt --report-cont-state-sizes --verify-each -passes='continuations-stats-report,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s --check-prefix=REPORT-CONT-SIZES ; RUN: opt --report-payload-register-sizes=max --verify-each -passes='continuations-stats-report,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s --check-prefix=REPORT-PAYLOAD-SIZES ; RUN: opt --report-system-data-sizes --verify-each -passes='continuations-stats-report,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s --check-prefix=REPORT-SYSTEM-DATA-SIZES @@ -14,26 +15,26 @@ declare void @lgc.cps.jump(...) ; REPORT-CONT-SIZES: Continuation state size of "RayGen" (raygeneration): 108 bytes ; REPORT-PAYLOAD-SIZES: Incoming and max outgoing payload VGPR size of "RayGen" (raygeneration): 7 and 6 dwords -define void @RayGen(i64 %dummyRetAddr, %struct.DispatchSystemData %0) !continuation.entry !0 !continuation !3 !continuation.state !5 !continuation.registercount !7 !lgc.rt.shaderstage !12 { +define void @RayGen(i32 %cspInit, i32 %dummyRetAddr, %struct.DispatchSystemData %0) !continuation.entry !0 !continuation !3 !continuation.state !5 !continuation.registercount !7 !lgc.rt.shaderstage !12 { %ptr = alloca i32, align 4 - %cspInit = call i32 @continuation.initialContinuationStackPtr() - store i32 %cspInit, i32* %ptr + %cspInit1 = call i32 @continuation.initialContinuationStackPtr() + store i32 %cspInit1, i32* %ptr %csp = load i32, ptr %ptr, align 4 - call void (...) @lgc.cps.jump(i64 2, i32 poison, {} poison, i32 %csp, i64 poison), !continuation.registercount !6 + call void (...) @lgc.cps.jump(i32 2, i32 poison, i32 %csp, i32 poison), !continuation.registercount !6 ret void } ; This is needed as fake continuation of RayGen, because we only report continuation state sizes ; if we find a continuation function using !continuation metadata. ; REPORT-SYSTEM-DATA-SIZES-DAG: Incoming system data of "RayGen.resume.0" (raygeneration) is "struct.DispatchSystemData", size: 4 bytes -define void @RayGen.resume.0(i64 %0, { %struct.DispatchSystemData } %1) !continuation !3 !lgc.rt.shaderstage !12 { +define void @RayGen.resume.0(i32 %cspInit, i32 %0, %struct.DispatchSystemData %1) !continuation !3 !lgc.rt.shaderstage !12 { ret void } ; REPORT-PAYLOAD-SIZES: Incoming and max outgoing payload VGPR size of "CHS" (closesthit): 8 and 9 dwords ; REPORT-SYSTEM-DATA-SIZES-DAG: Incoming system data of "CHS" (closesthit) is "struct.CHSSystemData", size: 400 bytes -define void @CHS(i64 %returnAddr, %struct.CHSSystemData %0) !continuation !14 !continuation.registercount !8 !lgc.rt.shaderstage !13 { - call void ( ...) @lgc.cps.jump(i64 2, i32 poison, {} poison, i32 poison, i64 poison), !continuation.registercount !9 +define void @CHS(i32 %cspInit, i32 %returnAddr, %struct.CHSSystemData %0) !continuation !14 !continuation.registercount !8 !lgc.rt.shaderstage !13 { + call void ( ...) @lgc.cps.jump(i32 2, i32 poison, i32 poison, i32 poison), !continuation.registercount !9 ret void } diff --git a/llvmraytracing/test/dx/traceray.ll b/llvmraytracing/test/dx/traceray.ll deleted file mode 100644 index b6e6a1ddee..0000000000 --- a/llvmraytracing/test/dx/traceray.ll +++ /dev/null @@ -1,6202 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: grep -v lgc.cps.module %s | grep -v SKIP_GLOBAL_ADDRSPACE | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE %s -; RUN: grep -v lgc.cps.module %s | grep -v SKIP_GLOBAL_ADDRSPACE | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS %s -; RUN: grep -v lgc.cps.module %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS-GLOBAL %s -; RUN: grep -v SKIP_GLOBAL_ADDRSPACE %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=LOWERRAYTRACINGPIPELINE-CPS %s -; RUN: grep -v SKIP_GLOBAL_ADDRSPACE %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=CLEANUP-CPS %s -; RUN: grep -v SKIP_GLOBAL_ADDRSPACE %s | opt --verify-each -passes="dxil-cont-lgc-rt-op-converter,lint,inline,lint,lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,remove-types-metadata" -S --lint-abort-on-error | FileCheck -check-prefix=DXILCONTPOSTPROCESS-CPS %s - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%dx.types.Handle = type { i8* } -%struct.DispatchSystemData = type { <3 x i32> } -%struct.TraversalData = type { %struct.SystemData, %struct.HitData, <3 x float>, <3 x float>, float, i64 } -%struct.SystemData = type { %struct.DispatchSystemData, %struct.BuiltInTriangleIntersectionAttributes } -%struct.BuiltInTriangleIntersectionAttributes = type { <2 x float> } -%struct.HitData = type { float, i32 } -%struct.RayPayload = type { <4 x float> } -%dx.types.ResourceProperties = type { i32, i32 } -; Don't use maximum possible size of 8 floats to test that the actual size is used -%struct.LargeIntersectionAttributes = type { [7 x i32] } -%struct.RaytracingAccelerationStructure = type { i32 } -%"class.RWTexture2D >" = type { <4 x float> } - -@debug_global = external global i32 - -@"\01?Scene@@3URaytracingAccelerationStructure@@A" = external constant %dx.types.Handle, align 4 -@"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" = external constant %dx.types.Handle, align 4 - -declare i32 @_cont_GetContinuationStackAddr() #0 - -; To exercise both waiting and non-waiting Await, we use WaitAwait for Traversal, -; and Await for Callshader. This does not necessarily reflect current choices in GPURT. -declare %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i64, i64, %struct.TraversalData) #0 - -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #0 - -declare %struct.TraversalData @_AmdAwaitAnyHit(i64, i64, %struct.TraversalData) #0 - -declare void @lgc.cps.jump(...) #0 - -declare void @_AmdContStackSetPtr(i32) #0 - -declare !pointeetys !32 i32 @_cont_HitKind(%struct.SystemData*) #0 - -declare i64 @_cont_GetContinuationStackGlobalMemBase() ; SKIP_GLOBAL_ADDRSPACE - -; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #1 - -declare !pointeetys !34 %struct.HitData @_cont_GetCommittedState(%struct.SystemData*) #0 - -; Function Attrs: nounwind -declare !pointeetys !35 void @_AmdRestoreSystemData(%struct.DispatchSystemData*) #1 - -; Function Attrs: nounwind -declare !pointeetys !37 void @_AmdRestoreSystemDataAnyHit(%struct.TraversalData*) #1 - -; Function Attrs: nounwind -declare !pointeetys !37 void @_cont_AcceptHit(%struct.TraversalData* nocapture readnone) #1 - -; Function Attrs: nounwind -declare !pointeetys !37 void @_AmdAcceptHitAttributes(%struct.TraversalData*) #1 - -declare i1 @opaqueIsEnd() #0 - -define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwind !pointeetys !{%struct.DispatchSystemData poison} { - ret void -} - -define i1 @_cont_IsEndSearch(%struct.TraversalData* %data) #0 !pointeetys !39 { - %isEnd = call i1 @opaqueIsEnd() - ret i1 %isEnd -} - -define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData* %data) #0 !pointeetys !40 { - %addr = getelementptr %struct.SystemData, %struct.SystemData* %data, i32 0, i32 1 - %val = load %struct.BuiltInTriangleIntersectionAttributes, %struct.BuiltInTriangleIntersectionAttributes* %addr, align 4 - ret %struct.BuiltInTriangleIntersectionAttributes %val -} - -define void @_cont_SetTriangleHitAttributes(%struct.SystemData* %data, %struct.BuiltInTriangleIntersectionAttributes %val) #0 !pointeetys !41 { - %addr = getelementptr %struct.SystemData, %struct.SystemData* %data, i32 0, i32 1 - store %struct.BuiltInTriangleIntersectionAttributes %val, %struct.BuiltInTriangleIntersectionAttributes* %addr, align 4 - ret void -} - -define i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData* %data) #0 !pointeetys !42 { - ret i32 5 -} - -define void @_cont_TraceRay(%struct.DispatchSystemData* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, float %6, float %7, float %8, float %9, float %10, float %11, float %12, float %13) #0 !pointeetys !43 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %sys_data = insertvalue %struct.SystemData undef, %struct.DispatchSystemData %dis_data, 0 - %trav_data = insertvalue %struct.TraversalData undef, %struct.SystemData %sys_data, 0 - %addr = call i64 @_AmdGetResumePointAddr() #3 - %trav_data2 = insertvalue %struct.TraversalData %trav_data, i64 %addr, 5 - %newdata = call %struct.DispatchSystemData @_AmdWaitAwaitTraversal(i64 4, i64 -1, %struct.TraversalData %trav_data2) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -define void @_cont_CallShader(%struct.DispatchSystemData* %data, i32 %0) #0 !pointeetys !44 { - %dis_data = load %struct.DispatchSystemData, %struct.DispatchSystemData* %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, %struct.DispatchSystemData %dis_data) - store %struct.DispatchSystemData %newdata, %struct.DispatchSystemData* %data, align 4 - call void @_AmdRestoreSystemData(%struct.DispatchSystemData* %data) - ret void -} - -define void @_cont_KernelEntry() #0 !lgc.rt.shaderstage !69 { - %cspInit = ptrtoint ptr @debug_global to i32 - call void @_AmdContStackSetPtr(i32 %cspInit) - call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 undef, %struct.DispatchSystemData poison) - ret void -} - -; Function Attrs: alwaysinline -define i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) #2 !pointeetys !45 { - %doanyhit = fcmp fast ogt float %t, 0.000000e+00 - br i1 %doanyhit, label %anyhit, label %accepthit - -anyhit: ; preds = %0 - %trav_data = load %struct.TraversalData, %struct.TraversalData* %data, align 4 - %newdata = call %struct.TraversalData @_AmdAwaitAnyHit(i64 3, i64 poison, %struct.TraversalData %trav_data) - store %struct.TraversalData %newdata, %struct.TraversalData* %data, align 4 - call void @_AmdRestoreSystemDataAnyHit(%struct.TraversalData* %data) - ret i1 true - -accepthit: ; preds = %0 - call void @_AmdAcceptHitAttributes(%struct.TraversalData* %data) - ret i1 true -} - -define %struct.HitData @_cont_GetCandidateState(%struct.TraversalData* %data) #0 !pointeetys !46 { - %resPtr = getelementptr %struct.TraversalData, %struct.TraversalData* %data, i32 0, i32 1 - %res = load %struct.HitData, %struct.HitData* %resPtr, align 4 - ret %struct.HitData %res -} - -define float @_cont_RayTCurrent(%struct.DispatchSystemData* nocapture readnone %data, %struct.HitData* %hitData) !pointeetys !47 { - %resPtr = getelementptr %struct.HitData, %struct.HitData* %hitData, i32 0, i32 0 - %res = load float, float* %resPtr, align 4 - ret float %res -} - -; Function Attrs: nounwind memory(none) -declare !pointeetys !49 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData* nocapture readnone) #3 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !50 <3 x float> @_cont_ObjectRayOrigin3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #3 - -; Function Attrs: nounwind memory(none) -declare !pointeetys !50 <3 x float> @_cont_ObjectRayDirection3(%struct.DispatchSystemData* nocapture readnone, %struct.HitData*) #3 - -; Function Attrs: nounwind -declare !pointeetys !35 void @_cont_AcceptHitAndEndSearch(%struct.DispatchSystemData* nocapture readnone) #1 - -; Function Attrs: nounwind -define void @MyRayGen() #4 !lgc.rt.shaderstage !64 { - %1 = load %dx.types.Handle, %dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 - %2 = load %dx.types.Handle, %dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 - %3 = alloca %struct.RayPayload, align 4 - %4 = bitcast %struct.RayPayload* %3 to i8* - call void @llvm.lifetime.start.p0i8(i64 16, i8* %4) #1 - %5 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %3, i32 0, i32 0 - store <4 x float> zeroinitializer, <4 x float>* %5, align 4, !tbaa !51 - %6 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %1) - %7 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %6, %dx.types.ResourceProperties { i32 16, i32 0 }) - call void @dx.op.traceRay.struct.RayPayload(i32 157, %dx.types.Handle %7, i32 16, i32 -1, i32 0, i32 1, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0x3F50624DE0000000, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+04, %struct.RayPayload* nonnull %3) - %8 = load <4 x float>, <4 x float>* %5, align 4, !tbaa !51 - %9 = call i32 @dx.op.dispatchRaysIndex.i32(i32 145, i8 0) - %10 = call i32 @dx.op.dispatchRaysIndex.i32(i32 145, i8 1) - %11 = call %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32 160, %dx.types.Handle %2) - %12 = call %dx.types.Handle @dx.op.annotateHandle(i32 216, %dx.types.Handle %11, %dx.types.ResourceProperties { i32 4098, i32 1033 }) - %13 = extractelement <4 x float> %8, i64 0 - %14 = extractelement <4 x float> %8, i64 1 - %15 = extractelement <4 x float> %8, i64 2 - %16 = extractelement <4 x float> %8, i64 3 - call void @dx.op.textureStore.f32(i32 67, %dx.types.Handle %12, i32 %9, i32 %10, i32 undef, float %13, float %14, float %15, float %16, i8 15) - call void @llvm.lifetime.end.p0i8(i64 16, i8* %4) #1 - ret void -} - -; Function Attrs: nounwind -define void @MyClosestHitShader(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readonly %attr) #4 !pointeetys !54 !lgc.rt.shaderstage !65 { - %1 = getelementptr inbounds %struct.BuiltInTriangleIntersectionAttributes, %struct.BuiltInTriangleIntersectionAttributes* %attr, i32 0, i32 0 - %2 = load <2 x float>, <2 x float>* %1, align 4 - %3 = extractelement <2 x float> %2, i32 0 - %4 = fsub fast float 1.000000e+00, %3 - %5 = extractelement <2 x float> %2, i32 1 - %6 = fsub fast float %4, %5 - %7 = insertelement <4 x float> undef, float %6, i64 0 - %8 = insertelement <4 x float> %7, float %3, i64 1 - %9 = insertelement <4 x float> %8, float %5, i64 2 - %10 = insertelement <4 x float> %9, float 1.000000e+00, i64 3 - %11 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %payload, i32 0, i32 0 - store <4 x float> %10, <4 x float>* %11, align 4 - ret void -} - -; Function Attrs: nounwind -define void @MyAnyHitShader(%struct.RayPayload* noalias nocapture %payload, %struct.BuiltInTriangleIntersectionAttributes* nocapture readnone %attr) #4 !pointeetys !54 !lgc.rt.shaderstage !66 { - %1 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %payload, i32 0, i32 0 - %2 = load <4 x float>, <4 x float>* %1, align 4 - %3 = call float @dx.op.objectRayOrigin.f32(i32 149, i8 0) - %4 = call float @dx.op.objectRayDirection.f32(i32 150, i8 0) - %5 = call float @dx.op.rayTCurrent.f32(i32 154) - %6 = fmul fast float %5, %4 - %7 = fadd fast float %6, %3 - %8 = fcmp fast ogt float %7, 0.000000e+00 - br i1 %8, label %9, label %10 - -9: ; preds = %0 - store <4 x float> %2, <4 x float>* %1, align 4 - call void @dx.op.acceptHitAndEndSearch(i32 156) - unreachable - -10: ; preds = %0 - store <4 x float> %2, <4 x float>* %1, align 4 - ret void -} - -; Function Attrs: nounwind -define void @MyIntersectionShader() #4 !lgc.rt.shaderstage !67 { - %1 = alloca %struct.BuiltInTriangleIntersectionAttributes, align 4 - %2 = call float @dx.op.rayTCurrent.f32(i32 154) - %3 = bitcast %struct.BuiltInTriangleIntersectionAttributes* %1 to i8* - call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #1 - %4 = call i1 @dx.op.reportHit.struct.BuiltInTriangleIntersectionAttributes(i32 158, float %2, i32 0, %struct.BuiltInTriangleIntersectionAttributes* nonnull %1) - call void @llvm.lifetime.end.p0i8(i64 8, i8* %3) #1 - ret void -} - -; Function Attrs: nounwind -define void @MyIntersectionShaderLargeAttrs() #4 { - %1 = alloca %struct.LargeIntersectionAttributes, align 4 - %2 = call float @dx.op.rayTCurrent.f32(i32 154) - %ptr0 = getelementptr %struct.LargeIntersectionAttributes, %struct.LargeIntersectionAttributes* %1, i32 0, i32 0, i32 0 - store i32 100, i32* %ptr0, align 4 - %ptr1 = getelementptr %struct.LargeIntersectionAttributes, %struct.LargeIntersectionAttributes* %1, i32 0, i32 0, i32 1 - store i32 101, i32* %ptr1, align 4 - %ptr2 = getelementptr %struct.LargeIntersectionAttributes, %struct.LargeIntersectionAttributes* %1, i32 0, i32 0, i32 2 - store i32 102, i32* %ptr2, align 4 - %ptr3 = getelementptr %struct.LargeIntersectionAttributes, %struct.LargeIntersectionAttributes* %1, i32 0, i32 0, i32 3 - store i32 103, i32* %ptr3, align 4 - %ptr4 = getelementptr %struct.LargeIntersectionAttributes, %struct.LargeIntersectionAttributes* %1, i32 0, i32 0, i32 4 - store i32 104, i32* %ptr4, align 4 - %ptr5 = getelementptr %struct.LargeIntersectionAttributes, %struct.LargeIntersectionAttributes* %1, i32 0, i32 0, i32 5 - store i32 105, i32* %ptr5, align 4 - %ptr6 = getelementptr %struct.LargeIntersectionAttributes, %struct.LargeIntersectionAttributes* %1, i32 0, i32 0, i32 6 - store i32 106, i32* %ptr6, align 4 - %3 = bitcast %struct.LargeIntersectionAttributes* %1 to i8* - call void @llvm.lifetime.start.p0i8(i64 8, i8* %3) #1 - %4 = call i1 @dx.op.reportHit.struct.LargeIntersectionAttributes(i32 158, float %2, i32 0, %struct.LargeIntersectionAttributes* nonnull %1) - call void @llvm.lifetime.end.p0i8(i64 8, i8* %3) #1 - ret void -} - -; Function Attrs: nounwind -define void @MyMissShader(%struct.RayPayload* noalias nocapture %payload) #4 !pointeetys !57 !lgc.rt.shaderstage !68 { - %1 = getelementptr inbounds %struct.RayPayload, %struct.RayPayload* %payload, i32 0, i32 0 - store <4 x float> , <4 x float>* %1, align 4 - ret void -} - -; Function Attrs: nounwind -declare !pointeetys !58 void @dx.op.traceRay.struct.RayPayload(i32, %dx.types.Handle, i32, i32, i32, i32, i32, float, float, float, float, float, float, float, float, %struct.RayPayload*) #1 - -; Function Attrs: nounwind -declare void @dx.op.textureStore.f32(i32, %dx.types.Handle, i32, i32, i32, float, float, float, float, i8) #1 - -; Function Attrs: nounwind memory(none) -declare i32 @dx.op.dispatchRaysIndex.i32(i32, i8) #3 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayDirection.f32(i32, i8) #3 - -; Function Attrs: nounwind memory(none) -declare float @dx.op.objectRayOrigin.f32(i32, i8) #3 - -; Function Attrs: nounwind memory(read) -declare float @dx.op.rayTCurrent.f32(i32) #5 - -declare void @dx.op.acceptHitAndEndSearch(i32) #0 - -; Function Attrs: nounwind -declare !pointeetys !59 i1 @dx.op.reportHit.struct.BuiltInTriangleIntersectionAttributes(i32, float, i32, %struct.BuiltInTriangleIntersectionAttributes*) #1 - -; Function Attrs: nounwind -declare !pointeetys !60 i1 @dx.op.reportHit.struct.LargeIntersectionAttributes(i32, float, i32, %struct.LargeIntersectionAttributes*) #1 - -; Function Attrs: nounwind memory(none) -declare %dx.types.Handle @dx.op.annotateHandle(i32, %dx.types.Handle, %dx.types.ResourceProperties) #3 - -; Function Attrs: nounwind memory(read) -declare %dx.types.Handle @dx.op.createHandleForLib.dx.types.Handle(i32, %dx.types.Handle) #5 - -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) -declare !pointeetys !62 void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #6 - -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) -declare !pointeetys !62 void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #6 - -attributes #0 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind } -attributes #2 = { alwaysinline } -attributes #3 = { nounwind memory(none) } -attributes #4 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #5 = { nounwind memory(read) } -attributes #6 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } - -!llvm.ident = !{!0} -!dx.version = !{!1} -!dx.valver = !{!1} -!dx.shaderModel = !{!2} -!dx.resources = !{!3} -!dx.typeAnnotations = !{!10} -!dx.entryPoints = !{!18, !20, !23, !25, !27, !29, !31} -!lgc.cps.module = !{} -!continuation.stackAddrspace = !{!70} ; SKIP_GLOBAL_ADDRSPACE -!lgc.rt.max.attribute.size = !{!71} - -!0 = !{!"clang version 3.7.0 (tags/RELEASE_370/final)"} -!1 = !{i32 1, i32 6} -!2 = !{!"lib", i32 6, i32 6} -!3 = !{!4, !7, null, null} -!4 = !{!5} -!5 = !{i32 0, %struct.RaytracingAccelerationStructure* bitcast (%dx.types.Handle* @"\01?Scene@@3URaytracingAccelerationStructure@@A" to %struct.RaytracingAccelerationStructure*), !"Scene", i32 0, i32 0, i32 1, i32 16, i32 0, !6} -!6 = !{i32 0, i32 4} -!7 = !{!8} -!8 = !{i32 0, %"class.RWTexture2D >"* bitcast (%dx.types.Handle* @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A" to %"class.RWTexture2D >"*), !"RenderTarget", i32 0, i32 0, i32 1, i32 2, i1 false, i1 false, i1 false, !9} -!9 = !{i32 0, i32 9} -!10 = !{i32 1, void ()* @MyRayGen, !11, void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @MyClosestHitShader, !14, void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @MyAnyHitShader, !14, void ()* @MyIntersectionShader, !11, void (%struct.RayPayload*)* @MyMissShader, !17} -!11 = !{!12} -!12 = !{i32 1, !13, !13} -!13 = !{} -!14 = !{!12, !15, !16} -!15 = !{i32 2, !13, !13} -!16 = !{i32 0, !13, !13} -!17 = !{!12, !15} -!18 = !{null, !"", null, !3, !19} -!19 = !{i32 0, i64 65536} -!20 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @MyAnyHitShader, !"MyAnyHitShader", null, null, !21} -!21 = !{i32 8, i32 9, i32 6, i32 16, i32 7, i32 8, i32 5, !22} -!22 = !{i32 0} -!23 = !{void (%struct.RayPayload*, %struct.BuiltInTriangleIntersectionAttributes*)* @MyClosestHitShader, !"MyClosestHitShader", null, null, !24} -!24 = !{i32 8, i32 10, i32 6, i32 16, i32 7, i32 8, i32 5, !22} -!25 = !{void ()* @MyIntersectionShader, !"MyIntersectionShader", null, null, !26} -!26 = !{i32 8, i32 8, i32 5, !22} -!27 = !{void (%struct.RayPayload*)* @MyMissShader, !"MyMissShader", null, null, !28} -!28 = !{i32 8, i32 11, i32 6, i32 16, i32 5, !22} -!29 = !{void ()* @MyRayGen, !"MyRayGen", null, null, !30} -!30 = !{i32 8, i32 7, i32 5, !22} -!31 = !{void ()* @MyIntersectionShaderLargeAttrs, !"MyIntersectionShaderLargeAttrs", null, null, !26} -!32 = !{%struct.SystemData poison} -!33 = !{i32 0, %struct.SystemData poison} -!34 = !{%struct.SystemData poison} -!35 = !{%struct.DispatchSystemData poison} -!36 = !{i32 0, %struct.DispatchSystemData poison} -!37 = !{%struct.TraversalData poison} -!38 = !{i32 0, %struct.TraversalData poison} -!39 = !{%struct.TraversalData poison} -!40 = !{%struct.SystemData poison} -!41 = !{%struct.SystemData poison} -!42 = !{%struct.DispatchSystemData poison} -!43 = !{%struct.DispatchSystemData poison} -!44 = !{%struct.DispatchSystemData poison} -!45 = !{%struct.TraversalData poison} -!46 = !{%struct.TraversalData poison} -!47 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!48 = !{i32 0, %struct.HitData poison} -!49 = !{%struct.DispatchSystemData poison} -!50 = !{null, %struct.DispatchSystemData poison, %struct.HitData poison} -!51 = !{!52, !52, i64 0} -!52 = !{!"omnipotent char", !53, i64 0} -!53 = !{!"Simple C/C++ TBAA"} -!54 = !{null, %struct.RayPayload poison, %struct.BuiltInTriangleIntersectionAttributes poison} -!55 = !{i32 0, %struct.RayPayload poison} -!56 = !{i32 0, %struct.BuiltInTriangleIntersectionAttributes poison} -!57 = !{%struct.RayPayload poison} -!58 = !{%struct.RayPayload poison} -!59 = !{%struct.BuiltInTriangleIntersectionAttributes poison} -!60 = !{%struct.LargeIntersectionAttributes poison} -!61 = !{i32 0, %struct.LargeIntersectionAttributes poison} -!62 = !{i8 poison} -!63 = !{i32 0, i8 poison} -!64 = !{i32 0} -!65 = !{i32 3} -!66 = !{i32 2} -!67 = !{i32 1} -!68 = !{i32 4} -!69 = !{i32 7} -!70 = !{i32 22} -!71 = !{i32 32} ; Intentionally allow more than the max used (7) so we can test that the actually used size is used. - -; LOWERRAYTRACINGPIPELINE-LABEL: define i1 @_cont_IsEndSearch( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-NEXT: ret i1 [[ISEND]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define void @_cont_SetTriangleHitAttributes( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret void -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-NEXT: ret i32 5 -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define void @_cont_KernelEntry( -; LOWERRAYTRACINGPIPELINE-SAME: ) #[[ATTR0]] !lgc.rt.shaderstage [[META36:![0-9]+]] !continuation.registercount [[META22:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[CSPINIT:%.*]] = ptrtoint ptr @debug_global to i32 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_AmdContStackSetPtr(i32 [[CSPINIT]]) -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 undef, [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison), !continuation.registercount [[META22]] -; LOWERRAYTRACINGPIPELINE-NEXT: ret void -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.HitData @_cont_GetCandidateState( -; LOWERRAYTRACINGPIPELINE-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define float @_cont_RayTCurrent( -; LOWERRAYTRACINGPIPELINE-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: ret float [[RES]] -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define void @MyRayGen( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META22]] !continuation.registercount [[META22]] !continuation.entry [[META13:![0-9]+]] !continuation [[META37:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = bitcast ptr [[TMP4]] to ptr -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP5]]) #[[ATTR1:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> zeroinitializer, ptr [[TMP6]], align 4, !tbaa [[TBAA38:![0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP7]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP8]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR2:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[ADDR_I]], 5 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP11]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP13]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP38]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP17]], ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa21i32a10i32s(i64 4, i32 8, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [8 x i32] poison, [10 x i32] [[TMP41]]), !continuation.registercount [[META34:![0-9]+]], !waitmask [[META13]], !continuation.returnedRegistercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP43]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [10 x i32] [[TMP24]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = freeze [[STRUCT_RAYPAYLOAD]] poison -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_RAYPAYLOAD]] [[TMP40]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP21]], ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP44]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP23]], ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = getelementptr inbounds i32, ptr [[TMP22]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr [[TMP44]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP31]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP25]], ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[TMP22]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = getelementptr inbounds i32, ptr [[TMP44]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP45]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP27]], ptr [[TMP26]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP43]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP19]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE: .split: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = load <4 x float>, ptr [[TMP6]], align 4, !tbaa [[TBAA38]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[TMP29]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[TMP30]], i8 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP3]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP42]], [[DX_TYPES_RESOURCEPROPERTIES]] { i32 4098, i32 1033 }) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = extractelement <4 x float> [[TMP28]], i64 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = extractelement <4 x float> [[TMP28]], i64 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = extractelement <4 x float> [[TMP28]], i64 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = extractelement <4 x float> [[TMP28]], i64 3 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP32]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP33]], float [[TMP34]], float [[TMP35]], float [[TMP36]], i8 15) -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: call void @lgc.cps.complete() -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @MyClosestHitShader( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META41:![0-9]+]] !continuation.registercount [[META34]] !continuation [[META42:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[HITATTRS:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [10 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP6]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP8]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP10]], ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP12]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_I:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP13]], ptr [[HITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP16]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[HITATTRS]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load <2 x float>, ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = extractelement <2 x float> [[TMP23]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = fsub fast float 1.000000e+00, [[TMP24]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = extractelement <2 x float> [[TMP23]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = fsub fast float [[TMP25]], [[TMP26]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = insertelement <4 x float> undef, float [[TMP27]], i64 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = insertelement <4 x float> [[TMP28]], float [[TMP24]], i64 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = insertelement <4 x float> [[TMP29]], float [[TMP26]], i64 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = insertelement <4 x float> [[TMP30]], float 1.000000e+00, i64 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> [[TMP31]], ptr [[TMP32]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP3]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP33]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP36]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, ptr [[TMP33]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP39]], ptr [[TMP34]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[TMP34]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP41]], ptr [[TMP38]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[TMP34]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = load i32, ptr [[TMP42]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP43]], ptr [[TMP46]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP44]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP45]], [21 x i32] poison, [10 x i32] [[TMP47]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.TraversalData @MyAnyHitShader( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], [6 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META43:![0-9]+]] !continuation.registercount [[META34]] !continuation [[META44:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ORIGHITATTRS:%.*]] = alloca [8 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[HITATTRSALLOCA:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [10 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP9]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP12]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP16]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, ptr [[TMP22]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP18]], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[TMP22]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP38]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP23]], ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP19]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[VAL_I:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD_ATTR_MAX_8_I32S_LAYOUT_1_ANYHIT_IN:%.*]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP42:%.*]] = load i32, ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP42]], ptr [[ORIGHITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[ORIGHITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP55:%.*]] = load i32, ptr [[TMP40]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP55]], ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP9]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = load <4 x float>, ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I3:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I4:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I4]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = call <3 x float> @_cont_ObjectRayOrigin3(ptr [[TMP26]], ptr [[TMP4]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[TMP27]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = call <3 x float> @_cont_ObjectRayDirection3(ptr [[TMP28]], ptr [[TMP5]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[TMP29]], i8 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I5:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I6:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I6]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I7:%.*]] = load float, ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = fmul fast float [[RES_I7]], [[EXTRACT]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP32:%.*]] = fadd fast float [[TMP31]], [[EXTRACT1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = fcmp fast ogt float [[TMP32]], 0.000000e+00 -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[TMP33]], label [[TMP34:%.*]], label [[TMP51:%.*]] -; LOWERRAYTRACINGPIPELINE: 38: -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> [[TMP25]], ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP35]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP9]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP36]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP41]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP45:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP43:%.*]] = getelementptr inbounds i32, ptr [[TMP36]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP44:%.*]] = load i32, ptr [[TMP43]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP44]], ptr [[TMP45]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP48:%.*]] = getelementptr inbounds i32, ptr [[TMP45]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[TMP43]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP47]], ptr [[TMP48]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr [[TMP45]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP49:%.*]] = getelementptr inbounds i32, ptr [[TMP43]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP56:%.*]] = load i32, ptr [[TMP49]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP56]], ptr [[TMP50]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP57:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP57]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP52:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP53:%.*]] = getelementptr inbounds i32, ptr [[TMP7]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP54:%.*]] = load i32, ptr [[TMP52]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP54]], ptr [[TMP53]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP58:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I1:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP59]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP58]], ptr [[ADDR_I1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP60:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP68:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TMP60]], [8 x i32] poison, [10 x i32] [[TMP68]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 59: -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> [[TMP25]], ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP9]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP61:%.*]] = load i32, ptr [[TMP62]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP61]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP66:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP63:%.*]] = getelementptr inbounds i32, ptr [[TMP62]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP64:%.*]] = load i32, ptr [[TMP63]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP64]], ptr [[TMP66]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr [[TMP66]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP75:%.*]] = getelementptr inbounds i32, ptr [[TMP63]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP67:%.*]] = load i32, ptr [[TMP75]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP67]], ptr [[TMP65]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP71:%.*]] = getelementptr inbounds i32, ptr [[TMP66]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP69:%.*]] = getelementptr inbounds i32, ptr [[TMP63]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP70:%.*]] = load i32, ptr [[TMP69]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP70]], ptr [[TMP71]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP76:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP76]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP72:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP73:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP74:%.*]] = load i32, ptr [[TMP72]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP74]], ptr [[TMP73]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP79:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I2:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP80]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP79]], ptr [[ADDR_I2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP81:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP78:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TMP81]], [8 x i32] poison, [10 x i32] [[TMP78]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.TraversalData @MyIntersectionShader( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META45:![0-9]+]] !continuation.registercount [[META33:![0-9]+]] !continuation [[META46:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I1:%.*]] = load float, ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = bitcast ptr [[TMP4]] to ptr -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[TMP7]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I1]], 0.000000e+00 -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; LOWERRAYTRACINGPIPELINE: anyhit.i: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = call { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.TraversalDatasa8i32a30i32s(i64 3, i32 16, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP8]], [6 x i32] poison, [30 x i32] [[TMP9]]), !continuation.registercount [[META33]], !continuation.returnedRegistercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP19]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[TMP25]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP19]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP10]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[_CONT_REPORTHIT_EXIT:%.*]] -; LOWERRAYTRACINGPIPELINE: accepthit.i: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP12]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP17]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP16]], ptr [[ADDR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[_CONT_REPORTHIT_EXIT]] -; LOWERRAYTRACINGPIPELINE: _cont_ReportHit.exit: -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[ISEND_I]], label [[TMP20:%.*]], label [[TMP22:%.*]] -; LOWERRAYTRACINGPIPELINE: 21: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TMP21]], [8 x i32] poison, [30 x i32] [[TMP24]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 24: -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr [[TMP7]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TMP23]], [8 x i32] poison, [30 x i32] [[TMP27]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.TraversalData @MyIntersectionShaderLargeAttrs( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META45]] !continuation.registercount [[META33]] !continuation [[META47:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_LARGEINTERSECTIONATTRIBUTES:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[RES_I1:%.*]] = load float, ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PTR0:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 100, ptr [[PTR0]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PTR1:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 101, ptr [[PTR1]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PTR2:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], i32 0, i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 102, ptr [[PTR2]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PTR3:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], i32 0, i32 0, i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 103, ptr [[PTR3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PTR4:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], i32 0, i32 0, i32 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 104, ptr [[PTR4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PTR5:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], i32 0, i32 0, i32 5 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 105, ptr [[PTR5]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PTR6:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], i32 0, i32 0, i32 6 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 106, ptr [[PTR6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = bitcast ptr [[TMP4]] to ptr -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[TMP7]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I1]], 0.000000e+00 -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; LOWERRAYTRACINGPIPELINE: anyhit.i: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = load [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = call { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.TraversalDatasa8i32a30i32s(i64 3, i32 16, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[TMP8]], [1 x i32] poison, [30 x i32] [[TMP9]]), !continuation.registercount [[META33]], !continuation.returnedRegistercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP34]], 2 -; LOWERRAYTRACINGPIPELINE-NEXT: store [30 x i32] [[TMP35]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP34]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP10]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[_CONT_REPORTHIT_EXIT:%.*]] -; LOWERRAYTRACINGPIPELINE: accepthit.i: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP36:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP12]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP15]], ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP17]], ptr [[TMP36]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, ptr [[TMP36]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP19]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP39:%.*]] = getelementptr inbounds i32, ptr [[TMP36]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP21]], ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 5 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr [[TMP36]], i32 3 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP23]], ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 6 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[TMP36]], i32 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP25]], ptr [[TMP40]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP27]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP26]], ptr [[ADDR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: br label [[_CONT_REPORTHIT_EXIT]] -; LOWERRAYTRACINGPIPELINE: _cont_ReportHit.exit: -; LOWERRAYTRACINGPIPELINE-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-NEXT: br i1 [[ISEND_I]], label [[TMP30:%.*]], label [[TMP32:%.*]] -; LOWERRAYTRACINGPIPELINE: 35: -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP31:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TMP31]], [8 x i32] poison, [30 x i32] [[TMP38]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE: 38: -; LOWERRAYTRACINGPIPELINE-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr [[TMP7]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP41:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_TRAVERSALDATA]] [[TMP33]], [8 x i32] poison, [30 x i32] [[TMP41]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-LABEL: define %struct.DispatchSystemData @MyMissShader( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META48:![0-9]+]] !continuation.registercount [[META34]] !continuation [[META49:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-NEXT: store [10 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_SYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP5:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP5]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP7]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP9]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP11]], ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: store <4 x float> , ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP19]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP22]], ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[TMP18]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i32 1 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP24]], ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP18]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP25:%.*]] = getelementptr inbounds i32, ptr [[TMP20]], i32 2 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP26]], ptr [[TMP30]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP27]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP29:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP28]], [21 x i32] poison, [10 x i32] [[TMP29]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define i1 @_cont_IsEndSearch( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR1:[0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-NEXT: ret i1 [[ISEND]] -; -; -; DXILCONTPOSTPROCESS-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; DXILCONTPOSTPROCESS-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; DXILCONTPOSTPROCESS-LABEL: define void @_cont_SetTriangleHitAttributes( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; DXILCONTPOSTPROCESS-NEXT: ret void -; -; -; DXILCONTPOSTPROCESS-LABEL: define i32 @_cont_GetLocalRootIndex( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-NEXT: ret i32 5 -; -; -; DXILCONTPOSTPROCESS-LABEL: define void @_cont_KernelEntry( -; DXILCONTPOSTPROCESS-SAME: ) #[[ATTR1]] !lgc.rt.shaderstage [[META36:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: [[CSPINIT:%.*]] = ptrtoint ptr @debug_global to i32 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 0, i32 [[TMP1]], i64 undef, [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison) -; DXILCONTPOSTPROCESS-NEXT: ret void -; -; -; DXILCONTPOSTPROCESS-LABEL: define %struct.HitData @_cont_GetCandidateState( -; DXILCONTPOSTPROCESS-SAME: ptr [[DATA:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; DXILCONTPOSTPROCESS-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; DXILCONTPOSTPROCESS-LABEL: define float @_cont_RayTCurrent( -; DXILCONTPOSTPROCESS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; DXILCONTPOSTPROCESS-NEXT: ret float [[RES]] -; -; -; DXILCONTPOSTPROCESS-LABEL: define void @MyRayGen( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation.entry [[META13:![0-9]+]] !continuation [[META37:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP1]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP3]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP4]]) -; DXILCONTPOSTPROCESS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyRayGen.resume.0) -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP6]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP7]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP8]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP9]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP10]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP11]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define dso_local void @MyRayGen.resume.0( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [21 x i32], [10 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META22]] !continuation [[META37]] { -; DXILCONTPOSTPROCESS-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA1:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP20:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP20]], ptr [[SYSTEM_DATA_ALLOCA1]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP18:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP1]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = extractvalue [10 x i32] [[TMP18]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP18]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP18]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP18]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP18]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP18]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP18]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = extractvalue [10 x i32] [[TMP18]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = extractvalue [10 x i32] [[TMP18]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = extractvalue [10 x i32] [[TMP18]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[TMP21:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP21]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP12]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTFCA_0_EXTRACT]], float [[TMP2]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP3]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP4]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP6]], i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP7]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP8]], i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[TMP19:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT21:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP19]], 0 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[TMP10]], i8 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[TMP11]], i8 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP22:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP9]]) -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP22]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 4098, i32 1033 }) -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 3 -; DXILCONTPOSTPROCESS-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP13]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP14]], float [[TMP15]], float [[TMP16]], float [[TMP17]], i8 15) -; DXILCONTPOSTPROCESS-NEXT: ret void -; -; -; DXILCONTPOSTPROCESS-LABEL: define void @MyClosestHitShader( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META38:![0-9]+]] !continuation [[META39:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP1]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP2]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP3]], i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP4]], i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTFCA_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_011_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_011_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to float -; DXILCONTPOSTPROCESS-NEXT: [[HITATTRS_SROA_0_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP6]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_011_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_011_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP7]] to float -; DXILCONTPOSTPROCESS-NEXT: [[HITATTRS_SROA_0_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[HITATTRS_SROA_0_0_VEC_INSERT]], float [[TMP8]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = fsub fast float 1.000000e+00, [[TMP13]] -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = fsub fast float [[TMP14]], [[TMP15]] -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = insertelement <4 x float> undef, float [[TMP16]], i64 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP18:%.*]] = insertelement <4 x float> [[TMP17]], float [[TMP13]], i64 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP19:%.*]] = insertelement <4 x float> [[TMP18]], float [[TMP15]], i64 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP20:%.*]] = insertelement <4 x float> [[TMP19]], float 1.000000e+00, i64 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP20]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP21:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP20]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP22:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP20]], i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP23:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP20]], i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[TMP24:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP21]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP22]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP23]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP24]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[TMP25:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP25]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [21 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define void @MyAnyHitShader( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], [6 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META40:![0-9]+]] !continuation [[META41:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], ptr [[DOTFCA_0_0_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <2 x float> [[DOTFCA_0_1_0_EXTRACT]], ptr [[DOTFCA_0_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_1_0_EXTRACT]], ptr [[DOTFCA_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[DOTFCA_1_1_EXTRACT]], ptr [[DOTFCA_1_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; DXILCONTPOSTPROCESS-NEXT: store <3 x float> [[DOTFCA_2_EXTRACT]], ptr [[DOTFCA_2_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; DXILCONTPOSTPROCESS-NEXT: store <3 x float> [[DOTFCA_3_EXTRACT]], ptr [[DOTFCA_3_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; DXILCONTPOSTPROCESS-NEXT: store float [[DOTFCA_4_EXTRACT]], ptr [[DOTFCA_4_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; DXILCONTPOSTPROCESS-NEXT: store i64 [[DOTFCA_5_EXTRACT]], ptr [[DOTFCA_5_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP5]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP6]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP7]], i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP8]], i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP9]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0108_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0108_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0108_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = bitcast float [[DOTSROA_0108_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], 0 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR_I3:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I4_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I4_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I4_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_0_INSERT]], i32 [[RES_I4_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[RES_I4_FCA_1_INSERT_FCA_0_EXTRACT]], ptr [[RES_I4_FCA_1_INSERT_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[RES_I4_FCA_1_INSERT_FCA_1_EXTRACT]], ptr [[RES_I4_FCA_1_INSERT_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = call <3 x float> @_cont_ObjectRayOrigin3(ptr [[TMP12]], ptr [[TMP2]]) -; DXILCONTPOSTPROCESS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[TMP13]], i8 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[RES_I_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], ptr [[RES_I_FCA_1_INSERT_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT]], ptr [[RES_I_FCA_1_INSERT_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = call <3 x float> @_cont_ObjectRayDirection3(ptr [[TMP14]], ptr [[TMP3]]) -; DXILCONTPOSTPROCESS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[TMP15]], i8 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RESPTR_I5:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I6_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I6_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I6_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I6_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I6_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I6_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I6_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I6_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I6_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_0_INSERT]], i32 [[RES_I6_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I6_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I6_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = fmul fast float [[RES_I6_FCA_1_INSERT_FCA_0_EXTRACT]], [[EXTRACT]] -; DXILCONTPOSTPROCESS-NEXT: [[TMP18:%.*]] = fadd fast float [[TMP17]], [[EXTRACT1]] -; DXILCONTPOSTPROCESS-NEXT: [[TMP19:%.*]] = fcmp fast ogt float [[TMP18]], 0.000000e+00 -; DXILCONTPOSTPROCESS-NEXT: br i1 [[TMP19]], label [[TMP20:%.*]], label [[TMP32:%.*]] -; DXILCONTPOSTPROCESS: 20: -; DXILCONTPOSTPROCESS-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP21]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP22:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP23:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP24:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[TMP29:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT9:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP30:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT9]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP31:%.*]] = bitcast i32 [[TMP30]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_062_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP31]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT11:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP28:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT11]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP33:%.*]] = bitcast i32 [[TMP28]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_062_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_062_0_VEC_INSERT]], float [[TMP33]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_062_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[ADDR_I1:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP34]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT25:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT25]], ptr [[DOTFCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_GEP70:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_GEP70]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_LOAD]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP71:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_1_0_GEP71]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_GEP72:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP72]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_GEP73:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP73]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_GEP30:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_2_GEP30]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_LOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_GEP31:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_3_GEP31]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT]], <3 x float> [[DOTFCA_3_LOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_GEP32:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_LOAD:%.*]] = load float, ptr [[DOTFCA_4_GEP32]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT]], float [[DOTFCA_4_LOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_GEP33:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_5_GEP33]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT]], i64 [[DOTFCA_5_LOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP22]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT1:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT1:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT1]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT1:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT1]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT1:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT1]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT1]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP23]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP24]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP29]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[TMP35:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP35]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; DXILCONTPOSTPROCESS: 32: -; DXILCONTPOSTPROCESS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT14:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP37:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT14]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT18:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP38:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT18]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT20:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP39:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT20]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT23:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[TMP40:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT23]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP41:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP42:%.*]] = bitcast i32 [[TMP41]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_066_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP42]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP43:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP44:%.*]] = bitcast i32 [[TMP43]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_066_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_066_0_VEC_INSERT]], float [[TMP44]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT65:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_066_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[ADDR_I2:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP45]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT34:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT65]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_GEP35:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I2]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT34]], ptr [[DOTFCA_0_GEP35]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_GEP36:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_LOAD37:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_GEP36]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT38:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_LOAD37]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_GEP39:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_LOAD40:%.*]] = load <2 x float>, ptr [[DOTFCA_0_1_0_GEP39]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT41:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT38]], <2 x float> [[DOTFCA_0_1_0_LOAD40]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_GEP42:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_LOAD43:%.*]] = load float, ptr [[DOTFCA_1_0_GEP42]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT44:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT41]], float [[DOTFCA_1_0_LOAD43]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_GEP45:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_LOAD46:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP45]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT47:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT44]], i32 [[DOTFCA_1_1_LOAD46]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_GEP48:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_LOAD49:%.*]] = load <3 x float>, ptr [[DOTFCA_2_GEP48]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT50:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT47]], <3 x float> [[DOTFCA_2_LOAD49]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_GEP51:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_LOAD52:%.*]] = load <3 x float>, ptr [[DOTFCA_3_GEP51]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT53:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT50]], <3 x float> [[DOTFCA_3_LOAD52]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_GEP54:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_LOAD55:%.*]] = load float, ptr [[DOTFCA_4_GEP54]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT56:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT53]], float [[DOTFCA_4_LOAD55]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_GEP57:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_LOAD58:%.*]] = load i64, ptr [[DOTFCA_5_GEP57]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT59:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT56]], i64 [[DOTFCA_5_LOAD58]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT27:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP37]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT30:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT27]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT33:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT30]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT36:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT33]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT39:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT36]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT42:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT39]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT45:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT42]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT48:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT45]], i32 [[TMP38]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT51:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT48]], i32 [[TMP39]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT54:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT51]], i32 [[TMP40]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[TMP46:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP46]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT59]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT54]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define void @MyIntersectionShader( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META42:![0-9]+]] !continuation [[META43:![0-9]+]] !continuation.stacksize [[META44:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i64 [[RETURNADDR]], ptr addrspace(21) [[TMP4]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT272:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT273:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT274:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT275:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 5 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, float [[DOTFCA_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], 0.000000e+00 -; DXILCONTPOSTPROCESS-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; DXILCONTPOSTPROCESS: anyhit.i: -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_2_INSERT]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_3_INSERT]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_4_INSERT]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> undef, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT7:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT4]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT10:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT7]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT13:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT10]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT16:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT13]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT19:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT16]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT22:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT19]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT25:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT22]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT28:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT25]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT31:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT28]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT34:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT31]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT37:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT34]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT40:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT37]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT43:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT40]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT46:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT43]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT49:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT46]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT52:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT49]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT55:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT52]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT58:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT55]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT61:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT58]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT64:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT61]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT67:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT64]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT70:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT67]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT73:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT70]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT76:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT73]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT79:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT76]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT82:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT79]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT85:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT82]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT88:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT85]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT91:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT88]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShader.resume.0) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP5]], i64 [[TMP6]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_5_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT]], [6 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT91]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; DXILCONTPOSTPROCESS: accepthit.i: -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP7]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0345_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0345_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0345_0_VEC_INSERT]], float [[TMP10]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT344:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0345_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT304:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT344]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-NEXT: br i1 [[ISEND_I]], label [[TMP11:%.*]], label [[TMP15:%.*]] -; DXILCONTPOSTPROCESS: 11: -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT307:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT310:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT307]], <2 x float> [[DOTFCA_0_EXTRACT304]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT313:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT310]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT316:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT313]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT319:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT316]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT322:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT319]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT325:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT322]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT328:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT325]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], -8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP13]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP14]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT328]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; DXILCONTPOSTPROCESS: 15: -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_EXTRACT304]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT281:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT283:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT281]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT285:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT283]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT287:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT285]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = add i32 [[TMP16]], -8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP17]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP18:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP18]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT287]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define dso_local void @MyIntersectionShader.resume.0( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_TRAVERSALDATA:%.*]], [8 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META42]] !continuation [[META43]] { -; DXILCONTPOSTPROCESS-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP15]], -8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP1]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_EXTRACT10:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT12:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT14:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT16:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT18:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT20:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT22:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT24:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 5 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-NEXT: br i1 [[ISEND_I]], label [[TMP3:%.*]], label [[TMP9:%.*]] -; DXILCONTPOSTPROCESS: 6: -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RETURNADDR_RELOAD2:%.*]] = load i64, ptr addrspace(21) [[TMP5]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT28:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT10]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT31:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT28]], <2 x float> [[DOTFCA_0_1_0_EXTRACT12]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT34:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT31]], float [[DOTFCA_1_0_EXTRACT14]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT37:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT34]], i32 [[DOTFCA_1_1_EXTRACT16]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT40:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT37]], <3 x float> [[DOTFCA_2_EXTRACT18]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT43:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT40]], <3 x float> [[DOTFCA_3_EXTRACT20]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT46:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT43]], float [[DOTFCA_4_EXTRACT22]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT49:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT46]], i64 [[DOTFCA_5_EXTRACT24]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], -8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP7]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD2]], i32 [[TMP8]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT49]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; DXILCONTPOSTPROCESS: 12: -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP10]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(21) [[TMP11]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT10]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT12]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT14]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT16]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT18]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT]], <3 x float> [[DOTFCA_3_EXTRACT20]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT]], float [[DOTFCA_4_EXTRACT22]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT]], i64 [[DOTFCA_5_EXTRACT24]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT1]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT1]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT1]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT1]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], -8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP13]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP14]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define void @MyIntersectionShaderLargeAttrs( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META42]] !continuation [[META45:![0-9]+]] !continuation.stacksize [[META44]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP2]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP3]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: store i64 [[RETURNADDR]], ptr addrspace(21) [[TMP4]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT272:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT273:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT274:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT275:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 5 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, float [[DOTFCA_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], 0.000000e+00 -; DXILCONTPOSTPROCESS-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; DXILCONTPOSTPROCESS: anyhit.i: -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_2_INSERT]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_3_INSERT]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[TRAV_DATA_I_FCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_4_INSERT]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES:%.*]] poison, i32 100, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_0_INSERT]], i32 101, 0, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_1_INSERT]], i32 102, 0, 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_2_INSERT]], i32 103, 0, 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_3_INSERT]], i32 104, 0, 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_4_INSERT]], i32 105, 0, 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_6_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_5_INSERT]], i32 106, 0, 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT7:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT4]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT10:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT7]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT13:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT10]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT16:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT13]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT19:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT16]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT22:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT19]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT25:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT22]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT28:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT25]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT31:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT28]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT34:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT31]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT37:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT34]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT40:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT37]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT43:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT40]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT46:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT43]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT49:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT46]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT52:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT49]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT55:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT52]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT58:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT55]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT61:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT58]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT64:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT61]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT67:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT64]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT70:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT67]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT73:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT70]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT76:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT73]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT79:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT76]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT82:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT79]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT85:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT82]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT88:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT85]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT91:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT88]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShaderLargeAttrs.resume.0) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP5]], i64 [[TMP6]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_5_INSERT]], [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_6_INSERT]], [1 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT91]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; DXILCONTPOSTPROCESS: accepthit.i: -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = bitcast i32 100 to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0350_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP7]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = bitcast i32 101 to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_070_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0350_0_VEC_INSERT]], float [[TMP8]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTSROA_070_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-NEXT: br i1 [[ISEND_I]], label [[TMP9:%.*]], label [[TMP13:%.*]] -; DXILCONTPOSTPROCESS: 9: -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT307:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT310:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT307]], <2 x float> [[DOTFCA_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT313:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT310]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT316:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT313]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT319:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT316]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT322:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT319]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT325:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT322]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT328:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT325]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 102, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 103, 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 104, 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 105, 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 106, 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], -8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP11]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP12]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT328]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; DXILCONTPOSTPROCESS: 13: -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT281:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT283:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT281]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT285:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT283]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT287:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT285]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT1]], i32 102, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 103, 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 104, 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 105, 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 106, 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = add i32 [[TMP14]], -8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP15]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP16]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT287]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define dso_local void @MyIntersectionShaderLargeAttrs.resume.0( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_TRAVERSALDATA:%.*]], [8 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META42]] !continuation [[META45]] { -; DXILCONTPOSTPROCESS-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = add i32 [[TMP15]], -8 -; DXILCONTPOSTPROCESS-NEXT: [[TMP16:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP1]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP17:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_EXTRACT10:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_EXTRACT12:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT14:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_EXTRACT16:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_EXTRACT18:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_EXTRACT20:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_EXTRACT22:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_EXTRACT24:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 5 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-NEXT: br i1 [[ISEND_I]], label [[TMP3:%.*]], label [[TMP9:%.*]] -; DXILCONTPOSTPROCESS: 6: -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP4]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RETURNADDR_RELOAD2:%.*]] = load i64, ptr addrspace(21) [[TMP5]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT28:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT10]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT31:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT28]], <2 x float> [[DOTFCA_0_1_0_EXTRACT12]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT34:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT31]], float [[DOTFCA_1_0_EXTRACT14]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT37:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT34]], i32 [[DOTFCA_1_1_EXTRACT16]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT40:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT37]], <3 x float> [[DOTFCA_2_EXTRACT18]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT43:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT40]], <3 x float> [[DOTFCA_3_EXTRACT20]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT46:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT43]], float [[DOTFCA_4_EXTRACT22]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT49:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT46]], i64 [[DOTFCA_5_EXTRACT24]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], -8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP7]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD2]], i32 [[TMP8]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT49]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; DXILCONTPOSTPROCESS: 12: -; DXILCONTPOSTPROCESS-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP10]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(21) [[TMP11]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT10]], 0, 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT12]], 0, 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT14]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT16]], 1, 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT18]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT]], <3 x float> [[DOTFCA_3_EXTRACT20]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT]], float [[DOTFCA_4_EXTRACT22]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT]], i64 [[DOTFCA_5_EXTRACT24]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT1]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT1]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT1]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT1]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], -8 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[TMP13]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP14]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-LABEL: define void @MyMissShader( -; DXILCONTPOSTPROCESS-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META46:![0-9]+]] !continuation [[META47:![0-9]+]] { -; DXILCONTPOSTPROCESS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP1]], i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP2]], i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP3]], i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP4]], i32 3 -; DXILCONTPOSTPROCESS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 0 -; DXILCONTPOSTPROCESS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 1 -; DXILCONTPOSTPROCESS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 2 -; DXILCONTPOSTPROCESS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 3 -; DXILCONTPOSTPROCESS-NEXT: [[TMP12:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP5]], 0 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP6]], 7 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP7]], 8 -; DXILCONTPOSTPROCESS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP12]], 9 -; DXILCONTPOSTPROCESS-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP13]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [21 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define i1 @_cont_IsEndSearch( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: ptr [[DATA:%.*]]) #[[ATTR1:[0-9]+]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: ret i1 [[ISEND]] -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: ptr [[DATA:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define void @_cont_SetTriangleHitAttributes( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: ret void -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define i32 @_cont_GetLocalRootIndex( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: ptr [[DATA:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: ret i32 5 -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define void @_cont_KernelEntry( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: ) #[[ATTR1]] !lgc.rt.shaderstage [[META36:![0-9]+]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSPINIT:%.*]] = ptrtoint ptr @debug_global to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 0, i32 [[TMP3]], i64 undef, [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: ret void -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define %struct.HitData @_cont_GetCandidateState( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: ptr [[DATA:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define float @_cont_RayTCurrent( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: ret float [[RES]] -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define void @MyRayGen( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !continuation.entry [[META13:![0-9]+]] !continuation [[META37:![0-9]+]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT20:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP3]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP5]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP6]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT20]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyRayGen.resume.0) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP8]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP9]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP10]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP11]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP12]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP13]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define dso_local void @MyRayGen.resume.0( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [21 x i32], [10 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META22]] !continuation [[META37]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[SYSTEM_DATA_ALLOCA1:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP2]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP22:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP22]], ptr [[SYSTEM_DATA_ALLOCA1]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP20:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP1]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = extractvalue [10 x i32] [[TMP20]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP20]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP20]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP20]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP20]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP20]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP20]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = extractvalue [10 x i32] [[TMP20]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = extractvalue [10 x i32] [[TMP20]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = extractvalue [10 x i32] [[TMP20]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP23:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP23]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP3]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTFCA_0_EXTRACT]], float [[TMP4]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP6]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP7]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP8]], i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP10]], i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP21:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT21:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP21]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[TMP12]], i8 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[SYSTEM_DATA_ALLOCA1]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[TMP13]], i8 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP24:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP11]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP24]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 4098, i32 1033 }) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP16:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP18:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP19:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP15]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP16]], float [[TMP17]], float [[TMP18]], float [[TMP19]], i8 15) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: ret void -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define void @MyClosestHitShader( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META38:![0-9]+]] !continuation [[META39:![0-9]+]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP3]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP4]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP5]], i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP6]], i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTFCA_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_011_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_011_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP7]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[HITATTRS_SROA_0_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_011_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_011_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP10:%.*]] = bitcast i32 [[TMP9]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[HITATTRS_SROA_0_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[HITATTRS_SROA_0_0_VEC_INSERT]], float [[TMP10]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP16:%.*]] = fsub fast float 1.000000e+00, [[TMP15]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP18:%.*]] = fsub fast float [[TMP16]], [[TMP17]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP19:%.*]] = insertelement <4 x float> undef, float [[TMP18]], i64 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP20:%.*]] = insertelement <4 x float> [[TMP19]], float [[TMP15]], i64 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP21:%.*]] = insertelement <4 x float> [[TMP20]], float [[TMP17]], i64 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP22:%.*]] = insertelement <4 x float> [[TMP21]], float 1.000000e+00, i64 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP22]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP23:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP22]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP24:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP22]], i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP25:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP22]], i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP26:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP23]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP24]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP25]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP26]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP27:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP27]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [21 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define void @MyAnyHitShader( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[TMP1:%.*]], [6 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META40:![0-9]+]] !continuation [[META41:![0-9]+]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], ptr [[DOTFCA_0_0_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store <2 x float> [[DOTFCA_0_1_0_EXTRACT]], ptr [[DOTFCA_0_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store float [[DOTFCA_1_0_EXTRACT]], ptr [[DOTFCA_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[DOTFCA_1_1_EXTRACT]], ptr [[DOTFCA_1_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store <3 x float> [[DOTFCA_2_EXTRACT]], ptr [[DOTFCA_2_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store <3 x float> [[DOTFCA_3_EXTRACT]], ptr [[DOTFCA_3_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store float [[DOTFCA_4_EXTRACT]], ptr [[DOTFCA_4_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i64 [[DOTFCA_5_EXTRACT]], ptr [[DOTFCA_5_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP7]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP8]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP9]], i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP10:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP10]], i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP11]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0108_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = bitcast float [[DOTSROA_0108_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0108_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = bitcast float [[DOTSROA_0108_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP1]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RESPTR_I3:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I4_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I4_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I4_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_0_INSERT]], i32 [[RES_I4_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_1_INSERT_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store float [[RES_I4_FCA_1_INSERT_FCA_0_EXTRACT]], ptr [[RES_I4_FCA_1_INSERT_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I4_FCA_1_INSERT_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP2]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[RES_I4_FCA_1_INSERT_FCA_1_EXTRACT]], ptr [[RES_I4_FCA_1_INSERT_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = call <3 x float> @_cont_ObjectRayOrigin3(ptr [[TMP14]], ptr [[TMP2]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[TMP15]], i8 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[RES_I_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], ptr [[RES_I_FCA_1_INSERT_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP3]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT]], ptr [[RES_I_FCA_1_INSERT_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = call <3 x float> @_cont_ObjectRayDirection3(ptr [[TMP16]], ptr [[TMP3]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[TMP17]], i8 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RESPTR_I5:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I6_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I6_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I6_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I6_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I6_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I6_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I6_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I6_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I6_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_0_INSERT]], i32 [[RES_I6_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I6_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I6_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP19:%.*]] = fmul fast float [[RES_I6_FCA_1_INSERT_FCA_0_EXTRACT]], [[EXTRACT]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP20:%.*]] = fadd fast float [[TMP19]], [[EXTRACT1]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP21:%.*]] = fcmp fast ogt float [[TMP20]], 0.000000e+00 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: br i1 [[TMP21]], label [[TMP22:%.*]], label [[TMP34:%.*]] -; DXILCONTPOSTPROCESS-GLOBAL: 22: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP23]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP24:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP25:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP26:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP31:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT9:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP32:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT9]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP33:%.*]] = bitcast i32 [[TMP32]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_062_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP33]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT11:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP30:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT11]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP35:%.*]] = bitcast i32 [[TMP30]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_062_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_062_0_VEC_INSERT]], float [[TMP35]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_062_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ADDR_I1:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP36]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT25:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT25]], ptr [[DOTFCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_GEP70:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_GEP70]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_LOAD]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_GEP71:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_1_0_GEP71]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_GEP72:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP72]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_GEP73:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP73]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_GEP30:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_2_GEP30]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_LOAD]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_GEP31:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_3_GEP31]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT]], <3 x float> [[DOTFCA_3_LOAD]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_GEP32:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_LOAD:%.*]] = load float, ptr [[DOTFCA_4_GEP32]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT]], float [[DOTFCA_4_LOAD]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_GEP33:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_5_GEP33]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT]], i64 [[DOTFCA_5_LOAD]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP24]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT1:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT1:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT1]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT1:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT1]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT1:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT1]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT1]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP25]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP26]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP31]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP37:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP37]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; DXILCONTPOSTPROCESS-GLOBAL: 34: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_EXTRACT14:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP39:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT14]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_EXTRACT18:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP40:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT18]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_8_VEC_EXTRACT20:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP41:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT20]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_12_VEC_EXTRACT23:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP42:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT23]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP43:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP44:%.*]] = bitcast i32 [[TMP43]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_066_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP44]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[DOTFCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP45:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP46:%.*]] = bitcast i32 [[TMP45]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_066_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_066_0_VEC_INSERT]], float [[TMP46]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT65:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_066_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ADDR_I2:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP47]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT34:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT65]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_GEP35:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I2]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT34]], ptr [[DOTFCA_0_GEP35]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_GEP36:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_LOAD37:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_GEP36]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT38:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_LOAD37]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_GEP39:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_LOAD40:%.*]] = load <2 x float>, ptr [[DOTFCA_0_1_0_GEP39]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT41:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT38]], <2 x float> [[DOTFCA_0_1_0_LOAD40]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_GEP42:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_LOAD43:%.*]] = load float, ptr [[DOTFCA_1_0_GEP42]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT44:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT41]], float [[DOTFCA_1_0_LOAD43]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_GEP45:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_LOAD46:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP45]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT47:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT44]], i32 [[DOTFCA_1_1_LOAD46]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_GEP48:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_LOAD49:%.*]] = load <3 x float>, ptr [[DOTFCA_2_GEP48]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT50:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT47]], <3 x float> [[DOTFCA_2_LOAD49]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_GEP51:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_LOAD52:%.*]] = load <3 x float>, ptr [[DOTFCA_3_GEP51]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT53:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT50]], <3 x float> [[DOTFCA_3_LOAD52]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_GEP54:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_LOAD55:%.*]] = load float, ptr [[DOTFCA_4_GEP54]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT56:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT53]], float [[DOTFCA_4_LOAD55]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_GEP57:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_LOAD58:%.*]] = load i64, ptr [[DOTFCA_5_GEP57]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT59:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT56]], i64 [[DOTFCA_5_LOAD58]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT27:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP39]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT30:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT27]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT33:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT30]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT36:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT33]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT39:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT36]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT42:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT39]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT45:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT42]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT48:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT45]], i32 [[TMP40]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT51:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT48]], i32 [[TMP41]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT54:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT51]], i32 [[TMP42]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP48:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP48]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT59]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT54]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define void @MyIntersectionShader( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META42:![0-9]+]] !continuation [[META43:![0-9]+]] !continuation.stacksize [[META44:![0-9]+]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP4]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP3]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i64 [[RETURNADDR]], ptr addrspace(22) [[TMP5]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT272:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT273:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT274:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT275:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, float [[DOTFCA_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], 0.000000e+00 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; DXILCONTPOSTPROCESS-GLOBAL: anyhit.i: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_2_INSERT]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_3_INSERT]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_4_INSERT]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> undef, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT7:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT4]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT10:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT7]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT13:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT10]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT16:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT13]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT19:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT16]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT22:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT19]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT25:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT22]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT28:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT25]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT31:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT28]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT34:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT31]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT37:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT34]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT40:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT37]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT43:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT40]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT46:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT43]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT49:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT46]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT52:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT49]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT55:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT52]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT58:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT55]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT61:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT58]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT64:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT61]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT67:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT64]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT70:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT67]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT73:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT70]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT76:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT73]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT79:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT76]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT82:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT79]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT85:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT82]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT88:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT85]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT91:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT88]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShader.resume.0) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP6]], i64 [[TMP7]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_5_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT]], [6 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT91]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; DXILCONTPOSTPROCESS-GLOBAL: accepthit.i: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = bitcast i32 [[TMP8]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0345_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP9]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = bitcast i32 [[TMP10]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0345_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0345_0_VEC_INSERT]], float [[TMP11]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT344:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0345_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT304:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT344]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: br i1 [[ISEND_I]], label [[TMP12:%.*]], label [[TMP16:%.*]] -; DXILCONTPOSTPROCESS-GLOBAL: 12: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT307:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT310:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT307]], <2 x float> [[DOTFCA_0_EXTRACT304]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT313:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT310]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT316:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT313]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT319:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT316]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT322:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT319]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT325:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT322]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT328:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT325]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = add i32 [[TMP13]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP14]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP15]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT328]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; DXILCONTPOSTPROCESS-GLOBAL: 16: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_EXTRACT304]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT281:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT283:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT281]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT285:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT283]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT287:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT285]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP18:%.*]] = add i32 [[TMP17]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP18]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP19:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP19]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT287]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define dso_local void @MyIntersectionShader.resume.0( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_TRAVERSALDATA:%.*]], [8 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META42]] !continuation [[META43]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP15]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP16:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP1]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_EXTRACT10:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_EXTRACT12:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_EXTRACT14:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_EXTRACT16:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT18:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT20:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT22:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT24:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: br i1 [[ISEND_I]], label [[TMP5:%.*]], label [[TMP10:%.*]] -; DXILCONTPOSTPROCESS-GLOBAL: 8: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP4]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RETURNADDR_RELOAD2:%.*]] = load i64, ptr addrspace(22) [[TMP6]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT28:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT10]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT31:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT28]], <2 x float> [[DOTFCA_0_1_0_EXTRACT12]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT34:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT31]], float [[DOTFCA_1_0_EXTRACT14]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT37:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT34]], i32 [[DOTFCA_1_1_EXTRACT16]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT40:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT37]], <3 x float> [[DOTFCA_2_EXTRACT18]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT43:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT40]], <3 x float> [[DOTFCA_3_EXTRACT20]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT46:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT43]], float [[DOTFCA_4_EXTRACT22]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT49:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT46]], i64 [[DOTFCA_5_EXTRACT24]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD2]], i32 [[TMP9]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT49]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; DXILCONTPOSTPROCESS-GLOBAL: 13: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP4]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(22) [[TMP11]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT10]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT12]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT14]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT16]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT18]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT]], <3 x float> [[DOTFCA_3_EXTRACT20]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT]], float [[DOTFCA_4_EXTRACT22]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT]], i64 [[DOTFCA_5_EXTRACT24]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT1]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT1]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT1]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT1]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP13]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP14]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define void @MyIntersectionShaderLargeAttrs( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META42]] !continuation [[META45:![0-9]+]] !continuation.stacksize [[META44]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP4]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP3]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i64 [[RETURNADDR]], ptr addrspace(22) [[TMP5]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT272:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT273:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT274:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT275:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, float [[DOTFCA_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], 0.000000e+00 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; DXILCONTPOSTPROCESS-GLOBAL: anyhit.i: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_2_INSERT]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_3_INSERT]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TRAV_DATA_I_FCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_4_INSERT]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES:%.*]] poison, i32 100, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_0_INSERT]], i32 101, 0, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_1_INSERT]], i32 102, 0, 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_2_INSERT]], i32 103, 0, 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_3_INSERT]], i32 104, 0, 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_4_INSERT]], i32 105, 0, 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_6_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_5_INSERT]], i32 106, 0, 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT7:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT4]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT10:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT7]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT13:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT10]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT16:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT13]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT19:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT16]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT22:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT19]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT25:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT22]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT28:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT25]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT31:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT28]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT34:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT31]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT37:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT34]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT40:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT37]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT43:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT40]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT46:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT43]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT49:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT46]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT52:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT49]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT55:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT52]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT58:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT55]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT61:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT58]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT64:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT61]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT67:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT64]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT70:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT67]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT73:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT70]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT76:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT73]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT79:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT76]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT82:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT79]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT85:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT82]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT88:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT85]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT91:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT88]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShaderLargeAttrs.resume.0) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP6]], i64 [[TMP7]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_5_INSERT]], [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_6_INSERT]], [1 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT91]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; DXILCONTPOSTPROCESS-GLOBAL: accepthit.i: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = bitcast i32 100 to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0350_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = bitcast i32 101 to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_070_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0350_0_VEC_INSERT]], float [[TMP9]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTSROA_070_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: br i1 [[ISEND_I]], label [[TMP10:%.*]], label [[TMP14:%.*]] -; DXILCONTPOSTPROCESS-GLOBAL: 10: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT307:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT310:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT307]], <2 x float> [[DOTFCA_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT313:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT310]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT316:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT313]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT319:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT316]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT322:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT319]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT325:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT322]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT328:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT325]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 102, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 103, 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 104, 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 105, 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 106, 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = add i32 [[TMP11]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP12]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP13]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT328]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; DXILCONTPOSTPROCESS-GLOBAL: 14: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT281:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT272]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT283:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT281]], <3 x float> [[DOTFCA_3_EXTRACT273]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT285:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT283]], float [[DOTFCA_4_EXTRACT274]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT287:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT285]], i64 [[DOTFCA_5_EXTRACT275]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT1]], i32 102, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 103, 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 104, 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 105, 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 106, 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP16:%.*]] = add i32 [[TMP15]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP16]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP17]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT287]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define dso_local void @MyIntersectionShaderLargeAttrs.resume.0( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[TMP0:%.*]], { [[STRUCT_TRAVERSALDATA:%.*]], [8 x i32], [30 x i32] } [[TMP1:%.*]]) !lgc.rt.shaderstage [[META42]] !continuation [[META45]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP15]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP16:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP1]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP16]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP17:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP1]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_EXTRACT10:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_EXTRACT12:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_EXTRACT14:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_EXTRACT16:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_EXTRACT18:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_EXTRACT20:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_EXTRACT22:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_EXTRACT24:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP17]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: br i1 [[ISEND_I]], label [[TMP5:%.*]], label [[TMP10:%.*]] -; DXILCONTPOSTPROCESS-GLOBAL: 8: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP4]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RETURNADDR_RELOAD2:%.*]] = load i64, ptr addrspace(22) [[TMP6]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT28:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT10]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT31:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT28]], <2 x float> [[DOTFCA_0_1_0_EXTRACT12]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT34:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT31]], float [[DOTFCA_1_0_EXTRACT14]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT37:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT34]], i32 [[DOTFCA_1_1_EXTRACT16]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT40:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT37]], <3 x float> [[DOTFCA_2_EXTRACT18]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT43:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT40]], <3 x float> [[DOTFCA_3_EXTRACT20]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT46:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT43]], float [[DOTFCA_4_EXTRACT22]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT49:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT46]], i64 [[DOTFCA_5_EXTRACT24]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD2]], i32 [[TMP9]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT49]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; DXILCONTPOSTPROCESS-GLOBAL: 13: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP2]], i32 [[TMP4]] -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i64, ptr addrspace(22) [[TMP11]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT10]], 0, 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT12]], 0, 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT14]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT16]], 1, 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT18]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT]], <3 x float> [[DOTFCA_3_EXTRACT20]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT]], float [[DOTFCA_4_EXTRACT22]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT]], i64 [[DOTFCA_5_EXTRACT24]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT1]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT1]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT1:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT1]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT1]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], -8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[TMP13]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR_RELOAD]], i32 [[TMP14]], i64 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-GLOBAL-LABEL: define void @MyMissShader( -; DXILCONTPOSTPROCESS-GLOBAL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[TMP0:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META46:![0-9]+]] !continuation [[META47:![0-9]+]] { -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP1:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to ptr addrspace(22) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 0, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[TMP0]], 1, 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP3]], i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP4]], i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP5:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP5]], i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP6:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP6]], i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP14:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[DOTFCA_0_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_0_INSERT1:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP7]], 0 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT1]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP8]], 7 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP9]], 8 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP14]], 9 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: call void (...) @lgc.ilcps.continue(i64 [[RETURNADDR]], i32 [[TMP15]], i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT]], [21 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-GLOBAL-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define i1 @_cont_IsEndSearch( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret i1 [[ISEND]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @_cont_SetTriangleHitAttributes( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret void -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret i32 5 -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @_cont_KernelEntry( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ) #[[ATTR0]] !lgc.rt.shaderstage [[META36:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[CSPINIT:%.*]] = ptrtoint ptr @debug_global to i32 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @_AmdContStackSetPtr(i32 [[CSPINIT]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 undef, [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret void -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define %struct.HitData @_cont_GetCandidateState( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define float @_cont_RayTCurrent( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: ret float [[RES]] -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyRayGen( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !lgc.cps [[META37:![0-9]+]] !continuation [[META38:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = bitcast ptr [[TMP4]] to ptr -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[TMP5]]) #[[ATTR1:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> zeroinitializer, ptr [[TMP6]], align 4, !tbaa [[TBAA39:![0-9]+]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP2]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP7]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP8]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[DIS_DATA_I:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR_I:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR2:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[ADDR_I]], 5 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP11]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP14]], ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP17]], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP12]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP20]], ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa21i32a10i32s(i32 4, i32 8, i32 5, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [8 x i32] poison, [10 x i32] [[TMP21]]), !waitmask [[META13:![0-9]+]], !continuation.returnedRegistercount [[META34:![0-9]+]], !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP22]], 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [10 x i32] [[TMP23]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP39:%.*]] = freeze [[STRUCT_RAYPAYLOAD]] poison -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_RAYPAYLOAD]] [[TMP39]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP26]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[TMP25]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP27]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP29]], ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr [[TMP27]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP32]], ptr [[TMP30]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP33:%.*]] = getelementptr inbounds i32, ptr [[TMP28]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[TMP27]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP35]], ptr [[TMP33]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP22]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP24]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[DOTSPLIT:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: .split: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP36:%.*]] = load <4 x float>, ptr [[TMP6]], align 4, !tbaa [[TBAA39]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP37:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[TMP37]], i8 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP38:%.*]] = call <3 x i32> @lgc.rt.dispatch.rays.index() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[TMP38]], i8 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP45:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP3]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP40:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP45]], [[DX_TYPES_RESOURCEPROPERTIES]] { i32 4098, i32 1033 }) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP41:%.*]] = extractelement <4 x float> [[TMP36]], i64 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP42:%.*]] = extractelement <4 x float> [[TMP36]], i64 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP43:%.*]] = extractelement <4 x float> [[TMP36]], i64 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP44:%.*]] = extractelement <4 x float> [[TMP36]], i64 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP40]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP41]], float [[TMP42]], float [[TMP43]], float [[TMP44]], i8 15) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @lgc.cps.complete() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyClosestHitShader( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META42:![0-9]+]] !lgc.cps [[META43:![0-9]+]] !continuation [[META44:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[HITATTRS:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [10 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP4]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP7]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP10]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP13]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_I:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I]], ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP14]], ptr [[HITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[HITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP17]], ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[HITATTRS]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = load <2 x float>, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = extractelement <2 x float> [[TMP19]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = fsub fast float 1.000000e+00, [[TMP20]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = extractelement <2 x float> [[TMP19]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = fsub fast float [[TMP21]], [[TMP22]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = insertelement <4 x float> undef, float [[TMP23]], i64 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = insertelement <4 x float> [[TMP24]], float [[TMP20]], i64 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = insertelement <4 x float> [[TMP25]], float [[TMP22]], i64 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP27:%.*]] = insertelement <4 x float> [[TMP26]], float 1.000000e+00, i64 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> [[TMP27]], ptr [[TMP28]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP2]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP30]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP31:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP32:%.*]] = getelementptr inbounds i32, ptr [[TMP29]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP33]], ptr [[TMP31]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[TMP31]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP35:%.*]] = getelementptr inbounds i32, ptr [[TMP32]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP36]], ptr [[TMP34]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP37:%.*]] = getelementptr inbounds i32, ptr [[TMP31]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP38:%.*]] = getelementptr inbounds i32, ptr [[TMP32]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP39:%.*]] = load i32, ptr [[TMP38]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP39]], ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP41:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP40]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP42:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP41]], [21 x i32] poison, [10 x i32] [[TMP42]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyAnyHitShader( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[HIT_ATTRS:%.*]], [6 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META43]] !lgc.cps [[META45:![0-9]+]] !continuation [[META46:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ORIGHITATTRS:%.*]] = alloca [8 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[HITATTRSALLOCA:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [10 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP7]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP9]], ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP8]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP12]], ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP15]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP11]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP10]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP18]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP19]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[VAL_I:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I]], ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD_ATTR_MAX_8_I32S_LAYOUT_1_ANYHIT_IN:%.*]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP6]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP21]], ptr [[ORIGHITATTRS]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[ORIGHITATTRS]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[TMP6]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP24]], ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[HIT_ATTRS]], ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP7]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = load <4 x float>, ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_I3:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I4:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I4]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP28:%.*]] = call <3 x float> @_cont_ObjectRayOrigin3(ptr [[TMP27]], ptr [[TMP2]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[TMP28]], i8 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP30:%.*]] = call <3 x float> @_cont_ObjectRayDirection3(ptr [[TMP29]], ptr [[TMP3]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[TMP30]], i8 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_I5:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I6:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I6]], ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I7:%.*]] = load float, ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP32:%.*]] = fmul fast float [[RES_I7]], [[EXTRACT]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP33:%.*]] = fadd fast float [[TMP32]], [[EXTRACT1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP34:%.*]] = fcmp fast ogt float [[TMP33]], 0.000000e+00 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[TMP34]], label [[TMP35:%.*]], label [[TMP56:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: 35: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> [[TMP26]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP36]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP7]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP38:%.*]] = load i32, ptr [[TMP37]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP38]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP39:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP40:%.*]] = getelementptr inbounds i32, ptr [[TMP37]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP41:%.*]] = load i32, ptr [[TMP40]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP41]], ptr [[TMP39]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP42:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP43:%.*]] = getelementptr inbounds i32, ptr [[TMP40]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP44:%.*]] = load i32, ptr [[TMP43]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP44]], ptr [[TMP42]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP45:%.*]] = getelementptr inbounds i32, ptr [[TMP39]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP46:%.*]] = getelementptr inbounds i32, ptr [[TMP40]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP47:%.*]] = load i32, ptr [[TMP46]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP47]], ptr [[TMP45]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP48:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP48]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP49:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP50:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP51:%.*]] = load i32, ptr [[TMP49]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP51]], ptr [[TMP50]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP52:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR_I1:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP53]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP52]], ptr [[ADDR_I1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP54:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP55:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[TMP54]], [8 x i32] poison, [10 x i32] [[TMP55]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE-CPS: 56: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> [[TMP26]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP7]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP58:%.*]] = load i32, ptr [[TMP57]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP58]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP59:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP60:%.*]] = getelementptr inbounds i32, ptr [[TMP57]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP61:%.*]] = load i32, ptr [[TMP60]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP61]], ptr [[TMP59]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP62:%.*]] = getelementptr inbounds i32, ptr [[TMP59]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP63:%.*]] = getelementptr inbounds i32, ptr [[TMP60]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP64:%.*]] = load i32, ptr [[TMP63]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP64]], ptr [[TMP62]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP65:%.*]] = getelementptr inbounds i32, ptr [[TMP59]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP66:%.*]] = getelementptr inbounds i32, ptr [[TMP60]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP67:%.*]] = load i32, ptr [[TMP66]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP67]], ptr [[TMP65]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP68:%.*]] = load i32, ptr [[HITATTRSALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP68]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP69:%.*]] = getelementptr inbounds i32, ptr [[HITATTRSALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP70:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP71:%.*]] = load i32, ptr [[TMP69]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP71]], ptr [[TMP70]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP72:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR_I2:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP73]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP72]], ptr [[ADDR_I2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP74:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP75:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[TMP74]], [8 x i32] poison, [10 x i32] [[TMP75]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyIntersectionShader( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META37]] !lgc.cps [[META47:![0-9]+]] !continuation [[META48:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [30 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I1:%.*]] = load float, ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = bitcast ptr [[TMP3]] to ptr -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I1]], 0.000000e+00 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: anyhit.i: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TRAV_DATA_I:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = call { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.TraversalDatasa8i32a30i32s(i32 3, i32 16, i32 5, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP7]], [6 x i32] poison, [30 x i32] [[TMP8]]), !continuation.returnedRegistercount [[META33:![0-9]+]], !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP9]], 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [30 x i32] [[TMP10]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP9]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP11]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[_CONT_REPORTHIT_EXIT:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: accepthit.i: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP14]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP17]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP19]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP18]], ptr [[ADDR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[_CONT_REPORTHIT_EXIT]] -; LOWERRAYTRACINGPIPELINE-CPS: _cont_ReportHit.exit: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP20:%.*]], label [[TMP23:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: 20: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[TMP21]], [8 x i32] poison, [30 x i32] [[TMP22]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE-CPS: 23: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[TMP24]], [8 x i32] poison, [30 x i32] [[TMP25]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyIntersectionShaderLargeAttrs( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META37]] !lgc.cps [[META47]] !continuation [[META49:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = alloca [[STRUCT_LARGEINTERSECTIONATTRIBUTES:%.*]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [30 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I:%.*]] = load [[STRUCT_HITDATA]], ptr [[RESPTR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_HITDATA]] [[RES_I]], ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[RES_I1:%.*]] = load float, ptr [[TMP1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PTR0:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 100, ptr [[PTR0]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PTR1:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], i32 0, i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 101, ptr [[PTR1]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PTR2:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], i32 0, i32 0, i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 102, ptr [[PTR2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PTR3:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], i32 0, i32 0, i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 103, ptr [[PTR3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PTR4:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], i32 0, i32 0, i32 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 104, ptr [[PTR4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PTR5:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], i32 0, i32 0, i32 5 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 105, ptr [[PTR5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PTR6:%.*]] = getelementptr [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], i32 0, i32 0, i32 6 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 106, ptr [[PTR6]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = bitcast ptr [[TMP3]] to ptr -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I1]], 0.000000e+00 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: anyhit.i: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TRAV_DATA_I:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = load [[STRUCT_LARGEINTERSECTIONATTRIBUTES]], ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = call { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } (...) @lgc.cps.await__sl_s_struct.TraversalDatasa8i32a30i32s(i32 3, i32 16, i32 5, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[TMP7]], [1 x i32] poison, [30 x i32] [[TMP8]]), !continuation.returnedRegistercount [[META33]], !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP9]], 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [30 x i32] [[TMP10]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP9]], 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP11]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[_CONT_REPORTHIT_EXIT:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: accepthit.i: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = getelementptr i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[TMP3]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP14]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[TMP15]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP17]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP19]], ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = load i32, ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP22]], ptr [[TMP21]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP25]], ptr [[TMP24]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 5 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP27:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 3 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP28:%.*]] = load i32, ptr [[TMP26]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP28]], ptr [[TMP27]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP29:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 6 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP30:%.*]] = getelementptr inbounds i32, ptr [[TMP13]], i32 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP29]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP31]], ptr [[TMP30]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP32:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP33]], i32 0, i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[TMP32]], ptr [[ADDR_I]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br label [[_CONT_REPORTHIT_EXIT]] -; LOWERRAYTRACINGPIPELINE-CPS: _cont_ReportHit.exit: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP34:%.*]], label [[TMP37:%.*]] -; LOWERRAYTRACINGPIPELINE-CPS: 34: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP35:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP36:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[TMP35]], [8 x i32] poison, [30 x i32] [[TMP36]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; LOWERRAYTRACINGPIPELINE-CPS: 37: -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr [[TMP5]]) #[[ATTR1]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP38:%.*]] = load [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP39:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[TMP38]], [8 x i32] poison, [30 x i32] [[TMP39]]), !continuation.registercount [[META33]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; LOWERRAYTRACINGPIPELINE-CPS-LABEL: define void @MyMissShader( -; LOWERRAYTRACINGPIPELINE-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META45]] !lgc.cps [[META43]] !continuation [[META50:![0-9]+]] { -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_SYSTEMDATA]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_RAYPAYLOAD:%.*]], align 8 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [10 x i32] [[PAYLOAD]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP3:%.*]] = load i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP3]], ptr [[TMP2]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP4:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP4]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP6]], ptr [[TMP5]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP9]], ptr [[TMP7]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP10:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP12]], ptr [[TMP10]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP1]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store <4 x float> , ptr [[TMP13]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP1]], i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP15]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 7 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP18]], ptr [[TMP16]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP19:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 1 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP21]], ptr [[TMP19]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP22:%.*]] = getelementptr inbounds i32, ptr [[TMP16]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP23:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 2 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: store i32 [[TMP24]], ptr [[TMP22]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_SYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP26:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA:%.*]], ptr [[TMP25]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: [[TMP27:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP26]], [21 x i32] poison, [10 x i32] [[TMP27]]), !continuation.registercount [[META34]] -; LOWERRAYTRACINGPIPELINE-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define i1 @_cont_IsEndSearch( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0:[0-9]+]] { -; CLEANUP-CPS-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: ret i1 [[ISEND]] -; -; -; CLEANUP-CPS-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; CLEANUP-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; CLEANUP-CPS-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; CLEANUP-CPS-LABEL: define void @_cont_SetTriangleHitAttributes( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) #[[ATTR0]] { -; CLEANUP-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; CLEANUP-CPS-NEXT: ret void -; -; -; CLEANUP-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; CLEANUP-CPS-NEXT: ret i32 5 -; -; -; CLEANUP-CPS-LABEL: define void @_cont_KernelEntry( -; CLEANUP-CPS-SAME: ) #[[ATTR0]] !lgc.rt.shaderstage [[META36:![0-9]+]] { -; CLEANUP-CPS-NEXT: [[CSPINIT:%.*]] = ptrtoint ptr @debug_global to i32 -; CLEANUP-CPS-NEXT: call void @_AmdContStackSetPtr(i32 [[CSPINIT]]) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 undef, [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison) -; CLEANUP-CPS-NEXT: ret void -; -; -; CLEANUP-CPS-LABEL: define %struct.HitData @_cont_GetCandidateState( -; CLEANUP-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR0]] { -; CLEANUP-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; CLEANUP-CPS-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; CLEANUP-CPS-LABEL: define float @_cont_RayTCurrent( -; CLEANUP-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; CLEANUP-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; CLEANUP-CPS-NEXT: ret float [[RES]] -; -; -; CLEANUP-CPS-LABEL: define void @MyRayGen( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !lgc.cps [[META37:![0-9]+]] !continuation [[META38:![0-9]+]] !continuation.state [[META22]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT20:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP1]]) -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP3]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP4]]) -; CLEANUP-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT20]], 0 -; CLEANUP-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @MyRayGen.resume.0) -; CLEANUP-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP6]], 5 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 0 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 1 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 2 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 3 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP7]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP8]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP9]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP10]], 9 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 5, {} poison, i32 poison, i64 [[TMP6]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]), !waitmask [[META13:![0-9]+]], !continuation.returnedRegistercount [[META34:![0-9]+]], !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @MyRayGen.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [21 x i32], [10 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META22]] !lgc.cps [[META37]] !continuation [[META38]] !continuation.registercount [[META34]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP12]], ptr [[TMP4]], align 4 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP5]], 9 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP16]], 0 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = bitcast i32 [[DOTFCA_0_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTFCA_0_EXTRACT1]], float [[TMP6]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast i32 [[DOTFCA_7_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP7]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = bitcast i32 [[DOTFCA_8_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP8]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = bitcast i32 [[DOTFCA_9_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP9]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT21:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP10]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP4]]) -; CLEANUP-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[TMP13]], i8 0 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP4]]) -; CLEANUP-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[TMP15]], i8 1 -; CLEANUP-CPS-NEXT: [[TMP22:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP11]]) -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP22]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 4098, i32 1033 }) -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 0 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 1 -; CLEANUP-CPS-NEXT: [[TMP20:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 2 -; CLEANUP-CPS-NEXT: [[TMP21:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 3 -; CLEANUP-CPS-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP17]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP18]], float [[TMP19]], float [[TMP20]], float [[TMP21]], i8 15) -; CLEANUP-CPS-NEXT: ret void -; -; -; CLEANUP-CPS-LABEL: define void @MyClosestHitShader( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META39:![0-9]+]] !lgc.cps [[META40:![0-9]+]] !continuation [[META41:![0-9]+]] !continuation.state [[META22]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_011_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = bitcast float [[DOTSROA_011_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP4]] to float -; CLEANUP-CPS-NEXT: [[HITATTRS_SROA_0_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP5]], i32 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_011_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_011_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP6]] to float -; CLEANUP-CPS-NEXT: [[HITATTRS_SROA_0_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[HITATTRS_SROA_0_0_VEC_INSERT]], float [[TMP7]], i32 1 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = fsub fast float 1.000000e+00, [[TMP8]] -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = fsub fast float [[TMP9]], [[TMP10]] -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = insertelement <4 x float> undef, float [[TMP11]], i64 0 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = insertelement <4 x float> [[TMP12]], float [[TMP8]], i64 1 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = insertelement <4 x float> [[TMP13]], float [[TMP10]], i64 2 -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = insertelement <4 x float> [[TMP14]], float 1.000000e+00, i64 3 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP15]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP15]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP17:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP15]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP15]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT10:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP16]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP17]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP18]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP19]], 9 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT10]], [21 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define void @MyAnyHitShader( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[HIT_ATTRS:%.*]], [6 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META40]] !lgc.cps [[META42:![0-9]+]] !continuation [[META43:![0-9]+]] !continuation.state [[META22]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: store <2 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: store float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; CLEANUP-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_4_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; CLEANUP-CPS-NEXT: store float [[SYSTEM_DATA_FCA_4_EXTRACT]], ptr [[SYSTEM_DATA_FCA_4_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_5_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 5 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; CLEANUP-CPS-NEXT: store i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], ptr [[SYSTEM_DATA_FCA_5_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP2]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP3]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP4]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP5]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP6]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; CLEANUP-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_0100_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0100_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0100_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0100_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[HIT_ATTRS_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[HIT_ATTRS]], 0 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RESPTR_I3:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I4_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I4_FCA_0_LOAD]], 0 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I4_FCA_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_0_INSERT]], i32 [[RES_I4_FCA_1_LOAD]], 1 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_1_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP0]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store float [[RES_I4_FCA_1_INSERT_FCA_0_EXTRACT]], ptr [[RES_I4_FCA_1_INSERT_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_1_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP0]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: store i32 [[RES_I4_FCA_1_INSERT_FCA_1_EXTRACT]], ptr [[RES_I4_FCA_1_INSERT_FCA_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[TMP10:%.*]] = call <3 x float> @_cont_ObjectRayOrigin3(ptr [[TMP9]], ptr [[TMP0]]) -; CLEANUP-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[TMP10]], i8 0 -; CLEANUP-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I_FCA_0_LOAD]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I_FCA_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[RES_I_FCA_1_LOAD]], 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], ptr [[RES_I_FCA_1_INSERT_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: store i32 [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT]], ptr [[RES_I_FCA_1_INSERT_FCA_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[TMP12:%.*]] = call <3 x float> @_cont_ObjectRayDirection3(ptr [[TMP11]], ptr [[TMP1]]) -; CLEANUP-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[TMP12]], i8 0 -; CLEANUP-CPS-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RESPTR_I5:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_I6_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RES_I6_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I6_FCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I6_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I6_FCA_0_LOAD]], 0 -; CLEANUP-CPS-NEXT: [[RES_I6_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[RES_I6_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I6_FCA_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[RES_I6_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_0_INSERT]], i32 [[RES_I6_FCA_1_LOAD]], 1 -; CLEANUP-CPS-NEXT: [[RES_I6_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_1_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I6_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_1_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[TMP14:%.*]] = fmul fast float [[RES_I6_FCA_1_INSERT_FCA_0_EXTRACT]], [[EXTRACT]] -; CLEANUP-CPS-NEXT: [[TMP15:%.*]] = fadd fast float [[TMP14]], [[EXTRACT1]] -; CLEANUP-CPS-NEXT: [[TMP16:%.*]] = fcmp fast ogt float [[TMP15]], 0.000000e+00 -; CLEANUP-CPS-NEXT: br i1 [[TMP16]], label [[TMP17:%.*]], label [[TMP28:%.*]] -; CLEANUP-CPS: 17: -; CLEANUP-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP18]]) -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP20:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP21:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP22:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP23:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP24:%.*]] = bitcast i32 [[TMP23]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0103_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP24]], i32 0 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP25:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP26:%.*]] = bitcast i32 [[TMP25]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0103_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0103_0_VEC_INSERT]], float [[TMP26]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT102:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0103_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[ADDR_I1:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP27]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT102]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I1]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT]], ptr [[DOTFCA_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_LOAD]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_2_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT70:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_LOAD]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_3_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT71:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT70]], <3 x float> [[DOTFCA_3_LOAD]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_LOAD:%.*]] = load float, ptr [[DOTFCA_4_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT72:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT71]], float [[DOTFCA_4_LOAD]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_5_GEP]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT73:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT72]], i64 [[DOTFCA_5_LOAD]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP19]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP20]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP21]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP22]], 9 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT73]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 28: -; CLEANUP-CPS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT16:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP29:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT16]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT19:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP30:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT19]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT22:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP31:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT22]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT25:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; CLEANUP-CPS-NEXT: [[TMP32:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT25]] to i32 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT10:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP33:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT10]] to i32 -; CLEANUP-CPS-NEXT: [[TMP34:%.*]] = bitcast i32 [[TMP33]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0107_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP34]], i32 0 -; CLEANUP-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT12:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP35:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT12]] to i32 -; CLEANUP-CPS-NEXT: [[TMP36:%.*]] = bitcast i32 [[TMP35]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0107_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0107_0_VEC_INSERT]], float [[TMP36]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT106:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0107_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[ADDR_I2:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP37]], i32 0, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT74:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT106]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_GEP75:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I2]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT74]], ptr [[DOTFCA_0_GEP75]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_GEP76:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_LOAD77:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_GEP76]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT78:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_LOAD77]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_GEP79:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_LOAD80:%.*]] = load <2 x float>, ptr [[DOTFCA_0_1_0_GEP79]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT81:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT78]], <2 x float> [[DOTFCA_0_1_0_LOAD80]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_GEP82:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_LOAD83:%.*]] = load float, ptr [[DOTFCA_1_0_GEP82]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT84:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT81]], float [[DOTFCA_1_0_LOAD83]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_GEP85:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_LOAD86:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP85]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT87:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT84]], i32 [[DOTFCA_1_1_LOAD86]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_GEP88:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_LOAD89:%.*]] = load <3 x float>, ptr [[DOTFCA_2_GEP88]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT90:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT87]], <3 x float> [[DOTFCA_2_LOAD89]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_GEP91:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_LOAD92:%.*]] = load <3 x float>, ptr [[DOTFCA_3_GEP91]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT93:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT90]], <3 x float> [[DOTFCA_3_LOAD92]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_GEP94:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_LOAD95:%.*]] = load float, ptr [[DOTFCA_4_GEP94]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT96:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT93]], float [[DOTFCA_4_LOAD95]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_GEP97:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_LOAD98:%.*]] = load i64, ptr [[DOTFCA_5_GEP97]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT99:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT96]], i64 [[DOTFCA_5_LOAD98]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT28:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP29]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT31:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT28]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT34:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT31]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT37:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT34]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT40:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT37]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT43:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT40]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT46:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT43]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT49:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT46]], i32 [[TMP30]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT52:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT49]], i32 [[TMP31]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT55:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT52]], i32 [[TMP32]], 9 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 40, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT99]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT55]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define void @MyIntersectionShader( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] -; CLEANUP-CPS-SAME: !lgc.rt.shaderstage [[META37]] !lgc.cps [[META44:![0-9]+]] !continuation [[META45:![0-9]+]] !continuation.stacksize [[META46:![0-9]+]] !continuation.state [[META46]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANUP-CPS-NEXT: [[RETURNADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADER_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(32) [[RETURNADDR_SPILL_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_4_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_5_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 5 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], 0.000000e+00 -; CLEANUP-CPS-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; CLEANUP-CPS: anyhit.i: -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_INSERT]], <2 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_3_INSERT]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_4_INSERT]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT327:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> undef, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT8:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT5]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT11:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT8]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT14:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT11]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT17:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT14]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT20:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT17]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT23:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT20]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT26:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT23]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT29:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT26]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT32:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT29]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT35:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT32]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT38:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT35]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT41:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT38]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT44:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT41]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT47:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT44]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT50:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT47]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT53:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT50]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT56:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT53]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT59:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT56]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT62:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT59]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT65:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT62]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT68:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT65]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT71:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT68]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT74:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT71]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT77:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT74]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT80:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT77]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT83:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT80]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT86:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT83]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT89:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT86]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT92:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT89]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @MyIntersectionShader.resume.0) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 3, i32 16, {} poison, i32 poison, i64 [[TMP0]], i32 5, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_5_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT327]], [6 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT92]]), !continuation.returnedRegistercount [[META33:![0-9]+]], !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: accepthit.i: -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0330_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP2]], i32 0 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP3]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0330_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0330_0_VEC_INSERT]], float [[TMP4]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT329:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0330_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT289:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT329]], 0 -; CLEANUP-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP5:%.*]], label [[TMP6:%.*]] -; CLEANUP-CPS: 5: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT292:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT295:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT292]], <2 x float> [[DOTFCA_0_EXTRACT289]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT298:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT295]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT301:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT298]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT304:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT301]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT307:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT304]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT310:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT307]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT313:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT310]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT313]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 6: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_EXTRACT289]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT273:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT274:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT273]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT275:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT274]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT276:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT275]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT276]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @MyIntersectionShader.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_TRAVERSALDATA:%.*]], [8 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META37]] !lgc.cps [[META44]] !continuation [[META45]] !continuation.registercount [[META33]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 29 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_EXTRACT281:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_EXTRACT283:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_EXTRACT285:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_EXTRACT287:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 5 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP7:%.*]], label [[TMP8:%.*]] -; CLEANUP-CPS: 7: -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD_ADDR1:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADER_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD2:%.*]] = load i32, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR1]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT292:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT295:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT292]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT298:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT295]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT301:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT298]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT304:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT301]], <3 x float> [[DOTFCA_2_EXTRACT281]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT307:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT304]], <3 x float> [[DOTFCA_3_EXTRACT283]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT310:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT307]], float [[DOTFCA_4_EXTRACT285]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT313:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT310]], i64 [[DOTFCA_5_EXTRACT287]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[DOTFCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD2]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT313]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 8: -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADER_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT273:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT281]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT274:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT273]], <3 x float> [[DOTFCA_3_EXTRACT283]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT275:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT274]], float [[DOTFCA_4_EXTRACT285]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT276:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT275]], i64 [[DOTFCA_5_EXTRACT287]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT276]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define void @MyIntersectionShaderLargeAttrs( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META37]] !lgc.cps [[META44]] !continuation [[META47:![0-9]+]] !continuation.stacksize [[META46]] !continuation.state [[META46]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CLEANUP-CPS-NEXT: [[RETURNADDR_SPILL_ADDR:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADERLARGEATTRS_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(32) [[RETURNADDR_SPILL_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 2 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 3 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_4_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 4 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_5_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 5 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; CLEANUP-CPS-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], 0.000000e+00 -; CLEANUP-CPS-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; CLEANUP-CPS: anyhit.i: -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_INSERT]], <2 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_3_INSERT]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[TRAV_DATA_I_FCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_4_INSERT]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES:%.*]] poison, i32 100, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_0_INSERT]], i32 101, 0, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_1_INSERT]], i32 102, 0, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_2_INSERT]], i32 103, 0, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_3_INSERT]], i32 104, 0, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_4_INSERT]], i32 105, 0, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_6_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_5_INSERT]], i32 106, 0, 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT5:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT8:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT5]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT11:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT8]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT14:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT11]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT17:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT14]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT20:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT17]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT23:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT20]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT26:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT23]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT29:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT26]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT32:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT29]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT35:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT32]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT38:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT35]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT41:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT38]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT44:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT41]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT47:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT44]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT50:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT47]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT53:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT50]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT56:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT53]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT59:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT56]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT62:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT59]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT65:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT62]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT68:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT65]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT71:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT68]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT74:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT71]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT77:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT74]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT80:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT77]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT83:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT80]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT86:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT83]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT89:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT86]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT92:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT89]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @MyIntersectionShaderLargeAttrs.resume.0) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 3, i32 16, {} poison, i32 poison, i64 [[TMP0]], i32 5, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_5_INSERT]], [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_6_INSERT]], [1 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT92]]), !continuation.returnedRegistercount [[META33]], !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: accepthit.i: -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 100 to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0335_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP1]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 101 to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0335_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0335_0_VEC_INSERT]], float [[TMP2]], i32 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT334:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTSROA_0335_4_VEC_INSERT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT289:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT334]], 0 -; CLEANUP-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP3:%.*]], label [[TMP4:%.*]] -; CLEANUP-CPS: 3: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT292:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT295:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT292]], <2 x float> [[DOTFCA_0_EXTRACT289]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT298:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT295]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT301:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT298]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT304:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT301]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT307:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT304]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT310:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT307]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT313:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT310]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 102, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 103, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 104, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 105, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 106, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT313]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 4: -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_EXTRACT289]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT273:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT274:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT273]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT275:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT274]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT276:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT275]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 102, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 103, 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 104, 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 105, 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 106, 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT276]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define dso_local void @MyIntersectionShaderLargeAttrs.resume.0( -; CLEANUP-CPS-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_TRAVERSALDATA:%.*]], [8 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META37]] !lgc.cps [[META44]] !continuation [[META47]] !continuation.registercount [[META33]] { -; CLEANUP-CPS-NEXT: entryresume.0: -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP3]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP5]], 29 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP3]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_EXTRACT281:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_EXTRACT283:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_EXTRACT285:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_EXTRACT287:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP6]], 5 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; CLEANUP-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; CLEANUP-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP7:%.*]], label [[TMP8:%.*]] -; CLEANUP-CPS: 7: -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD_ADDR5:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADERLARGEATTRS_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD6:%.*]] = load i32, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR5]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT292:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT295:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT292]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT298:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT295]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT301:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT298]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT304:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT301]], <3 x float> [[DOTFCA_2_EXTRACT281]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT307:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT304]], <3 x float> [[DOTFCA_3_EXTRACT283]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT310:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT307]], float [[DOTFCA_4_EXTRACT285]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT313:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT310]], i64 [[DOTFCA_5_EXTRACT287]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT125:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT128:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT125]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT131:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT128]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT134:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT131]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT137:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT134]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT140:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT137]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT143:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT140]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT146:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT143]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT149:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT146]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT152:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT149]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT155:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT152]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT158:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT155]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT161:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT158]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT164:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT161]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT167:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT164]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT170:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT167]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT173:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT170]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT176:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT173]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT179:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT176]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT182:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT179]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT185:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT182]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT188:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT185]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT191:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT188]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT194:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT191]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT197:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT194]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT200:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT197]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT203:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT200]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT206:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT203]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT209:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT206]], i32 [[DOTFCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT212:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT209]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD6]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT313]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT212]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; CLEANUP-CPS: 8: -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[MYINTERSECTIONSHADERLARGEATTRS_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CLEANUP-CPS-NEXT: [[RETURNADDR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RETURNADDR_RELOAD_ADDR]], align 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT273:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT281]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT274:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT273]], <3 x float> [[DOTFCA_3_EXTRACT283]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT275:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT274]], float [[DOTFCA_4_EXTRACT285]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT276:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT275]], i64 [[DOTFCA_5_EXTRACT287]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; CLEANUP-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; CLEANUP-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; CLEANUP-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; CLEANUP-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; CLEANUP-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; CLEANUP-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; CLEANUP-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; CLEANUP-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; CLEANUP-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; CLEANUP-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; CLEANUP-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; CLEANUP-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; CLEANUP-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; CLEANUP-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; CLEANUP-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; CLEANUP-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; CLEANUP-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; CLEANUP-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; CLEANUP-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; CLEANUP-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; CLEANUP-CPS-NEXT: call void @lgc.cps.free(i32 8) -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR_RELOAD]], i32 8, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT276]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]), !continuation.registercount [[META33]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; CLEANUP-CPS-LABEL: define void @MyMissShader( -; CLEANUP-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META42]] !lgc.cps [[META40]] !continuation [[META48:![0-9]+]] !continuation.state [[META22]] { -; CLEANUP-CPS-NEXT: AllocaSpillBB: -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; CLEANUP-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; CLEANUP-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 1, 0 -; CLEANUP-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; CLEANUP-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; CLEANUP-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; CLEANUP-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; CLEANUP-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; CLEANUP-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 0 -; CLEANUP-CPS-NEXT: [[TMP4:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 1 -; CLEANUP-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 2 -; CLEANUP-CPS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 3 -; CLEANUP-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT9:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP4]], 0 -; CLEANUP-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; CLEANUP-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; CLEANUP-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; CLEANUP-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; CLEANUP-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; CLEANUP-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; CLEANUP-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP5]], 7 -; CLEANUP-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP6]], 8 -; CLEANUP-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP7]], 9 -; CLEANUP-CPS-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT9]], [21 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]), !continuation.registercount [[META34]] -; CLEANUP-CPS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define i1 @_cont_IsEndSearch( -; DXILCONTPOSTPROCESS-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR1:[0-9]+]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ISEND:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-CPS-NEXT: ret i1 [[ISEND]] -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes( -; DXILCONTPOSTPROCESS-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[VAL:%.*]] = load [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], ptr [[ADDR]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: ret [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]] -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define void @_cont_SetTriangleHitAttributes( -; DXILCONTPOSTPROCESS-CPS-SAME: ptr [[DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[VAL:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ADDR:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: store [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL]], ptr [[ADDR]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: ret void -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define i32 @_cont_GetLocalRootIndex( -; DXILCONTPOSTPROCESS-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: ret i32 5 -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define void @_cont_KernelEntry( -; DXILCONTPOSTPROCESS-CPS-SAME: ) #[[ATTR1]] !lgc.rt.shaderstage [[META36:![0-9]+]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSPINIT:%.*]] = ptrtoint ptr @debug_global to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 0, i32 [[TMP1]], i64 undef, [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison) -; DXILCONTPOSTPROCESS-CPS-NEXT: ret void -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define %struct.HitData @_cont_GetCandidateState( -; DXILCONTPOSTPROCESS-CPS-SAME: ptr [[DATA:%.*]]) #[[ATTR1]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA:%.*]], ptr [[DATA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES:%.*]] = load [[STRUCT_HITDATA:%.*]], ptr [[RESPTR]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: ret [[STRUCT_HITDATA]] [[RES]] -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define float @_cont_RayTCurrent( -; DXILCONTPOSTPROCESS-CPS-SAME: ptr nocapture readnone [[DATA:%.*]], ptr [[HITDATA:%.*]]) { -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RESPTR:%.*]] = getelementptr [[STRUCT_HITDATA:%.*]], ptr [[HITDATA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES:%.*]] = load float, ptr [[RESPTR]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: ret float [[RES]] -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define void @MyRayGen( -; DXILCONTPOSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) #[[ATTR3:[0-9]+]] !lgc.rt.shaderstage [[META22:![0-9]+]] !lgc.cps [[META37:![0-9]+]] !continuation [[META38:![0-9]+]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT20:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?Scene@@3URaytracingAccelerationStructure@@A", align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = load [[DX_TYPES_HANDLE]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 160, [[DX_TYPES_HANDLE]] [[TMP4]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE:[a-zA-Z0-9_$\"\\.-]*[a-zA-Z_$\"\\.-][a-zA-Z0-9_$\"\\.-]*]](i32 216, [[DX_TYPES_HANDLE]] [[TMP3]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 16, i32 0 }) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = call i64 @amd.dx.getAccelStructAddr([[DX_TYPES_HANDLE]] [[TMP7]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DIS_DATA_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, <3 x i32> [[DOTFCA_0_EXTRACT20]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] undef, [[STRUCT_DISPATCHSYSTEMDATA]] [[DIS_DATA_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA:%.*]] undef, [[STRUCT_SYSTEMDATA]] [[SYS_DATA_I]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyRayGen.resume.0) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I]], i64 [[TMP9]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> zeroinitializer, i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP10]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 undef, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 undef, 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 undef, 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 undef, 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 undef, 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 undef, 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP11]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP12]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP13]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 4, i64 -1, i32 [[TMP14]], i64 [[TMP9]], [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA2_I]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define dso_local void @MyRayGen.resume.0( -; DXILCONTPOSTPROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_DISPATCHSYSTEMDATA:%.*]], [21 x i32], [10 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META22]] !lgc.cps [[META37]] !continuation [[META38]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP3]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP4]], ptr [[TMP13]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP3]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[TMP6]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP23:%.*]] = freeze [[STRUCT_RAYPAYLOAD:%.*]] poison -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT1:%.*]] = extractvalue [[STRUCT_RAYPAYLOAD]] [[TMP23]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast i32 [[DOTFCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTFCA_0_EXTRACT1]], float [[TMP7]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = bitcast i32 [[DOTFCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP8]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = bitcast i32 [[DOTFCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP9]], i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = bitcast i32 [[DOTFCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP10]], i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [21 x i32], [10 x i32] } [[TMP3]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT21:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP11]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = load [[DX_TYPES_HANDLE:%.*]], ptr @"\01?RenderTarget@@3V?$RWTexture2D@V?$vector@M$03@@@@A", align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP13]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x i32> [[TMP14]], i8 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = call <3 x i32> @_cont_DispatchRaysIndex3(ptr [[TMP13]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x i32> [[TMP16]], i8 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_CREATEHANDLEFORLIB_DX_TYPES_HANDLE]](i32 160, [[DX_TYPES_HANDLE]] [[TMP12]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = call [[DX_TYPES_HANDLE]] @[[DX_OP_ANNOTATEHANDLE]](i32 216, [[DX_TYPES_HANDLE]] [[TMP15]], [[DX_TYPES_RESOURCEPROPERTIES:%.*]] { i32 4098, i32 1033 }) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP22:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i64 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @dx.op.textureStore.f32(i32 67, [[DX_TYPES_HANDLE]] [[TMP18]], i32 [[EXTRACT]], i32 [[EXTRACT1]], i32 undef, float [[TMP19]], float [[TMP20]], float [[TMP21]], float [[TMP22]], i8 15) -; DXILCONTPOSTPROCESS-CPS-NEXT: ret void -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define void @MyClosestHitShader( -; DXILCONTPOSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META39:![0-9]+]] !lgc.cps [[META40:![0-9]+]] !continuation [[META41:![0-9]+]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_011_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = bitcast float [[DOTSROA_011_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = bitcast i32 [[TMP4]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[HITATTRS_SROA_0_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP5]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_011_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_011_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP6]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[HITATTRS_SROA_0_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[HITATTRS_SROA_0_0_VEC_INSERT]], float [[TMP7]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = fsub fast float 1.000000e+00, [[TMP8]] -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = extractelement <2 x float> [[HITATTRS_SROA_0_4_VEC_INSERT]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = fsub fast float [[TMP9]], [[TMP10]] -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = insertelement <4 x float> undef, float [[TMP11]], i64 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = insertelement <4 x float> [[TMP12]], float [[TMP8]], i64 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = insertelement <4 x float> [[TMP13]], float [[TMP10]], i64 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = insertelement <4 x float> [[TMP14]], float 1.000000e+00, i64 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP15]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP15]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP15]], i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[TMP15]], i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT10:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP16]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP17]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP18]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP19]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP22:%.*]] = zext i32 [[RETURNADDR]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP23:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP22]], i32 [[TMP23]], i64 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT10]], [21 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define void @MyAnyHitShader( -; DXILCONTPOSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] [[HIT_ATTRS:%.*]], [6 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META40]] !lgc.cps [[META42:![0-9]+]] !continuation [[META43:![0-9]+]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = alloca [[STRUCT_HITDATA:%.*]], align 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_HITDATA]], align 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_0_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store <2 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_0_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], ptr [[SYSTEM_DATA_FCA_1_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], ptr [[SYSTEM_DATA_FCA_2_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: store <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], ptr [[SYSTEM_DATA_FCA_3_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_4_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store float [[SYSTEM_DATA_FCA_4_EXTRACT]], ptr [[SYSTEM_DATA_FCA_4_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_5_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], ptr [[SYSTEM_DATA_FCA_5_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP2]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP3]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP4]], i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP5]], i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ADDR_I:%.*]] = getelementptr [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP6]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[VAL_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[VAL_I_FCA_0_LOAD:%.*]] = load <2 x float>, ptr [[VAL_I_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[VAL_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[VAL_I_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[VAL_I_FCA_0_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_099_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_099_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_099_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[VAL_I_FCA_0_INSERT_FCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_099_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[HIT_ATTRS_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[HIT_ATTRS]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RESPTR_I3:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I4_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I4_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I3]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I4_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_0_INSERT]], i32 [[RES_I4_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP0]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store float [[RES_I4_FCA_1_INSERT_FCA_0_EXTRACT]], ptr [[RES_I4_FCA_1_INSERT_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I4_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I4_FCA_1_INSERT_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP0]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[RES_I4_FCA_1_INSERT_FCA_1_EXTRACT]], ptr [[RES_I4_FCA_1_INSERT_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = call <3 x float> @_cont_ObjectRayOrigin3(ptr [[TMP9]], ptr [[TMP0]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[EXTRACT1:%.*]] = extractelement <3 x float> [[TMP10]], i8 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RESPTR_I:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[RES_I_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], ptr [[RES_I_FCA_1_INSERT_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[TMP1]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT]], ptr [[RES_I_FCA_1_INSERT_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = call <3 x float> @_cont_ObjectRayDirection3(ptr [[TMP11]], ptr [[TMP1]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[EXTRACT:%.*]] = extractelement <3 x float> [[TMP12]], i8 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RESPTR_I5:%.*]] = getelementptr [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I6_FCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I6_FCA_0_LOAD:%.*]] = load float, ptr [[RES_I6_FCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I6_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] poison, float [[RES_I6_FCA_0_LOAD]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I6_FCA_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_HITDATA]], ptr [[RESPTR_I5]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I6_FCA_1_LOAD:%.*]] = load i32, ptr [[RES_I6_FCA_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I6_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_0_INSERT]], i32 [[RES_I6_FCA_1_LOAD]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I6_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I6_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I6_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = fmul fast float [[RES_I6_FCA_1_INSERT_FCA_0_EXTRACT]], [[EXTRACT]] -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = fadd fast float [[TMP14]], [[EXTRACT1]] -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = fcmp fast ogt float [[TMP15]], 0.000000e+00 -; DXILCONTPOSTPROCESS-CPS-NEXT: br i1 [[TMP16]], label [[TMP17:%.*]], label [[TMP32:%.*]] -; DXILCONTPOSTPROCESS-CPS: 17: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @_cont_AcceptHitAndEndSearch(ptr [[TMP18]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP22:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT9:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP23:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT9]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP24:%.*]] = bitcast i32 [[TMP23]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0102_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP24]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT11:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP25:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT11]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP26:%.*]] = bitcast i32 [[TMP25]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0102_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0102_0_VEC_INSERT]], float [[TMP26]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT101:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0102_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ADDR_I1:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP27]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT101]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I1]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT]], ptr [[DOTFCA_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_LOAD:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_LOAD]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_LOAD:%.*]] = load <2 x float>, ptr [[DOTFCA_0_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_LOAD]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_LOAD:%.*]] = load float, ptr [[DOTFCA_1_0_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_LOAD]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_LOAD:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_LOAD]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_2_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT69:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_LOAD]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_LOAD:%.*]] = load <3 x float>, ptr [[DOTFCA_3_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT70:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT69]], <3 x float> [[DOTFCA_3_LOAD]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_LOAD:%.*]] = load float, ptr [[DOTFCA_4_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT71:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT70]], float [[DOTFCA_4_LOAD]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_GEP:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_LOAD:%.*]] = load i64, ptr [[DOTFCA_5_GEP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT72:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT71]], i64 [[DOTFCA_5_LOAD]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP19]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP20]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP21]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP22]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP30:%.*]] = zext i32 [[RETURNADDR]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP31:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP30]], i32 [[TMP31]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT72]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; DXILCONTPOSTPROCESS-CPS: 30: -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @_cont_AcceptHit(ptr [[SYSTEM_DATA_ALLOCA]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT14:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP33:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT14]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT18:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP34:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT18]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT20:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP35:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT20]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT23:%.*]] = extractelement <4 x float> [[DOTSROA_0_12_VEC_INSERT]], i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP36:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT23]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP37:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP38:%.*]] = bitcast i32 [[TMP37]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0106_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP38]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> [[HIT_ATTRS_FCA_0_EXTRACT]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP39:%.*]] = bitcast float [[HITATTRSALLOCA_SROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP40:%.*]] = bitcast i32 [[TMP39]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0106_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0106_0_VEC_INSERT]], float [[TMP40]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT105:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0106_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ADDR_I2:%.*]] = getelementptr [[STRUCT_SYSTEMDATA]], ptr [[TMP41]], i32 0, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT73:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT105]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_GEP74:%.*]] = getelementptr inbounds [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]], ptr [[ADDR_I2]], i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store <2 x float> [[DOTFCA_0_EXTRACT73]], ptr [[DOTFCA_0_GEP74]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_GEP75:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 0, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_LOAD76:%.*]] = load <3 x i32>, ptr [[DOTFCA_0_0_0_GEP75]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT77:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_LOAD76]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_GEP78:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_LOAD79:%.*]] = load <2 x float>, ptr [[DOTFCA_0_1_0_GEP78]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT80:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT77]], <2 x float> [[DOTFCA_0_1_0_LOAD79]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_GEP81:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_LOAD82:%.*]] = load float, ptr [[DOTFCA_1_0_GEP81]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT83:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT80]], float [[DOTFCA_1_0_LOAD82]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_GEP84:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 1, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_LOAD85:%.*]] = load i32, ptr [[DOTFCA_1_1_GEP84]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT86:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT83]], i32 [[DOTFCA_1_1_LOAD85]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_GEP87:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_LOAD88:%.*]] = load <3 x float>, ptr [[DOTFCA_2_GEP87]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT89:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT86]], <3 x float> [[DOTFCA_2_LOAD88]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_GEP90:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_LOAD91:%.*]] = load <3 x float>, ptr [[DOTFCA_3_GEP90]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT92:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT89]], <3 x float> [[DOTFCA_3_LOAD91]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_GEP93:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_LOAD94:%.*]] = load float, ptr [[DOTFCA_4_GEP93]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT95:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT92]], float [[DOTFCA_4_LOAD94]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_GEP96:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_LOAD97:%.*]] = load i64, ptr [[DOTFCA_5_GEP96]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT98:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT95]], i64 [[DOTFCA_5_LOAD97]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT27:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP33]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT30:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT27]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT33:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT30]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT36:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT33]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT39:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT36]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT42:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT39]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT45:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT42]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT48:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT45]], i32 [[TMP34]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT51:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT48]], i32 [[TMP35]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT54:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT51]], i32 [[TMP36]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP44:%.*]] = zext i32 [[RETURNADDR]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP45:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP44]], i32 [[TMP45]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT98]], [8 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT54]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define void @MyIntersectionShader( -; DXILCONTPOSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META37]] !lgc.cps [[META44:![0-9]+]] !continuation [[META45:![0-9]+]] !continuation.stacksize [[META46:![0-9]+]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP0]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(21) [[TMP3]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_4_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_5_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], 0.000000e+00 -; DXILCONTPOSTPROCESS-CPS-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; DXILCONTPOSTPROCESS-CPS: anyhit.i: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_INSERT]], <2 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_3_INSERT]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_4_INSERT]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT326:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> undef, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT7:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT4]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT10:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT7]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT13:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT10]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT16:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT13]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT19:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT16]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT22:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT19]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT25:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT22]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT28:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT25]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT31:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT28]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT34:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT31]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT37:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT34]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT40:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT37]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT43:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT40]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT46:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT43]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT49:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT46]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT52:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT49]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT55:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT52]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT58:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT55]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT61:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT58]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT64:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT61]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT67:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT64]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT70:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT67]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT73:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT70]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT76:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT73]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT79:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT76]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT82:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT79]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT85:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT82]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT88:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT85]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT91:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT88]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShader.resume.0) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP4]], i64 [[TMP5]], i32 5, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_5_INSERT]], [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT326]], [6 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT91]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; DXILCONTPOSTPROCESS-CPS: accepthit.i: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP6]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0329_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP7]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <2 x float> undef, i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP8:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = bitcast i32 [[TMP8]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0329_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0329_0_VEC_INSERT]], float [[TMP9]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT328:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] poison, <2 x float> [[DOTSROA_0329_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT288:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT328]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP10:%.*]], label [[TMP15:%.*]] -; DXILCONTPOSTPROCESS-CPS: 10: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT291:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT294:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT291]], <2 x float> [[DOTFCA_0_EXTRACT288]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT297:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT294]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT300:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT297]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT303:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT300]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT306:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT303]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT309:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT306]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT312:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT309]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = add i32 [[TMP11]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP12]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = zext i32 [[RETURNADDR]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP13]], i32 [[TMP14]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT312]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; DXILCONTPOSTPROCESS-CPS: 15: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_EXTRACT288]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT272:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT273:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT272]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT274:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT273]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT275:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT274]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = add i32 [[TMP16]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP17]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = zext i32 [[RETURNADDR]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP18]], i32 [[TMP19]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT275]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define dso_local void @MyIntersectionShader.resume.0( -; DXILCONTPOSTPROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_TRAVERSALDATA:%.*]], [8 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META37]] !lgc.cps [[META44]] !continuation [[META45]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP3]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP3]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_EXTRACT280:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_EXTRACT282:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_EXTRACT284:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_EXTRACT286:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP8:%.*]], label [[TMP15:%.*]] -; DXILCONTPOSTPROCESS-CPS: 8: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RETURN_ADDR_RELOAD2:%.*]] = load i32, ptr addrspace(21) [[TMP10]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT291:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT294:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT291]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT297:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT294]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT300:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT297]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT303:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT300]], <3 x float> [[DOTFCA_2_EXTRACT280]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT306:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT303]], <3 x float> [[DOTFCA_3_EXTRACT282]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT309:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT306]], float [[DOTFCA_4_EXTRACT284]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT312:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT309]], i64 [[DOTFCA_5_EXTRACT286]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = add i32 [[TMP11]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP12]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = zext i32 [[RETURN_ADDR_RELOAD2]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP13]], i32 [[TMP14]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT312]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; DXILCONTPOSTPROCESS-CPS: 15: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP16]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RETURN_ADDR_RELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP17]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT272:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT280]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT273:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT272]], <3 x float> [[DOTFCA_3_EXTRACT282]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT274:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT273]], float [[DOTFCA_4_EXTRACT284]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT275:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT274]], i64 [[DOTFCA_5_EXTRACT286]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = add i32 [[TMP18]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP19]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = zext i32 [[RETURN_ADDR_RELOAD]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP20]], i32 [[TMP21]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT275]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define void @MyIntersectionShaderLargeAttrs( -; DXILCONTPOSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META37]] !lgc.cps [[META44]] !continuation [[META47:![0-9]+]] !continuation.stacksize [[META46]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP0]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[RETURNADDR]], ptr addrspace(21) [[TMP3]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_2_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_3_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_4_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_5_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[SYSTEM_DATA]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_0_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA:%.*]] poison, float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT:%.*]] = insertvalue [[STRUCT_HITDATA]] [[RES_I_FCA_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RES_I_FCA_1_INSERT_FCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_HITDATA]] [[RES_I_FCA_1_INSERT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOANYHIT_I:%.*]] = fcmp fast ogt float [[RES_I_FCA_1_INSERT_FCA_0_EXTRACT]], 0.000000e+00 -; DXILCONTPOSTPROCESS-CPS-NEXT: br i1 [[DOANYHIT_I]], label [[ANYHIT_I:%.*]], label [[ACCEPTHIT_I:%.*]] -; DXILCONTPOSTPROCESS-CPS: anyhit.i: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_0_0_INSERT]], <2 x float> [[SYSTEM_DATA_FCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_0_1_0_INSERT]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_2_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_1_1_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_3_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_2_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_4_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_3_INSERT]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TRAV_DATA_I_FCA_5_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_4_INSERT]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES:%.*]] poison, i32 100, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_0_INSERT]], i32 101, 0, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_2_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_1_INSERT]], i32 102, 0, 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_3_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_2_INSERT]], i32 103, 0, 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_4_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_3_INSERT]], i32 104, 0, 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_5_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_4_INSERT]], i32 105, 0, 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_6_INSERT:%.*]] = insertvalue [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_5_INSERT]], i32 106, 0, 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT4:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT7:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT4]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT10:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT7]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT13:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT10]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT16:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT13]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT19:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT16]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT22:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT19]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT25:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT22]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT28:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT25]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT31:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT28]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT34:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT31]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT37:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT34]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT40:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT37]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT43:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT40]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT46:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT43]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT49:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT46]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT52:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT49]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT55:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT52]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT58:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT55]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT61:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT58]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT64:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT61]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT67:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT64]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT70:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT67]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT73:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT70]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT76:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT73]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT79:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT76]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT82:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT79]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT85:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT82]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT88:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT85]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT91:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT88]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = call i64 @continuation.getAddrAndMD(ptr @MyIntersectionShaderLargeAttrs.resume.0) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 3, i32 [[TMP4]], i64 [[TMP5]], i32 5, [[STRUCT_TRAVERSALDATA]] [[TRAV_DATA_I_FCA_5_INSERT]], [[STRUCT_LARGEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_6_INSERT]], [1 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT91]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; DXILCONTPOSTPROCESS-CPS: accepthit.i: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = bitcast i32 100 to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0334_0_VEC_INSERT:%.*]] = insertelement <2 x float> undef, float [[TMP6]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast i32 101 to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0334_4_VEC_INSERT:%.*]] = insertelement <2 x float> [[DOTSROA_0334_0_VEC_INSERT]], float [[TMP7]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT333:%.*]] = insertvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]] poison, <2 x float> [[DOTSROA_0334_4_VEC_INSERT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT288:%.*]] = extractvalue [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES]] [[DOTFCA_0_INSERT333]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP8:%.*]], label [[TMP13:%.*]] -; DXILCONTPOSTPROCESS-CPS: 8: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT291:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT294:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT291]], <2 x float> [[DOTFCA_0_EXTRACT288]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT297:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT294]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT300:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT297]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT303:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT300]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT306:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT303]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT309:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT306]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT312:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT309]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 102, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 103, 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 104, 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 105, 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 106, 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP10]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = zext i32 [[RETURNADDR]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP11]], i32 [[TMP12]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT312]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; DXILCONTPOSTPROCESS-CPS: 13: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_EXTRACT288]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[SYSTEM_DATA_FCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[SYSTEM_DATA_FCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT272:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[SYSTEM_DATA_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT273:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT272]], <3 x float> [[SYSTEM_DATA_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT274:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT273]], float [[SYSTEM_DATA_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT275:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT274]], i64 [[SYSTEM_DATA_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 102, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 103, 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 104, 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 105, 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 106, 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP15:%.*]] = add i32 [[TMP14]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP15]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = zext i32 [[RETURNADDR]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP16]], i32 [[TMP17]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT275]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define dso_local void @MyIntersectionShaderLargeAttrs.resume.0( -; DXILCONTPOSTPROCESS-CPS-SAME: {} [[TMP0:%.*]], i32 [[CSPINIT:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], { [[STRUCT_TRAVERSALDATA:%.*]], [8 x i32], [30 x i32] } [[TMP3:%.*]]) !lgc.rt.shaderstage [[META37]] !lgc.cps [[META44]] !continuation [[META47]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: entryresume.0: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP3]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[TMP6]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = extractvalue { [[STRUCT_TRAVERSALDATA]], [8 x i32], [30 x i32] } [[TMP3]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_EXTRACT280:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_EXTRACT282:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_EXTRACT284:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_EXTRACT286:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP7]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 5) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[ISEND_I:%.*]] = call i1 @opaqueIsEnd() -; DXILCONTPOSTPROCESS-CPS-NEXT: br i1 [[ISEND_I]], label [[TMP8:%.*]], label [[TMP15:%.*]] -; DXILCONTPOSTPROCESS-CPS: 8: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP9]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RETURN_ADDR_RELOAD6:%.*]] = load i32, ptr addrspace(21) [[TMP10]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT291:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT294:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT291]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT297:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT294]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT300:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT297]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT303:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT300]], <3 x float> [[DOTFCA_2_EXTRACT280]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT306:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT303]], <3 x float> [[DOTFCA_3_EXTRACT282]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT309:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT306]], float [[DOTFCA_4_EXTRACT284]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT312:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT309]], i64 [[DOTFCA_5_EXTRACT286]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT124:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT127:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT124]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT130:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT127]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT133:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT130]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT136:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT133]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT139:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT136]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT142:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT139]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT145:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT142]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT148:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT145]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT151:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT148]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT154:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT151]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT157:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT154]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT160:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT157]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT163:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT160]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT166:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT163]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT169:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT166]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT172:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT169]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT175:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT172]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT178:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT175]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT181:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT178]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT184:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT181]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT187:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT184]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT190:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT187]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT193:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT190]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT196:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT193]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT199:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT196]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT202:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT199]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT205:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT202]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT208:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT205]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT211:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT208]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP12:%.*]] = add i32 [[TMP11]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP12]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP13:%.*]] = zext i32 [[RETURN_ADDR_RELOAD6]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP14:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP13]], i32 [[TMP14]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT312]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT211]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; DXILCONTPOSTPROCESS-CPS: 15: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(21) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP16]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[RETURN_ADDR_RELOAD:%.*]] = load i32, ptr addrspace(21) [[TMP17]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_0_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] poison, <3 x i32> [[DOTFCA_0_0_0_EXTRACT]], 0, 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_0_0_INSERT]], <2 x float> [[DOTFCA_0_1_0_EXTRACT]], 0, 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_0_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_0_1_0_INSERT]], float [[DOTFCA_1_0_EXTRACT]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_1_INSERT:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_0_INSERT]], i32 [[DOTFCA_1_1_EXTRACT]], 1, 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT272:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_1_1_INSERT]], <3 x float> [[DOTFCA_2_EXTRACT280]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT273:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_2_INSERT272]], <3 x float> [[DOTFCA_3_EXTRACT282]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT274:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_3_INSERT273]], float [[DOTFCA_4_EXTRACT284]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT275:%.*]] = insertvalue [[STRUCT_TRAVERSALDATA]] [[DOTFCA_4_INSERT274]], i64 [[DOTFCA_5_EXTRACT286]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[DOTFCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[DOTFCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[DOTFCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[DOTFCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[DOTFCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[DOTFCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[DOTFCA_7_EXTRACT]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[DOTFCA_8_EXTRACT]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[DOTFCA_9_EXTRACT]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[DOTFCA_10_EXTRACT]], 10 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[DOTFCA_11_EXTRACT]], 11 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[DOTFCA_12_EXTRACT]], 12 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[DOTFCA_13_EXTRACT]], 13 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[DOTFCA_14_EXTRACT]], 14 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[DOTFCA_15_EXTRACT]], 15 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[DOTFCA_16_EXTRACT]], 16 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[DOTFCA_17_EXTRACT]], 17 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[DOTFCA_18_EXTRACT]], 18 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[DOTFCA_19_EXTRACT]], 19 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[DOTFCA_20_EXTRACT]], 20 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[DOTFCA_21_EXTRACT]], 21 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[DOTFCA_22_EXTRACT]], 22 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[DOTFCA_23_EXTRACT]], 23 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[DOTFCA_24_EXTRACT]], 24 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[DOTFCA_25_EXTRACT]], 25 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[DOTFCA_26_EXTRACT]], 26 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[DOTFCA_27_EXTRACT]], 27 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[DOTFCA_28_EXTRACT]], 28 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[DOTFCA_29_EXTRACT]], 29 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP18:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP19:%.*]] = add i32 [[TMP18]], -8 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[TMP19]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP20:%.*]] = zext i32 [[RETURN_ADDR_RELOAD]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP21:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP20]], i32 [[TMP21]], i64 poison, i32 poison, [[STRUCT_TRAVERSALDATA]] [[DOTFCA_5_INSERT275]], [8 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; -; -; DXILCONTPOSTPROCESS-CPS-LABEL: define void @MyMissShader( -; DXILCONTPOSTPROCESS-CPS-SAME: {} [[CONT_STATE:%.*]], i32 [[CSPINIT:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_SYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [19 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR3]] !lgc.rt.shaderstage [[META42]] !lgc.cps [[META40]] !continuation [[META48:![0-9]+]] { -; DXILCONTPOSTPROCESS-CPS-NEXT: AllocaSpillBB: -; DXILCONTPOSTPROCESS-CPS-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [10 x i32] [[PAYLOAD]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 0, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[SYSTEM_DATA_FCA_1_0_EXTRACT:%.*]] = extractvalue [[STRUCT_SYSTEMDATA]] [[SYSTEM_DATA]], 1, 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP0:%.*]] = bitcast i32 [[PAYLOAD_FCA_0_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_INSERT:%.*]] = insertelement <4 x float> undef, float [[TMP0]], i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP1:%.*]] = bitcast i32 [[PAYLOAD_FCA_7_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_0_VEC_INSERT]], float [[TMP1]], i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP2:%.*]] = bitcast i32 [[PAYLOAD_FCA_8_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_4_VEC_INSERT]], float [[TMP2]], i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP3:%.*]] = bitcast i32 [[PAYLOAD_FCA_9_EXTRACT]] to float -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_INSERT:%.*]] = insertelement <4 x float> [[DOTSROA_0_8_VEC_INSERT]], float [[TMP3]], i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void @amd.dx.setLocalRootIndex(i32 [[SHADER_INDEX]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_0_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP4:%.*]] = bitcast float [[DOTSROA_0_0_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_4_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP5:%.*]] = bitcast float [[DOTSROA_0_4_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_8_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP6:%.*]] = bitcast float [[DOTSROA_0_8_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTSROA_0_12_VEC_EXTRACT:%.*]] = extractelement <4 x float> , i32 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP7:%.*]] = bitcast float [[DOTSROA_0_12_VEC_EXTRACT]] to i32 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT9:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA:%.*]] poison, <3 x i32> [[SYSTEM_DATA_FCA_0_0_EXTRACT]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [10 x i32] poison, i32 [[TMP4]], 0 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_6_INSERT]], i32 [[TMP5]], 7 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_7_INSERT]], i32 [[TMP6]], 8 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [10 x i32] [[DOTFCA_8_INSERT]], i32 [[TMP7]], 9 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP10:%.*]] = zext i32 [[RETURNADDR]] to i64 -; DXILCONTPOSTPROCESS-CPS-NEXT: [[TMP11:%.*]] = load i32, ptr [[CSP]], align 4 -; DXILCONTPOSTPROCESS-CPS-NEXT: call void (...) @lgc.ilcps.continue(i64 [[TMP10]], i32 [[TMP11]], i64 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT9]], [21 x i32] poison, [10 x i32] [[DOTFCA_9_INSERT]]) -; DXILCONTPOSTPROCESS-CPS-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/traversal-empty-payload.ll b/llvmraytracing/test/dx/traversal-empty-payload.ll deleted file mode 100644 index 12c2dddd9b..0000000000 --- a/llvmraytracing/test/dx/traversal-empty-payload.ll +++ /dev/null @@ -1,109 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: opt --verify-each -passes='lower-raytracing-pipeline,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck --check-prefix=EMPTYPAYLOAD %s -; RUN: opt --verify-each -passes='lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck --check-prefix=EMPTYPAYLOAD-ALL %s - -; Test that we handle empty payload without creating additional stores and loads. - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%struct.TraversalData = type { %struct.SystemData, i32 } -%struct.SystemData = type { %struct.DispatchSystemData, float } -%struct.DispatchSystemData = type { i32 } - -!continuation.maxUsedPayloadRegisterCount = !{!8} ; EMPTY_PAYLOAD - -declare !pointeetys !4 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) -declare !pointeetys !4 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -declare !pointeetys !6 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) - -declare void @lgc.cps.jump(...) - -declare i64 @lgc.cps.as.continuation.reference__i64(...) #3 - -; Function Attrs: alwaysinline nounwind -define void @_cont_Traversal(%struct.TraversalData %data) #1 !lgc.rt.shaderstage !7 { - %1 = alloca %struct.TraversalData, align 8 - store %struct.TraversalData %data, ptr %1, align 4 - %2 = getelementptr inbounds %struct.TraversalData, ptr %1, i32 0, i32 1 - %3 = load i32, ptr %2, align 4 - %4 = icmp eq i32 %3, 0 - %5 = getelementptr inbounds %struct.TraversalData, ptr %1, i32 0, i32 0 - br i1 %4, label %9, label %6 - -6: ; preds = %0 - %7 = load %struct.SystemData, ptr %5, align 4 - %8 = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @_cont_Traversal) - call void (...) @lgc.cps.jump(i64 1, i32 -1, {} poison, i32 poison, i64 %8, %struct.SystemData %7), !waitmask !9 - unreachable - -9: ; preds = %0 - %10 = load %struct.SystemData, ptr %5, align 4 - call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 poison, %struct.SystemData %10), !waitmask !9 - unreachable -} - -attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind } - -!0 = !{!"function", i32 poison, !1} -!1 = !{i32 0, %struct.TraversalData poison} -!2 = !{!"function", i32 poison, !1, i32 poison} -!3 = !{!"function", !"void", !1, i32 poison, i32 poison} -!4 = !{%struct.DispatchSystemData poison} -!5 = !{i32 0, %struct.DispatchSystemData poison} -!6 = !{%struct.TraversalData poison} -!7 = !{i32 6} -!8 = !{i32 0} -!9 = !{i32 -1} -; EMPTYPAYLOAD-LABEL: define %struct.TraversalData @_cont_Traversal( -; EMPTYPAYLOAD-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [0 x i32] [[PADDING:%.*]], [0 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META3:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META4:![0-9]+]] { -; EMPTYPAYLOAD-NEXT: [[TMP2:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; EMPTYPAYLOAD-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_TRAVERSALDATA]], align 8 -; EMPTYPAYLOAD-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 -; EMPTYPAYLOAD-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 -; EMPTYPAYLOAD-NEXT: store [[STRUCT_TRAVERSALDATA]] [[TMP0]], ptr [[TMP2]], align 4 -; EMPTYPAYLOAD-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP2]], i32 0, i32 1 -; EMPTYPAYLOAD-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4 -; EMPTYPAYLOAD-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0 -; EMPTYPAYLOAD-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_TRAVERSALDATA]], ptr [[TMP2]], i32 0, i32 0 -; EMPTYPAYLOAD-NEXT: br i1 [[TMP5]], label [[TMP12:%.*]], label [[TMP7:%.*]] -; EMPTYPAYLOAD: 7: -; EMPTYPAYLOAD-NEXT: [[TMP8:%.*]] = load [[STRUCT_SYSTEMDATA:%.*]], ptr [[TMP6]], align 4 -; EMPTYPAYLOAD-NEXT: [[TMP9:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @_cont_Traversal) -; EMPTYPAYLOAD-NEXT: call void (...) @lgc.cps.jump(i64 1, i32 -1, {} poison, i32 poison, i64 [[TMP9]], [[STRUCT_SYSTEMDATA]] [[TMP8]]), !waitmask [[META5:![0-9]+]], !continuation.registercount [[META0]] -; EMPTYPAYLOAD-NEXT: unreachable -; EMPTYPAYLOAD: 10: -; EMPTYPAYLOAD-NEXT: [[TMP13:%.*]] = load [[STRUCT_SYSTEMDATA]], ptr [[TMP6]], align 4 -; EMPTYPAYLOAD-NEXT: call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_SYSTEMDATA]] [[TMP13]]), !waitmask [[META5]], !continuation.registercount [[META0]] -; EMPTYPAYLOAD-NEXT: unreachable -; -; -; EMPTYPAYLOAD-ALL-LABEL: define void @_cont_Traversal( -; EMPTYPAYLOAD-ALL-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [0 x i32] [[PADDING:%.*]], [0 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META3:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META4:![0-9]+]] !continuation.state [[META0]] { -; EMPTYPAYLOAD-ALL-NEXT: AllocaSpillBB: -; EMPTYPAYLOAD-ALL-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; EMPTYPAYLOAD-ALL-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1 -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1 -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_0_0_0_EXTRACT15:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_0_1_EXTRACT16:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1 -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_1_EXTRACT17:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1 -; EMPTYPAYLOAD-ALL-NEXT: [[TMP1:%.*]] = icmp eq i32 [[DOTFCA_1_EXTRACT17]], 0 -; EMPTYPAYLOAD-ALL-NEXT: br i1 [[TMP1]], label [[TMP7:%.*]], label [[TMP2:%.*]] -; EMPTYPAYLOAD-ALL: 2: -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] poison, i32 [[DOTFCA_0_0_0_EXTRACT15]], 0, 0 -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_1_INSERT19:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] [[DOTFCA_0_0_INSERT]], float [[DOTFCA_0_1_EXTRACT16]], 1 -; EMPTYPAYLOAD-ALL-NEXT: [[TMP3:%.*]] = call i64 @continuation.getAddrAndMD(ptr @_cont_Traversal) -; EMPTYPAYLOAD-ALL-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; EMPTYPAYLOAD-ALL-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 1, i64 -1, i32 [[TMP6]], i64 [[TMP3]], [[STRUCT_SYSTEMDATA]] [[DOTFCA_1_INSERT19]]) -; EMPTYPAYLOAD-ALL-NEXT: unreachable -; EMPTYPAYLOAD-ALL: 5: -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_0_0_INSERT22:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] poison, i32 [[DOTFCA_0_0_0_EXTRACT15]], 0, 0 -; EMPTYPAYLOAD-ALL-NEXT: [[DOTFCA_1_INSERT25:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] [[DOTFCA_0_0_INSERT22]], float [[DOTFCA_0_1_EXTRACT16]], 1 -; EMPTYPAYLOAD-ALL-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 -; EMPTYPAYLOAD-ALL-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 0, i64 -1, i32 [[TMP10]], i64 poison, [[STRUCT_SYSTEMDATA]] [[DOTFCA_1_INSERT25]]) -; EMPTYPAYLOAD-ALL-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/traversal-passthrough-payload.ll b/llvmraytracing/test/dx/traversal-passthrough-payload.ll deleted file mode 100644 index a3a2182a7b..0000000000 --- a/llvmraytracing/test/dx/traversal-passthrough-payload.ll +++ /dev/null @@ -1,216 +0,0 @@ -; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --include-generated-funcs --version 3 -; RUN: grep -v PRESERVED_REGCOUNT %s | opt --verify-each -passes='lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S --lint-abort-on-error | FileCheck --check-prefix=MAXPAYLOADSIZE %s -; RUN: opt --verify-each -passes='lower-raytracing-pipeline,lint,sroa,lint,lower-await,lint,coro-early,dxil-coro-split,coro-cleanup,lint,dxil-cleanup-continuations,lint,dxil-cont-post-process,lint,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error | FileCheck --check-prefix=PRESERVEDPAYLOADSIZE %s - -; Test that we pass either the maximum or the computed, preserved payload size through _cont_Traversal. - -target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16:16-i32:32-i64:32-f16:16-f32:32-f64:32-v8:8-v16:16-v32:32-v48:32-v64:32-v80:32-v96:32-v112:32-v128:32-v144:32-v160:32-v176:32-v192:32-v208:32-v224:32-v240:32-v256:32-n8:16:32" - -%struct.TraversalData = type { %struct.SystemData, i32 } -%struct.SystemData = type { %struct.DispatchSystemData, float } -%struct.DispatchSystemData = type { i32 } - -!continuation.maxUsedPayloadRegisterCount = !{!8} ; PRESERVED_REGCOUNT - -declare !pointeetys !4 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) -declare !pointeetys !4 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) - -declare !pointeetys !6 i1 @_cont_ReportHit(%struct.TraversalData* %data, float %t, i32 %hitKind) - -declare void @lgc.cps.jump(...) - -declare i64 @lgc.cps.as.continuation.reference__i64(...) #3 - -; Function Attrs: alwaysinline nounwind -define void @_cont_Traversal(%struct.TraversalData %data) #1 !lgc.rt.shaderstage !7 { - %1 = alloca %struct.TraversalData, align 8 - store %struct.TraversalData %data, ptr %1, align 4 - %2 = getelementptr inbounds %struct.TraversalData, ptr %1, i32 0, i32 1 - %3 = load i32, ptr %2, align 4 - %4 = icmp eq i32 %3, 0 - %5 = getelementptr inbounds %struct.TraversalData, ptr %1, i32 0, i32 0 - br i1 %4, label %9, label %6 - -6: ; preds = %0 - %7 = load %struct.SystemData, ptr %5, align 4 - %8 = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @_cont_Traversal) - call void (...) @lgc.cps.jump(i64 1, i32 -1, {} poison, i32 poison, i64 %8, %struct.SystemData %7), !waitmask !9 - unreachable - -9: ; preds = %0 - %10 = load %struct.SystemData, ptr %5, align 4 - call void (...) @lgc.cps.jump(i64 0, i32 -1, {} poison, i32 poison, i64 poison, %struct.SystemData %10), !waitmask !9 - unreachable -} - -attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-realign-stack" "stack-protector-buffer-size"="0" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #2 = { nounwind } - -!0 = !{!"function", i32 poison, !1} -!1 = !{i32 0, %struct.TraversalData poison} -!2 = !{!"function", i32 poison, !1, i32 poison} -!3 = !{!"function", !"void", !1, i32 poison, i32 poison} -!4 = !{%struct.DispatchSystemData poison} -!5 = !{i32 0, %struct.DispatchSystemData poison} -!6 = !{%struct.TraversalData poison} -!7 = !{i32 6} -!8 = !{i32 4} ; PRESERVED_REGCOUNT -!9 = !{i32 -1} -; MAXPAYLOADSIZE-LABEL: define void @_cont_Traversal( -; MAXPAYLOADSIZE-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META2:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.state [[META4:![0-9]+]] { -; MAXPAYLOADSIZE-NEXT: AllocaSpillBB: -; MAXPAYLOADSIZE-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; MAXPAYLOADSIZE-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 0 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 1 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 2 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 3 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_4_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 4 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_5_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 5 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_6_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 6 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_7_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 7 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_8_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 8 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_9_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 9 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_10_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 10 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_11_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 11 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_12_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 12 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_13_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 13 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_14_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 14 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_15_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 15 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_16_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 16 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_17_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 17 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_18_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 18 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_19_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 19 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_20_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 20 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_21_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 21 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_22_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 22 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_23_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 23 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_24_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 24 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_25_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 25 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_26_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 26 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_27_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 27 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_28_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 28 -; MAXPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_29_EXTRACT:%.*]] = extractvalue [30 x i32] [[PAYLOAD]], 29 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_0_0_0_EXTRACT136:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_0_1_EXTRACT137:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_1_EXTRACT138:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1 -; MAXPAYLOADSIZE-NEXT: [[TMP1:%.*]] = icmp eq i32 [[DOTFCA_1_EXTRACT138]], 0 -; MAXPAYLOADSIZE-NEXT: br i1 [[TMP1]], label [[TMP5:%.*]], label [[TMP2:%.*]] -; MAXPAYLOADSIZE: 2: -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] poison, i32 [[DOTFCA_0_0_0_EXTRACT136]], 0, 0 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_1_INSERT140:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] [[DOTFCA_0_0_INSERT]], float [[DOTFCA_0_1_EXTRACT137]], 1 -; MAXPAYLOADSIZE-NEXT: [[TMP3:%.*]] = call i64 @continuation.getAddrAndMD(ptr @_cont_Traversal) -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_4_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_5_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_6_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_7_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_8_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_9_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_10_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_11_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_12_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_13_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_14_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_15_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_16_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_17_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_18_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_19_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_20_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_21_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_22_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_23_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_24_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_25_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_26_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_27_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_28_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_29_INSERT:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; MAXPAYLOADSIZE-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; MAXPAYLOADSIZE-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 1, i64 -1, i32 [[TMP4]], i64 [[TMP3]], [[STRUCT_SYSTEMDATA]] [[DOTFCA_1_INSERT140]], [9 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT]]) -; MAXPAYLOADSIZE-NEXT: unreachable -; MAXPAYLOADSIZE: 5: -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_0_0_INSERT143:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] poison, i32 [[DOTFCA_0_0_0_EXTRACT136]], 0, 0 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_1_INSERT146:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] [[DOTFCA_0_0_INSERT143]], float [[DOTFCA_0_1_EXTRACT137]], 1 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_0_INSERT3:%.*]] = insertvalue [30 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_1_INSERT6:%.*]] = insertvalue [30 x i32] [[DOTFCA_0_INSERT3]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_2_INSERT9:%.*]] = insertvalue [30 x i32] [[DOTFCA_1_INSERT6]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_3_INSERT12:%.*]] = insertvalue [30 x i32] [[DOTFCA_2_INSERT9]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_4_INSERT15:%.*]] = insertvalue [30 x i32] [[DOTFCA_3_INSERT12]], i32 [[PAYLOAD_FCA_4_EXTRACT]], 4 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_5_INSERT18:%.*]] = insertvalue [30 x i32] [[DOTFCA_4_INSERT15]], i32 [[PAYLOAD_FCA_5_EXTRACT]], 5 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_6_INSERT21:%.*]] = insertvalue [30 x i32] [[DOTFCA_5_INSERT18]], i32 [[PAYLOAD_FCA_6_EXTRACT]], 6 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_7_INSERT24:%.*]] = insertvalue [30 x i32] [[DOTFCA_6_INSERT21]], i32 [[PAYLOAD_FCA_7_EXTRACT]], 7 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_8_INSERT27:%.*]] = insertvalue [30 x i32] [[DOTFCA_7_INSERT24]], i32 [[PAYLOAD_FCA_8_EXTRACT]], 8 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_9_INSERT30:%.*]] = insertvalue [30 x i32] [[DOTFCA_8_INSERT27]], i32 [[PAYLOAD_FCA_9_EXTRACT]], 9 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_10_INSERT33:%.*]] = insertvalue [30 x i32] [[DOTFCA_9_INSERT30]], i32 [[PAYLOAD_FCA_10_EXTRACT]], 10 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_11_INSERT36:%.*]] = insertvalue [30 x i32] [[DOTFCA_10_INSERT33]], i32 [[PAYLOAD_FCA_11_EXTRACT]], 11 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_12_INSERT39:%.*]] = insertvalue [30 x i32] [[DOTFCA_11_INSERT36]], i32 [[PAYLOAD_FCA_12_EXTRACT]], 12 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_13_INSERT42:%.*]] = insertvalue [30 x i32] [[DOTFCA_12_INSERT39]], i32 [[PAYLOAD_FCA_13_EXTRACT]], 13 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_14_INSERT45:%.*]] = insertvalue [30 x i32] [[DOTFCA_13_INSERT42]], i32 [[PAYLOAD_FCA_14_EXTRACT]], 14 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_15_INSERT48:%.*]] = insertvalue [30 x i32] [[DOTFCA_14_INSERT45]], i32 [[PAYLOAD_FCA_15_EXTRACT]], 15 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_16_INSERT51:%.*]] = insertvalue [30 x i32] [[DOTFCA_15_INSERT48]], i32 [[PAYLOAD_FCA_16_EXTRACT]], 16 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_17_INSERT54:%.*]] = insertvalue [30 x i32] [[DOTFCA_16_INSERT51]], i32 [[PAYLOAD_FCA_17_EXTRACT]], 17 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_18_INSERT57:%.*]] = insertvalue [30 x i32] [[DOTFCA_17_INSERT54]], i32 [[PAYLOAD_FCA_18_EXTRACT]], 18 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_19_INSERT60:%.*]] = insertvalue [30 x i32] [[DOTFCA_18_INSERT57]], i32 [[PAYLOAD_FCA_19_EXTRACT]], 19 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_20_INSERT63:%.*]] = insertvalue [30 x i32] [[DOTFCA_19_INSERT60]], i32 [[PAYLOAD_FCA_20_EXTRACT]], 20 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_21_INSERT66:%.*]] = insertvalue [30 x i32] [[DOTFCA_20_INSERT63]], i32 [[PAYLOAD_FCA_21_EXTRACT]], 21 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_22_INSERT69:%.*]] = insertvalue [30 x i32] [[DOTFCA_21_INSERT66]], i32 [[PAYLOAD_FCA_22_EXTRACT]], 22 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_23_INSERT72:%.*]] = insertvalue [30 x i32] [[DOTFCA_22_INSERT69]], i32 [[PAYLOAD_FCA_23_EXTRACT]], 23 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_24_INSERT75:%.*]] = insertvalue [30 x i32] [[DOTFCA_23_INSERT72]], i32 [[PAYLOAD_FCA_24_EXTRACT]], 24 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_25_INSERT78:%.*]] = insertvalue [30 x i32] [[DOTFCA_24_INSERT75]], i32 [[PAYLOAD_FCA_25_EXTRACT]], 25 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_26_INSERT81:%.*]] = insertvalue [30 x i32] [[DOTFCA_25_INSERT78]], i32 [[PAYLOAD_FCA_26_EXTRACT]], 26 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_27_INSERT84:%.*]] = insertvalue [30 x i32] [[DOTFCA_26_INSERT81]], i32 [[PAYLOAD_FCA_27_EXTRACT]], 27 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_28_INSERT87:%.*]] = insertvalue [30 x i32] [[DOTFCA_27_INSERT84]], i32 [[PAYLOAD_FCA_28_EXTRACT]], 28 -; MAXPAYLOADSIZE-NEXT: [[DOTFCA_29_INSERT90:%.*]] = insertvalue [30 x i32] [[DOTFCA_28_INSERT87]], i32 [[PAYLOAD_FCA_29_EXTRACT]], 29 -; MAXPAYLOADSIZE-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; MAXPAYLOADSIZE-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 0, i64 -1, i32 [[TMP6]], i64 poison, [[STRUCT_SYSTEMDATA]] [[DOTFCA_1_INSERT146]], [9 x i32] poison, [30 x i32] [[DOTFCA_29_INSERT90]]) -; MAXPAYLOADSIZE-NEXT: unreachable -; -; -; PRESERVEDPAYLOADSIZE-LABEL: define void @_cont_Traversal( -; PRESERVEDPAYLOADSIZE-SAME: i32 [[CSPINIT:%.*]], i64 [[RETURNADDR:%.*]], [[STRUCT_TRAVERSALDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [4 x i32] [[PAYLOAD:%.*]]) #[[ATTR0:[0-9]+]] !lgc.rt.shaderstage [[META3:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META4:![0-9]+]] !continuation.state [[META5:![0-9]+]] { -; PRESERVEDPAYLOADSIZE-NEXT: AllocaSpillBB: -; PRESERVEDPAYLOADSIZE-NEXT: [[CSP:%.*]] = alloca i32, align 4 -; PRESERVEDPAYLOADSIZE-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 -; PRESERVEDPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 0 -; PRESERVEDPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 1 -; PRESERVEDPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_2_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 2 -; PRESERVEDPAYLOADSIZE-NEXT: [[PAYLOAD_FCA_3_EXTRACT:%.*]] = extractvalue [4 x i32] [[PAYLOAD]], 3 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_0_0_0_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_0_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_0_0_0_EXTRACT32:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 0, 0 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_0_1_EXTRACT33:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 0, 1 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_1_EXTRACT34:%.*]] = extractvalue [[STRUCT_TRAVERSALDATA]] [[TMP0]], 1 -; PRESERVEDPAYLOADSIZE-NEXT: [[TMP1:%.*]] = icmp eq i32 [[DOTFCA_1_EXTRACT34]], 0 -; PRESERVEDPAYLOADSIZE-NEXT: br i1 [[TMP1]], label [[TMP5:%.*]], label [[TMP2:%.*]] -; PRESERVEDPAYLOADSIZE: 2: -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_SYSTEMDATA:%.*]] poison, i32 [[DOTFCA_0_0_0_EXTRACT32]], 0, 0 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_1_INSERT36:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] [[DOTFCA_0_0_INSERT]], float [[DOTFCA_0_1_EXTRACT33]], 1 -; PRESERVEDPAYLOADSIZE-NEXT: [[TMP3:%.*]] = call i64 @continuation.getAddrAndMD(ptr @_cont_Traversal) -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [4 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_2_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_3_INSERT:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; PRESERVEDPAYLOADSIZE-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 -; PRESERVEDPAYLOADSIZE-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 1, i64 -1, i32 [[TMP4]], i64 [[TMP3]], [[STRUCT_SYSTEMDATA]] [[DOTFCA_1_INSERT36]], [9 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT]]) -; PRESERVEDPAYLOADSIZE-NEXT: unreachable -; PRESERVEDPAYLOADSIZE: 5: -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_0_0_INSERT39:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] poison, i32 [[DOTFCA_0_0_0_EXTRACT32]], 0, 0 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_1_INSERT42:%.*]] = insertvalue [[STRUCT_SYSTEMDATA]] [[DOTFCA_0_0_INSERT39]], float [[DOTFCA_0_1_EXTRACT33]], 1 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_0_INSERT3:%.*]] = insertvalue [4 x i32] poison, i32 [[PAYLOAD_FCA_0_EXTRACT]], 0 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_1_INSERT6:%.*]] = insertvalue [4 x i32] [[DOTFCA_0_INSERT3]], i32 [[PAYLOAD_FCA_1_EXTRACT]], 1 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_2_INSERT9:%.*]] = insertvalue [4 x i32] [[DOTFCA_1_INSERT6]], i32 [[PAYLOAD_FCA_2_EXTRACT]], 2 -; PRESERVEDPAYLOADSIZE-NEXT: [[DOTFCA_3_INSERT12:%.*]] = insertvalue [4 x i32] [[DOTFCA_2_INSERT9]], i32 [[PAYLOAD_FCA_3_EXTRACT]], 3 -; PRESERVEDPAYLOADSIZE-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 -; PRESERVEDPAYLOADSIZE-NEXT: call void (...) @lgc.ilcps.waitContinue(i64 0, i64 -1, i32 [[TMP6]], i64 poison, [[STRUCT_SYSTEMDATA]] [[DOTFCA_1_INSERT42]], [9 x i32] poison, [4 x i32] [[DOTFCA_3_INSERT12]]) -; PRESERVEDPAYLOADSIZE-NEXT: unreachable -; diff --git a/llvmraytracing/test/dx/unnamed-type-intrinsics.ll b/llvmraytracing/test/dx/unnamed-type-intrinsics.ll index e8316db38f..60b90d3114 100644 --- a/llvmraytracing/test/dx/unnamed-type-intrinsics.ll +++ b/llvmraytracing/test/dx/unnamed-type-intrinsics.ll @@ -8,7 +8,7 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: ; struct.DispatchSystemData %0 = type { <3 x i32> } ; struct.TraversalData -%1 = type { %2, %struct.HitData, <3 x float>, <3 x float>, float, i64 } +%1 = type { %2, %struct.HitData, <3 x float>, <3 x float>, float, i32 } ; struct.SystemData %2 = type { %0 } ; struct.AnyHitTraversalData @@ -26,11 +26,11 @@ target datalayout = "e-m:e-p:64:32-p20:32:32-p21:32:32-p32:32:32-i1:32-i8:8-i16: declare i32 @_cont_GetContinuationStackAddr() #0 -declare %0 @_AmdAwaitTraversal(i64, %1) #0 +declare %0 @_AmdAwaitTraversal(i32, %1) #0 -declare %0 @_AmdAwaitShader(i64, %0) #0 +declare %0 @_AmdAwaitShader(i32, %0) #0 -declare %3 @_AmdAwaitAnyHit(i64, %3, float, i32) #0 +declare %3 @_AmdAwaitAnyHit(i32, %3, float, i32) #0 declare !pointeetys !17 %struct.HitData @_cont_GetCandidateState(%3*) #0 @@ -47,7 +47,7 @@ declare !pointeetys !25 i1 @_cont_IsEndSearch(%1*) #0 declare !pointeetys !27 i32 @_cont_HitKind(%2*) #0 ; Function Attrs: nounwind -declare i64 @_AmdGetResumePointAddr() #1 +declare i32 @_AmdGetResumePointAddr() #1 ; Function Attrs: nounwind declare !pointeetys !28 void @_AmdRestoreSystemData(%0*) #1 @@ -75,9 +75,9 @@ define void @_cont_TraceRay(%0* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i %dis_data = load %0, %0* %data, align 4 %sys_data = insertvalue %2 undef, %0 %dis_data, 0 %trav_data = insertvalue %1 undef, %2 %sys_data, 0 - %addr = call i64 @_AmdGetResumePointAddr() #3 - %trav_data2 = insertvalue %1 %trav_data, i64 %addr, 5 - %newdata = call %0 @_AmdAwaitTraversal(i64 4, %1 %trav_data2) + %addr = call i32 @_AmdGetResumePointAddr() #3 + %trav_data2 = insertvalue %1 %trav_data, i32 %addr, 5 + %newdata = call %0 @_AmdAwaitTraversal(i32 4, %1 %trav_data2) store %0 %newdata, %0* %data, align 4 call void @_AmdRestoreSystemData(%0* %data) ret void @@ -85,7 +85,7 @@ define void @_cont_TraceRay(%0* %data, i64 %0, i32 %1, i32 %2, i32 %3, i32 %4, i define void @_cont_CallShader(%0* %data, i32 %0) #0 !pointeetys !31 { %dis_data = load %0, %0* %data, align 4 - %newdata = call %0 @_AmdAwaitShader(i64 2, %0 %dis_data) + %newdata = call %0 @_AmdAwaitShader(i32 2, %0 %dis_data) store %0 %newdata, %0* %data, align 4 call void @_AmdRestoreSystemData(%0* %data) ret void @@ -99,7 +99,7 @@ define i1 @_cont_ReportHit(%3* %data, float %t, i32 %hitKind) #0 !pointeetys !32 callAHit: ; preds = %0 %trav_data = load %3, %3* %data, align 4 - %newdata = call %3 @_AmdAwaitAnyHit(i64 3, %3 %trav_data, float %t, i32 %hitKind) + %newdata = call %3 @_AmdAwaitAnyHit(i32 3, %3 %trav_data, float %t, i32 %hitKind) store %3 %newdata, %3* %data, align 4 call void @_AmdRestoreSystemDataAnyHit(%3* %data) ret i1 true @@ -346,7 +346,7 @@ attributes #5 = { nocallback nofree nosync nounwind willreturn memory(argmem: re ; ; ; LOWERRAYTRACINGPIPELINE-LABEL: define void @MyRayGen( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[TMP0:%.*]] [[TMP0]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META14:![0-9]+]] !continuation.entry [[META20:![0-9]+]] !continuation.registercount [[META14]] !continuation [[META21:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-SAME: i32 [[RETURNADDR:%.*]], [[TMP0:%.*]] [[TMP0]]) #[[ATTR2:[0-9]+]] !lgc.rt.shaderstage [[META14:![0-9]+]] !continuation.entry [[META20:![0-9]+]] !continuation.registercount [[META14]] !continuation [[META21:![0-9]+]] { ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[TMP0]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store [[TMP0]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 @@ -364,8 +364,8 @@ attributes #5 = { nocallback nofree nosync nounwind willreturn memory(argmem: re ; LOWERRAYTRACINGPIPELINE-NEXT: [[DIS_DATA_I:%.*]] = load [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYS_DATA_I:%.*]] = insertvalue [[TMP2]] undef, [[TMP0]] [[DIS_DATA_I]], 0 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA_I:%.*]] = insertvalue [[TMP1:%.*]] undef, [[TMP2]] [[SYS_DATA_I]], 0 -; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = call i64 @_AmdGetResumePointAddr() #[[ATTR3:[0-9]+]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[TMP1]] [[TRAV_DATA_I]], i64 [[ADDR_I]], 5 +; LOWERRAYTRACINGPIPELINE-NEXT: [[ADDR_I:%.*]] = call i32 @_AmdGetResumePointAddr() #[[ATTR3:[0-9]+]] +; LOWERRAYTRACINGPIPELINE-NEXT: [[TRAV_DATA2_I:%.*]] = insertvalue [[TMP1]] [[TRAV_DATA_I]], i32 [[ADDR_I]], 5 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_RAYPAYLOAD]], ptr [[TMP4]], i32 0 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP10]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP13]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 @@ -382,8 +382,8 @@ attributes #5 = { nocallback nofree nosync nounwind willreturn memory(argmem: re ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP20]], ptr [[TMP25]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP21:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP35:%.*]] = call { [[TMP0]], [33 x i32], [10 x i32] } (...) @lgc.cps.await__sl_s_sa33i32a10i32s(i64 4, i32 8, i64 poison, [[TMP1]] [[TRAV_DATA2_I]], [16 x i32] poison, [10 x i32] [[TMP21]]), !continuation.registercount [[META18:![0-9]+]], !continuation.returnedRegistercount [[META18]] -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = extractvalue { [[TMP0]], [33 x i32], [10 x i32] } [[TMP35]], 2 +; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP28:%.*]] = call { [[TMP0]], [32 x i32], [10 x i32] } (...) @lgc.cps.await__sl_s_sa32i32a10i32s(i32 4, i32 8, i32 poison, [[TMP1]] [[TRAV_DATA2_I]], [16 x i32] poison, [10 x i32] [[TMP21]]), !continuation.registercount [[META18:![0-9]+]], !continuation.returnedRegistercount [[META18]] +; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP24:%.*]] = extractvalue { [[TMP0]], [32 x i32], [10 x i32] } [[TMP28]], 2 ; LOWERRAYTRACINGPIPELINE-NEXT: store [10 x i32] [[TMP24]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP38:%.*]] = freeze [[STRUCT_RAYPAYLOAD]] poison ; LOWERRAYTRACINGPIPELINE-NEXT: store [[STRUCT_RAYPAYLOAD]] [[TMP38]], ptr [[TMP4]], align 4 @@ -402,7 +402,7 @@ attributes #5 = { nocallback nofree nosync nounwind willreturn memory(argmem: re ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP34:%.*]] = getelementptr inbounds i32, ptr [[TMP36]], i32 2 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP33:%.*]] = load i32, ptr [[TMP34]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: store i32 [[TMP33]], ptr [[TMP32]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = extractvalue { [[TMP0]], [33 x i32], [10 x i32] } [[TMP35]], 0 +; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP22:%.*]] = extractvalue { [[TMP0]], [32 x i32], [10 x i32] } [[TMP28]], 0 ; LOWERRAYTRACINGPIPELINE-NEXT: store [[TMP0]] [[TMP22]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) ; LOWERRAYTRACINGPIPELINE-NEXT: br label [[DOTSPLIT:%.*]] @@ -424,8 +424,8 @@ attributes #5 = { nocallback nofree nosync nounwind willreturn memory(argmem: re ; LOWERRAYTRACINGPIPELINE-NEXT: unreachable ; ; -; LOWERRAYTRACINGPIPELINE-LABEL: define %0 @MyClosestHit( -; LOWERRAYTRACINGPIPELINE-SAME: i64 [[RETURNADDR:%.*]], [[TMP2:%.*]] [[TMP0:%.*]], [33 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META25:![0-9]+]] !continuation.registercount [[META18]] !continuation [[META26:![0-9]+]] { +; LOWERRAYTRACINGPIPELINE-LABEL: define void @MyClosestHit( +; LOWERRAYTRACINGPIPELINE-SAME: i32 [[RETURNADDR:%.*]], [[TMP2:%.*]] [[TMP0:%.*]], [32 x i32] [[PADDING:%.*]], [10 x i32] [[PAYLOAD:%.*]]) #[[ATTR2]] !lgc.rt.shaderstage [[META25:![0-9]+]] !continuation.registercount [[META18]] !continuation [[META26:![0-9]+]] { ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP2]] = alloca [[STRUCT_BUILTINTRIANGLEINTERSECTIONATTRIBUTES:%.*]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[TMP2]], align 8 ; LOWERRAYTRACINGPIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [10 x i32], align 4 @@ -489,6 +489,6 @@ attributes #5 = { nocallback nofree nosync nounwind willreturn memory(argmem: re ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[TMP2]], ptr [[SYSTEM_DATA_ALLOCA]], i32 0, i32 0 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP47:%.*]] = load [[TMP0]], ptr [[TMP46]], align 4 ; LOWERRAYTRACINGPIPELINE-NEXT: [[TMP49:%.*]] = load [10 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[TMP0]] [[TMP47]], [33 x i32] poison, [10 x i32] [[TMP49]]), !continuation.registercount [[META18]] +; LOWERRAYTRACINGPIPELINE-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, [[TMP0]] [[TMP47]], [32 x i32] poison, [10 x i32] [[TMP49]]), !continuation.registercount [[META18]] ; LOWERRAYTRACINGPIPELINE-NEXT: unreachable ; diff --git a/llvmraytracing/test/dx/wrong-system-data.ll b/llvmraytracing/test/dx/wrong-system-data.ll index ef077cbed7..79cae99e55 100644 --- a/llvmraytracing/test/dx/wrong-system-data.ll +++ b/llvmraytracing/test/dx/wrong-system-data.ll @@ -1,3 +1,4 @@ +; NOTE: Do not autogenerate ; RUN: not --crash opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,continuations-lint,remove-types-metadata' -S %s --lint-abort-on-error 2>&1 | FileCheck %s ; CHECK: Invalid system data struct: Did not contain the needed struct type @@ -28,12 +29,6 @@ declare !pointeetys !33 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSyst declare %struct.DispatchSystemData @_AmdTraversal(%struct.TraversalData) #0 -declare void @_AmdEnqueue(i64, %struct.SystemData) #0 - -declare void @_AmdWaitEnqueue(i64, i64, %struct.SystemData) #0 - -declare void @_AmdEnqueueAnyHit(i64, %struct.TraversalData) #0 - declare !pointeetys !35 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #0 declare !pointeetys !37 void @_cont_SetTriangleHitAttributes(%struct.SystemData*, %struct.BuiltInTriangleIntersectionAttributes) #0 diff --git a/llvmraytracing/test/intrinsics/discard-values.ll b/llvmraytracing/test/intrinsics/discard-values.ll index 4c8fea3732..f238ebf6c1 100644 --- a/llvmraytracing/test/intrinsics/discard-values.ll +++ b/llvmraytracing/test/intrinsics/discard-values.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2 -; RUN: opt --verify-each -passes='dxil-cont-intrinsic-prepare,lint' -S %s --lint-abort-on-error | FileCheck %s +; RUN: opt --verify-each -passes='dxil-cont-prepare-gpurt-library,lint' -S %s --lint-abort-on-error | FileCheck %s %struct.AnyHitData = type { float, i32 } %struct.DispatchSystemData = type { i32 } diff --git a/llvmraytracing/test/intrinsics/get-func-addr-not-found.ll b/llvmraytracing/test/intrinsics/get-func-addr-not-found.ll index 21832da596..77814e93e6 100644 --- a/llvmraytracing/test/intrinsics/get-func-addr-not-found.ll +++ b/llvmraytracing/test/intrinsics/get-func-addr-not-found.ll @@ -1,3 +1,4 @@ +; NOTE: Do not autogenerate ; RUN: not --crash opt --verify-each -passes='dxil-cont-lgc-rt-op-converter,lint,lower-raytracing-pipeline,lint' -S %s --lint-abort-on-error 2>&1 | FileCheck %s ; CHECK: ERROR: Did not find function '' requested by _AmdGetFuncAddr @@ -5,7 +6,7 @@ %struct.DispatchSystemData = type { i32 } %struct.TraversalData = type { } -declare i64 @_AmdGetFuncAddr() +declare i32 @_AmdGetFuncAddr() declare !pointeetys !8 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) declare !pointeetys !8 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) @@ -15,10 +16,10 @@ define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwin ret void } -define i64 @main() { +define i32 @main() { entry: - %val = call i64 @_AmdGetFuncAddr() - ret i64 %val + %val = call i32 @_AmdGetFuncAddr() + ret i32 %val } !dx.entryPoints = !{!0, !3} diff --git a/llvmraytracing/test/intrinsics/get-func-addr.ll b/llvmraytracing/test/intrinsics/get-func-addr.ll index ab2fb5226a..9143a3b85b 100644 --- a/llvmraytracing/test/intrinsics/get-func-addr.ll +++ b/llvmraytracing/test/intrinsics/get-func-addr.ll @@ -3,7 +3,7 @@ %struct.DispatchSystemData = type { i32 } -declare i64 @_AmdGetFuncAddrMyFunc() +declare i32 @_AmdGetFuncAddrMyFunc() %struct.TraversalData = type { } @@ -15,23 +15,23 @@ define void @_cont_ExitRayGen(ptr nocapture readonly %data) alwaysinline nounwin ret void } -define { i64, i32 } @main() !lgc.rt.shaderstage !10 { +define { i32, i32 } @main() !lgc.rt.shaderstage !10 { ; CHECK-LABEL: define void @main -; CHECK-SAME: (i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.entry [[META10:![0-9]+]] !continuation.registercount [[META5]] !continuation [[META11:![0-9]+]] { +; CHECK-SAME: (i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.entry [[META10:![0-9]+]] !continuation.registercount [[META5]] !continuation [[META11:![0-9]+]] { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [0 x i32], align 4 ; CHECK-NEXT: store [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP0]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-NEXT: call void @amd.dx.setLocalRootIndex(i32 0) -; CHECK-NEXT: [[TMP1:%.*]] = call i64 (...) @lgc.cps.as.continuation.reference__i64(ptr @MyFunc) -; CHECK-NEXT: [[V0:%.*]] = insertvalue { i64, i32 } undef, i64 [[TMP1]], 0 +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @MyFunc) +; CHECK-NEXT: [[V0:%.*]] = insertvalue { i32, i32 } undef, i32 [[TMP1]], 0 ; CHECK-NEXT: call void @lgc.cps.complete() ; CHECK-NEXT: unreachable ; entry: - %val = call i64 @_AmdGetFuncAddrMyFunc() - %v0 = insertvalue { i64, i32 } undef, i64 %val, 0 - ret { i64, i32 } %v0 + %val = call i32 @_AmdGetFuncAddrMyFunc() + %v0 = insertvalue { i32, i32 } undef, i32 %val, 0 + ret { i32, i32 } %v0 } define i32 @MyFunc() { diff --git a/llvmraytracing/test/intrinsics/shader-start.ll b/llvmraytracing/test/intrinsics/shader-start.ll index f8fd137d75..c4bdade5f8 100644 --- a/llvmraytracing/test/intrinsics/shader-start.ll +++ b/llvmraytracing/test/intrinsics/shader-start.ll @@ -12,8 +12,8 @@ declare !pointeetys !13 i1 @_cont_ReportHit(%struct.DispatchSystemData* %data, f declare !pointeetys !15 %struct.BuiltInTriangleIntersectionAttributes @_cont_GetTriangleHitAttributes(%struct.SystemData*) #0 define void @main() !lgc.rt.shaderstage !10 { -; CHECK-LABEL: define %struct.DispatchSystemData @main( -; CHECK-SAME: i64 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META6:![0-9]+]] { +; CHECK-LABEL: define void @main( +; CHECK-SAME: i32 [[RETURNADDR:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[TMP0:%.*]], [8 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !continuation [[META6:![0-9]+]] { ; CHECK-NEXT: entry: ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 @@ -22,7 +22,7 @@ define void @main() !lgc.rt.shaderstage !10 { ; CHECK-NEXT: store i32 123, ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-NEXT: [[TMP1:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i64 [[RETURNADDR]], i32 -1, {} poison, i32 poison, i64 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP1]], [8 x i32] poison, [30 x i32] [[TMP2]]), !continuation.registercount [[META0]] +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 8, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP1]], [8 x i32] poison, [30 x i32] [[TMP2]]), !continuation.registercount [[META0]] ; CHECK-NEXT: unreachable ; entry: diff --git a/llvmraytracing/test/lgccps/CpsLowering/continuation-basic.ll b/llvmraytracing/test/lgccps/CpsLowering/continuation-basic.ll new file mode 100644 index 0000000000..71cfff438d --- /dev/null +++ b/llvmraytracing/test/lgccps/CpsLowering/continuation-basic.ll @@ -0,0 +1,36 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -o - -passes='lower-await,coro-early,lgc-coro-split,coro-cleanup,cleanup-continuations' %s -S | FileCheck --check-prefixes=CHECK %s + +declare void @lgc.cps.jump(...) noreturn + +define void @test(i32 %arg, ptr %table) !lgc.cps !0 !lgc.shaderstage !{i32 7} !continuation !{ptr @test} { +; CHECK-LABEL: define void @test( +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[ARG:%.*]], ptr [[TABLE:%.*]]) !lgc.cps [[META1:![0-9]+]] !lgc.shaderstage [[META2:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.state [[META4:![0-9]+]] { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TABLE_0:%.*]] = getelementptr i32, ptr [[TABLE]], i32 0 +; CHECK-NEXT: [[CR_THEN:%.*]] = load i32, ptr [[TABLE_0]], align 4 +; CHECK-NEXT: [[THEN_ARG:%.*]] = add i32 [[ARG]], 1 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_THEN]], i32 2, i32 [[TMP0]], i32 [[THEN_ARG]]) +; CHECK-NEXT: unreachable +; +entry: + %table.0 = getelementptr i32, ptr %table, i32 0 + %cr.then = load i32, ptr %table.0 + %then.arg = add i32 %arg, 1 + call void (...) @lgc.cps.jump(i32 %cr.then, i32 2, i32 poison, i32 %then.arg) + unreachable +} +!continuation.stackAddrspace = !{!1} + +!0 = !{i32 1} ; level 1 +!1 = !{i32 5} +; +;. +; CHECK: [[META1]] = !{i32 1} +; CHECK: [[META2]] = !{i32 7} +; CHECK: [[META3]] = !{ptr @test} +; CHECK: [[META4]] = !{i32 0} +;. diff --git a/llvmraytracing/test/lgccps/CpsLowering/cps-entry-point.ll b/llvmraytracing/test/lgccps/CpsLowering/cps-entry-point.ll new file mode 100644 index 0000000000..929f97d738 --- /dev/null +++ b/llvmraytracing/test/lgccps/CpsLowering/cps-entry-point.ll @@ -0,0 +1,69 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -o - -passes='lower-await,coro-early,lgc-coro-split,coro-cleanup,cleanup-continuations' %s -S | FileCheck --check-prefixes=CHECK %s + +declare void @lgc.cps.jump(...) #0 + +declare void @lgc.cps.set.vsp(ptr addrspace(32)) #1 + +declare ptr addrspace(32) @lgc.cps.get.vsp() #2 + +define dllexport spir_func void @lgc.shader.CS.main() local_unnamed_addr #0 !lgc.shaderstage !3 !lgc.rt.shaderstage !3 { +; CHECK-LABEL: define dllexport spir_func void @lgc.shader.CS.main( +; CHECK-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] !lgc.shaderstage [[META3:![0-9]+]] !lgc.rt.shaderstage [[META3]] { +; CHECK-NEXT: [[_ENTRY:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[DESC:%.*]] = call <4 x i32> @lgc.load.user.data__v4i32(i32 0) +; CHECK-NEXT: [[PTR:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[DESC]]) +; CHECK-NEXT: [[P0:%.*]] = getelementptr i32, ptr addrspace(7) [[PTR]], i32 0 +; CHECK-NEXT: [[I_VSP:%.*]] = load i32, ptr addrspace(7) [[P0]], align 4 +; CHECK-NEXT: store i32 [[I_VSP]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[P1:%.*]] = getelementptr i32, ptr addrspace(7) [[PTR]], i32 1 +; CHECK-NEXT: [[CR:%.*]] = load i32, ptr addrspace(7) [[P1]], align 4 +; CHECK-NEXT: [[P2:%.*]] = getelementptr i32, ptr addrspace(7) [[PTR]], i32 2 +; CHECK-NEXT: [[ARG:%.*]] = load i32, ptr addrspace(7) [[P2]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 1, i32 [[TMP1]], i32 poison, i32 [[ARG]], i32 [[TMP0]]) +; CHECK-NEXT: unreachable +; +.entry: + %desc = call <4 x i32> @lgc.load.user.data__v4i32(i32 0) + %ptr = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %desc) + %p0 = getelementptr i32, ptr addrspace(7) %ptr, i32 0 + %i_vsp = load i32, ptr addrspace(7) %p0, align 4 + %vsp = inttoptr i32 %i_vsp to ptr addrspace(32) + call void @lgc.cps.set.vsp(ptr addrspace(32) %vsp) + + %p1 = getelementptr i32, ptr addrspace(7) %ptr, i32 1 + %cr = load i32, ptr addrspace(7) %p1, align 4 + + %p2 = getelementptr i32, ptr addrspace(7) %ptr, i32 2 + %arg = load i32, ptr addrspace(7) %p2, align 4 + + %p32 = call ptr addrspace(32) @lgc.cps.get.vsp() + + call void (...) @lgc.cps.jump(i32 %cr, i32 1, i32 poison, i32 poison, i32 %arg, ptr addrspace(32) %p32) + unreachable +} + +declare <4 x i32> @lgc.load.user.data__v4i32(i32) #4 + +declare ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32>) #5 + +attributes #0 = { nounwind } +attributes #1 = { nounwind willreturn memory(inaccessiblemem: write) } +attributes #2 = { nounwind willreturn memory(inaccessiblemem: read) } +attributes #4 = { nounwind memory(none) } +attributes #5 = { nounwind willreturn memory(none) } + +!lgc.user.data.nodes = !{!1} +!llpc.compute.mode = !{!2} +!continuation.stackAddrspace = !{!4} + +!1 = !{!"DescriptorBuffer", i32 6, i32 6, i32 0, i32 4, i64 0, i32 0, i32 4} +!2 = !{i32 8, i32 4, i32 1, i32 0, i32 0, i32 1} +!3 = !{i32 7} +!4 = !{i32 5} +;. +; CHECK: [[META3]] = !{i32 7} +;. diff --git a/llvmraytracing/test/lgccps/CpsLowering/cps-from-continufy.ll b/llvmraytracing/test/lgccps/CpsLowering/cps-from-continufy.ll new file mode 100644 index 0000000000..51e44a2df8 --- /dev/null +++ b/llvmraytracing/test/lgccps/CpsLowering/cps-from-continufy.ll @@ -0,0 +1,252 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -o - -passes='lower-await,coro-early,lgc-coro-split,coro-cleanup,cleanup-continuations' %s -S | FileCheck --check-prefixes=CHECK %s + +%_rgen_1.Frame = type { ptr addrspace(7), ptr addrspace(7), i32 } + +define spir_func void @_rgen_1(i32 %rcr) #0 !spirv.ExecutionModel !15 !lgc.shaderstage !16 !continuation !18 !lgc.cps !17 { +; CHECK-LABEL: define spir_func void @_rgen_1( +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[RCR:%.*]]) #[[ATTR0:[0-9]+]] !spirv.ExecutionModel [[META16:![0-9]+]] !lgc.shaderstage [[META17:![0-9]+]] !continuation [[META18:![0-9]+]] !lgc.cps [[META19:![0-9]+]] !continuation.state [[META20:![0-9]+]] { +; CHECK-NEXT: [[_ENTRY:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 96 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to <2 x i32> +; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP4]] to <2 x i32> +; CHECK-NEXT: [[TMP6:%.*]] = call i64 @llvm.amdgcn.s.getpc() +; CHECK-NEXT: [[TMP7:%.*]] = bitcast i64 [[TMP6]] to <2 x i32> +; CHECK-NEXT: [[TMP8:%.*]] = call i32 @lgc.load.user.data__i32(i32 20) +; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i32> [[TMP7]], i32 [[TMP8]], i64 0 +; CHECK-NEXT: [[TMP10:%.*]] = bitcast <2 x i32> [[TMP9]] to i64 +; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP11]], i32 0 +; CHECK-NEXT: [[TMP13:%.*]] = load <2 x i32>, ptr addrspace(4) [[TMP12]], align 8 +; CHECK-NEXT: [[TMP14:%.*]] = extractelement <2 x i32> [[TMP13]], i64 0 +; CHECK-NEXT: [[TMP15:%.*]] = extractelement <2 x i32> [[TMP13]], i64 1 +; CHECK-NEXT: [[TMP16:%.*]] = insertelement <4 x i32> poison, i32 [[TMP14]], i64 0 +; CHECK-NEXT: [[TMP17:%.*]] = and i32 [[TMP15]], 65535 +; CHECK-NEXT: [[TMP18:%.*]] = insertelement <4 x i32> [[TMP16]], i32 [[TMP17]], i64 1 +; CHECK-NEXT: [[TMP19:%.*]] = insertelement <4 x i32> [[TMP18]], i32 -1, i64 2 +; CHECK-NEXT: [[TMP20:%.*]] = insertelement <4 x i32> [[TMP19]], i32 553734060, i64 3 +; CHECK-NEXT: [[TMP21:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP20]]) +; CHECK-NEXT: [[TMP22:%.*]] = call i32 @lgc.load.user.data__i32(i32 0) +; CHECK-NEXT: [[TMP23:%.*]] = insertelement <2 x i32> [[TMP5]], i32 [[TMP22]], i64 0 +; CHECK-NEXT: [[TMP24:%.*]] = bitcast <2 x i32> [[TMP23]] to i64 +; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP24]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP25]], i32 32 +; CHECK-NEXT: [[TMP27:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP26]], align 16 +; CHECK-NEXT: [[TMP28:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP27]]) +; CHECK-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP0]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP29]], i32 0 +; CHECK-NEXT: store ptr addrspace(7) [[TMP28]], ptr addrspace(5) [[TMP30]], align 32 +; CHECK-NEXT: [[TMP31:%.*]] = call i32 @lgc.load.user.data__i32(i32 0) +; CHECK-NEXT: [[TMP32:%.*]] = insertelement <2 x i32> [[TMP3]], i32 [[TMP31]], i64 0 +; CHECK-NEXT: [[TMP33:%.*]] = bitcast <2 x i32> [[TMP32]] to i64 +; CHECK-NEXT: [[TMP34:%.*]] = inttoptr i64 [[TMP33]] to ptr addrspace(4) +; CHECK-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP34]], i32 48 +; CHECK-NEXT: [[TMP36:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP35]], align 16 +; CHECK-NEXT: [[TMP37:%.*]] = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> [[TMP36]]) +; CHECK-NEXT: [[TMP38:%.*]] = add i32 [[TMP0]], 8 +; CHECK-NEXT: [[TMP39:%.*]] = inttoptr i32 [[TMP38]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP39]], i32 0 +; CHECK-NEXT: store ptr addrspace(7) [[TMP37]], ptr addrspace(5) [[TMP40]], align 32 +; CHECK-NEXT: [[TMP41:%.*]] = load volatile i32, ptr addrspace(7) [[TMP37]], align 4 +; CHECK-NEXT: [[TMP42:%.*]] = add i32 [[TMP0]], 16 +; CHECK-NEXT: [[TMP43:%.*]] = inttoptr i32 [[TMP42]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP43]], i32 0 +; CHECK-NEXT: store i32 [[TMP41]], ptr addrspace(5) [[TMP44]], align 4 +; CHECK-NEXT: [[TMP45:%.*]] = add i32 [[TMP41]], -37 +; CHECK-NEXT: [[TMP46:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP21]], i32 52 +; CHECK-NEXT: [[TMP47:%.*]] = load i64, ptr addrspace(7) [[TMP46]], align 8 +; CHECK-NEXT: [[TMP48:%.*]] = getelementptr inbounds i8, ptr addrspace(7) [[TMP21]], i32 60 +; CHECK-NEXT: [[TMP49:%.*]] = load i32, ptr addrspace(7) [[TMP48]], align 4 +; CHECK-NEXT: [[TMP50:%.*]] = mul i32 [[TMP45]], [[TMP49]] +; CHECK-NEXT: [[TMP51:%.*]] = inttoptr i64 [[TMP47]] to ptr addrspace(1) +; CHECK-NEXT: [[TMP52:%.*]] = sext i32 [[TMP50]] to i64 +; CHECK-NEXT: [[TMP53:%.*]] = getelementptr i8, ptr addrspace(1) [[TMP51]], i64 [[TMP52]] +; CHECK-NEXT: [[TMP54:%.*]] = load i64, ptr addrspace(1) [[TMP53]], align 8 +; CHECK-NEXT: [[TMP55:%.*]] = inttoptr i64 [[TMP54]] to ptr +; CHECK-NEXT: [[TMP56:%.*]] = ptrtoint ptr [[TMP55]] to i32 +; CHECK-NEXT: [[TMP57:%.*]] = or i32 [[TMP56]], 1 +; CHECK-NEXT: [[TMP58:%.*]] = inttoptr i32 [[TMP57]] to ptr +; CHECK-NEXT: [[TMP59:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @_rgen_1.resume.0) +; CHECK-NEXT: [[TMP60:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[TMP57]], i32 2, i32 [[TMP60]], i32 [[TMP59]], [1 x i32] undef, i32 [[TMP45]]) +; CHECK-NEXT: unreachable +; +.entry: + %0 = call ptr addrspace(32) @lgc.cps.alloc(i32 96) + %1 = call i64 @llvm.amdgcn.s.getpc() + %2 = bitcast i64 %1 to <2 x i32> + %3 = call i64 @llvm.amdgcn.s.getpc() + %4 = bitcast i64 %3 to <2 x i32> + %5 = call i64 @llvm.amdgcn.s.getpc() + %6 = bitcast i64 %5 to <2 x i32> + %7 = call i32 @lgc.load.user.data__i32(i32 20) + %8 = insertelement <2 x i32> %6, i32 %7, i64 0 + %9 = bitcast <2 x i32> %8 to i64 + %10 = inttoptr i64 %9 to ptr addrspace(4) + %11 = getelementptr i8, ptr addrspace(4) %10, i32 0 + %12 = load <2 x i32>, ptr addrspace(4) %11, align 8 + %13 = extractelement <2 x i32> %12, i64 0 + %14 = extractelement <2 x i32> %12, i64 1 + %15 = insertelement <4 x i32> poison, i32 %13, i64 0 + %16 = and i32 %14, 65535 + %17 = insertelement <4 x i32> %15, i32 %16, i64 1 + %18 = insertelement <4 x i32> %17, i32 -1, i64 2 + %19 = insertelement <4 x i32> %18, i32 553734060, i64 3 + %20 = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %19) + %21 = call i32 @lgc.load.user.data__i32(i32 0) + %22 = insertelement <2 x i32> %4, i32 %21, i64 0 + %23 = bitcast <2 x i32> %22 to i64 + %24 = inttoptr i64 %23 to ptr addrspace(4) + %25 = getelementptr i8, ptr addrspace(4) %24, i32 32 + %26 = load <4 x i32>, ptr addrspace(4) %25, align 16 + %27 = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %26) + %28 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %0, i32 0, i32 0 + store ptr addrspace(7) %27, ptr addrspace(32) %28, align 32 + %29 = call i32 @lgc.load.user.data__i32(i32 0) + %30 = insertelement <2 x i32> %2, i32 %29, i64 0 + %31 = bitcast <2 x i32> %30 to i64 + %32 = inttoptr i64 %31 to ptr addrspace(4) + %33 = getelementptr i8, ptr addrspace(4) %32, i32 48 + %34 = load <4 x i32>, ptr addrspace(4) %33, align 16 + %35 = call ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32> %34) + %36 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %0, i32 0, i32 1 + store ptr addrspace(7) %35, ptr addrspace(32) %36, align 32 + %37 = load volatile i32, ptr addrspace(7) %35, align 4 + %38 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %0, i32 0, i32 2 + store i32 %37, ptr addrspace(32) %38, align 4 + %39 = add i32 %37, -37 + %40 = getelementptr inbounds i8, ptr addrspace(7) %20, i32 52 + %41 = load i64, ptr addrspace(7) %40, align 8 + %42 = getelementptr inbounds i8, ptr addrspace(7) %20, i32 60 + %43 = load i32, ptr addrspace(7) %42, align 4 + %44 = mul i32 %39, %43 + %45 = inttoptr i64 %41 to ptr addrspace(1) + %46 = sext i32 %44 to i64 + %47 = getelementptr i8, ptr addrspace(1) %45, i64 %46 + %48 = load i64, ptr addrspace(1) %47, align 8 + %49 = inttoptr i64 %48 to ptr + %50 = ptrtoint ptr %49 to i32 + %51 = or i32 %50, 1 + %52 = inttoptr i32 %51 to ptr + %53 = call i32 (...) @lgc.cps.as.continuation.reference(ptr @_rgen_1.resume.0) + call void (...) @lgc.cps.jump(i32 %51, i32 2, i32 poison, i32 %53, [1 x i32] undef, i32 %39) + unreachable +} + +define void @_rgen_1.resume.0(i32 %1, [1 x i32] %2) !spirv.ExecutionModel !15 !lgc.shaderstage !16 !continuation !18 !lgc.cps !17 { +; CHECK-LABEL: define void @_rgen_1.resume.0( +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], [1 x i32] [[TMP1:%.*]]) !spirv.ExecutionModel [[META16]] !lgc.shaderstage [[META17]] !continuation [[META21:![0-9]+]] !lgc.cps [[META19]] !continuation.state [[META20]] { +; CHECK-NEXT: [[ENTRYRESUME_0:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], -96 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 16 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: [[DOTRELOAD6:%.*]] = load i32, ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP3]], 8 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: [[DOTRELOAD3:%.*]] = load ptr addrspace(7), ptr addrspace(5) [[TMP9]], align 32 +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP10]], i32 0 +; CHECK-NEXT: [[DOTRELOAD:%.*]] = load ptr addrspace(7), ptr addrspace(5) [[TMP11]], align 32 +; CHECK-NEXT: [[DUMMY_UDATA:%.*]] = call i32 @lgc.load.user.data__i32(i32 20) +; CHECK-NEXT: [[TMP12:%.*]] = mul i32 [[DUMMY_UDATA]], 24 +; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP3]], [[TMP12]] +; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP13]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP14]], i32 0 +; CHECK-NEXT: [[DUMMY_RELOAD:%.*]] = load ptr addrspace(7), ptr addrspace(5) [[TMP15]], align 32 +; CHECK-NEXT: [[TMP16:%.*]] = load volatile i32, ptr addrspace(7) [[DOTRELOAD3]], align 4 +; CHECK-NEXT: [[TMP17:%.*]] = icmp eq i32 [[DOTRELOAD6]], [[TMP16]] +; CHECK-NEXT: [[TMP18:%.*]] = zext i1 [[TMP17]] to i32 +; CHECK-NEXT: store i32 [[TMP18]], ptr addrspace(7) [[DOTRELOAD]], align 4 +; CHECK-NEXT: ret void +; +entryresume.0: + %3 = call ptr addrspace(32) @lgc.cps.peek(i32 96) + %4 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %3, i32 0, i32 2 + %.reload6 = load i32, ptr addrspace(32) %4, align 4 + %5 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %3, i32 0, i32 1 + %.reload3 = load ptr addrspace(7), ptr addrspace(32) %5, align 32 + %6 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %3, i32 0, i32 0 + %.reload = load ptr addrspace(7), ptr addrspace(32) %6, align 32 + %dummy.udata = call i32 @lgc.load.user.data__i32(i32 20) + %dummy.gep = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %3, i32 %dummy.udata, i32 0 + %dummy.reload = load ptr addrspace(7), ptr addrspace(32) %dummy.gep, align 32 + %7 = load volatile i32, ptr addrspace(7) %.reload3, align 4 + %8 = icmp eq i32 %.reload6, %7 + %9 = zext i1 %8 to i32 + store i32 %9, ptr addrspace(7) %.reload, align 4 + call void @lgc.cps.complete() + unreachable +} + +declare i32 @lgc.load.user.data__i32(i32) #1 + +declare i64 @llvm.amdgcn.s.getpc() #2 + +declare ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32>) #1 + +declare ptr addrspace(32) @lgc.cps.alloc(i32) #6 + +declare i32 @lgc.cps.as.continuation.reference(...) #3 + +declare void @lgc.cps.jump(...) #5 + +declare ptr addrspace(32) @lgc.cps.peek(i32) #7 + +declare void @lgc.cps.complete() + +attributes #0 = { alwaysinline nounwind "target-features"=",+wavefrontsize32" } +attributes #1 = { nounwind willreturn memory(none) } +attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } +attributes #3 = { nounwind willreturn } +attributes #4 = { nounwind } +attributes #5 = { noreturn } +attributes #6 = { nounwind willreturn memory(inaccessiblemem: readwrite) } +attributes #7 = { nounwind willreturn memory(inaccessiblemem: read) } + +!llpc.compute.mode = !{!0} +!lgc.client = !{!1} +!lgc.options = !{!2} +!lgc.options.CS = !{!3} +!lgc.user.data.nodes = !{!4, !5, !6, !7, !8, !9, !10, !11, !12, !13} +!amdgpu.pal.metadata.msgpack = !{!14} +!continuation.stackAddrspace = !{!19} + +!0 = !{i32 8, i32 4, i32 1} +!1 = !{!"Vulkan"} +!2 = !{i32 262875531, i32 502344192, i32 854861601, i32 -1595331954, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 -1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16777216, i32 0, i32 0, i32 2} +!3 = !{i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 192, i32 0, i32 0, i32 32, i32 64, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 20, i32 1800, i32 0, i32 0, i32 1} +!4 = !{!"DescriptorTableVaPtr", i32 7, i32 0, i32 0, i32 1, i32 4} +!5 = !{!"DescriptorBuffer", i32 6, i32 0, i32 0, i32 4, i64 0, i32 0, i32 4} +!6 = !{!"DescriptorBuffer", i32 6, i32 0, i32 4, i32 4, i64 0, i32 1, i32 4} +!7 = !{!"DescriptorBuffer", i32 6, i32 0, i32 8, i32 4, i64 0, i32 2, i32 4} +!8 = !{!"DescriptorBuffer", i32 6, i32 0, i32 12, i32 4, i64 0, i32 3, i32 4} +!9 = !{!"StreamOutTableVaPtr", i32 11, i32 0, i32 1, i32 1, i32 0} +!10 = !{!"DescriptorTableVaPtr", i32 7, i32 0, i32 5, i32 1, i32 3} +!11 = !{!"DescriptorBufferCompact", i32 10, i32 0, i32 0, i32 2, i64 93, i32 17, i32 2} +!12 = !{!"DescriptorBuffer", i32 6, i32 0, i32 2, i32 4, i64 93, i32 0, i32 4} +!13 = !{!"DescriptorBuffer", i32 6, i32 0, i32 6, i32 4, i64 93, i32 1, i32 4} +!14 = !{!"\82\B0amdpal.pipelines\91\83\B0.spill_threshold\CD\FF\FF\B0.user_data_limit\00\AF.xgl_cache_info\82\B3.128_bit_cache_hash\92\CF\C4jyX\05\E6M\0F\CF\03b\DD\05\C5\B6\DB\B9\AD.llpc_version\A467.0\AEamdpal.version\92\03\00"} +!15 = !{i32 5313} +!16 = !{i32 7} +!17 = !{i32 1} +!18 = !{ptr @_rgen_1} +!19 = !{i32 5} +;. +; CHECK: [[META16]] = !{i32 5313} +; CHECK: [[META17]] = !{i32 7} +; CHECK: [[META18]] = !{ptr @_rgen_1} +; CHECK: [[META19]] = !{i32 1} +; CHECK: [[META20]] = !{i32 0} +; CHECK: [[META21]] = !{ptr @_rgen_1.resume.0} +;. diff --git a/llvmraytracing/test/lgccps/CpsLowering/cps-stack-lowering-dxil-global.ll b/llvmraytracing/test/lgccps/CpsLowering/cps-stack-lowering-dxil-global.ll new file mode 100644 index 0000000000..a14a7fe618 --- /dev/null +++ b/llvmraytracing/test/lgccps/CpsLowering/cps-stack-lowering-dxil-global.ll @@ -0,0 +1,244 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -o - -passes='cleanup-continuations' %s -S | FileCheck --check-prefixes=CHECK %s + +%_rgen_1.Frame = type { ptr addrspace(22), ptr addrspace(22), i32 } + +declare void @lgc.cps.jump(...) #0 + +declare ptr addrspace(32) @lgc.cps.alloc(i32) + +declare void @lgc.cps.free(i32) + +declare i32 @lgc.cps.as.continuation.reference(ptr) + +declare ptr addrspace(32) @lgc.cps.peek(i32) + +declare ptr addrspace(32) @lgc.cps.get.vsp() + +declare i32 @lgc.cps.get.dummy.index(i32) + +declare void @lgc.cps.complete() + +declare i64 @_cont_GetContinuationStackGlobalMemBase() + +define { ptr, ptr } @test.0(ptr %0) !lgc.cps !1 !lgc.rt.shaderstage !2 !continuation !3 { +; CHECK-LABEL: define void @test.0( +; CHECK-SAME: ) !lgc.cps [[META1:![0-9]+]] !lgc.rt.shaderstage [[META2:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.state [[META4:![0-9]+]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP2:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() +; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr addrspace(22) +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP0]] +; CHECK-NEXT: store i32 333, ptr addrspace(22) [[TMP5]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP0]], 4 +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP4]] +; CHECK-NEXT: store i32 111, ptr addrspace(22) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP0]], 9 +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP7]] +; CHECK-NEXT: store i8 99, ptr addrspace(22) [[TMP8]], align 1 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP10]], i32 poison, i32 [[TMP7]], i32 [[TMP4]]) +; CHECK-NEXT: unreachable +; +AllocaSpillBB: + %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) + store i32 333, ptr addrspace(32) %mem, align 4 + %p1 = getelementptr i32, ptr addrspace(32) %mem, i32 1 + store i32 111, ptr addrspace(32) %p1, align 4 + %p2 = getelementptr i8, ptr addrspace(32) %mem, i32 9 + store i8 99, ptr addrspace(32) %p2, align 1 + %q1 = ptrtoint ptr addrspace(32) %p1 to i32 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison, ptr addrspace(32) %p2, i32 %q1) + unreachable +} + +define { ptr, ptr } @test.1(ptr addrspace(32) %p2, i32 %q1, ptr %0) !lgc.cps !1 !lgc.rt.shaderstage !2 !continuation !4 { +; CHECK-LABEL: define void @test.1( +; CHECK-SAME: i32 [[P2:%.*]], i32 [[Q1:%.*]]) !lgc.cps [[META1]] !lgc.rt.shaderstage [[META2]] !continuation [[META5:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP0:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() +; CHECK-NEXT: [[TMP1:%.*]] = inttoptr i64 [[TMP0]] to ptr addrspace(22) +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[Q1]] +; CHECK-NEXT: [[N111:%.*]] = load i32, ptr addrspace(22) [[TMP2]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP1]], i32 [[P2]] +; CHECK-NEXT: [[N99:%.*]] = load i8, ptr addrspace(22) [[TMP3]], align 1 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.2) +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP4]], i32 poison) +; CHECK-NEXT: unreachable +; +AllocaSpillBB: + %p1 = inttoptr i32 %q1 to ptr addrspace(32) + %n111 = load i32, ptr addrspace(32) %p1, align 4 + %n99 = load i8, ptr addrspace(32) %p2, align 1 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.2) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison) + unreachable +} + +define { ptr, ptr } @test.2(ptr %0) !lgc.cps !1 !lgc.rt.shaderstage !2 !continuation !5 { +; CHECK-LABEL: define void @test.2( +; CHECK-SAME: ) !lgc.cps [[META1]] !lgc.rt.shaderstage [[META2]] !continuation [[META6:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP2:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() +; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr addrspace(22) +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -12 +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP3]], i32 [[TMP1]] +; CHECK-NEXT: [[N333:%.*]] = load i32, ptr addrspace(22) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -12 +; CHECK-NEXT: store i32 [[TMP5]], ptr [[CSP]], align 4 +; CHECK-NEXT: ret void +; +AllocaSpillBB: + %mem = call ptr addrspace(32) @lgc.cps.peek(i32 10) + %n333 = load i32, ptr addrspace(32) %mem, align 4 + call void @lgc.cps.free(i32 10) + call void @lgc.cps.complete() + unreachable +} + +define { ptr, ptr } @test.gep(ptr %0) !lgc.cps !1 !lgc.rt.shaderstage !2 !continuation !6 { +; CHECK-LABEL: define void @test.gep( +; CHECK-SAME: ) !lgc.cps [[META1]] !lgc.rt.shaderstage [[META2]] !continuation [[META7:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP5:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr addrspace(22) +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[STACK_EL0:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[STACK_EL0]], 24 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], [[TMP2]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP6]], i32 [[TMP3]] +; CHECK-NEXT: store i32 [[TMP4]], ptr addrspace(22) [[TMP11]], align 4 +; CHECK-NEXT: [[STACK_EL1:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 1) +; CHECK-NEXT: [[TMP7:%.*]] = mul i32 [[STACK_EL1]], 24 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP0]], [[TMP7]] +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], -4 +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP6]], i32 [[TMP8]] +; CHECK-NEXT: store i32 [[TMP10]], ptr addrspace(22) [[TMP12]], align 4 +; CHECK-NEXT: [[STACK_EL2:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 2) +; CHECK-NEXT: [[STACK_EL2_DIV:%.*]] = sdiv i32 [[STACK_EL2]], 2 +; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP0]], 8 +; CHECK-NEXT: [[TMP14:%.*]] = mul i32 [[STACK_EL2_DIV]], 24 +; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP13]], [[TMP14]] +; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP17:%.*]] = add i32 [[TMP16]], -8 +; CHECK-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP6]], i32 [[TMP15]] +; CHECK-NEXT: store i32 [[TMP17]], ptr addrspace(22) [[TMP18]], align 4 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) +; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP20]], i32 poison, i32 [[TMP17]], i32 [[TMP17]]) +; CHECK-NEXT: unreachable +; +AllocaSpillBB: + %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) + %stack.el0 = call i32 @lgc.cps.get.dummy.index(i32 0) + %1 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el0 + %vsp = call ptr addrspace(32) @lgc.cps.get.vsp() + %vsp.i = ptrtoint ptr addrspace(32) %vsp to i32 + store i32 %vsp.i, ptr addrspace(32) %1, align 4 + %stack.el1 = call i32 @lgc.cps.get.dummy.index(i32 1) + %2 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el1 + %vsp.2 = call ptr addrspace(32) @lgc.cps.peek(i32 4) + %vsp.2.i = ptrtoint ptr addrspace(32) %vsp.2 to i32 + store i32 %vsp.2.i, ptr addrspace(32) %2, align 4 + %stack.el2 = call i32 @lgc.cps.get.dummy.index(i32 2) + %stack.el2.div = sdiv i32 %stack.el2, 2 + %3 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el2.div, i32 1 + %vsp.3 = call ptr addrspace(32) @lgc.cps.peek(i32 8) + %vsp.3.i = ptrtoint ptr addrspace(32) %vsp.3 to i32 + store i32 %vsp.3.i, ptr addrspace(32) %3, align 4 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison, ptr addrspace(32) %vsp.3, i32 %vsp.3.i) + unreachable +} + +define { ptr, ptr } @test.nested.gep(ptr %0) !lgc.cps !1 !lgc.rt.shaderstage !2 !continuation !7 { +; CHECK-LABEL: define void @test.nested.gep( +; CHECK-SAME: ) !lgc.cps [[META1]] !lgc.rt.shaderstage [[META2]] !continuation [[META8:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: [[TMP6:%.*]] = call i64 @_cont_GetContinuationStackGlobalMemBase() +; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr addrspace(22) +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[STACK_EL0:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[STACK_EL0]], 24 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], [[TMP2]] +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 16 +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(22) [[TMP7]], i32 [[TMP4]] +; CHECK-NEXT: store i32 [[TMP5]], ptr addrspace(22) [[TMP9]], align 4 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) +; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP8]], i32 poison, i32 [[TMP5]], i32 [[TMP5]]) +; CHECK-NEXT: unreachable +; +AllocaSpillBB: + %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) + %stack.el0 = call i32 @lgc.cps.get.dummy.index(i32 0) + %gep.base = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el0 + %1 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %gep.base, i32 0, i32 2 + %vsp = call ptr addrspace(32) @lgc.cps.get.vsp() + %vsp.i = ptrtoint ptr addrspace(32) %vsp to i32 + store i32 %vsp.i, ptr addrspace(32) %1, align 4 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison, ptr addrspace(32) %vsp, i32 %vsp.i) + unreachable +} + +declare !continuation !3 { ptr, ptr } @continuation.prototype.test.0(ptr, i1) + +declare ptr @continuation.malloc(i32) + +declare void @continuation.free(ptr) + +declare token @llvm.coro.id.retcon(i32, i32, ptr, ptr, ptr, ptr) #1 + +declare ptr @llvm.coro.begin(token, ptr writeonly) #1 + +declare !continuation !4 { ptr, ptr } @continuation.prototype.test.1(ptr, i1) + +declare !continuation !5 { ptr, ptr } @continuation.prototype.test.2(ptr, i1) + +declare !continuation !6 { ptr, ptr } @continuation.prototype.test.gep(ptr, i1) + +declare !continuation !7 { ptr, ptr } @continuation.prototype.test.nested.gep(ptr, i1) + +attributes #0 = { noreturn } +attributes #1 = { nounwind } + +!continuation.stackAddrspace = !{!0} + +!0 = !{i32 22} +!1 = !{i32 1} +!2 = !{i32 7} +!3 = !{ptr @test.0} +!4 = !{ptr @test.1} +!5 = !{ptr @test.2} +!6 = !{ptr @test.gep} +!7 = !{ptr @test.nested.gep} +;. +; CHECK: [[META1]] = !{i32 1} +; CHECK: [[META2]] = !{i32 7} +; CHECK: [[META3]] = !{ptr @test.0} +; CHECK: [[META4]] = !{i32 0} +; CHECK: [[META5]] = !{ptr @test.1} +; CHECK: [[META6]] = !{ptr @test.2} +; CHECK: [[META7]] = !{ptr @test.gep} +; CHECK: [[META8]] = !{ptr @test.nested.gep} +;. diff --git a/llvmraytracing/test/lgccps/CpsLowering/cps-stack-lowering-dxil-scratch.ll b/llvmraytracing/test/lgccps/CpsLowering/cps-stack-lowering-dxil-scratch.ll new file mode 100644 index 0000000000..f8fe1ecdd8 --- /dev/null +++ b/llvmraytracing/test/lgccps/CpsLowering/cps-stack-lowering-dxil-scratch.ll @@ -0,0 +1,247 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -o - -passes='cleanup-continuations' %s -S | FileCheck --check-prefixes=CHECK %s + +%_rgen_1.Frame = type { ptr addrspace(21), ptr addrspace(21), i32 } + +declare void @lgc.cps.jump(...) #0 + +declare ptr addrspace(32) @lgc.cps.alloc(i32) + +declare void @lgc.cps.free(i32) + +declare i32 @lgc.cps.as.continuation.reference(ptr) + +declare ptr addrspace(32) @lgc.cps.peek(i32) + +declare ptr addrspace(32) @lgc.cps.get.vsp() + +declare i32 @lgc.cps.get.dummy.index(i32) + +declare void @lgc.cps.complete() + +define { ptr, ptr } @test.0(ptr %0) !lgc.cps !1 !lgc.shaderstage !2 !continuation !3 { +; CHECK-LABEL: define void @test.0( +; CHECK-SAME: i32 [[CSPINIT:%.*]]) !lgc.cps [[META1:![0-9]+]] !lgc.shaderstage [[META2:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.state [[META4:![0-9]+]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP0]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CHECK-NEXT: store i32 333, ptr addrspace(21) [[TMP3]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP0]], 4 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP5]], i32 0 +; CHECK-NEXT: store i32 111, ptr addrspace(21) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP0]], 9 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP8]], i32 0 +; CHECK-NEXT: store i8 99, ptr addrspace(21) [[TMP9]], align 1 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP10]], i32 poison, i32 [[TMP7]], i32 [[TMP4]]) +; CHECK-NEXT: unreachable +; +AllocaSpillBB: + %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) + store i32 333, ptr addrspace(32) %mem, align 4 + %p1 = getelementptr i32, ptr addrspace(32) %mem, i32 1 + store i32 111, ptr addrspace(32) %p1, align 4 + %p2 = getelementptr i8, ptr addrspace(32) %mem, i32 9 + store i8 99, ptr addrspace(32) %p2, align 1 + %q1 = ptrtoint ptr addrspace(32) %p1 to i32 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison, ptr addrspace(32) %p2, i32 %q1) + unreachable +} + +define { ptr, ptr } @test.1(ptr addrspace(32) %p2, i32 %q1, ptr %0) !lgc.cps !1 !lgc.shaderstage !2 !continuation !4 { +; CHECK-LABEL: define void @test.1( +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[P2:%.*]], i32 [[Q1:%.*]]) !lgc.cps [[META1]] !lgc.shaderstage [[META2]] !continuation [[META5:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[Q1]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP0]], i32 0 +; CHECK-NEXT: [[N111:%.*]] = load i32, ptr addrspace(21) [[TMP1]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[P2]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CHECK-NEXT: [[N99:%.*]] = load i8, ptr addrspace(21) [[TMP3]], align 1 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.2) +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP4]], i32 poison) +; CHECK-NEXT: unreachable +; +AllocaSpillBB: + %p1 = inttoptr i32 %q1 to ptr addrspace(32) + %n111 = load i32, ptr addrspace(32) %p1, align 4 + %n99 = load i8, ptr addrspace(32) %p2, align 1 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.2) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison) + unreachable +} + +define { ptr, ptr } @test.2(ptr %0) !lgc.cps !1 !lgc.shaderstage !2 !continuation !5 { +; CHECK-LABEL: define void @test.2( +; CHECK-SAME: i32 [[CSPINIT:%.*]]) !lgc.cps [[META1]] !lgc.shaderstage [[META2]] !continuation [[META6:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -12 +; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP2]], i32 0 +; CHECK-NEXT: [[N333:%.*]] = load i32, ptr addrspace(21) [[TMP3]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -12 +; CHECK-NEXT: store i32 [[TMP5]], ptr [[CSP]], align 4 +; CHECK-NEXT: ret void +; +AllocaSpillBB: + %mem = call ptr addrspace(32) @lgc.cps.peek(i32 10) + %n333 = load i32, ptr addrspace(32) %mem, align 4 + call void @lgc.cps.free(i32 10) + call void @lgc.cps.complete() + unreachable +} + +define { ptr, ptr } @test.gep(ptr %0) !lgc.cps !1 !lgc.shaderstage !2 !continuation !6 { +; CHECK-LABEL: define void @test.gep( +; CHECK-SAME: i32 [[CSPINIT:%.*]]) !lgc.cps [[META1]] !lgc.shaderstage [[META2]] !continuation [[META7:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[STACK_EL0:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[STACK_EL0]], 24 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], [[TMP2]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP5]], i32 0 +; CHECK-NEXT: store i32 [[TMP4]], ptr addrspace(21) [[TMP6]], align 4 +; CHECK-NEXT: [[STACK_EL1:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 1) +; CHECK-NEXT: [[TMP7:%.*]] = mul i32 [[STACK_EL1]], 24 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP0]], [[TMP7]] +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], -4 +; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP11]], i32 0 +; CHECK-NEXT: store i32 [[TMP10]], ptr addrspace(21) [[TMP12]], align 4 +; CHECK-NEXT: [[STACK_EL2:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 2) +; CHECK-NEXT: [[STACK_EL2_DIV:%.*]] = sdiv i32 [[STACK_EL2]], 2 +; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP0]], 8 +; CHECK-NEXT: [[TMP14:%.*]] = mul i32 [[STACK_EL2_DIV]], 24 +; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP13]], [[TMP14]] +; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP17:%.*]] = add i32 [[TMP16]], -8 +; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP15]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP18]], i32 0 +; CHECK-NEXT: store i32 [[TMP17]], ptr addrspace(21) [[TMP19]], align 4 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) +; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP20]], i32 poison, i32 [[TMP17]], i32 [[TMP17]]) +; CHECK-NEXT: unreachable +; +AllocaSpillBB: + %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) + %stack.el0 = call i32 @lgc.cps.get.dummy.index(i32 0) + %1 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el0 + %vsp = call ptr addrspace(32) @lgc.cps.get.vsp() + %vsp.i = ptrtoint ptr addrspace(32) %vsp to i32 + store i32 %vsp.i, ptr addrspace(32) %1, align 4 + %stack.el1 = call i32 @lgc.cps.get.dummy.index(i32 1) + %2 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el1 + %vsp.2 = call ptr addrspace(32) @lgc.cps.peek(i32 4) + %vsp.2.i = ptrtoint ptr addrspace(32) %vsp.2 to i32 + store i32 %vsp.2.i, ptr addrspace(32) %2, align 4 + %stack.el2 = call i32 @lgc.cps.get.dummy.index(i32 2) + %stack.el2.div = sdiv i32 %stack.el2, 2 + %3 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el2.div, i32 1 + %vsp.3 = call ptr addrspace(32) @lgc.cps.peek(i32 8) + %vsp.3.i = ptrtoint ptr addrspace(32) %vsp.3 to i32 + store i32 %vsp.3.i, ptr addrspace(32) %3, align 4 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison, ptr addrspace(32) %vsp.3, i32 %vsp.3.i) + unreachable +} + +define { ptr, ptr } @test.nested.gep(ptr %0) !lgc.cps !1 !lgc.shaderstage !2 !continuation !7 { +; CHECK-LABEL: define void @test.nested.gep( +; CHECK-SAME: i32 [[CSPINIT:%.*]]) !lgc.cps [[META1]] !lgc.shaderstage [[META2]] !continuation [[META8:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[STACK_EL0:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[STACK_EL0]], 24 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], [[TMP2]] +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 16 +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(21) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(21) [[TMP6]], i32 0 +; CHECK-NEXT: store i32 [[TMP5]], ptr addrspace(21) [[TMP7]], align 4 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) +; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP8]], i32 poison, i32 [[TMP5]], i32 [[TMP5]]) +; CHECK-NEXT: unreachable +; +AllocaSpillBB: + %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) + %stack.el0 = call i32 @lgc.cps.get.dummy.index(i32 0) + %gep.base = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el0 + %1 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %gep.base, i32 0, i32 2 + %vsp = call ptr addrspace(32) @lgc.cps.get.vsp() + %vsp.i = ptrtoint ptr addrspace(32) %vsp to i32 + store i32 %vsp.i, ptr addrspace(32) %1, align 4 + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison, ptr addrspace(32) %vsp, i32 %vsp.i) + unreachable +} + +declare !continuation !3 { ptr, ptr } @continuation.prototype.test.0(ptr, i1) + +declare ptr @continuation.malloc(i32) + +declare void @continuation.free(ptr) + +declare token @llvm.coro.id.retcon(i32, i32, ptr, ptr, ptr, ptr) #1 + +declare ptr @llvm.coro.begin(token, ptr writeonly) #1 + +declare !continuation !4 { ptr, ptr } @continuation.prototype.test.1(ptr, i1) + +declare !continuation !5 { ptr, ptr } @continuation.prototype.test.2(ptr, i1) + +declare !continuation !6 { ptr, ptr } @continuation.prototype.test.gep(ptr, i1) + +declare !continuation !7 { ptr, ptr } @continuation.prototype.test.nested.gep(ptr, i1) + +attributes #0 = { noreturn } +attributes #1 = { nounwind } + +!continuation.stackAddrspace = !{!0} + +!0 = !{i32 21} +!1 = !{i32 1} +!2 = !{i32 7} +!3 = !{ptr @test.0} +!4 = !{ptr @test.1} +!5 = !{ptr @test.2} +!6 = !{ptr @test.gep} +!7 = !{ptr @test.nested.gep} +;. +; CHECK: [[META1]] = !{i32 1} +; CHECK: [[META2]] = !{i32 7} +; CHECK: [[META3]] = !{ptr @test.0} +; CHECK: [[META4]] = !{i32 0} +; CHECK: [[META5]] = !{ptr @test.1} +; CHECK: [[META6]] = !{ptr @test.2} +; CHECK: [[META7]] = !{ptr @test.gep} +; CHECK: [[META8]] = !{ptr @test.nested.gep} +;. diff --git a/llvmraytracing/test/lgccps/CpsLowering/cps-stack-lowering.ll b/llvmraytracing/test/lgccps/CpsLowering/cps-stack-lowering.ll new file mode 100644 index 0000000000..ae352d4b23 --- /dev/null +++ b/llvmraytracing/test/lgccps/CpsLowering/cps-stack-lowering.ll @@ -0,0 +1,224 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -o - -passes='lower-await,coro-early,lgc-coro-split,coro-cleanup,cleanup-continuations' %s -S | FileCheck --check-prefixes=CHECK %s + +declare void @lgc.cps.jump(...) noreturn +declare ptr addrspace(32) @lgc.cps.alloc(i32) +declare void @lgc.cps.free(i32) +declare i32 @lgc.cps.as.continuation.reference(ptr) +declare ptr addrspace(32) @lgc.cps.peek(i32) +declare ptr addrspace(32) @lgc.cps.get.vsp() +declare i32 @lgc.cps.get.dummy.index(i32) +declare void @lgc.cps.complete() + +%_rgen_1.Frame = type { ptr addrspace(5), ptr addrspace(5), i32 } + +define void @test.0() !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} !continuation !{ptr @test.0} { +; CHECK-LABEL: define void @test.0( +; CHECK-SAME: i32 [[CSPINIT:%.*]]) !lgc.cps [[META1:![0-9]+]] !lgc.shaderstage [[META2:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.state [[META4:![0-9]+]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP0]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP2]], i32 0 +; CHECK-NEXT: store i32 333, ptr addrspace(5) [[TMP3]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP0]], 4 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: store i32 111, ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP0]], 9 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: store i8 99, ptr addrspace(5) [[TMP9]], align 1 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP10]], i32 poison, i32 [[TMP7]], i32 [[TMP4]]) +; CHECK-NEXT: unreachable +; + %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) ; round up to 12 during lowering + + store i32 333, ptr addrspace(32) %mem + + %p1 = getelementptr i32, ptr addrspace(32) %mem, i32 1 + store i32 111, ptr addrspace(32) %p1 + + %p2 = getelementptr i8, ptr addrspace(32) %mem, i32 9 + store i8 99, ptr addrspace(32) %p2 + + %q1 = ptrtoint ptr addrspace(32) %p1 to i32 + + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison, ptr addrspace(32) %p2, i32 %q1) + unreachable +} + +define void @test.1(ptr addrspace(32) %p2, i32 %q1) !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} !continuation !{ptr @test.0} { +; CHECK-LABEL: define void @test.1( +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[P2:%.*]], i32 [[Q1:%.*]]) !lgc.cps [[META1]] !lgc.shaderstage [[META2]] !continuation [[META5:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[Q1]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP0]], i32 0 +; CHECK-NEXT: [[N111:%.*]] = load i32, ptr addrspace(5) [[TMP1]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[P2]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP2]], i32 0 +; CHECK-NEXT: [[N99:%.*]] = load i8, ptr addrspace(5) [[TMP3]], align 1 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.2) +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP4]], i32 poison) +; CHECK-NEXT: unreachable +; + %p1 = inttoptr i32 %q1 to ptr addrspace(32) + %n111 = load i32, ptr addrspace(32) %p1 + %n99 = load i8, ptr addrspace(32) %p2 + + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.2) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison) + unreachable +} + +define void @test.2() !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} !continuation !{ptr @test.0} { +; CHECK-LABEL: define void @test.2( +; CHECK-SAME: i32 [[CSPINIT:%.*]]) !lgc.cps [[META1]] !lgc.shaderstage [[META2]] !continuation [[META6:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -12 +; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[TMP1]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP2]], i32 0 +; CHECK-NEXT: [[N333:%.*]] = load i32, ptr addrspace(5) [[TMP3]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], -12 +; CHECK-NEXT: store i32 [[TMP5]], ptr [[CSP]], align 4 +; CHECK-NEXT: ret void +; + %mem = call ptr addrspace(32) @lgc.cps.peek(i32 10) ; round up to 12 during lowering + + %n333 = load i32, ptr addrspace(32) %mem + + call void @lgc.cps.free(i32 10) ; round up to 12 during lowering + + call void @lgc.cps.complete() + unreachable +} + +; Dummy test to show behavior with lowering of non-constant GEP indices. +define void @test.gep() !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} !continuation !{ptr @test.0} { +; CHECK-LABEL: define void @test.gep( +; CHECK-SAME: i32 [[CSPINIT:%.*]]) !lgc.cps [[META1]] !lgc.shaderstage [[META2]] !continuation [[META7:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[STACK_EL0:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[STACK_EL0]], 24 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], [[TMP2]] +; CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: store i32 [[TMP4]], ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[STACK_EL1:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 1) +; CHECK-NEXT: [[TMP7:%.*]] = mul i32 [[STACK_EL1]], 24 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP0]], [[TMP7]] +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], -4 +; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP11]], i32 0 +; CHECK-NEXT: store i32 [[TMP10]], ptr addrspace(5) [[TMP12]], align 4 +; CHECK-NEXT: [[STACK_EL2:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 2) +; CHECK-NEXT: [[STACK_EL2_DIV:%.*]] = sdiv i32 [[STACK_EL2]], 2 +; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP0]], 8 +; CHECK-NEXT: [[TMP14:%.*]] = mul i32 [[STACK_EL2_DIV]], 24 +; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP13]], [[TMP14]] +; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP17:%.*]] = add i32 [[TMP16]], -8 +; CHECK-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP15]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP18]], i32 0 +; CHECK-NEXT: store i32 [[TMP17]], ptr addrspace(5) [[TMP19]], align 4 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) +; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP20]], i32 poison, i32 [[TMP17]], i32 [[TMP17]]) +; CHECK-NEXT: unreachable +; + %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) ; round up to 12 during lowering + + %stack.el0 = call i32 @lgc.cps.get.dummy.index(i32 0) + %1 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el0 + %vsp = call ptr addrspace(32) @lgc.cps.get.vsp() + %vsp.i = ptrtoint ptr addrspace(32) %vsp to i32 + store i32 %vsp.i, ptr addrspace(32) %1 + + %stack.el1 = call i32 @lgc.cps.get.dummy.index(i32 1) + %2 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el1 + %vsp.2 = call ptr addrspace(32) @lgc.cps.peek(i32 4) + %vsp.2.i = ptrtoint ptr addrspace(32) %vsp.2 to i32 + store i32 %vsp.2.i, ptr addrspace(32) %2 + + %stack.el2 = call i32 @lgc.cps.get.dummy.index(i32 2) + %stack.el2.div = sdiv i32 %stack.el2, 2 + %3 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el2.div, i32 1 + %vsp.3 = call ptr addrspace(32) @lgc.cps.peek(i32 8) + %vsp.3.i = ptrtoint ptr addrspace(32) %vsp.3 to i32 + store i32 %vsp.3.i, ptr addrspace(32) %3 + + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison, ptr addrspace(32) %vsp.3, i32 %vsp.3.i) + unreachable +} + +; Dummy test to show behavior with lowering of nested GEPs. +define void @test.nested.gep() !lgc.cps !{i32 1} !lgc.shaderstage !{i32 7} !continuation !{ptr @test.0} { +; CHECK-LABEL: define void @test.nested.gep( +; CHECK-SAME: i32 [[CSPINIT:%.*]]) !lgc.cps [[META1]] !lgc.shaderstage [[META2]] !continuation [[META8:![0-9]+]] !continuation.state [[META4]] { +; CHECK-NEXT: [[ALLOCASPILLBB:.*:]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[STACK_EL0:%.*]] = call i32 @lgc.cps.get.dummy.index(i32 0) +; CHECK-NEXT: [[TMP2:%.*]] = mul i32 [[STACK_EL0]], 24 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], [[TMP2]] +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], 16 +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP6]], i32 0 +; CHECK-NEXT: store i32 [[TMP5]], ptr addrspace(5) [[TMP7]], align 4 +; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) +; CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP8]], i32 poison, i32 [[TMP5]], i32 [[TMP5]]) +; CHECK-NEXT: unreachable +; + %mem = call ptr addrspace(32) @lgc.cps.alloc(i32 10) ; round up to 12 during lowering + + %stack.el0 = call i32 @lgc.cps.get.dummy.index(i32 0) + %gep.base = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %mem, i32 %stack.el0 + %1 = getelementptr inbounds %_rgen_1.Frame, ptr addrspace(32) %gep.base, i32 0, i32 2 + %vsp = call ptr addrspace(32) @lgc.cps.get.vsp() + %vsp.i = ptrtoint ptr addrspace(32) %vsp to i32 + store i32 %vsp.i, ptr addrspace(32) %1 + + %cr = call i32 @lgc.cps.as.continuation.reference(ptr @test.1) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison, i32 poison, ptr addrspace(32) %vsp, i32 %vsp.i) + unreachable +} + +!continuation.stackAddrspace = !{!0} + +!0 = !{i32 5} +;. +; CHECK: [[META1]] = !{i32 1} +; CHECK: [[META2]] = !{i32 7} +; CHECK: [[META3]] = !{ptr @test.0} +; CHECK: [[META4]] = !{i32 0} +; CHECK: [[META5]] = !{ptr @test.1} +; CHECK: [[META6]] = !{ptr @test.2} +; CHECK: [[META7]] = !{ptr @test.gep} +; CHECK: [[META8]] = !{ptr @test.nested.gep} +;. diff --git a/llvmraytracing/test/lgccps/CpsLowering/cps-unify-exits.ll b/llvmraytracing/test/lgccps/CpsLowering/cps-unify-exits.ll new file mode 100644 index 0000000000..7251051390 --- /dev/null +++ b/llvmraytracing/test/lgccps/CpsLowering/cps-unify-exits.ll @@ -0,0 +1,81 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -o - -passes='lower-await,coro-early,lgc-coro-split,coro-cleanup,cleanup-continuations' %s -S | FileCheck --check-prefixes=CHECK %s + +declare void @lgc.cps.jump(...) noreturn + +define void @unify_jumps(i32 %arg, ptr %table) !lgc.cps !0 !lgc.shaderstage !{i32 7} { +; CHECK-LABEL: define void @unify_jumps( +; CHECK-SAME: i32 [[ARG:%.*]], ptr [[TABLE:%.*]]) !lgc.cps [[META1:![0-9]+]] !lgc.shaderstage [[META2:![0-9]+]] { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ARG]], 3 +; CHECK-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]] +; CHECK: [[THEN]]: +; CHECK-NEXT: [[TABLE_0:%.*]] = getelementptr i32, ptr [[TABLE]], i32 0 +; CHECK-NEXT: [[CR_THEN:%.*]] = load i32, ptr [[TABLE_0]], align 4 +; CHECK-NEXT: [[THEN_ARG:%.*]] = add i32 [[ARG]], 1 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_THEN]], i32 2, i32 poison, i32 poison, i32 [[THEN_ARG]]) +; CHECK-NEXT: unreachable +; CHECK: [[ELSE]]: +; CHECK-NEXT: [[TABLE_1:%.*]] = getelementptr i32, ptr [[TABLE]], i32 1 +; CHECK-NEXT: [[CR_ELSE:%.*]] = load i32, ptr [[TABLE_1]], align 4 +; CHECK-NEXT: [[ELSE_ARG:%.*]] = uitofp i32 [[ARG]] to float +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_ELSE]], i32 2, i32 poison, i32 poison, float [[ELSE_ARG]], i32 5) +; CHECK-NEXT: unreachable +; +entry: + %cond = icmp ult i32 %arg, 3 + br i1 %cond, label %then, label %else + +then: + %table.0 = getelementptr i32, ptr %table, i32 0 + %cr.then = load i32, ptr %table.0 + %then.arg = add i32 %arg, 1 + call void (...) @lgc.cps.jump(i32 %cr.then, i32 2, i32 poison, i32 poison, i32 %then.arg) + unreachable + +else: + %table.1 = getelementptr i32, ptr %table, i32 1 + %cr.else = load i32, ptr %table.1 + %else.arg = uitofp i32 %arg to float + call void (...) @lgc.cps.jump(i32 %cr.else, i32 2, i32 poison, i32 poison, float %else.arg, i32 5) + unreachable +} + +define void @unify_jump_ret(i32 %arg, ptr %table) !lgc.cps !0 !lgc.shaderstage !{i32 7} { +; CHECK-LABEL: define void @unify_jump_ret( +; CHECK-SAME: i32 [[ARG:%.*]], ptr [[TABLE:%.*]]) !lgc.cps [[META1]] !lgc.shaderstage [[META2]] { +; CHECK-NEXT: [[ENTRY:.*:]] +; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ARG]], 3 +; CHECK-NEXT: br i1 [[COND]], label %[[THEN:.*]], label %[[ELSE:.*]] +; CHECK: [[THEN]]: +; CHECK-NEXT: [[TABLE_0:%.*]] = getelementptr i32, ptr [[TABLE]], i32 0 +; CHECK-NEXT: [[CR_THEN:%.*]] = load i32, ptr [[TABLE_0]], align 4 +; CHECK-NEXT: [[THEN_ARG:%.*]] = add i32 [[ARG]], 1 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_THEN]], i32 2, i32 poison, i32 poison, i32 [[THEN_ARG]]) +; CHECK-NEXT: unreachable +; CHECK: [[ELSE]]: +; CHECK-NEXT: ret void +; +entry: + %cond = icmp ult i32 %arg, 3 + br i1 %cond, label %then, label %else + +then: + %table.0 = getelementptr i32, ptr %table, i32 0 + %cr.then = load i32, ptr %table.0 + %then.arg = add i32 %arg, 1 + call void (...) @lgc.cps.jump(i32 %cr.then, i32 2, i32 poison, i32 poison, i32 %then.arg) + unreachable + +else: + ret void +} + +!continuation.stackAddrspace = !{!1} + +!0 = !{i32 1} ; level 1 +!1 = !{i32 5} +;. +; CHECK: [[META1]] = !{i32 1} +; CHECK: [[META2]] = !{i32 7} +;. diff --git a/llvmraytracing/test/lgccps/alloca-select.ll b/llvmraytracing/test/lgccps/alloca-select.ll index 3435213e9d..5661fbc774 100644 --- a/llvmraytracing/test/lgccps/alloca-select.ll +++ b/llvmraytracing/test/lgccps/alloca-select.ll @@ -13,60 +13,91 @@ define void @test({} %state, i32 %rcr, float %arg, i32 %arg1) !lgc.cps !0 { store i32 111, ptr %p, align 4 %t0 = fadd float %arg, 1.0 %cr = call i32 @lgc.cps.as.continuation.reference(ptr @callee) - %t1 = call float (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} - %tmp = fmul float %t1, %arg + %t1 = call { float } (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} + %res = extractvalue { float } %t1, 0 + %tmp = fmul float %res, %arg %v111 = load float, ptr %p, align 4 %returnvalue = fmul float %tmp, %v111 - call void (...) @lgc.cps.jump(i32 %rcr, i32 2, {} poison, i32 poison, i32 poison, float %returnvalue) + call void (...) @lgc.cps.jump(i32 %rcr, i32 2, i32 poison, i32 poison, float %returnvalue) unreachable } +!continuation.stackAddrspace = !{!1} + !0 = !{i32 1} ; level = 1 +!1 = !{i32 5} declare i32 @lgc.cps.as.continuation.reference(...) memory(none) -declare float @lgc.cps.await__f32(...) +declare { float } @lgc.cps.await__f32(...) declare void @lgc.cps.jump(...) ; CHECK-LABEL: define void @test -; CHECK-SAME: ({} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], i32 [[ARG1:%.*]]) !lgc.cps [[META0:![0-9]+]] !continuation [[META1:![0-9]+]] !continuation.stacksize [[META2:![0-9]+]] !continuation.state [[META2]] { +; CHECK-SAME: (i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], i32 [[ARG1:%.*]]) !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 20) -; CHECK-NEXT: [[A1:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: [[ARG1_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 4 -; CHECK-NEXT: store i32 [[ARG1]], ptr addrspace(32) [[ARG1_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 3 -; CHECK-NEXT: store float [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[RCR_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(32) [[RCR_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 20 +; CHECK-NEXT: store i32 [[TMP1]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP0]], 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], 16 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP3]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP4]], i32 0 +; CHECK-NEXT: store i32 [[ARG1]], ptr addrspace(5) [[TMP5]], align 4 +; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP0]], 12 +; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP6]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP7]], i32 0 +; CHECK-NEXT: store float [[ARG]], ptr addrspace(5) [[TMP8]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP0]], 8 +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP9]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP10]], i32 0 +; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(5) [[TMP11]], align 4 ; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[ARG1]], 0 -; CHECK-NEXT: [[P:%.*]] = select i1 [[COND]], ptr addrspace(32) [[A1]], ptr addrspace(32) [[A2]] -; CHECK-NEXT: store i32 111, ptr addrspace(32) [[P]], align 4 +; CHECK-NEXT: [[P_0:%.*]] = select i1 [[COND]], i32 [[TMP0]], i32 [[TMP2]] +; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i32 [[P_0]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP12]], i32 0 +; CHECK-NEXT: store i32 111, ptr addrspace(5) [[TMP13]], align 4 ; CHECK-NEXT: [[T0:%.*]] = fadd float [[ARG]], 1.000000e+00 ; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee) -; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, {} poison, i32 poison, i32 [[TMP1]], float [[T0]]), !continuation.returnedRegistercount [[META3:![0-9]+]] +; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i32 [[CR]] to ptr +; CHECK-NEXT: [[TMP15:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.0) +; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP16]], i32 [[TMP15]], float [[T0]]), !continuation.returnedRegistercount [[META4:![0-9]+]] ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.0 -; CHECK-SAME: ({} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: (i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 20) -; CHECK-NEXT: [[A1:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CHECK-NEXT: [[ARG1_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 4 -; CHECK-NEXT: [[ARG1_RELOAD:%.*]] = load i32, ptr addrspace(32) [[ARG1_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 3 -; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 2 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -20 +; CHECK-NEXT: [[TMP5:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP4]], 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP4]], 16 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: [[ARG1_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP4]], 12 +; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP10]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP11]], i32 0 +; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP12]], align 4 +; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP4]], 8 +; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP13]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP14]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP15]], align 4 ; CHECK-NEXT: [[COND2:%.*]] = icmp ult i32 [[ARG1_RELOAD]], 0 -; CHECK-NEXT: [[P1:%.*]] = select i1 [[COND2]], ptr addrspace(32) [[A1]], ptr addrspace(32) [[A2]] -; CHECK-NEXT: [[TMP:%.*]] = fmul float [[TMP3]], [[ARG_RELOAD]] -; CHECK-NEXT: [[V111:%.*]] = load float, ptr addrspace(32) [[P1]], align 4 +; CHECK-NEXT: [[P1_0:%.*]] = select i1 [[COND2]], i32 [[TMP4]], i32 [[TMP6]] +; CHECK-NEXT: [[RES:%.*]] = extractvalue { float } [[TMP5]], 0 +; CHECK-NEXT: [[TMP:%.*]] = fmul float [[RES]], [[ARG_RELOAD]] +; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i32 [[P1_0]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP16]], i32 0 +; CHECK-NEXT: [[V111:%.*]] = load float, ptr addrspace(5) [[TMP17]], align 4 ; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[TMP]], [[V111]] -; CHECK-NEXT: call void @lgc.cps.free(i32 20) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP19:%.*]] = add i32 [[TMP18]], -20 +; CHECK-NEXT: store i32 [[TMP19]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, i32 [[TMP20]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; diff --git a/llvmraytracing/test/lgccps/await-if-else.ll b/llvmraytracing/test/lgccps/await-if-else.ll index 126ee0605c..1a53da20d8 100644 --- a/llvmraytracing/test/lgccps/await-if-else.ll +++ b/llvmraytracing/test/lgccps/await-if-else.ll @@ -14,32 +14,45 @@ define void @test({} %state, i32 %rcr, float %arg) !lgc.cps !0 { br i1 %cond, label %bb1, label %bb2 bb1: - %t1 = call float (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %arg), !continuation.returnedRegistercount !{i32 0} + %t1 = call { float } (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %arg), !continuation.returnedRegistercount !{i32 0} + %res = extractvalue { float } %t1, 0 br label %bb3 bb2: - %t2 = call float (...) @lgc.cps.await__f32(i32 %cr2, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} + %t2 = call { float } (...) @lgc.cps.await__f32(i32 %cr2, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} + %res.2 = extractvalue { float } %t2, 0 br label %bb3 + bb3: - %t3 = phi float [%t1, %bb1], [%t2, %bb2] + %t3 = phi float [%res, %bb1], [%res.2, %bb2] %returnvalue = fmul float %t3, %arg - call void (...) @lgc.cps.jump(i32 %rcr, i32 2, {} poison, i32 poison, i32 poison, float %returnvalue) + call void (...) @lgc.cps.jump(i32 %rcr, i32 2, i32 poison, i32 poison, float %returnvalue) unreachable } +!continuation.stackAddrspace = !{!1} + !0 = !{i32 1} ; level = 1 +!1 = !{i32 5} declare i32 @lgc.cps.as.continuation.reference(...) memory(none) -declare float @lgc.cps.await__f32(...) +declare { float } @lgc.cps.await__f32(...) declare void @lgc.cps.jump(...) ; CHECK-LABEL: define void @test( -; CHECK-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]]) !lgc.cps [[META0:![0-9]+]] !continuation [[META1:![0-9]+]] !continuation.stacksize [[META2:![0-9]+]] !continuation.state [[META2]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]]) !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: store float [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[RCR_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(32) [[RCR_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP13]], 8 +; CHECK-NEXT: store i32 [[TMP14]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP13]], 4 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: store float [[ARG]], ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP13]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP7]], i32 0 +; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(5) [[TMP8]], align 4 ; CHECK-NEXT: [[T0:%.*]] = fadd float [[ARG]], 1.000000e+00 ; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee) ; CHECK-NEXT: [[CR2:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee2) @@ -47,40 +60,64 @@ declare void @lgc.cps.jump(...) ; CHECK-NEXT: br i1 [[COND]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK: bb1: ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, {} poison, i32 poison, i32 [[TMP1]], float [[ARG]]), !continuation.returnedRegistercount [[META3:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.0) +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP9]], i32 [[TMP1]], float [[ARG]]), !continuation.returnedRegistercount [[META4:![0-9]+]] ; CHECK-NEXT: unreachable ; CHECK: bb2: ; CHECK-NEXT: [[TMP2:%.*]] = inttoptr i32 [[CR2]] to ptr -; CHECK-NEXT: [[TMP3:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.1) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR2]], i32 2, {} poison, i32 poison, i32 [[TMP3]], float [[T0]]), !continuation.returnedRegistercount [[META3]] +; CHECK-NEXT: [[TMP3:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.1) +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR2]], i32 2, i32 [[TMP12]], i32 [[TMP3]], float [[T0]]), !continuation.returnedRegistercount [[META4]] ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.0( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CHECK-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[TMP3]], [[ARG_RELOAD]] -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -8 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[RES1:%.*]] = extractvalue { float } [[TMP13]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 4 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP6]], i32 0 +; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP7]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[RES1]], [[ARG_RELOAD]] +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], -8 +; CHECK-NEXT: store i32 [[TMP11]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, i32 [[TMP12]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.1( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.1: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CHECK-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[TMP3]], [[ARG_RELOAD]] -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -8 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[RES_21:%.*]] = extractvalue { float } [[TMP13]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 4 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP6]], i32 0 +; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP7]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[RES_21]], [[ARG_RELOAD]] +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], -8 +; CHECK-NEXT: store i32 [[TMP11]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, i32 [[TMP12]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; diff --git a/llvmraytracing/test/lgccps/await-if.ll b/llvmraytracing/test/lgccps/await-if.ll index 1f2568fd0a..275e1ba823 100644 --- a/llvmraytracing/test/lgccps/await-if.ll +++ b/llvmraytracing/test/lgccps/await-if.ll @@ -13,56 +13,82 @@ entry: br i1 %cond, label %bb1, label %bb2 bb1: - %t1 = call float (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %arg), !continuation.returnedRegistercount !{i32 0} + %t1 = call { float } (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %arg), !continuation.returnedRegistercount !{i32 0} + %res = extractvalue { float } %t1, 0 br label %bb2 bb2: - %t3 = phi float [%t1, %bb1], [%t0, %entry] + %t3 = phi float [%res, %bb1], [%t0, %entry] %returnvalue = fmul float %t3, %arg - call void (...) @lgc.cps.jump(i32 %rcr, i32 2, {} poison, i32 poison, i32 poison, float %returnvalue) + call void (...) @lgc.cps.jump(i32 %rcr, i32 2, i32 poison, i32 poison, float %returnvalue) unreachable } +!continuation.stackAddrspace = !{!1} + !0 = !{i32 1} ; level = 1 +!1 = !{i32 5} declare i32 @lgc.cps.as.continuation.reference(...) memory(none) -declare float @lgc.cps.await__f32(...) +declare { float } @lgc.cps.await__f32(...) declare void @lgc.cps.jump(...) ; CHECK-LABEL: define void @test( -; CHECK-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]]) !lgc.cps [[META0:![0-9]+]] !continuation [[META1:![0-9]+]] !continuation.stacksize [[META2:![0-9]+]] !continuation.state [[META2]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]]) !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: store float [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[RCR_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(32) [[RCR_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 8 +; CHECK-NEXT: store i32 [[TMP3]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], 4 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: store float [[ARG]], ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP7]], i32 0 +; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(5) [[TMP8]], align 4 ; CHECK-NEXT: [[T0:%.*]] = fadd float [[ARG]], 1.000000e+00 ; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee) ; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[T0]], 1.000000e+00 ; CHECK-NEXT: br i1 [[COND]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK: bb1: ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, {} poison, i32 poison, i32 [[TMP1]], float [[ARG]]), !continuation.returnedRegistercount [[META3:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.0) +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP9]], i32 [[TMP1]], float [[ARG]]), !continuation.returnedRegistercount [[META4:![0-9]+]] ; CHECK-NEXT: unreachable ; CHECK: bb2: ; CHECK-NEXT: [[T0_BB2:%.*]] = phi float [ [[T0]], [[ENTRY:%.*]] ] ; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[T0_BB2]], [[ARG]] -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], -8 +; CHECK-NEXT: store i32 [[TMP11]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR]], i32 2, i32 [[TMP12]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.0( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CHECK-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[TMP3]], [[ARG_RELOAD]] -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -8 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[RES1:%.*]] = extractvalue { float } [[TMP13]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 4 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP6]], i32 0 +; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP7]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[RES1]], [[ARG_RELOAD]] +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], -8 +; CHECK-NEXT: store i32 [[TMP11]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, i32 [[TMP12]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; diff --git a/llvmraytracing/test/lgccps/await-in-loop.ll b/llvmraytracing/test/lgccps/await-in-loop.ll index 7e02dcecab..4f62171058 100644 --- a/llvmraytracing/test/lgccps/await-in-loop.ll +++ b/llvmraytracing/test/lgccps/await-in-loop.ll @@ -13,74 +13,112 @@ entry: loop: %ind = phi i32 [0, %entry], [%inc, %loop] - %t1 = call float (...) @lgc.cps.await__f32(i32 %cr, i32 2, i32 %ind), !continuation.returnedRegistercount !{i32 0} + %t1 = call { float } (...) @lgc.cps.await__f32(i32 %cr, i32 2, i32 %ind), !continuation.returnedRegistercount !{i32 0} %inc = add i32 %ind, 1 - %cond = fcmp olt float %t1, 5.0 + %res = extractvalue { float } %t1, 0 + %cond = fcmp olt float %res, 5.0 br i1 %cond, label %loop, label %end end: - %t2 = fmul float %t1, %arg + %t2 = fmul float %res, %arg %returnvalue = fadd float %t2, %arg2 - call void (...) @lgc.cps.jump(i32 %rcr, i32 2, {} poison, i32 poison, i32 poison, float %returnvalue) + call void (...) @lgc.cps.jump(i32 %rcr, i32 2, i32 poison, i32 poison, float %returnvalue) unreachable } +!continuation.stackAddrspace = !{!1} + !0 = !{i32 1} ; level = 1 +!1 = !{i32 5} declare i32 @lgc.cps.as.continuation.reference(...) memory(none) -declare float @lgc.cps.await__f32(...) +declare { float } @lgc.cps.await__f32(...) declare void @lgc.cps.jump(...) ; CHECK-LABEL: define void @test( -; CHECK-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], float [[ARG2:%.*]]) !lgc.cps [[META0:![0-9]+]] !continuation [[META1:![0-9]+]] !continuation.stacksize [[META2:![0-9]+]] !continuation.state [[META2]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], float [[ARG2:%.*]]) !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 20) -; CHECK-NEXT: [[ARG2_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CHECK-NEXT: store float [[ARG2]], ptr addrspace(32) [[ARG2_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: store float [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[RCR_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(32) [[RCR_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 20 +; CHECK-NEXT: store i32 [[TMP3]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], 8 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: store float [[ARG2]], ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP2]], 4 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: store float [[ARG]], ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP10]], i32 0 +; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(5) [[TMP11]], align 4 ; CHECK-NEXT: [[T0:%.*]] = fadd float [[ARG]], 1.000000e+00 ; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee) -; CHECK-NEXT: [[CR_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 3 -; CHECK-NEXT: store i32 [[CR]], ptr addrspace(32) [[CR_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[IND_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 4 -; CHECK-NEXT: store i32 0, ptr addrspace(32) [[IND_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP2]], 12 +; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP12]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP13]], i32 0 +; CHECK-NEXT: store i32 [[CR]], ptr addrspace(5) [[TMP14]], align 4 +; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP2]], 16 +; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP15]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP16]], i32 0 +; CHECK-NEXT: store i32 0, ptr addrspace(5) [[TMP17]], align 4 ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, {} poison, i32 poison, i32 [[TMP1]], i32 0), !continuation.returnedRegistercount [[META3:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.0) +; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP18]], i32 [[TMP1]], i32 0), !continuation.returnedRegistercount [[META4:![0-9]+]] ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.0( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 20) -; CHECK-NEXT: [[IND_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 4 -; CHECK-NEXT: [[IND_RELOAD:%.*]] = load i32, ptr addrspace(32) [[IND_RELOAD_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP18]], -20 +; CHECK-NEXT: [[TMP30:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], 16 +; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP9]], i32 0 +; CHECK-NEXT: [[IND_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP10]], align 4 ; CHECK-NEXT: [[INC:%.*]] = add i32 [[IND_RELOAD]], 1 -; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[TMP3]], 5.000000e+00 +; CHECK-NEXT: [[RES1:%.*]] = extractvalue { float } [[TMP30]], 0 +; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[RES1]], 5.000000e+00 ; CHECK-NEXT: br i1 [[COND]], label [[LOOP_FROM_AFTERCOROSUSPEND:%.*]], label [[END:%.*]] ; CHECK: loop.from.AfterCoroSuspend: ; CHECK-NEXT: [[INC_LOOP:%.*]] = phi i32 [ [[INC]], [[ENTRYRESUME_0:%.*]] ] -; CHECK-NEXT: [[IND_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 4 -; CHECK-NEXT: store i32 [[INC_LOOP]], ptr addrspace(32) [[IND_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[CR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 3 -; CHECK-NEXT: [[CR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[CR_RELOAD_ADDR]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP7]], 16 +; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP11]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP12]], i32 0 +; CHECK-NEXT: store i32 [[INC_LOOP]], ptr addrspace(5) [[TMP13]], align 4 +; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP7]], 12 +; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP14]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP15]], i32 0 +; CHECK-NEXT: [[CR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP16]], align 4 ; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[CR_RELOAD]] to ptr -; CHECK-NEXT: [[TMP6:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_RELOAD]], i32 2, {} poison, i32 poison, i32 [[TMP6]], i32 [[INC_LOOP]]), !continuation.returnedRegistercount [[META3]] +; CHECK-NEXT: [[TMP6:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.0) +; CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_RELOAD]], i32 2, i32 [[TMP28]], i32 [[TMP6]], i32 [[INC_LOOP]]), !continuation.returnedRegistercount [[META4]] ; CHECK-NEXT: unreachable ; CHECK: end: -; CHECK-NEXT: [[ARG2_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 2 -; CHECK-NEXT: [[ARG2_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG2_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[T2:%.*]] = fmul float [[TMP3]], [[ARG_RELOAD]] +; CHECK-NEXT: [[TMP17:%.*]] = add i32 [[TMP7]], 8 +; CHECK-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP17]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP29]], i32 0 +; CHECK-NEXT: [[ARG2_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP19]], align 4 +; CHECK-NEXT: [[TMP20:%.*]] = add i32 [[TMP7]], 4 +; CHECK-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP20]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP21]], i32 0 +; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP22]], align 4 +; CHECK-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP23]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP24]], align 4 +; CHECK-NEXT: [[T2:%.*]] = fmul float [[RES1]], [[ARG_RELOAD]] ; CHECK-NEXT: [[RETURNVALUE:%.*]] = fadd float [[T2]], [[ARG2_RELOAD]] -; CHECK-NEXT: call void @lgc.cps.free(i32 20) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP26:%.*]] = add i32 [[TMP25]], -20 +; CHECK-NEXT: store i32 [[TMP26]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, i32 [[TMP27]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; diff --git a/llvmraytracing/test/lgccps/call-shader-i1-payload.ll b/llvmraytracing/test/lgccps/call-shader-i1-payload.ll index fed10f8292..153909409a 100644 --- a/llvmraytracing/test/lgccps/call-shader-i1-payload.ll +++ b/llvmraytracing/test/lgccps/call-shader-i1-payload.ll @@ -15,10 +15,7 @@ declare !pointeetys !8 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, float %t, i32 %hitKind) ; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitTraversal(i64, %struct.TraversalData) #0 - -; Function Attrs: alwaysinline -declare %struct.DispatchSystemData @_AmdAwaitShader(i64, %struct.DispatchSystemData) #0 +declare %struct.DispatchSystemData @_AmdAwaitShader(i32, %struct.DispatchSystemData) #0 declare !pointeetys !1 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) @@ -30,7 +27,7 @@ define i32 @_cont_GetLocalRootIndex(ptr %data) #0 !pointeetys !1 { ; Function Attrs: alwaysinline define void @_cont_CallShader(ptr %data, i32 %0) #0 !pointeetys !2 { %dis_data = load %struct.DispatchSystemData, ptr %data, align 4 - %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i64 2, %struct.DispatchSystemData %dis_data) + %newdata = call %struct.DispatchSystemData @_AmdAwaitShader(i32 2, %struct.DispatchSystemData %dis_data) store %struct.DispatchSystemData %newdata, ptr %data, align 4 ret void } @@ -64,7 +61,7 @@ attributes #1 = { nounwind willreturn memory(argmem: readwrite, inaccessiblemem: ; ; ; LOWER-RAYTRACING-PIPELINE-LABEL: define void @called( -; LOWER-RAYTRACING-PIPELINE-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [2 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META4:![0-9]+]] !lgc.cps [[META1:![0-9]+]] !continuation [[META5:![0-9]+]] { +; LOWER-RAYTRACING-PIPELINE-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [2 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META4:![0-9]+]] !lgc.cps [[META1:![0-9]+]] !continuation.registercount [[META1]] !continuation [[META5:![0-9]+]] { ; LOWER-RAYTRACING-PIPELINE-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca [[STRUCT_DISPATCHSYSTEMDATA]], align 8 ; LOWER-RAYTRACING-PIPELINE-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [2 x i32], align 4 ; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP1:%.*]] = alloca [[STRUCT_MYPARAMS:%.*]], align 8 @@ -86,7 +83,7 @@ attributes #1 = { nounwind willreturn memory(argmem: readwrite, inaccessiblemem: ; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP23]], align 4 ; LOWER-RAYTRACING-PIPELINE-NEXT: store i32 [[TMP11]], ptr [[TMP10]], align 4 ; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP12:%.*]] = load [2 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP13:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [8 x i32], [2 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa8i32a2i32s(i32 2, i32 4, i32 5, [9 x i32] poison, [2 x i32] [[TMP12]]), !continuation.returnedRegistercount [[META1]], !continuation.registercount [[META1]] +; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP13:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [8 x i32], [2 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa8i32a2i32s(i32 2, i32 4, i32 5, [9 x i32] poison, [2 x i32] [[TMP12]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP14:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [8 x i32], [2 x i32] } [[TMP13]], 2 ; LOWER-RAYTRACING-PIPELINE-NEXT: store [2 x i32] [[TMP14]], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 ; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP29:%.*]] = freeze [[STRUCT_MYPARAMS]] poison @@ -107,9 +104,9 @@ attributes #1 = { nounwind willreturn memory(argmem: readwrite, inaccessiblemem: ; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP28:%.*]] = getelementptr inbounds i32, ptr [[TMP21]], i32 1 ; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP25:%.*]] = load i32, ptr [[TMP28]], align 4 ; LOWER-RAYTRACING-PIPELINE-NEXT: store i32 [[TMP25]], ptr [[TMP24]], align 4 -; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP26:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 +; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP30:%.*]] = load [[STRUCT_DISPATCHSYSTEMDATA]], ptr [[SYSTEM_DATA_ALLOCA]], align 4 ; LOWER-RAYTRACING-PIPELINE-NEXT: [[TMP27:%.*]] = load [2 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; LOWER-RAYTRACING-PIPELINE-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP26]], [8 x i32] poison, [2 x i32] [[TMP27]]), !continuation.registercount [[META1]] +; LOWER-RAYTRACING-PIPELINE-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP30]], [8 x i32] poison, [2 x i32] [[TMP27]]), !continuation.registercount [[META1]] ; LOWER-RAYTRACING-PIPELINE-NEXT: unreachable ; ; @@ -119,7 +116,7 @@ attributes #1 = { nounwind willreturn memory(argmem: readwrite, inaccessiblemem: ; ; ; SROA-LABEL: define void @called( -; SROA-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [2 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META4:![0-9]+]] !lgc.cps [[META1:![0-9]+]] !continuation [[META5:![0-9]+]] { +; SROA-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], [[STRUCT_DISPATCHSYSTEMDATA:%.*]] [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [8 x i32] [[PADDING:%.*]], [2 x i32] [[PAYLOAD:%.*]]) !lgc.rt.shaderstage [[META4:![0-9]+]] !lgc.cps [[META1:![0-9]+]] !continuation.registercount [[META1]] !continuation [[META5:![0-9]+]] { ; SROA-NEXT: [[DOTSROA_5:%.*]] = alloca i8, align 4 ; SROA-NEXT: [[PAYLOAD_FCA_0_EXTRACT:%.*]] = extractvalue [2 x i32] [[PAYLOAD]], 0 ; SROA-NEXT: [[PAYLOAD_FCA_1_EXTRACT:%.*]] = extractvalue [2 x i32] [[PAYLOAD]], 1 @@ -139,7 +136,7 @@ attributes #1 = { nounwind willreturn memory(argmem: readwrite, inaccessiblemem: ; SROA-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_MASK16:%.*]] = and i32 [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_16_4_INSERT_INSERT22]], -256 ; SROA-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_INSERT17:%.*]] = or i32 [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_MASK16]], [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_EXT15]] ; SROA-NEXT: [[DOTFCA_1_INSERT8:%.*]] = insertvalue [2 x i32] [[DOTFCA_0_INSERT5]], i32 [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_INSERT17]], 1 -; SROA-NEXT: [[TMP1:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [8 x i32], [2 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa8i32a2i32s(i32 2, i32 4, i32 5, [9 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT8]]), !continuation.returnedRegistercount [[META1]], !continuation.registercount [[META1]] +; SROA-NEXT: [[TMP1:%.*]] = call { [[STRUCT_DISPATCHSYSTEMDATA]], [8 x i32], [2 x i32] } (...) @lgc.cps.await__sl_s_struct.DispatchSystemDatasa8i32a2i32s(i32 2, i32 4, i32 5, [9 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT8]]), !continuation.registercount [[META1]], !continuation.returnedRegistercount [[META1]] ; SROA-NEXT: [[TMP2:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [8 x i32], [2 x i32] } [[TMP1]], 2 ; SROA-NEXT: [[DOTFCA_0_EXTRACT:%.*]] = extractvalue [2 x i32] [[TMP2]], 0 ; SROA-NEXT: [[DOTFCA_1_EXTRACT:%.*]] = extractvalue [2 x i32] [[TMP2]], 1 @@ -154,7 +151,7 @@ attributes #1 = { nounwind willreturn memory(argmem: readwrite, inaccessiblemem: ; SROA-NEXT: [[TMP3:%.*]] = extractvalue { [[STRUCT_DISPATCHSYSTEMDATA]], [8 x i32], [2 x i32] } [[TMP1]], 0 ; SROA-NEXT: [[DOTFCA_0_EXTRACT27:%.*]] = extractvalue [[STRUCT_DISPATCHSYSTEMDATA]] [[TMP3]], 0 ; SROA-NEXT: [[DOTSROA_5_0__SROA_5_4_:%.*]] = load i8, ptr [[DOTSROA_5]], align 4 -; SROA-NEXT: [[DOTFCA_0_INSERT26:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT27]], 0 +; SROA-NEXT: [[DOTFCA_0_INSERT38:%.*]] = insertvalue [[STRUCT_DISPATCHSYSTEMDATA]] poison, i32 [[DOTFCA_0_EXTRACT27]], 0 ; SROA-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue [2 x i32] poison, i32 [[DOTFCA_0_EXTRACT]], 0 ; SROA-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_16_4_INSERT_EXT:%.*]] = zext i24 [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_16_4_EXTRACT_TRUNC24]] to i32 ; SROA-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_16_4_INSERT_SHIFT:%.*]] = shl i32 [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_16_4_INSERT_EXT]], 8 @@ -164,6 +161,6 @@ attributes #1 = { nounwind willreturn memory(argmem: readwrite, inaccessiblemem: ; SROA-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_MASK:%.*]] = and i32 [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_16_4_INSERT_INSERT]], -256 ; SROA-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_INSERT:%.*]] = or i32 [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_MASK]], [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_EXT]] ; SROA-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue [2 x i32] [[DOTFCA_0_INSERT]], i32 [[PAYLOAD_SERIALIZATION_ALLOCA_SROA_8_4_INSERT_INSERT]], 1 -; SROA-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, {} poison, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT26]], [8 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT]]), !continuation.registercount [[META1]] +; SROA-NEXT: call void (...) @lgc.cps.jump(i32 [[RETURNADDR]], i32 6, i32 poison, i32 poison, i32 poison, [[STRUCT_DISPATCHSYSTEMDATA]] [[DOTFCA_0_INSERT38]], [8 x i32] poison, [2 x i32] [[DOTFCA_1_INSERT]]), !continuation.registercount [[META1]] ; SROA-NEXT: unreachable ; diff --git a/llvmraytracing/test/lgccps/cleanup-store-loads.ll b/llvmraytracing/test/lgccps/cleanup-store-loads.ll index ade1a8367f..6f7ee9702e 100644 --- a/llvmraytracing/test/lgccps/cleanup-store-loads.ll +++ b/llvmraytracing/test/lgccps/cleanup-store-loads.ll @@ -159,28 +159,27 @@ bb2: ; preds = %entry ; Multiple loads can be optimized away call void @loadAtOffsetI32(ptr %data, i32 48) - call void (...) @lgc.cps.jump(i32 %rcr.reload, i32 2, {} poison, i32 poison, i32 poison, float %returnvalue) + call void (...) @lgc.cps.jump(i32 %rcr.reload, i32 2, i32 poison, i32 poison, float %returnvalue) unreachable } define internal { ptr, ptr } @test.resume.0(ptr noalias noundef nonnull align 4 dereferenceable(8) %0, i1 %1) !lgc.cps !0 !continuation !1 { entryresume.0: %2 = load ptr, ptr %0, align 8 - %3 = call float @lgc.ilcps.getReturnValue__f32() + %3 = call { float } @lgc.ilcps.getReturnValue__f32() + %res = extractvalue { float } %3, 0 %arg.reload.addr = getelementptr inbounds %test.Frame, ptr %2, i32 0, i32 1 %arg.reload = load float, ptr %arg.reload.addr, align 4 %rcr.reload.addr = getelementptr inbounds %test.Frame, ptr %2, i32 0, i32 0 %rcr.reload = load i32, ptr %rcr.reload.addr, align 4 - %returnvalue = fmul float %3, %arg.reload - call void (...) @lgc.cps.jump(i32 %rcr.reload, i32 2, {} poison, i32 poison, i32 poison, float %returnvalue) + %returnvalue = fmul float %res, %arg.reload + call void (...) @lgc.cps.jump(i32 %rcr.reload, i32 2, i32 poison, i32 poison, float %returnvalue) unreachable } ; Function Attrs: memory(none) declare i32 @lgc.cps.as.continuation.reference(...) #0 -declare float @lgc.cps.await__f32(...) - declare void @lgc.cps.jump(...) declare !continuation !1 { ptr, ptr } @continuation.prototype.test(ptr, i1) @@ -199,7 +198,7 @@ declare ptr @llvm.coro.begin(token, ptr writeonly) #1 declare i1 @llvm.coro.suspend.retcon.i1(...) #1 ; Function Attrs: nounwind willreturn -declare float @lgc.ilcps.getReturnValue__f32() #2 +declare { float } @lgc.ilcps.getReturnValue__f32() #2 ; Function Attrs: noreturn declare void @continuation.return(...) #3 @@ -210,8 +209,11 @@ attributes #2 = { nounwind willreturn } attributes #3 = { noreturn } attributes #4 = { alwaysinline } +!continuation.stackAddrspace = !{!2} + !0 = !{i32 1} !1 = !{ptr @test} +!2 = !{i32 5} ; CHECK-LABEL: define void @storeToOffsetI32( ; CHECK-SAME: ptr [[DATA:%.*]], i32 [[OFFSET:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: [[VAL:%.*]] = call i32 @getVal32() @@ -261,107 +263,171 @@ attributes #4 = { alwaysinline } ; ; ; CHECK-LABEL: define void @test( -; CHECK-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]]) !lgc.cps [[META0:![0-9]+]] !continuation [[META1:![0-9]+]] !continuation.stacksize [[META2:![0-9]+]] !continuation.state [[META2]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]]) !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 408) -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: store float [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[RCR_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(32) [[RCR_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[TMP51:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[TMP51]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP51]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 408 +; CHECK-NEXT: store i32 [[TMP3]], ptr [[TMP51]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], 4 +; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP7]], i32 0 +; CHECK-NEXT: store float [[ARG]], ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(5) [[TMP8]], align 4 ; CHECK-NEXT: [[T0:%.*]] = fadd float [[ARG]], 1.000000e+00 ; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee) ; CHECK-NEXT: [[COND:%.*]] = fcmp olt float [[T0]], 1.000000e+00 -; CHECK-NEXT: [[DATA:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 +; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP2]], 8 ; CHECK-NEXT: [[VAL_I:%.*]] = call i32 @getVal32() -; CHECK-NEXT: store i32 [[VAL_I]], ptr addrspace(32) [[DATA]], align 2 +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP9]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP10]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I]], ptr addrspace(5) [[TMP11]], align 2 ; CHECK-NEXT: [[VAL_I1:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 4 -; CHECK-NEXT: store i32 [[VAL_I1]], ptr addrspace(32) [[ADDR_I]], align 2 +; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP9]], 4 +; CHECK-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP12]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP13]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I1]], ptr addrspace(5) [[TMP14]], align 2 ; CHECK-NEXT: [[VAL_I2:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I3:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 4 -; CHECK-NEXT: store i32 [[VAL_I2]], ptr addrspace(32) [[ADDR_I3]], align 2 +; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP9]], 4 +; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP15]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP16]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I2]], ptr addrspace(5) [[TMP17]], align 2 ; CHECK-NEXT: [[VAL_I4:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I5:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 10 -; CHECK-NEXT: store i32 [[VAL_I4]], ptr addrspace(32) [[ADDR_I5]], align 2 +; CHECK-NEXT: [[TMP18:%.*]] = add i32 [[TMP9]], 10 +; CHECK-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP18]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP19]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I4]], ptr addrspace(5) [[TMP20]], align 2 ; CHECK-NEXT: [[VAL_I6:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I7:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 12 -; CHECK-NEXT: store i32 [[VAL_I6]], ptr addrspace(32) [[ADDR_I7]], align 2 +; CHECK-NEXT: [[TMP21:%.*]] = add i32 [[TMP9]], 12 +; CHECK-NEXT: [[TMP22:%.*]] = inttoptr i32 [[TMP21]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP22]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I6]], ptr addrspace(5) [[TMP23]], align 2 ; CHECK-NEXT: [[VAL_I8:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I9:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 16 -; CHECK-NEXT: store i32 [[VAL_I8]], ptr addrspace(32) [[ADDR_I9]], align 2 +; CHECK-NEXT: [[TMP24:%.*]] = add i32 [[TMP9]], 16 +; CHECK-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP24]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP25]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I8]], ptr addrspace(5) [[TMP26]], align 2 ; CHECK-NEXT: [[VAL_I10:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I11:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 18 -; CHECK-NEXT: store i32 [[VAL_I10]], ptr addrspace(32) [[ADDR_I11]], align 2 +; CHECK-NEXT: [[TMP27:%.*]] = add i32 [[TMP9]], 18 +; CHECK-NEXT: [[TMP28:%.*]] = inttoptr i32 [[TMP27]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP28]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I10]], ptr addrspace(5) [[TMP29]], align 2 ; CHECK-NEXT: [[VAL_I12:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I13:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 24 -; CHECK-NEXT: store i32 [[VAL_I12]], ptr addrspace(32) [[ADDR_I13]], align 2 +; CHECK-NEXT: [[TMP30:%.*]] = add i32 [[TMP9]], 24 +; CHECK-NEXT: [[TMP31:%.*]] = inttoptr i32 [[TMP30]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP31]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I12]], ptr addrspace(5) [[TMP32]], align 2 ; CHECK-NEXT: [[VAL_I14:%.*]] = call i8 @getVal8() -; CHECK-NEXT: [[ADDR_I15:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 25 -; CHECK-NEXT: store i8 [[VAL_I14]], ptr addrspace(32) [[ADDR_I15]], align 1 +; CHECK-NEXT: [[TMP33:%.*]] = add i32 [[TMP9]], 25 +; CHECK-NEXT: [[TMP34:%.*]] = inttoptr i32 [[TMP33]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP34]], i32 0 +; CHECK-NEXT: store i8 [[VAL_I14]], ptr addrspace(5) [[TMP35]], align 1 ; CHECK-NEXT: [[VAL_I16:%.*]] = call i64 @getVal64() -; CHECK-NEXT: [[ADDR_I17:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 28 -; CHECK-NEXT: store i64 [[VAL_I16]], ptr addrspace(32) [[ADDR_I17]], align 4 +; CHECK-NEXT: [[TMP36:%.*]] = add i32 [[TMP9]], 28 +; CHECK-NEXT: [[TMP37:%.*]] = inttoptr i32 [[TMP36]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP37]], i32 0 +; CHECK-NEXT: store i64 [[VAL_I16]], ptr addrspace(5) [[TMP38]], align 4 ; CHECK-NEXT: [[VAL_I18:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I19:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 36 -; CHECK-NEXT: store i32 [[VAL_I18]], ptr addrspace(32) [[ADDR_I19]], align 2 -; CHECK-NEXT: [[ADDR_I20:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 40 -; CHECK-NEXT: [[VAL_RELOAD_I:%.*]] = load i32, ptr addrspace(32) [[ADDR_I20]], align 4 +; CHECK-NEXT: [[TMP39:%.*]] = add i32 [[TMP9]], 36 +; CHECK-NEXT: [[TMP40:%.*]] = inttoptr i32 [[TMP39]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP41:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP40]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I18]], ptr addrspace(5) [[TMP41]], align 2 +; CHECK-NEXT: [[TMP42:%.*]] = add i32 [[TMP9]], 40 +; CHECK-NEXT: [[TMP43:%.*]] = inttoptr i32 [[TMP42]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP44:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP43]], i32 0 +; CHECK-NEXT: [[VAL_RELOAD_I:%.*]] = load i32, ptr addrspace(5) [[TMP44]], align 4 ; CHECK-NEXT: call void @useVal32(i32 [[VAL_RELOAD_I]]) ; CHECK-NEXT: [[VAL_I21:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I22:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 44 -; CHECK-NEXT: store i32 [[VAL_I21]], ptr addrspace(32) [[ADDR_I22]], align 2 +; CHECK-NEXT: [[TMP45:%.*]] = add i32 [[TMP9]], 44 +; CHECK-NEXT: [[TMP46:%.*]] = inttoptr i32 [[TMP45]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP47:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP46]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I21]], ptr addrspace(5) [[TMP47]], align 2 ; CHECK-NEXT: [[VAL_I23:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I24:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 48 -; CHECK-NEXT: store i32 [[VAL_I23]], ptr addrspace(32) [[ADDR_I24]], align 2 +; CHECK-NEXT: [[TMP48:%.*]] = add i32 [[TMP9]], 48 +; CHECK-NEXT: [[TMP49:%.*]] = inttoptr i32 [[TMP48]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP50:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP49]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I23]], ptr addrspace(5) [[TMP50]], align 2 ; CHECK-NEXT: br i1 [[COND]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK: bb1: ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, {} poison, i32 poison, i32 [[TMP1]], float [[ARG]]), !continuation.returnedRegistercount [[META3:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.0) +; CHECK-NEXT: [[TMP52:%.*]] = load i32, ptr [[TMP51]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP52]], i32 [[TMP1]], float [[ARG]]), !continuation.returnedRegistercount [[META4:![0-9]+]] ; CHECK-NEXT: unreachable ; CHECK: bb2: ; CHECK-NEXT: [[T0_BB2:%.*]] = phi float [ [[T0]], [[ENTRY:%.*]] ] ; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[T0_BB2]], [[ARG]] ; CHECK-NEXT: call void @useVal32(i32 [[VAL_I]]) -; CHECK-NEXT: [[ADDR_I26:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 4 -; CHECK-NEXT: [[VAL_RELOAD_I27:%.*]] = load i32, ptr addrspace(32) [[ADDR_I26]], align 4 +; CHECK-NEXT: [[TMP55:%.*]] = add i32 [[TMP9]], 4 +; CHECK-NEXT: [[TMP53:%.*]] = inttoptr i32 [[TMP55]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP57:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP53]], i32 0 +; CHECK-NEXT: [[VAL_RELOAD_I27:%.*]] = load i32, ptr addrspace(5) [[TMP57]], align 4 ; CHECK-NEXT: call void @useVal32(i32 [[VAL_RELOAD_I27]]) -; CHECK-NEXT: [[ADDR_I28:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 12 -; CHECK-NEXT: [[VAL_RELOAD_I29:%.*]] = load i32, ptr addrspace(32) [[ADDR_I28]], align 4 +; CHECK-NEXT: [[TMP58:%.*]] = add i32 [[TMP9]], 12 +; CHECK-NEXT: [[TMP56:%.*]] = inttoptr i32 [[TMP58]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP60:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP56]], i32 0 +; CHECK-NEXT: [[VAL_RELOAD_I29:%.*]] = load i32, ptr addrspace(5) [[TMP60]], align 4 ; CHECK-NEXT: call void @useVal32(i32 [[VAL_RELOAD_I29]]) -; CHECK-NEXT: [[ADDR_I30:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 16 -; CHECK-NEXT: [[VAL_RELOAD_I31:%.*]] = load i32, ptr addrspace(32) [[ADDR_I30]], align 4 +; CHECK-NEXT: [[TMP61:%.*]] = add i32 [[TMP9]], 16 +; CHECK-NEXT: [[TMP59:%.*]] = inttoptr i32 [[TMP61]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP63:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP59]], i32 0 +; CHECK-NEXT: [[VAL_RELOAD_I31:%.*]] = load i32, ptr addrspace(5) [[TMP63]], align 4 ; CHECK-NEXT: call void @useVal32(i32 [[VAL_RELOAD_I31]]) -; CHECK-NEXT: [[ADDR_I32:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 24 -; CHECK-NEXT: [[VAL_RELOAD_I33:%.*]] = load i32, ptr addrspace(32) [[ADDR_I32]], align 4 +; CHECK-NEXT: [[TMP64:%.*]] = add i32 [[TMP9]], 24 +; CHECK-NEXT: [[TMP62:%.*]] = inttoptr i32 [[TMP64]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP66:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP62]], i32 0 +; CHECK-NEXT: [[VAL_RELOAD_I33:%.*]] = load i32, ptr addrspace(5) [[TMP66]], align 4 ; CHECK-NEXT: call void @useVal32(i32 [[VAL_RELOAD_I33]]) -; CHECK-NEXT: [[ADDR_I34:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 32 -; CHECK-NEXT: [[VAL_RELOAD_I35:%.*]] = load i32, ptr addrspace(32) [[ADDR_I34]], align 4 +; CHECK-NEXT: [[TMP67:%.*]] = add i32 [[TMP9]], 32 +; CHECK-NEXT: [[TMP65:%.*]] = inttoptr i32 [[TMP67]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP69:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP65]], i32 0 +; CHECK-NEXT: [[VAL_RELOAD_I35:%.*]] = load i32, ptr addrspace(5) [[TMP69]], align 4 ; CHECK-NEXT: call void @useVal32(i32 [[VAL_RELOAD_I35]]) -; CHECK-NEXT: [[ADDR_I36:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 36 -; CHECK-NEXT: [[VAL_RELOAD_I37:%.*]] = load float, ptr addrspace(32) [[ADDR_I36]], align 4 +; CHECK-NEXT: [[TMP70:%.*]] = add i32 [[TMP9]], 36 +; CHECK-NEXT: [[TMP68:%.*]] = inttoptr i32 [[TMP70]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP72:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP68]], i32 0 +; CHECK-NEXT: [[VAL_RELOAD_I37:%.*]] = load float, ptr addrspace(5) [[TMP72]], align 4 ; CHECK-NEXT: call void @useValF32(float [[VAL_RELOAD_I37]]) ; CHECK-NEXT: [[VAL_I38:%.*]] = call i32 @getVal32() -; CHECK-NEXT: [[ADDR_I39:%.*]] = getelementptr i8, ptr addrspace(32) [[DATA]], i32 40 -; CHECK-NEXT: store i32 [[VAL_I38]], ptr addrspace(32) [[ADDR_I39]], align 2 +; CHECK-NEXT: [[TMP73:%.*]] = add i32 [[TMP9]], 40 +; CHECK-NEXT: [[TMP71:%.*]] = inttoptr i32 [[TMP73]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP75:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP71]], i32 0 +; CHECK-NEXT: store i32 [[VAL_I38]], ptr addrspace(5) [[TMP75]], align 2 ; CHECK-NEXT: call void @useVal32(i32 [[VAL_I21]]) ; CHECK-NEXT: call void @useVal32(i32 [[VAL_I23]]) ; CHECK-NEXT: call void @useVal32(i32 [[VAL_I23]]) -; CHECK-NEXT: call void @lgc.cps.free(i32 408) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[TMP76:%.*]] = load i32, ptr [[TMP51]], align 4 +; CHECK-NEXT: [[TMP74:%.*]] = add i32 [[TMP76]], -408 +; CHECK-NEXT: store i32 [[TMP74]], ptr [[TMP51]], align 4 +; CHECK-NEXT: [[TMP77:%.*]] = load i32, ptr [[TMP51]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR]], i32 2, i32 [[TMP77]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.0( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 408) -; CHECK-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[TMP3]], [[ARG_RELOAD]] -; CHECK-NEXT: call void @lgc.cps.free(i32 408) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -408 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[RES:%.*]] = extractvalue { float } [[TMP13]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 4 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP6]], i32 0 +; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP7]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[RES]], [[ARG_RELOAD]] +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], -408 +; CHECK-NEXT: store i32 [[TMP11]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, i32 [[TMP12]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; diff --git a/llvmraytracing/test/lgccps/cps-no-await.ll b/llvmraytracing/test/lgccps/cps-no-await.ll index f0bd4ee520..e1862dfb4a 100644 --- a/llvmraytracing/test/lgccps/cps-no-await.ll +++ b/llvmraytracing/test/lgccps/cps-no-await.ll @@ -5,7 +5,7 @@ define void @_cont_Traversal() !lgc.cps !{i32 2} !continuation !{ptr @_cont_Trav %pushconst = call ptr addrspace(4) @lgc.user.data(i32 32) %fn = load ptr, ptr addrspace(4) %pushconst %cr = ptrtoint ptr %fn to i32 - call void (...) @lgc.cps.jump(i32 %cr, i32 2, {} poison, i32 poison) + call void (...) @lgc.cps.jump(i32 %cr, i32 2, i32 poison) unreachable } @@ -20,6 +20,6 @@ declare void @lgc.cps.jump(...) ; LOWER-AWAIT-NEXT: [[PUSHCONST:%.*]] = call ptr addrspace(4) @lgc.user.data(i32 32) ; LOWER-AWAIT-NEXT: [[FN:%.*]] = load ptr, ptr addrspace(4) [[PUSHCONST]], align 8 ; LOWER-AWAIT-NEXT: [[CR:%.*]] = ptrtoint ptr [[FN]] to i32 -; LOWER-AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, {} poison, i32 poison) +; LOWER-AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 poison) ; LOWER-AWAIT-NEXT: unreachable ; diff --git a/llvmraytracing/test/lgccps/entry-point-with-cps.ll b/llvmraytracing/test/lgccps/entry-point-with-cps.ll index 9be2242ee7..9648ddfc11 100644 --- a/llvmraytracing/test/lgccps/entry-point-with-cps.ll +++ b/llvmraytracing/test/lgccps/entry-point-with-cps.ll @@ -25,9 +25,10 @@ define spir_func void @raygen({} %state, i32 %rcr) !lgc.shaderstage !{i32 7} !lg %cr.0 = ptrtoint ptr %fn to i32 %cr.1 = or i32 %cr.0, 2 - %r = call [2 x i32] (...) @lgc.cps.await__a2i32(i32 %cr.1, i32 4, i32 %x, ptr addrspace(1) %dst), !continuation.returnedRegistercount !{i32 0} + %r = call { [2 x i32] } (...) @lgc.cps.await__a2i32(i32 %cr.1, i32 4, i32 %x, ptr addrspace(1) %dst), !continuation.returnedRegistercount !{i32 0} + %res = extractvalue { [2 x i32] } %r, 0 - store [2 x i32] %r, ptr addrspace(1) %dst + store [2 x i32] %res, ptr addrspace(1) %dst ; Note: RGS returns, meaning end of thread. call void @lgc.cps.complete() @@ -40,9 +41,10 @@ define spir_func void @chs({} %state, i32 %rcr, i32 %x) !lgc.shaderstage !{i32 7 %cr.0 = ptrtoint ptr %fn to i32 %cr.1 = or i32 %cr.0, 1 - %y = call i32 (...) @lgc.cps.await__i32(i32 %cr.1, i32 2, i32 %x), !continuation.returnedRegistercount !{i32 0} + %y = call { i32 } (...) @lgc.cps.await__i32(i32 %cr.1, i32 2, i32 %x), !continuation.returnedRegistercount !{i32 0} + %res = extractvalue { i32 } %y, 0 - call void (...) @lgc.cps.jump(i32 %rcr, i32 5, i32 %y, i32 poison, i32 poison) + call void (...) @lgc.cps.jump(i32 %rcr, i32 5, i32 %res, i32 poison, i32 poison) unreachable } @@ -58,7 +60,7 @@ main: %fn = load ptr, ptr addrspace(4) %pushconst %cr.0 = ptrtoint ptr %fn to i32 - call void (...) @lgc.cps.jump(i32 %cr.0, i32 1, i32 5) + call void (...) @lgc.cps.jump(i32 %cr.0, i32 1, i32 5, i32 poison, i32 poison) br label %exit @@ -71,18 +73,25 @@ exit: declare ptr addrspace(4) @lgc.user.data(i32) declare <3 x i32> @lgc.shader.input.LocalInvocationId(i32) declare void @lgc.cps.await__isVoid(...) -declare i32 @lgc.cps.await__i32(...) -declare [2 x i32] @lgc.cps.await__a2i32(...) +declare { i32 } @lgc.cps.await__i32(...) +declare { [2 x i32] } @lgc.cps.await__a2i32(...) declare void @lgc.cps.jump(...) +!continuation.stackAddrspace = !{!0} + +!0 = !{i32 5} + ; CHECK-LABEL: define void @_cont_KernelEntry( -; CHECK-SAME: ) !lgc.rt.shaderstage [[META0:![0-9]+]] { +; CHECK-SAME: ) !lgc.rt.shaderstage [[META1:![0-9]+]] { +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 ; CHECK-NEXT: ret void ; ; ; CHECK-LABEL: define spir_func void @raygen( -; CHECK-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]]) !lgc.shaderstage [[META0]] !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.state [[META1]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]]) !lgc.shaderstage [[META1]] !lgc.cps [[META2:![0-9]+]] !continuation [[META3:![0-9]+]] !continuation.state [[META2]] { ; CHECK-NEXT: AllocaSpillBB: +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 ; CHECK-NEXT: [[PUSHCONST:%.*]] = call ptr addrspace(4) @lgc.user.data(i32 0) ; CHECK-NEXT: [[FN:%.*]] = load ptr, ptr addrspace(4) [[PUSHCONST]], align 8 ; CHECK-NEXT: [[P8:%.*]] = getelementptr i8, ptr addrspace(4) [[PUSHCONST]], i32 8 @@ -92,51 +101,72 @@ declare void @lgc.cps.jump(...) ; CHECK-NEXT: [[CR_0:%.*]] = ptrtoint ptr [[FN]] to i32 ; CHECK-NEXT: [[CR_1:%.*]] = or i32 [[CR_0]], 2 ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR_1]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @raygen.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_1]], i32 4, {} poison, i32 poison, i32 [[TMP1]], i32 [[X]], ptr addrspace(1) [[DST]]), !continuation.returnedRegistercount [[META1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @raygen.resume.0) +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_1]], i32 4, i32 [[TMP2]], i32 [[TMP1]], i32 [[X]], ptr addrspace(1) [[DST]]), !continuation.returnedRegistercount [[META2]] ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @raygen.resume.0( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], [2 x i32] [[TMP3:%.*]]) !lgc.shaderstage [[META0]] !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META1]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], [2 x i32] [[TMP2:%.*]]) !lgc.shaderstage [[META1]] !lgc.cps [[META2]] !continuation [[META3]] !continuation.registercount [[META2]] { ; CHECK-NEXT: entryresume.0: +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = insertvalue { [2 x i32] } poison, [2 x i32] [[TMP2]], 0 ; CHECK-NEXT: [[PUSHCONST3:%.*]] = call ptr addrspace(4) @lgc.user.data(i32 0) ; CHECK-NEXT: [[P162:%.*]] = getelementptr i8, ptr addrspace(4) [[PUSHCONST3]], i32 16 ; CHECK-NEXT: [[DST1:%.*]] = load ptr addrspace(1), ptr addrspace(4) [[P162]], align 8 -; CHECK-NEXT: store [2 x i32] [[TMP3]], ptr addrspace(1) [[DST1]], align 4 +; CHECK-NEXT: [[RES1:%.*]] = extractvalue { [2 x i32] } [[TMP3]], 0 +; CHECK-NEXT: store [2 x i32] [[RES1]], ptr addrspace(1) [[DST1]], align 4 ; CHECK-NEXT: ret void ; ; ; CHECK-LABEL: define spir_func void @chs( -; CHECK-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], i32 [[X:%.*]]) !lgc.shaderstage [[META0]] !lgc.cps [[META3:![0-9]+]] !continuation [[META4:![0-9]+]] !continuation.stacksize [[META5:![0-9]+]] !continuation.state [[META5]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]], i32 [[X:%.*]]) !lgc.shaderstage [[META1]] !lgc.cps [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] !continuation.stacksize [[META6:![0-9]+]] !continuation.state [[META6]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CHECK-NEXT: [[RCR_SPILL_ADDR:%.*]] = getelementptr inbounds [[CHS_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(32) [[RCR_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 8 +; CHECK-NEXT: store i32 [[TMP3]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP4]], i32 0 +; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(5) [[TMP5]], align 4 ; CHECK-NEXT: [[PUSHCONST:%.*]] = call ptr addrspace(4) @lgc.user.data(i32 24) ; CHECK-NEXT: [[FN:%.*]] = load ptr, ptr addrspace(4) [[PUSHCONST]], align 8 ; CHECK-NEXT: [[CR_0:%.*]] = ptrtoint ptr [[FN]] to i32 ; CHECK-NEXT: [[CR_1:%.*]] = or i32 [[CR_0]], 1 ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR_1]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @chs.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_1]], i32 2, {} poison, i32 poison, i32 [[TMP1]], i32 [[X]]), !continuation.returnedRegistercount [[META1]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @chs.resume.0) +; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_1]], i32 2, i32 [[TMP6]], i32 [[TMP1]], i32 [[X]]), !continuation.returnedRegistercount [[META2]] ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @chs.resume.0( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], i32 [[TMP3:%.*]]) !lgc.shaderstage [[META0]] !lgc.cps [[META3]] !continuation [[META4]] !continuation.registercount [[META1]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]]) !lgc.shaderstage [[META1]] !lgc.cps [[META4]] !continuation [[META5]] !continuation.registercount [[META2]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[CHS_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 5, i32 [[TMP3]], i32 poison, i32 poison) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -8 +; CHECK-NEXT: [[TMP10:%.*]] = insertvalue { i32 } poison, i32 [[TMP2]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[RES:%.*]] = extractvalue { i32 } [[TMP10]], 0 +; CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], -8 +; CHECK-NEXT: store i32 [[TMP8]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 5, i32 [[TMP9]], i32 poison, i32 poison) ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dllexport void @lgc.shader.CS.main( -; CHECK-SAME: ) !lgc.rt.shaderstage [[META0]] !lgc.shaderstage [[META0]] { +; CHECK-SAME: ) !lgc.rt.shaderstage [[META1]] !lgc.shaderstage [[META1]] { ; CHECK-NEXT: entry: +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[ID:%.*]] = call <3 x i32> @lgc.shader.input.LocalInvocationId(i32 0) ; CHECK-NEXT: [[ID0:%.*]] = extractelement <3 x i32> [[ID]], i32 0 ; CHECK-NEXT: [[LIVE:%.*]] = icmp ult i32 [[ID0]], 29 @@ -145,20 +175,21 @@ declare void @lgc.cps.jump(...) ; CHECK-NEXT: [[PUSHCONST:%.*]] = call ptr addrspace(4) @lgc.user.data(i32 32) ; CHECK-NEXT: [[FN:%.*]] = load ptr, ptr addrspace(4) [[PUSHCONST]], align 8 ; CHECK-NEXT: [[CR_0:%.*]] = ptrtoint ptr [[FN]] to i32 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_0]], i32 1, i32 5) +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_0]], i32 1, i32 [[TMP3]], i32 poison, i32 poison) ; CHECK-NEXT: br label [[EXIT]] ; CHECK: exit: ; CHECK-NEXT: ret void ; ; ; LOWER-AWAIT-LABEL: define void @_cont_KernelEntry( -; LOWER-AWAIT-SAME: ) !lgc.rt.shaderstage [[META0:![0-9]+]] { +; LOWER-AWAIT-SAME: ) !lgc.rt.shaderstage [[META1:![0-9]+]] { ; LOWER-AWAIT-NEXT: call void @lgc.cps.complete() ; LOWER-AWAIT-NEXT: unreachable ; ; ; LOWER-AWAIT-LABEL: define spir_func { ptr, ptr } @raygen( -; LOWER-AWAIT-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], ptr [[TMP0:%.*]]) !lgc.shaderstage [[META0]] !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] { +; LOWER-AWAIT-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], ptr [[TMP0:%.*]]) !lgc.shaderstage [[META1]] !lgc.cps [[META2:![0-9]+]] !continuation [[META3:![0-9]+]] { ; LOWER-AWAIT-NEXT: [[TMP2:%.*]] = call token @llvm.coro.id.retcon(i32 8, i32 4, ptr [[TMP0]], ptr @continuation.prototype.raygen, ptr @continuation.malloc, ptr @continuation.free) ; LOWER-AWAIT-NEXT: [[TMP3:%.*]] = call ptr @llvm.coro.begin(token [[TMP2]], ptr null) ; LOWER-AWAIT-NEXT: [[PUSHCONST:%.*]] = call ptr addrspace(4) @lgc.user.data(i32 0) @@ -170,16 +201,17 @@ declare void @lgc.cps.jump(...) ; LOWER-AWAIT-NEXT: [[CR_0:%.*]] = ptrtoint ptr [[FN]] to i32 ; LOWER-AWAIT-NEXT: [[CR_1:%.*]] = or i32 [[CR_0]], 2 ; LOWER-AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i32 [[CR_1]] to ptr -; LOWER-AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CR_1]], i32 4, i32 [[X]], ptr addrspace(1) [[DST]]), !continuation.returnedRegistercount [[META1]] +; LOWER-AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CR_1]], i32 4, i32 [[X]], ptr addrspace(1) [[DST]]), !continuation.returnedRegistercount [[META2]] ; LOWER-AWAIT-NEXT: [[TMP6:%.*]] = call i1 (...) @llvm.coro.suspend.retcon.i1(ptr [[TMP5]]) -; LOWER-AWAIT-NEXT: [[TMP7:%.*]] = call [2 x i32] @lgc.ilcps.getReturnValue__a2i32() +; LOWER-AWAIT-NEXT: [[TMP8:%.*]] = call { [2 x i32] } @lgc.ilcps.getReturnValue__sl_a2i32s() +; LOWER-AWAIT-NEXT: [[TMP7:%.*]] = extractvalue { [2 x i32] } [[TMP8]], 0 ; LOWER-AWAIT-NEXT: store [2 x i32] [[TMP7]], ptr addrspace(1) [[DST]], align 4 ; LOWER-AWAIT-NEXT: call void @lgc.cps.complete() ; LOWER-AWAIT-NEXT: unreachable ; ; ; LOWER-AWAIT-LABEL: define spir_func { ptr, ptr } @chs( -; LOWER-AWAIT-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], i32 [[X:%.*]], ptr [[TMP0:%.*]]) !lgc.shaderstage [[META0]] !lgc.cps [[META3:![0-9]+]] !continuation [[META4:![0-9]+]] { +; LOWER-AWAIT-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], i32 [[X:%.*]], ptr [[TMP0:%.*]]) !lgc.shaderstage [[META1]] !lgc.cps [[META4:![0-9]+]] !continuation [[META5:![0-9]+]] { ; LOWER-AWAIT-NEXT: [[TMP2:%.*]] = call token @llvm.coro.id.retcon(i32 8, i32 4, ptr [[TMP0]], ptr @continuation.prototype.chs, ptr @continuation.malloc, ptr @continuation.free) ; LOWER-AWAIT-NEXT: [[TMP3:%.*]] = call ptr @llvm.coro.begin(token [[TMP2]], ptr null) ; LOWER-AWAIT-NEXT: [[PUSHCONST:%.*]] = call ptr addrspace(4) @lgc.user.data(i32 24) @@ -187,15 +219,16 @@ declare void @lgc.cps.jump(...) ; LOWER-AWAIT-NEXT: [[CR_0:%.*]] = ptrtoint ptr [[FN]] to i32 ; LOWER-AWAIT-NEXT: [[CR_1:%.*]] = or i32 [[CR_0]], 1 ; LOWER-AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i32 [[CR_1]] to ptr -; LOWER-AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CR_1]], i32 2, i32 [[X]]), !continuation.returnedRegistercount [[META1]] +; LOWER-AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CR_1]], i32 2, i32 [[X]]), !continuation.returnedRegistercount [[META2]] ; LOWER-AWAIT-NEXT: [[TMP6:%.*]] = call i1 (...) @llvm.coro.suspend.retcon.i1(ptr [[TMP5]]) -; LOWER-AWAIT-NEXT: [[TMP7:%.*]] = call i32 @lgc.ilcps.getReturnValue__i32() +; LOWER-AWAIT-NEXT: [[TMP8:%.*]] = call { i32 } @lgc.ilcps.getReturnValue__sl_i32s() +; LOWER-AWAIT-NEXT: [[TMP7:%.*]] = extractvalue { i32 } [[TMP8]], 0 ; LOWER-AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR]], i32 5, i32 [[TMP7]], i32 poison, i32 poison) ; LOWER-AWAIT-NEXT: unreachable ; ; ; LOWER-AWAIT-LABEL: define dllexport void @lgc.shader.CS.main( -; LOWER-AWAIT-SAME: ) !lgc.rt.shaderstage [[META0]] !lgc.shaderstage [[META0]] { +; LOWER-AWAIT-SAME: ) !lgc.rt.shaderstage [[META1]] !lgc.shaderstage [[META1]] { ; LOWER-AWAIT-NEXT: entry: ; LOWER-AWAIT-NEXT: [[ID:%.*]] = call <3 x i32> @lgc.shader.input.LocalInvocationId(i32 0) ; LOWER-AWAIT-NEXT: [[ID0:%.*]] = extractelement <3 x i32> [[ID]], i32 0 @@ -205,7 +238,7 @@ declare void @lgc.cps.jump(...) ; LOWER-AWAIT-NEXT: [[PUSHCONST:%.*]] = call ptr addrspace(4) @lgc.user.data(i32 32) ; LOWER-AWAIT-NEXT: [[FN:%.*]] = load ptr, ptr addrspace(4) [[PUSHCONST]], align 8 ; LOWER-AWAIT-NEXT: [[CR_0:%.*]] = ptrtoint ptr [[FN]] to i32 -; LOWER-AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_0]], i32 1, i32 5) +; LOWER-AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[CR_0]], i32 1, i32 5, i32 poison, i32 poison) ; LOWER-AWAIT-NEXT: br label [[EXIT]] ; LOWER-AWAIT: exit: ; LOWER-AWAIT-NEXT: call void @lgc.cps.complete() diff --git a/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-get-i32.ll b/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-get-i32.ll index 9cd5333716..e8fbc941c2 100644 --- a/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-get-i32.ll +++ b/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-get-i32.ll @@ -10,14 +10,13 @@ declare !pointeetys !6 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, f declare !pointeetys !10 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) declare !pointeetys !10 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) -declare i64 @_AmdGetCurrentFuncAddr() declare i32 @_AmdContPayloadRegistersGetI32(i32) @debug_global = external global i32 define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @_cont_Traversal(ptr addrspace(5) %0) local_unnamed_addr !lgc.shaderstage !0 !pointeetys !1 !lgc.rt.shaderstage !3 { ; CHECK-LABEL: define dso_local spir_func void @_cont_Traversal( -; CHECK-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { i32 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [41 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META4:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !lgc.cps [[META6:![0-9]+]] !continuation [[META7:![0-9]+]] { +; CHECK-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { i32 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [41 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META3:![0-9]+]] !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !lgc.cps [[META5:![0-9]+]] !continuation [[META6:![0-9]+]] { ; CHECK-NEXT: .entry: ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca { { i32 } }, align 8, addrspace(5) ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 @@ -27,13 +26,13 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ ; CHECK-NEXT: [[VAL:%.*]] = load i32, ptr [[TMP0]], align 4 ; CHECK-NEXT: store i32 [[VAL]], ptr @debug_global, align 4 ; CHECK-NEXT: [[TMP2:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 -1, {} poison, i32 poison, i32 poison, i32 5, [42 x i32] poison, [30 x i32] [[TMP2]]), !continuation.registercount [[META0:![0-9]+]] +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 -1, i32 poison, i32 poison, i32 5, [42 x i32] poison, [30 x i32] [[TMP2]]), !continuation.registercount [[META0]] ; CHECK-NEXT: unreachable ; .entry: %val = call i32 @_AmdContPayloadRegistersGetI32(i32 2) store i32 %val, i32* @debug_global, align 4 - call void (...) @lgc.cps.jump(i32 4, i32 -1, {} poison, i32 poison, i32 poison, i32 5) + call void (...) @lgc.cps.jump(i32 4, i32 -1, i32 poison, i32 poison, i32 5) unreachable } diff --git a/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-i32-count.ll b/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-i32-count.ll index b813925255..603e9670e5 100644 --- a/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-i32-count.ll +++ b/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-i32-count.ll @@ -10,14 +10,13 @@ declare !pointeetys !6 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, f declare !pointeetys !10 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) declare !pointeetys !10 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) -declare i64 @_AmdGetCurrentFuncAddr() declare i32 @_AmdContPayloadRegistersI32Count() @debug_global = external global i32 define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @_cont_Traversal(ptr addrspace(5) %0) local_unnamed_addr !lgc.shaderstage !0 !pointeetys !1 !lgc.rt.shaderstage !3 { ; CHECK-LABEL: define dso_local spir_func void @_cont_Traversal( -; CHECK-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { i32 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [41 x i32] [[PADDING:%.*]], [11 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META4:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !lgc.cps [[META6:![0-9]+]] !continuation [[META7:![0-9]+]] { +; CHECK-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { i32 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [41 x i32] [[PADDING:%.*]], [11 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META4:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.registercount [[META1:![0-9]+]] !lgc.cps [[META6:![0-9]+]] !continuation [[META7:![0-9]+]] { ; CHECK-NEXT: .entry: ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca { { i32 } }, align 8, addrspace(5) ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [11 x i32], align 4 @@ -25,13 +24,13 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ ; CHECK-NEXT: store { { i32 } } [[SYSTEM_DATA]], ptr addrspace(5) [[SYSTEM_DATA_ALLOCA]], align 4 ; CHECK-NEXT: store i32 11, ptr @debug_global, align 4 ; CHECK-NEXT: [[TMP0:%.*]] = load [11 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 -1, {} poison, i32 poison, i32 poison, i32 5, [42 x i32] poison, [11 x i32] [[TMP0]]), !continuation.registercount [[META1:![0-9]+]] +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 -1, i32 poison, i32 poison, i32 5, [42 x i32] poison, [11 x i32] [[TMP0]]), !continuation.registercount [[META1]] ; CHECK-NEXT: unreachable ; .entry: %val = call i32 @_AmdContPayloadRegistersI32Count() store i32 %val, i32* @debug_global, align 4 - call void (...) @lgc.cps.jump(i32 4, i32 -1, {} poison, i32 poison, i32 poison, i32 5) + call void (...) @lgc.cps.jump(i32 4, i32 -1, i32 poison, i32 poison, i32 5) unreachable } diff --git a/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-set-i32.ll b/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-set-i32.ll index 57d1b59bba..cdef1d2c52 100644 --- a/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-set-i32.ll +++ b/llvmraytracing/test/lgccps/intrinsics/cont-payload-registers-set-i32.ll @@ -10,12 +10,11 @@ declare !pointeetys !6 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, f declare !pointeetys !10 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) declare !pointeetys !10 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) -declare i64 @_AmdGetCurrentFuncAddr() declare void @_AmdContPayloadRegistersSetI32(i32, i32) define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @_cont_Traversal(ptr addrspace(5) %0) local_unnamed_addr !lgc.shaderstage !0 !pointeetys !1 !lgc.rt.shaderstage !3 { ; CHECK-LABEL: define dso_local spir_func void @_cont_Traversal( -; CHECK-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { i32 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [41 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META4:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !lgc.cps [[META6:![0-9]+]] !continuation [[META7:![0-9]+]] { +; CHECK-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { i32 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [41 x i32] [[PADDING:%.*]], [30 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META3:![0-9]+]] !lgc.rt.shaderstage [[META4:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !lgc.cps [[META5:![0-9]+]] !continuation [[META6:![0-9]+]] { ; CHECK-NEXT: .entry: ; CHECK-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca { { i32 } }, align 8, addrspace(5) ; CHECK-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [30 x i32], align 4 @@ -24,12 +23,12 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ ; CHECK-NEXT: [[TMP0:%.*]] = getelementptr [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], i32 0, i32 3 ; CHECK-NEXT: store i32 42, ptr [[TMP0]], align 4 ; CHECK-NEXT: [[TMP1:%.*]] = load [30 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 -1, {} poison, i32 poison, i32 poison, i32 5, [42 x i32] poison, [30 x i32] [[TMP1]]), !continuation.registercount [[META0:![0-9]+]] +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 4, i32 -1, i32 poison, i32 poison, i32 5, [42 x i32] poison, [30 x i32] [[TMP1]]), !continuation.registercount [[META0]] ; CHECK-NEXT: unreachable ; .entry: call void @_AmdContPayloadRegistersSetI32(i32 3, i32 42) - call void (...) @lgc.cps.jump(i32 4, i32 -1, {} poison, i32 poison, i32 poison, i32 5) + call void (...) @lgc.cps.jump(i32 4, i32 -1, i32 poison, i32 poison, i32 5) unreachable } diff --git a/llvmraytracing/test/lgccps/lower-traversal.ll b/llvmraytracing/test/lgccps/lower-traversal.ll index 90c214fed8..ac79fb5aed 100644 --- a/llvmraytracing/test/lgccps/lower-traversal.ll +++ b/llvmraytracing/test/lgccps/lower-traversal.ll @@ -12,11 +12,11 @@ declare !pointeetys !6 i1 @_cont_ReportHit(%struct.AnyHitTraversalData* %data, declare !pointeetys !10 <3 x i32> @_cont_DispatchRaysIndex3(%struct.DispatchSystemData*) declare !pointeetys !10 i32 @_cont_GetLocalRootIndex(%struct.DispatchSystemData*) -declare i64 @_AmdGetCurrentFuncAddr() +declare i32 @_AmdGetCurrentFuncAddr() define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @_cont_Traversal(ptr addrspace(5) %0) local_unnamed_addr !lgc.shaderstage !0 !pointeetys !1 !lgc.rt.shaderstage !3 { ; CHECK-ATTRSIZE-16-LABEL: define dso_local spir_func void @_cont_Traversal( -; CHECK-ATTRSIZE-16-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [7 x i32] [[PADDING:%.*]], [8 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META5:![0-9]+]] !lgc.rt.shaderstage [[META6:![0-9]+]] !lgc.cps [[META7:![0-9]+]] !continuation [[META8:![0-9]+]] { +; CHECK-ATTRSIZE-16-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [7 x i32] [[PADDING:%.*]], [8 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META5:![0-9]+]] !lgc.rt.shaderstage [[META6:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !lgc.cps [[META7:![0-9]+]] !continuation [[META8:![0-9]+]] { ; CHECK-ATTRSIZE-16-NEXT: .entry: ; CHECK-ATTRSIZE-16-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } }, align 16, addrspace(5) ; CHECK-ATTRSIZE-16-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [8 x i32], align 4 @@ -124,7 +124,7 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ ; CHECK-ATTRSIZE-16-NEXT: [[DOTFCA_2_7_INSERT:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_6_INSERT]], i32 [[TMP42]], 2, 7 ; CHECK-ATTRSIZE-16-NEXT: [[DOTFCA_2_8_INSERT:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_7_INSERT]], i64 [[TMP44]], 2, 8 ; CHECK-ATTRSIZE-16-NEXT: [[TMP109:%.*]] = load [8 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-ATTRSIZE-16-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0128_0_EXTRACT_TRUNC]], i32 -1, {} poison, i32 [[DOTSROA_0130_0_EXTRACT_TRUNC]], i32 poison, i32 [[DOT0]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_8_INSERT]], [7 x i32] poison, [8 x i32] [[TMP109]]), !continuation.registercount [[META0:![0-9]+]] +; CHECK-ATTRSIZE-16-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0128_0_EXTRACT_TRUNC]], i32 -1, i32 [[DOTSROA_0130_0_EXTRACT_TRUNC]], i32 poison, i32 [[DOT0]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_8_INSERT]], [7 x i32] poison, [8 x i32] [[TMP109]]), !continuation.registercount [[META0]] ; CHECK-ATTRSIZE-16-NEXT: unreachable ; CHECK-ATTRSIZE-16: 68: ; CHECK-ATTRSIZE-16-NEXT: [[TMP68:%.*]] = shl i32 [[DOTFR]], 3 @@ -175,9 +175,7 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ ; CHECK-ATTRSIZE-16-NEXT: [[OR_COND:%.*]] = or i1 [[TMP103]], [[DOTNOT540]] ; CHECK-ATTRSIZE-16-NEXT: br i1 [[OR_COND]], label [[TMP107]], label [[TMP104:%.*]] ; CHECK-ATTRSIZE-16: 105: -; CHECK-ATTRSIZE-16-NEXT: [[TMP105:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @_cont_Traversal) -; CHECK-ATTRSIZE-16-NEXT: [[TMP106:%.*]] = zext i32 [[TMP105]] to i64 -; CHECK-ATTRSIZE-16-NEXT: [[DOTSROA_0320_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[TMP106]] to i32 +; CHECK-ATTRSIZE-16-NEXT: [[TMP106:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @_cont_Traversal) ; CHECK-ATTRSIZE-16-NEXT: [[DOTFCA_0_0_INSERT322:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } poison, <3 x i32> [[TMP2]], 0, 0 ; CHECK-ATTRSIZE-16-NEXT: [[DOTFCA_0_1_INSERT323:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_0_0_INSERT322]], i32 [[TMP83]], 0, 1 ; CHECK-ATTRSIZE-16-NEXT: [[DOTFCA_1_0_INSERT324:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_0_1_INSERT323]], i64 [[TMP6]], 1, 0 @@ -201,19 +199,19 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ ; CHECK-ATTRSIZE-16-NEXT: [[DOTFCA_2_7_INSERT342:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_6_INSERT341]], i32 [[TMP42]], 2, 7 ; CHECK-ATTRSIZE-16-NEXT: [[DOTFCA_2_8_INSERT343:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_7_INSERT342]], i64 [[TMP44]], 2, 8 ; CHECK-ATTRSIZE-16-NEXT: [[TMP108:%.*]] = load [8 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-ATTRSIZE-16-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0150_0_VEC_EXTRACT]], i32 -1, {} poison, i32 poison, i32 [[DOTSROA_0320_0_EXTRACT_TRUNC]], i32 [[TMP83]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_8_INSERT343]], [7 x i32] poison, [8 x i32] [[TMP108]]), !continuation.registercount [[META0]] +; CHECK-ATTRSIZE-16-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0150_0_VEC_EXTRACT]], i32 -1, i32 poison, i32 [[TMP106]], i32 [[TMP83]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_8_INSERT343]], [7 x i32] poison, [8 x i32] [[TMP108]]), !continuation.registercount [[META0]] ; CHECK-ATTRSIZE-16-NEXT: unreachable -; CHECK-ATTRSIZE-16: 109: +; CHECK-ATTRSIZE-16: 108: ; CHECK-ATTRSIZE-16-NEXT: [[DOTSROA_7_0:%.*]] = phi i32 [ [[TMP4]], [[DOTEXIT2]] ], [ [[TMP83]], [[DOTEXIT5]] ] ; CHECK-ATTRSIZE-16-NEXT: [[DOTSROA_0373_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[TMP44]] to i32 ; CHECK-ATTRSIZE-16-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue { <3 x i32>, i32 } poison, <3 x i32> [[TMP2]], 0 ; CHECK-ATTRSIZE-16-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue { <3 x i32>, i32 } [[DOTFCA_0_INSERT]], i32 [[DOTSROA_7_0]], 1 ; CHECK-ATTRSIZE-16-NEXT: [[TMP110:%.*]] = load [8 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-ATTRSIZE-16-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0373_0_EXTRACT_TRUNC]], i32 -1, {} poison, i32 poison, i32 poison, i32 [[DOTSROA_7_0]], { <3 x i32>, i32 } [[DOTFCA_1_INSERT]], [34 x i32] poison, [8 x i32] [[TMP110]]), !continuation.registercount [[META0]] +; CHECK-ATTRSIZE-16-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0373_0_EXTRACT_TRUNC]], i32 -1, i32 poison, i32 poison, i32 [[DOTSROA_7_0]], { <3 x i32>, i32 } [[DOTFCA_1_INSERT]], [34 x i32] poison, [8 x i32] [[TMP110]]), !continuation.registercount [[META0]] ; CHECK-ATTRSIZE-16-NEXT: unreachable ; ; CHECK-ATTRSIZE-8-LABEL: define dso_local spir_func void @_cont_Traversal( -; CHECK-ATTRSIZE-8-SAME: {} [[CONT_STATE:%.*]], i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [5 x i32] [[PADDING:%.*]], [8 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META4:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !lgc.cps [[META6:![0-9]+]] !continuation [[META7:![0-9]+]] { +; CHECK-ATTRSIZE-8-SAME: i32 [[RETURNADDR:%.*]], i32 [[SHADER_INDEX:%.*]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[SYSTEM_DATA:%.*]], {} [[HIT_ATTRS:%.*]], [5 x i32] [[PADDING:%.*]], [8 x i32] [[PAYLOAD:%.*]]) local_unnamed_addr !lgc.shaderstage [[META4:![0-9]+]] !lgc.rt.shaderstage [[META5:![0-9]+]] !continuation.registercount [[META0:![0-9]+]] !lgc.cps [[META6:![0-9]+]] !continuation [[META7:![0-9]+]] { ; CHECK-ATTRSIZE-8-NEXT: .entry: ; CHECK-ATTRSIZE-8-NEXT: [[SYSTEM_DATA_ALLOCA:%.*]] = alloca { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } }, align 16, addrspace(5) ; CHECK-ATTRSIZE-8-NEXT: [[PAYLOAD_SERIALIZATION_ALLOCA:%.*]] = alloca [8 x i32], align 4 @@ -321,7 +319,7 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ ; CHECK-ATTRSIZE-8-NEXT: [[DOTFCA_2_7_INSERT:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_6_INSERT]], i32 [[TMP42]], 2, 7 ; CHECK-ATTRSIZE-8-NEXT: [[DOTFCA_2_8_INSERT:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_7_INSERT]], i64 [[TMP44]], 2, 8 ; CHECK-ATTRSIZE-8-NEXT: [[TMP109:%.*]] = load [8 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-ATTRSIZE-8-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0128_0_EXTRACT_TRUNC]], i32 -1, {} poison, i32 [[DOTSROA_0130_0_EXTRACT_TRUNC]], i32 poison, i32 [[DOT0]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_8_INSERT]], [5 x i32] poison, [8 x i32] [[TMP109]]), !continuation.registercount [[META0:![0-9]+]] +; CHECK-ATTRSIZE-8-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0128_0_EXTRACT_TRUNC]], i32 -1, i32 [[DOTSROA_0130_0_EXTRACT_TRUNC]], i32 poison, i32 [[DOT0]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_8_INSERT]], [5 x i32] poison, [8 x i32] [[TMP109]]), !continuation.registercount [[META0]] ; CHECK-ATTRSIZE-8-NEXT: unreachable ; CHECK-ATTRSIZE-8: 68: ; CHECK-ATTRSIZE-8-NEXT: [[TMP68:%.*]] = shl i32 [[DOTFR]], 3 @@ -372,9 +370,7 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ ; CHECK-ATTRSIZE-8-NEXT: [[OR_COND:%.*]] = or i1 [[TMP103]], [[DOTNOT540]] ; CHECK-ATTRSIZE-8-NEXT: br i1 [[OR_COND]], label [[TMP107]], label [[TMP104:%.*]] ; CHECK-ATTRSIZE-8: 105: -; CHECK-ATTRSIZE-8-NEXT: [[TMP105:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @_cont_Traversal) -; CHECK-ATTRSIZE-8-NEXT: [[TMP106:%.*]] = zext i32 [[TMP105]] to i64 -; CHECK-ATTRSIZE-8-NEXT: [[DOTSROA_0320_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[TMP106]] to i32 +; CHECK-ATTRSIZE-8-NEXT: [[TMP106:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @_cont_Traversal) ; CHECK-ATTRSIZE-8-NEXT: [[DOTFCA_0_0_INSERT322:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } poison, <3 x i32> [[TMP2]], 0, 0 ; CHECK-ATTRSIZE-8-NEXT: [[DOTFCA_0_1_INSERT323:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_0_0_INSERT322]], i32 [[TMP83]], 0, 1 ; CHECK-ATTRSIZE-8-NEXT: [[DOTFCA_1_0_INSERT324:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_0_1_INSERT323]], i64 [[TMP6]], 1, 0 @@ -398,15 +394,15 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ ; CHECK-ATTRSIZE-8-NEXT: [[DOTFCA_2_7_INSERT342:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_6_INSERT341]], i32 [[TMP42]], 2, 7 ; CHECK-ATTRSIZE-8-NEXT: [[DOTFCA_2_8_INSERT343:%.*]] = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_7_INSERT342]], i64 [[TMP44]], 2, 8 ; CHECK-ATTRSIZE-8-NEXT: [[TMP108:%.*]] = load [8 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-ATTRSIZE-8-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0150_0_VEC_EXTRACT]], i32 -1, {} poison, i32 poison, i32 [[DOTSROA_0320_0_EXTRACT_TRUNC]], i32 [[TMP83]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_8_INSERT343]], [5 x i32] poison, [8 x i32] [[TMP108]]), !continuation.registercount [[META0]] +; CHECK-ATTRSIZE-8-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0150_0_VEC_EXTRACT]], i32 -1, i32 poison, i32 [[TMP106]], i32 [[TMP83]], { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } [[DOTFCA_2_8_INSERT343]], [5 x i32] poison, [8 x i32] [[TMP108]]), !continuation.registercount [[META0]] ; CHECK-ATTRSIZE-8-NEXT: unreachable -; CHECK-ATTRSIZE-8: 109: +; CHECK-ATTRSIZE-8: 108: ; CHECK-ATTRSIZE-8-NEXT: [[DOTSROA_7_0:%.*]] = phi i32 [ [[TMP4]], [[DOTEXIT2]] ], [ [[TMP83]], [[DOTEXIT5]] ] ; CHECK-ATTRSIZE-8-NEXT: [[DOTSROA_0373_0_EXTRACT_TRUNC:%.*]] = trunc i64 [[TMP44]] to i32 ; CHECK-ATTRSIZE-8-NEXT: [[DOTFCA_0_INSERT:%.*]] = insertvalue { <3 x i32>, i32 } poison, <3 x i32> [[TMP2]], 0 ; CHECK-ATTRSIZE-8-NEXT: [[DOTFCA_1_INSERT:%.*]] = insertvalue { <3 x i32>, i32 } [[DOTFCA_0_INSERT]], i32 [[DOTSROA_7_0]], 1 ; CHECK-ATTRSIZE-8-NEXT: [[TMP110:%.*]] = load [8 x i32], ptr [[PAYLOAD_SERIALIZATION_ALLOCA]], align 4 -; CHECK-ATTRSIZE-8-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0373_0_EXTRACT_TRUNC]], i32 -1, {} poison, i32 poison, i32 poison, i32 [[DOTSROA_7_0]], { <3 x i32>, i32 } [[DOTFCA_1_INSERT]], [32 x i32] poison, [8 x i32] [[TMP110]]), !continuation.registercount [[META0]] +; CHECK-ATTRSIZE-8-NEXT: call void (...) @lgc.cps.jump(i32 [[DOTSROA_0373_0_EXTRACT_TRUNC]], i32 -1, i32 poison, i32 poison, i32 [[DOTSROA_7_0]], { <3 x i32>, i32 } [[DOTFCA_1_INSERT]], [32 x i32] poison, [8 x i32] [[TMP110]]), !continuation.registercount [[META0]] ; CHECK-ATTRSIZE-8-NEXT: unreachable ; .entry: @@ -515,7 +511,7 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ %.fca.2.6.insert = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.5.insert, i32 %41, 2, 6 %.fca.2.7.insert = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.6.insert, i32 %43, 2, 7 %.fca.2.8.insert = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.7.insert, i64 %45, 2, 8 - call void (...) @lgc.cps.jump(i32 %.sroa.0128.0.extract.trunc, i32 -1, {} poison, i32 %.sroa.0130.0.extract.trunc, i32 poison, i32 %.0, { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.8.insert) + call void (...) @lgc.cps.jump(i32 %.sroa.0128.0.extract.trunc, i32 -1, i32 %.sroa.0130.0.extract.trunc, i32 poison, i32 %.0, { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.8.insert) unreachable 68: ; preds = %.entry @@ -570,8 +566,7 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ br i1 %or.cond, label %106, label %105 105: ; preds = %.exit5 - %addr = call i64 @_AmdGetCurrentFuncAddr() - %.sroa.0320.0.extract.trunc = trunc i64 %addr to i32 + %addr = call i32 @_AmdGetCurrentFuncAddr() %.fca.0.0.insert322 = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } poison, <3 x i32> %3, 0, 0 %.fca.0.1.insert323 = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.0.0.insert322, i32 %84, 0, 1 %.fca.1.0.insert324 = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.0.1.insert323, i64 %7, 1, 0 @@ -594,7 +589,7 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ %.fca.2.6.insert341 = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.5.insert340, i32 %41, 2, 6 %.fca.2.7.insert342 = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.6.insert341, i32 %43, 2, 7 %.fca.2.8.insert343 = insertvalue { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.7.insert342, i64 %45, 2, 8 - call void (...) @lgc.cps.jump(i32 %.sroa.0150.0.vec.extract, i32 -1, {} poison, i32 poison, i32 %.sroa.0320.0.extract.trunc, i32 %84, { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.8.insert343) + call void (...) @lgc.cps.jump(i32 %.sroa.0150.0.vec.extract, i32 -1, i32 poison, i32 %addr, i32 %84, { { <3 x i32>, i32 }, { i64, i32, i32, <3 x float>, <3 x float>, float, float }, { { float, i32, i32, i32, i32 }, <2 x float>, i32, i32, i32, i32, i32, i32, i64 } } %.fca.2.8.insert343) unreachable 106: ; preds = %.exit5, %.exit2 @@ -602,7 +597,7 @@ define dso_local spir_func { { float, i32, i32, i32, i32 }, <2 x float>, i32 } @ %.sroa.0373.0.extract.trunc = trunc i64 %45 to i32 %.fca.0.insert = insertvalue { <3 x i32>, i32 } poison, <3 x i32> %3, 0 %.fca.1.insert = insertvalue { <3 x i32>, i32 } %.fca.0.insert, i32 %.sroa.7.0, 1 - call void (...) @lgc.cps.jump(i32 %.sroa.0373.0.extract.trunc, i32 -1, {} poison, i32 poison, i32 poison, i32 %.sroa.7.0, { <3 x i32>, i32 } %.fca.1.insert) + call void (...) @lgc.cps.jump(i32 %.sroa.0373.0.extract.trunc, i32 -1, i32 poison, i32 poison, i32 %.sroa.7.0, { <3 x i32>, i32 } %.fca.1.insert) unreachable } diff --git a/llvmraytracing/test/lgccps/multiple-await.ll b/llvmraytracing/test/lgccps/multiple-await.ll index 266559bced..31a73d0967 100644 --- a/llvmraytracing/test/lgccps/multiple-await.ll +++ b/llvmraytracing/test/lgccps/multiple-await.ll @@ -9,62 +9,96 @@ declare !lgc.cps !0 void @callee2({}, i32, float) define void @test({} %state, i32 %rcr, float %arg, float %arg2) !lgc.cps !0 { %t0 = fadd float %arg, 1.0 %cr = call i32 @lgc.cps.as.continuation.reference(ptr @callee) - %t1 = call float (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} - %t2 = fmul float %t1, %arg + %t1 = call { float } (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} + %res = extractvalue { float } %t1, 0 + %t2 = fmul float %res, %arg %cr2 = call i32 @lgc.cps.as.continuation.reference(ptr @callee2) - %t3 = call float (...) @lgc.cps.await__f32(i32 %cr2, i32 2, float %t2), !continuation.returnedRegistercount !{i32 0} - %returnvalue = fadd float %t3, %arg2 - call void (...) @lgc.cps.jump(i32 %rcr, i32 2, {} poison, i32 poison, i32 poison, float %returnvalue) + %t3 = call { float } (...) @lgc.cps.await__f32(i32 %cr2, i32 2, float %t2), !continuation.returnedRegistercount !{i32 0} + %res.2 = extractvalue { float } %t3, 0 + %returnvalue = fadd float %res.2, %arg2 + call void (...) @lgc.cps.jump(i32 %rcr, i32 2, i32 poison, i32 poison, float %returnvalue) unreachable } +!continuation.stackAddrspace = !{!1} + !0 = !{i32 1} ; level = 1 +!1 = !{i32 5} declare i32 @lgc.cps.as.continuation.reference(...) memory(none) -declare float @lgc.cps.await__f32(...) +declare { float } @lgc.cps.await__f32(...) declare void @lgc.cps.jump(...) ; CHECK-LABEL: define void @test( -; CHECK-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], float [[ARG2:%.*]]) !lgc.cps [[META0:![0-9]+]] !continuation [[META1:![0-9]+]] !continuation.stacksize [[META2:![0-9]+]] !continuation.state [[META2]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], float [[ARG2:%.*]]) !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 12) -; CHECK-NEXT: [[ARG2_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CHECK-NEXT: store float [[ARG2]], ptr addrspace(32) [[ARG2_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: store float [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[RCR_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(32) [[RCR_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 12 +; CHECK-NEXT: store i32 [[TMP3]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], 8 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: store float [[ARG2]], ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP2]], 4 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: store float [[ARG]], ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP10]], i32 0 +; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(5) [[TMP11]], align 4 ; CHECK-NEXT: [[T0:%.*]] = fadd float [[ARG]], 1.000000e+00 ; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee) ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, {} poison, i32 poison, i32 [[TMP1]], float [[T0]]), !continuation.returnedRegistercount [[META3:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.0) +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP12]], i32 [[TMP1]], float [[T0]]), !continuation.returnedRegistercount [[META4:![0-9]+]] ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.0( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 12) -; CHECK-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[T2:%.*]] = fmul float [[TMP3]], [[ARG_RELOAD]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -12 +; CHECK-NEXT: [[TMP11:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP4]], 4 +; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP9]], i32 0 +; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP7]], align 4 +; CHECK-NEXT: [[RES1:%.*]] = extractvalue { float } [[TMP11]], 0 +; CHECK-NEXT: [[T2:%.*]] = fmul float [[RES1]], [[ARG_RELOAD]] ; CHECK-NEXT: [[CR2:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee2) ; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[CR2]] to ptr -; CHECK-NEXT: [[TMP6:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.1) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR2]], i32 2, {} poison, i32 poison, i32 [[TMP6]], float [[T2]]), !continuation.returnedRegistercount [[META3]] +; CHECK-NEXT: [[TMP6:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.1) +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR2]], i32 2, i32 [[TMP10]], i32 [[TMP6]], float [[T2]]), !continuation.returnedRegistercount [[META4]] ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.1( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.1: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 12) -; CHECK-NEXT: [[ARG2_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 2 -; CHECK-NEXT: [[ARG2_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG2_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RETURNVALUE:%.*]] = fadd float [[TMP3]], [[ARG2_RELOAD]] -; CHECK-NEXT: call void @lgc.cps.free(i32 12) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -12 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 8 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP6]], i32 0 +; CHECK-NEXT: [[ARG2_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP7]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[RES_21:%.*]] = extractvalue { float } [[TMP13]], 0 +; CHECK-NEXT: [[RETURNVALUE:%.*]] = fadd float [[RES_21]], [[ARG2_RELOAD]] +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], -12 +; CHECK-NEXT: store i32 [[TMP11]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, i32 [[TMP12]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; diff --git a/llvmraytracing/test/lgccps/simple-await-more-state.ll b/llvmraytracing/test/lgccps/simple-await-more-state.ll index 095da2a378..ee0fb87ca0 100644 --- a/llvmraytracing/test/lgccps/simple-await-more-state.ll +++ b/llvmraytracing/test/lgccps/simple-await-more-state.ll @@ -8,49 +8,76 @@ declare !lgc.cps !0 void @callee({}, i32, float) define void @test({} %state, i32 %rcr, float %arg, float %arg2) !lgc.cps !0 { %t0 = fadd float %arg, 1.0 %cr = call i32 @lgc.cps.as.continuation.reference(ptr @callee) - %t1 = call float (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} - %t2 = fmul float %t1, %arg + %t1 = call { float } (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} + %res = extractvalue { float } %t1, 0 + %t2 = fmul float %res, %arg %returnvalue = fadd float %t2, %arg2 - call void (...) @lgc.cps.jump(i32 %rcr, i32 2, {} poison, i32 poison, i32 poison, float %returnvalue) + call void (...) @lgc.cps.jump(i32 %rcr, i32 2, i32 poison, i32 poison, float %returnvalue) unreachable } +!continuation.stackAddrspace = !{!1} + !0 = !{i32 1} ; level = 1 +!1 = !{i32 5} declare i32 @lgc.cps.as.continuation.reference(...) memory(none) -declare float @lgc.cps.await__f32(...) +declare { float } @lgc.cps.await__f32(...) declare void @lgc.cps.jump(...) ; CHECK-LABEL: define void @test( -; CHECK-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], float [[ARG2:%.*]]) !lgc.cps [[META0:![0-9]+]] !continuation [[META1:![0-9]+]] !continuation.stacksize [[META2:![0-9]+]] !continuation.state [[META2]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], float [[ARG2:%.*]]) !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 12) -; CHECK-NEXT: [[ARG2_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 2 -; CHECK-NEXT: store float [[ARG2]], ptr addrspace(32) [[ARG2_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: store float [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[RCR_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(32) [[RCR_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 12 +; CHECK-NEXT: store i32 [[TMP3]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], 8 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: store float [[ARG2]], ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP2]], 4 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP7]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: store float [[ARG]], ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP10]], i32 0 +; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(5) [[TMP11]], align 4 ; CHECK-NEXT: [[T0:%.*]] = fadd float [[ARG]], 1.000000e+00 ; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee) ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, {} poison, i32 poison, i32 [[TMP1]], float [[T0]]), !continuation.returnedRegistercount [[META3:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.0) +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP12]], i32 [[TMP1]], float [[T0]]), !continuation.returnedRegistercount [[META4:![0-9]+]] ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.0( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 12) -; CHECK-NEXT: [[ARG2_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 2 -; CHECK-NEXT: [[ARG2_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG2_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[T2:%.*]] = fmul float [[TMP3]], [[ARG_RELOAD]] +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -12 +; CHECK-NEXT: [[TMP16:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 8 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP6]], i32 0 +; CHECK-NEXT: [[ARG2_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP7]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP4]], 4 +; CHECK-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP8]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP9]], i32 0 +; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP10]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP11]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP12]], align 4 +; CHECK-NEXT: [[RES1:%.*]] = extractvalue { float } [[TMP16]], 0 +; CHECK-NEXT: [[T2:%.*]] = fmul float [[RES1]], [[ARG_RELOAD]] ; CHECK-NEXT: [[RETURNVALUE:%.*]] = fadd float [[T2]], [[ARG2_RELOAD]] -; CHECK-NEXT: call void @lgc.cps.free(i32 12) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[TMP13]], -12 +; CHECK-NEXT: store i32 [[TMP14]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, i32 [[TMP15]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; diff --git a/llvmraytracing/test/lgccps/simple-await.ll b/llvmraytracing/test/lgccps/simple-await.ll index 1bd79540a3..c9ad1c82a6 100644 --- a/llvmraytracing/test/lgccps/simple-await.ll +++ b/llvmraytracing/test/lgccps/simple-await.ll @@ -9,58 +9,81 @@ declare !lgc.cps !0 void @callee({}, i32, float) define void @test({} %state, i32 %rcr, float %arg) !lgc.cps !0 { %t0 = fadd float %arg, 1.0 %cr = call i32 @lgc.cps.as.continuation.reference(ptr @callee) - %t1 = call float (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} - %returnvalue = fmul float %t1, %arg - call void (...) @lgc.cps.jump(i32 %rcr, i32 2, {} poison, i32 poison, i32 poison, float %returnvalue) + %t1 = call { float } (...) @lgc.cps.await__f32(i32 %cr, i32 2, float %t0), !continuation.returnedRegistercount !{i32 0} + %res = extractvalue { float } %t1, 0 + %returnvalue = fmul float %res, %arg + call void (...) @lgc.cps.jump(i32 %rcr, i32 2, i32 poison, i32 poison, float %returnvalue) unreachable } +!continuation.stackAddrspace = !{!1} !0 = !{i32 1} ; level = 1 +!1 = !{i32 5} declare i32 @lgc.cps.as.continuation.reference(...) memory(none) -declare float @lgc.cps.await__f32(...) +declare { float } @lgc.cps.await__f32(...) declare void @lgc.cps.jump(...) ; CHECK-LABEL: define void @test( -; CHECK-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]]) !lgc.cps [[META0:![0-9]+]] !continuation [[META1:![0-9]+]] !continuation.stacksize [[META2:![0-9]+]] !continuation.state [[META2]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]]) !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] !continuation.stacksize [[META3:![0-9]+]] !continuation.state [[META3]] { ; CHECK-NEXT: AllocaSpillBB: -; CHECK-NEXT: [[CONT_STATE_STACK_SEGMENT:%.*]] = call ptr addrspace(32) @lgc.cps.alloc(i32 8) -; CHECK-NEXT: [[ARG_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 1 -; CHECK-NEXT: store float [[ARG]], ptr addrspace(32) [[ARG_SPILL_ADDR]], align 4 -; CHECK-NEXT: [[RCR_SPILL_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[CONT_STATE_STACK_SEGMENT]], i32 0, i32 0 -; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(32) [[RCR_SPILL_ADDR]], align 4 +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], 8 +; CHECK-NEXT: store i32 [[TMP3]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], 4 +; CHECK-NEXT: [[TMP5:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP5]], i32 0 +; CHECK-NEXT: store float [[ARG]], ptr addrspace(5) [[TMP6]], align 4 +; CHECK-NEXT: [[TMP7:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP7]], i32 0 +; CHECK-NEXT: store i32 [[RCR]], ptr addrspace(5) [[TMP8]], align 4 ; CHECK-NEXT: [[T0:%.*]] = fadd float [[ARG]], 1.000000e+00 ; CHECK-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee) ; CHECK-NEXT: [[TMP0:%.*]] = inttoptr i32 [[CR]] to ptr -; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference__i32(ptr @test.resume.0) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, {} poison, i32 poison, i32 [[TMP1]], float [[T0]]), !continuation.returnedRegistercount [[META3:![0-9]+]] +; CHECK-NEXT: [[TMP1:%.*]] = call i32 (...) @lgc.cps.as.continuation.reference(ptr @test.resume.0) +; CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[CR]], i32 2, i32 [[TMP9]], i32 [[TMP1]], float [[T0]]), !continuation.returnedRegistercount [[META4:![0-9]+]] ; CHECK-NEXT: unreachable ; ; ; CHECK-LABEL: define dso_local void @test.resume.0( -; CHECK-SAME: {} [[TMP0:%.*]], i32 [[TMP1:%.*]], i32 [[TMP2:%.*]], float [[TMP3:%.*]]) !lgc.cps [[META0]] !continuation [[META1]] !continuation.registercount [[META3]] { +; CHECK-SAME: i32 [[CSPINIT:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]], float [[TMP2:%.*]]) !lgc.cps [[META1]] !continuation [[META2]] !continuation.registercount [[META4]] { ; CHECK-NEXT: entryresume.0: -; CHECK-NEXT: [[TMP4:%.*]] = call ptr addrspace(32) @lgc.cps.peek(i32 8) -; CHECK-NEXT: [[ARG_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME:%.*]], ptr addrspace(32) [[TMP4]], i32 0, i32 1 -; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(32) [[ARG_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RCR_RELOAD_ADDR:%.*]] = getelementptr inbounds [[TEST_FRAME]], ptr addrspace(32) [[TMP4]], i32 0, i32 0 -; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(32) [[RCR_RELOAD_ADDR]], align 4 -; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[TMP3]], [[ARG_RELOAD]] -; CHECK-NEXT: call void @lgc.cps.free(i32 8) -; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; CHECK-NEXT: [[CSP:%.*]] = alloca i32, align 4 +; CHECK-NEXT: store i32 [[CSPINIT]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP3]], -8 +; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { float } poison, float [[TMP2]], 0 +; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP4]], 4 +; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i32 [[TMP5]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP6]], i32 0 +; CHECK-NEXT: [[ARG_RELOAD:%.*]] = load float, ptr addrspace(5) [[TMP7]], align 4 +; CHECK-NEXT: [[TMP8:%.*]] = inttoptr i32 [[TMP4]] to ptr addrspace(5) +; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr addrspace(5) [[TMP8]], i32 0 +; CHECK-NEXT: [[RCR_RELOAD:%.*]] = load i32, ptr addrspace(5) [[TMP9]], align 4 +; CHECK-NEXT: [[RES1:%.*]] = extractvalue { float } [[TMP13]], 0 +; CHECK-NEXT: [[RETURNVALUE:%.*]] = fmul float [[RES1]], [[ARG_RELOAD]] +; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], -8 +; CHECK-NEXT: store i32 [[TMP11]], ptr [[CSP]], align 4 +; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[CSP]], align 4 +; CHECK-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR_RELOAD]], i32 2, i32 [[TMP12]], i32 poison, float [[RETURNVALUE]]) ; CHECK-NEXT: unreachable ; ; ; LOWER-AWAIT-LABEL: define { ptr, ptr } @test( -; LOWER-AWAIT-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], ptr [[TMP0:%.*]]) !lgc.cps [[META0:![0-9]+]] !continuation [[META1:![0-9]+]] { +; LOWER-AWAIT-SAME: {} [[STATE:%.*]], i32 [[RCR:%.*]], float [[ARG:%.*]], ptr [[TMP0:%.*]]) !lgc.cps [[META1:![0-9]+]] !continuation [[META2:![0-9]+]] { ; LOWER-AWAIT-NEXT: [[TMP2:%.*]] = call token @llvm.coro.id.retcon(i32 8, i32 4, ptr [[TMP0]], ptr @continuation.prototype.test, ptr @continuation.malloc, ptr @continuation.free) ; LOWER-AWAIT-NEXT: [[TMP3:%.*]] = call ptr @llvm.coro.begin(token [[TMP2]], ptr null) ; LOWER-AWAIT-NEXT: [[T0:%.*]] = fadd float [[ARG]], 1.000000e+00 ; LOWER-AWAIT-NEXT: [[CR:%.*]] = call i32 @lgc.cps.as.continuation.reference(ptr @callee) ; LOWER-AWAIT-NEXT: [[TMP4:%.*]] = inttoptr i32 [[CR]] to ptr -; LOWER-AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CR]], i32 2, float [[T0]]), !continuation.returnedRegistercount [[META2:![0-9]+]] +; LOWER-AWAIT-NEXT: [[TMP5:%.*]] = call ptr [[TMP4]](i32 [[CR]], i32 2, float [[T0]]), !continuation.returnedRegistercount [[META3:![0-9]+]] ; LOWER-AWAIT-NEXT: [[TMP6:%.*]] = call i1 (...) @llvm.coro.suspend.retcon.i1(ptr [[TMP5]]) -; LOWER-AWAIT-NEXT: [[TMP7:%.*]] = call float @lgc.ilcps.getReturnValue__f32() +; LOWER-AWAIT-NEXT: [[TMP8:%.*]] = call { float } @lgc.ilcps.getReturnValue__sl_f32s() +; LOWER-AWAIT-NEXT: [[TMP7:%.*]] = extractvalue { float } [[TMP8]], 0 ; LOWER-AWAIT-NEXT: [[RETURNVALUE:%.*]] = fmul float [[TMP7]], [[ARG]] -; LOWER-AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR]], i32 2, {} poison, i32 poison, i32 poison, float [[RETURNVALUE]]) +; LOWER-AWAIT-NEXT: call void (...) @lgc.cps.jump(i32 [[RCR]], i32 2, i32 poison, i32 poison, float [[RETURNVALUE]]) ; LOWER-AWAIT-NEXT: unreachable ; diff --git a/llvmraytracing/test/lit.site.cfg.py.in b/llvmraytracing/test/lit.site.cfg.py.in index abb5e82235..c918100fbc 100644 --- a/llvmraytracing/test/lit.site.cfg.py.in +++ b/llvmraytracing/test/lit.site.cfg.py.in @@ -20,6 +20,12 @@ except KeyError: # Propagate CMake options used in lit feature tests. config.llvm_assertions = "@LLVM_ENABLE_ASSERTIONS@" +for d in "@LIT_DEFINITIONS@".split(";"): + def_split = d.split("=") + name = def_split[0].lower() + val = def_split[1] if len(def_split) > 1 else "ON" + config.available_features.add(name) + import lit.llvm lit.llvm.initialize(lit_config, config) diff --git a/script/switch-coding-style.sh b/script/switch-coding-style.sh index 94756811e4..51dfeb5fa9 100755 --- a/script/switch-coding-style.sh +++ b/script/switch-coding-style.sh @@ -123,10 +123,9 @@ do_clang_tidy() { -DVULKAN_HEADER_PATH=../icd/api/include/khronos ) fi -#if VKI_IMAGE_BVH_INTERSECT_RAY - cmakedefs+=(-DVKI_IMAGE_BVH_INTERSECT_RAY=1) +#if LLPC_RAY_TRACING + cmakedefs+=(-DLLPC_RAY_TRACING=1) #endif - cmakedefs+=(-DVKI_RAY_TRACING=1) # If this is the first check in this script run, do a cmake build of amdllpc, # asking for a compile_commands.json file. diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index aff47981ef..d61944a9a6 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -28,10 +28,6 @@ if(NOT LLPC_IS_STANDALONE) find_package(Python3 ${LLVM_MINIMUM_PYTHON_VERSION} REQUIRED COMPONENTS Interpreter) - list(APPEND CMAKE_MODULE_PATH - "${XGL_LLVM_BUILD_PATH}/lib/cmake/llvm" - "${XGL_LLVM_BUILD_PATH}/${CMAKE_CFG_INTDIR}/lib/cmake/llvm" # Workaround for VS generator with older LLVM. - ) include(LLVMConfig) # required by lit.site.cfg.py.in. diff --git a/tool/dumper/vkgcPipelineDumper.cpp b/tool/dumper/vkgcPipelineDumper.cpp index 73a9460511..cd3c0f5ef8 100644 --- a/tool/dumper/vkgcPipelineDumper.cpp +++ b/tool/dumper/vkgcPipelineDumper.cpp @@ -713,6 +713,7 @@ void PipelineDumper::dumpPipelineShaderInfo(const PipelineShaderInfo *shaderInfo dumpFile << "options.constantBufferBindingOffset = " << shaderInfo->options.constantBufferBindingOffset << "\n"; dumpFile << "options.imageSampleDrefReturnsRgba = " << shaderInfo->options.imageSampleDrefReturnsRgba << "\n"; dumpFile << "options.disableGlPositionOpt = " << shaderInfo->options.disableGlPositionOpt << "\n"; + dumpFile << "options.viewIndexFromDeviceIndex = " << shaderInfo->options.viewIndexFromDeviceIndex << "\n"; dumpFile << "\n"; // clang-format on } @@ -959,6 +960,7 @@ void PipelineDumper::dumpPipelineOptions(const PipelineOptions *options, std::os dumpFile << glStatePrefix << "enableLineSmooth = " << options->getGlState().enableLineSmooth << "\n"; dumpFile << glStatePrefix << "emulateWideLineStipple = " << options->getGlState().emulateWideLineStipple << "\n"; dumpFile << glStatePrefix << "enablePointSmooth = " << options->getGlState().enablePointSmooth << "\n"; + dumpFile << glStatePrefix << "enableRemapLocation = " << options->getGlState().enableRemapLocation << "\n"; dumpFile << "options.enablePrimGeneratedQuery = " << options->enablePrimGeneratedQuery << "\n"; dumpFile << "options.disablePerCompFetch = " << options->disablePerCompFetch << "\n"; dumpFile << "options.optimizePointSizeWrite = " << options->optimizePointSizeWrite << "\n"; @@ -1061,6 +1063,27 @@ void PipelineDumper::dumpGraphicsStateInfo(const GraphicsPipelineBuildInfo *pipe } } + // Note: Remaps output locations according to the location map. + auto outLocationMaps = pipelineInfo->outLocationMaps; + if (outLocationMaps != nullptr) { + for (unsigned i = 0; i < ShaderStageFragment; ++i) { + if (outLocationMaps[i].count > 0) { + unsigned outLocationMapsCount = outLocationMaps[i].count; + dumpFile << "outLocationMaps[" << i << "].oldLocation = "; + for (unsigned j = 0; j < outLocationMapsCount - 1; j++) + dumpFile << outLocationMaps[i].oldLocation[j] << ", "; + dumpFile << outLocationMaps[i].oldLocation[outLocationMapsCount - 1] << "\n"; + + dumpFile << "outLocationMaps[" << i << "].newLocation = "; + for (unsigned j = 0; j < outLocationMapsCount - 1; j++) + dumpFile << outLocationMaps[i].newLocation[j] << ", "; + dumpFile << outLocationMaps[i].newLocation[outLocationMapsCount - 1] << "\n"; + + dumpFile << "outLocationMaps[" << i << "].count = " << outLocationMaps[i].count << "\n"; + } + } + } + dumpFile << "nggState.enableNgg = " << pipelineInfo->nggState.enableNgg << "\n"; dumpFile << "nggState.enableGsUse = " << pipelineInfo->nggState.enableGsUse << "\n"; dumpFile << "nggState.forceCullingMode = " << pipelineInfo->nggState.forceCullingMode << "\n"; @@ -1580,6 +1603,20 @@ MetroHash::Hash PipelineDumper::generateHashForGraphicsPipeline(const GraphicsPi hasher.Update(pipeline->dynamicTopology); hasher.Update(pipeline->enableInitUndefZero); + // Note: Remaps output locations according to the location map. + auto outLocationMaps = pipeline->outLocationMaps; + if (outLocationMaps != nullptr && unlinkedShaderType != UnlinkedStageFragment) { + for (unsigned i = 0; i < ShaderStageFragment; ++i) { + if (outLocationMaps[i].count > 0) { + hasher.Update(reinterpret_cast(outLocationMaps->oldLocation), + sizeof(uint32_t) * outLocationMaps->count); + hasher.Update(reinterpret_cast(outLocationMaps->newLocation), + sizeof(uint32_t) * outLocationMaps->count); + hasher.Update(outLocationMaps[i].count); + } + } + } + if (unlinkedShaderType == UnlinkedStageFragment && isCacheHash) hasher.Update(pipeline->enableColorExportShader); updateHashForPipelineOptions(&pipeline->options, &hasher, isCacheHash, unlinkedShaderType); @@ -1587,10 +1624,6 @@ MetroHash::Hash PipelineDumper::generateHashForGraphicsPipeline(const GraphicsPi if (unlinkedShaderType != UnlinkedStageFragment) { if (!pipeline->enableUberFetchShader) { updateHashForVertexInputState(pipeline->pVertexInput, pipeline->dynamicVertexStride, &hasher); - if (pipeline->getGlState().vbAddressLowBitsKnown) { - hasher.Update(pipeline->getGlState().vbAddressLowBitsKnown); - hasher.Update(pipeline->getGlState().vbAddressLowBits, pipeline->pVertexInput->vertexAttributeDescriptionCount); - } } updateHashForNonFragmentState(pipeline, isCacheHash, &hasher); @@ -1603,22 +1636,11 @@ MetroHash::Hash PipelineDumper::generateHashForGraphicsPipeline(const GraphicsPi if (pipeline->clientMetadataSize > 0) { hasher.Update(reinterpret_cast(pipeline->pClientMetadata), pipeline->clientMetadataSize); } - for (unsigned i = 0; i < pipeline->getGlState().numUniformConstantMaps; i++) { - if (pipeline->getGlState().ppUniformMaps[i] != nullptr) { - updateHashForUniformConstantMap(pipeline->getGlState().ppUniformMaps[i], &hasher); - } - } hasher.Update(pipeline->advancedBlendInfo.enableAdvancedBlend); hasher.Update(pipeline->advancedBlendInfo.enableRov); hasher.Update(pipeline->advancedBlendInfo.binding); - hasher.Update(pipeline->glState.enableColorClampVs); - hasher.Update(pipeline->glState.enableColorClampFs); - hasher.Update(pipeline->glState.enableFlatShade); - hasher.Update(pipeline->glState.enableMapClipDistMask); - hasher.Update(pipeline->glState.alphaTestFunc); - MetroHash::Hash hash = {}; hasher.Finalize(hash.bytes); @@ -1783,6 +1805,7 @@ void PipelineDumper::updateHashForNonFragmentState(const GraphicsPipelineBuildIn bool enableNgg = nggState->enableNgg; auto iaState = &pipeline->iaState; + auto glState = &pipeline->getGlState(); if (enableNgg) { hasher->Update(iaState->topology); hasher->Update(pipeline->rsState.provokingVertexMode); @@ -1840,15 +1863,30 @@ void PipelineDumper::updateHashForNonFragmentState(const GraphicsPipelineBuildIn if (pipeline->iaState.tessLevel) hasher->Update(*pipeline->iaState.tessLevel); - hasher->Update(pipeline->getGlState().apiXfbOutData.forceDisableStreamOut); - for (unsigned i = 0; i < pipeline->getGlState().apiXfbOutData.numXfbOutInfo; i++) { - hasher->Update(pipeline->getGlState().apiXfbOutData.pXfbOutInfos[i].isBuiltIn); - hasher->Update(pipeline->getGlState().apiXfbOutData.pXfbOutInfos[i].location); - hasher->Update(pipeline->getGlState().apiXfbOutData.pXfbOutInfos[i].component); - hasher->Update(pipeline->getGlState().apiXfbOutData.pXfbOutInfos[i].xfbBuffer); - hasher->Update(pipeline->getGlState().apiXfbOutData.pXfbOutInfos[i].xfbOffset); - hasher->Update(pipeline->getGlState().apiXfbOutData.pXfbOutInfos[i].xfbStride); - hasher->Update(pipeline->getGlState().apiXfbOutData.pXfbOutInfos[i].streamId); + if (pipeline->getGlState().vbAddressLowBitsKnown) { + hasher->Update(glState->vbAddressLowBitsKnown); + hasher->Update(glState->vbAddressLowBits); + } + + hasher->Update(glState->enableMapClipDistMask); + hasher->Update(glState->enableFlatShade); + hasher->Update(glState->enableColorClampVs); + hasher->Update(glState->apiXfbOutData.forceDisableStreamOut); + + for (unsigned i = 0; i < glState->apiXfbOutData.numXfbOutInfo; i++) { + hasher->Update(glState->apiXfbOutData.pXfbOutInfos[i].isBuiltIn); + hasher->Update(glState->apiXfbOutData.pXfbOutInfos[i].location); + hasher->Update(glState->apiXfbOutData.pXfbOutInfos[i].component); + hasher->Update(glState->apiXfbOutData.pXfbOutInfos[i].xfbBuffer); + hasher->Update(glState->apiXfbOutData.pXfbOutInfos[i].xfbOffset); + hasher->Update(glState->apiXfbOutData.pXfbOutInfos[i].xfbStride); + hasher->Update(glState->apiXfbOutData.pXfbOutInfos[i].streamId); + } + + unsigned nonFragmentStageBit = ~ShaderStageFragmentBit; + for (unsigned i = 0; i < glState->numUniformConstantMaps; i++) { + if (glState->ppUniformMaps[i] != nullptr && (glState->ppUniformMaps[i]->visibility & nonFragmentStageBit)) + updateHashForUniformConstantMap(glState->ppUniformMaps[i], hasher); } } @@ -1859,6 +1897,8 @@ void PipelineDumper::updateHashForNonFragmentState(const GraphicsPipelineBuildIn // @param [in/out] hasher : Hasher to generate hash code void PipelineDumper::updateHashForFragmentState(const GraphicsPipelineBuildInfo *pipeline, MetroHash64 *hasher) { auto rsState = &pipeline->rsState; + auto glState = &pipeline->getGlState(); + hasher->Update(rsState->perSampleShading); hasher->Update(rsState->pixelShaderSamples); @@ -1885,7 +1925,23 @@ void PipelineDumper::updateHashForFragmentState(const GraphicsPipelineBuildInfo hasher->Update(cbState->target[i].format); } - hasher->Update(pipeline->getGlState().originUpperLeft); + hasher->Update(glState->originUpperLeft); + hasher->Update(glState->enableBitmap); + hasher->Update(glState->enableBitmapLsb); + hasher->Update(glState->enableTwoSideLighting); + hasher->Update(glState->drawPixelsType); + hasher->Update(glState->enableColorClampFs); + hasher->Update(glState->enableFlatShade); + hasher->Update(glState->alphaTestFunc); + hasher->Update(glState->pixelTransferScale); + hasher->Update(glState->pixelTransferBias); + hasher->Update(glState->lineSmooth); + hasher->Update(glState->pointSmooth); + + for (unsigned i = 0; i < glState->numUniformConstantMaps; i++) { + if (glState->ppUniformMaps[i] != nullptr && (glState->ppUniformMaps[i]->visibility & ShaderStageFragmentBit)) + updateHashForUniformConstantMap(pipeline->getGlState().ppUniformMaps[i], hasher); + } } // ===================================================================================================================== @@ -1943,6 +1999,7 @@ void PipelineDumper::updateHashForPipelineOptions(const PipelineOptions *options hasher->Update(options->getGlState().enableLineSmooth); hasher->Update(options->getGlState().emulateWideLineStipple); hasher->Update(options->getGlState().enablePointSmooth); + hasher->Update(options->getGlState().enableRemapLocation); // disablePerCompFetch has been handled in updateHashForNonFragmentState hasher->Update(options->optimizePointSizeWrite); } @@ -2034,6 +2091,7 @@ void PipelineDumper::updateHashForPipelineShaderInfo(ShaderStage stage, const Pi hasher->Update(options.forwardPropagateNoContract); hasher->Update(options.imageSampleDrefReturnsRgba); hasher->Update(options.disableGlPositionOpt); + hasher->Update(options.viewIndexFromDeviceIndex); } } } diff --git a/tool/vfx/vfxPipelineDoc.cpp b/tool/vfx/vfxPipelineDoc.cpp index 6281b8690f..e9fcdd5f60 100644 --- a/tool/vfx/vfxPipelineDoc.cpp +++ b/tool/vfx/vfxPipelineDoc.cpp @@ -401,6 +401,7 @@ bool PipelineDocument::getPtrOfSubSection(Section *section, unsigned lineNum, co CASE_SUBSECTION(MemberTypeShaderOption, SectionShaderOption) CASE_SUBSECTION(MemberTypeNggState, SectionNggState) CASE_SUBSECTION(MemberTypeUniformConstantMap, SectionUniformConstantMap) + CASE_SUBSECTION(MemberTypeOutputLocationMap, SectionOutputLocationMap) CASE_SUBSECTION(MemberTypeUniformConstantMapEntry, SectionUniformConstantMapEntry) CASE_SUBSECTION(MemberTypeXfbOutInfo, SectionXfbOutInfo) CASE_SUBSECTION(MemberTypeShaderGroup, SectionShaderGroup) diff --git a/tool/vfx/vfxSection.h b/tool/vfx/vfxSection.h index 1ac6337469..d11070f32c 100644 --- a/tool/vfx/vfxSection.h +++ b/tool/vfx/vfxSection.h @@ -133,6 +133,7 @@ enum MemberType : unsigned { MemberTypeIndirectCalleeSavedRegs, // VFX member type: SectionIndirectCalleeSavedRegs MemberTypeGpurtFuncTable, // VFX member type: SectionGpurtFuncTable MemberTypeGpurtOption, // VFX member type: SectionGpurtOption + MemberTypeOutputLocationMap, // VFX member type: SectionOutputLocationMap MemberTypeExtendedRobustness, // VFX member type: SectionExtendedRobustness MemberTypeAdvancedBlendInfo, // VFX member type: SectionAdvancedBlendInfo #if LLPC_CLIENT_INTERFACE_MAJOR_VERSION >= 73 diff --git a/tool/vfx/vfxVkSection.h b/tool/vfx/vfxVkSection.h index 147670f5be..f6596a157d 100644 --- a/tool/vfx/vfxVkSection.h +++ b/tool/vfx/vfxVkSection.h @@ -122,6 +122,45 @@ class SectionResourceMappingNode : public Section { std::vector m_nextNodeBuf; // Contains next nodes }; +// ===================================================================================================================== +// Represents one entry in a default output location map +class SectionOutputLocationMap : public Section { +public: + typedef Vkgc::OutputLocationMap SubState; + + SectionOutputLocationMap() : Section(getAddrTable(), SectionTypeUnset, "outLocationMaps") { + m_oldLocation = &m_oldLocationData; + m_newLocation = &m_newLocationData; + memset(&m_state, 0, sizeof(m_state)); + } + + SubState &getSubStateRef() { return m_state; } + + void getSubState(SubState &state) { + state = m_state; + state.oldLocation = m_oldLocationData.size() > 0 ? (uint32_t *)(&m_oldLocationData[0]) : nullptr; + state.newLocation = m_newLocationData.size() > 0 ? (uint32_t *)(&m_newLocationData[0]) : nullptr; + } + +private: + static StrToMemberAddrArrayRef getAddrTable() { + static std::vector addrTable = []() { + std::vector addrTableInitializer; + INIT_MEMBER_NAME_TO_ADDR(SectionOutputLocationMap, m_oldLocation, MemberTypeUArray, false); + INIT_MEMBER_NAME_TO_ADDR(SectionOutputLocationMap, m_newLocation, MemberTypeUArray, false); + INIT_STATE_MEMBER_NAME_TO_ADDR(SectionOutputLocationMap, count, MemberTypeUint, false); + return addrTableInitializer; + }(); + return {addrTable.data(), addrTable.size()}; + } + + SubState m_state; + std::vector *m_oldLocation; + std::vector *m_newLocation; + std::vector m_oldLocationData; + std::vector m_newLocationData; +}; + // ===================================================================================================================== // Represents one entry in a default uniform constant map class SectionUniformConstantMapEntry : public Section { @@ -258,6 +297,7 @@ class SectionShaderOption : public Section { INIT_STATE_MEMBER_NAME_TO_ADDR(SectionShaderOption, constantBufferBindingOffset, MemberTypeInt, false); INIT_STATE_MEMBER_NAME_TO_ADDR(SectionShaderOption, imageSampleDrefReturnsRgba, MemberTypeBool, false); INIT_STATE_MEMBER_NAME_TO_ADDR(SectionShaderOption, disableGlPositionOpt, MemberTypeBool, false); + INIT_STATE_MEMBER_NAME_TO_ADDR(SectionShaderOption, viewIndexFromDeviceIndex, MemberTypeBool, false); return addrTableInitializer; }(); return {addrTable.data(), addrTable.size()}; @@ -458,6 +498,7 @@ class SectionGlState : public Section { INIT_STATE_MEMBER_NAME_TO_ADDR(SectionGlState, enableLineSmooth, MemberTypeBool, false); INIT_STATE_MEMBER_NAME_TO_ADDR(SectionGlState, emulateWideLineStipple, MemberTypeBool, false); INIT_STATE_MEMBER_NAME_TO_ADDR(SectionGlState, enablePointSmooth, MemberTypeBool, false); + INIT_STATE_MEMBER_NAME_TO_ADDR(SectionGlState, enableRemapLocation, MemberTypeBool, false); return addrTableInitializer; }(); return {addrTable.data(), addrTable.size()}; @@ -536,6 +577,7 @@ class SectionPipelineOption : public Section { INIT_STATE_MEMBER_NAME_TO_ADDR(SectionPipelineOption, enableLineSmooth, MemberTypeBool, false); INIT_STATE_MEMBER_NAME_TO_ADDR(SectionPipelineOption, emulateWideLineStipple, MemberTypeBool, false); INIT_STATE_MEMBER_NAME_TO_ADDR(SectionPipelineOption, enablePointSmooth, MemberTypeBool, false); + INIT_STATE_MEMBER_NAME_TO_ADDR(SectionPipelineOption, enableRemapLocation, MemberTypeBool, false); #else INIT_MEMBER_NAME_TO_ADDR(SectionPipelineOption, m_glState, MemberTypeGlState, true); #endif @@ -895,7 +937,8 @@ class SectionGraphicsState : public Section { typedef Vkgc::GraphicsPipelineBuildInfo SubState; SectionGraphicsState() - : Section(getAddrTable(), SectionTypeGraphicsState, nullptr), m_pUniformMaps{}, m_uniformMaps{} { + : Section(getAddrTable(), SectionTypeGraphicsState, nullptr), m_pUniformMaps{}, m_uniformMaps{}, + m_outLocationMap{} { memset(&m_state, 0, sizeof(m_state)); m_usrClipPlaneMask = 0; @@ -964,7 +1007,8 @@ class SectionGraphicsState : public Section { INIT_MEMBER_NAME_TO_ADDR(SectionGraphicsState, m_shaderLibrary, MemberTypeString, false); INIT_MEMBER_NAME_TO_ADDR(SectionGraphicsState, m_rtState, MemberTypeRtState, true); INIT_STATE_MEMBER_NAME_TO_ADDR(SectionGraphicsState, enableInitUndefZero, MemberTypeBool, false); - + INIT_MEMBER_ARRAY_NAME_TO_ADDR(SectionGraphicsState, m_outLocationMaps, MemberTypeOutputLocationMap, + Vkgc::ShaderStageCount, true); INIT_MEMBER_NAME_TO_ADDR(SectionGraphicsState, m_clientMetadata, MemberTypeU8Array, false); INIT_MEMBER_ARRAY_NAME_TO_ADDR(SectionGraphicsState, m_uniformConstantMaps, MemberTypeUniformConstantMap, Vkgc::ShaderStageGfxCount, true); @@ -978,6 +1022,8 @@ class SectionGraphicsState : public Section { INIT_MEMBER_NAME_TO_ADDR(SectionGraphicsState, m_forceDisableStreamOut, MemberTypeBool, false); INIT_MEMBER_DYNARRAY_NAME_TO_ADDR(SectionGraphicsState, m_xfbOutInfo, MemberTypeXfbOutInfo, true); INIT_MEMBER_NAME_TO_ADDR(SectionGraphicsState, m_advancedBlendInfo, MemberTypeAdvancedBlendInfo, true); + INIT_MEMBER_ARRAY_NAME_TO_ADDR(SectionGraphicsState, m_outLocationMaps, MemberTypeOutputLocationMap, + Vkgc::ShaderStageCount, true); return addrTableInitializer; }(); return {addrTable.data(), addrTable.size()}; @@ -1007,6 +1053,11 @@ class SectionGraphicsState : public Section { } } + for (unsigned i = 0; i < Vkgc::ShaderStageFragment; ++i) { + m_outLocationMaps[i].getSubState(m_outLocationMap[i]); + } + m_state.outLocationMaps = m_outLocationMap; + pGlState->apiXfbOutData.forceDisableStreamOut = m_forceDisableStreamOut; if (m_xfbOutInfo.size() > 0) { pGlState->apiXfbOutData.numXfbOutInfo = static_cast(m_xfbOutInfo.size()); @@ -1050,26 +1101,28 @@ class SectionGraphicsState : public Section { SubState &getSubStateRef() { return m_state; }; private: - SectionNggState m_nggState; SubState m_state; - SectionColorBuffer m_colorBuffer[Vkgc::MaxColorTargets]; // Color buffer + bool m_forceDisableStreamOut; + unsigned m_usrClipPlaneMask; + SectionNggState m_nggState; + SectionRtState m_rtState; SectionPipelineOption m_options; + std::string m_shaderLibrary; + std::vector m_shaderLibraryBytes; Vkgc::UniformConstantMap *m_pUniformMaps[Vkgc::ShaderStageGfxCount]; Vkgc::UniformConstantMap m_uniformMaps[Vkgc::ShaderStageGfxCount]; SectionUniformConstantMap m_uniformConstantMaps[Vkgc::ShaderStageGfxCount]; - std::string m_shaderLibrary; - std::vector m_shaderLibraryBytes; - std::vector *m_clientMetadata; - std::vector m_clientMetadataBufMem; - SectionRtState m_rtState; - bool m_forceDisableStreamOut; + Vkgc::OutputLocationMap m_outLocationMap[Vkgc::ShaderStageGfxCount]; + SectionOutputLocationMap m_outLocationMaps[Vkgc::ShaderStageGfxCount]; float m_tessLevelInner[2]; float m_tessLevelOuter[4]; Vkgc::TessellationLevel m_tessLevel; std::vector m_xfbOutInfo; std::vector m_xfbOutInfoData; - unsigned m_usrClipPlaneMask; SectionAdvancedBlendInfo m_advancedBlendInfo; + std::vector *m_clientMetadata; + std::vector m_clientMetadataBufMem; + SectionColorBuffer m_colorBuffer[Vkgc::MaxColorTargets]; // Color buffer }; // ===================================================================================================================== diff --git a/util/gpurtshim/CMakeLists.txt b/util/gpurtshim/CMakeLists.txt index 05c0db7e01..f197174a12 100644 --- a/util/gpurtshim/CMakeLists.txt +++ b/util/gpurtshim/CMakeLists.txt @@ -23,7 +23,8 @@ # ####################################################################################################################### -if(VKI_RAY_TRACING AND NOT LLPC_IS_STANDALONE) +#if LLPC_RAY_TRACING +if(LLPC_RAY_TRACING AND NOT LLPC_IS_STANDALONE) # The shim is built as a separate miniature library so that the GPURT include path doesn't "leak" into the main # LLPC compile. add_library(vkgc_gpurtshim STATIC GpurtShim.cpp) @@ -35,3 +36,4 @@ if(VKI_RAY_TRACING AND NOT LLPC_IS_STANDALONE) target_link_libraries(vkgc_gpurtshim PUBLIC vkgc_headers) target_link_libraries(vkgc_gpurtshim PRIVATE gpurt) endif() +#endif diff --git a/version/CMakeLists.txt b/version/CMakeLists.txt index b00c12373c..1ce7218dea 100644 --- a/version/CMakeLists.txt +++ b/version/CMakeLists.txt @@ -63,16 +63,62 @@ if (NOT DISABLE_LLPC_VERSION_USES_LLVM) export(TARGETS llpc_version FILE llpc_version.cmake) # build-tree version endif() -### Cached Config-related Options ###################################################################################### -#if VKI_BUILD_STRIX1 -option(LLPC_BUILD_STRIX1 "LLPC support for STRIX1?" ON) -if (LLPC_BUILD_STRIX1) - target_compile_definitions(llpc_version INTERFACE LLPC_BUILD_STRIX1) -endif() +### Chip-enabling options ############################################################################################## + +# Set defaults. This serves two purposes: +# 1. On a driver build, this defines what settings we want to scrape from PAL's settings from branchdefs; the +# default value itself is overridden by PAL's setting. +# 2. On a standalone build, this defines the actual default settings. +set(DEFAULT_LLPC_BUILD +#if LLPC_BUILD_GFX11 + GFX11=ON #endif -#if VKI_BUILD_GFX115 -option(LLPC_BUILD_GFX115 "LLPC support for GFX11.5?" ON) -if (LLPC_BUILD_GFX115) - target_compile_definitions(llpc_version INTERFACE LLPC_BUILD_GFX115) -endif() +#if LLPC_BUILD_STRIX1 + STRIX1=ON +#endif +#if LLPC_BUILD_GFX115 + GFX115=ON #endif +) + +if (TARGET pal) + # On a driver build, adjust the default settings by scraping the PAL settings (from branchdefs) out of the + # pal target's INTERFACE_COMPILE_DEFINITIONS. (The PAL_* variables are not visible here.) + get_target_property(PALDEFS pal INTERFACE_COMPILE_DEFINITIONS) + list(REMOVE_DUPLICATES PALDEFS) + foreach(PALDEF IN LISTS PALDEFS) + if("${PALDEF}" MATCHES "PAL_BUILD_(.*)=(.*)") + set(DEF "${CMAKE_MATCH_1}") + set(VAL "${CMAKE_MATCH_2}") + # Handle the value being a $ generator expression. + # We rely on the input to the $ being a constant 0,1,OFF,ON,NO,YES + if ("${VAL}" MATCHES "0|OFF|NO|\\$") + set(VAL OFF) + elseif("${VAL}" MATCHES "1|ON|YES") + set(VAL ON) + else() + message(FATAL_ERROR "Unexpected value in PAL_BUILD_${DEF}=${VAL}") + endif() + # Override the entry in DEFAULT_LLPC_BUILD. + list(TRANSFORM DEFAULT_LLPC_BUILD REPLACE "${DEF}=.*" "${DEF}=${VAL}") + endif() + endforeach() +endif() + +# For each define in DEFAULT_LLPC_BUILD, provide a cached option for it (which makes it globally visible, so +# GPURT can see it), and add it to llpc_version's target_compiler_definitions. +set(LLPC_BUILD_SUMMARY "") +foreach(DEFVAL IN LISTS DEFAULT_LLPC_BUILD) + if ("${DEFVAL}" MATCHES "(.*)=(.*)") + set(DEF "${CMAKE_MATCH_1}") + set(VAL "${CMAKE_MATCH_2}") + option("LLPC_BUILD_${DEF}" "LLPC support for this chip?" "${VAL}") + if ("${LLPC_BUILD_${DEF}}") + target_compile_definitions(llpc_version INTERFACE "LLPC_BUILD_${DEF}=1") + set(LLPC_BUILD_SUMMARY "${LLPC_BUILD_SUMMARY} LLPC_BUILD_${DEF}") + endif() + endif() +endforeach() + +# Report the summary of what is enabled. +message(STATUS "LLPC_BUILD_* summary: ${LLPC_BUILD_SUMMARY}") diff --git a/version/include/llpc/GpurtIntrinsics.h b/version/include/llpc/GpurtIntrinsics.h index 911d054747..56308172b8 100644 --- a/version/include/llpc/GpurtIntrinsics.h +++ b/version/include/llpc/GpurtIntrinsics.h @@ -62,6 +62,8 @@ #endif #endif +#define PASS_32_BIT_CR 1 + //===================================================================================================================== // Continuation intrinsics // @@ -103,17 +105,17 @@ // Enqueue // ------- // Enqueue just jumps to the function at the given address. Enqueue is noreturn, and following code is unreachable. -// _AmdEnqueue*(uint64_t addr, ...) +// _AmdEnqueue*(uint32_t addr, ...) #define DECLARE_ENQUEUE(Suffix, ...) GPURT_DECL \ - void _AmdEnqueue##Suffix(uint64_t addr, __VA_ARGS__) DUMMY_VOID_FUNC + void _AmdEnqueue##Suffix(uint32_t addr, __VA_ARGS__) DUMMY_VOID_FUNC // // WaitEnqueue // ----------- // WaitEnqueue waits until all lanes in the mask also have enqueued the same wait mask before performing the Enqueue. // Generic function arguments start with the third argument. -// _AmdWaitEnqueue*(uint64_t addr, uint64_t waitMask, uint32_t csp, ...) +// _AmdWaitEnqueue*(uint32_t addr, uint64_t waitMask, uint32_t csp, ...) #define DECLARE_WAIT_ENQUEUE(Suffix, ...) GPURT_DECL \ - void _AmdWaitEnqueue##Suffix(uint64_t addr, uint64_t waitMask, __VA_ARGS__) DUMMY_VOID_FUNC + void _AmdWaitEnqueue##Suffix(uint32_t addr, uint64_t waitMask, __VA_ARGS__) DUMMY_VOID_FUNC // // Complete // -------- @@ -134,26 +136,26 @@ GPURT_DECL void _AmdComplete() DUMMY_VOID_FUNC // Any state in the containing function that is still needed in the resume function is stored in the continuation state // managed by the compiler. // Just like with enqueue, there is a waiting variant _AmdWaitAwait that waits on running the passed function. -// ReturnTy _AmdAwait*(uint64_t addr, ...) +// ReturnTy _AmdAwait*(uint32_t addr, ...) #define DECLARE_AWAIT(Suffix, ReturnTy, ...) GPURT_DECL \ - ReturnTy _AmdAwait##Suffix(uint64_t addr, __VA_ARGS__) DUMMY_GENERIC_FUNC((ReturnTy)0) + ReturnTy _AmdAwait##Suffix(uint32_t addr, __VA_ARGS__) DUMMY_GENERIC_FUNC((ReturnTy)0) -// ReturnTy _AmdWaitAwait*(uint64_t addr, uint64_t waitMask, ...) +// ReturnTy _AmdWaitAwait*(uint32_t addr, uint64_t waitMask, ...) #define DECLARE_WAIT_AWAIT(Suffix, ReturnTy, ...) GPURT_DECL \ - ReturnTy _AmdWaitAwait##Suffix(uint64_t addr, uint64_t waitMask, __VA_ARGS__) DUMMY_GENERIC_FUNC((ReturnTy)0) + ReturnTy _AmdWaitAwait##Suffix(uint32_t addr, uint64_t waitMask, __VA_ARGS__) DUMMY_GENERIC_FUNC((ReturnTy)0) // // GetResumePointAddr // ------------------ // Returns the address of the resume function of the next resume point, i.e. at the next Await intrinsic. // Forbidden if the call site does not dominate a unique suspend point. // If this intrinsic is used, the implicit return address argument is removed from the next Await call. -GPURT_DECL uint64_t _AmdGetResumePointAddr() DUMMY_GENERIC_FUNC(0) +GPURT_DECL uint32_t _AmdGetResumePointAddr() DUMMY_GENERIC_FUNC(0) // // GetCurrentFuncAddr // ------------------ // Returns the address of the caller function making this intrinsic call, after inlining and continuation function splitting. -GPURT_DECL uint64_t _AmdGetCurrentFuncAddr() DUMMY_GENERIC_FUNC(0) +GPURT_DECL uint32_t _AmdGetCurrentFuncAddr() DUMMY_GENERIC_FUNC(0) // // GetShaderRecordIndex // -------- diff --git a/version/include/llpcVersion.h.in b/version/include/llpcVersion.h.in index 13d6bfaee0..8ab75db3e6 100644 --- a/version/include/llpcVersion.h.in +++ b/version/include/llpcVersion.h.in @@ -37,6 +37,7 @@ // %Version History // | %Version | Change Description | // | -------- | ----------------------------------------------------------------------------------------------------- | +// | 75.6 | Add enableRemapLocation to PipelineOptions. Add outLocationMaps to GraphicsPipelineBuildInfo. | // | 75.5 | Add optimizePointSizeWrite to PipelineShaderOptions in order to optimize the case PointSize = 1.0. | // | 75.4 | Add disableGlPositionOpt to PipelineShaderOptions. | // | 75.3 | Add enableInitUndefZero to GraphicPipelineBuildInfo | @@ -197,7 +198,7 @@ #define LLPC_INTERFACE_MAJOR_VERSION 75 /// LLPC minor interface version. -#define LLPC_INTERFACE_MINOR_VERSION 5 +#define LLPC_INTERFACE_MINOR_VERSION 6 /// The client's LLPC major interface version #ifndef LLPC_CLIENT_INTERFACE_MAJOR_VERSION