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Customizing_RISC_V

Implementing ORB Feature detection algorithm on RISC-V Core

This repository uses files from cliffordwolf's picoRV32 CPU Core (https://github.com/cliffordwolf/picorv32). The aim is to be able to run the ORB Feature detection algorithm on the CPU core and later optimize the core for faster implementation of the algorithm.

Folders/Files in this Repository

picorv32.v

Verilog file for the CPU core.

firmware

The necessary firmware files (Taken from the cliffordwolf's repository) to run the picoRV32 core and generate a .hex file.

Test_Progs

Sample C programs tested on the core.

Runs

The Makefile, testbench, linker script (sections.lds), sample C program and other standard C library files and syscalls.

Firmware_Trial (Not Finished)

An attempt to white a shell file to compile and run the C code and simulate the core using iverilog.

Prerequisites to run the CPU core

Building the core and loading the hex file

To Run the modified dhrystone example in Runs folder, Run the makefile from the terminal -

make dhry.hex
make test

Sample program's output

A sample C code for findind the sum of numbers from 1 to 200 was executed on the picoRV32 core. Sample Output

Sample Output Waveform (GTK Wave)

The signals for the above program were viewed using GTKWave waveform viewer (.vcd file) Sample output Waveform (GTK Wave)

TO-DO