use CY_SYSINT_INTRSRC_MUXIRQ_SHIFT instead of 16

[rvxfahim]

just a suggestion for users working CYT2B75CAS (CM4 and CM0) core.

const cy_stc_sysint_t IRQ_CFG_PERIPHERAL =
{
    .intrSrc  = ((NvicMux5_IRQn << 16) | tcpwm_0_interrupts_0_IRQn),
    // .intrSrc = tcpwm_0_interrupts_0_IRQn,
    .intrPriority = 3UL
};

trying to take this example will not work on cm4 core and its better to replace the magic number "16" with "CY_SYSINT_INTRSRC_MUXIRQ_SHIFT"

I had to spend 6 hours to find out why my interrupt was not firing.

Request to Infineon please provide some examples/ modify existing examples to be compatible with CYT2B7