Skip to content

Latest commit

 

History

History
5 lines (3 loc) · 238 Bytes

README.md

File metadata and controls

5 lines (3 loc) · 238 Bytes

FPGA_LABS

VHDL written for Cyclone III FPGA

The decoder7seg is used as the top_level to run code on the fpga. All code works 100%. The code used for the VGA image output can be tweaked to output any image on a vga compatible monitor.