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Hello.
It is not an issue but maybe feature request or maybe any advice if such feature not available.
We are looking for a way to develop truly 16-64 channel gateway without access to Semtech reference desing V2 which provides such functionality for SX1301 based gateways by using external FPGA. We don't have access to that reference design so looking for any workaround to significantly encrease capacity of single gateway.
After lot of googling we found possible solution by splitting list of spread factors (5,6,7,8,9,10,11,12) between available SX1302's. By chan_multiSF_All option in configuration. But it looks applicable for SX1302 based gateways only as it utilizes register number 357 while SX1301 has 326 registers in total.
As registers not described in datasheet for SX1301 we are wondering about ability to implement similar SF limitation for SX1301 by setting/clearing bits in any listed registers. Does it possible or SX1301 doesn't have such ability and it is hardcoded to listen for all 8 available spread factors?
If it is not possible could someone please give any advice how to achieve our target goal (increasing capacity of single gateway) based on SX1301?
Also we would like to hear any opinion whether splitting by SF for SX1302 will do the trick actually or not?
Thank you in advance.
The text was updated successfully, but these errors were encountered:
Hello.
It is not an issue but maybe feature request or maybe any advice if such feature not available.
We are looking for a way to develop truly 16-64 channel gateway without access to Semtech reference desing V2 which provides such functionality for SX1301 based gateways by using external FPGA. We don't have access to that reference design so looking for any workaround to significantly encrease capacity of single gateway.
After lot of googling we found possible solution by splitting list of spread factors (5,6,7,8,9,10,11,12) between available SX1302's. By chan_multiSF_All option in configuration. But it looks applicable for SX1302 based gateways only as it utilizes register number 357 while SX1301 has 326 registers in total.
As registers not described in datasheet for SX1301 we are wondering about ability to implement similar SF limitation for SX1301 by setting/clearing bits in any listed registers. Does it possible or SX1301 doesn't have such ability and it is hardcoded to listen for all 8 available spread factors?
If it is not possible could someone please give any advice how to achieve our target goal (increasing capacity of single gateway) based on SX1301?
Also we would like to hear any opinion whether splitting by SF for SX1302 will do the trick actually or not?
Thank you in advance.
The text was updated successfully, but these errors were encountered: