diff --git a/lib/geom/sched/Makefile b/lib/geom/sched/Makefile deleted file mode 100644 index 681ed7253c..0000000000 --- a/lib/geom/sched/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# GEOM_LIBRARY_PATH - -PACKAGE=runtime -.PATH: ${.CURDIR:H:H}/misc - -GEOM_CLASS= sched - -.include diff --git a/lib/geom/sched/Makefile.depend b/lib/geom/sched/Makefile.depend deleted file mode 100644 index d07a313ea1..0000000000 --- a/lib/geom/sched/Makefile.depend +++ /dev/null @@ -1,18 +0,0 @@ -# Autogenerated - do NOT edit! - -DIRDEPS = \ - gnu/lib/csu \ - include \ - include/xlocale \ - lib/${CSU_DIR} \ - lib/libc \ - lib/libcompiler_rt \ - lib/libgeom \ - sbin/geom/core \ - - -.include - -.if ${DEP_RELDIR} == ${_DEP_RELDIR} -# local dependencies - needed for -jN in clean tree -.endif diff --git a/lib/geom/sched/geom_sched.c b/lib/geom/sched/geom_sched.c deleted file mode 100644 index 48bf09b452..0000000000 --- a/lib/geom/sched/geom_sched.c +++ /dev/null @@ -1,127 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2009 Fabio Checconi - * Copyright (c) 2010 Luigi Rizzo, Universita` di Pisa - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * $Id$ - * - * This file implements the userspace library used by the 'geom' - * command to load and manipulate disk schedulers. - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include "core/geom.h" -#include "misc/subr.h" - -#define G_SCHED_VERSION 0 - -uint32_t lib_version = G_LIB_VERSION; -uint32_t version = G_SCHED_VERSION; - -/* - * storage for parameters used by this geom class. - * Right now only the scheduler name is used. - */ -#define GSCHED_ALGO "rr" /* default scheduler */ - -/* - * Adapt to differences in geom library. - * in V1 struct g_command misses gc_argname, eld, and G_BOOL is undefined - */ -#if G_LIB_VERSION <= 1 -#define G_TYPE_BOOL G_TYPE_NUMBER -#endif -#if G_LIB_VERSION >= 3 && G_LIB_VERSION <= 4 -#define G_ARGNAME NULL, -#else -#define G_ARGNAME -#endif - -static void -gcmd_createinsert(struct gctl_req *req, unsigned flags __unused) -{ - const char *reqalgo; - char name[64]; - - if (gctl_has_param(req, "algo")) - reqalgo = gctl_get_ascii(req, "algo"); - else - reqalgo = GSCHED_ALGO; - - snprintf(name, sizeof(name), "gsched_%s", reqalgo); - /* - * Do not complain about errors here, gctl_issue() - * will fail anyway. - */ - if (modfind(name) < 0) - kldload(name); - gctl_issue(req); -} - -struct g_command class_commands[] = { - { "create", G_FLAG_VERBOSE | G_FLAG_LOADKLD, gcmd_createinsert, - { - { 'a', "algo", GSCHED_ALGO, G_TYPE_STRING }, - G_OPT_SENTINEL - }, - G_ARGNAME "[-v] [-a algorithm_name] dev ..." - }, - { "insert", G_FLAG_VERBOSE | G_FLAG_LOADKLD, gcmd_createinsert, - { - { 'a', "algo", GSCHED_ALGO, G_TYPE_STRING }, - G_OPT_SENTINEL - }, - G_ARGNAME "[-v] [-a algorithm_name] dev ..." - }, - { "configure", G_FLAG_VERBOSE, NULL, - { - { 'a', "algo", GSCHED_ALGO, G_TYPE_STRING }, - G_OPT_SENTINEL - }, - G_ARGNAME "[-v] [-a algorithm_name] prov ..." - }, - { "destroy", G_FLAG_VERBOSE, NULL, - { - { 'f', "force", NULL, G_TYPE_BOOL }, - G_OPT_SENTINEL - }, - G_ARGNAME "[-fv] prov ..." - }, - { "reset", G_FLAG_VERBOSE, NULL, G_NULL_OPTS, - G_ARGNAME "[-v] prov ..." - }, - G_CMD_SENTINEL -}; diff --git a/lib/geom/sched/gsched.8 b/lib/geom/sched/gsched.8 deleted file mode 100644 index 7cc977b0db..0000000000 --- a/lib/geom/sched/gsched.8 +++ /dev/null @@ -1,161 +0,0 @@ -.\" Copyright (c) 2009-2010 Fabio Checconi -.\" Copyright (c) 2009-2010 Luigi Rizzo, Universita` di Pisa -.\" All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.\" -.Dd July 26, 2012 -.Dt GSCHED 8 -.Os -.Sh NAME -.Nm gsched -.Nd "control utility for disk scheduler GEOM class" -.Sh SYNOPSIS -.Nm -.Cm create -.Op Fl v -.Op Fl a Ar algorithm -.Ar provider ... -.Nm -.Cm insert -.Op Fl v -.Op Fl a Ar algorithm -.Ar provider ... -.Nm -.Cm configure -.Op Fl v -.Op Fl a Ar algorithm -.Ar node ... -.Nm -.Cm destroy -.Op Fl fv -.Ar node ... -.Nm -.Cm reset -.Op Fl v -.Ar node ... -.Nm -.Cm { list | status | load | unload } -.Sh DESCRIPTION -The -.Nm -utility (also callable as -.Nm geom sched ... ) -changes the scheduling policy of the requests going to a provider. -.Pp -The first argument to -.Nm -indicates an action to be performed: -.Bl -tag -width ".Cm configure" -.It Cm create -Create a new provider and geom node using the specified scheduling algorithm. -.Ar algorithm -is the name of the scheduling algorithm used for the provider. -Available algorithms include: -.Ar rr , -which implements anticipatory scheduling with round robin service -among clients; -.Ar as , -which implements a simple form of anticipatory scheduling with -no per-client queue. -.Pp -If the operation succeeds, the new provider should appear with name -.Pa /dev/ Ns Ao Ar dev Ac Ns Pa .sched. . -The kernel module -.Pa geom_sched.ko -will be loaded if it is not loaded already. -.It Cm insert -Operates as "create", but the insertion is "transparent", -i.e. the existing provider is rerouted to the newly created geom, -which in turn forwards requests to the existing geom. -This operation allows one to start/stop a scheduling service -on an already existing provider. -.Pp -A subsequent "destroy" will remove the newly created geom and -hook the provider back to the original geom. -.It Cm configure -Configure existing scheduling provider. It supports the same options -as the -.Nm create -command. -.It Cm destroy -Destroy the geom specified in the parameter. -.It Cm reset -Do nothing. -.It Cm list | status | load | unload -See -.Xr geom 8 . -.El -.Pp -Additional options: -.Bl -tag -width ".Fl f" -.It Fl f -Force the removal of the specified provider. -.It Fl v -Be more verbose. -.El -.Sh SYSCTL VARIABLES -The following -.Xr sysctl 8 -variables can be used to control the behavior of the -.Nm SCHED -GEOM class. -The default value is shown next to each variable. -.Bl -tag -width indent -.It Va kern.geom.sched.debug : No 0 -Debug level of the -.Nm SCHED -GEOM class. -This can be set to a number between 0 and 2 inclusive. -If set to 0 minimal debug information is printed, and if set to 2 the -maximum amount of debug information is printed. -.El -.Sh EXIT STATUS -Exit status is 0 on success, and 1 if the command fails. -.Sh EXAMPLES -The following example shows how to create a scheduling provider for disk -.Pa /dev/ada0 , -and how to destroy it. -.Bd -literal -offset indent -# Load the geom_sched module: -kldload geom_sched -# Load some scheduler classes used by geom_sched: -kldload gsched_rr -# Configure device ada0 to use scheduler "rr": -geom sched insert -a rr ada0 -# Now provider ada0 uses the "rr" algorithm; -# the new geom is ada0.sched. -# Remove the scheduler on the device: -geom sched destroy -v ada0.sched. -.Ed -.Sh SEE ALSO -.Xr geom 4 , -.Xr geom 8 -.Sh HISTORY -The -.Nm -utility first appeared in -.Fx 8.1 . -.Sh AUTHORS -.An Fabio Checconi Aq Mt fabio@FreeBSD.org -.An Luigi Rizzo Aq Mt luigi@FreeBSD.org diff --git a/lib/libalias/modules/cuseeme/Makefile b/lib/libalias/modules/cuseeme/Makefile deleted file mode 100644 index 2fce5a5e4d..0000000000 --- a/lib/libalias/modules/cuseeme/Makefile +++ /dev/null @@ -1,5 +0,0 @@ - -NAME= cuseeme -SRCS= alias_cuseeme.c - -.include diff --git a/lib/libalias/modules/cuseeme/Makefile.depend b/lib/libalias/modules/cuseeme/Makefile.depend deleted file mode 100644 index 84b8ddd67e..0000000000 --- a/lib/libalias/modules/cuseeme/Makefile.depend +++ /dev/null @@ -1,16 +0,0 @@ -# Autogenerated - do NOT edit! - -DIRDEPS = \ - gnu/lib/csu \ - include \ - include/xlocale \ - lib/${CSU_DIR} \ - lib/libc \ - lib/libcompiler_rt \ - - -.include - -.if ${DEP_RELDIR} == ${_DEP_RELDIR} -# local dependencies - needed for -jN in clean tree -.endif diff --git a/lib/libc/amd64/gen/getcontextx.c b/lib/libc/amd64/gen/getcontextx.c deleted file mode 100644 index acbdb65776..0000000000 --- a/lib/libc/amd64/gen/getcontextx.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * Copyright (c) 2011 Konstantin Belousov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/amd64/gen/getcontextx.c 331722 2018-03-29 02:50:57Z eadler $"); - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static int xstate_sz = -1; - -int -__getcontextx_size(void) -{ - u_int p[4]; - - if (xstate_sz == -1) { - do_cpuid(1, p); - if ((p[2] & CPUID2_OSXSAVE) != 0) { - cpuid_count(0xd, 0x0, p); - xstate_sz = p[1] - sizeof(struct savefpu); - } else - xstate_sz = 0; - } - - return (sizeof(ucontext_t) + xstate_sz); -} - -int -__fillcontextx2(char *ctx) -{ - struct amd64_get_xfpustate xfpu; - ucontext_t *ucp; - - ucp = (ucontext_t *)ctx; - if (xstate_sz != 0) { - xfpu.addr = (char *)(ucp + 1); - xfpu.len = xstate_sz; - if (sysarch(AMD64_GET_XFPUSTATE, &xfpu) == -1) - return (-1); - ucp->uc_mcontext.mc_xfpustate = (__register_t)xfpu.addr; - ucp->uc_mcontext.mc_xfpustate_len = xstate_sz; - ucp->uc_mcontext.mc_flags |= _MC_HASFPXSTATE; - } else { - ucp->uc_mcontext.mc_xfpustate = 0; - ucp->uc_mcontext.mc_xfpustate_len = 0; - } - return (0); -} - -int -__fillcontextx(char *ctx) -{ - ucontext_t *ucp; - - ucp = (ucontext_t *)ctx; - if (getcontext(ucp) == -1) - return (-1); - __fillcontextx2(ctx); - return (0); -} - -__weak_reference(__getcontextx, getcontextx); - -ucontext_t * -__getcontextx(void) -{ - char *ctx; - int error; - - ctx = malloc(__getcontextx_size()); - if (ctx == NULL) - return (NULL); - if (__fillcontextx(ctx) == -1) { - error = errno; - free(ctx); - errno = error; - return (NULL); - } - return ((ucontext_t *)ctx); -} diff --git a/lib/libc/arm/string/ffs.S b/lib/libc/arm/string/ffs.S deleted file mode 100644 index c2d71a3434..0000000000 --- a/lib/libc/arm/string/ffs.S +++ /dev/null @@ -1,87 +0,0 @@ -/* $NetBSD: ffs.S,v 1.5 2003/04/05 23:08:52 bjh21 Exp $ */ -/* - * Copyright (c) 2001 Christopher Gilbert - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the company nor the name of the author may be used to - * endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, - * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - - -.syntax unified - -/* - * ffs - find first set bit, this algorithm isolates the first set - * bit, then multiplies the number by 0x0450fbaf which leaves the top - * 6 bits as an index into the table. This algorithm should be a win - * over the checking each bit in turn as per the C compiled version. - * - * under ARMv5 there's an instruction called CLZ (count leading Zero's) that - * could be used - * - * This is the ffs algorithm devised by d.seal and posted to comp.sys.arm on - * 16 Feb 1994. - */ - -ENTRY(ffs) - /* Standard trick to isolate bottom bit in r0 or 0 if r0 = 0 on entry */ - rsb r1, r0, #0 - ands r0, r0, r1 -#ifndef _ARM_ARCH_5 - /* - * now r0 has at most one set bit, call this X - * if X = 0, all further instructions are skipped - */ - adrne r2, .L_ffs_table - orrne r0, r0, r0, lsl #4 /* r0 = X * 0x11 */ - orrne r0, r0, r0, lsl #6 /* r0 = X * 0x451 */ - rsbne r0, r0, r0, lsl #16 /* r0 = X * 0x0450fbaf */ - - /* now lookup in table indexed on top 6 bits of r0 */ - ldrbne r0, [ r2, r0, lsr #26 ] - - RET -.text; -.type .L_ffs_table, _ASM_TYPE_OBJECT; -.L_ffs_table: -/* 0 1 2 3 4 5 6 7 */ - .byte 0, 1, 2, 13, 3, 7, 0, 14 /* 0- 7 */ - .byte 4, 0, 8, 0, 0, 0, 0, 15 /* 8-15 */ - .byte 11, 5, 0, 0, 9, 0, 0, 26 /* 16-23 */ - .byte 0, 0, 0, 0, 0, 22, 28, 16 /* 24-31 */ - .byte 32, 12, 6, 0, 0, 0, 0, 0 /* 32-39 */ - .byte 10, 0, 0, 25, 0, 0, 21, 27 /* 40-47 */ - .byte 31, 0, 0, 0, 0, 24, 0, 20 /* 48-55 */ - .byte 30, 0, 23, 19, 29, 18, 17, 0 /* 56-63 */ -#else - itt ne - clzne r0, r0 - rsbne r0, r0, #32 - RET -#endif -END(ffs) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/i386/string/ffs.S b/lib/libc/i386/string/ffs.S deleted file mode 100644 index 8cf33c42e7..0000000000 --- a/lib/libc/i386/string/ffs.S +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 1993 Winning Strategies, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Winning Strategies, Inc. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -/* - * ffs(value) - * finds the first bit set in value and returns the index of - * that bit. Bits are numbered starting from 1, starting at the - * rightmost bit. A return value of 0 means that the argument - * was zero. - * - * Written by: - * J.T. Conklin (jtc@wimsey.com), Winning Strategies, Inc. - */ - -ENTRY(ffs) - bsfl 4(%esp),%eax - jz L1 /* ZF is set if all bits are 0 */ - incl %eax /* bits numbered from 1, not 0 */ - ret - - .align 2 -L1: xorl %eax,%eax /* clear result */ - ret -END(ffs) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/i386/string/memchr.S b/lib/libc/i386/string/memchr.S deleted file mode 100644 index a529711bea..0000000000 --- a/lib/libc/i386/string/memchr.S +++ /dev/null @@ -1,60 +0,0 @@ -/* - * Copyright (c) 1993 Winning Strategies, Inc. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Winning Strategies, Inc. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -/* - * memchr (b, c, len) - * locates the first occurrence of c in string b. - * - * Written by: - * J.T. Conklin (jtc@wimsey.com), Winning Strategies, Inc. - */ - -ENTRY(memchr) - pushl %edi - movl 8(%esp),%edi /* string address */ - movl 12(%esp),%eax /* set character to search for */ - movl 16(%esp),%ecx /* set length of search */ - testl %esp,%esp /* clear Z flag, for len == 0 */ - cld /* set search forward */ - repne /* search! */ - scasb - jnz L1 /* scan failed, return null */ - leal -1(%edi),%eax /* adjust result of scan */ - popl %edi - ret - .align 2,0x90 -L1: xorl %eax,%eax - popl %edi - ret -END(memchr) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/gen/getcontextx.c b/lib/libc/powerpc/gen/getcontextx.c deleted file mode 100644 index 607a133dfe..0000000000 --- a/lib/libc/powerpc/gen/getcontextx.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (c) 2011 Konstantin Belousov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD: stable/10/lib/libc/powerpc/gen/getcontextx.c 251047 2013-05-28 04:54:16Z kib $"); - -#include -#include -#include -#include - -int -__getcontextx_size(void) -{ - - return (sizeof(ucontext_t)); -} - -int -__fillcontextx2(char *ctx) -{ - - return (0); -} - -int -__fillcontextx(char *ctx) -{ - ucontext_t *ucp; - - ucp = (ucontext_t *)ctx; - return (getcontext(ucp)); -} - -__weak_reference(__getcontextx, getcontextx); - -ucontext_t * -__getcontextx(void) -{ - char *ctx; - int error; - - ctx = malloc(__getcontextx_size()); - if (ctx == NULL) - return (NULL); - if (__fillcontextx(ctx) == -1) { - error = errno; - free(ctx); - errno = error; - return (NULL); - } - return ((ucontext_t *)ctx); -} diff --git a/lib/libc/powerpc/sys/brk.S b/lib/libc/powerpc/sys/brk.S deleted file mode 100644 index 0e6ae349fc..0000000000 --- a/lib/libc/powerpc/sys/brk.S +++ /dev/null @@ -1,76 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: brk.S,v 1.9 2000/06/26 06:25:43 kleink Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/powerpc/sys/brk.S 272362 2014-10-01 15:00:21Z bapt $"); - -#include "SYS.h" - - .globl HIDENAME(curbrk) - .globl HIDENAME(minbrk) - .globl CNAME(_end) - - .data -HIDENAME(minbrk): - .long CNAME(_end) - - .text - -ENTRY(brk) -#ifdef PIC - mflr %r10 - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr %r9 - mtlr %r10 - lwz %r5,HIDENAME(minbrk)@got(%r9) - lwz %r6,0(%r5) -#else - lis %r5,HIDENAME(minbrk)@ha - lwz %r6,HIDENAME(minbrk)@l(%r5) -#endif - cmplw %r6,%r3 /* if (minbrk <= r3) */ - bgt 0f - mr %r6,%r3 /* r6 = r3 */ -0: - mr %r3,%r6 /* new break value */ - li %r0,SYS_break - sc /* assume, that r5 is kept */ - bso 1f -#ifdef PIC - lwz %r7,HIDENAME(curbrk)@got(%r9) - stw %r6,0(%r7) -#else - lis %r7,HIDENAME(curbrk)@ha /* record new break */ - stw %r6,HIDENAME(curbrk)@l(%r7) -#endif - blr /* return 0 */ - -1: - b PIC_PLT(HIDENAME(cerror)) -END(brk) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/sys/exect.S b/lib/libc/powerpc/sys/exect.S deleted file mode 100644 index 8a67208593..0000000000 --- a/lib/libc/powerpc/sys/exect.S +++ /dev/null @@ -1,42 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: exect.S,v 1.3 1998/05/25 15:28:03 ws Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/powerpc/sys/exect.S 272362 2014-10-01 15:00:21Z bapt $"); - -#include "SYS.h" - -ENTRY(exect) - li %r0,SYS_execve - sc - bso 1f - blr -1: - b PIC_PLT(HIDENAME(cerror)) -END(exect) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/sys/pipe.S b/lib/libc/powerpc/sys/pipe.S deleted file mode 100644 index 6470353004..0000000000 --- a/lib/libc/powerpc/sys/pipe.S +++ /dev/null @@ -1,45 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: pipe.S,v 1.6 2000/09/28 08:38:54 kleink Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/10/lib/libc/powerpc/sys/pipe.S 217398 2011-01-14 11:33:40Z kib $"); - -#include "SYS.h" - -ENTRY(pipe) - mr %r5,%r3 /* save pointer */ - li %r0,SYS_pipe - sc /* r5 is preserved */ - bso 1f - stw %r3,0(%r5) /* success, store fds */ - stw %r4,4(%r5) - li %r3,0 - blr /* and return 0 */ -1: - b PIC_PLT(HIDENAME(cerror)) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/sys/sbrk.S b/lib/libc/powerpc/sys/sbrk.S deleted file mode 100644 index 069470bb54..0000000000 --- a/lib/libc/powerpc/sys/sbrk.S +++ /dev/null @@ -1,73 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: sbrk.S,v 1.8 2000/06/26 06:25:44 kleink Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/powerpc/sys/sbrk.S 272362 2014-10-01 15:00:21Z bapt $"); - -#include "SYS.h" - - .globl HIDENAME(curbrk) - .globl CNAME(_end) - - .data -HIDENAME(curbrk): - .long CNAME(_end) - - .text -ENTRY(sbrk) - -#ifdef PIC - mflr %r10 - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr %r5 - mtlr %r10 - lwz %r5,HIDENAME(curbrk)@got(%r5) - lwz %r6,0(%r5) -#else - lis %r5,HIDENAME(curbrk)@ha - lwz %r6,HIDENAME(curbrk)@l(%r5) /* r6 = old break */ -#endif - cmpwi %r3,0 /* sbrk(0) - return curbrk */ - beq 1f - add %r3,%r3,%r6 - mr %r7,%r3 /* r7 = new break */ - li %r0,SYS_break - sc /* break(new_break) */ - bso 2f -#ifdef PIC - stw %r7,0(%r5) -#else - stw %r7,HIDENAME(curbrk)@l(%r5) /* record new break */ -#endif -1: - mr %r3,%r6 /* set return value */ - blr -2: - b PIC_PLT(HIDENAME(cerror)) -END(sbrk) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc/sys/setlogin.S b/lib/libc/powerpc/sys/setlogin.S deleted file mode 100644 index 15fa934789..0000000000 --- a/lib/libc/powerpc/sys/setlogin.S +++ /dev/null @@ -1,51 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: setlogin.S,v 1.3 1998/11/24 11:14:57 tsubai Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/powerpc/sys/setlogin.S 217398 2011-01-14 11:33:40Z kib $"); - -#include "SYS.h" - - .globl CNAME(_logname_valid) /* in _getlogin() */ - -SYSCALL(setlogin) -#ifdef PIC - mflr %r10 - bl _GLOBAL_OFFSET_TABLE_@local-4 - mflr %r4 - lwz %r4,CNAME(_logname_valid)@got(%r4) - li %r5,%r0 - stw %r5,0(%r4) - mtlr %r10 -#else - lis %r4,CNAME(_logname_valid)@ha - li %r5,0 - stw %r5,CNAME(_logname_valid)@l(%r4) -#endif - blr - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/gen/getcontextx.c b/lib/libc/powerpc64/gen/getcontextx.c deleted file mode 100644 index 8e6ea428e7..0000000000 --- a/lib/libc/powerpc64/gen/getcontextx.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * Copyright (c) 2011 Konstantin Belousov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD: stable/10/lib/libc/powerpc64/gen/getcontextx.c 251047 2013-05-28 04:54:16Z kib $"); - -#include -#include -#include -#include - -int -__getcontextx_size(void) -{ - - return (sizeof(ucontext_t)); -} - -int -__fillcontextx2(char *ctx) -{ - - return (0); -} - -int -__fillcontextx(char *ctx) -{ - ucontext_t *ucp; - - ucp = (ucontext_t *)ctx; - return (getcontext(ucp)); -} - -__weak_reference(__getcontextx, getcontextx); - -ucontext_t * -__getcontextx(void) -{ - char *ctx; - int error; - - ctx = malloc(__getcontextx_size()); - if (ctx == NULL) - return (NULL); - if (__fillcontextx(ctx) == -1) { - error = errno; - free(ctx); - errno = error; - return (NULL); - } - return ((ucontext_t *)ctx); -} diff --git a/lib/libc/powerpc64/sys/brk.S b/lib/libc/powerpc64/sys/brk.S deleted file mode 100644 index d1d131f2d5..0000000000 --- a/lib/libc/powerpc64/sys/brk.S +++ /dev/null @@ -1,74 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: brk.S,v 1.9 2000/06/26 06:25:43 kleink Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/powerpc64/sys/brk.S 272362 2014-10-01 15:00:21Z bapt $"); - -#include "SYS.h" - - .globl HIDENAME(curbrk) - .globl HIDENAME(minbrk) - .globl CNAME(_end) - - .data - .align 3 -HIDENAME(minbrk): - .llong CNAME(_end) - - .text - -ENTRY(brk) - addis %r6,%r2,HIDENAME(minbrk)@toc@ha - ld %r6,HIDENAME(minbrk)@toc@l(%r6) - cmpld %r6,%r3 /* if (minbrk <= r3) */ - bgt 0f - mr %r6,%r3 /* r6 = r3 */ -0: - mr %r3,%r6 /* new break value */ - li %r0,SYS_break - sc /* assume, that r5 is kept */ - bso 1f - - /* record new break */ - addis %r7,%r2,HIDENAME(curbrk)@toc@ha - std %r6,HIDENAME(curbrk)@toc@l(%r7) - - blr /* return 0 */ - -1: - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - bl HIDENAME(cerror) - nop - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -END(brk) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/sys/exect.S b/lib/libc/powerpc64/sys/exect.S deleted file mode 100644 index bc0bf831a9..0000000000 --- a/lib/libc/powerpc64/sys/exect.S +++ /dev/null @@ -1,50 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: exect.S,v 1.3 1998/05/25 15:28:03 ws Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/powerpc64/sys/exect.S 272362 2014-10-01 15:00:21Z bapt $"); - -#include "SYS.h" - -ENTRY(exect) - li %r0,SYS_execve - sc - bso 1f - blr -1: - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - bl HIDENAME(cerror) - nop - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -END(exect) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/sys/pipe.S b/lib/libc/powerpc64/sys/pipe.S deleted file mode 100644 index 6a4fc89d2f..0000000000 --- a/lib/libc/powerpc64/sys/pipe.S +++ /dev/null @@ -1,53 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: pipe.S,v 1.6 2000/09/28 08:38:54 kleink Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/10/lib/libc/powerpc64/sys/pipe.S 218824 2011-02-18 21:44:53Z nwhitehorn $"); - -#include "SYS.h" - -ENTRY(pipe) - mr %r5,%r3 /* save pointer */ - li %r0,SYS_pipe - sc /* r5 is preserved */ - bso 1f - stw %r3,0(%r5) /* success, store fds */ - stw %r4,4(%r5) - li %r3,0 - blr /* and return 0 */ -1: - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - bl HIDENAME(cerror) - nop - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/sys/sbrk.S b/lib/libc/powerpc64/sys/sbrk.S deleted file mode 100644 index 0d743131df..0000000000 --- a/lib/libc/powerpc64/sys/sbrk.S +++ /dev/null @@ -1,69 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: sbrk.S,v 1.8 2000/06/26 06:25:44 kleink Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/powerpc64/sys/sbrk.S 272362 2014-10-01 15:00:21Z bapt $"); - -#include "SYS.h" - - .globl HIDENAME(curbrk) - .globl CNAME(_end) - - .data - .align 3 -HIDENAME(curbrk): - .llong CNAME(_end) - - .text -ENTRY(sbrk) - addis %r5,%r2,HIDENAME(curbrk)@toc@ha - addi %r5,%r5,HIDENAME(curbrk)@toc@l - ld %r6,0(%r5) /* r6 = old break */ - cmpdi %r3,0 /* sbrk(0) - return curbrk */ - beq 1f - add %r3,%r3,%r6 - mr %r7,%r3 /* r7 = new break */ - li %r0,SYS_break - sc /* break(new_break) */ - bso 2f - std %r7,0(%r5) -1: - mr %r3,%r6 /* set return value */ - blr -2: - mflr %r0 - std %r0,16(%r1) - stdu %r1,-48(%r1) - bl HIDENAME(cerror) - nop - ld %r1,0(%r1) - ld %r0,16(%r1) - mtlr %r0 - blr -END(sbrk) - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/powerpc64/sys/setlogin.S b/lib/libc/powerpc64/sys/setlogin.S deleted file mode 100644 index 3569337e61..0000000000 --- a/lib/libc/powerpc64/sys/setlogin.S +++ /dev/null @@ -1,41 +0,0 @@ -/*- - * Copyright (c) 2002 Peter Grehan. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -/* $NetBSD: setlogin.S,v 1.3 1998/11/24 11:14:57 tsubai Exp $ */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/powerpc64/sys/setlogin.S 217398 2011-01-14 11:33:40Z kib $"); - -#include "SYS.h" - - .globl CNAME(_logname_valid) /* in _getlogin() */ - -SYSCALL(setlogin) - addis %r4,%r2,CNAME(_logname_valid)@toc@ha - li %r5,0 - stw %r5,CNAME(_logname_valid)@toc@l(%r4) - blr - - .section .note.GNU-stack,"",%progbits diff --git a/lib/libc/riscv/sys/shmat.S b/lib/libc/riscv/sys/shmat.S deleted file mode 100644 index f1bfa029db..0000000000 --- a/lib/libc/riscv/sys/shmat.S +++ /dev/null @@ -1,40 +0,0 @@ -/*- - * Copyright (c) 2015 Ruslan Bukin - * All rights reserved. - * - * Portions of this software were developed by SRI International and the - * University of Cambridge Computer Laboratory under DARPA/AFRL contract - * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Portions of this software were developed by the University of Cambridge - * Computer Laboratory as part of the CTSRD Project, with support from the - * UK Higher Education Innovation Fund (HEIF). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/riscv/sys/shmat.S 294227 2016-01-17 15:21:23Z br $"); - -#include "SYS.h" - -RSYSCALL(shmat) diff --git a/lib/libc/riscv/sys/sigreturn.S b/lib/libc/riscv/sys/sigreturn.S deleted file mode 100644 index 6f0d66340a..0000000000 --- a/lib/libc/riscv/sys/sigreturn.S +++ /dev/null @@ -1,40 +0,0 @@ -/*- - * Copyright (c) 2015 Ruslan Bukin - * All rights reserved. - * - * Portions of this software were developed by SRI International and the - * University of Cambridge Computer Laboratory under DARPA/AFRL contract - * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. - * - * Portions of this software were developed by the University of Cambridge - * Computer Laboratory as part of the CTSRD Project, with support from the - * UK Higher Education Innovation Fund (HEIF). - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD: stable/11/lib/libc/riscv/sys/sigreturn.S 294227 2016-01-17 15:21:23Z br $"); - -#include "SYS.h" - -RSYSCALL(sigreturn) diff --git a/lib/libpam/libpam/pam_debug_log.c b/lib/libpam/libpam/pam_debug_log.c deleted file mode 100644 index 46985d2e06..0000000000 --- a/lib/libpam/libpam/pam_debug_log.c +++ /dev/null @@ -1,62 +0,0 @@ -/*- - * Copyright 2001 Mark R V Murray - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD: stable/10/lib/libpam/libpam/pam_debug_log.c 94662 2002-04-14 16:44:04Z des $"); - -#include -#include -#include -#include -#include - -#include -#include -#include - -/* Print a verbose error, including the function name and a - * cleaned up filename. - */ -void -_pam_verbose_error(pam_handle_t *pamh, int flags, - const char *file, const char *function, const char *format, ...) -{ - va_list ap; - char *fmtbuf, *modname, *period; - - if (!(flags & PAM_SILENT) && !openpam_get_option(pamh, "no_warn")) { - modname = basename(file); - period = strchr(modname, '.'); - if (period == NULL) - period = strchr(modname, '\0'); - va_start(ap, format); - asprintf(&fmtbuf, "%.*s: %s: %s\n", (int)(period - modname), - modname, function, format); - pam_verror(pamh, fmtbuf, ap); - free(fmtbuf); - va_end(ap); - } -} diff --git a/lib/libpam/libpam/tests/Makefile b/lib/libpam/libpam/tests/Makefile deleted file mode 100644 index a94720c89c..0000000000 --- a/lib/libpam/libpam/tests/Makefile +++ /dev/null @@ -1,19 +0,0 @@ -# $FreeBSD: stable/10/lib/libpam/libpam/tests/Makefile 313488 2017-02-09 22:49:48Z ngie $ - -OPENPAM= ${SRCTOP}/contrib/openpam -.PATH: ${OPENPAM}/t - -TESTSDIR = ${TESTSBASE}/lib/libpam - -COMMONSRC = t_file.c t_main.c -.for test in t_openpam_ctype t_openpam_readlinev t_openpam_readword -TAP_TESTS_C += ${test} -SRCS.${test} = ${test}.c ${COMMONSRC} -.endfor -CFLAGS +=-I${OPENPAM}/include -I${OPENPAM}/lib/libpam -I${OPENPAM}/t -WARNS ?= 6 - -DPADD = ${LIBPAM} -LDADD = ${MINUSLPAM} - -.include diff --git a/lib/libpmc/pmc.mips.3 b/lib/libpmc/pmc.mips.3 deleted file mode 100644 index 493efd4669..0000000000 --- a/lib/libpmc/pmc.mips.3 +++ /dev/null @@ -1,413 +0,0 @@ -.\" Copyright (c) 2010 George Neville-Neil. All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.\" $FreeBSD: release/9.2.0/lib/libpmc/pmc.mips.3 234717 2012-04-26 20:11:57Z gjb $ -.\" -.Dd February 25, 2012 -.Dt PMC.MIPS 3 -.Os -.Sh NAME -.Nm pmc.mips -.Nd measurement events for -.Tn MIPS -family CPUs -.Sh LIBRARY -.Lb libpmc -.Sh SYNOPSIS -.In pmc.h -.Sh DESCRIPTION -MIPS PMCs are present in MIPS -.Tn "24k" -and other processors in the MIPS family. -.Pp -There are two counters supported by the hardware and each is 32 bits -wide. -.Pp -MIPS PMCs are documented in -.Rs -.%B "MIPS32 24K Processor Core Family Software User's Manual" -.%D December 2008 -.%Q "MIPS Technologies Inc." -.Re -.Ss Event Specifiers (Programmable PMCs) -MIPS programmable PMCs support the following events: -.Bl -tag -width indent -.It Li CYCLE -.Pq Event 0, Counter 0/1 -Total number of cycles. -The performance counters are clocked by the -top-level gated clock. -If the core is built with that clock gater -present, none of the counters will increment while the clock is -stopped - due to a WAIT instruction. -.It Li INSTR_EXECUTED -.Pq Event 1, Counter 0/1 -Total number of instructions completed. -.It Li BRANCH_COMPLETED -.Pq Event 2, Counter 0 -Total number of branch instructions completed. -.It Li BRANCH_MISPRED -.Pq Event 2, Counter 1 -Counts all branch instructions which completed, but were mispredicted. -.It Li RETURN -.Pq Event 3, Counter 0 -Counts all JR R31 instructions completed. -.It Li RETURN_MISPRED -.Pq Event 3, Counter 1 -Counts all JR $31 instructions which completed, used the RPS for a prediction, but were mispredicted. -.It Li RETURN_NOT_31 -.Pq Event 4, Counter 0 -Counts all JR $xx (not $31) and JALR instructions (indirect jumps). -.It Li RETURN_NOTPRED -.Pq Event 4, Counter 1 -If RPS use is disabled, JR $31 will not be predicted. -.It Li ITLB_ACCESS -.Pq Event 5, Counter 0 -Counts ITLB accesses that are due to fetches showing up in the -instruction fetch stage of the pipeline and which do not use a fixed -mapping or are not in unmapped space. -If an address is fetched twice from the pipe (as in the case of a -cache miss), that instruction willcount as 2 ITLB accesses. -Since each fetch gets us 2 instructions,there is one access marked per double -word. -.It Li ITLB_MISS -.Pq Event 5, Counter 1 -Counts all misses in the ITLB except ones that are on the back of another -miss. -We cannot process back to back misses and thus those are -ignored. -They are also ignored if there is some form of address error. -.It Li DTLB_ACCESS -.Pq Event 6, Counter 0 -Counts DTLB access including those in unmapped address spaces. -.It Li DTLB_MISS -.Pq Event 6, Counter 1 -Counts DTLB misses. -Back to back misses that result in only one DTLB -entry getting refilled are counted as a single miss. -.It Li JTLB_IACCESS -.Pq Event 7, Counter 0 -Instruction JTLB accesses are counted exactly the same as ITLB misses. -.It Li JTLB_IMISS -.Pq Event 7, Counter 1 -Counts instruction JTLB accesses that result in no match or a match on -an invalid translation. -.It Li JTLB_DACCESS -.Pq Event 8, Counter 0 -Data JTLB accesses. -.It Li JTLB_DMISS -.Pq Event 8, Counter 1 -Counts data JTLB accesses that result in no match or a match on an invalid translation. -.It Li IC_FETCH -.Pq Event 9, Counter 0 -Counts every time the instruction cache is accessed. -All replays, -wasted fetches etc. are counted. -For example, following a branch, even though the prediction is taken, -the fall through access is counted. -.It Li IC_MISS -.Pq Event 9, Counter 1 -Counts all instruction cache misses that result in a bus request. -.It Li DC_LOADSTORE -.Pq Event 10, Counter 0 -Counts cached loads and stores. -.It Li DC_WRITEBACK -.Pq Event 10, Counter 1 -Counts cache lines written back to memory due to replacement or cacheops. -.It Li DC_MISS -.Pq Event 11, Counter 0/1 -Counts loads and stores that miss in the cache -.It Li LOAD_MISS -.Pq Event 13, Counter 0 -Counts number of cacheable loads that miss in the cache. -.It Li STORE_MISS -.Pq Event 13, Counter 1 -Counts number of cacheable stores that miss in the cache. -.It Li INTEGER_COMPLETED -.Pq Event 14, Counter 0 -Non-floating point, non-Coprocessor 2 instructions. -.It Li FP_COMPLETED -.Pq Event 14, Counter 1 -Floating point instructions completed. -.It Li LOAD_COMPLETED -.Pq Event 15, Counter 0 -Integer and co-processor loads completed. -.It Li STORE_COMPLETED -.Pq Event 15, Counter 1 -Integer and co-processor stores completed. -.It Li BARRIER_COMPLETED -.Pq Event 16, Counter 0 -Direct jump (and link) instructions completed. -.It Li MIPS16_COMPLETED -.Pq Event 16, Counter 1 -MIPS16c instructions completed. -.It Li NOP_COMPLETED -.Pq Event 17, Counter 0 -NOPs completed. -This includes all instructions that normally write to a general -purpose register, but where the destination register was set to r0. -.It Li INTEGER_MULDIV_COMPLETED -.Pq Event 17, Counter 1 -Integer multiply and divide instructions completed. (MULxx, DIVx, MADDx, MSUBx). -.It Li RF_STALL -.Pq Event 18, Counter 0 -Counts the total number of cycles where no instructions are issued -from the IFU to ALU (the RF stage does not advance) which includes -both of the previous two events. -The RT_STALL is different than the sum of them though because cycles -when both stalls are active will only be counted once. -.It Li INSTR_REFETCH -.Pq Event 18, Counter 1 -replay traps (other than uTLB) -.It Li STORE_COND_COMPLETED -.Pq Event 19, Counter 0 -Conditional stores completed. -Counts all events, including failed stores. -.It Li STORE_COND_FAILED -.Pq Event 19, Counter 1 -Conditional store instruction that did not update memory. -Note: While this event and the SC instruction count event can be configured to -count in specific operating modes, the timing of the events is much -different and the observed operating mode could change between them, -causing some inaccuracy in the measured ratio. -.It Li ICACHE_REQUESTS -.Pq Event 20, Counter 0 -Note that this only counts PREFs that are actually attempted. -PREFs to uncached addresses or ones with translation errors are not counted -.It Li ICACHE_HIT -.Pq Event 20, Counter 1 -Counts PREF instructions that hit in the cache -.It Li L2_WRITEBACK -.Pq Event 21, Counter 0 -Counts cache lines written back to memory due to replacement or cacheops. -.It Li L2_ACCESS -.Pq Event 21, Counter 1 -Number of accesses to L2 Cache. -.It Li L2_MISS -.Pq Event 22, Counter 0 -Number of accesses that missed in the L2 cache. -.It Li L2_ERR_CORRECTED -.Pq Event 22, Counter 1 -Single bit errors in L2 Cache that were detected and corrected. -.It Li EXCEPTIONS -.Pq Event 23, Counter 0 -Any type of exception taken. -.It Li RF_CYCLES_STALLED -.Pq Event 24, Counter 0 -Counts cycles where the LSU is in fixup and cannot accept a new -instruction from the ALU. -Fixups are replays within the LSU that occur when an instruction needs -to re-access the cache or the DTLB. -.It Li IFU_CYCLES_STALLED -.Pq Event 25, Counter 0 -Counts the number of cycles where the fetch unit is not providing a -valid instruction to the ALU. -.It Li ALU_CYCLES_STALLED -.Pq Event 25, Counter 1 -Counts the number of cycles where the ALU pipeline cannot advance. -.It Li UNCACHED_LOAD -.Pq Event 33, Counter 0 -Counts uncached and uncached accelerated loads. -.It Li UNCACHED_STORE -.Pq Event 33, Counter 1 -Counts uncached and uncached accelerated stores. -.It Li CP2_REG_TO_REG_COMPLETED -.Pq Event 35, Counter 0 -Co-processor 2 register to register instructions completed. -.It Li MFTC_COMPLETED -.Pq Event 35, Counter 1 -Co-processor 2 move to and from instructions as well as loads and stores. -.It Li IC_BLOCKED_CYCLES -.Pq Event 37, Counter 0 -Cycles when IFU stalls because an instruction miss caused the IFU not -to have any runnable instructions. -Ignores the stalls due to ITLB misses as well as the 4 cycles -following a redirect. -.It Li DC_BLOCKED_CYCLES -.Pq Event 37, Counter 1 -Counts all cycles where integer pipeline waits on Load return data due -to a D-cache miss. -The LSU can signal a "long stall" on a D-cache misses, in which case -the waiting TC might be rescheduled so other TCs can execute -instructions till the data returns. -.It Li L2_IMISS_STALL_CYCLES -.Pq Event 38, Counter 0 -Cycles where the main pipeline is stalled waiting for a SYNC to complete. -.It Li L2_DMISS_STALL_CYCLES -.Pq Event 38, Counter 1 -Cycles where the main pipeline is stalled because of an index conflict -in the Fill Store Buffer. -.It Li DMISS_CYCLES -.Pq Event 39, Counter 0 -Data miss is outstanding, but not necessarily stalling the pipeline. -The difference between this and D$ miss stall cycles can show the gain -from non-blocking cache misses. -.It Li L2_MISS_CYCLES -.Pq Event 39, Counter 1 -L2 miss is outstanding, but not necessarily stalling the pipeline. -.It Li UNCACHED_BLOCK_CYCLES -.Pq Event 40, Counter 0 -Cycles where the processor is stalled on an uncached fetch, load, or store. -.It Li MDU_STALL_CYCLES -.Pq Event 41, Counter 0 -Cycles where the processor is stalled on an uncached fetch, load, or store. -.It Li FPU_STALL_CYCLES -.Pq Event 41, Counter 1 -Counts all cycles where integer pipeline waits on FPU return data. -.It Li CP2_STALL_CYCLES -.Pq Event 42, Counter 0 -Counts all cycles where integer pipeline waits on CP2 return data. -.It Li COREXTEND_STALL_CYCLES -.Pq Event 42, Counter 1 -Counts all cycles where integer pipeline waits on CorExtend return data. -.It Li ISPRAM_STALL_CYCLES -.Pq Event 43, Counter 0 -Count all pipeline bubbles that are a result of multicycle ISPRAM -access. -Pipeline bubbles are defined as all cycles that IFU doesn't present an -instruction to ALU. -The four cycles after a redirect are not counted. -.It Li DSPRAM_STALL_CYCLES -.Pq Event 43, Counter 1 -Counts stall cycles created by an instruction waiting for access to DSPRAM. -.It Li CACHE_STALL_CYCLES -.Pq Event 44, Counter 0 -Counts all cycles the where pipeline is stalled due to CACHE -instructions. -Includes cycles where CACHE instructions themselves are -stalled in the ALU, and cycles where CACHE instructions cause -subsequent instructions to be stalled. -.It Li LOAD_TO_USE_STALLS -.Pq Event 45, Counter 0 -Counts all cycles where integer pipeline waits on Load return data. -.It Li BASE_MISPRED_STALLS -.Pq Event 45, Counter 1 -Counts stall cycles due to skewed ALU where the bypass to the address -generation takes an extra cycle. -.It Li CPO_READ_STALLS -.Pq Event 46, Counter 0 -Counts all cycles where integer pipeline waits on return data from -MFC0, RDHWR instructions. -.It Li BRANCH_MISPRED_CYCLES -.Pq Event 46, Counter 1 -This counts the number of cycles from a mispredicted branch until the -next non-delay slot instruction executes. -.It Li IFETCH_BUFFER_FULL -.Pq Event 48, Counter 0 -Counts the number of times an instruction cache miss was detected, but -both fill buffers were already allocated. -.It Li FETCH_BUFFER_ALLOCATED -.Pq Event 48, Counter 1 -Number of cycles where at least one of the IFU fill buffers is -allocated (miss pending). -.It Li EJTAG_ITRIGGER -.Pq Event 49, Counter 0 -Number of times an EJTAG Instruction Trigger Point condition matched. -.It Li EJTAG_DTRIGGER -.Pq Event 49, Counter 1 -Number of times an EJTAG Data Trigger Point condition matched. -.It Li FSB_LT_QUARTER -.Pq Event 50, Counter 0 -Fill store buffer less than one quarter full. -.It Li FSB_QUARTER_TO_HALF -.Pq Event 50, Counter 1 -Fill store buffer between one quarter and one half full. -.It Li FSB_GT_HALF -.Pq Event 51, Counter 0 -Fill store buffer more than half full. -.It Li FSB_FULL_PIPELINE_STALLS -.Pq Event 51, Counter 1 -Cycles where the pipeline is stalled because the Fill-Store Buffer in LSU is full. -.It Li LDQ_LT_QUARTER -.Pq Event 52, Counter 0 -Load data queue less than one quarter full. -.It Li LDQ_QUARTER_TO_HALF -.Pq Event 52, Counter 1 -Load data queue between one quarter and one half full. -.It Li LDQ_GT_HALF -.Pq Event 53, Counter 0 -Load data queue more than one half full. -.It Li LDQ_FULL_PIPELINE_STALLS -.Pq Event 53, Counter 1 -Cycles where the pipeline is stalled because the Load Data Queue in the LSU is full. -.It Li WBB_LT_QUARTER -.Pq Event 54, Counter 0 -Write back buffer less than one quarter full. -.It Li WBB_QUARTER_TO_HALF -.Pq Event 54, Counter 1 -Write back buffer between one quarter and one half full. -.It Li WBB_GT_HALF -.Pq Event 55, Counter 0 -Write back buffer more than one half full. -.It Li WBB_FULL_PIPELINE_STALLS -.Pq Event 55 Counter 1 -Cycles where the pipeline is stalled because the Load Data Queue in the LSU is full. -.It Li REQUEST_LATENCY -.Pq Event 61, Counter 0 -Measures latency from miss detection until critical dword of response -is returned, Only counts for cacheable reads. -.It Li REQUEST_COUNT -.Pq Event 61, Counter 1 -Counts number of cacheable read requests used for previous latency counter. -.El -.Ss Event Name Aliases -The following table shows the mapping between the PMC-independent -aliases supported by -.Lb libpmc -and the underlying hardware events used. -.Bl -column "branch-mispredicts" "cpu_clk_unhalted.core_p" -.It Em Alias Ta Em Event Ta -.It Li instructions Ta Li INSTR_EXECUTED Ta -.It Li branches Ta Li BRANCH_COMPLETED Ta -.It Li branch-mispredicts Ta Li BRANCH_MISPRED Ta -.El -.Sh SEE ALSO -.Xr pmc 3 , -.Xr pmc.atom 3 , -.Xr pmc.core 3 , -.Xr pmc.iaf 3 , -.Xr pmc.k7 3 , -.Xr pmc.k8 3 , -.Xr pmc.p4 3 , -.Xr pmc.p5 3 , -.Xr pmc.p6 3 , -.Xr pmc.tsc 3 , -.Xr pmc_cpuinfo 3 , -.Xr pmclog 3 , -.Xr hwpmc 4 -.Sh HISTORY -The -.Nm pmc -library first appeared in -.Fx 6.0 . -.Sh AUTHORS -The -.Lb libpmc -library was written by -.An "Joseph Koshy" -.Aq jkoshy@FreeBSD.org . -MIPS support was added by -.An "George Neville-Neil" -.Aq gnn@FreeBSD.org . -.Sh CAVEATS -The MIPS code does not yet support sampling. diff --git a/lib/libpmc/pmc.p4.3 b/lib/libpmc/pmc.p4.3 deleted file mode 100644 index da2f1e56e4..0000000000 --- a/lib/libpmc/pmc.p4.3 +++ /dev/null @@ -1,1222 +0,0 @@ -.\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.\" -.Dd October 4, 2008 -.Dt PMC.P4 3 -.Os -.Sh NAME -.Nm pmc.p4 -.Nd measurement events for -.Tn "Intel Pentium 4" -and other -.Tn Netburst -architecture CPUs -.Sh LIBRARY -.Lb libpmc -.Sh SYNOPSIS -.In pmc.h -.Sh DESCRIPTION -Intel P4 PMCs are present in Intel -.Tn "Pentium 4" -and -.Tn Xeon -processors that use the -.Tn Netburst -CPU architecture. -.Pp -These PMCs are documented in -.Rs -.%B "IA-32 Intel(R) Architecture Software Developer's Manual" -.%T "Volume 3: System Programming Guide" -.%N "Order Number 245472-012" -.%D 2003 -.%Q "Intel Corporation" -.Re -Further information about using these PMCs may be found in -.Rs -.%B "IA-32 Intel(R) Architecture Optimization Guide" -.%D 2003 -.%N "Order Number 248966-009" -.%Q "Intel Corporation" -.Re -Some of these events are affected by processor errata described in -.Rs -.%B "Intel(R) Pentium(R) 4 Processor Specification Update" -.%N "Document Number: 249199-059" -.%D "April 2005" -.%Q "Intel Corporation" -.Re -.Ss PMC Features -Intel Pentium 4 PMCs are 40 bits wide. -Each CPU contains 18 PMCs, divided into 4 groups with 4, 4, 4 and 6 -PMCs respectively. -On processors with hyperthreading support, PMC resources are shared -between logical processors. -These PMCs support the following capabilities: -.Bl -column "PMC_CAP_INTERRUPT" "Support" -.It Em Capability Ta Em Support -.It PMC_CAP_CASCADE Ta Yes -.It PMC_CAP_EDGE Ta Yes -.It PMC_CAP_INTERRUPT Ta Yes -.It PMC_CAP_INVERT Ta Yes -.It PMC_CAP_READ Ta Yes -.It PMC_CAP_PRECISE Ta Unimplemented -.It PMC_CAP_SYSTEM Ta Yes -.It PMC_CAP_TAGGING Ta Yes -.It PMC_CAP_THRESHOLD Ta Yes -.It PMC_CAP_USER Ta Yes -.It PMC_CAP_WRITE Ta Yes -.El -.Ss Event Qualifiers -Event specifiers for Intel P4 PMCs can have the following common -qualifiers: -.Bl -tag -width indent -.It Li active= Ns Ar choice -(On P4 HTT CPUs) Filter event counting based on which logical -processors are active. -The allowed values of -.Ar choice -are: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count when either logical processor is active. -.It Li both -Count when both logical processors are active. -.It Li none -Count only when neither logical processor is active. -.It Li single -Count only when one logical processor is active. -.El -.Pp -The default is -.Dq Li both . -.It Li cascade -Configure the PMC to cascade onto its partner. -See -.Sx "Cascading P4 PMCs" -below for more information. -.It Li edge -Configure the counter to count false to true transitions of the threshold -comparison output. -This qualifier only takes effect if a threshold qualifier has also been -specified. -.It Li complement -Configure the counter to increment only when the event count seen is -less than the threshold qualifier value specified. -.It Li mask= Ns Ar qualifier -Many event specifiers for Intel P4 PMCs need to be additionally -qualified using a mask qualifier. -The allowed syntax for these qualifiers is event specific and is -described along with the events. -.It Li os -Configure the PMC to count when the CPL of the processor is 0. -.It Li precise -Select precise event based sampling. -Precise sampling is supported by the hardware for a limited set of -events. -.It Li tag= Ns Ar value -Configure the PMC to tag the internal uop selected by the other -fields in this event specifier with value -.Ar value . -This feature is used when cascading PMCs. -.It Li threshold= Ns Ar value -Configure the PMC to increment only when the event counts seen are -greater than the specified threshold value -.Ar value . -.It Li usr -Configure the PMC to count when the CPL of the processor is 1, 2 or 3. -.El -.Pp -If neither of the -.Dq Li os -or -.Dq Li usr -qualifiers are specified, the default is to enable both. -.Pp -On Intel Pentium 4 processors with HTT, events are -divided into two classes: -.Pp -.Bl -tag -width indent -compact -.It "TS Events" -are those where hardware can differentiate between events -generated on one logical processor from those generated on the -other. -.It "TI Events" -are those where hardware cannot differentiate between events -generated by multiple logical processors in a package. -.El -.Pp -Only TS events are allowed for use with process-mode PMCs on -Pentium-4/HTT CPUs. -.Pp -The event specifiers supported by Intel P4 PMCs are: -.Bl -tag -width indent -.It Li p4-128bit-mmx-uop Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count integer SIMD SSE2 instructions that operate on 128 bit SIMD -operands. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li all -Count all uops operating on 128 bit SIMD integer operands in memory or -XMM register. -.El -.Pp -If an instruction contains more than one 128 bit MMX uop, then each -uop will be counted. -.It Li p4-64bit-mmx-uop Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count MMX instructions that operate on 64 bit SIMD operands. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li all -Count all uops operating on 64 bit SIMD integer operands in memory or -in MMX registers. -.El -.Pp -If an instruction contains more than one 64 bit MMX uop, then each -uop will be counted. -.It Li p4-b2b-cycles -.Pq "TI event" -Count back-to-back bus cycles. -Further documentation for this event is unavailable. -.It Li p4-bnr -.Pq "TI event" -Count bus-not-ready conditions. -Further documentation for this event is unavailable. -.It Li p4-bpu-fetch-request Op Li ,mask= Ns Ar qualifier -.Pq "TS event" -Count instruction fetch requests qualified by additional -flags specified in -.Ar qualifier . -At this point only one flag is supported: -.Pp -.Bl -tag -width indent -compact -.It Li tcmiss -Count trace cache lookup misses. -.El -.Pp -The default qualifier is also -.Dq Li mask=tcmiss . -.It Li p4-branch-retired Op Li ,mask= Ns Ar flags -.Pq "TS event" -Counts retired branches. -Qualifier -.Ar flags -is a list of the following -.Ql + -separated strings: -.Pp -.Bl -tag -width indent -compact -.It Li mmnp -Count branches not-taken and predicted. -.It Li mmnm -Count branches not-taken and mis-predicted. -.It Li mmtp -Count branches taken and predicted. -.It Li mmtm -Count branches taken and mis-predicted. -.El -.Pp -The default qualifier counts all four kinds of branches. -.It Li p4-bsq-active-entries Op Li ,mask= Ns Ar qualifier -.Pq "TS event" -Count the number of entries (clipped at 15) currently active in the -BSQ. -Qualifier -.Ar qualifier -is a -.Ql + -separated set of the following flags: -.Pp -.Bl -tag -width indent -compact -.It Li req-type0 , Li req-type1 -Forms a 2-bit number used to select the request type encoding: -.Pp -.Bl -tag -width indent -compact -.It Li 0 -reads excluding read invalidate -.It Li 1 -read invalidates -.It Li 2 -writes other than writebacks -.It Li 3 -writebacks -.El -.Pp -Bit -.Dq Li req-type1 -is the MSB for this two bit number. -.It Li req-len0 , Li req-len1 -Forms a two-bit number that specifies the request length encoding: -.Pp -.Bl -tag -width indent -compact -.It Li 0 -0 chunks -.It Li 1 -1 chunk -.It Li 3 -8 chunks -.El -.Pp -Bit -.Dq Li req-len1 -is the MSB for this two bit number. -.It Li req-io-type -Count requests that are input or output requests. -.It Li req-lock-type -Count requests that lock the bus. -.It Li req-lock-cache -Count requests that lock the cache. -.It Li req-split-type -Count requests that is a bus 8-byte chunk that is split across an -8-byte boundary. -.It Li req-dem-type -Count requests that are demand (not prefetches) if set. -Count requests that are prefetches if not set. -.It Li req-ord-type -Count requests that are ordered. -.It Li mem-type0 , Li mem-type1 , Li mem-type2 -Forms a 3-bit number that specifies a memory type encoding: -.Pp -.Bl -tag -width indent -compact -.It Li 0 -UC -.It Li 1 -USWC -.It Li 4 -WT -.It Li 5 -WP -.It Li 6 -WB -.El -.Pp -Bit -.Dq Li mem-type2 -is the MSB of this 3-bit number. -.El -.Pp -The default qualifier has all the above bits set. -.Pp -Edge triggering using the -.Dq Li edge -qualifier should not be used with this event when counting cycles. -.It Li p4-bsq-allocation Op Li ,mask= Ns Ar qualifier -.Pq "TS event" -Count allocations in the bus sequence unit according to the flags -specified in -.Ar qualifier , -which is a -.Ql + -separated set of the following flags: -.Pp -.Bl -tag -width indent -compact -.It Li req-type0 , Li req-type1 -Forms a 2-bit number used to select the request type encoding: -.Pp -.Bl -tag -width indent -compact -.It Li 0 -reads excluding read invalidate -.It Li 1 -read invalidates -.It Li 2 -writes other than writebacks -.It Li 3 -writebacks -.El -.Pp -Bit -.Dq Li req-type1 -is the MSB for this two bit number. -.It Li req-len0 , Li req-len1 -Forms a two-bit number that specifies the request length encoding: -.Pp -.Bl -tag -width indent -compact -.It Li 0 -0 chunks -.It Li 1 -1 chunk -.It Li 3 -8 chunks -.El -.Pp -Bit -.Dq Li req-len1 -is the MSB for this two bit number. -.It Li req-io-type -Count requests that are input or output requests. -.It Li req-lock-type -Count requests that lock the bus. -.It Li req-lock-cache -Count requests that lock the cache. -.It Li req-split-type -Count requests that is a bus 8-byte chunk that is split across an -8-byte boundary. -.It Li req-dem-type -Count requests that are demand (not prefetches) if set. -Count requests that are prefetches if not set. -.It Li req-ord-type -Count requests that are ordered. -.It Li mem-type0 , Li mem-type1 , Li mem-type2 -Forms a 3-bit number that specifies a memory type encoding: -.Pp -.Bl -tag -width indent -compact -.It Li 0 -UC -.It Li 1 -USWC -.It Li 4 -WT -.It Li 5 -WP -.It Li 6 -WB -.El -.Pp -Bit -.Dq Li mem-type2 -is the MSB of this 3-bit number. -.El -.Pp -The default qualifier has all the above bits set. -.Pp -This event is usually used along with the -.Dq Li edge -qualifier to avoid multiple counting. -.It Li p4-bsq-cache-reference Op Li ,mask= Ns Ar qualifier -.Pq "TS event" -Count cache references as seen by the bus unit (2nd or 3rd level -cache references). -Qualifier -.Ar qualifier -is a -.Ql + -separated list of the following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li rd-2ndl-hits -Count 2nd level cache hits in the shared state. -.It Li rd-2ndl-hite -Count 2nd level cache hits in the exclusive state. -.It Li rd-2ndl-hitm -Count 2nd level cache hits in the modified state. -.It Li rd-3rdl-hits -Count 3rd level cache hits in the shared state. -.It Li rd-3rdl-hite -Count 3rd level cache hits in the exclusive state. -.It Li rd-3rdl-hitm -Count 3rd level cache hits in the modified state. -.It Li rd-2ndl-miss -Count 2nd level cache misses. -.It Li rd-3rdl-miss -Count 3rd level cache misses. -.It Li wr-2ndl-miss -Count write-back lookups from the data access cache that miss the 2nd -level cache. -.El -.Pp -The default is to count all the above events. -.It Li p4-execution-event Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count the retirement of tagged uops selected through the execution -tagging mechanism. -Qualifier -.Ar flags -can contain the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li nbogus0 , Li nbogus1 , Li nbogus2 , Li nbogus3 -The marked uops are not bogus. -.It Li bogus0 , Li bogus1 , Li bogus2 , Li bogus3 -The marked uops are bogus. -.El -.Pp -This event requires additional (upstream) events to be allocated to -perform the desired uop tagging. -The default is to set all the above flags. -This event can be used for precise event based sampling. -.It Li p4-front-end-event Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count the retirement of tagged uops selected through the front-end -tagging mechanism. -Qualifier -.Ar flags -can contain the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li nbogus -The marked uops are not bogus. -.It Li bogus -The marked uops are bogus. -.El -.Pp -This event requires additional (upstream) events to be allocated to -perform the desired uop tagging. -The default is to select both kinds of events. -This event can be used for precise event based sampling. -.It Li p4-fsb-data-activity Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count each DBSY or DRDY event selected by qualifier -.Ar flags . -Qualifier -.Ar flags -is a -.Ql + -separated set of the following flags: -.Pp -.Bl -tag -width indent -compact -.It Li drdy-drv -Count when this processor is driving data onto the bus. -.It Li drdy-own -Count when this processor is reading data from the bus. -.It Li drdy-other -Count when data is on the bus but not being sampled by this processor. -.It Li dbsy-drv -Count when this processor reserves the bus for use in the next cycle -in order to drive data. -.It Li dbsy-own -Count when some agent reserves the bus for use in the next bus cycle -to drive data that this processor will sample. -.It Li dbsy-other -Count when some agent reserves the bus for use in the next bus cycle -to drive data that this processor will not sample. -.El -.Pp -Flags -.Dq Li drdy-own -and -.Dq Li drdy-other -are mutually exclusive. -Flags -.Dq Li dbsy-own -and -.Dq Li dbsy-other -are mutually exclusive. -The default value for -.Ar qualifier -is -.Dq Li drdy-drv+drdy-own+dbsy-drv+dbsy-own . -.It Li p4-global-power-events Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count cycles during which the processor is not stopped. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li running -Count cycles when the processor is active. -.El -.It Li p4-instr-retired Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count instructions retired during a clock cycle. -Qualifier -.Ar flags -comprises of the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li nbogusntag -Count non-bogus instructions that are not tagged. -.It Li nbogustag -Count non-bogus instructions that are tagged. -.It Li bogusntag -Count bogus instructions that are not tagged. -.It Li bogustag -Count bogus instructions that are tagged. -.El -.Pp -The default qualifier counts all the above kinds of instructions. -.It Li p4-ioq-active-entries Xo -.Op Li ,mask= Ns Ar qualifier -.Op Li ,busreqtype= Ns Ar req-type -.Xc -.Pq "TS event" -Count the number of entries (clipped at 15) in the IOQ that are -active. -The event masks are specified by qualifier -.Ar qualifier -and -.Ar req-type . -.Pp -Qualifier -.Ar qualifier -is a -.Ql + -separated set of the following flags: -.Pp -.Bl -tag -width indent -compact -.It Li all-read -Count read entries. -.It Li all-write -Count write entries. -.It Li mem-uc -Count entries accessing un-cacheable memory. -.It Li mem-wc -Count entries accessing write-combining memory. -.It Li mem-wt -Count entries accessing write-through memory. -.It Li mem-wp -Count entries accessing write-protected memory -.It Li mem-wb -Count entries accessing write-back memory. -.It Li own -Count store requests driven by the processor (i.e., not by other -processors or by DMA). -.It Li other -Count store requests driven by other processors or by DMA. -.It Li prefetch -Include hardware and software prefetch requests in the count. -.El -.Pp -The default value for -.Ar qualifier -is to enable all the above flags. -.Pp -The -.Ar req-type -qualifier is a 5-bit number can be additionally used to select a -specific bus request type. -The default is 0. -.Pp -The -.Dq Li edge -qualifier should not be used when counting cycles with this event. -The exact behavior of this event depends on the processor revision. -.It Li p4-ioq-allocation Xo -.Op Li ,mask= Ns Ar qualifier -.Op Li ,busreqtype= Ns Ar req-type -.Xc -.Pq "TS event" -Count various types of transactions on the bus matching the flags set -in -.Ar qualifier -and -.Ar req-type . -.Pp -Qualifier -.Ar qualifier -is a -.Ql + -separated set of the following flags: -.Pp -.Bl -tag -width indent -compact -.It Li all-read -Count read entries. -.It Li all-write -Count write entries. -.It Li mem-uc -Count entries accessing un-cacheable memory. -.It Li mem-wc -Count entries accessing write-combining memory. -.It Li mem-wt -Count entries accessing write-through memory. -.It Li mem-wp -Count entries accessing write-protected memory -.It Li mem-wb -Count entries accessing write-back memory. -.It Li own -Count store requests driven by the processor (i.e., not by other -processors or by DMA). -.It Li other -Count store requests driven by other processors or by DMA. -.It Li prefetch -Include hardware and software prefetch requests in the count. -.El -.Pp -The default value for -.Ar qualifier -is to enable all the above flags. -.Pp -The -.Ar req-type -qualifier is a 5-bit number can be additionally used to select a -specific bus request type. -The default is 0. -.Pp -The -.Dq Li edge -qualifier is normally used with this event to prevent multiple -counting. -The exact behavior of this event depends on the processor revision. -.It Li p4-itlb-reference Op mask= Ns Ar qualifier -.Pq "TS event" -Count translations using the instruction translation look-aside -buffer. -The -.Ar qualifier -argument is a list of the following strings separated by -.Ql + -characters. -.Pp -.Bl -tag -width indent -compact -.It Li hit -Count ITLB hits. -.It Li miss -Count ITLB misses. -.It Li hit-uc -Count un-cacheable ITLB hits. -.El -.Pp -If no -.Ar qualifier -is specified the default is to count all the three kinds of ITLB -translations. -.It Li p4-load-port-replay Op Li ,mask= Ns Ar qualifier -.Pq "TS event" -Count replayed events at the load port. -Qualifier -.Ar qualifier -can take on one value: -.Pp -.Bl -tag -width indent -compact -.It Li split-ld -Count split loads. -.El -.Pp -The default value for -.Ar qualifier -is -.Dq Li split-ld . -.It Li p4-mispred-branch-retired Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count mispredicted IA-32 branch instructions. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li nbogus -Count non-bogus retired branch instructions. -.El -.It Li p4-machine-clear Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count the number of pipeline clears seen by the processor. -Qualifier -.Ar flags -is a list of the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li clear -Count for a portion of the many cycles when the machine is being -cleared for any reason. -.It Li moclear -Count machine clears due to memory ordering issues. -.It Li smclear -Count machine clears due to self-modifying code. -.El -.Pp -Use qualifier -.Dq Li edge -to get a count of occurrences of machine clears. -The default qualifier is -.Dq Li clear . -.It Li p4-memory-cancel Op Li ,mask= Ns Ar event-list -.Pq "TS event" -Count the canceling of various kinds of requests in the data cache -address control unit of the CPU. -The qualifier -.Ar event-list -is a list of the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li st-rb-full -Requests cancelled because no store request buffer was available. -.It Li 64k-conf -Requests that conflict due to 64K aliasing. -.El -.Pp -If -.Ar event-list -is not specified, then the default is to count both kinds of events. -.It Li p4-memory-complete Op Li ,mask= Ns Ar event-list -.Pq "TS event" -Count the completion of load split, store split, un-cacheable split and -un-cacheable load operations selected by qualifier -.Ar event-list . -The qualifier -.Ar event-list -is a -.Ql + -separated list of the following flags: -.Pp -.Bl -tag -width indent -compact -.It Li lsc -Count load splits completed, excluding loads from un-cacheable or -write-combining areas. -.It Li ssc -Count any split stores completed. -.El -.Pp -The default is to count both kinds of operations. -.It Li p4-mob-load-replay Op Li ,mask= Ns Ar qualifier -.Pq "TS event" -Count load replays triggered by the memory order buffer. -Qualifier -.Ar qualifier -can be a -.Ql + -separated list of the following flags: -.Pp -.Bl -tag -width indent -compact -.It Li no-sta -Count replays because of unknown store addresses. -.It Li no-std -Count replays because of unknown store data. -.It Li partial-data -Count replays because of partially overlapped data accesses between -load and store operations. -.It Li unalgn-addr -Count replays because of mismatches in the lower 4 bits of load and -store operations. -.El -.Pp -The default qualifier is -.Ar no-sta+no-std+partial-data+unalgn-addr . -.It Li p4-packed-dp-uop Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count packed double-precision uops. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li all -Count all uops operating on packed double-precision operands. -.El -.It Li p4-packed-sp-uop Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count packed single-precision uops. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li all -Count all uops operating on packed single-precision operands. -.El -.It Li p4-page-walk-type Op Li ,mask= Ns Ar qualifier -.Pq "TI event" -Count page walks performed by the page miss handler. -Qualifier -.Ar qualifier -can be a -.Ql + -separated list of the following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li dtmiss -Count page walks for data TLB misses. -.It Li itmiss -Count page walks for instruction TLB misses. -.El -.Pp -The default value for -.Ar qualifier -is -.Dq Li dtmiss+itmiss . -.It Li p4-replay-event Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count the retirement of tagged uops selected through the replay -tagging mechanism. -Qualifier -.Ar flags -contains a -.Ql + -separated set of the following strings: -.Pp -.Bl -tag -width indent -compact -.It Li nbogus -The marked uops are not bogus. -.It Li bogus -The marked uops are bogus. -.El -.Pp -This event requires additional (upstream) events to be allocated to -perform the desired uop tagging. -The default qualifier counts both kinds of uops. -This event can be used for precise event based sampling. -.It Li p4-resource-stall Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count the occurrence or latency of stalls in the allocator. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li sbfull -A stall due to the lack of store buffers. -.El -.It Li p4-response -.Pq "TI event" -Count different types of responses. -Further documentation on this event is not available. -.It Li p4-retired-branch-type Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count branches retired. -Qualifier -.Ar flags -contains a -.Ql + -separated list of strings: -.Pp -.Bl -tag -width indent -compact -.It Li conditional -Count conditional jumps. -.It Li call -Count direct and indirect call branches. -.It Li return -Count return branches. -.It Li indirect -Count returns, indirect calls or indirect jumps. -.El -.Pp -The default qualifier counts all the above branch types. -.It Li p4-retired-mispred-branch-type Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count mispredicted branches retired. -Qualifier -.Ar flags -contains a -.Ql + -separated list of strings: -.Pp -.Bl -tag -width indent -compact -.It Li conditional -Count conditional jumps. -.It Li call -Count indirect call branches. -.It Li return -Count return branches. -.It Li indirect -Count returns, indirect calls or indirect jumps. -.El -.Pp -The default qualifier counts all the above branch types. -.It Li p4-scalar-dp-uop Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count the number of scalar double-precision uops. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li all -Count the number of scalar double-precision uops. -.El -.It Li p4-scalar-sp-uop Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count the number of scalar single-precision uops. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li all -Count all uops operating on scalar single-precision operands. -.El -.It Li p4-snoop -.Pq "TI event" -Count snoop traffic. -Further documentation on this event is not available. -.It Li p4-sse-input-assist Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count the number of times an assist is required to handle problems -with the operands for SSE and SSE2 operations. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li all -Count assists for all SSE and SSE2 uops. -.El -.It Li p4-store-port-replay Op Li ,mask= Ns Ar qualifier -.Pq "TS event" -Count events replayed at the store port. -Qualifier -.Ar qualifier -can take on one value: -.Pp -.Bl -tag -width indent -compact -.It Li split-st -Count split stores. -.El -.Pp -The default value for -.Ar qualifier -is -.Dq Li split-st . -.It Li p4-tc-deliver-mode Op Li ,mask= Ns Ar qualifier -.Pq "TI event" -Count the duration in cycles of operating modes of the trace cache and -decode engine. -The desired operating mode is selected by -.Ar qualifier , -which is a list of the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li DD -Both logical processors are in deliver mode. -.It Li DB -Logical processor 0 is in deliver mode while logical processor 1 is in -build mode. -.It Li DI -Logical processor 0 is in deliver mode while logical processor 1 is -halted, or in machine clear, or transitioning to a long microcode -flow. -.It Li BD -Logical processor 0 is in build mode while logical processor 1 is in -deliver mode. -.It Li BB -Both logical processors are in build mode. -.It Li BI -Logical processor 0 is in build mode while logical processor 1 is -halted, or in machine clear or transitioning to a long microcode -flow. -.It Li ID -Logical processor 0 is halted, or in machine clear or transitioning to -a long microcode flow while logical processor 1 is in deliver mode. -.It Li IB -Logical processor 0 is halted, or in machine clear or transitioning to -a long microcode flow while logical processor 1 is in build mode. -.El -.Pp -If there is only one logical processor in the processor package then -the qualifier for logical processor 1 is ignored. -If no qualifier is specified, the default qualifier is -.Dq Li DD+DB+DI+BD+BB+BI+ID+IB . -.It Li p4-tc-ms-xfer Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count the number of times uop delivery changed from the trace cache to -MS ROM. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li cisc -Count TC to MS transfers. -.El -.It Li p4-uop-queue-writes Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count the number of valid uops written to the uop queue. -Qualifier -.Ar flags -is a list of the following strings, separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li from-tc-build -Count uops being written from the trace cache in build mode. -.It Li from-tc-deliver -Count uops being written from the trace cache in deliver mode. -.It Li from-rom -Count uops being written from microcode ROM. -.El -.Pp -The default qualifier counts all the above kinds of uops. -.It Li p4-uop-type Op Li ,mask= Ns Ar flags -.Pq "TS event" -This event is used in conjunction with the front-end at-retirement -mechanism to tag load and store uops. -Qualifier -.Ar flags -comprises the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li tagloads -Mark uops that are load operations. -.It Li tagstores -Mark uops that are store operations. -.El -.Pp -The default qualifier counts both kinds of uops. -.It Li p4-uops-retired Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count uops retired during a clock cycle. -Qualifier -.Ar flags -comprises the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li nbogus -Count marked uops that are not bogus. -.It Li bogus -Count marked uops that are bogus. -.El -.Pp -The default qualifier counts both kinds of uops. -.It Li p4-wc-buffer Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count write-combining buffer operations. -Qualifier -.Ar flags -contains the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li wcb-evicts -WC buffer evictions due to any cause. -.It Li wcb-full-evict -WC buffer evictions due to no WC buffer being available. -.El -.Pp -The default qualifier counts both kinds of evictions. -.It Li p4-x87-assist Op Li ,mask= Ns Ar flags -.Pq "TS event" -Count the retirement of x87 instructions that required special -handling. -Qualifier -.Ar flags -contains the following strings separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li fpsu -Count instructions that saw an FP stack underflow. -.It Li fpso -Count instructions that saw an FP stack overflow. -.It Li poao -Count instructions that saw an x87 output overflow. -.It Li poau -Count instructions that saw an x87 output underflow. -.It Li prea -Count instructions that needed an x87 input assist. -.El -.Pp -The default qualifier counts all the above types of instruction -retirements. -.It Li p4-x87-fp-uop Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count x87 floating-point uops. -Qualifier -.Ar flags -can take the following value (which is also the default): -.Pp -.Bl -tag -width indent -compact -.It Li all -Count all x87 floating-point uops. -.El -.Pp -If an instruction contains more than one x87 floating-point uops, then -all x87 floating-point uops will be counted. -This event does not count x87 floating-point data movement operations. -.It Li p4-x87-simd-moves-uop Op Li ,mask= Ns Ar flags -.Pq "TI event" -Count each x87 FPU, MMX, SSE, or SSE2 uops that load data or store -data or perform register-to-register moves. -This event does not count integer move uops. -Qualifier -.Ar flags -may contain the following keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li allp0 -Count all x87 and SIMD store and move uops. -.It Li allp2 -Count all x87 and SIMD load uops. -.El -.Pp -The default is to count all uops. -.Pq Errata -This event may be affected by processor errata N43. -.El -.Ss "Cascading P4 PMCs" -PMC cascading support is currently poorly implemented. -While individual event counters may be allocated with a -.Dq Li cascade -qualifier, the current API does not offer the ability -to name and allocate all the resources needed for a -cascaded event counter pair in a single operation. -.Ss "Precise Event Based Sampling" -Support for precise event based sampling is currently -unimplemented. -.Ss Event Name Aliases -The following table shows the mapping between the PMC-independent -aliases supported by -.Lb libpmc -and the underlying hardware events used. -.Bl -column "branch-mispredicts" "Description" -.It Em Alias Ta Em Event -.It Li branches Ta Li p4-branch-retired,mask=mmtp+mmtm -.It Li branch-mispredicts Ta Li p4-mispred-branch-retired -.It Li dc-misses Ta (unsupported) -.It Li ic-misses Ta (unsupported) -.It Li instructions Ta Li p4-instr-retired,mask=nbogusntag+nbogustag -.It Li interrupts Ta Li (unsupported) -.It Li unhalted-cycles Ta Li p4-global-power-events -.El -.Sh SEE ALSO -.Xr pmc 3 , -.Xr pmc.atom 3 , -.Xr pmc.core 3 , -.Xr pmc.core2 3 , -.Xr pmc.iaf 3 , -.Xr pmc.k7 3 , -.Xr pmc.k8 3 , -.Xr pmc.p5 3 , -.Xr pmc.p6 3 , -.Xr pmc.soft 3 , -.Xr pmc.tsc 3 , -.Xr pmclog 3 , -.Xr hwpmc 4 -.Sh HISTORY -The -.Nm pmc -library first appeared in -.Fx 6.0 . -.Sh AUTHORS -The -.Lb libpmc -library was written by -.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org . diff --git a/lib/libpmc/pmc.p5.3 b/lib/libpmc/pmc.p5.3 deleted file mode 100644 index 94e6949596..0000000000 --- a/lib/libpmc/pmc.p5.3 +++ /dev/null @@ -1,459 +0,0 @@ -.\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.\" -.Dd October 4, 2008 -.Dt PMC 3 -.Os -.Sh NAME -.Nm pmc -.Nd library for accessing hardware performance monitoring counters -.Sh LIBRARY -.Lb libpmc -.Sh SYNOPSIS -.In pmc.h -.Sh DESCRIPTION -Intel Pentium PMCs are present in Intel -.Tn Pentium -and -.Tn "Pentium MMX" -processors. -These PMCs are documented in the -.Rs -.%B "Intel 64 and IA-32 Intel(R) Architectures Software Developer's Manual" -.%T "Volume 3B: System Programming Guide, Part 2" -.%N "Order Number 253669-024US" -.%D "August 2007" -.%Q "Intel Corporation" -.Re -.Ss PMC Features -These CPUs contain two PMCs, each 40 bits wide. -These PMCs support the following capabilities: -.Bl -column "PMC_CAP_INTERRUPT" "Support" -.It Em Capability Ta Em Support -.It PMC_CAP_CASCADE Ta \&No -.It PMC_CAP_EDGE Ta \&No -.It PMC_CAP_INTERRUPT Ta \&No -.It PMC_CAP_INVERT Ta \&No -.It PMC_CAP_READ Ta Yes -.It PMC_CAP_PRECISE Ta \&No -.It PMC_CAP_SYSTEM Ta Yes -.It PMC_CAP_TAGGING Ta \&No -.It PMC_CAP_THRESHOLD Ta \&No -.It PMC_CAP_USER Ta Yes -.It PMC_CAP_WRITE Ta Yes -.El -.Ss Event Qualifiers -Event specifiers for Intel Pentium PMCs can have the following common -qualifiers: -.Bl -tag -width indent -.It Li duration -Count duration (in clocks) of events. -The default is to count events. -.It Li os -Measure events at privilege levels 0, 1 and 2. -.It Li overflow -Assert the external processor pin associated with a counter on counter -overflow. -.It Li usr -Measure events at privilege level 3. -.El -.Pp -If neither of the -.Dq Li os -or -.Dq Li usr -qualifiers are specified, the default is to enable both. -.Pp -Some events may only be used on specific counters and some events -are defined only on processors supporting the MMX instruction set. -Note that these PMCs do not have the ability to interrupt the CPU. -.Ss Intel Pentium Event Specifiers -The event specifiers supported by Intel Pentium PMCs are: -.Bl -tag -width indent -.It Li p5-any-segment-register-loaded -.Pq Event 0FH -The number of writes to any segment register, including the LDTR, -GDTR, TR and IDTR. -Far control transfers and task switches that involve privilege -level changes will count this event twice. -.It Li p5-bank-conflicts -.Pq Event 0AH -The number of actual bank conflicts. -.It Li p5-branches -.Pq Event 12H -The number of taken and not taken branches including branches, jumps, calls, -software interrupts and interrupt returns. -.It Li p5-breakpoint-match-on-dr0-register -.Pq Event 23H -The number of matches on the DR0 breakpoint register. -.It Li p5-breakpoint-match-on-dr1-register -.Pq Event 24H -The number of matches on the DR1 breakpoint register. -.It Li p5-breakpoint-match-on-dr2-register -.Pq Event 25H -The number of matches on the DR2 breakpoint register. -.It Li p5-breakpoint-match-on-dr3-register -.Pq Event 26H -The number of matches on the DR3 breakpoint register. -.It Li p5-btb-false-entries -.Pq Event 3AH , Tn Pentium MMX -The number of false entries in the BTB. -This event is only allocated on counter 0. -.It Li p5-btb-hits -.Pq Event 13H -The number of branches executed that hit in the branch table buffer. -.It Li p5-btb-miss-prediction-on-not-taken-branch -.Pq Event 3AH , Tn Pentium MMX -The number of times the BTB predicted a not-taken branch as taken. -This event is only allocated on counter 1. -.It Li p5-bus-cycle-duration -.Pq Event 18H -The number of cycles while a bus cycle was in progress. -.It Li p5-bus-ownership-latency -.Pq Event 2AH , Tn Pentium MMX -The time from bus ownership being requested to ownership being granted. -This event is only allocated on counter 0. -.It Li p5-bus-ownership-transfers -.Pq Event 2AH , Tn Pentium MMX -The number of bus ownership transfers. -This event is only allocated on counter 1. -.It Li p5-bus-utilization-due-to-processor-activity -.Pq Event 2EH , Tn Pentium MMX -The number of clocks the bus is busy due to the processor's own -activity. -This event is only allocated on counter 0. -.It Li p5-cache-line-sharing -.Pq Event 2CH , Tn Pentium MMX -The number of shared data lines in L1 cache. -This event is only allocated on counter 1. -.It Li p5-cache-m-state-line-sharing -.Pq Event 2CH , Tn Pentium MMX -The number of hits to an M- state line due to a memory access by -another processor. -This event is only allocated on counter 0. -.It Li p5-code-cache-miss -.Pq Event 0EH -The number of instruction reads that miss the internal code cache. -Both cacheable and un-cacheable misses are counted. -.It Li p5-code-read -.Pq Event 0CH -The number of instruction reads to both cacheable and un-cacheable regions. -.It Li p5-code-tlb-miss -.Pq Event 0DH -The number of instruction reads that miss the instruction TLB. -Both cacheable and un-cacheable unreads are counted. -.It Li p5-d1-starvation-and-fifo-is-empty -.Pq Event 33H , Tn Pentium MMX -The number of times the D1 stage cannot issue any instructions because -the FIFO was empty. -This event is only allocated on counter 0. -.It Li p5-d1-starvation-and-only-one-instruction-in-fifo -.Pq Event 33H , Tn Pentium MMX -The number of times the D1 stage could issue only one instruction -because the FIFO had one instruction ready. -This event is only allocated on counter 1. -.It Li p5-data-cache-lines-written-back -.Pq Event 06H -The number of data cache lines that are written back, including -those caused by internal and external snoops. -.It Li p5-data-cache-tlb-miss-stall-duration -.Pq Event 30H , Tn Pentium MMX -The number of clocks the pipeline is stalled due to a data cache -TLB miss. -This event is only allocated on counter 1. -.It Li p5-data-read -.Pq Event 00H -The number of memory data reads, counting internal data cache hits and -misses. -I/O and data memory accesses due to TLB miss processing are -not included. -Split cycle reads are counted individually. -.It Li p5-data-read-miss -.Pq Event 03H -The number of memory read accesses that miss the data cache, counting -both cacheable and un-cacheable accesses. -Data accesses that are part of TLB miss processing are not included. -I/O accesses are not included. -.It Li p5-data-read-miss-or-write-miss -.Pq Event 29H -The number of data reads and writes that miss the internal data cache, -counting un-cacheable accesses. -Data accesses due to TLB miss processing are not counted. -.It Li p5-data-read-or-write -.Pq Event 28H -The number of data reads and writes including internal data cache hits -and misses. -Data reads due to TLB miss processing are not counted. -.It Li p5-data-tlb-miss -.Pq Event 02H -The number of misses to the data cache translation look aside buffer. -.It Li p5-data-write -.Pq Event 01H -The number of memory data writes, counting internal data cache hits -and misses. -I/O is not included and split cycle writes are counted individually. -.It Li p5-data-write-miss -.Pq Event 04H -The number of memory write accesses that miss the data cache, counting -both cacheable and un-cacheable accesses. -I/O accesses are not counted. -.It Li p5-emms-instructions-executed -.Pq Event 2DH , Tn Pentium MMX -The number of EMMS instructions executed. -This event is only allocated on counter 0. -.It Li p5-external-data-cache-snoop-hits -.Pq Event 08H -The number of external snoops to the data cache that hit a valid line, -or the data line fill buffer, or one of the write back buffers. -.It Li p5-external-snoops -.Pq Event 07H -The number of external snoop requests accepted, including snoops that -hit in the code cache, the data cache and that hit in neither. -.It Li p5-floating-point-stalls-duration -.Pq Event 32H , Tn Pentium MMX -The number of cycles the pipeline is stalled due to a floating point -freeze. -This event is only allocated on counter 0. -.It Li p5-flops -.Pq Event 22H -The number of floating point adds, subtracts, multiples, divides and -square roots. -Transcendental instructions trigger this event multiple times. -Instructions generating divide-by-zero, negative square root, special -operand and stack exceptions are not counted. -Integer multiply instructions that use the x87 FPU are counted. -.It Li p5-full-write-buffer-stall-duration-while-executing-mmx-instructions -.Pq Event 3BH , Tn Pentium MMX -The number of clocks the pipeline has stalled due to full write -buffers when executing MMX instructions. -This event is only allocated on counter 0. -.It Li p5-hardware-interrupts -.Pq Event 27H -The number of taken INTR and NMI interrupts. -.It Li p5-instructions-executed -.Pq Event 16H -The number of instructions executed. -Repeat prefixed instructions are counted only once. -The HLT instruction is counted only once, irrespective of the number -of cycles spent in the halted state. -All hardware and software exceptions are counted as instructions, and -fault handler invocations are also counted as instructions. -.It Li p5-instructions-executed-v-pipe -.Pq Event 17H -The number of instructions that executed in the V pipe. -.It Li p5-io-read-or-write-cycle -.Pq Event 1DH -The number of bus cycles directed to I/O space. -.It Li p5-locked-bus-cycle -.Pq Event 1CH -The number of locked bus cycles that occur on account of the lock -prefixes, LOCK instructions, page table updates and descriptor table -updates. -.It Li p5-memory-accesses-in-both-pipes -.Pq Event 09H -The number of data memory reads or writes that are paired in both pipes. -.It Li p5-misaligned-data-memory-or-io-references -.Pq Event 0BH -The number of memory or I/O reads or writes that are not aligned on -natural boundaries. -2- and 4-byte accesses are counted as misaligned if they cross a 4 -byte boundary. -.It Li p5-misaligned-data-memory-reference-on-mmx-instructions -.Pq Event 36H , Tn Pentium MMX -The number of misaligned data memory references when executing MMX -instructions. -This event is only allocated on counter 0. -.It Li p5-mispredicted-or-unpredicted-returns -.Pq Event 37H , Tn Pentium MMX -The number of returns predicted incorrectly or not at all, only -counting RET instructions. -This event is only allocated on counter 0. -.It Li p5-mmx-instruction-data-read-misses -.Pq Event 31H , Tn Pentium MMX -The number of MMX instruction data read misses. -This event is only allocated on counter 1. -.It Li p5-mmx-instruction-data-reads -.Pq Event 31H , Tn Pentium MMX -The number of MMX instruction data reads. -This event is only allocated on counter 0. -.It Li p5-mmx-instruction-data-write-misses -.Pq Event 34H , Tn Pentium MMX -The number of data write misses caused by MMX instructions. -This event is only allocated on counter 1. -.It Li p5-mmx-instruction-data-writes -.Pq Event 34H , Tn Pentium MMX -The number of data writes caused by MMX instructions. -This event is only allocated on counter 0. -.It Li p5-mmx-instructions-executed-u-pipe -.Pq Event 2BH , Tn Pentium MMX -The number of MMX instructions executed in the U pipe. -This event is only allocated on counter 0. -.It Li p5-mmx-instructions-executed-v-pipe -.Pq Event 2BH , Tn Pentium MMX -The number of MMX instructions executed in the V pipe. -This event is only allocated on counter 1. -.It Li p5-mmx-multiply-unit-interlock -.Pq Event 38H , Tn Pentium MMX -The number of clocks the pipeline is stalled because the destination -of a prior MMX multiply is not ready. -This event is only allocated on counter 0. -.It Li p5-movd-movq-store-stall-due-to-previous-mmx-operation -.Pq Event 38H , Tn Pentium MMX -The number of clocks a MOVD/MOVQ instruction stalled in the D2 stage -of the pipeline due to a previous MMX instruction. -This event is only allocated on counter 1. -.It Li p5-noncacheable-memory-reads -.Pq Event 1EH -The number of bus cycles for non-cacheable instruction or data reads, -including cycles caused by TLB misses. -.It Li p5-number-of-cycles-not-in-halt-state -.Pq Event 30H , Tn Pentium MMX -The number of cycles the processor is not idle due to the HLT -instruction. -This event is only allocated on counter 0. -.It Li p5-pipeline-agi-stalls -.Pq Event 1FH -The number of address generation interlock stalls. -An AGI that occurs in both the U and V pipelines in the same clock -signals the event twice. -.It Li p5-pipeline-flushes -.Pq Event 15H -The number of pipeline flushes that occur. -Pipeline flushes are caused by branch mispredicts, exceptions, -interrupts, some segment register loads, and BTB misses. -Prefetch queue flushes due to serializing instructions are not -counted. -.It Li p5-pipeline-flushes-due-to-wrong-branch-predictions -.Pq Event 35H , Tn Pentium MMX -The number of pipeline flushes due to wrong branch predictions -resolved in either the E- or WB- stage of the pipeline. -This event is only allocated on counter 0. -.It Li p5-pipeline-flushes-due-to-wrong-branch-predictions-resolved-in-wb-stage -.Pq Event 35H , Tn Pentium MMX -The number of pipeline flushes due to wrong branch predictions -resolved in the stage of the pipeline. -This event is only allocated on counter 1. -.It Li p5-pipeline-stall-for-mmx-instruction-data-memory-reads -.Pq Event 36H , Tn Pentium MMX -The number of clocks during pipeline stalls caused by waiting MMX data -memory reads. -This event is only allocated on counter 1. -.It Li p5-predicted-returns -.Pq Event 37H , Tn Pentium MMX -The number of predicted returns, whether correct or incorrect. -This counter only counts RET instructions. -This event is only allocated on counter 1. -.It Li p5-returns -.Pq Event 39H , Tn Pentium MMX -The number of RET instructions executed. -This event is only allocated on counter 0. -.It Li p5-saturating-mmx-instructions-executed -.Pq Event 2FH , Tn Pentium MMX -The number of saturating MMX instructions executed. -This event is only allocated on counter 0. -.It Li p5-saturations-performed -.Pq Event 2FH , Tn Pentium MMX -The number of saturating MMX instructions executed when at least one -of its results were actually saturated. -This event is only allocated on counter 1. -.It Li p5-stall-on-mmx-instruction-write-to-e-o-m-state-line -.Pq Event 3BH , Tn Pentium MMX -The number of clocks during stalls on MMX instructions writing to -E- or M- state cache lines. -This event is only allocated on counter 1. -.It Li p5-stall-on-write-to-an-e-or-m-state-line -.Pq Event 1BH -The number of stalls on a write to an exclusive or modified data cache -line. -.It Li p5-taken-branch-or-btb-hit -.Pq Event 14H -The number of events that may cause a hit in the BTB, namely either -taken branches or BTB hits. -.It Li p5-taken-branches -.Pq Event 32H , Tn Pentium MMX -The number of taken branches. -This event is only allocated on counter 1. -.It Li p5-transitions-between-mmx-and-fp-instructions -.Pq Event 2DH , Tn Pentium MMX -The number of transitions between MMX and floating-point instructions -and vice-versa. -This event is only allocated on counter 1. -.It Li p5-waiting-for-data-memory-read-stall-duration -.Pq Event 1AH -The number of clocks the pipeline was stalled waiting for data -memory reads. -Data TLB misses processing is included in this count. -.It Li p5-write-buffer-full-stall-duration -.Pq Event 19H -The number of clocks while the pipeline was stalled due to write -buffers being full. -.It Li p5-write-hit-to-m-or-e-state-lines -.Pq Event 05H -The number of writes that hit exclusive or modified lines in the data -cache. -.It Li p5-writes-to-noncacheable-memory -.Pq Event 2EH , Tn Pentium MMX -The number of writes to non-cacheable memory, including write cycles -caused by TLB misses and I/O writes. -This event is only allocated on counter 1. -.El -.Ss Event Name Aliases -The following table shows the mapping between the PMC-independent -aliases supported by -.Lb libpmc -and the underlying hardware events used. -.Bl -column "branch-mispredicts" "Description" -.It Em Alias Ta Em Event -.It Li branches Ta Li p5-taken-branches -.It Li branch-mispredicts Ta Li (unsupported) -.It Li dc-misses Ta Li p5-data-read-miss-or-write-miss -.It Li ic-misses Ta Li p5-code-cache-miss -.It Li instructions Ta Li p5-instructions-executed -.It Li interrupts Ta Li p5-hardware-interrupts -.It Li unhalted-cycles Ta Li p5-number-of-cycles-not-in-halt-state -.El -.Sh SEE ALSO -.Xr pmc 3 , -.Xr pmc.atom 3 , -.Xr pmc.core 3 , -.Xr pmc.core2 3 , -.Xr pmc.iaf 3 , -.Xr pmc.k7 3 , -.Xr pmc.k8 3 , -.Xr pmc.p4 3 , -.Xr pmc.p6 3 , -.Xr pmc.soft 3 , -.Xr pmc.tsc 3 , -.Xr pmclog 3 , -.Xr hwpmc 4 -.Sh HISTORY -The -.Nm pmc -library first appeared in -.Fx 6.0 . -.Sh AUTHORS -The -.Lb libpmc -library was written by -.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org . diff --git a/lib/libpmc/pmc.p6.3 b/lib/libpmc/pmc.p6.3 deleted file mode 100644 index 09d6074962..0000000000 --- a/lib/libpmc/pmc.p6.3 +++ /dev/null @@ -1,1025 +0,0 @@ -.\" Copyright (c) 2003-2008 Joseph Koshy. All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.\" -.Dd October 4, 2008 -.Dt PMC.P6 3 -.Os -.Sh NAME -.Nm pmc.p6 -.Nd measurement events for -.Tn Intel -Pentium Pro, P-II, P-III family CPUs -.Sh LIBRARY -.Lb libpmc -.Sh SYNOPSIS -.In pmc.h -.Sh DESCRIPTION -Intel P6 PMCs are present in Intel -.Tn "Pentium Pro" , -.Tn "Pentium II" , -.Tn Celeron , -.Tn "Pentium III" -and -.Tn "Pentium M" -processors. -.Pp -They are documented in -.Rs -.%B "IA-32 Intel(R) Architecture Software Developer's Manual" -.%T "Volume 3: System Programming Guide" -.%N "Order Number 245472-012" -.%D 2003 -.%Q "Intel Corporation" -.Re -.Pp -Some of these events are affected by processor errata described in -.Rs -.%B "Intel(R) Pentium(R) III Processor Specification Update" -.%N "Document Number: 244453-054" -.%D "April 2005" -.%Q "Intel Corporation" -.Re -.Ss PMC Features -These CPUs have two counters, each 40 bits wide. -Some events may only be used on specific counters and some events are -defined only on specific processor models. -These PMCs support the following capabilities: -.Bl -column "PMC_CAP_INTERRUPT" "Support" -.It Em Capability Ta Em Support -.It PMC_CAP_CASCADE Ta \&No -.It PMC_CAP_EDGE Ta Yes -.It PMC_CAP_INTERRUPT Ta Yes -.It PMC_CAP_INVERT Ta Yes -.It PMC_CAP_READ Ta Yes -.It PMC_CAP_PRECISE Ta \&No -.It PMC_CAP_SYSTEM Ta Yes -.It PMC_CAP_TAGGING Ta \&No -.It PMC_CAP_THRESHOLD Ta Yes -.It PMC_CAP_USER Ta Yes -.It PMC_CAP_WRITE Ta Yes -.El -.Ss Event Qualifiers -Event specifiers for Intel P6 PMCs can have the following common -qualifiers: -.Bl -tag -width indent -.It Li cmask= Ns Ar value -Configure the PMC to increment only if the number of configured -events measured in a cycle is greater than or equal to -.Ar value . -.It Li edge -Configure the PMC to count the number of de-asserted to asserted -transitions of the conditions expressed by the other qualifiers. -If specified, the counter will increment only once whenever a -condition becomes true, irrespective of the number of clocks during -which the condition remains true. -.It Li inv -Invert the sense of comparison when the -.Dq Li cmask -qualifier is present, making the counter increment when the number of -events per cycle is less than the value specified by the -.Dq Li cmask -qualifier. -.It Li os -Configure the PMC to count events happening at processor privilege -level 0. -.It Li umask= Ns Ar value -This qualifier is used to further qualify the event selected (see -below). -.It Li usr -Configure the PMC to count events occurring at privilege levels 1, 2 -or 3. -.El -.Pp -If neither of the -.Dq Li os -or -.Dq Li usr -qualifiers are specified, the default is to enable both. -.Pp -The event specifiers supported by Intel P6 PMCs are: -.Bl -tag -width indent -.It Li p6-baclears -.Pq Event E6H -Count the number of times a static branch prediction was made by the -branch decoder because the BTB did not have a prediction. -.It Li p6-br-bac-missp-exec -.Pq Event 8AH , Tn "Pentium M" -Count the number of branch instructions executed that where -mispredicted at the Front End (BAC). -.It Li p6-br-bogus -.Pq Event E4H -Count the number of bogus branches. -.It Li p6-br-call-exec -.Pq Event 92H , Tn "Pentium M" -Count the number of call instructions executed. -.It Li p6-br-call-missp-exec -.Pq Event 93H , Tn "Pentium M" -Count the number of call instructions executed that were mispredicted. -.It Li p6-br-cnd-exec -.Pq Event 8BH , Tn "Pentium M" -Count the number of conditional branch instructions executed. -.It Li p6-br-cnd-missp-exec -.Pq Event 8CH , Tn "Pentium M" -Count the number of conditional branch instructions executed that were -mispredicted. -.It Li p6-br-ind-call-exec -.Pq Event 94H , Tn "Pentium M" -Count the number of indirect call instructions executed. -.It Li p6-br-ind-exec -.Pq Event 8DH , Tn "Pentium M" -Count the number of indirect branch instructions executed. -.It Li p6-br-ind-missp-exec -.Pq Event 8EH , Tn "Pentium M" -Count the number of indirect branch instructions executed that were -mispredicted. -.It Li p6-br-inst-decoded -.Pq Event E0H -Count the number of branch instructions decoded. -.It Li p6-br-inst-exec -.Pq Event 88H , Tn "Pentium M" -Count the number of branch instructions executed but necessarily retired. -.It Li p6-br-inst-retired -.Pq Event C4H -Count the number of branch instructions retired. -.It Li p6-br-miss-pred-retired -.Pq Event C5H -Count the number of mispredicted branch instructions retired. -.It Li p6-br-miss-pred-taken-ret -.Pq Event C9H -Count the number of taken mispredicted branches retired. -.It Li p6-br-missp-exec -.Pq Event 89H , Tn "Pentium M" -Count the number of branch instructions executed that were -mispredicted at execution. -.It Li p6-br-ret-bac-missp-exec -.Pq Event 91H , Tn "Pentium M" -Count the number of return instructions executed that were -mispredicted at the Front End (BAC). -.It Li p6-br-ret-exec -.Pq Event 8FH , Tn "Pentium M" -Count the number of return instructions executed. -.It Li p6-br-ret-missp-exec -.Pq Event 90H , Tn "Pentium M" -Count the number of return instructions executed that were -mispredicted at execution. -.It Li p6-br-taken-retired -.Pq Event C9H -Count the number of taken branches retired. -.It Li p6-btb-misses -.Pq Event E2H -Count the number of branches for which the BTB did not produce a -prediction. -.It Li p6-bus-bnr-drv -.Pq Event 61H -Count the number of bus clock cycles during which this processor is -driving the BNR# pin. -.It Li p6-bus-data-rcv -.Pq Event 64H -Count the number of bus clock cycles during which this processor is -receiving data. -.It Li p6-bus-drdy-clocks Op Li ,umask= Ns Ar qualifier -.Pq Event 62H -Count the number of clocks during which DRDY# is asserted. -An additional qualifier may be specified, and comprises one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-hit-drv -.Pq Event 7AH -Count the number of bus clock cycles during which this processor is -driving the HIT# pin. -.It Li p6-bus-hitm-drv -.Pq Event 7BH -Count the number of bus clock cycles during which this processor is -driving the HITM# pin. -.It Li p6-bus-lock-clocks Op Li ,umask= Ns Ar qualifier -.Pq Event 63H -Count the number of clocks during with LOCK# is asserted on the -external system bus. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-req-outstanding -.Pq Event 60H -Count the number of bus requests outstanding in any given cycle. -.It Li p6-bus-snoop-stall -.Pq Event 7EH -Count the number of clock cycles during which the bus is snoop stalled. -.It Li p6-bus-tran-any Op Li ,umask= Ns Ar qualifier -.Pq Event 70H -Count the number of completed bus transactions of any kind. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-tran-brd Op Li ,umask= Ns Ar qualifier -.Pq Event 65H -Count the number of burst read transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-tran-burst Op Li ,umask= Ns Ar qualifier -.Pq Event 6EH -Count the number of completed burst transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-tran-def Op Li ,umask= Ns Ar qualifier -.Pq Event 6DH -Count the number of completed deferred transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-tran-ifetch Op Li ,umask= Ns Ar qualifier -.Pq Event 68H -Count the number of completed instruction fetch transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-tran-inval Op Li ,umask= Ns Ar qualifier -.Pq Event 69H -Count the number of completed invalidate transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-tran-mem Op Li ,umask= Ns Ar qualifier -.Pq Event 6FH -Count the number of completed memory transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-tran-pwr Op Li ,umask= Ns Ar qualifier -.Pq Event 6AH -Count the number of completed partial write transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-tran-rfo Op Li ,umask= Ns Ar qualifier -.Pq Event 66H -Count the number of completed read-for-ownership transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-trans-io Op Li ,umask= Ns Ar qualifier -.Pq Event 6CH -Count the number of completed I/O transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-trans-p Op Li ,umask= Ns Ar qualifier -.Pq Event 6BH -Count the number of completed partial transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-bus-trans-wb Op Li ,umask= Ns Ar qualifier -.Pq Event 67H -Count the number of completed write-back transactions. -An additional qualifier may be specified and comprises one of the following -keywords: -.Pp -.Bl -tag -width indent -compact -.It Li any -Count transactions generated by any agent on the bus. -.It Li self -Count transactions generated by this processor. -.El -.Pp -The default is to count operations generated by this processor. -.It Li p6-cpu-clk-unhalted -.Pq Event 79H -Count the number of cycles during with the processor was not halted. -.Pp -.Pq Tn "Pentium M" -Count the number of cycles during with the processor was not halted -and not in a thermal trip. -.It Li p6-cycles-div-busy -.Pq Event 14H -Count the number of cycles during which the divider is busy and cannot -accept new divides. -This event is only allocated on counter 0. -.It Li p6-cycles-int-pending-and-masked -.Pq Event C7H -Count the number of processor cycles for which interrupts were -disabled and interrupts were pending. -.It Li p6-cycles-int-masked -.Pq Event C6H -Count the number of processor cycles for which interrupts were -disabled. -.It Li p6-data-mem-refs -.Pq Event 43H -Count all loads and all stores using any memory type, including -internal retries. -Each part of a split store is counted separately. -.It Li p6-dcu-lines-in -.Pq Event 45H -Count the total lines allocated in the data cache unit. -.It Li p6-dcu-m-lines-in -.Pq Event 46H -Count the number of M state lines allocated in the data cache unit. -.It Li p6-dcu-m-lines-out -.Pq Event 47H -Count the number of M state lines evicted from the data cache unit. -.It Li p6-dcu-miss-outstanding -.Pq Event 48H -Count the weighted number of cycles while a data cache unit miss is -outstanding, incremented by the number of outstanding cache misses at -any time. -.It Li p6-div -.Pq Event 13H -Count the number of integer and floating-point divides including -speculative divides. -This event is only allocated on counter 1. -.It Li p6-emon-esp-uops -.Pq Event D7H , Tn "Pentium M" -Count the total number of micro-ops. -.It Li p6-emon-est-trans Op Li ,umask= Ns Ar qualifier -.Pq Event 58H , Tn "Pentium M" -Count the number of -.Tn "Enhanced Intel SpeedStep" -transitions. -An additional qualifier may be specified, and can be one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li all -Count all transitions. -.It Li freq -Count only frequency transitions. -.El -.Pp -The default is to count all transitions. -.It Li p6-emon-fused-uops-ret Op Li ,umask= Ns Ar qualifier -.Pq Event DAH , Tn "Pentium M" -Count the number of retired fused micro-ops. -An additional qualifier may be specified, and may be one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li all -Count all fused micro-ops. -.It Li loadop -Count only load and op micro-ops. -.It Li stdsta -Count only STD/STA micro-ops. -.El -.Pp -The default is to count all fused micro-ops. -.It Li p6-emon-kni-comp-inst-ret -.Pq Event D9H , Tn "Pentium III" -Count the number of SSE computational instructions retired. -An additional qualifier may be specified, and comprises one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li packed-and-scalar -Count packed and scalar operations. -.It Li scalar -Count scalar operations only. -.El -.Pp -The default is to count packed and scalar operations. -.It Li p6-emon-kni-inst-retired Op Li ,umask= Ns Ar qualifier -.Pq Event D8H , Tn "Pentium III" -Count the number of SSE instructions retired. -An additional qualifier may be specified, and comprises one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li packed-and-scalar -Count packed and scalar operations. -.It Li scalar -Count scalar operations only. -.El -.Pp -The default is to count packed and scalar operations. -.It Li p6-emon-kni-pref-dispatched Op Li ,umask= Ns Ar qualifier -.Pq Event 07H , Tn "Pentium III" -Count the number of SSE prefetch or weakly ordered instructions -dispatched (including speculative prefetches). -An additional qualifier may be specified, and comprises one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li nta -Count non-temporal prefetches. -.It Li t1 -Count prefetches to L1. -.It Li t2 -Count prefetches to L2. -.It Li wos -Count weakly ordered stores. -.El -.Pp -The default is to count non-temporal prefetches. -.It Li p6-emon-kni-pref-miss Op Li ,umask= Ns Ar qualifier -.Pq Event 4BH , Tn "Pentium III" -Count the number of prefetch or weakly ordered instructions that miss -all caches. -An additional qualifier may be specified, and comprises one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li nta -Count non-temporal prefetches. -.It Li t1 -Count prefetches to L1. -.It Li t2 -Count prefetches to L2. -.It Li wos -Count weakly ordered stores. -.El -.Pp -The default is to count non-temporal prefetches. -.It Li p6-emon-pref-rqsts-dn -.Pq Event F8H , Tn "Pentium M" -Count the number of downward prefetches issued. -.It Li p6-emon-pref-rqsts-up -.Pq Event F0H , Tn "Pentium M" -Count the number of upward prefetches issued. -.It Li p6-emon-simd-instr-retired -.Pq Event CEH , Tn "Pentium M" -Count the number of retired -.Tn MMX -instructions. -.It Li p6-emon-sse-sse2-comp-inst-retired Op Li ,umask= Ns Ar qualifier -.Pq Event D9H , Tn "Pentium M" -Count the number of computational SSE instructions retired. -An additional qualifier may be specified and can be one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li sse-packed-single -Count SSE packed-single instructions. -.It Li sse-scalar-single -Count SSE scalar-single instructions. -.It Li sse2-packed-double -Count SSE2 packed-double instructions. -.It Li sse2-scalar-double -Count SSE2 scalar-double instructions. -.El -.Pp -The default is to count SSE packed-single instructions. -.It Li p6-emon-sse-sse2-inst-retired Op Li ,umask= Ns Ar qualifier -.Pq Event D8H , Tn "Pentium M" -Count the number of SSE instructions retired. -An additional qualifier can be specified, and can be one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li sse-packed-single -Count SSE packed-single instructions. -.It Li sse-packed-single-scalar-single -Count SSE packed-single and scalar-single instructions. -.It Li sse2-packed-double -Count SSE2 packed-double instructions. -.It Li sse2-scalar-double -Count SSE2 scalar-double instructions. -.El -.Pp -The default is to count SSE packed-single instructions. -.It Li p6-emon-synch-uops -.Pq Event D3H , Tn "Pentium M" -Count the number of sync micro-ops. -.It Li p6-emon-thermal-trip -.Pq Event 59H , Tn "Pentium M" -Count the duration or occurrences of thermal trips. -Use the -.Dq Li edge -qualifier to count occurrences of thermal trips. -.It Li p6-emon-unfusion -.Pq Event DBH , Tn "Pentium M" -Count the number of unfusion events in the reorder buffer. -.It Li p6-flops -.Pq Event C1H -Count the number of computational floating point operations retired. -This event is only allocated on counter 0. -.It Li p6-fp-assist -.Pq Event 11H -Count the number of floating point exceptions handled by microcode. -This event is only allocated on counter 1. -.It Li p6-fp-comps-ops-exe -.Pq Event 10H -Count the number of computation floating point operations executed. -This event is only allocated on counter 0. -.It Li p6-fp-mmx-trans Op Li ,umask= Ns Ar qualifier -.Pq Event CCH , Tn "Pentium II" , Tn "Pentium III" -Count the number of transitions between MMX and floating-point -instructions. -An additional qualifier may be specified, and comprises one of the -following keywords: -.Pp -.Bl -tag -width indent -compact -.It Li mmxtofp -Count transitions from MMX instructions to floating-point instructions. -.It Li fptommx -Count transitions from floating-point instructions to MMX instructions. -.El -.Pp -The default is to count MMX to floating-point transitions. -.It Li p6-hw-int-rx -.Pq Event C8H -Count the number of hardware interrupts received. -.It Li p6-ifu-ifetch -.Pq Event 80H -Count the number of instruction fetches, both cacheable and non-cacheable. -.It Li p6-ifu-ifetch-miss -.Pq Event 81H -Count the number of instruction fetch misses (i.e., those that produce -memory accesses). -.It Li p6-ifu-mem-stall -.Pq Event 86H -Count the number of cycles instruction fetch is stalled for any reason. -.It Li p6-ild-stall -.Pq Event 87H -Count the number of cycles the instruction length decoder is stalled. -.It Li p6-inst-decoded -.Pq Event D0H -Count the number of instructions decoded. -.It Li p6-inst-retired -.Pq Event C0H -Count the number of instructions retired. -.It Li p6-itlb-miss -.Pq Event 85H -Count the number of instruction TLB misses. -.It Li p6-l2-ads -.Pq Event 21H -Count the number of L2 address strobes. -.It Li p6-l2-dbus-busy -.Pq Event 22H -Count the number of cycles during which the L2 cache data bus was busy. -.It Li p6-l2-dbus-busy-rd -.Pq Event 23H -Count the number of cycles during which the L2 cache data bus was busy -transferring read data from L2 to the processor. -.It Li p6-l2-ifetch Op Li ,umask= Ns Ar qualifier -.Pq Event 28H -Count the number of L2 instruction fetches. -An additional qualifier may be specified and comprises a list of the following -keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li e -Count operations affecting E (exclusive) state lines. -.It Li i -Count operations affecting I (invalid) state lines. -.It Li m -Count operations affecting M (modified) state lines. -.It Li s -Count operations affecting S (shared) state lines. -.El -.Pp -The default is to count operations affecting all (MESI) state lines. -.It Li p6-l2-ld Op Li ,umask= Ns Ar qualifier -.Pq Event 29H -Count the number of L2 data loads. -An additional qualifier may be specified and comprises a list of the following -keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li both -.Pq Tn "Pentium M" -Count both hardware-prefetched lines and non-hardware-prefetched lines. -.It Li e -Count operations affecting E (exclusive) state lines. -.It Li hw -.Pq Tn "Pentium M" -Count hardware-prefetched lines only. -.It Li i -Count operations affecting I (invalid) state lines. -.It Li m -Count operations affecting M (modified) state lines. -.It Li nonhw -.Pq Tn "Pentium M" -Exclude hardware-prefetched lines. -.It Li s -Count operations affecting S (shared) state lines. -.El -.Pp -The default on processors other than -.Tn "Pentium M" -processors is to count operations affecting all (MESI) state lines. -The default on -.Tn "Pentium M" -processors is to count both hardware-prefetched and -non-hardware-prefetch operations on all (MESI) state lines. -.Pq Errata -This event is affected by processor errata E53. -.It Li p6-l2-lines-in Op Li ,umask= Ns Ar qualifier -.Pq Event 24H -Count the number of L2 lines allocated. -An additional qualifier may be specified and comprises a list of the following -keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li both -.Pq Tn "Pentium M" -Count both hardware-prefetched lines and non-hardware-prefetched lines. -.It Li e -Count operations affecting E (exclusive) state lines. -.It Li hw -.Pq Tn "Pentium M" -Count hardware-prefetched lines only. -.It Li i -Count operations affecting I (invalid) state lines. -.It Li m -Count operations affecting M (modified) state lines. -.It Li nonhw -.Pq Tn "Pentium M" -Exclude hardware-prefetched lines. -.It Li s -Count operations affecting S (shared) state lines. -.El -.Pp -The default on processors other than -.Tn "Pentium M" -processors is to count operations affecting all (MESI) state lines. -The default on -.Tn "Pentium M" -processors is to count both hardware-prefetched and -non-hardware-prefetch operations on all (MESI) state lines. -.Pq Errata -This event is affected by processor errata E45. -.It Li p6-l2-lines-out Op Li ,umask= Ns Ar qualifier -.Pq Event 26H -Count the number of L2 lines evicted. -An additional qualifier may be specified and comprises a list of the following -keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li both -.Pq Tn "Pentium M" -Count both hardware-prefetched lines and non-hardware-prefetched lines. -.It Li e -Count operations affecting E (exclusive) state lines. -.It Li hw -.Pq Tn "Pentium M" -Count hardware-prefetched lines only. -.It Li i -Count operations affecting I (invalid) state lines. -.It Li m -Count operations affecting M (modified) state lines. -.It Li nonhw -.Pq Tn "Pentium M" only -Exclude hardware-prefetched lines. -.It Li s -Count operations affecting S (shared) state lines. -.El -.Pp -The default on processors other than -.Tn "Pentium M" -processors is to count operations affecting all (MESI) state lines. -The default on -.Tn "Pentium M" -processors is to count both hardware-prefetched and -non-hardware-prefetch operations on all (MESI) state lines. -.Pq Errata -This event is affected by processor errata E45. -.It Li p6-l2-m-lines-inm -.Pq Event 25H -Count the number of modified lines allocated in L2 cache. -.It Li p6-l2-m-lines-outm Op Li ,umask= Ns Ar qualifier -.Pq Event 27H -Count the number of L2 M-state lines evicted. -.Pp -.Pq Tn "Pentium M" -On these processors an additional qualifier may be specified and -comprises a list of the following keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li both -Count both hardware-prefetched lines and non-hardware-prefetched lines. -.It Li hw -Count hardware-prefetched lines only. -.It Li nonhw -Exclude hardware-prefetched lines. -.El -.Pp -The default is to count both hardware-prefetched and -non-hardware-prefetch operations. -.Pq Errata -This event is affected by processor errata E53. -.It Li p6-l2-rqsts Op Li ,umask= Ns Ar qualifier -.Pq Event 2EH -Count the total number of L2 requests. -An additional qualifier may be specified and comprises a list of the following -keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li e -Count operations affecting E (exclusive) state lines. -.It Li i -Count operations affecting I (invalid) state lines. -.It Li m -Count operations affecting M (modified) state lines. -.It Li s -Count operations affecting S (shared) state lines. -.El -.Pp -The default is to count operations affecting all (MESI) state lines. -.It Li p6-l2-st -.Pq Event 2AH -Count the number of L2 data stores. -An additional qualifier may be specified and comprises a list of the following -keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li e -Count operations affecting E (exclusive) state lines. -.It Li i -Count operations affecting I (invalid) state lines. -.It Li m -Count operations affecting M (modified) state lines. -.It Li s -Count operations affecting S (shared) state lines. -.El -.Pp -The default is to count operations affecting all (MESI) state lines. -.It Li p6-ld-blocks -.Pq Event 03H -Count the number of load operations delayed due to store buffer blocks. -.It Li p6-misalign-mem-ref -.Pq Event 05H -Count the number of misaligned data memory references (crossing a 64 -bit boundary). -.It Li p6-mmx-assist -.Pq Event CDH , Tn "Pentium II" , Tn "Pentium III" -Count the number of MMX assists executed. -.It Li p6-mmx-instr-exec -.Pq Event B0H -.Pq Tn Celeron , Tn "Pentium II" -Count the number of MMX instructions executed, except MOVQ and MOVD -stores from register to memory. -.It Li p6-mmx-instr-ret -.Pq Event CEH , Tn "Pentium II" -Count the number of MMX instructions retired. -.It Li p6-mmx-instr-type-exec Op Li ,umask= Ns Ar qualifier -.Pq Event B3H , Tn "Pentium II" , Tn "Pentium III" -Count the number of MMX instructions executed. -An additional qualifier may be specified and comprises a list of -the following keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li pack -Count MMX pack operation instructions. -.It Li packed-arithmetic -Count MMX packed arithmetic instructions. -.It Li packed-logical -Count MMX packed logical instructions. -.It Li packed-multiply -Count MMX packed multiply instructions. -.It Li packed-shift -Count MMX packed shift instructions. -.It Li unpack -Count MMX unpack operation instructions. -.El -.Pp -The default is to count all operations. -.It Li p6-mmx-sat-instr-exec -.Pq Event B1H , Tn "Pentium II" , Tn "Pentium III" -Count the number of MMX saturating instructions executed. -.It Li p6-mmx-uops-exec -.Pq Event B2H , Tn "Pentium II" , Tn "Pentium III" -Count the number of MMX micro-ops executed. -.It Li p6-mul -.Pq Event 12H -Count the number of integer and floating-point multiplies, including -speculative multiplies. -This event is only allocated on counter 1. -.It Li p6-partial-rat-stalls -.Pq Event D2H -Count the number of cycles or events for partial stalls. -.It Li p6-resource-stalls -.Pq Event A2H -Count the number of cycles there was a resource related stall of any kind. -.It Li p6-ret-seg-renames -.Pq Event D6H , Tn "Pentium II" , Tn "Pentium III" -Count the number of segment register rename events retired. -.It Li p6-sb-drains -.Pq Event 04H -Count the number of cycles the store buffer is draining. -.It Li p6-seg-reg-renames Op Li ,umask= Ns Ar qualifier -.Pq Event D5H , Tn "Pentium II" , Tn "Pentium III" -Count the number of segment register renames. -An additional qualifier may be specified, and comprises a list of the -following keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li ds -Count renames for segment register DS. -.It Li es -Count renames for segment register ES. -.It Li fs -Count renames for segment register FS. -.It Li gs -Count renames for segment register GS. -.El -.Pp -The default is to count operations affecting all segment registers. -.It Li p6-seg-rename-stalls -.Pq Event D4H , Tn "Pentium II" , Tn "Pentium III" -Count the number of segment register renaming stalls. -An additional qualifier may be specified, and comprises a list of the -following keywords separated by -.Ql + -characters: -.Pp -.Bl -tag -width indent -compact -.It Li ds -Count stalls for segment register DS. -.It Li es -Count stalls for segment register ES. -.It Li fs -Count stalls for segment register FS. -.It Li gs -Count stalls for segment register GS. -.El -.Pp -The default is to count operations affecting all the segment registers. -.It Li p6-segment-reg-loads -.Pq Event 06H -Count the number of segment register loads. -.It Li p6-uops-retired -.Pq Event C2H -Count the number of micro-ops retired. -.El -.Ss Event Name Aliases -The following table shows the mapping between the PMC-independent -aliases supported by -.Lb libpmc -and the underlying hardware events used. -.Bl -column "branch-mispredicts" "Description" -.It Em Alias Ta Em Event -.It Li branches Ta Li p6-br-inst-retired -.It Li branch-mispredicts Ta Li p6-br-miss-pred-retired -.It Li dc-misses Ta Li p6-dcu-lines-in -.It Li ic-misses Ta Li p6-ifu-fetch-miss -.It Li instructions Ta Li p6-inst-retired -.It Li interrupts Ta Li p6-hw-int-rx -.It Li unhalted-cycles Ta Li p6-cpu-clk-unhalted -.El -.Sh SEE ALSO -.Xr pmc 3 , -.Xr pmc.atom 3 , -.Xr pmc.core 3 , -.Xr pmc.core2 3 , -.Xr pmc.iaf 3 , -.Xr pmc.k7 3 , -.Xr pmc.k8 3 , -.Xr pmc.p4 3 , -.Xr pmc.p5 3 , -.Xr pmc.soft 3 , -.Xr pmc.tsc 3 , -.Xr pmclog 3 , -.Xr hwpmc 4 -.Sh HISTORY -The -.Nm pmc -library first appeared in -.Fx 6.0 . -.Sh AUTHORS -The -.Lb libpmc -library was written by -.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org . diff --git a/lib/libpmc/pmc.xscale.3 b/lib/libpmc/pmc.xscale.3 deleted file mode 100644 index 4dc370e5b6..0000000000 --- a/lib/libpmc/pmc.xscale.3 +++ /dev/null @@ -1,155 +0,0 @@ -.\" Copyright (c) 2009, 2010 Rui Paulo. All rights reserved. -.\" -.\" Redistribution and use in source and binary forms, with or without -.\" modification, are permitted provided that the following conditions -.\" are met: -.\" 1. Redistributions of source code must retain the above copyright -.\" notice, this list of conditions and the following disclaimer. -.\" 2. Redistributions in binary form must reproduce the above copyright -.\" notice, this list of conditions and the following disclaimer in the -.\" documentation and/or other materials provided with the distribution. -.\" -.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND -.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE -.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE -.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE -.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL -.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS -.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) -.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT -.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY -.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF -.\" SUCH DAMAGE. -.\" -.\" -.Dd December 23, 2009 -.Dt PMC.XSCALE 3 -.Os -.Sh NAME -.Nm pmc.xscale -.Nd measurement events for -.Tn Intel -.Tn XScale -family CPUs -.Sh LIBRARY -.Lb libpmc -.Sh SYNOPSIS -.In pmc.h -.Sh DESCRIPTION -.Tn Intel XScale -CPUs are ARM CPUs based on the ARMv5e core. -.Pp -Second generation cores have 2 counters, while third generation cores -have 4 counters. -Third generation cores also have an increased number of PMC events. -.Pp -.Tn Intel XScale -PMCs are documented in -.Rs -.%B "3rd Generation Intel XScale Microarchitecture Developer's Manual" -.%D May 2007 -.Re -.Ss Event Specifiers (Programmable PMCs) -.Tn Intel XScale -programmable PMCs support the following events: -.Bl -tag -width indent -.It Li IC_FETCH -External memory fetch due to L1 instruction cache miss. -.It Li IC_MISS -Instruction cache or TLB miss. -.It Li DATA_DEPENDENCY_STALLED -A data dependency stalled -.It Li ITLB_MISS -Instruction TLB miss. -.It Li DTLB_MISS -Data TLB miss. -.It Li BRANCH_RETIRED -Branch instruction retired (executed). -.It Li BRANCH_MISPRED -Branch mispredicted. -.It Li INSTR_RETIRED -Instructions retired (executed). -.It Li DC_FULL_CYCLE -L1 data cache buffer full stall. -Event occurs on every cycle the -condition is present. -.It Li DC_FULL_CONTIG -L1 data cache buffer full stall. -Event occurs once for each contiguous sequence of this type of stall. -.It Li DC_ACCESS -L1 data cache access, not including cache operations. -.It Li DC_MISS -L1 data cache miss, not including cache operations. -.It Li DC_WRITEBACK -L1 data cache write-back. -Occurs for each cache line that's written back from the cache. -.It Li PC_CHANGE -Software changed the program counter. -.It Li BRANCH_RETIRED_ALL -Branch instruction retired (executed). -This event counts all branch instructions, indirect or direct. -.It Li INSTR_CYCLE -Count the number of microarchitecture cycles each instruction requires -to issue. -.It Li CP_STALL -Coprocessor stalled the instruction pipeline. -.It Li PC_CHANGE_ALL -Software changed the program counter (includes exceptions). -.It Li PIPELINE_FLUSH -Pipeline flushes due to mispredictions or exceptions. -.It Li BACKEND_STALL -Backend stalled the instruction pipeline. -.It Li MULTIPLIER_USE -Multiplier used. -.It Li MULTIPLIER_STALLED -Multiplier stalled the instruction pipeline. -.It Li DATA_CACHE_STALLED -Data cache stalled the instruction pipeline. -.It Li L2_CACHE_REQ -L2 cache request, not including cache operations. -.It Li L2_CACHE_MISS -L2 cache miss, not including cache operations. -.It Li ADDRESS_BUS_TRANS -Address bus transaction. -.It Li SELF_ADDRESS_BUS_TRANS -Self initiated address bus transaction. -.It Li DATA_BUS_TRANS -Data bus transaction. -.El -.Ss Event Name Aliases -The following table shows the mapping between the PMC-independent -aliases supported by -.Lb libpmc -and the underlying hardware events used. -.Bl -column "branch-mispredicts" "BRANCH_MISPRED" -.It Em Alias Ta Em Event -.It Li branches Ta Li BRANCH_RETIRED -.It Li branch-mispredicts Ta Li BRANCH_MISPRED -.It Li dc-misses Ta Li DC_MISS -.It Li ic-misses Ta Li IC_MISS -.It Li instructions Ta Li INSTR_RETIRED -.El -.Sh SEE ALSO -.Xr pmc 3 , -.Xr pmc.soft 3 , -.Xr pmc_cpuinfo 3 , -.Xr pmclog 3 , -.Xr hwpmc 4 -.Sh HISTORY -The -.Nm pmc -library first appeared in -.Fx 6.0 . -Intel XScale support first appeared in -.Fx 9.0 . -.Sh AUTHORS -.An -nosplit -The -.Lb libpmc -library was written by -.An Joseph Koshy Aq Mt jkoshy@FreeBSD.org . -.Pp -Intel XScale support was added by -.An Rui Paulo Aq Mt rpaulo@FreeBSD.org . -.Sh CAVEATS -The Intel XScale code does not yet support sampling. diff --git a/lib/libpmc/pmu-events/jevents.h b/lib/libpmc/pmu-events/jevents.h deleted file mode 100644 index e71a6428d7..0000000000 --- a/lib/libpmc/pmu-events/jevents.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef JEVENTS_H -#define JEVENTS_H 1 - -int json_events(const char *fn, - int (*func)(void *data, char *name, const char *event, char *desc, - char *long_desc, - char *pmu, - char *unit, char *perpkg, char *metric_expr, - char *metric_name, char *metric_group), - void *data); -char *get_cpu_str(void); - -#ifndef min -#define min(x, y) ({ \ - typeof(x) _min1 = (x); \ - typeof(y) _min2 = (y); \ - (void) (&_min1 == &_min2); \ - _min1 < _min2 ? _min1 : _min2; }) -#endif - -#endif diff --git a/lib/libproc/crc32.c b/lib/libproc/crc32.c deleted file mode 100644 index 3033ed7a80..0000000000 --- a/lib/libproc/crc32.c +++ /dev/null @@ -1,56 +0,0 @@ -/*- - * COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or - * code or tables extracted from it, as desired without restriction. - */ - -#include - -#include - -#include - -uint32_t crc32_tab[] = { - 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, - 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, - 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2, - 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, - 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, - 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, - 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c, - 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, - 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, - 0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, - 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106, - 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, - 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, - 0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, - 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, - 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, - 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, - 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, - 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, - 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, - 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, - 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, - 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84, - 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, - 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, - 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, - 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e, - 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, - 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, - 0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, - 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28, - 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, - 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, - 0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, - 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242, - 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, - 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, - 0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, - 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, - 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, - 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, - 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, - 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d -}; diff --git a/lib/libproc/crc32.h b/lib/libproc/crc32.h deleted file mode 100644 index dbfc689efd..0000000000 --- a/lib/libproc/crc32.h +++ /dev/null @@ -1,27 +0,0 @@ -/*- - * COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or - * code or tables extracted from it, as desired without restriction. - * - */ - -#ifndef _CRC32_H_ -#define _CRC32_H_ - -#include /* uint32_t */ -#include /* size_t */ - -extern uint32_t crc32_tab[]; - -static __inline uint32_t -crc32(const void *buf, size_t size) -{ - const uint8_t *p = buf; - uint32_t crc; - - crc = ~0U; - while (size--) - crc = crc32_tab[(crc ^ *p++) & 0xFF] ^ (crc >> 8); - return (crc ^ ~0U); -} - -#endif /* !_CRC32_H_ */ diff --git a/lib/libprocstat/Versions.def b/lib/libprocstat/Versions.def deleted file mode 100644 index 33ee642cd5..0000000000 --- a/lib/libprocstat/Versions.def +++ /dev/null @@ -1,9 +0,0 @@ - -# This version was first added to 9.0-current. -FBSD_1.2 { -}; - -# This version was first added to 10.0-current. -FBSD_1.3 { -} FBSD_1.2; - diff --git a/lib/libprocstat/ntfs.c b/lib/libprocstat/ntfs.c deleted file mode 100644 index e002dc7d60..0000000000 --- a/lib/libprocstat/ntfs.c +++ /dev/null @@ -1,70 +0,0 @@ -/*- - * Copyright (c) 2005-2009 Stanislav Sedov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include - -#include -#include - -#include "libprocstat.h" -#include "common_kvm.h" - -int -ntfs_filestat(kvm_t *kd, struct vnode *vp, struct vnstat *vn) -{ - struct fnode fnod; - struct ntnode node; - int error; - - assert(kd); - assert(vn); - error = kvm_read_all(kd, (unsigned long)VTOF(vp), &fnod, sizeof(fnod)); - if (error != 0) { - warnx("can't read ntfs fnode at %p", (void *)VTOF(vp)); - return (1); - } - error = kvm_read_all(kd, (unsigned long)FTONT(&fnod), &node, - sizeof(node)); - if (error != 0) { - warnx("can't read ntfs node at %p", (void *)FTONT(&fnod)); - return (1); - } - vn->vn_fileid = node.i_number; - vn->vn_fsid = dev2udev(kd, node.i_dev); - return (0); -} diff --git a/lib/libprocstat/nwfs.c b/lib/libprocstat/nwfs.c deleted file mode 100644 index 0cce56fc77..0000000000 --- a/lib/libprocstat/nwfs.c +++ /dev/null @@ -1,75 +0,0 @@ -/*- - * Copyright (c) 2005-2009 Stanislav Sedov - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ -#include - -#include -#include -#include -#include -#define _KERNEL -#include -#undef _KERNEL - -#include - -#include -#include -#include -#include - -#include -#include - -#include "libprocstat.h" -#include "common_kvm.h" - -int -nwfs_filestat(kvm_t *kd, struct vnode *vp, struct vnstat *vn) -{ - struct mount mnt; - struct nwnode node; - int error; - - assert(kd); - assert(vn); - error = kvm_read_all(kd, (unsigned long)VTONW(vp), &node, sizeof(node)); - if (error != 0) { - warnx("can't read nwfs fnode at %p", (void *)VTONW(vp)); - return (1); - } - error = kvm_read_all(kd, (unsigned long)getvnodemount(vp), &mnt, - sizeof(mnt)); - if (error != 0) { - warnx("can't read mount at %p for vnode %p", - (void *)getvnodemount(vp), vp); - return (1); - } - vn->vn_fileid = node.n_fid.f_id; - if (vn->vn_fileid == 0) - vn->vn_fileid = NWFS_ROOT_INO; - vn->vn_fsid = mnt.mnt_stat.f_fsid.val[0]; - return (0); -} diff --git a/lib/libthread_db/arch/amd64/libc_r_md.c b/lib/libthread_db/arch/amd64/libc_r_md.c deleted file mode 100644 index f7860a2c9f..0000000000 --- a/lib/libthread_db/arch/amd64/libc_r_md.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2004 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD: src/lib/libthread_db/arch/amd64/libc_r_md.c,v 1.1.26.1 2008/11/25 02:59:29 kensmith Exp $"); - -#include -#include - -void -libc_r_md_getgregs(jmp_buf jb, prgregset_t *r) -{ -} - -void -libc_r_md_getfpregs(jmp_buf jb, prfpregset_t *r) -{ -} diff --git a/lib/libthread_db/arch/i386/libc_r_md.c b/lib/libthread_db/arch/i386/libc_r_md.c deleted file mode 100644 index f384d5fece..0000000000 --- a/lib/libthread_db/arch/i386/libc_r_md.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2004 Marcel Moolenaar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -__FBSDID("$FreeBSD: src/lib/libthread_db/arch/i386/libc_r_md.c,v 1.1.26.1 2008/11/25 02:59:29 kensmith Exp $"); - -#include -#include - -void -libc_r_md_getgregs(jmp_buf jb, prgregset_t r) -{ - r->r_eip = jb->_jb[0]; - r->r_ebx = jb->_jb[1]; - r->r_esp = jb->_jb[2]; - r->r_ebp = jb->_jb[3]; - r->r_esi = jb->_jb[4]; - r->r_edi = jb->_jb[5]; - r->r_eax = jb->_jb[6]; -} - -void -libc_r_md_getfpregs(jmp_buf jb, prfpregset_t *r) -{ -} diff --git a/lib/msun/src/imprecise.c b/lib/msun/src/imprecise.c deleted file mode 100644 index 4062aebc5e..0000000000 --- a/lib/msun/src/imprecise.c +++ /dev/null @@ -1,56 +0,0 @@ -/*- - * SPDX-License-Identifier: BSD-2-Clause-FreeBSD - * - * Copyright (c) 2013 David Chisnall - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include -#include - -/* - * If long double is not the same size as double, then these will lose - * precision and we should emit a warning whenever something links against - * them. - */ -#if (LDBL_MANT_DIG > 53) -#define WARN_IMPRECISE(x) \ - __warn_references(x, # x " has lower than advertised precision"); -#else -#define WARN_IMPRECISE(x) -#endif -/* - * Declare the functions as weak variants so that other libraries providing - * real versions can override them. - */ -#define DECLARE_WEAK(x)\ - __weak_reference(imprecise_## x, x);\ - WARN_IMPRECISE(x) - -#define DECLARE_IMPRECISE(f) \ - long double imprecise_ ## f ## l(long double v) { return f(v); }\ - DECLARE_WEAK(f ## l) - -DECLARE_IMPRECISE(tgamma); diff --git a/lib/msun/tests/lround_test.t b/lib/msun/tests/lround_test.t deleted file mode 100644 index 74eb8c9c58..0000000000 --- a/lib/msun/tests/lround_test.t +++ /dev/null @@ -1,9 +0,0 @@ -#!/bin/sh - -cd `dirname $0` - -executable=`basename $0 .t` - -make $executable 2>&1 > /dev/null - -exec ./$executable diff --git a/libexec/rc/rc.d/amd b/libexec/rc/rc.d/amd deleted file mode 100755 index 0cef4e6f58..0000000000 --- a/libexec/rc/rc.d/amd +++ /dev/null @@ -1,48 +0,0 @@ -#!/bin/sh -# -# - -# PROVIDE: amd -# REQUIRE: rpcbind ypset nfsclient FILESYSTEMS ldconfig -# BEFORE: DAEMON -# KEYWORD: nojail shutdown - -. /etc/rc.subr - -name="amd" -desc="Automatically mount filesystems" -rcvar="amd_enable" -command="/usr/sbin/${name}" -start_precmd="amd_precmd" -command_args="&" -extra_commands="reload" - -amd_precmd() -{ - force_depend nfsclient nfs_client || return 1 - force_depend rpcbind || return 1 - - case ${amd_map_program} in - [Nn][Oo] | '') - ;; - *) - rc_flags="${rc_flags} `echo $(eval ${amd_map_program})`" - ;; - esac - - case "${amd_flags}" in - '') - if [ ! -r /etc/amd.conf ]; then - warn 'amd will not load without arguments' - return 1 - fi - ;; - *) - rc_flags="-p ${rc_flags}" - command_args="> /var/run/amd.pid 2> /dev/null" - ;; - esac -} - -load_rc_config $name -run_rc_command "$1" diff --git a/libexec/rtld-elf/amd64/elf_rtld.x b/libexec/rtld-elf/amd64/elf_rtld.x deleted file mode 100644 index e19168cb88..0000000000 --- a/libexec/rtld-elf/amd64/elf_rtld.x +++ /dev/null @@ -1,131 +0,0 @@ -OUTPUT_FORMAT("elf32-i386", "elf32-i386", - "elf32-i386") -OUTPUT_ARCH(i386) -ENTRY(_start) -SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/obj/usr/src/tmp/usr/i386-unknown-freebsdelf/lib); -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = 0x08000000 + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .gnu.version : { *(.gnu.version) } - .gnu.version_d : { *(.gnu.version_d) } - .gnu.version_r : { *(.gnu.version_r) } - .rel.text : - { *(.rel.text) *(.rel.gnu.linkonce.t*) } - .rela.text : - { *(.rela.text) *(.rela.gnu.linkonce.t*) } - .rel.data : - { *(.rel.data) *(.rel.gnu.linkonce.d*) } - .rela.data : - { *(.rela.data) *(.rela.gnu.linkonce.d*) } - .rel.rodata : - { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } - .rela.rodata : - { *(.rela.rodata) *(.rela.gnu.linkonce.r*) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.init : { *(.rel.init) } - .rela.init : { *(.rela.init) } - .rel.fini : { *(.rel.fini) } - .rela.fini : { *(.rela.fini) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } =0x9090 - .plt : { *(.plt) } - .text : - { - *(.text) - *(.stub) - /* .gnu.warning sections are handled specially by elf32.em. */ - *(.gnu.warning) - *(.gnu.linkonce.t*) - } =0x9090 - _etext = .; - PROVIDE (etext = .); - .fini : { *(.fini) } =0x9090 - .rodata : { *(.rodata) *(.gnu.linkonce.r*) } - .rodata1 : { *(.rodata1) } - /* Adjust the address for the data segment. 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We want to adjust up to - the same address within the page on the next page up. */ - . = ALIGN(0x1000) + (. & (0x1000 - 1)); - .data : - { - *(.data) - *(.gnu.linkonce.d*) - CONSTRUCTORS - } - .data1 : { *(.data1) } - .ctors : - { - *(.ctors) - } - .dtors : - { - *(.dtors) - } - .got : { *(.got.plt) *(.got) } - .dynamic : { *(.dynamic) } - /* We want the small data sections together, so single-instruction offsets - can access them all, and initialized data all before uninitialized, so - we can shorten the on-disk segment size. */ - .sdata : { *(.sdata) } - _edata = .; - PROVIDE (edata = .); - __bss_start = .; - .sbss : { *(.sbss) *(.scommon) } - .bss : - { - *(.dynbss) - *(.bss) - *(COMMON) - } - . = ALIGN(32 / 8); - _end = . ; - PROVIDE (end = .); - /* Stabs debugging sections. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } - .stab.excl 0 : { *(.stab.excl) } - .stab.exclstr 0 : { *(.stab.exclstr) } - .stab.index 0 : { *(.stab.index) } - .stab.indexstr 0 : { *(.stab.indexstr) } - .comment 0 : { *(.comment) } - /* DWARF debug sections. - Symbols in the DWARF debugging sections are relative to the beginning - of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - /* These must appear regardless of . */ -} diff --git a/libexec/rtld-elf/ia64/Makefile.inc b/libexec/rtld-elf/ia64/Makefile.inc deleted file mode 100644 index e69de29bb2..0000000000 diff --git a/libexec/rtld-elf/ia64/reloc.c b/libexec/rtld-elf/ia64/reloc.c deleted file mode 100644 index d443190dc1..0000000000 --- a/libexec/rtld-elf/ia64/reloc.c +++ /dev/null @@ -1,674 +0,0 @@ -/*- - * Copyright 1996, 1997, 1998, 1999 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD: stable/10/libexec/rtld-elf/ia64/reloc.c 331206 2018-03-19 14:28:58Z marius $ - */ - -/* - * Dynamic linker for ELF. - * - * John Polstra . - */ - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "debug.h" -#include "rtld.h" - -extern Elf_Dyn _DYNAMIC; - -/* - * Macros for loading/storing unaligned 64-bit values. These are - * needed because relocations can point to unaligned data. This - * occurs in the DWARF2 exception frame tables generated by the - * compiler, for instance. - * - * We don't use these when relocating jump slots and GOT entries, - * since they are guaranteed to be aligned. - * - * XXX dfr stub for now. - */ -#define load64(p) (*(u_int64_t *) (p)) -#define store64(p, v) (*(u_int64_t *) (p) = (v)) - -/* Allocate an @fptr. */ - -#define FPTR_CHUNK_SIZE 64 - -struct fptr_chunk { - struct fptr fptrs[FPTR_CHUNK_SIZE]; -}; - -static struct fptr_chunk first_chunk; -static struct fptr_chunk *current_chunk = &first_chunk; -static struct fptr *next_fptr = &first_chunk.fptrs[0]; -static struct fptr *last_fptr = &first_chunk.fptrs[FPTR_CHUNK_SIZE]; - -/* - * We use static storage initially so that we don't have to call - * malloc during init_rtld(). - */ -static struct fptr * -alloc_fptr(Elf_Addr target, Elf_Addr gp) -{ - struct fptr* fptr; - - if (next_fptr == last_fptr) { - current_chunk = xmalloc(sizeof(struct fptr_chunk)); - next_fptr = ¤t_chunk->fptrs[0]; - last_fptr = ¤t_chunk->fptrs[FPTR_CHUNK_SIZE]; - } - fptr = next_fptr; - next_fptr++; - fptr->target = target; - fptr->gp = gp; - return fptr; -} - -static struct fptr ** -alloc_fptrs(Obj_Entry *obj, bool mapped) -{ - struct fptr **fptrs; - size_t fbytes; - - fbytes = obj->dynsymcount * sizeof(struct fptr *); - - /* - * Avoid malloc, if requested. Happens when relocating - * rtld itself on startup. - */ - if (mapped) { - fptrs = mmap(NULL, fbytes, PROT_READ|PROT_WRITE, - MAP_ANON, -1, 0); - if (fptrs == MAP_FAILED) - fptrs = NULL; - } else { - fptrs = xcalloc(1, fbytes); - } - - /* - * This assertion is necessary to guarantee function pointer - * uniqueness - */ - assert(fptrs != NULL); - - return (obj->priv = fptrs); -} - -static void -free_fptrs(Obj_Entry *obj, bool mapped) -{ - struct fptr **fptrs; - size_t fbytes; - - fptrs = obj->priv; - if (fptrs == NULL) - return; - - fbytes = obj->dynsymcount * sizeof(struct fptr *); - if (mapped) - munmap(fptrs, fbytes); - else - free(fptrs); - obj->priv = NULL; -} - -/* Relocate a non-PLT object with addend. */ -static int -reloc_non_plt_obj(Obj_Entry *obj_rtld, Obj_Entry *obj, const Elf_Rela *rela, - SymCache *cache, int flags, RtldLockState *lockstate) -{ - struct fptr **fptrs; - Elf_Addr *where = (Elf_Addr *) (obj->relocbase + rela->r_offset); - - switch (ELF_R_TYPE(rela->r_info)) { - case R_IA_64_REL64LSB: - /* - * We handle rtld's relocations in rtld_start.S - */ - if (obj != obj_rtld) - store64(where, - load64(where) + (Elf_Addr) obj->relocbase); - break; - - case R_IA_64_DIR64LSB: { - const Elf_Sym *def; - const Obj_Entry *defobj; - Elf_Addr target; - - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - flags, cache, lockstate); - if (def == NULL) - return -1; - - target = (def->st_shndx != SHN_UNDEF) - ? (Elf_Addr)(defobj->relocbase + def->st_value) : 0; - store64(where, target + rela->r_addend); - break; - } - - case R_IA_64_FPTR64LSB: { - /* - * We have to make sure that all @fptr references to - * the same function are identical so that code can - * compare function pointers. - */ - const Elf_Sym *def; - const Obj_Entry *defobj; - struct fptr *fptr = 0; - Elf_Addr target, gp; - int sym_index; - - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - SYMLOOK_IN_PLT | flags, cache, lockstate); - if (def == NULL) { - /* - * XXX r_debug_state is problematic and find_symdef() - * returns NULL for it. This probably has something to - * do with symbol versioning (r_debug_state is in the - * symbol map). If we return -1 in that case we abort - * relocating rtld, which typically is fatal. So, for - * now just skip the symbol when we're relocating - * rtld. We don't care about r_debug_state unless we - * are being debugged. - */ - if (obj != obj_rtld) - return -1; - break; - } - - if (def->st_shndx != SHN_UNDEF) { - target = (Elf_Addr)(defobj->relocbase + def->st_value); - gp = (Elf_Addr)defobj->pltgot; - - /* rtld is allowed to reference itself only */ - assert(!obj->rtld || obj == defobj); - fptrs = defobj->priv; - if (fptrs == NULL) - fptrs = alloc_fptrs((Obj_Entry *) defobj, - obj->rtld); - - sym_index = def - defobj->symtab; - - /* - * Find the @fptr, using fptrs as a helper. - */ - if (fptrs) - fptr = fptrs[sym_index]; - if (!fptr) { - fptr = alloc_fptr(target, gp); - if (fptrs) - fptrs[sym_index] = fptr; - } - } else - fptr = NULL; - - store64(where, (Elf_Addr)fptr); - break; - } - - case R_IA_64_IPLTLSB: { - /* - * Relocation typically used to populate C++ virtual function - * tables. It creates a 128-bit function descriptor at the - * specified memory address. - */ - const Elf_Sym *def; - const Obj_Entry *defobj; - struct fptr *fptr; - Elf_Addr target, gp; - - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - flags, cache, lockstate); - if (def == NULL) - return -1; - - if (def->st_shndx != SHN_UNDEF) { - target = (Elf_Addr)(defobj->relocbase + def->st_value); - gp = (Elf_Addr)defobj->pltgot; - } else { - target = 0; - gp = 0; - } - - fptr = (void*)where; - store64(&fptr->target, target); - store64(&fptr->gp, gp); - break; - } - - case R_IA_64_DTPMOD64LSB: { - const Elf_Sym *def; - const Obj_Entry *defobj; - - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - flags, cache, lockstate); - if (def == NULL) - return -1; - - store64(where, defobj->tlsindex); - break; - } - - case R_IA_64_DTPREL64LSB: { - const Elf_Sym *def; - const Obj_Entry *defobj; - - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - flags, cache, lockstate); - if (def == NULL) - return -1; - - store64(where, def->st_value + rela->r_addend); - break; - } - - case R_IA_64_TPREL64LSB: { - const Elf_Sym *def; - const Obj_Entry *defobj; - - def = find_symdef(ELF_R_SYM(rela->r_info), obj, &defobj, - flags, cache, lockstate); - if (def == NULL) - return -1; - - /* - * We lazily allocate offsets for static TLS as we - * see the first relocation that references the - * TLS block. This allows us to support (small - * amounts of) static TLS in dynamically loaded - * modules. If we run out of space, we generate an - * error. - */ - if (!defobj->tls_done) { - if (!allocate_tls_offset((Obj_Entry*) defobj)) { - _rtld_error("%s: No space available for static " - "Thread Local Storage", obj->path); - return -1; - } - } - - store64(where, defobj->tlsoffset + def->st_value + rela->r_addend); - break; - } - - case R_IA_64_NONE: - break; - - default: - _rtld_error("%s: Unsupported relocation type %u" - " in non-PLT relocations\n", obj->path, - (unsigned int)ELF_R_TYPE(rela->r_info)); - return -1; - } - - return(0); -} - -/* Process the non-PLT relocations. */ -int -reloc_non_plt(Obj_Entry *obj, Obj_Entry *obj_rtld, int flags, - RtldLockState *lockstate) -{ - const Elf_Rel *rellim; - const Elf_Rel *rel; - const Elf_Rela *relalim; - const Elf_Rela *rela; - SymCache *cache; - int bytes = obj->dynsymcount * sizeof(SymCache); - int r = -1; - - if ((flags & SYMLOOK_IFUNC) != 0) - /* XXX not implemented */ - return (0); - - /* - * The dynamic loader may be called from a thread, we have - * limited amounts of stack available so we cannot use alloca(). - */ - cache = mmap(NULL, bytes, PROT_READ|PROT_WRITE, MAP_ANON, -1, 0); - if (cache == MAP_FAILED) - cache = NULL; - - /* Perform relocations without addend if there are any: */ - rellim = (const Elf_Rel *) ((caddr_t) obj->rel + obj->relsize); - for (rel = obj->rel; obj->rel != NULL && rel < rellim; rel++) { - Elf_Rela locrela; - - locrela.r_info = rel->r_info; - locrela.r_offset = rel->r_offset; - locrela.r_addend = 0; - if (reloc_non_plt_obj(obj_rtld, obj, &locrela, cache, flags, - lockstate)) - goto done; - } - - /* Perform relocations with addend if there are any: */ - relalim = (const Elf_Rela *) ((caddr_t) obj->rela + obj->relasize); - for (rela = obj->rela; obj->rela != NULL && rela < relalim; rela++) { - if (reloc_non_plt_obj(obj_rtld, obj, rela, cache, flags, - lockstate)) - goto done; - } - - r = 0; -done: - if (cache) - munmap(cache, bytes); - - /* - * Release temporarily mapped fptrs if relocating - * rtld object itself. A new table will be created - * in make_function_pointer using malloc when needed. - */ - if (obj->rtld && obj->priv) - free_fptrs(obj, true); - - return (r); -} - -/* Process the PLT relocations. */ -int -reloc_plt(Obj_Entry *obj) -{ - /* All PLT relocations are the same kind: Elf_Rel or Elf_Rela. */ - if (obj->pltrelsize != 0) { - const Elf_Rel *rellim; - const Elf_Rel *rel; - - rellim = (const Elf_Rel *) - ((char *)obj->pltrel + obj->pltrelsize); - for (rel = obj->pltrel; rel < rellim; rel++) { - Elf_Addr *where; - - assert(ELF_R_TYPE(rel->r_info) == R_IA_64_IPLTLSB); - - /* Relocate the @fptr pointing into the PLT. */ - where = (Elf_Addr *)(obj->relocbase + rel->r_offset); - *where += (Elf_Addr)obj->relocbase; - } - } else { - const Elf_Rela *relalim; - const Elf_Rela *rela; - - relalim = (const Elf_Rela *) - ((char *)obj->pltrela + obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - Elf_Addr *where; - - assert(ELF_R_TYPE(rela->r_info) == R_IA_64_IPLTLSB); - - /* Relocate the @fptr pointing into the PLT. */ - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - *where += (Elf_Addr)obj->relocbase; - } - } - return 0; -} - -int -reloc_iresolve(Obj_Entry *obj, struct Struct_RtldLockState *lockstate) -{ - - /* XXX not implemented */ - return (0); -} - -int -reloc_gnu_ifunc(Obj_Entry *obj, int flags, - struct Struct_RtldLockState *lockstate) -{ - - /* XXX not implemented */ - return (0); -} - -/* Relocate the jump slots in an object. */ -int -reloc_jmpslots(Obj_Entry *obj, int flags, RtldLockState *lockstate) -{ - if (obj->jmpslots_done) - return 0; - /* All PLT relocations are the same kind: Elf_Rel or Elf_Rela. */ - if (obj->pltrelsize != 0) { - const Elf_Rel *rellim; - const Elf_Rel *rel; - - rellim = (const Elf_Rel *) - ((char *)obj->pltrel + obj->pltrelsize); - for (rel = obj->pltrel; rel < rellim; rel++) { - Elf_Addr *where; - const Elf_Sym *def; - const Obj_Entry *defobj; - - assert(ELF_R_TYPE(rel->r_info) == R_IA_64_IPLTLSB); - where = (Elf_Addr *)(obj->relocbase + rel->r_offset); - def = find_symdef(ELF_R_SYM(rel->r_info), obj, - &defobj, SYMLOOK_IN_PLT | flags, NULL, lockstate); - if (def == NULL) - return -1; - reloc_jmpslot(where, - (Elf_Addr)(defobj->relocbase - + def->st_value), - defobj, obj, rel); - } - } else { - const Elf_Rela *relalim; - const Elf_Rela *rela; - - relalim = (const Elf_Rela *) - ((char *)obj->pltrela + obj->pltrelasize); - for (rela = obj->pltrela; rela < relalim; rela++) { - Elf_Addr *where; - const Elf_Sym *def; - const Obj_Entry *defobj; - - where = (Elf_Addr *)(obj->relocbase + rela->r_offset); - def = find_symdef(ELF_R_SYM(rela->r_info), obj, - &defobj, SYMLOOK_IN_PLT | flags, NULL, lockstate); - if (def == NULL) - return -1; - reloc_jmpslot(where, - (Elf_Addr)(defobj->relocbase - + def->st_value), - defobj, obj, (Elf_Rel *)rela); - } - } - obj->jmpslots_done = true; - return 0; -} - -/* Fixup the jump slot at "where" to transfer control to "target". */ -Elf_Addr -reloc_jmpslot(Elf_Addr *where, Elf_Addr target, const Obj_Entry *obj, - const Obj_Entry *refobj, const Elf_Rel *rel) -{ - Elf_Addr stubaddr; - - dbg(" reloc_jmpslot: where=%p, target=%p, gp=%p", - (void *)where, (void *)target, (void *)obj->pltgot); - stubaddr = *where; - if (stubaddr != target) { - - /* - * Point this @fptr directly at the target. Update the - * gp value first so that we don't break another cpu - * which is currently executing the PLT entry. - */ - where[1] = (Elf_Addr) obj->pltgot; - ia64_mf(); - where[0] = target; - ia64_mf(); - } - - /* - * The caller needs an @fptr for the adjusted entry. The PLT - * entry serves this purpose nicely. - */ - return (Elf_Addr) where; -} - -/* - * XXX ia64 doesn't seem to have copy relocations. - * - * Returns 0 on success, -1 on failure. - */ -int -do_copy_relocations(Obj_Entry *dstobj) -{ - - return 0; -} - -/* - * Return the @fptr representing a given function symbol. - */ -void * -make_function_pointer(const Elf_Sym *sym, const Obj_Entry *obj) -{ - struct fptr **fptrs = obj->priv; - int index = sym - obj->symtab; - - if (!fptrs) { - /* - * This should only happen for something like - * dlsym("dlopen"). Actually, I'm not sure it can ever - * happen. - */ - fptrs = alloc_fptrs((Obj_Entry *) obj, false); - } - if (!fptrs[index]) { - Elf_Addr target, gp; - target = (Elf_Addr) (obj->relocbase + sym->st_value); - gp = (Elf_Addr) obj->pltgot; - fptrs[index] = alloc_fptr(target, gp); - } - return fptrs[index]; -} - -void -call_initfini_pointer(const Obj_Entry *obj, Elf_Addr target) -{ - struct fptr fptr; - - fptr.gp = (Elf_Addr) obj->pltgot; - fptr.target = target; - dbg(" initfini: target=%p, gp=%p", - (void *) fptr.target, (void *) fptr.gp); - ((InitFunc) &fptr)(); -} - -void -call_init_pointer(const Obj_Entry *obj, Elf_Addr target) -{ - struct fptr fptr; - - fptr.gp = (Elf_Addr) obj->pltgot; - fptr.target = target; - dbg(" initfini: target=%p, gp=%p", - (void *) fptr.target, (void *) fptr.gp); - ((InitArrFunc) &fptr)(main_argc, main_argv, environ); -} - -void -ifunc_init(Elf_Auxinfo aux_info[__min_size(AT_COUNT)] __unused) -{ - -} - -void -pre_init(void) -{ - -} - -/* Initialize the special PLT entries. */ -void -init_pltgot(Obj_Entry *obj) -{ - const Elf_Dyn *dynp; - Elf_Addr *pltres = 0; - - /* - * When there are no PLT relocations, the DT_IA_64_PLT_RESERVE entry - * is bogus. Do not setup the BOR pointers in that case. An example - * of where this happens is /usr/lib/libxpg4.so.3. - */ - if (obj->pltrelasize == 0 && obj->pltrelsize == 0) - return; - - /* - * Find the PLT RESERVE section. - */ - for (dynp = obj->dynamic; dynp->d_tag != DT_NULL; dynp++) { - if (dynp->d_tag == DT_IA_64_PLT_RESERVE) - pltres = (u_int64_t *) - (obj->relocbase + dynp->d_un.d_ptr); - } - if (!pltres) - errx(1, "Can't find DT_IA_64_PLT_RESERVE entry"); - - /* - * The PLT RESERVE section is used to get values to pass to - * _rtld_bind when lazy binding. - */ - pltres[0] = (Elf_Addr) obj; - pltres[1] = FPTR_TARGET(_rtld_bind_start); - pltres[2] = FPTR_GP(_rtld_bind_start); -} - -void -allocate_initial_tls(Obj_Entry *list) -{ - void *tpval; - - /* - * Fix the size of the static TLS block by using the maximum - * offset allocated so far and adding a bit for dynamic modules to - * use. - */ - tls_static_space = tls_last_offset + tls_last_size + RTLD_STATIC_TLS_EXTRA; - - tpval = allocate_tls(list, NULL, TLS_TCB_SIZE, 16); - __asm __volatile("mov r13 = %0" :: "r"(tpval)); -} - -void *__tls_get_addr(unsigned long module, unsigned long offset) -{ - register Elf_Addr** tp __asm__("r13"); - - return tls_get_addr_common(tp, module, offset); -} diff --git a/libexec/rtld-elf/ia64/rtld_machdep.h b/libexec/rtld-elf/ia64/rtld_machdep.h deleted file mode 100644 index 7823c598a3..0000000000 --- a/libexec/rtld-elf/ia64/rtld_machdep.h +++ /dev/null @@ -1,77 +0,0 @@ -/*- - * Copyright (c) 1999, 2000 John D. Polstra. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD: stable/10/libexec/rtld-elf/ia64/rtld_machdep.h 309061 2016-11-23 17:48:43Z kib $ - */ - -#ifndef RTLD_MACHDEP_H -#define RTLD_MACHDEP_H 1 - -#include -#include - -/* - * Macros for cracking ia64 function pointers. - */ -struct fptr { - Elf_Addr target; - Elf_Addr gp; -}; - -#define FPTR_TARGET(f) (((struct fptr *) (f))->target) -#define FPTR_GP(f) (((struct fptr *) (f))->gp) - -/* Return the address of the .dynamic section in the dynamic linker. */ -#define rtld_dynamic(obj) (&_DYNAMIC) - -struct Struct_Obj_Entry; - -Elf_Addr reloc_jmpslot(Elf_Addr *, Elf_Addr, const struct Struct_Obj_Entry *, - const struct Struct_Obj_Entry *, const Elf_Rel *); -void *make_function_pointer(const Elf_Sym *, const struct Struct_Obj_Entry *); -void call_initfini_pointer(const struct Struct_Obj_Entry *, Elf_Addr); -void call_init_pointer(const struct Struct_Obj_Entry *, Elf_Addr); - -#define call_ifunc_resolver(ptr) \ - (((Elf_Addr (*)(void))ptr)()) - -#define TLS_TCB_SIZE 16 - -#define round(size, align) \ - (((size) + (align) - 1) & ~((align) - 1)) -#define calculate_first_tls_offset(size, align) \ - round(TLS_TCB_SIZE, align) -#define calculate_tls_offset(prev_offset, prev_size, size, align) \ - round(prev_offset + prev_size, align) -#define calculate_tls_end(off, size) ((off) + (size)) - -extern void *__tls_get_addr(unsigned long module, unsigned long offset); - -#define RTLD_DEFAULT_STACK_PF_EXEC 0 -#define RTLD_DEFAULT_STACK_EXEC 0 - -#define RTLD_INIT_PAGESIZES_EARLY 1 - -#endif diff --git a/libexec/rtld-elf/ia64/rtld_start.S b/libexec/rtld-elf/ia64/rtld_start.S deleted file mode 100644 index e3f8c95709..0000000000 --- a/libexec/rtld-elf/ia64/rtld_start.S +++ /dev/null @@ -1,252 +0,0 @@ -/* $FreeBSD: stable/10/libexec/rtld-elf/ia64/rtld_start.S 154957 2006-01-28 17:56:16Z marcel $ */ -/* From: NetBSD: rtld_start.S,v 1.1 1996/12/16 20:38:09 cgd Exp */ - -/* - * Copyright 1996 Matt Thomas - * Copyright 2000 John D. Polstra - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include - -ENTRY(_rtld_start, 0) - alloc r2=ar.pfs,3,0,3,0 - ;; -1: mov r14=ip // calculate gp - addl r3=@gprel(1b),r0 - ;; - sub gp=r14,r3 - ;; - .section .sdata -2: data4 @ltv(1b) // unrelocated address of 1b - .align 8 - .previous - add r15=@gprel(2b),gp - ;; - ld8 r15=[r15] - ;; - sub out0=r14,r15 // out0 is image base address - br.call.sptk.many rp=_rtld_reloc // fixup image - - add sp=-16,sp // 16 bytes for us, 16 for _rtld - ;; - mov out0=in0 - add out1=16,sp // address for exit proc - add out2=24,sp // address for obj_main - - br.call.sptk.many rp=_rtld // r8=_rtld(sp, &exit_proc, &obj_main) - - add r16=16,sp // address for exit proc - ;; - ld8 r15=[r16] // read exit proc - add sp=16,sp // readjust stack - mov b7=r8 // address of real _start - ;; - alloc r2=ar.pfs,0,0,3,0 // dump register frame - mov out2=r15 - ;; - br.call.sptk.many rp=b7 // transfer to main program - br.call.sptk.many rp=exit // die -END(_rtld_start) - -/* - * _rtld_bind_start: lookup a lazy binding and transfer to real target - * - * Arguments: - * r1 gp value for rtld - * r15 Index in plt - * r16 Obj_Entry of caller - * in0-in7 Arguments for target procedure - * rp Return address back to caller - */ -ENTRY(_rtld_bind_start, 0) -{ .mii - alloc loc0=ar.pfs,8,6,3,0 // space to save r8-r11 - add r17=16-8*16,sp // leave 16 bytes for _rtld_bind - add r18=32-8*16,sp - ;; -} { .mii - mov loc2=r8 // structure return address - add sp=-8*16,sp // space to save f8-f15 - mov loc1=rp - ;; -} { .mii - stf.spill [r17]=f8,32 // save float arguments - mov loc3=r9 // language specific - mov loc4=r10 // language specific -} { .mii - stf.spill [r18]=f9,32 - mov loc5=r11 // language specific - shl out1=r15,4 // 16 * index - ;; -} { .mmi - stf.spill [r17]=f10,32 - stf.spill [r18]=f11,32 - mov out0=r16 // Obj_Entry for caller - ;; -} { .mmi - stf.spill [r17]=f12,32 - stf.spill [r18]=f13,32 - shladd out1=r15,3,out1 // rela offset = 24 * index - ;; -} { .mmb - stf.spill [r17]=f14,32 - stf.spill [r18]=f15,32 - br.call.sptk.many rp=_rtld_bind -} { .mii - ld8 r14=[r8],8 // target address - add r17=16,sp - add r18=32,sp - ;; -} { .mii - ld8 r1=[r8] // target gp - mov ar.pfs=loc0 // clean up - mov rp=loc1 -} { .mmi - ldf.fill f8=[r17],32 // restore float arguments - ldf.fill f9=[r18],32 - mov r8=loc2 // restore structure pointer - ;; -} { .mmi - ldf.fill f10=[r17],32 - ldf.fill f11=[r18],32 - mov r9=loc3 - ;; -} { .mmi - ldf.fill f12=[r17],32 - ldf.fill f13=[r18],32 - mov r10=loc4 - ;; -} { .mmi - ldf.fill f14=[r17],32 - ldf.fill f15=[r18],32 - mov r11=loc5 - ;; -} { .mii - nop.m 0 - mov b7=r14 - add sp=8*16,sp - ;; -} { .mib - alloc r14=ar.pfs,0,0,8,0 // drop our register frame - nop.i 0 - br.sptk.many b7 // jump to target -} -END(_rtld_bind_start) - -#define DT_NULL 0 /* Terminating entry. */ -#define DT_RELA 7 /* Address of ElfNN_Rela relocations. */ -#define DT_RELASZ 8 /* Total size of ElfNN_Rela relocations. */ -#define DT_RELAENT 9 /* Size of each ElfNN_Rela relocation entry. */ - -#define R_IA_64_NONE 0 /* None */ -#define R_IA_64_DIR64LSB 0x27 /* word64 LSB S + A */ -#define R_IA_64_REL64LSB 0x6f /* word64 LSB BD + A */ - -/* - * _rtld_reloc: relocate the rtld image, apart from @fptrs. - * - * Assumes that rtld was linked at zero and that we only need to - * handle REL64LSB and DIR64LSB relocations. - * - * Arguments: - * r1 gp value for rtld - * in0 rtld base address - */ -STATIC_ENTRY(_rtld_reloc, 1) - alloc loc0=ar.pfs,1,2,0,0 - mov loc1=rp - ;; - movl r15=@gprel(_DYNAMIC) // find _DYNAMIC etc. - ;; - add r15=r15,gp // relocate _DYNAMIC etc. - ;; -1: ld8 r16=[r15],8 // read r15->d_tag - ;; - ld8 r17=[r15],8 // and r15->d_val - ;; - cmp.eq p6,p0=DT_NULL,r16 // done? -(p6) br.cond.dpnt.few 2f - ;; - cmp.eq p6,p0=DT_RELA,r16 - ;; -(p6) add r18=r17,in0 // found rela section - ;; - cmp.eq p6,p0=DT_RELASZ,r16 - ;; -(p6) mov r19=r17 // found rela size - ;; - cmp.eq p6,p0=DT_RELAENT,r16 - ;; -(p6) mov r22=r17 // found rela entry size - ;; - br.sptk.few 1b - -2: - ld8 r15=[r18],8 // read r_offset - ;; - ld8 r16=[r18],8 // read r_info - add r15=r15,in0 // relocate r_offset - ;; - ld8 r17=[r18],8 // read r_addend - sub r19=r19,r22 // update relasz - - extr.u r23=r16,0,32 // ELF64_R_TYPE(r16) - ;; - cmp.eq p6,p0=R_IA_64_NONE,r23 -(p6) br.cond.dpnt.few 3f - ;; - cmp.eq p6,p0=R_IA_64_DIR64LSB,r23 - ;; -(p6) br.cond.dptk.few 4f - ;; - cmp.eq p6,p0=R_IA_64_REL64LSB,r23 - ;; -(p6) br.cond.dptk.few 4f - ;; - -3: cmp.ltu p6,p0=0,r19 // more? -(p6) br.cond.dptk.few 2b // loop - - mov r8=0 // success return value - ;; - br.cond.sptk.few 9f // done - -4: - ld8 r16=[r15] // read value - ;; - add r16=r16,in0 // relocate it - ;; - st8 [r15]=r16 // and store it back - br.cond.sptk.few 3b - -9: - mov ar.pfs=loc0 - mov rp=loc1 - ;; - br.ret.sptk.few rp - -END(_rtld_reloc) diff --git a/libexec/rtld-elf/malloc.c b/libexec/rtld-elf/malloc.c deleted file mode 100644 index 2c5664633e..0000000000 --- a/libexec/rtld-elf/malloc.c +++ /dev/null @@ -1,490 +0,0 @@ -/*- - * Copyright (c) 1983 Regents of the University of California. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the University nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#if defined(LIBC_SCCS) && !defined(lint) -/*static char *sccsid = "from: @(#)malloc.c 5.11 (Berkeley) 2/23/91";*/ -static char *rcsid = "$FreeBSD: stable/11/libexec/rtld-elf/malloc.c 331722 2018-03-29 02:50:57Z eadler $"; -#endif /* LIBC_SCCS and not lint */ - -/* - * malloc.c (Caltech) 2/21/82 - * Chris Kingsley, kingsley@cit-20. - * - * This is a very fast storage allocator. It allocates blocks of a small - * number of different sizes, and keeps free lists of each size. Blocks that - * don't exactly fit are passed up to the next larger size. In this - * implementation, the available sizes are 2^n-4 (or 2^n-10) bytes long. - * This is designed for use in a virtual memory environment. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "rtld_printf.h" - -static void morecore(); -static int findbucket(); - -/* - * Pre-allocate mmap'ed pages - */ -#define NPOOLPAGES (32*1024/pagesz) -static caddr_t pagepool_start, pagepool_end; -static int morepages(); - -/* - * The overhead on a block is at least 4 bytes. When free, this space - * contains a pointer to the next free block, and the bottom two bits must - * be zero. When in use, the first byte is set to MAGIC, and the second - * byte is the size index. The remaining bytes are for alignment. - * If range checking is enabled then a second word holds the size of the - * requested block, less 1, rounded up to a multiple of sizeof(RMAGIC). - * The order of elements is critical: ov_magic must overlay the low order - * bits of ov_next, and ov_magic can not be a valid ov_next bit pattern. - */ -union overhead { - union overhead *ov_next; /* when free */ - struct { - u_char ovu_magic; /* magic number */ - u_char ovu_index; /* bucket # */ -#ifdef RCHECK - u_short ovu_rmagic; /* range magic number */ - u_int ovu_size; /* actual block size */ -#endif - } ovu; -#define ov_magic ovu.ovu_magic -#define ov_index ovu.ovu_index -#define ov_rmagic ovu.ovu_rmagic -#define ov_size ovu.ovu_size -}; - -#define MAGIC 0xef /* magic # on accounting info */ -#define RMAGIC 0x5555 /* magic # on range info */ - -#ifdef RCHECK -#define RSLOP sizeof (u_short) -#else -#define RSLOP 0 -#endif - -/* - * nextf[i] is the pointer to the next free block of size 2^(i+3). The - * smallest allocatable block is 8 bytes. The overhead information - * precedes the data area returned to the user. - */ -#define NBUCKETS 30 -static union overhead *nextf[NBUCKETS]; - -static int pagesz; /* page size */ -static int pagebucket; /* page size bucket */ - -#ifdef MSTATS -/* - * nmalloc[i] is the difference between the number of mallocs and frees - * for a given block size. - */ -static u_int nmalloc[NBUCKETS]; -#include -#endif - -#if defined(MALLOC_DEBUG) || defined(RCHECK) -#define ASSERT(p) if (!(p)) botch("p") -#include -static void -botch(s) - char *s; -{ - fprintf(stderr, "\r\nassertion botched: %s\r\n", s); - (void) fflush(stderr); /* just in case user buffered it */ - abort(); -} -#else -#define ASSERT(p) -#endif - -/* Debugging stuff */ -#define TRACE() rtld_printf("TRACE %s:%d\n", __FILE__, __LINE__) - -/* - * The array of supported page sizes is provided by the user, i.e., the - * program that calls this storage allocator. That program must initialize - * the array before making its first call to allocate storage. The array - * must contain at least one page size. The page sizes must be stored in - * increasing order. - */ -extern size_t *pagesizes; - -void * -malloc(nbytes) - size_t nbytes; -{ - register union overhead *op; - register int bucket; - register long n; - register unsigned amt; - - /* - * First time malloc is called, setup page size and - * align break pointer so all data will be page aligned. - */ - if (pagesz == 0) { - pagesz = n = pagesizes[0]; - if (morepages(NPOOLPAGES) == 0) - return NULL; - op = (union overhead *)(pagepool_start); - n = n - sizeof (*op) - ((long)op & (n - 1)); - if (n < 0) - n += pagesz; - if (n) { - pagepool_start += n; - } - bucket = 0; - amt = 8; - while ((unsigned)pagesz > amt) { - amt <<= 1; - bucket++; - } - pagebucket = bucket; - } - /* - * Convert amount of memory requested into closest block size - * stored in hash buckets which satisfies request. - * Account for space used per block for accounting. - */ - if (nbytes <= (unsigned long)(n = pagesz - sizeof (*op) - RSLOP)) { -#ifndef RCHECK - amt = 8; /* size of first bucket */ - bucket = 0; -#else - amt = 16; /* size of first bucket */ - bucket = 1; -#endif - n = -(sizeof (*op) + RSLOP); - } else { - amt = pagesz; - bucket = pagebucket; - } - while (nbytes > amt + n) { - amt <<= 1; - if (amt == 0) - return (NULL); - bucket++; - } - /* - * If nothing in hash bucket right now, - * request more memory from the system. - */ - if ((op = nextf[bucket]) == NULL) { - morecore(bucket); - if ((op = nextf[bucket]) == NULL) - return (NULL); - } - /* remove from linked list */ - nextf[bucket] = op->ov_next; - op->ov_magic = MAGIC; - op->ov_index = bucket; -#ifdef MSTATS - nmalloc[bucket]++; -#endif -#ifdef RCHECK - /* - * Record allocated size of block and - * bound space with magic numbers. - */ - op->ov_size = roundup2(nbytes, RSLOP); - op->ov_rmagic = RMAGIC; - *(u_short *)((caddr_t)(op + 1) + op->ov_size) = RMAGIC; -#endif - return ((char *)(op + 1)); -} - -void * -calloc(size_t num, size_t size) -{ - void *ret; - - if (size != 0 && (num * size) / size != num) { - /* size_t overflow. */ - return (NULL); - } - - if ((ret = malloc(num * size)) != NULL) - memset(ret, 0, num * size); - - return (ret); -} - -/* - * Allocate more memory to the indicated bucket. - */ -static void -morecore(bucket) - int bucket; -{ - register union overhead *op; - register int sz; /* size of desired block */ - int amt; /* amount to allocate */ - int nblks; /* how many blocks we get */ - - /* - * sbrk_size <= 0 only for big, FLUFFY, requests (about - * 2^30 bytes on a VAX, I think) or for a negative arg. - */ - sz = 1 << (bucket + 3); -#ifdef MALLOC_DEBUG - ASSERT(sz > 0); -#else - if (sz <= 0) - return; -#endif - if (sz < pagesz) { - amt = pagesz; - nblks = amt / sz; - } else { - amt = sz + pagesz; - nblks = 1; - } - if (amt > pagepool_end - pagepool_start) - if (morepages(amt/pagesz + NPOOLPAGES) == 0) - return; - op = (union overhead *)pagepool_start; - pagepool_start += amt; - - /* - * Add new memory allocated to that on - * free list for this hash bucket. - */ - nextf[bucket] = op; - while (--nblks > 0) { - op->ov_next = (union overhead *)((caddr_t)op + sz); - op = (union overhead *)((caddr_t)op + sz); - } -} - -void -free(cp) - void *cp; -{ - register int size; - register union overhead *op; - - if (cp == NULL) - return; - op = (union overhead *)((caddr_t)cp - sizeof (union overhead)); -#ifdef MALLOC_DEBUG - ASSERT(op->ov_magic == MAGIC); /* make sure it was in use */ -#else - if (op->ov_magic != MAGIC) - return; /* sanity */ -#endif -#ifdef RCHECK - ASSERT(op->ov_rmagic == RMAGIC); - ASSERT(*(u_short *)((caddr_t)(op + 1) + op->ov_size) == RMAGIC); -#endif - size = op->ov_index; - ASSERT(size < NBUCKETS); - op->ov_next = nextf[size]; /* also clobbers ov_magic */ - nextf[size] = op; -#ifdef MSTATS - nmalloc[size]--; -#endif -} - -/* - * When a program attempts "storage compaction" as mentioned in the - * old malloc man page, it realloc's an already freed block. Usually - * this is the last block it freed; occasionally it might be farther - * back. We have to search all the free lists for the block in order - * to determine its bucket: 1st we make one pass through the lists - * checking only the first block in each; if that fails we search - * ``realloc_srchlen'' blocks in each list for a match (the variable - * is extern so the caller can modify it). If that fails we just copy - * however many bytes was given to realloc() and hope it's not huge. - */ -int realloc_srchlen = 4; /* 4 should be plenty, -1 =>'s whole list */ - -void * -realloc(cp, nbytes) - void *cp; - size_t nbytes; -{ - register u_int onb; - register int i; - union overhead *op; - char *res; - int was_alloced = 0; - - if (cp == NULL) - return (malloc(nbytes)); - op = (union overhead *)((caddr_t)cp - sizeof (union overhead)); - if (op->ov_magic == MAGIC) { - was_alloced++; - i = op->ov_index; - } else { - /* - * Already free, doing "compaction". - * - * Search for the old block of memory on the - * free list. First, check the most common - * case (last element free'd), then (this failing) - * the last ``realloc_srchlen'' items free'd. - * If all lookups fail, then assume the size of - * the memory block being realloc'd is the - * largest possible (so that all "nbytes" of new - * memory are copied into). Note that this could cause - * a memory fault if the old area was tiny, and the moon - * is gibbous. However, that is very unlikely. - */ - if ((i = findbucket(op, 1)) < 0 && - (i = findbucket(op, realloc_srchlen)) < 0) - i = NBUCKETS; - } - onb = 1 << (i + 3); - if (onb < (u_int)pagesz) - onb -= sizeof (*op) + RSLOP; - else - onb += pagesz - sizeof (*op) - RSLOP; - /* avoid the copy if same size block */ - if (was_alloced) { - if (i) { - i = 1 << (i + 2); - if (i < pagesz) - i -= sizeof (*op) + RSLOP; - else - i += pagesz - sizeof (*op) - RSLOP; - } - if (nbytes <= onb && nbytes > (size_t)i) { -#ifdef RCHECK - op->ov_size = roundup2(nbytes, RSLOP); - *(u_short *)((caddr_t)(op + 1) + op->ov_size) = RMAGIC; -#endif - return(cp); - } else - free(cp); - } - if ((res = malloc(nbytes)) == NULL) - return (NULL); - if (cp != res) /* common optimization if "compacting" */ - bcopy(cp, res, (nbytes < onb) ? nbytes : onb); - return (res); -} - -/* - * Search ``srchlen'' elements of each free list for a block whose - * header starts at ``freep''. If srchlen is -1 search the whole list. - * Return bucket number, or -1 if not found. - */ -static int -findbucket(freep, srchlen) - union overhead *freep; - int srchlen; -{ - register union overhead *p; - register int i, j; - - for (i = 0; i < NBUCKETS; i++) { - j = 0; - for (p = nextf[i]; p && j != srchlen; p = p->ov_next) { - if (p == freep) - return (i); - j++; - } - } - return (-1); -} - -#ifdef MSTATS -/* - * mstats - print out statistics about malloc - * - * Prints two lines of numbers, one showing the length of the free list - * for each size category, the second showing the number of mallocs - - * frees for each size category. - */ -mstats(s) - char *s; -{ - register int i, j; - register union overhead *p; - int totfree = 0, - totused = 0; - - fprintf(stderr, "Memory allocation statistics %s\nfree:\t", s); - for (i = 0; i < NBUCKETS; i++) { - for (j = 0, p = nextf[i]; p; p = p->ov_next, j++) - ; - fprintf(stderr, " %d", j); - totfree += j * (1 << (i + 3)); - } - fprintf(stderr, "\nused:\t"); - for (i = 0; i < NBUCKETS; i++) { - fprintf(stderr, " %d", nmalloc[i]); - totused += nmalloc[i] * (1 << (i + 3)); - } - fprintf(stderr, "\n\tTotal in use: %d, total free: %d\n", - totused, totfree); -} -#endif - - -static int -morepages(n) -int n; -{ - int fd = -1; - int offset; - - if (pagepool_end - pagepool_start > pagesz) { - caddr_t addr = (caddr_t) - (((long)pagepool_start + pagesz - 1) & ~(pagesz - 1)); - if (munmap(addr, pagepool_end - addr) != 0) - rtld_fdprintf(STDERR_FILENO, "morepages: munmap %p", - addr); - } - - offset = (long)pagepool_start - ((long)pagepool_start & ~(pagesz - 1)); - - if ((pagepool_start = mmap(0, n * pagesz, - PROT_READ|PROT_WRITE, - MAP_ANON|MAP_COPY, fd, 0)) == (caddr_t)-1) { - rtld_printf("Cannot map anonymous memory\n"); - return 0; - } - pagepool_end = pagepool_start + n * pagesz; - pagepool_start += offset; - - return n; -} diff --git a/libexec/rtld-elf/paths.h b/libexec/rtld-elf/paths.h deleted file mode 100644 index 4c78407eb1..0000000000 --- a/libexec/rtld-elf/paths.h +++ /dev/null @@ -1,77 +0,0 @@ -/*- - * Copyright 1996, 1997, 1998, 1999, 2000 John D. Polstra. - * Copyright 2003 Alexander Kabaev . - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - */ - -#ifndef PATHS_H -#define PATHS_H - -#undef _PATH_ELF_HINTS - -#ifdef COMPAT_32BIT -#define _PATH_ELF_HINTS "/var/run/ld-elf32.so.hints" -#define _PATH_LIBMAP_CONF "/etc/libmap32.conf" -#define _BASENAME_RTLD "ld-elf32.so.1" -#define STANDARD_LIBRARY_PATH "/lib32:/usr/lib32" -#define LD_ "LD_32_" -#endif - -#ifndef _PATH_ELF_HINTS -#define _PATH_ELF_HINTS "/var/run/ld-elf.so.hints" -#endif - -#ifndef _PATH_LIBMAP_CONF -#define _PATH_LIBMAP_CONF "/etc/libmap.conf" -#endif - -#ifndef _BASENAME_RTLD -#define _BASENAME_RTLD "ld-elf.so.1" -#endif - -#ifndef _PATH_RTLD -#define _PATH_RTLD "/libexec/" _BASENAME_RTLD -#endif - -#ifndef STANDARD_LIBRARY_PATH -#define STANDARD_LIBRARY_PATH "/lib/casper:/lib:/usr/lib" -#endif - -#ifndef LD_ -#define LD_ "LD_" -#endif - -#define _PATH_SOFT_ELF_HINTS "/var/run/ld-elf-soft.so.hints" -#define _PATH_SOFT_LIBMAP_CONF "/etc/libmap-soft.conf" -#define _PATH_SOFT_RTLD "/libexec/ld-elf.so.1" -#define SOFT_STANDARD_LIBRARY_PATH "/usr/libsoft" -#define LD_SOFT_ "LD_SOFT_" - -extern const char *ld_elf_hints_default; -extern const char *ld_path_libmap_conf; -extern const char *ld_path_rtld; -extern const char *ld_standard_library_path; -extern const char *ld_env_prefix; - -#endif /* PATHS_H */ diff --git a/release/arm/BANANAPI.conf b/release/arm/BANANAPI.conf deleted file mode 100644 index 7622fa8103..0000000000 --- a/release/arm/BANANAPI.conf +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/sh -# -# - -EMBEDDED_TARGET_ARCH="armv7" -EMBEDDED_TARGET="arm" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-bananapi" -FAT_SIZE="50m -b 1m" -FAT_TYPE="16" -IMAGE_SIZE="3072M" -KERNEL="GENERIC" -MD_ARGS="-x 63 -y 255" -NODOC=1 -PART_SCHEME="MBR" -export BOARDNAME="BANANAPI" - -arm_install_uboot() { - UBOOT_DIR="/usr/local/share/u-boot/u-boot-bananapi" - UBOOT_FILES="u-boot-sunxi-with-spl.bin" - chroot ${CHROOTDIR} dd if=${UBOOT_DIR}/${UBOOT_FILES} \ - of=/dev/${mddev} bs=1k seek=8 conv=sync - - return 0 -} diff --git a/release/arm/BEAGLEBONE.conf b/release/arm/BEAGLEBONE.conf deleted file mode 100644 index 21c1bfed5c..0000000000 --- a/release/arm/BEAGLEBONE.conf +++ /dev/null @@ -1,30 +0,0 @@ -#!/bin/sh -# -# - -EMBEDDED_TARGET_ARCH="armv7" -EMBEDDED_TARGET="arm" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-beaglebone" -FAT_SIZE="50m" -FAT_TYPE="16" -IMAGE_SIZE="3072M" -KERNEL="GENERIC" -MD_ARGS="-x 63 -y 255" -NODOC=1 -PART_SCHEME="MBR" -export BOARDNAME="BEAGLEBONE" - -arm_install_uboot() { - UBOOT_DIR="/usr/local/share/u-boot/u-boot-beaglebone" - FATMOUNT="${DESTDIR%${KERNEL}}/fat" - chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" - chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} - chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/MLO ${FATMOUNT}/MLO - chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/u-boot.img ${FATMOUNT}/u-boot.img - sync - umount_loop ${CHROOTDIR}/${FATMOUNT} - chroot ${CHROOTDIR} rmdir ${FATMOUNT} - - return 0 -} diff --git a/release/arm/CUBIEBOARD.conf b/release/arm/CUBIEBOARD.conf deleted file mode 100644 index 1d40135e1c..0000000000 --- a/release/arm/CUBIEBOARD.conf +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/sh -# -# - -EMBEDDED_TARGET_ARCH="armv7" -EMBEDDED_TARGET="arm" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-cubieboard" -FAT_SIZE="50m -b 1m" -FAT_TYPE="16" -IMAGE_SIZE="3072M" -KERNEL="GENERIC" -MD_ARGS="-x 63 -y 255" -NODOC=1 -PART_SCHEME="MBR" -export BOARDNAME="CUBIEBOARD" - -arm_install_uboot() { - UBOOT_DIR="/usr/local/share/u-boot/u-boot-cubieboard" - UBOOT_FILES="u-boot-sunxi-with-spl.bin" - chroot ${CHROOTDIR} dd if=${UBOOT_DIR}/${UBOOT_FILES} \ - of=/dev/${mddev} bs=1k seek=8 conv=sync - - return 0 -} diff --git a/release/arm/CUBIEBOARD2.conf b/release/arm/CUBIEBOARD2.conf deleted file mode 100644 index fc4eaa721c..0000000000 --- a/release/arm/CUBIEBOARD2.conf +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/sh -# -# - -EMBEDDED_TARGET_ARCH="armv7" -EMBEDDED_TARGET="arm" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-cubieboard2" -FAT_SIZE="50m -b 1m" -FAT_TYPE="16" -IMAGE_SIZE="3072M" -KERNEL="GENERIC" -MD_ARGS="-x 63 -y 255" -NODOC=1 -PART_SCHEME="MBR" -export BOARDNAME="CUBIEBOARD2" - -arm_install_uboot() { - UBOOT_DIR="/usr/local/share/u-boot/u-boot-cubieboard2" - UBOOT_FILES="u-boot-sunxi-with-spl.bin" - chroot ${CHROOTDIR} dd if=${UBOOT_DIR}/${UBOOT_FILES} \ - of=/dev/${mddev} bs=1k seek=8 conv=sync - - return 0 -} diff --git a/release/arm/CUBOX-HUMMINGBOARD.conf b/release/arm/CUBOX-HUMMINGBOARD.conf deleted file mode 100644 index 16cc89a685..0000000000 --- a/release/arm/CUBOX-HUMMINGBOARD.conf +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/sh -# -# - -EMBEDDED_TARGET_ARCH="armv7" -EMBEDDED_TARGET="arm" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-cubox-hummingboard" -FAT_SIZE="50m -b 16384" -FAT_TYPE="16" -IMAGE_SIZE="3072M" -KERNEL="GENERIC" -MD_ARGS="-x 63 -y 255" -NODOC=1 -PART_SCHEME="MBR" -export BOARDNAME="CUBOX-HUMMINGBOARD" - -arm_install_uboot() { - UBOOT_DIR="/usr/local/share/u-boot/u-boot-cubox-hummingboard" - UBOOT_FILES="u-boot.imx" - chroot ${CHROOTDIR} dd if=${UBOOT_DIR}/${UBOOT_FILES} \ - of=/dev/${mddev} bs=512 seek=2 conv=sync - - return 0 -} diff --git a/release/arm/GUMSTIX.conf b/release/arm/GUMSTIX.conf deleted file mode 100644 index 579a580e2a..0000000000 --- a/release/arm/GUMSTIX.conf +++ /dev/null @@ -1,39 +0,0 @@ -#!/bin/sh -# -# - -EMBEDDED_TARGET_ARCH="arm" -EMBEDDED_TARGET="arm" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-duovero" -FAT_SIZE="41m" -FAT_TYPE="12" -IMAGE_SIZE="480M" -KERNEL="GUMSTIX" -MD_ARGS="-x 63 -y 255" -NODOC=1 -PART_SCHEME="MBR" -SRCBRANCH="base/stable/10@rHEAD" -WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x88000000" - -arm_install_uboot() { - UBOOT_DIR="/usr/local/share/u-boot/u-boot-duovero" - FATMOUNT="${DESTDIR%${KERNEL}}/fat" - UFSMOUNT="${DESTDIR%${KERNEL}}/ufs" - chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" "${UFSMOUNT}" - chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} - chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${UFSMOUNT} - chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/MLO ${FATMOUNT}/MLO - chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/u-boot.img ${FATMOUNT}/u-boot.img - chroot ${CHROOTDIR} cp ${UBOOT_DIR}/boot.scr ${FATMOUNT}/boot.scr - chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/ubldr.bin \ - ${FATMOUNT}/ubldr.bin - chroot ${CHROOTDIR} touch ${UFSMOUNT}/firstboot - sync - umount_loop ${CHROOTDIR}/${FATMOUNT} - umount_loop ${CHROOTDIR}/${UFSMOUNT} - chroot ${CHROOTDIR} rmdir ${FATMOUNT} - chroot ${CHROOTDIR} rmdir ${UFSMOUNT} - - return 0 -} diff --git a/release/arm/PANDABOARD.conf b/release/arm/PANDABOARD.conf deleted file mode 100644 index 0b80f78a3f..0000000000 --- a/release/arm/PANDABOARD.conf +++ /dev/null @@ -1,30 +0,0 @@ -#!/bin/sh -# -# - -EMBEDDED_TARGET_ARCH="armv7" -EMBEDDED_TARGET="arm" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-pandaboard" -FAT_SIZE="50m" -FAT_TYPE="16" -IMAGE_SIZE="3072M" -KERNEL="GENERIC" -MD_ARGS="-x 63 -y 255" -NODOC=1 -PART_SCHEME="MBR" -export BOARDNAME="PANDABOARD" - -arm_install_uboot() { - UBOOT_DIR="/usr/local/share/u-boot/u-boot-pandaboard" - FATMOUNT="${DESTDIR%${KERNEL}}/fat" - chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" - chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} - chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/MLO ${FATMOUNT}/MLO - chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/u-boot.img ${FATMOUNT}/u-boot.img - sync - umount_loop ${CHROOTDIR}/${FATMOUNT} - chroot ${CHROOTDIR} rmdir ${FATMOUNT} - - return 0 -} diff --git a/release/arm/RPI2.conf b/release/arm/RPI2.conf deleted file mode 100644 index 022b5e5b83..0000000000 --- a/release/arm/RPI2.conf +++ /dev/null @@ -1,49 +0,0 @@ -#!/bin/sh -# -# - -EMBEDDED_TARGET_ARCH="armv7" -EMBEDDED_TARGET="arm" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-rpi2 sysutils/rpi-firmware" -FAT_SIZE="50m" -FAT_TYPE="16" -IMAGE_SIZE="3072M" -KERNEL="GENERIC" -MD_ARGS="-x 63 -y 255" -NODOC=1 -UBOOT_DIR="/usr/local/share/u-boot/u-boot-rpi2" -RPI_FIRMWARE_DIR="/usr/local/share/rpi-firmware" -OL_DIR="${RPI_FIRMWARE_DIR}/overlays" -OVERLAYS="mmc.dtbo" -PART_SCHEME="MBR" -export BOARDNAME="RPI2" - -arm_install_uboot() { - UBOOT_FILES="u-boot.bin" - RPI_FIRMWARE_FILES="bootcode.bin config.txt \ - fixup.dat fixup_cd.dat fixup_db.dat fixup_x.dat \ - start.elf start_cd.elf start_db.elf start_x.elf \ - bcm2709-rpi-2-b.dtb" - FATMOUNT="${DESTDIR%${KERNEL}}/fat" - chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" - chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} - for _UF in ${UBOOT_FILES}; do - chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/${_UF} \ - ${FATMOUNT}/${_UF} - done - for _UF in ${RPI_FIRMWARE_FILES}; do - chroot ${CHROOTDIR} cp -p ${RPI_FIRMWARE_DIR}/${_UF} \ - ${FATMOUNT}/${_UF} - done - chroot ${CHROOTDIR} mkdir -p ${FATMOUNT}/overlays - for _OL in ${OVERLAYS}; do - chroot ${CHROOTDIR} cp -p ${OL_DIR}/${_OL} \ - ${FATMOUNT}/overlays/${_OL} - done - sync - umount_loop ${CHROOTDIR}/${FATMOUNT} - chroot ${CHROOTDIR} rmdir ${FATMOUNT} - - return 0 -} diff --git a/release/arm/WANDBOARD.conf b/release/arm/WANDBOARD.conf deleted file mode 100644 index bdf709d1e1..0000000000 --- a/release/arm/WANDBOARD.conf +++ /dev/null @@ -1,25 +0,0 @@ -#!/bin/sh -# -# - -EMBEDDED_TARGET_ARCH="armv7" -EMBEDDED_TARGET="arm" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-wandboard" -FAT_SIZE="50m -b 16384" -FAT_TYPE="16" -IMAGE_SIZE="3072M" -KERNEL="GENERIC" -MD_ARGS="-x 63 -y 255" -NODOC=1 -PART_SCHEME="MBR" -export BOARDNAME="WANDBOARD" - -arm_install_uboot() { - UBOOT_DIR="/usr/local/share/u-boot/u-boot-wandboard" - UBOOT_FILES="u-boot.imx" - chroot ${CHROOTDIR} dd if=${UBOOT_DIR}/${UBOOT_FILES} \ - of=/dev/${mddev} bs=512 seek=2 conv=sync - - return 0 -} diff --git a/release/arm64/RPI3.conf b/release/arm64/RPI3.conf deleted file mode 100644 index d1be8cace2..0000000000 --- a/release/arm64/RPI3.conf +++ /dev/null @@ -1,54 +0,0 @@ -#!/bin/sh -# -# - -DTB_DIR="/usr/local/share/rpi-firmware" -DTB="bcm2710-rpi-3-b.dtb bcm2710-rpi-3-b-plus.dtb bcm2711-rpi-4-b.dtb" -EMBEDDED_TARGET_ARCH="aarch64" -EMBEDDED_TARGET="arm64" -EMBEDDEDBUILD=1 -EMBEDDEDPORTS="sysutils/u-boot-rpi3 sysutils/rpi-firmware" -FAT_SIZE="50m -b 1m" -FAT_TYPE="16" -IMAGE_SIZE="3072M" -KERNEL="GENERIC" -MD_ARGS="-x 63 -y 255" -NODOC=1 -OL_DIR="${DTB_DIR}/overlays" -OVERLAYS="mmc.dtbo pwm.dtbo disable-bt.dtbo" -PART_SCHEME="MBR" -export BOARDNAME="RPI3" - -arm_install_uboot() { - UBOOT_DIR="/usr/local/share/u-boot/u-boot-rpi3" - UBOOT_FILES="README u-boot.bin" - DTB_FILES="armstub8.bin armstub8-gic.bin bootcode.bin fixup_cd.dat \ - fixup_db.dat fixup_x.dat fixup.dat LICENCE.broadcom \ - start_cd.elf start_db.elf start_x.elf start.elf ${DTB}" - FATMOUNT="${DESTDIR%${KERNEL}}fat" - chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" - chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} - for _UF in ${UBOOT_FILES}; do - chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/${_UF} \ - ${FATMOUNT}/${_UF} - done - for _DF in ${DTB_FILES}; do - chroot ${CHROOTDIR} cp -p ${DTB_DIR}/${_DF} \ - ${FATMOUNT}/${_DF} - done - chroot ${CHROOTDIR} cp -p ${DTB_DIR}/config_rpi4.txt \ - ${FATMOUNT} - chroot ${CHROOTDIR} cp -p ${DTB_DIR}/config_rpi3.txt \ - ${FATMOUNT}/config.txt - chroot ${CHROOTDIR} mkdir -p ${FATMOUNT}/overlays - for _OL in ${OVERLAYS}; do - chroot ${CHROOTDIR} cp -p ${OL_DIR}/${_OL} \ - ${FATMOUNT}/overlays/${_OL} - done - - sync - umount_loop ${CHROOTDIR}/${FATMOUNT} - chroot ${CHROOTDIR} rmdir ${FATMOUNT} - - return 0 -}