Can you give me a example?

[luckyhorse1]

• Lookup.cpp

// This is a hierarchical lookup unless it's the first component in the path and the
// current scope is either an interface port or a package
result.isHierarchical = symbol->kind != SymbolKind::InterfacePort &&
                                  symbol->kind != SymbolKind::Package &&
                                  symbol->kind != SymbolKind::CompilationUnit;

I cannot find a example for this.
Is this code consistent with the comment?

And whether "f.x" is hierarchical below?

module m();
	function f;
		int x;
	endfunction
	int a = f.x;
endmodule

[MikePopoloski]

'f' in your example is a subroutine, so it is hierarchical. The code + comment seem clear to me -- it's hierarchical unless it's an interface port, a package, or a compilation unit.

[luckyhorse1]

so,“ an interface port, a package, or a compilation unit ” ，can you give me their example in hierarchical form, thank you

[luckyhorse1]

Is m.a hierarchical ?

module m;
  int a;
  int b = m.a;
endmodule

[luckyhorse1]

if (symbol->kind == SymbolKind::InstanceArray || symbol->kind == SymbolKind::Instance) {
      result.isHierarchical = symbol->getParentScope() != &context.scope;
  }

[MikePopoloski]

Yeah, there is a special case for accessing members in the same scope. It seems like you're well equipped to answer these questions yourself.

[luckyhorse1]

ok, but why interface port, a package, or a compilation unit be excluded, can you show some example?

[MikePopoloski]

This is just based on language rules. If you're looking for examples of things like package accesses, you can look up more general documentation or tutorials on SystemVerilog.

[luckyhorse1]

ok, thank you