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base repository: RobertCNelson/bb.org-overlays
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head repository: OffgridElectric/bb.org-overlays
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Commits on Mar 23, 2021

  1. add draft dts for LTC2947 on SPI1

    - use BB-SPIDEV1-00A0.dts as template
    
    - revise according to examples on the [Analog Devices wiki][1]
    
    [1]: https://wiki.analog.com/resources/tools-software/linux-drivers/hwmon/ltc2947#example_i2c_spi_device_initialization
    bluesquall authored and LynnL4 committed Mar 23, 2021
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  2. enable second LTC2947 on SPI1 CS=P9.42

    bluesquall authored and LynnL4 committed Mar 23, 2021
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  3. BB-SPIDEV* document ti,pindir-d0-out-d1-in option

    Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
    RobertCNelson authored and LynnL4 committed Mar 23, 2021
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  7. Add: gpio-hog/gpio1_17/vdd_5v_b OK after disable cape-universal,

         which will export all expansion IOs to /sys/class/gpio/gpioN
    turmary authored and LynnL4 committed Mar 23, 2021
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  8. Add: WIFI&BT OK

    turmary authored and LynnL4 committed Mar 23, 2021
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  9. Move: MMC1(SDCard) CD gpio0_6 -> gpio3_14

    turmary authored and LynnL4 committed Mar 23, 2021
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  10. Add: CAN1 OK

    turmary authored and LynnL4 committed Mar 23, 2021
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  12. Add: 2x 12V Digital Inputs OK

    turmary authored and LynnL4 committed Mar 23, 2021
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  13. Add: 5x User Leds OK

    turmary authored and LynnL4 committed Mar 23, 2021
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  14. Add: PWM1/BUZZER OK

    turmary authored and LynnL4 committed Mar 23, 2021
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  15. Add: i2c0(DS1340)/i2c1(ATECC) OK

    turmary authored and LynnL4 committed Mar 23, 2021
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  17. Add: USB0 Host mode OK

    turmary authored and LynnL4 committed Mar 23, 2021
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  18. Remove: disable EQEP

    turmary authored and LynnL4 committed Mar 23, 2021
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Commits on Aug 31, 2022

  1. Add PWM output for Zola Power On LED

    (New) 3x Pins for the PWM Outputs to the Zola Power On LED (J16-Pins
    4, 6, 8) - These are GPIO 3_15, 3_16, and 3_17. These now need to be
    setup for PWM.
    Jean Parpaillon committed Aug 31, 2022
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  2. Add Relay Control pin

    Update/Ensure Exist Relay Control - 1x Digital Outputs (J6 Pins 4, 11,
    14) Map to GPIO 0_22
    Jean Parpaillon committed Aug 31, 2022
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Commits on Sep 13, 2022

  1. Merge pull request #1 from OffgridElectric/edge-comm-card

    Update Device Tree for Edge Comm Card
    jeanparpaillon authored Sep 13, 2022
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Showing with 525 additions and 40 deletions.
  1. +69 −39 src/arm/BB-BBBW-WL1835-00A0.dts
  2. +111 −0 src/arm/BB-SPI1-LTC2947-00A0.dts
  3. +7 −0 src/arm/BB-SPIDEV0-00A0.dts
  4. +7 −1 src/arm/BB-SPIDEV1-00A0.dts
  5. +331 −0 src/arm/BB-ZOLA-GATEWAY-00A0.dts
108 changes: 69 additions & 39 deletions src/arm/BB-BBBW-WL1835-00A0.dts
Original file line number Diff line number Diff line change
@@ -11,7 +11,35 @@
#include <dt-bindings/interrupt-controller/irq.h>

/ {
/*
* Free up the pins used by the cape from the pinmux helpers.
*/
fragment@0 {
target = <&ocp>;
__overlay__ {
P8_35_pinmux { status = "disabled"; }; /* lcd_data12.gpio0_8 BT_EN */

P8_11_pinmux { status = "disabled"; }; /* gpmc_ad13.mmc2_dat1 */
P8_12_pinmux { status = "disabled"; }; /* gpmc_ad12.mmc2_dat0 */
P8_14_pinmux { status = "disabled"; }; /* gpmc_ad10.gpio0_26 WL_EN */
P8_15_pinmux { status = "disabled"; }; /* gpmc_ad15.mmc2_dat3 */
P8_16_pinmux { status = "disabled"; }; /* gpmc_ad14.mmc2_dat2 */
P8_17_pinmux { status = "disabled"; }; /* gpmc_ad11.gpio0_27 WL_IRQ */
P8_18_pinmux { status = "disabled"; }; /* gpmc_clk.mmc2_clk */

P8_13_pinmux { status = "disabled"; }; /* gpmc_ad9.gpio0_23 LS_BUF_EN */

// BT UART
P9_21_pinmux { status = "disabled"; }; /* (B17) spi0_d0.uart2_txd */
P9_22_pinmux { status = "disabled"; }; /* (A17) spi0_sclk.uart2_rxd */
P8_37_pinmux { status = "disabled"; }; /* (U1) lcd_data8.uart2_ctsn */
P8_38_pinmux { status = "disabled"; }; /* (U2) lcd_data9.uart2_rtsn */

P9_41_pinmux { status = "disabled"; }; /* (D14) xdma_event_intr1.clkout2 */
};
};

fragment@1 {
target-path="/";
__overlay__ {
model = "TI AM335x BeagleBone Black Wireless";
@@ -34,7 +62,7 @@
startup-delay-us= <70000>;

/* WL_EN */
gpio = <&gpio3 9 0>;
gpio = <&gpio0 26 0>;
enable-active-high;
};

@@ -45,90 +73,92 @@

wl18xx_bt_en {
label = "wl18xx_bt_en";
gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
};

fragment@1 {
fragment@2 {
target = <&am33xx_pinmux>;
__overlay__ {
wl18xx_pins: pinmux_wl18xx_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gmii1_txd0.gpio0_28 - BT_EN */
AM33XX_IOPAD(0x8D0, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* lcd_data12.gpio0_8 BT_EN*/
>;
};

wlbtbuf_pin: pinmux_wlbtbuf_pin {
pinctrl-single,pins = <
AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gmii1_rxclk.gpio3_10 LS_BUF_EN */
AM33XX_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_ad9.gpio0_23 LS_BUF_EN */
>;
};

mmc3_pins: pinmux_mmc3_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */
AM33XX_IOPAD(0x914, PIN_INPUT_PULLUP | MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */
AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */
AM33XX_IOPAD(0x920, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */
AM33XX_IOPAD(0x908, PIN_INPUT_PULLUP | MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */
AM33XX_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
AM33XX_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
AM33XX_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
AM33XX_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
AM33XX_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* gpmc_clk.mmc2_clk */
>;
};

mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE6 ) /* (L15) gmii1_rxd1.mmc2_clk */
AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE6 ) /* (J16) gmii1_txen.mmc2_cmd */
AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE5 ) /* (J17) gmii1_rxdv.mmc2_dat0 */
AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE5 ) /* (J18) gmii1_txd3.mmc2_dat1 */
AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE5 ) /* (K15) gmii1_txd2.mmc2_dat2 */
AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE5 ) /* (H16) gmii1_col.mmc2_dat3 */
AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */
AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */
AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */
AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */
AM33XX_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */
AM33XX_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE3) /* gpmc_clk.mmc2_clk */
>;
};

/* wl18xx card enable/irq GPIOs. */
wlan_pins: pinmux_wlan_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_EN */
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk.gpio0_29 WL_IRQ */
AM33XX_IOPAD(0x828, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN */
AM33XX_IOPAD(0x82C, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ */
/* a 32.768KHz clock feed to WL18XX pin EXT_32K */
AM33XX_IOPAD(0x9B4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};

/* wl18xx card enable/irq GPIOs. */
wlan_pins_sleep: pinmux_wlan_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gmii1_txclk.gpio3_9 WL_EN */
AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7) /* rmii1_refclk.gpio0_29 WL_IRQ */
AM33XX_IOPAD(0x828, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN */
AM33XX_IOPAD(0x82C, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ */
>;
};

uart3_pins_default: pinmux_uart3_pins_default {
uart2_pins_default: pinmux_uart2_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* gmii1_rxd3.uart3_rxd */
AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gmii1_rxd2.uart3_txd */
AM33XX_IOPAD(0x948, PIN_INPUT | MUX_MODE3) /* mdio_data.uart3_ctsn */
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mdio_clk.uart3_rtsn */
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE1 ) /* (A17) spi0_sclk.uart2_rxd */
AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (B17) spi0_d0.uart2_txd */
AM33XX_IOPAD(0x8C0, PIN_INPUT | MUX_MODE6 ) /* (U1) lcd_data8.uart2_ctsn */
AM33XX_IOPAD(0x8C4, PIN_OUTPUT_PULLDOWN | MUX_MODE6 ) /* (U2) lcd_data9.uart2_rtsn */
>;
};

uart3_pins_sleep: pinmux_uart3_pins_sleep {
uart2_pins_sleep: pinmux_uart2_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (L17) gmii1_rxd3.uart3_rxd */
AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (L16) gmii1_rxd2.uart3_txd */
AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (M17) mdio_data.uart3_ctsn */
AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (M18) mdio_clk.uart3_rtsn */
AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (A17) spi0_sclk.uart2_rxd */
AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (B17) spi0_d0.uart2_txd */
AM33XX_IOPAD(0x8C0, PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (U1) lcd_data8.uart2_ctsn */
AM33XX_IOPAD(0x8C4, PIN_INPUT_PULLDOWN | MUX_MODE7 ) /* (U2) lcd_data9.uart2_rtsn */
>;
};
};
};

fragment@2 {
fragment@200 {
target = <&mac>;
__overlay__ {
status = "disabled";
status = "okay";
};
};

@@ -155,27 +185,27 @@
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio0>;
interrupts = <29 IRQ_TYPE_EDGE_RISING>;
interrupts = <27 IRQ_TYPE_EDGE_RISING>;
};
};
};

fragment@4 {
target = <&uart3>;
target = <&uart2>;
__overlay__ {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart3_pins_default>;
pinctrl-1 = <&uart3_pins_sleep>;
pinctrl-0 = <&uart2_pins_default>;
pinctrl-1 = <&uart2_pins_sleep>;
status = "okay";
};
};

fragment@5 {
target = <&gpio3>;
target = <&gpio0>;
__overlay__ {
ls_buf_en {
gpio-hog;
gpios = <10 GPIO_ACTIVE_HIGH>;
gpios = <23 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "LS_BUF_EN";
};
111 changes: 111 additions & 0 deletions src/arm/BB-SPI1-LTC2947-00A0.dts
Original file line number Diff line number Diff line change
@@ -0,0 +1,111 @@
/*
* Copyright (C) 2020 Otter Works
*
* LTC2947 on SPI1
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/

/dts-v1/;
/plugin/;

#include <dt-bindings/board/am335x-bbw-bbb-base.h>
#include <dt-bindings/pinctrl/am33xx.h>

/ {
compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green";

/* identification */
part-number = "BB-SPI1-LTC2947";
version = "00A0";

/* state the resources this cape uses */
exclusive-use =
/* the pin header uses */
"P9.31", /* spi1_sclk */
"P9.29", /* spi1_d0 */
"P9.30", /* spi1_d1 */
"P9.28", /* spi1_cs0 */
"P9.42", /* spi1_cs1 */
/* the hardware ip uses */
"spi1";

/*
* Helper to show loaded overlays under: /proc/device-tree/chosen/overlays/
*/
fragment@0 {
target-path="/";
__overlay__ {

chosen {
overlays {
BB-SPI1-LTC2947-00A0 = __TIMESTAMP__;
};
};
};
};

/*
* Free up the pins used by the cape from the pinmux helpers.
*/
fragment@1 {
target = <&ocp>;
__overlay__ {
P9_28_pinmux { status = "disabled"; }; /* spi1_cs0 */
P9_42_pinmux { status = "disabled"; }; /* spi1_cs1 */
P9_30_pinmux { status = "disabled"; }; /* spi1_d1 */
P9_29_pinmux { status = "disabled"; }; /* spi1_d0 */
P9_31_pinmux { status = "disabled"; }; /* spi1_sclk */
};
};

fragment@2 {
target = <&am33xx_pinmux>;
__overlay__ {
/* default state has all gpios released and mode set to uart1 */
bb_spi1_pins: pinmux_bb_spi1_pins {
pinctrl-single,pins = <
0x190 0x33 /* mcasp0_aclkx.spi1_sclk, INPUT_PULLUP | MODE3 */
0x194 0x33 /* mcasp0_fsx.spi1_d0, INPUT_PULLUP | MODE3 */
0x198 0x13 /* mcasp0_axr0.spi1_d1, OUTPUT_PULLUP | MODE3 */
0x19c 0x13 /* mcasp0_ahclkr.spi1_cs0, OUTPUT_PULLUP | MODE3 */
0x164 0x12 /* eCAP0_in_PWM0_out.spi1_cs1 OUTPUT_PULLUP | MODE2 */
>;
};
};
};

fragment@3 {
target = <&spi1>;
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;

status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bb_spi1_pins>;
ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */

ltc2947_spi1_0: ltc2947@0 {
#address-cells = <1>;
#size-cells = <0>;

compatible = "adi,ltc2947";

reg = <0>;
spi-max-frequency = <1000000>;
};
ltc2947_spi1_1: ltc2947@1 {
#address-cells = <1>;
#size-cells = <0>;

compatible = "adi,ltc2947";

reg = <1>;
spi-max-frequency = <1000000>;
};
};
};
};
7 changes: 7 additions & 0 deletions src/arm/BB-SPIDEV0-00A0.dts
Original file line number Diff line number Diff line change
@@ -83,6 +83,13 @@
pinctrl-names = "default";
pinctrl-0 = <&bb_spi0_pins>;

/*
* Select the D0 pin as output and D1 as
* input. The default is D0 as input and
* D1 as output.
*/
//ti,pindir-d0-out-d1-in;

channel@0 {
#address-cells = <1>;
#size-cells = <0>;
8 changes: 7 additions & 1 deletion src/arm/BB-SPIDEV1-00A0.dts
Original file line number Diff line number Diff line change
@@ -85,7 +85,13 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&bb_spi1_pins>;
ti,pio-mode; /* disable dma when used as an overlay, dma gets stuck at 160 bits... */

/*
* Select the D0 pin as output and D1 as
* input. The default is D0 as input and
* D1 as output.
*/
//ti,pindir-d0-out-d1-in;

channel@0 {
#address-cells = <1>;
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