fix(dbltrp): pass critical-error to difftest, when NEMU acts as REF

* hit good trap when nemu raise critical error as DUT

src/cpu/difftest/ref.c

@@ -167,6 +167,11 @@ int difftest_store_commit(uint64_t *saddr, uint64_t *sdata, uint8_t *smask) {
 #endif
 }
 #endif
+#ifdef CONFIG_RV_SMDBLTRP
+bool difftest_raise_critical_error() {
+  return cpu.critical_error;
+}
+#endif
 
 void difftest_exec(uint64_t n) {
   cpu_exec(n);

src/isa/riscv64/include/isa-def.h

@@ -167,6 +167,9 @@ typedef struct {
 #ifdef CONFIG_RV_IMSIC
   bool virtualInterruptIsHvictlInject;
 #endif
+#ifdef CONFIG_RV_SMDBLTRP
+  bool critical_error;
+#endif
 
 } riscv64_CPU_state;
 

src/isa/riscv64/init.c

@@ -60,6 +60,7 @@ void init_isa() {
   cpu.gpr[0]._64 = 0;
 
   cpu.mode = MODE_M;
+  IFDEF(CONFIG_RV_SMDBLTRP, cpu.critical_error = 0);
   // For RV64 systems, the SXL and UXL fields are WARL fields that
   // control the value of XLEN for S-mode and U-mode, respectively.
   // For RV64 systems, if S-mode is not supported, then SXL is hardwired to zero.

src/isa/riscv64/system/intr.c

@@ -107,11 +107,18 @@ word_t raise_intr(word_t NO, vaddr_t epc) {
   }
 #endif
 #ifdef CONFIG_RV_SMRNMI
+  if (!mnstatus->nmie){
 #ifdef CONFIG_SHARE
-  if (!mnstatus->nmie){return 0; } // this will assert in difftest
+    IFDEF(CONFIG_RV_SMDBLTRP,cpu.critical_error = true);
+   // this will compare in difftest
 #else
-  Assert(mnstatus->nmie, "critical error: trap when nmie close");
+    printf("\33[1;31mHIT CRITICAL ERROR\33[0m: trap when mnstatus.nmie close, please check if software cause a double trap.\n");
+    nemu_state.state = NEMU_END;
+    nemu_state.halt_pc = epc;
+    nemu_state.halt_ret = 0;
 #endif // CONFIG_SHARE
+    return 0;
+  }
 #endif // CONFIG_RV_SMRNMI
   bool isNMI = MUXDEF(CONFIG_RV_SMRNMI, cpu.hasNMI && (NO & INTR_BIT), false);
   bool delegS = intr_deleg_S(NO);