fix(aes): fix decode logic and exception check for aes64ks1i.

OpenXiangShan · Nov 7, 2024 · 7671c34 · 7671c34
1 parent 34ba225
commit 7671c34
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Showing 3 changed files with 39 additions and 2 deletions.
diff --git a/src/isa/riscv64/instr/rvi/decode.h b/src/isa/riscv64/instr/rvi/decode.h
@@ -13,6 +13,8 @@
 *
 * See the Mulan PSL v2 for more details.
 ***************************************************************************************/
+#ifndef RVI_DECODE_H
+#define RVI_DECODE_H
 
 static int table_c_addi_dispatch(Decode *s);
 static int table_c_addiw_dispatch(Decode *s);
@@ -77,6 +79,10 @@ static inline def_DHelper(S) {
   decode_op_r(s, id_dest, s->isa.instr.s.rs2, true);
 }
 
+#ifdef CONFIG_RVK
+#include "../rvk/decode.h"
+#endif // CONFIG_RVK
+
 static inline def_SubDHelper(load, I, {
   print_Dop(id_src1->str, OP_STR_SIZE, "%ld(%s)", id_src2->imm, reg_name(s->isa.instr.i.rs1, 4));
 })
@@ -166,7 +172,7 @@ def_THelper(op_imm) {
   #endif
   #ifdef CONFIG_RVK
   def_INSTR_TAB("0011000 00000 ????? 001 ????? ????? ??", aes64im);
-  def_INSTR_TAB("0011000 1???? ????? 001 ????? ????? ??", aes64ks1i);
+  def_INSTR_IDTAB("0011000 1???? ????? 001 ????? ????? ??", aes64ks1i, aes64ks1i);
   def_INSTR_TAB("0001000 00000 ????? 001 ????? ????? ??", sha256sum0);
   def_INSTR_TAB("0001000 00001 ????? 001 ????? ????? ??", sha256sum1);
   def_INSTR_TAB("0001000 00010 ????? 001 ????? ????? ??", sha256sig0);
@@ -324,3 +330,4 @@ def_THelper(mem_fence) {
   def_INSTR_TAB("??????? ????? ????? 001 ????? ????? ??", fence_i);
   return EXEC_ID_inv;
 }
+#endif // RVI_DECODE_H
diff --git a/src/isa/riscv64/instr/rvk/crypto_impl.h b/src/isa/riscv64/instr/rvk/crypto_impl.h
@@ -19,7 +19,7 @@
 #include <limits.h>
 #include "aes_common.h"
 #include "sm4_common.h"
-
+#include "../local-include/intr.h"
 
 int32_t sha256sum0 (int32_t rs1) { return _rv32_ror(rs1, 2)  ^ _rv32_ror(rs1, 13) ^ _rv32_ror(rs1, 22); }
 int32_t sha256sum1 (int32_t rs1) { return _rv32_ror(rs1, 6)  ^ _rv32_ror(rs1, 11) ^ _rv32_ror(rs1, 25); }
@@ -91,6 +91,10 @@ int64_t aes64im (int64_t rs1)
 
 int64_t aes64ks1i (int64_t rs1, int64_t rs2)
 {
+    if (!(rs2 >= 0x0 && rs2 <= 0xA)) {
+        // Note that rnum must be in the range 0x0..0xA. The values 0xB..0xF are reserved.
+        longjmp_exception(EX_II);
+    }
     uint8_t     round_consts [10] = {
         0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36
     };

diff --git a/src/isa/riscv64/instr/rvk/decode.h b/src/isa/riscv64/instr/rvk/decode.h
@@ -0,0 +1,26 @@
+/***************************************************************************************
+* Copyright (c) 2014-2021 Zihao Yu, Nanjing University
+* Copyright (c) 2020-2022 Institute of Computing Technology, Chinese Academy of Sciences
+*
+* NEMU is licensed under Mulan PSL v2.
+* You can use this software according to the terms and conditions of the Mulan PSL v2.
+* You may obtain a copy of Mulan PSL v2 at:
+*          http://license.coscl.org.cn/MulanPSL2
+*
+* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+*
+* See the Mulan PSL v2 for more details.
+***************************************************************************************/
+
+#ifndef RVK_DECODE_H
+#define RVK_DECODE_H
+#include <cpu/decode.h>
+#include "../rvi/decode.h"
+
+static inline def_DHelper(aes64ks1i) {
+  sword_t simm = BITS(s->isa.instr.i.simm11_0, 3, 0);
+  decode_op_i(s, id_src2, simm, false);
+}
+#endif // RVK_DECODE_H