diff --git a/configs/riscv64-dual-xs-ref_defconfig b/configs/riscv64-dual-xs-ref_defconfig
index 836c0b4ae..0acfbcceb 100644
--- a/configs/riscv64-dual-xs-ref_defconfig
+++ b/configs/riscv64-dual-xs-ref_defconfig
@@ -39,10 +39,8 @@ CONFIG_RV_IMSIC=y
 CONFIG_GEILEN=5
 CONFIG_RV_SSTC=y
 CONFIG_RV_SMRNMI=y
-CONFIG_RV_SMDBLTRP=y
-# CONFIG_MDT_INIT is not set
-CONFIG_RV_SSDBLTRP=y
-CONFIG_NMIE_INIT=y
+# CONFIG_RV_SMDBLTRP is not set
+# CONFIG_RV_SSDBLTRP is not set
 CONFIG_RV_ZICNTR=y
 CONFIG_RV_CSR_TIME=y
 CONFIG_RV_ZIHINTPAUSE=y
diff --git a/configs/riscv64-xs-ref_defconfig b/configs/riscv64-xs-ref_defconfig
index 803a17d6b..2547beafe 100644
--- a/configs/riscv64-xs-ref_defconfig
+++ b/configs/riscv64-xs-ref_defconfig
@@ -39,10 +39,8 @@ CONFIG_RV_IMSIC=y
 CONFIG_GEILEN=5
 CONFIG_RV_SSTC=y
 CONFIG_RV_SMRNMI=y
-CONFIG_RV_SMDBLTRP=y
-# CONFIG_MDT_INIT is not set
-CONFIG_RV_SSDBLTRP=y
-CONFIG_NMIE_INIT=y
+# CONFIG_RV_SMDBLTRP is not set
+# CONFIG_RV_SSDBLTRP is not set
 CONFIG_RV_ZICNTR=y
 CONFIG_RV_CSR_TIME=y
 CONFIG_RV_ZIHINTPAUSE=y
diff --git a/src/isa/riscv64/instr/rvv/vcompute_impl.c b/src/isa/riscv64/instr/rvv/vcompute_impl.c
index 0a446b037..4aa210075 100644
--- a/src/isa/riscv64/instr/rvv/vcompute_impl.c
+++ b/src/isa/riscv64/instr/rvv/vcompute_impl.c
@@ -414,7 +414,10 @@ void arthimetic_instr(int opcode, int is_signed, int widening, int narrow, int d
     }
   }
   check_vstart_exception(s);
-  if(check_vstart_ignore(s)) return;
+  if(check_vstart_ignore(s)) {
+    vp_set_dirty();
+    return;
+  }
   for(word_t idx = vstart->val; idx < vl->val; idx ++) {
     // mask
     rtlreg_t mask = get_mask(0, idx);