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fix(lrsc): configure NEMU's reservation set size to 64B to match XS #654

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Nov 14, 2024
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1 change: 1 addition & 0 deletions configs/riscv64-dual-xs-ref_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -155,6 +155,7 @@ CONFIG_AC_NONE=y
CONFIG_VECTOR_AC_SOFT=y
CONFIG_MMIO_AC_SOFT=y
CONFIG_AMO_AC_SOFT=y
CONFIG_RESERVATION_SET_WIDTH=6

#
# Processor difftest reference config
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1 change: 1 addition & 0 deletions configs/riscv64-xs-ahead-ref_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -110,6 +110,7 @@ CONFIG_FPU_SOFT=y
# CONFIG_AC_HOST is not set
CONFIG_AC_SOFT=y
# CONFIG_AC_NONE is not set
CONFIG_RESERVATION_SET_WIDTH=6

#
# Processor difftest reference config
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1 change: 1 addition & 0 deletions configs/riscv64-xs-cpt_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -171,6 +171,7 @@ CONFIG_AC_NONE=y
CONFIG_VECTOR_AC_SOFT=y
CONFIG_MMIO_AC_SOFT=y
CONFIG_AMO_AC_SOFT=y
CONFIG_RESERVATION_SET_WIDTH=6

#
# Processor difftest reference config
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1 change: 1 addition & 0 deletions configs/riscv64-xs-diff-spike-agnostic_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -155,6 +155,7 @@ CONFIG_FPU_SOFT=y
# CONFIG_AC_HOST is not set
CONFIG_AC_SOFT=y
# CONFIG_AC_NONE is not set
CONFIG_RESERVATION_SET_WIDTH=6

#
# Processor difftest reference config
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1 change: 1 addition & 0 deletions configs/riscv64-xs-diff-spike_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -173,6 +173,7 @@ CONFIG_AC_NONE=y
# CONFIG_VECTOR_AC_SOFT is not set
# CONFIG_MMIO_AC_SOFT is not set
# CONFIG_AMO_AC_SOFT is not set
CONFIG_RESERVATION_SET_WIDTH=6

#
# Processor difftest reference config
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1 change: 1 addition & 0 deletions configs/riscv64-xs-fpga_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -117,6 +117,7 @@ CONFIG_FPU_SOFT=y
# CONFIG_AC_HOST is not set
CONFIG_AC_SOFT=y
# CONFIG_AC_NONE is not set
CONFIG_RESERVATION_SET_WIDTH=6

#
# Processor difftest reference config
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1 change: 1 addition & 0 deletions configs/riscv64-xs-novga_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -111,6 +111,7 @@ CONFIG_FPU_SOFT=y
# CONFIG_AC_HOST is not set
CONFIG_AC_SOFT=y
# CONFIG_AC_NONE is not set
CONFIG_RESERVATION_SET_WIDTH=6

#
# Processor difftest reference config
Expand Down
1 change: 1 addition & 0 deletions configs/riscv64-xs-ref_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -156,6 +156,7 @@ CONFIG_AC_NONE=y
CONFIG_VECTOR_AC_SOFT=y
CONFIG_MMIO_AC_SOFT=y
CONFIG_AMO_AC_SOFT=y
CONFIG_RESERVATION_SET_WIDTH=6

#
# Processor difftest reference config
Expand Down
1 change: 1 addition & 0 deletions configs/riscv64-xs_defconfig
Original file line number Diff line number Diff line change
Expand Up @@ -176,6 +176,7 @@ CONFIG_AC_NONE=y
CONFIG_VECTOR_AC_SOFT=y
CONFIG_MMIO_AC_SOFT=y
CONFIG_AMO_AC_SOFT=y
CONFIG_RESERVATION_SET_WIDTH=6

#
# Processor difftest reference config
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4 changes: 4 additions & 0 deletions src/isa/riscv64/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -451,4 +451,8 @@ config RV_ZCB
bool "RISC-V Zcb Extension, Version 1.0.0"
default n

config RESERVATION_SET_WIDTH
int "The Width of the Reservation Set Size"
default 0

endmenu
2 changes: 1 addition & 1 deletion src/isa/riscv64/instr/rva/amo.c
Original file line number Diff line number Diff line change
Expand Up @@ -57,7 +57,7 @@ def_rtl(amo_slow_path, rtlreg_t *dest, const rtlreg_t *src1, const rtlreg_t *src
cpu.amo = true;
#endif
// should check overlapping instead of equality
int success = (cpu.lr_addr == *src1) && cpu.lr_valid;
int success = ((cpu.lr_addr ^ *src1) >> CONFIG_RESERVATION_SET_WIDTH == 0) && cpu.lr_valid;
Logti("cpu sc addr=%lx scr1=%lx vaild=%ld success=%d", cpu.lr_addr,*src1, cpu.lr_valid,success);
cpu.lr_valid = 0;
if (success) {
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