From 1b2ced8699bbf70041c59d4f395a51bc1c51e682 Mon Sep 17 00:00:00 2001
From: Alvin Xie <alvin@radxa.com>
Date: Wed, 15 May 2024 17:19:18 +0800
Subject: [PATCH] feat: add radxa zero3 poe overlay

Signed-off-by: Alvin Xie <alvin@radxa.com>
---
 .../arm64/boot/dts/rockchip/overlays/Makefile |  1 +
 .../overlays/radxa-zero3e-poe-hat.dts         | 56 +++++++++++++++++++
 2 files changed, 57 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/overlays/radxa-zero3e-poe-hat.dts

diff --git a/arch/arm64/boot/dts/rockchip/overlays/Makefile b/arch/arm64/boot/dts/rockchip/overlays/Makefile
index 31503671..f7215021 100644
--- a/arch/arm64/boot/dts/rockchip/overlays/Makefile
+++ b/arch/arm64/boot/dts/rockchip/overlays/Makefile
@@ -300,6 +300,7 @@ dtb-$(CONFIG_CPU_RK3568) += \
 	radxa-zero3-radxa-camera-8m.dtbo \
 	radxa-zero3-rpi-camera-v1.3.dtbo \
 	radxa-zero3-rpi-camera-v2.dtbo \
+	radxa-zero3e-poe-hat.dtbo \
 	radxa-zero3-disabled-ethernet.dtbo \
 	radxa-zero3-disabled-wireless.dtbo \
 	rock-3a-radxa-display-8hd.dtbo \
diff --git a/arch/arm64/boot/dts/rockchip/overlays/radxa-zero3e-poe-hat.dts b/arch/arm64/boot/dts/rockchip/overlays/radxa-zero3e-poe-hat.dts
new file mode 100644
index 00000000..3441eba8
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/overlays/radxa-zero3e-poe-hat.dts
@@ -0,0 +1,56 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/thermal/thermal.h>
+
+/ {
+	metadata {
+		title = "Radxa ZERO 3E PoE HAT";
+		category = "misc";
+		compatible = "radxa,zero3";
+		description = "Radxa ZERO 3E PoE HAT.";
+		exclusive = "GPIO3_C3";
+		package = "rsetup-config-thermal-governor-step-wise";
+	};
+
+	fragment@0 {
+		target-path = "/";
+		__overlay__ {
+			radxa_poe_pwm: radxa-poe-pwm {
+				compatible = "pwm-gpio";
+				#pwm-cells = <3>;
+				pwm-gpio = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
+			};
+
+			radxa_poe_fan: radxa-poe-fan {
+				compatible = "pwm-fan";
+				#cooling-cells = <2>;
+				cooling-min-state = <0>;
+				cooling-max-state = <4>;
+				cooling-levels = <0 64 128 192 255>;
+				pwms = <&radxa_poe_pwm 0 40000 PWM_POLARITY_INVERTED>;
+			};
+		};
+	};
+
+	fragment@1 {
+		target = <&soc_thermal>;
+
+		__overlay__ {
+			sustainable-power = <5000>; /* milliwatts */
+			cooling-maps {
+				map3 {
+					cooling-device = <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <8192>;
+				};
+				map4 {
+					cooling-device = <&radxa_poe_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <8192>;
+				};
+			};
+		};
+	};
+};