From 6ec8f5792b989b559e4065a5a1fc5cf81fd1b086 Mon Sep 17 00:00:00 2001 From: Alvin Xie Date: Mon, 17 Jun 2024 18:05:32 +0800 Subject: [PATCH] feat: add cm3j rpi cm4 io 40pin overlays --- .../arm64/boot/dts/rockchip/overlays/Makefile | 3 ++ .../dts/rockchip/overlays/rk3568-i2c3-m1.dts | 19 ++++++++++++ .../dts/rockchip/overlays/rk3568-i2c5-m0.dts | 19 ++++++++++++ .../overlays/rk3568-spi0-m1-cs0-spidev.dts | 4 +-- .../overlays/rk3568-spi1-m1-cs0-spidev.dts | 2 +- .../overlays/rk3568-spi2-m1-cs0-spidev.dts | 29 +++++++++++++++++++ .../dts/rockchip/overlays/rk3568-uart2-m0.dts | 2 +- .../dts/rockchip/overlays/rk3568-uart3-m1.dts | 6 ++-- .../dts/rockchip/overlays/rk3568-uart4-m1.dts | 5 ++-- .../dts/rockchip/overlays/rk3568-uart5-m1.dts | 5 ++-- .../dts/rockchip/overlays/rk3568-uart8-m1.dts | 5 ++-- 11 files changed, 87 insertions(+), 12 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c3-m1.dts create mode 100644 arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c5-m0.dts create mode 100644 arch/arm64/boot/dts/rockchip/overlays/rk3568-spi2-m1-cs0-spidev.dts diff --git a/arch/arm64/boot/dts/rockchip/overlays/Makefile b/arch/arm64/boot/dts/rockchip/overlays/Makefile index 3f2e9bf0..7b06c0cd 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/Makefile +++ b/arch/arm64/boot/dts/rockchip/overlays/Makefile @@ -192,7 +192,9 @@ dtb-$(CONFIG_CLK_RK3568) += \ rk3568-i2c2-m0.dtbo \ rk3568-i2c2-m1.dtbo \ rk3568-i2c3-m0.dtbo \ + rk3568-i2c3-m1.dtbo \ rk3568-i2c4-m0.dtbo \ + rk3568-i2c5-m0.dtbo \ rk3568-npu-disable.dtbo \ rk3568-npu-enable.dtbo \ rk3568-pwm0-disable.dtbo \ @@ -223,6 +225,7 @@ dtb-$(CONFIG_CLK_RK3568) += \ rk3568-spi0-m0-cs0-spidev.dtbo \ rk3568-spi0-m1-cs0-spidev.dtbo \ rk3568-spi1-m1-cs0-spidev.dtbo \ + rk3568-spi2-m1-cs0-spidev.dtbo \ rk3568-spi3-m0-cs0-mcp2515.dtbo \ rk3568-spi3-m0-cs0-spidev.dtbo \ rk3568-spi3-m0-cs0-waveshare35.dtbo \ diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c3-m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c3-m1.dts new file mode 100644 index 00000000..8176f0ad --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c3-m1.dts @@ -0,0 +1,19 @@ +/dts-v1/; +/plugin/; + +/ { + metadata { + title = "Enable I2C3-M1"; + compatible = "radxa,cm3j-rpi-cm4-io"; + category = "misc"; + exclusive = "GPIO3_B5", "GPIO3_B6", "i2c3"; + description = "Enable I2C3-M1. +On Radxa CM3J RPI CM4 IO this is SDA pin 3 and SCL pin 5."; + }; +}; + +&i2c3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3m1_xfer>; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c5-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c5-m0.dts new file mode 100644 index 00000000..ee6ea0ea --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-i2c5-m0.dts @@ -0,0 +1,19 @@ +/dts-v1/; +/plugin/; + +/ { + metadata { + title = "Enable I2C5-M0"; + compatible = "radxa,cm3j-rpi-cm4-io"; + category = "misc"; + exclusive = "GPIO3_B3", "GPIO3_B4", "i2c5"; + description = "Enable I2C5-M0. +On Radxa CM3J RPI CM4 IO this is SDA pin 27 and SCL pin 28."; + }; +}; + +&i2c5 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5m0_xfer>; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi0-m1-cs0-spidev.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi0-m1-cs0-spidev.dts index e95cc44c..d25865a6 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi0-m1-cs0-spidev.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi0-m1-cs0-spidev.dts @@ -4,9 +4,9 @@ / { metadata { title = "Enable spidev on SPI0-M1 over CS0"; - compatible = "radxa,e25"; + compatible = "radxa,e25", "radxa,cm3j-rpi-cm4-io"; category = "misc"; - exclusive = "GPIO0_C0", "GPIO0_C7", "GPIO0_B5", "GPIO0_B6", "GPIO0_C6", "GPIO0_C5"; + exclusive = "GPIO2_D0", "GPIO2_D1", "GPIO2_D2", "GPIO2_D3"; description = "Enable spidev on SPI0-M1 over CS0."; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi1-m1-cs0-spidev.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi1-m1-cs0-spidev.dts index da2fb652..e573b352 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi1-m1-cs0-spidev.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi1-m1-cs0-spidev.dts @@ -4,7 +4,7 @@ / { metadata { title = "Enable spidev on SPI1-M1 over CS0"; - compatible = "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e25"; + compatible = "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e25", "radxa,cm3j-rpi-cm4-io"; category = "misc"; exclusive = "GPIO3_B7", "GPIO3_C0", "GPIO3_C1", "GPIO3_C3", "GPIO3_A1", "GPIO3_C2"; description = "Enable spidev on SPI1-M1 over CS0."; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi2-m1-cs0-spidev.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi2-m1-cs0-spidev.dts new file mode 100644 index 00000000..c42efe61 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-spi2-m1-cs0-spidev.dts @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + metadata { + title = "Enable spidev on SPI2-M1 over CS0"; + compatible = "radxa,cm3j-rpi-cm4-io"; + category = "misc"; + exclusive = "GPIO2_D5", "GPIO2_D6", "GPIO2_D7", "GPIO3_A0"; + description = "Enable spidev on SPI2-M1 over CS0."; + }; +}; + +&spi2 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default", "high_speed"; + pinctrl-0 = <&spi2m1_cs0 &spi2m1_pins>; + pinctrl-1 = <&spi2m1_cs0 &spi2m1_pins_hs>; + max-freq = <50000000>; + + spidev@0 { + compatible = "rockchip,spidev"; + status = "okay"; + reg = <0>; + spi-max-frequency = <50000000>; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart2-m0.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart2-m0.dts index a76f057b..676b59cc 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart2-m0.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart2-m0.dts @@ -4,7 +4,7 @@ / { metadata { title = "Enable UART2-M0"; - compatible = "radxa,rock-3a", "radxa,rock-3b", "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3", "radxa,cm3i-io"; + compatible = "radxa,rock-3a", "radxa,rock-3b", "radxa,rock-3c", "radxa,cm3-io", "radxa,cm3-rpi-cm4-io", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e23", "radxa,zero3", "radxa,cm3i-io", "radxa,cm3j-rpi-cm4-io"; category = "misc"; exclusive = "GPIO0_D1", "GPIO0_D0"; description = "Enable UART2-M0."; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart3-m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart3-m1.dts index f2407071..4a23a934 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart3-m1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart3-m1.dts @@ -4,12 +4,14 @@ / { metadata { title = "Enable UART3-M1"; - compatible = "radxa,e25"; + compatible = "radxa,e25", "radxa,cm3j-rpi-cm4-io"; category = "misc"; exclusive = "GPIO3_B7", "GPIO3_C0", "UART3"; description = "Enable UART3-M1. On Radxa ROCK 3A <= v1.2 this RX pin 37 & TX pin 7. -On Radxa E25 this RX pin 26 & TX pin 7."; +On Radxa E25 this RX pin 26 & TX pin 7. +On Radxa CM3J RPI CM4 IO this RX pin 15 & TX pin 32. +"; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart4-m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart4-m1.dts index 11f995ad..651386aa 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart4-m1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart4-m1.dts @@ -4,12 +4,13 @@ / { metadata { title = "Enable UART4-M1"; - compatible = "radxa,rock-3c", "radxa,zero3"; + compatible = "radxa,rock-3c", "radxa,zero3", "radxa,cm3j-rpi-cm4-io"; category = "misc"; exclusive = "GPIO3_B1", "GPIO3_B2"; description = "Enable UART4-M1. On Radxa ROCK 3C this is RX pin 16 & TX pin 18. -On Radxa ZERO 3 this is RX pin 16 & TX pin 18."; +On Radxa ZERO 3 this is RX pin 16 & TX pin 18. +On Radxa CM3J RPI CM4 IO this is RX pin 13 & TX pin 11."; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart5-m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart5-m1.dts index a8a231e9..e92f47be 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart5-m1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart5-m1.dts @@ -4,7 +4,7 @@ / { metadata { title = "Enable UART5-M1"; - compatible = "radxa,rock-3a", "radxa,rock-3b", "radxa,rock-3c", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e25", "radxa,zero3"; + compatible = "radxa,rock-3a", "radxa,rock-3b", "radxa,rock-3c", "radxa,cm3s-io", "radxa,radxa-cm3-sodimm-io", "radxa,e25", "radxa,zero3", "radxa,cm3j-rpi-cm4-io"; category = "misc"; exclusive = "GPIO3_C2", "GPIO3_C3"; description = "Enable UART5-M1. @@ -15,7 +15,8 @@ On Radxa ROCK 3C this is TX pin 32 and RX pin 33. On Radxa CM3S IO this is TX pin 35 and RX pin 40. On Radxa E25 hardware V1.3 this is TX pin 2 and RX pin 3. On Radxa E25 hardware V1.4 this is TX pin 8 and RX pin 10. -On Radxa ZERO 3 this is TX pin 32 and RX pin 33."; +On Radxa ZERO 3 this is TX pin 32 and RX pin 33. +On Radxa CM3J RPI CM4 IO this is TX pin 12 and RX pin 35."; }; }; diff --git a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart8-m1.dts b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart8-m1.dts index e455eba5..8c2bb545 100644 --- a/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart8-m1.dts +++ b/arch/arm64/boot/dts/rockchip/overlays/rk3568-uart8-m1.dts @@ -4,12 +4,13 @@ / { metadata { title = "Enable UART8-M1"; - compatible = "radxa,rock-3a"; + compatible = "radxa,rock-3a", "radxa,cm3j-rpi-cm4-io"; category = "misc"; exclusive = "GPIO2_D7", "GPIO3_A0"; description = "Enable UART8-M1. On Radxa ROCK 3A <= v1.2 this is TX pin 29 and RX pin 31. -On Radxa ROCK 3A >= v1.3 this is TX pin 29 and RX pin 31."; +On Radxa ROCK 3A >= v1.3 this is TX pin 29 and RX pin 31. +On Radxa CM3J RPI CM4 IO this is TX pin 31 and RX pin 29."; }; };