-
Notifications
You must be signed in to change notification settings - Fork 0
/
startup_gd32f3x0.s
295 lines (271 loc) · 10.7 KB
/
startup_gd32f3x0.s
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
.syntax unified
.cpu cortex-m4
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF108F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M4. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
/* external interrupts handler */
.word WWDGT_IRQHandler /* 16:Window Watchdog Timer*/
.word LVD_IRQHandler /* 17:LVD through EXTI Line detect*/
.word RTC_IRQHandler /* 18:RTC through EXTI Line*/
.word FMC_IRQHandler /* 19:FMC*/
.word RCU_IRQHandler /* 20:RCU*/
.word EXTI0_1_IRQHandler /* 21:EXTI Line 0 and EXTI Line 1*/
.word EXTI2_3_IRQHandler /* 22:EXTI Line 2 and EXTI Line 3*/
.word EXTI4_15_IRQHandler /* 23:EXTI Line 4 to EXTI Line 15*/
.word TSI_IRQHandler /* 24:TSI*/
.word DMA_Channel0_IRQHandler /* 25:DMA Channel 0 */
.word DMA_Channel1_2_IRQHandler /* 26:DMA Channel 1 and DMA Channel 2*/
.word DMA_Channel3_4_IRQHandler /* 27:DMA Channel 3 and DMA Channel 4*/
.word ADC_CMP_IRQHandler /* 28:ADC and Comparator 0-1*/
.word TIMER0_BRK_UP_TRG_COM_IRQHandler /* 29:TIMER0 Break,Update,Trigger and Commutation*/
.word TIMER0_CC_IRQHandler /* 30:TIMER0 Capture Compare*/
.word TIMER1_IRQHandler /* 31:TIMER1*/
.word TIMER2_IRQHandler /* 32:TIMER2*/
.word TIMER5_DAC_IRQHandler /* 33:TIMER5 and DAC*/
.word 0 /* Reserved*/
.word TIMER13_IRQHandler /* 35:TIMER13*/
.word TIMER14_IRQHandler /* 36:TIMER14*/
.word TIMER15_IRQHandler /* 37:TIMER15*/
.word TIMER16_IRQHandler /* 38:TIMER16*/
.word I2C0_EV_IRQHandler /* 39:I2C0 Event*/
.word I2C1_EV_IRQHandler /* 40:I2C1 Event*/
.word SPI0_IRQHandler /* 41:SPI0*/
.word SPI1_IRQHandler /* 42:SPI1*/
.word USART0_IRQHandler /* 43:USART0*/
.word USART1_IRQHandler /* 44:USART1*/
.word 0 /* Reserved*/
.word CEC_IRQHandler /* 46:CEC*/
.word 0 /* Reserved*/
.word I2C0_ER_IRQHandler /* 48:I2C0 Error*/
.word 0 /* Reserved*/
.word I2C1_ER_IRQHandler /* 50:I2C1 Error*/
.word I2C2_EV_IRQHandler /* 51:I2C2 Event*/
.word I2C2_ER_IRQHandler /* 52:I2C2 Error*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word USBFS_WKUP_IRQHandler /* 58:USBFS Wakeup*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word DMA_Channel5_6_IRQHandler /* 64:DMA Channel5 and Channel6 */
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word SPI2_IRQHandler /* 67:SPI2*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word 0 /* Reserved*/
.word USBFS_IRQHandler /* 83:USBFS*/
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
/* external interrupts handler */
.weak WWDGT_IRQHandler
.thumb_set WWDGT_IRQHandler,Default_Handler
.weak LVD_IRQHandler
.thumb_set LVD_IRQHandler,Default_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Default_Handler
.weak FMC_IRQHandler
.thumb_set FMC_IRQHandler,Default_Handler
.weak RCU_IRQHandler
.thumb_set RCU_IRQHandler,Default_Handler
.weak EXTI0_1_IRQHandler
.thumb_set EXTI0_1_IRQHandler,Default_Handler
.weak EXTI2_3_IRQHandler
.thumb_set EXTI2_3_IRQHandler,Default_Handler
.weak EXTI4_15_IRQHandler
.thumb_set EXTI4_15_IRQHandler,Default_Handler
.weak TSI_IRQHandler
.thumb_set TSI_IRQHandler,Default_Handler
.weak DMA_Channel0_IRQHandler
.thumb_set DMA_Channel0_IRQHandler,Default_Handler
.weak DMA_Channel1_2_IRQHandler
.thumb_set DMA_Channel1_2_IRQHandler,Default_Handler
.weak DMA_Channel3_4_IRQHandler
.thumb_set DMA_Channel3_4_IRQHandler,Default_Handler
.weak ADC_CMP_IRQHandler
.thumb_set ADC_CMP_IRQHandler,Default_Handler
.weak TIMER0_BRK_UP_TRG_COM_IRQHandler
.thumb_set TIMER0_BRK_UP_TRG_COM_IRQHandler,Default_Handler
.weak TIMER0_CC_IRQHandler
.thumb_set TIMER0_CC_IRQHandler,Default_Handler
.weak TIMER1_IRQHandler
.thumb_set TIMER1_IRQHandler,Default_Handler
.weak TIMER2_IRQHandler
.thumb_set TIMER2_IRQHandler,Default_Handler
.weak TIMER5_DAC_IRQHandler
.thumb_set TIMER5_DAC_IRQHandler,Default_Handler
.weak TIMER13_IRQHandler
.thumb_set TIMER13_IRQHandler,Default_Handler
.weak TIMER14_IRQHandler
.thumb_set TIMER14_IRQHandler,Default_Handler
.weak TIMER15_IRQHandler
.thumb_set TIMER15_IRQHandler,Default_Handler
.weak TIMER16_IRQHandler
.thumb_set TIMER16_IRQHandler,Default_Handler
.weak I2C0_EV_IRQHandler
.thumb_set I2C0_EV_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak SPI0_IRQHandler
.thumb_set SPI0_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak USART0_IRQHandler
.thumb_set USART0_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak CEC_IRQHandler
.thumb_set CEC_IRQHandler,Default_Handler
.weak I2C0_ER_IRQHandler
.thumb_set I2C0_ER_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak USBFS_WKUP_IRQHandler
.thumb_set USBFS_WKUP_IRQHandler,Default_Handler
.weak DMA_Channel5_6_IRQHandler
.thumb_set DMA_Channel5_6_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USBFS_IRQHandler
.thumb_set USBFS_IRQHandler,Default_Handler