diff --git a/src/sh4.zig b/src/sh4.zig index 1c832996..1fac0aa9 100644 --- a/src/sh4.zig +++ b/src/sh4.zig @@ -73,6 +73,12 @@ pub const FPSCR = packed struct(u32) { _: u10 = undefined, // Reserved }; +const TimerRegisters = [3]struct { counter: P4Register, control: P4Register, constant: P4Register, interrupt: Interrupt }{ + .{ .counter = P4Register.TCNT0, .control = P4Register.TCR0, .constant = P4Register.TCOR0, .interrupt = Interrupt.TUNI0 }, + .{ .counter = P4Register.TCNT1, .control = P4Register.TCR1, .constant = P4Register.TCOR1, .interrupt = Interrupt.TUNI1 }, + .{ .counter = P4Register.TCNT2, .control = P4Register.TCR2, .constant = P4Register.TCOR2, .interrupt = Interrupt.TUNI2 }, +}; + pub const VirtualAddr = packed struct { region: u3, addr: u29, @@ -265,6 +271,14 @@ pub const SH4 = struct { self.p4_register(u16, .IPRC).* = 0x0000; self.compute_interrupt_priorities(); + self.p4_register(u8, .TOCR).* = 0x00; + self.p4_register(u8, .TSTR).* = 0x00; + for (TimerRegisters) |timer| { + self.p4_register(u32, timer.constant).* = 0xFFFFFFFF; + self.p4_register(u32, timer.counter).* = 0xFFFFFFFF; + self.p4_register(u16, timer.control).* = 0x0000; + } + self.p4_register(u8, .SCBRR2).* = 0xFF; self.p4_register(u16, .SCSCR2).* = 0x0000; self.p4_register(u16, .SCFSR2).* = 0x0060; @@ -646,16 +660,11 @@ pub const SH4 = struct { // set in the corresponding timer control register (TCR). If the UNIE bit in TCR is set to 1 at this // time, an interrupt request is sent to the CPU. At the same time, the value is copied from TCOR // into TCNT, and the count-down continues (auto-reload function). - const timers = .{ - .{ .counter = P4Register.TCNT0, .control = P4Register.TCR0, .constant = P4Register.TCOR0, .interrupt = Interrupt.TUNI0 }, - .{ .counter = P4Register.TCNT1, .control = P4Register.TCR1, .constant = P4Register.TCOR1, .interrupt = Interrupt.TUNI1 }, - .{ .counter = P4Register.TCNT2, .control = P4Register.TCR2, .constant = P4Register.TCOR2, .interrupt = Interrupt.TUNI2 }, - }; inline for (0..3) |i| { if ((TSTR >> @intCast(i)) & 0x1 == 1) { - const tcnt = self.p4_register(u32, timers[i].counter); - const tcr = self.p4_register(P4.TCR, timers[i].control); + const tcnt = self.p4_register(u32, TimerRegisters[i].counter); + const tcr = self.p4_register(P4.TCR, TimerRegisters[i].control); self.timer_cycle_counter[i] += cycles; @@ -666,9 +675,9 @@ pub const SH4 = struct { if (tcnt.* == 0) { tcr.*.unf = 1; // Signals underflow - tcnt.* = self.p4_register(u32, timers[i].constant).*; // Reset counter + tcnt.* = self.p4_register(u32, TimerRegisters[i].constant).*; // Reset counter if (tcr.*.unie == 1) - self.request_interrupt(timers[i].interrupt); + self.request_interrupt(TimerRegisters[i].interrupt); } else { tcnt.* -= 1; }