diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..08fd276b --- /dev/null +++ b/.gitignore @@ -0,0 +1,9 @@ +*.json +GNU ARM */ +build +test/test_script/__pycache__ +*.temp-stream* +simplicity_sdk/src/* +!simplicity_sdk/src/CMakeLists.txt +cmake_build +log/ diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml new file mode 100644 index 00000000..ffc3c8ae --- /dev/null +++ b/.pre-commit-config.yaml @@ -0,0 +1,27 @@ + +exclude: ^(docs|site|assets|pictures|simplicity_sdk|test/test_script|log|sample|cmake|components|lib/inc/coding_standard.h|lib/inc/silabs_license_agreement.h|lib/inc/sl_iec60730_library_documentation.h|README.md) +repos: +- repo: https://github.com/pre-commit/pre-commit-hooks + rev: v4.0.1 + hooks: + - id: end-of-file-fixer + - id: trailing-whitespace +- repo: https://github.com/codespell-project/codespell + rev: v2.2.4 + hooks: + - id: codespell + args: [-w,--config,./tools/.codespell/.codespellrc] +- repo: https://github.com/pocc/pre-commit-hooks + rev: v1.3.5 + hooks: + - id: uncrustify + args: [-c,./tools/uncrustify.cfg,-lC,--no-backup,--replace] + - id: clang-tidy + args: + - --config-file=./tools/.clang-tidy + - --use-color + - --extra-arg=-Iusr/include + - --header-filter:'^((?!test).)*$' + - -p=./build + - id: cppcheck + args: [--language=c,--std=c99,--check-config,-DSL_IEC60730_BOARD_HEADER="sl_iec60730_board.h",--suppress=missingInclude,--suppress=unmatchedSuppression] diff --git a/404.html b/404.html new file mode 100644 index 00000000..0f3585e2 --- /dev/null +++ b/404.html @@ -0,0 +1,274 @@ + + + + + + + + + + + + + + + + + + + IEC60730 Safety Library + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
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+ + + + + + + + + + diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 00000000..a4863335 --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,217 @@ +# Define minimal required version of CMake. +cmake_minimum_required(VERSION "3.25") + +# Project definition +project( + IE60730_LIBRARY + VERSION 2.0.0 + LANGUAGES C ASM CXX +) + +set(CMAKE_CXX_STANDARD 14) +set(CMAKE_CXX_STANDARD_REQUIRED OFF) +set(CMAKE_CXX_EXTENSIONS OFF) + +set(LIBRARY_NAME iec60730) +set(CMAKE_MODULE_PATH "${PROJECT_SOURCE_DIR}/cmake/") +set(LIB_IEC60730_MAP "lib_iec60730.map") +set(SDK_CMAKE_RELATIVE_DIR "simplicity_sdk") +set(SDK_LIB_CMAKE_RELATIVE_DIR "${SDK_CMAKE_RELATIVE_DIR}/src/lib_iec60730_cmake") + +# choose toolchain +if(DEFINED ENV{TOOL_CHAINS}) + set(TOOL_CHAINS "$ENV{TOOL_CHAINS}") +else() +set(TOOL_CHAINS "GCC") +endif() +message("-- [I] Toolchains build: ${TOOL_CHAINS}") + +# enable unit test +option(ENABLE_UNIT_TESTING "Enable a Unit Testing Build" OFF) +# enable integration test +option(ENABLE_INTEGRATION_TESTING "Enable a Integration Testing Build" OFF) +# enable test peripherals non-secure test +option(TEST_SECURE_PERIPHERALS_ENABLE "Check non-secure peripherals" OFF) +# enable integration test watchdog 1 +option(INTEGRATION_TEST_WDOG1_ENABLE "Enable integration test watchdog 1" OFF) +# disable using MarchXC algorithm +option(INTEGRATION_TEST_USE_MARCHX_DISABLE "Disable using MarchXC algorithm" OFF) +# pre-build iar tool +option(PRE_BUILD_IAR_TOOL "pre-build iar tool" OFF) +# Coding convention +option(CHECK_CODING_CONVETION_ENABLE "check coding convention" OFF) + +# choose board name +option(BOARD_NAME "choose board name" brd4187c) +message("-- [I] Board name: ${BOARD_NAME}") + +#Add external libraries with Fetch Content +include(FetchContent) + +if(ENABLE_UNIT_TESTING AND (NOT PRE_BUILD_IAR_TOOL)) + FetchContent_Declare( + unity + GIT_REPOSITORY https://github.com/ThrowTheSwitch/Unity + GIT_TAG v2.6.0 + GIT_SHALLOW TRUE) + FetchContent_MakeAvailable(unity) +endif() + +# Support calculate CRC +option(ENABLE_CAL_CRC_32 "Enable calculate crc 32" OFF) +option(ENABLE_CRC_USE_SW "Enable using software calculate CRC" OFF) +option(ENABLE_SW_CRC_TABLE "Enable software calculate CRC using table CRC" OFF) +set(OPTION_SUPPORT_TEST_IMC_MODULE "ENABLE_CAL_CRC_32 ENABLE_CRC_USE_SW ENABLE_SW_CRC_TABLE") + +# Set address start calculate crc +if(DEFINED ENV{FLASH_REGIONS_TEST}) + set(FLASH_REGIONS_TEST "$ENV{FLASH_REGIONS_TEST}") +else() + set(FLASH_REGIONS_TEST "0x00000000") +endif() + +message("-- [I] Options to support running tests of invariable memory modules: ${OPTION_SUPPORT_TEST_IMC_MODULE}") + +if(ENABLE_CAL_CRC_32) + message("-- [I] Support crc calculation for invariable memory modules: CRC-32") +else() + message("-- [I] Support crc calculation for invariable memory modules: CRC-16") +endif() + +if(ENABLE_CRC_USE_SW) + message("-- [I] Enable using software to calculate CRC") + if(ENABLE_SW_CRC_TABLE) + message("-- [I] Enable software using CRC pre-defined table to calculate CRC") + else() # ENABLE_SW_CRC_TABLE + message("-- [I] Disable software using CRC pre-defined table to calculate CRC") + endif() # ENABLE_SW_CRC_TABLE +else() # ENABLE_CRC_USE_SW + message("-- [I] Enable using hardware GPCRC to calculate CRC") +endif() # ENABLE_CRC_USE_SW + +message("-- [I] Start address calculate crc value of flash: ${FLASH_REGIONS_TEST}") + +# Run generate_lib_iec60730 +include(generate_lib_iec60730) + +if(${TOOL_CHAINS} STREQUAL "GCC") + if(ENABLE_UNIT_TESTING) + generate_lib_iec60730(${SDK_CMAKE_RELATIVE_DIR}) + get_target_property(MAIN_CFLAGS_LIB_IEC60730 slc_lib_iec60730 COMPILE_OPTIONS) + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + target_compile_options(unity PUBLIC + ${MAIN_CFLAGS_LIB_IEC60730}) + + endif() + + if(ENABLE_INTEGRATION_TESTING) + + if(TEST_SECURE_PERIPHERALS_ENABLE) + message("-- [I] Enable integration testing check secure peripherals") + else() + message("-- [I] Enable integration testing check non-secure peripherals") + endif() + + if(INTEGRATION_TEST_WDOG1_ENABLE) + message("-- [I] Watchdog 1 testing: enable") + else() + message("-- [I] Watchdog 1 testing: disable") + endif() + + if(INTEGRATION_TEST_USE_MARCHX_DISABLE) + message("-- [I] Using MarchXC algorithm: disable") + else() + message("-- [I] Using MarchXC algorithm: enable ") + endif() + + generate_lib_iec60730(${SDK_CMAKE_RELATIVE_DIR}) + get_target_property(COMPILE_DEFINITIONS_IEC60730 slc_lib_iec60730 COMPILE_DEFINITIONS) + endif() + +elseif (${TOOL_CHAINS} STREQUAL "IAR") + + if(PRE_BUILD_IAR_TOOL) + generate_lib_iec60730(${SDK_CMAKE_RELATIVE_DIR}) + get_target_property(MAIN_CFLAGS_LIB_IEC60730 slc_lib_iec60730 COMPILE_OPTIONS) + string(FIND "${MAIN_CFLAGS_LIB_IEC60730}" "cortex-m33" CORE_TYPE) + if(${CORE_TYPE} GREATER 0) + #message("-- [I] CORE_TYPE: cortex-m33") + set(PRE_IAR_CORE_TYPE "CORE_TYPE=m33") + else() + #message("-- [I] CORE_TYPE: cortex-m4") + set(PRE_IAR_CORE_TYPE "") + endif() + + if(ENABLE_CAL_CRC_32) + set(PRE_IAR_CAL_CRC_32 "CAL_CRC_32=enable") + else() + set(PRE_IAR_CAL_CRC_32 "") + endif() + + if(TEST_SECURE_PERIPHERALS_ENABLE) + set(PRE_IAR_SECURE_PERIPHERALS_ENABLE "SECURE_PERIPHERALS_ENABLE=enable") + else() + set(PRE_SECURE_PERIPHERALS_ENABLE "") + endif() + + execute_process(COMMAND python3 ${CMAKE_SOURCE_DIR}/${SDK_CMAKE_RELATIVE_DIR}/pre_build_iar.py ${PRE_IAR_CORE_TYPE} ${PRE_IAR_CAL_CRC_32} ${PRE_IAR_SECURE_PERIPHERALS_ENABLE}) + endif() + + if(ENABLE_UNIT_TESTING) + + add_subdirectory(${SDK_CMAKE_RELATIVE_DIR}) + get_target_property(MAIN_CFLAGS_LIB_IEC60730 slc_lib_iec60730 COMPILE_OPTIONS) + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + string(REPLACE "$<$:SHELL:-imacros sl_gcc_preinclude.h>;" "" MAIN_CFLAGS_LIB_IEC60730 "${MAIN_CFLAGS_LIB_IEC60730}") + target_compile_options(unity PUBLIC + ${MAIN_CFLAGS_LIB_IEC60730}) + set_property(TARGET unity PROPERTY C_STANDARD_REQUIRED OFF) + + endif() + + if(ENABLE_INTEGRATION_TESTING) + + add_subdirectory(${SDK_CMAKE_RELATIVE_DIR}) + if(TEST_SECURE_PERIPHERALS_ENABLE) + message("-- [I] Enable integration testing check secure peripherals") + else() + message("-- [I] Enable integration testing check non-secure peripherals") + endif() + + if(INTEGRATION_TEST_WDOG1_ENABLE) + message("-- [I] Watchdog 1 testing: enable") + else() + message("-- [I] Watchdog 1 testing: disable") + endif() + + if(INTEGRATION_TEST_USE_MARCHX_DISABLE) + message("-- [I] Using MarchXC algorithm: disable") + else() + message("-- [I] Using MarchXC algorithm: enable ") + endif() + + get_target_property(COMPILE_DEFINITIONS_IEC60730 slc_lib_iec60730 COMPILE_DEFINITIONS) + endif() +endif() + +# Start run test +add_subdirectory(lib) + +if(ENABLE_INTEGRATION_TESTING OR ENABLE_UNIT_TESTING) + add_subdirectory(test) +endif() + +# Start check coding convention +# Run coding_convention +include(coding_convention) + +if(CHECK_CODING_CONVETION_ENABLE) + set(CMAKE_EXPORT_COMPILE_COMMANDS ON) + # Disable response files + set(CMAKE_C_USE_RESPONSE_FILE_FOR_INCLUDES ON) + message("-- [I] Check coding convention: enable") + generate_coding_convention(${SDK_CMAKE_RELATIVE_DIR}) +endif() diff --git a/LICENSE.md b/LICENSE.md index 1f2c5e25..6bdebb79 100644 --- a/LICENSE.md +++ b/LICENSE.md @@ -1,9 +1,5 @@ -**Copyright 2024 Silicon Laboratories Inc. [www.silabs.com](https://www.silabs.com/)** +Copyright 2024 Silicon Laboratories Inc. www.silabs.com -Source code in this repo is covered by one of several different licenses. -The default license is the Master Software License Agreement (MSLA) -[www.silabs.com/about-us/legal/master-software-license-agreement](), -which applies unless otherwise noted. +Source code in this repo is covered by one of several different licenses. The default license is the Master Software License Agreement (MSLA) www.silabs.com/about-us/legal/master-software-license-agreement, which applies unless otherwise noted. -During the unit test build process, some third-party code will be added to this repository and separated into another license. -An example can be found in the build/_deps directory, where the Unity library uses the MIT license. +During the unit test build process, some third-party code will be added to this repository and separated into another license. An example can be found in the build/_deps directory, where the Unity library uses the MIT license. diff --git a/Makefile b/Makefile new file mode 100644 index 00000000..3d16b741 --- /dev/null +++ b/Makefile @@ -0,0 +1,6 @@ +prepare: + - @rm -rf build + rm -rf build + rm -rf log + mkdir build + mkdir log diff --git a/README.md b/README.md index 10314961..7e1a78bb 100644 --- a/README.md +++ b/README.md @@ -1,2 +1,104 @@ # IEC60730_Libs Platform codes for EFR32 series chips which complies to IEC60730 safety standard + +## Introduction +The IEC60730 library for EFR32 provides a basic implementation required to support the necessary requirements found in Table H.1 in the IEC60730 specification. It includes all the Power On Self Test (POST) functions executed when a device is first powered on, as well as Built In Self Test (BIST) functions that are called periodically to ensure correct operation. Certain portions of the requirements require a detailed understanding of the system under development. Callback functions must be completed by the developer to guarantee meeting the full specification. These include a Safe State function used when validation detects an anomaly, properly implemented communications channels (redundancy, error detection, periodic communications), and Plausibility functions to validate system state (internal variables and inputs/outputs). + +## License + +Please refer [License](LICENSE.md) + +## Release Notes + +Please refer document in [release_note.md](./docs/release_note.md) + +## IEC60730 Certificate + +The Silicon Labs Appliances homepage will contain the final certificate and detailed report when it is completed. + +## OEM Testing + +Once OEMs have completed integrating their system with the IEC60730 Library, they will need to certify their device with a qualified certification house. + +## Supported Families + +- Refer section [Supported Families](./docs/html/EFR32_IEC60730_Libraries/group__efr32__iec60730.html) + +## Software Requirements + +- Refer section [Software Requirements](./docs/html/EFR32_IEC60730_Libraries/group__efr32__iec60730.html) + +## Building the IEC60730 Demo + +- Refer section [Building the IEC60730 Demo](./docs/html/EFR32_IEC60730_Libraries/group__efr32__iec60730.html) + +## Generate document API + +- Refer section [Generate document API](./docs/html/EFR32_IEC60730_Libraries/group__efr32__iec60730.html) + +## Coding convention tool + +- Refer file: [coding_convention_tool.md](./docs/coding_convention_tool.md). + +## Compiler specifications + +- Refer section [Compiler specifications](./docs/html/EFR32_IEC60730_Libraries/group__efr32__iec60730.html) + +## System Architecture + +- Refer section [System Architecture](./docs/html/EFR32_IEC60730_Libraries/group__efr32__iec60730.html) + +## CMake + +The project has a CMake template that supports running tests. Follow the steps below one by one to build and run tests. + +### Add the IEC60730 Library extension to the SDK + +- Refer to the [IEC60730 safety library integration to SDK](./docs/iec60730_safety_library_integration_to_sdk.md) in the [docs](./docs) folder for more details. + +### Install Dependencies + +#### Install slc-cli + +- Follow this link to Install slc: [Install slc](https://docs.silabs.com/simplicity-studio-5-users-guide/latest/ss-5-users-guide-tools-slc-cli/02-installation) +- Follow this link to [Install Amazon Corretto 17 on Debian-Based Linux](https://docs.aws.amazon.com/corretto/latest/corretto-17-ug/downloads-list.html) + +##### How to use slc + +Add the path to the expanded slc-cli to your PATH sh export PATH=$PATH:~/SimplicityStudio/slc_cli_linux/slc_cli/ + +Configure SDK. For example sh slc configuration --sdk ~/SimplicityStudio/SDKs/gecko_sdk/ + +Run slc signature trust --sdk if you have not yet trusted your SDK. + +For example your SDK locate at ~/SimplicityStudio/SDKs/gecko_sdk/. Run `slc signature trust --sdk ~/SimplicityStudio/SDKs/gecko_sdk/` + +Set toolchain For example sh slc configuration -gcc=~/SimplicityStudio-5/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/ + +Generate the project sh slc generate \path\to\example.slcp -np -d -name= --with + +Choose one of the options below to generate the project + +| Operation | Arguments | Description | +|---|---|---| +|generate | -cp, --copy-sources | Copies all files referenced by this project, selected components, and any other running tools (Pin Tool, etc.). By default, no files are copied. | +|^ | -cpproj, --copy-proj-sources | Copies all files referenced by the project and links any SDK sources. This can be combined with -cpsdk. | +|^ | -cpsdk, --copy-sdk-sources | Copies all files referenced by the selected components and links any project sources. This can be combined with -cpproj. | + +> [!NOTE]: To be able to use the extension LibIEC60730. You need to add the LibIEC60730 +> extension to your SDK in the extension folder and run the command: `slc signature trust -extpath ` + +##### For example + +```sh +$ GSDK=~/SimplicityStudio/SDKs/gecko_sdk +$ slc configuration --sdk=$GSDK --gcc-toolchain=/Applications/ARM +$ slc generate $GSDK/app/common/example/blink_baremetal -np -d blinky -name=blinky -o makefile + --with brd4166a +$ slc signature trust -extpath $GSDK/extension/IEC60730_Libs +``` + +### Run unit test + - Refer to the guideline link: [guideline_for_running_unit_test.md](./docs/guideline_for_running_unit_test.md) +### Run integration test + - Refer to the guideline link: [guideline_for_running_integration_test.md](./docs/guideline_for_running_integration_test.md) diff --git a/assets/images/favicon.png b/assets/images/favicon.png new file mode 100644 index 00000000..1cf13b9f Binary files /dev/null and b/assets/images/favicon.png differ diff --git a/assets/javascripts/bundle.83f73b43.min.js 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rect.divider{fill:var(--md-default-fg-color--lightest);stroke:var(--md-default-fg-color--lighter)}defs #statediagram-barbEnd{stroke:var(--md-mermaid-edge-color)}.attributeBoxEven,.attributeBoxOdd{fill:var(--md-mermaid-node-bg-color);stroke:var(--md-mermaid-node-fg-color)}.entityBox{fill:var(--md-mermaid-label-bg-color);stroke:var(--md-mermaid-node-fg-color)}.entityLabel{fill:var(--md-mermaid-label-fg-color);font-family:var(--md-mermaid-font-family)}.relationshipLabelBox{fill:var(--md-mermaid-label-bg-color);fill-opacity:1;background-color:var(--md-mermaid-label-bg-color);opacity:1}.relationshipLabel{fill:var(--md-mermaid-label-fg-color)}.relationshipLine{stroke:var(--md-mermaid-edge-color)}defs #ONE_OR_MORE_END *,defs #ONE_OR_MORE_START *,defs #ONLY_ONE_END *,defs #ONLY_ONE_START *,defs #ZERO_OR_MORE_END *,defs #ZERO_OR_MORE_START *,defs #ZERO_OR_ONE_END *,defs #ZERO_OR_ONE_START *{stroke:var(--md-mermaid-edge-color)!important}defs #ZERO_OR_MORE_END circle,defs #ZERO_OR_MORE_START circle{fill:var(--md-mermaid-label-bg-color)}.actor{fill:var(--md-mermaid-sequence-actor-bg-color);stroke:var(--md-mermaid-sequence-actor-border-color)}text.actor>tspan{fill:var(--md-mermaid-sequence-actor-fg-color);font-family:var(--md-mermaid-font-family)}line{stroke:var(--md-mermaid-sequence-actor-line-color)}.actor-man circle,.actor-man line{fill:var(--md-mermaid-sequence-actorman-bg-color);stroke:var(--md-mermaid-sequence-actorman-line-color)}.messageLine0,.messageLine1{stroke:var(--md-mermaid-sequence-message-line-color)}.note{fill:var(--md-mermaid-sequence-note-bg-color);stroke:var(--md-mermaid-sequence-note-border-color)}.loopText,.loopText>tspan,.messageText,.noteText>tspan{stroke:none;font-family:var(--md-mermaid-font-family)!important}.messageText{fill:var(--md-mermaid-sequence-message-fg-color)}.loopText,.loopText>tspan{fill:var(--md-mermaid-sequence-loop-fg-color)}.noteText>tspan{fill:var(--md-mermaid-sequence-note-fg-color)}#arrowhead path{fill:var(--md-mermaid-sequence-message-line-color);stroke:none}.loopLine{fill:var(--md-mermaid-sequence-loop-bg-color);stroke:var(--md-mermaid-sequence-loop-border-color)}.labelBox{fill:var(--md-mermaid-sequence-label-bg-color);stroke:none}.labelText,.labelText>span{fill:var(--md-mermaid-sequence-label-fg-color);font-family:var(--md-mermaid-font-family)}.sequenceNumber{fill:var(--md-mermaid-sequence-number-fg-color)}rect.rect{fill:var(--md-mermaid-sequence-box-bg-color);stroke:none}rect.rect+text.text{fill:var(--md-mermaid-sequence-box-fg-color)}defs #sequencenumber{fill:var(--md-mermaid-sequence-number-bg-color)!important}";var Gr,Qa=0;function Ka(){return typeof mermaid=="undefined"||mermaid instanceof Element?Tt("https://unpkg.com/mermaid@11/dist/mermaid.min.js"):I(void 0)}function Wn(e){return e.classList.remove("mermaid"),Gr||(Gr=Ka().pipe(w(()=>mermaid.initialize({startOnLoad:!1,themeCSS:Un,sequence:{actorFontSize:"16px",messageFontSize:"16px",noteFontSize:"16px"}})),m(()=>{}),G(1))),Gr.subscribe(()=>co(this,null,function*(){e.classList.add("mermaid");let t=`__mermaid_${Qa++}`,r=x("div",{class:"mermaid"}),o=e.textContent,{svg:n,fn:i}=yield mermaid.render(t,o),a=r.attachShadow({mode:"closed"});a.innerHTML=n,e.replaceWith(r),i==null||i(a)})),Gr.pipe(m(()=>({ref:e})))}var Dn=x("table");function Vn(e){return e.replaceWith(Dn),Dn.replaceWith(An(e)),I({ref:e})}function Ya(e){let t=e.find(r=>r.checked)||e[0];return O(...e.map(r=>h(r,"change").pipe(m(()=>R(`label[for="${r.id}"]`))))).pipe(Q(R(`label[for="${t.id}"]`)),m(r=>({active:r})))}function Nn(e,{viewport$:t,target$:r}){let o=R(".tabbed-labels",e),n=P(":scope > input",e),i=Kr("prev");e.append(i);let a=Kr("next");return e.append(a),C(()=>{let s=new g,p=s.pipe(Z(),ie(!0));z([s,ge(e),tt(e)]).pipe(W(p),Me(1,me)).subscribe({next([{active:c},l]){let f=Ve(c),{width:u}=ce(c);e.style.setProperty("--md-indicator-x",`${f.x}px`),e.style.setProperty("--md-indicator-width",`${u}px`);let d=pr(o);(f.xd.x+l.width)&&o.scrollTo({left:Math.max(0,f.x-16),behavior:"smooth"})},complete(){e.style.removeProperty("--md-indicator-x"),e.style.removeProperty("--md-indicator-width")}}),z([Ne(o),ge(o)]).pipe(W(p)).subscribe(([c,l])=>{let f=St(o);i.hidden=c.x<16,a.hidden=c.x>f.width-l.width-16}),O(h(i,"click").pipe(m(()=>-1)),h(a,"click").pipe(m(()=>1))).pipe(W(p)).subscribe(c=>{let{width:l}=ce(o);o.scrollBy({left:l*c,behavior:"smooth"})}),r.pipe(W(p),b(c=>n.includes(c))).subscribe(c=>c.click()),o.classList.add("tabbed-labels--linked");for(let c of n){let l=R(`label[for="${c.id}"]`);l.replaceChildren(x("a",{href:`#${l.htmlFor}`,tabIndex:-1},...Array.from(l.childNodes))),h(l.firstElementChild,"click").pipe(W(p),b(f=>!(f.metaKey||f.ctrlKey)),w(f=>{f.preventDefault(),f.stopPropagation()})).subscribe(()=>{history.replaceState({},"",`#${l.htmlFor}`),l.click()})}return B("content.tabs.link")&&s.pipe(Ce(1),re(t)).subscribe(([{active:c},{offset:l}])=>{let f=c.innerText.trim();if(c.hasAttribute("data-md-switching"))c.removeAttribute("data-md-switching");else{let u=e.offsetTop-l.y;for(let y of P("[data-tabs]"))for(let L of P(":scope > input",y)){let X=R(`label[for="${L.id}"]`);if(X!==c&&X.innerText.trim()===f){X.setAttribute("data-md-switching",""),L.click();break}}window.scrollTo({top:e.offsetTop-u});let d=__md_get("__tabs")||[];__md_set("__tabs",[...new Set([f,...d])])}}),s.pipe(W(p)).subscribe(()=>{for(let c of P("audio, video",e))c.pause()}),Ya(n).pipe(w(c=>s.next(c)),_(()=>s.complete()),m(c=>$({ref:e},c)))}).pipe(Ke(se))}function zn(e,{viewport$:t,target$:r,print$:o}){return O(...P(".annotate:not(.highlight)",e).map(n=>Pn(n,{target$:r,print$:o})),...P("pre:not(.mermaid) > code",e).map(n=>jn(n,{target$:r,print$:o})),...P("pre.mermaid",e).map(n=>Wn(n)),...P("table:not([class])",e).map(n=>Vn(n)),...P("details",e).map(n=>Fn(n,{target$:r,print$:o})),...P("[data-tabs]",e).map(n=>Nn(n,{viewport$:t,target$:r})),...P("[title]",e).filter(()=>B("content.tooltips")).map(n=>mt(n,{viewport$:t})))}function Ba(e,{alert$:t}){return t.pipe(v(r=>O(I(!0),I(!1).pipe(Ge(2e3))).pipe(m(o=>({message:r,active:o})))))}function qn(e,t){let r=R(".md-typeset",e);return C(()=>{let o=new g;return o.subscribe(({message:n,active:i})=>{e.classList.toggle("md-dialog--active",i),r.textContent=n}),Ba(e,t).pipe(w(n=>o.next(n)),_(()=>o.complete()),m(n=>$({ref:e},n)))})}var Ga=0;function Ja(e,t){document.body.append(e);let{width:r}=ce(e);e.style.setProperty("--md-tooltip-width",`${r}px`),e.remove();let o=cr(t),n=typeof o!="undefined"?Ne(o):I({x:0,y:0}),i=O(et(t),$t(t)).pipe(K());return z([i,n]).pipe(m(([a,s])=>{let{x:p,y:c}=Ve(t),l=ce(t),f=t.closest("table");return f&&t.parentElement&&(p+=f.offsetLeft+t.parentElement.offsetLeft,c+=f.offsetTop+t.parentElement.offsetTop),{active:a,offset:{x:p-s.x+l.width/2-r/2,y:c-s.y+l.height+8}}}))}function Qn(e){let t=e.title;if(!t.length)return S;let r=`__tooltip_${Ga++}`,o=Rt(r,"inline"),n=R(".md-typeset",o);return n.innerHTML=t,C(()=>{let i=new g;return i.subscribe({next({offset:a}){o.style.setProperty("--md-tooltip-x",`${a.x}px`),o.style.setProperty("--md-tooltip-y",`${a.y}px`)},complete(){o.style.removeProperty("--md-tooltip-x"),o.style.removeProperty("--md-tooltip-y")}}),O(i.pipe(b(({active:a})=>a)),i.pipe(_e(250),b(({active:a})=>!a))).subscribe({next({active:a}){a?(e.insertAdjacentElement("afterend",o),e.setAttribute("aria-describedby",r),e.removeAttribute("title")):(o.remove(),e.removeAttribute("aria-describedby"),e.setAttribute("title",t))},complete(){o.remove(),e.removeAttribute("aria-describedby"),e.setAttribute("title",t)}}),i.pipe(Me(16,me)).subscribe(({active:a})=>{o.classList.toggle("md-tooltip--active",a)}),i.pipe(pt(125,me),b(()=>!!e.offsetParent),m(()=>e.offsetParent.getBoundingClientRect()),m(({x:a})=>a)).subscribe({next(a){a?o.style.setProperty("--md-tooltip-0",`${-a}px`):o.style.removeProperty("--md-tooltip-0")},complete(){o.style.removeProperty("--md-tooltip-0")}}),Ja(o,e).pipe(w(a=>i.next(a)),_(()=>i.complete()),m(a=>$({ref:e},a)))}).pipe(Ke(se))}function Xa({viewport$:e}){if(!B("header.autohide"))return I(!1);let t=e.pipe(m(({offset:{y:n}})=>n),Be(2,1),m(([n,i])=>[nMath.abs(i-n.y)>100),m(([,[n]])=>n),K()),o=ze("search");return z([e,o]).pipe(m(([{offset:n},i])=>n.y>400&&!i),K(),v(n=>n?r:I(!1)),Q(!1))}function Kn(e,t){return C(()=>z([ge(e),Xa(t)])).pipe(m(([{height:r},o])=>({height:r,hidden:o})),K((r,o)=>r.height===o.height&&r.hidden===o.hidden),G(1))}function Yn(e,{header$:t,main$:r}){return C(()=>{let o=new g,n=o.pipe(Z(),ie(!0));o.pipe(ee("active"),He(t)).subscribe(([{active:a},{hidden:s}])=>{e.classList.toggle("md-header--shadow",a&&!s),e.hidden=s});let i=ue(P("[title]",e)).pipe(b(()=>B("content.tooltips")),ne(a=>Qn(a)));return r.subscribe(o),t.pipe(W(n),m(a=>$({ref:e},a)),Re(i.pipe(W(n))))})}function Za(e,{viewport$:t,header$:r}){return mr(e,{viewport$:t,header$:r}).pipe(m(({offset:{y:o}})=>{let{height:n}=ce(e);return{active:o>=n}}),ee("active"))}function Bn(e,t){return C(()=>{let r=new g;r.subscribe({next({active:n}){e.classList.toggle("md-header__title--active",n)},complete(){e.classList.remove("md-header__title--active")}});let o=fe(".md-content h1");return typeof o=="undefined"?S:Za(o,t).pipe(w(n=>r.next(n)),_(()=>r.complete()),m(n=>$({ref:e},n)))})}function Gn(e,{viewport$:t,header$:r}){let o=r.pipe(m(({height:i})=>i),K()),n=o.pipe(v(()=>ge(e).pipe(m(({height:i})=>({top:e.offsetTop,bottom:e.offsetTop+i})),ee("bottom"))));return z([o,n,t]).pipe(m(([i,{top:a,bottom:s},{offset:{y:p},size:{height:c}}])=>(c=Math.max(0,c-Math.max(0,a-p,i)-Math.max(0,c+p-s)),{offset:a-i,height:c,active:a-i<=p})),K((i,a)=>i.offset===a.offset&&i.height===a.height&&i.active===a.active))}function es(e){let t=__md_get("__palette")||{index:e.findIndex(o=>matchMedia(o.getAttribute("data-md-color-media")).matches)},r=Math.max(0,Math.min(t.index,e.length-1));return I(...e).pipe(ne(o=>h(o,"change").pipe(m(()=>o))),Q(e[r]),m(o=>({index:e.indexOf(o),color:{media:o.getAttribute("data-md-color-media"),scheme:o.getAttribute("data-md-color-scheme"),primary:o.getAttribute("data-md-color-primary"),accent:o.getAttribute("data-md-color-accent")}})),G(1))}function Jn(e){let t=P("input",e),r=x("meta",{name:"theme-color"});document.head.appendChild(r);let o=x("meta",{name:"color-scheme"});document.head.appendChild(o);let n=Pt("(prefers-color-scheme: light)");return C(()=>{let i=new g;return i.subscribe(a=>{if(document.body.setAttribute("data-md-color-switching",""),a.color.media==="(prefers-color-scheme)"){let s=matchMedia("(prefers-color-scheme: light)"),p=document.querySelector(s.matches?"[data-md-color-media='(prefers-color-scheme: light)']":"[data-md-color-media='(prefers-color-scheme: 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Jr=Mt(Br());function ts(e){e.setAttribute("data-md-copying","");let t=e.closest("[data-copy]"),r=t?t.getAttribute("data-copy"):e.innerText;return e.removeAttribute("data-md-copying"),r.trimEnd()}function Zn({alert$:e}){Jr.default.isSupported()&&new j(t=>{new Jr.default("[data-clipboard-target], [data-clipboard-text]",{text:r=>r.getAttribute("data-clipboard-text")||ts(R(r.getAttribute("data-clipboard-target")))}).on("success",r=>t.next(r))}).pipe(w(t=>{t.trigger.focus()}),m(()=>Ee("clipboard.copied"))).subscribe(e)}function ei(e,t){return e.protocol=t.protocol,e.hostname=t.hostname,e}function rs(e,t){let r=new Map;for(let o of P("url",e)){let n=R("loc",o),i=[ei(new URL(n.textContent),t)];r.set(`${i[0]}`,i);for(let a of P("[rel=alternate]",o)){let s=a.getAttribute("href");s!=null&&i.push(ei(new URL(s),t))}}return r}function ur(e){return un(new URL("sitemap.xml",e)).pipe(m(t=>rs(t,new URL(e))),de(()=>I(new Map)))}function os(e,t){if(!(e.target instanceof Element))return S;let r=e.target.closest("a");if(r===null)return S;if(r.target||e.metaKey||e.ctrlKey)return S;let o=new URL(r.href);return o.search=o.hash="",t.has(`${o}`)?(e.preventDefault(),I(new URL(r.href))):S}function ti(e){let t=new Map;for(let r of P(":scope > *",e.head))t.set(r.outerHTML,r);return t}function ri(e){for(let t of P("[href], [src]",e))for(let r of["href","src"]){let o=t.getAttribute(r);if(o&&!/^(?:[a-z]+:)?\/\//i.test(o)){t[r]=t[r];break}}return I(e)}function ns(e){for(let o of["[data-md-component=announce]","[data-md-component=container]","[data-md-component=header-topic]","[data-md-component=outdated]","[data-md-component=logo]","[data-md-component=skip]",...B("navigation.tabs.sticky")?["[data-md-component=tabs]"]:[]]){let n=fe(o),i=fe(o,e);typeof n!="undefined"&&typeof i!="undefined"&&n.replaceWith(i)}let t=ti(document);for(let[o,n]of ti(e))t.has(o)?t.delete(o):document.head.appendChild(n);for(let o of t.values()){let n=o.getAttribute("name");n!=="theme-color"&&n!=="color-scheme"&&o.remove()}let r=Se("container");return We(P("script",r)).pipe(v(o=>{let n=e.createElement("script");if(o.src){for(let i of o.getAttributeNames())n.setAttribute(i,o.getAttribute(i));return o.replaceWith(n),new j(i=>{n.onload=()=>i.complete()})}else return n.textContent=o.textContent,o.replaceWith(n),S}),Z(),ie(document))}function oi({location$:e,viewport$:t,progress$:r}){let o=xe();if(location.protocol==="file:")return S;let n=ur(o.base);I(document).subscribe(ri);let i=h(document.body,"click").pipe(He(n),v(([p,c])=>os(p,c)),pe()),a=h(window,"popstate").pipe(m(ye),pe());i.pipe(re(t)).subscribe(([p,{offset:c}])=>{history.replaceState(c,""),history.pushState(null,"",p)}),O(i,a).subscribe(e);let s=e.pipe(ee("pathname"),v(p=>fn(p,{progress$:r}).pipe(de(()=>(lt(p,!0),S)))),v(ri),v(ns),pe());return O(s.pipe(re(e,(p,c)=>c)),s.pipe(v(()=>e),ee("pathname"),v(()=>e),ee("hash")),e.pipe(K((p,c)=>p.pathname===c.pathname&&p.hash===c.hash),v(()=>i),w(()=>history.back()))).subscribe(p=>{var c,l;history.state!==null||!p.hash?window.scrollTo(0,(l=(c=history.state)==null?void 0:c.y)!=null?l:0):(history.scrollRestoration="auto",pn(p.hash),history.scrollRestoration="manual")}),e.subscribe(()=>{history.scrollRestoration="manual"}),h(window,"beforeunload").subscribe(()=>{history.scrollRestoration="auto"}),t.pipe(ee("offset"),_e(100)).subscribe(({offset:p})=>{history.replaceState(p,"")}),s}var ni=Mt(qr());function ii(e){let t=e.separator.split("|").map(n=>n.replace(/(\(\?[!=<][^)]+\))/g,"").length===0?"\uFFFD":n).join("|"),r=new RegExp(t,"img"),o=(n,i,a)=>`${i}${a}`;return n=>{n=n.replace(/[\s*+\-:~^]+/g," ").trim();let i=new RegExp(`(^|${e.separator}|)(${n.replace(/[|\\{}()[\]^$+*?.-]/g,"\\$&").replace(r,"|")})`,"img");return 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rt=Kn(Se("header"),{viewport$:Oe}),Ft=ot.pipe(m(()=>Se("main")),v(e=>Gn(e,{viewport$:Oe,header$:rt})),G(1)),xs=O(...ae("consent").map(e=>En(e,{target$:Lt})),...ae("dialog").map(e=>qn(e,{alert$:ro})),...ae("palette").map(e=>Jn(e)),...ae("progress").map(e=>Xn(e,{progress$:oo})),...ae("search").map(e=>ui(e,{index$:Ai,keyboard$:to})),...ae("source").map(e=>gi(e))),Es=C(()=>O(...ae("announce").map(e=>xn(e)),...ae("content").map(e=>zn(e,{viewport$:Oe,target$:Lt,print$:_i})),...ae("content").map(e=>B("search.highlight")?di(e,{index$:Ai,location$:Ut}):S),...ae("header").map(e=>Yn(e,{viewport$:Oe,header$:rt,main$:Ft})),...ae("header-title").map(e=>Bn(e,{viewport$:Oe,header$:rt})),...ae("sidebar").map(e=>e.getAttribute("data-md-type")==="navigation"?Nr(Mi,()=>Zr(e,{viewport$:Oe,header$:rt,main$:Ft})):Nr(hr,()=>Zr(e,{viewport$:Oe,header$:rt,main$:Ft}))),...ae("tabs").map(e=>yi(e,{viewport$:Oe,header$:rt})),...ae("toc").map(e=>xi(e,{viewport$:Oe,header$:rt,main$:Ft,target$:Lt})),...ae("top").map(e=>Ei(e,{viewport$:Oe,header$:rt,main$:Ft,target$:Lt})))),Ci=ot.pipe(v(()=>Es),Re(xs),G(1));Ci.subscribe();window.document$=ot;window.location$=Ut;window.target$=Lt;window.keyboard$=to;window.viewport$=Oe;window.tablet$=hr;window.screen$=Mi;window.print$=_i;window.alert$=ro;window.progress$=oo;window.component$=Ci;})(); +//# sourceMappingURL=bundle.83f73b43.min.js.map diff --git a/assets/javascripts/bundle.83f73b43.min.js.map b/assets/javascripts/bundle.83f73b43.min.js.map new file mode 100644 index 00000000..aab6c33b --- /dev/null +++ b/assets/javascripts/bundle.83f73b43.min.js.map @@ -0,0 +1,7 @@ +{ + "version": 3, + "sources": ["node_modules/focus-visible/dist/focus-visible.js", "node_modules/escape-html/index.js", "node_modules/clipboard/dist/clipboard.js", "src/templates/assets/javascripts/bundle.ts", "node_modules/tslib/tslib.es6.mjs", "node_modules/rxjs/src/internal/util/isFunction.ts", "node_modules/rxjs/src/internal/util/createErrorClass.ts", "node_modules/rxjs/src/internal/util/UnsubscriptionError.ts", "node_modules/rxjs/src/internal/util/arrRemove.ts", "node_modules/rxjs/src/internal/Subscription.ts", "node_modules/rxjs/src/internal/config.ts", "node_modules/rxjs/src/internal/scheduler/timeoutProvider.ts", "node_modules/rxjs/src/internal/util/reportUnhandledError.ts", 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"src/templates/assets/javascripts/components/main/index.ts", "src/templates/assets/javascripts/components/palette/index.ts", "src/templates/assets/javascripts/components/progress/index.ts", "src/templates/assets/javascripts/integrations/clipboard/index.ts", "src/templates/assets/javascripts/integrations/sitemap/index.ts", "src/templates/assets/javascripts/integrations/instant/index.ts", "src/templates/assets/javascripts/integrations/search/highlighter/index.ts", "src/templates/assets/javascripts/integrations/search/worker/message/index.ts", "src/templates/assets/javascripts/integrations/search/worker/_/index.ts", "src/templates/assets/javascripts/integrations/version/findurl/index.ts", "src/templates/assets/javascripts/integrations/version/index.ts", "src/templates/assets/javascripts/components/search/query/index.ts", "src/templates/assets/javascripts/components/search/result/index.ts", "src/templates/assets/javascripts/components/search/share/index.ts", "src/templates/assets/javascripts/components/search/suggest/index.ts", "src/templates/assets/javascripts/components/search/_/index.ts", "src/templates/assets/javascripts/components/search/highlight/index.ts", "src/templates/assets/javascripts/components/sidebar/index.ts", "src/templates/assets/javascripts/components/source/facts/github/index.ts", "src/templates/assets/javascripts/components/source/facts/gitlab/index.ts", "src/templates/assets/javascripts/components/source/facts/_/index.ts", "src/templates/assets/javascripts/components/source/_/index.ts", "src/templates/assets/javascripts/components/tabs/index.ts", "src/templates/assets/javascripts/components/toc/index.ts", "src/templates/assets/javascripts/components/top/index.ts", "src/templates/assets/javascripts/patches/ellipsis/index.ts", "src/templates/assets/javascripts/patches/indeterminate/index.ts", "src/templates/assets/javascripts/patches/scrollfix/index.ts", "src/templates/assets/javascripts/patches/scrolllock/index.ts", "src/templates/assets/javascripts/polyfills/index.ts"], + "sourcesContent": ["(function (global, factory) {\n typeof exports === 'object' && typeof module !== 'undefined' ? factory() :\n typeof define === 'function' && define.amd ? define(factory) :\n (factory());\n}(this, (function () { 'use strict';\n\n /**\n * Applies the :focus-visible polyfill at the given scope.\n * A scope in this case is either the top-level Document or a Shadow Root.\n *\n * @param {(Document|ShadowRoot)} scope\n * @see https://github.com/WICG/focus-visible\n */\n function applyFocusVisiblePolyfill(scope) {\n var hadKeyboardEvent = true;\n var hadFocusVisibleRecently = false;\n var hadFocusVisibleRecentlyTimeout = null;\n\n var inputTypesAllowlist = {\n text: true,\n search: true,\n url: true,\n tel: true,\n email: true,\n password: true,\n number: true,\n date: true,\n month: true,\n week: true,\n time: true,\n datetime: true,\n 'datetime-local': true\n };\n\n /**\n * Helper function for legacy browsers and iframes which sometimes focus\n * elements like document, body, and non-interactive SVG.\n * @param {Element} el\n */\n function isValidFocusTarget(el) {\n if (\n el &&\n el !== document &&\n el.nodeName !== 'HTML' &&\n el.nodeName !== 'BODY' &&\n 'classList' in el &&\n 'contains' in el.classList\n ) {\n return true;\n }\n return false;\n }\n\n /**\n * Computes whether the given element should automatically trigger the\n * `focus-visible` class being added, i.e. whether it should always match\n * `:focus-visible` when focused.\n * @param {Element} el\n * @return {boolean}\n */\n function focusTriggersKeyboardModality(el) {\n var type = el.type;\n var tagName = el.tagName;\n\n if (tagName === 'INPUT' && inputTypesAllowlist[type] && !el.readOnly) {\n return true;\n }\n\n if (tagName === 'TEXTAREA' && !el.readOnly) {\n return true;\n }\n\n if (el.isContentEditable) {\n return true;\n }\n\n return false;\n }\n\n /**\n * Add the `focus-visible` class to the given element if it was not added by\n * the author.\n * @param {Element} el\n */\n function addFocusVisibleClass(el) {\n if (el.classList.contains('focus-visible')) {\n return;\n }\n el.classList.add('focus-visible');\n el.setAttribute('data-focus-visible-added', '');\n }\n\n /**\n * Remove the `focus-visible` class from the given element if it was not\n * originally added by the author.\n * @param {Element} el\n */\n function removeFocusVisibleClass(el) {\n if (!el.hasAttribute('data-focus-visible-added')) {\n return;\n }\n el.classList.remove('focus-visible');\n el.removeAttribute('data-focus-visible-added');\n }\n\n /**\n * If the most recent user interaction was via the keyboard;\n * and the key press did not include a meta, alt/option, or control key;\n * then the modality is keyboard. Otherwise, the modality is not keyboard.\n * Apply `focus-visible` to any current active element and keep track\n * of our keyboard modality state with `hadKeyboardEvent`.\n * @param {KeyboardEvent} e\n */\n function onKeyDown(e) {\n if (e.metaKey || e.altKey || e.ctrlKey) {\n return;\n }\n\n if (isValidFocusTarget(scope.activeElement)) {\n addFocusVisibleClass(scope.activeElement);\n }\n\n hadKeyboardEvent = true;\n }\n\n /**\n * If at any point a user clicks with a pointing device, ensure that we change\n * the modality away from keyboard.\n * This avoids the situation where a user presses a key on an already focused\n * element, and then clicks on a different element, focusing it with a\n * pointing device, while we still think we're in keyboard modality.\n * @param {Event} e\n */\n function onPointerDown(e) {\n hadKeyboardEvent = false;\n }\n\n /**\n * On `focus`, add the `focus-visible` class to the target if:\n * - the target received focus as a result of keyboard navigation, or\n * - the event target is an element that will likely require interaction\n * via the keyboard (e.g. a text box)\n * @param {Event} e\n */\n function onFocus(e) {\n // Prevent IE from focusing the document or HTML element.\n if (!isValidFocusTarget(e.target)) {\n return;\n }\n\n if (hadKeyboardEvent || focusTriggersKeyboardModality(e.target)) {\n addFocusVisibleClass(e.target);\n }\n }\n\n /**\n * On `blur`, remove the `focus-visible` class from the target.\n * @param {Event} e\n */\n function onBlur(e) {\n if (!isValidFocusTarget(e.target)) {\n return;\n }\n\n if (\n e.target.classList.contains('focus-visible') ||\n e.target.hasAttribute('data-focus-visible-added')\n ) {\n // To detect a tab/window switch, we look for a blur event followed\n // rapidly by a visibility change.\n // If we don't see a visibility change within 100ms, it's probably a\n // regular focus change.\n hadFocusVisibleRecently = true;\n window.clearTimeout(hadFocusVisibleRecentlyTimeout);\n hadFocusVisibleRecentlyTimeout = window.setTimeout(function() {\n hadFocusVisibleRecently = false;\n }, 100);\n removeFocusVisibleClass(e.target);\n }\n }\n\n /**\n * If the user changes tabs, keep track of whether or not the previously\n * focused element had .focus-visible.\n * @param {Event} e\n */\n function onVisibilityChange(e) {\n if (document.visibilityState === 'hidden') {\n // If the tab becomes active again, the browser will handle calling focus\n // on the element (Safari actually calls it twice).\n // If this tab change caused a blur on an element with focus-visible,\n // re-apply the class when the user switches back to the tab.\n if (hadFocusVisibleRecently) {\n hadKeyboardEvent = true;\n }\n addInitialPointerMoveListeners();\n }\n }\n\n /**\n * Add a group of listeners to detect usage of any pointing devices.\n * These listeners will be added when the polyfill first loads, and anytime\n * the window is blurred, so that they are active when the window regains\n * focus.\n */\n function addInitialPointerMoveListeners() {\n document.addEventListener('mousemove', onInitialPointerMove);\n document.addEventListener('mousedown', onInitialPointerMove);\n document.addEventListener('mouseup', onInitialPointerMove);\n document.addEventListener('pointermove', onInitialPointerMove);\n document.addEventListener('pointerdown', onInitialPointerMove);\n document.addEventListener('pointerup', onInitialPointerMove);\n document.addEventListener('touchmove', onInitialPointerMove);\n document.addEventListener('touchstart', onInitialPointerMove);\n document.addEventListener('touchend', onInitialPointerMove);\n }\n\n function removeInitialPointerMoveListeners() {\n document.removeEventListener('mousemove', onInitialPointerMove);\n document.removeEventListener('mousedown', onInitialPointerMove);\n document.removeEventListener('mouseup', onInitialPointerMove);\n document.removeEventListener('pointermove', onInitialPointerMove);\n document.removeEventListener('pointerdown', onInitialPointerMove);\n document.removeEventListener('pointerup', onInitialPointerMove);\n document.removeEventListener('touchmove', onInitialPointerMove);\n document.removeEventListener('touchstart', onInitialPointerMove);\n document.removeEventListener('touchend', onInitialPointerMove);\n }\n\n /**\n * When the polfyill first loads, assume the user is in keyboard modality.\n * If any event is received from a pointing device (e.g. mouse, pointer,\n * touch), turn off keyboard modality.\n * This accounts for situations where focus enters the page from the URL bar.\n * @param {Event} e\n */\n function onInitialPointerMove(e) {\n // Work around a Safari quirk that fires a mousemove on whenever the\n // window blurs, even if you're tabbing out of the page. \u00AF\\_(\u30C4)_/\u00AF\n if (e.target.nodeName && e.target.nodeName.toLowerCase() === 'html') {\n return;\n }\n\n hadKeyboardEvent = false;\n removeInitialPointerMoveListeners();\n }\n\n // For some kinds of state, we are interested in changes at the global scope\n // only. For example, global pointer input, global key presses and global\n // visibility change should affect the state at every scope:\n document.addEventListener('keydown', onKeyDown, true);\n document.addEventListener('mousedown', onPointerDown, true);\n document.addEventListener('pointerdown', onPointerDown, true);\n document.addEventListener('touchstart', onPointerDown, true);\n document.addEventListener('visibilitychange', onVisibilityChange, true);\n\n addInitialPointerMoveListeners();\n\n // For focus and blur, we specifically care about state changes in the local\n // scope. This is because focus / blur events that originate from within a\n // shadow root are not re-dispatched from the host element if it was already\n // the active element in its own scope:\n scope.addEventListener('focus', onFocus, true);\n scope.addEventListener('blur', onBlur, true);\n\n // We detect that a node is a ShadowRoot by ensuring that it is a\n // DocumentFragment and also has a host property. This check covers native\n // implementation and polyfill implementation transparently. If we only cared\n // about the native implementation, we could just check if the scope was\n // an instance of a ShadowRoot.\n if (scope.nodeType === Node.DOCUMENT_FRAGMENT_NODE && scope.host) {\n // Since a ShadowRoot is a special kind of DocumentFragment, it does not\n // have a root element to add a class to. So, we add this attribute to the\n // host element instead:\n scope.host.setAttribute('data-js-focus-visible', '');\n } else if (scope.nodeType === Node.DOCUMENT_NODE) {\n document.documentElement.classList.add('js-focus-visible');\n document.documentElement.setAttribute('data-js-focus-visible', '');\n }\n }\n\n // It is important to wrap all references to global window and document in\n // these checks to support server-side rendering use cases\n // @see https://github.com/WICG/focus-visible/issues/199\n if (typeof window !== 'undefined' && typeof document !== 'undefined') {\n // Make the polyfill helper globally available. This can be used as a signal\n // to interested libraries that wish to coordinate with the polyfill for e.g.,\n // applying the polyfill to a shadow root:\n window.applyFocusVisiblePolyfill = applyFocusVisiblePolyfill;\n\n // Notify interested libraries of the polyfill's presence, in case the\n // polyfill was loaded lazily:\n var event;\n\n try {\n event = new CustomEvent('focus-visible-polyfill-ready');\n } catch (error) {\n // IE11 does not support using CustomEvent as a constructor directly:\n event = document.createEvent('CustomEvent');\n event.initCustomEvent('focus-visible-polyfill-ready', false, false, {});\n }\n\n window.dispatchEvent(event);\n }\n\n if (typeof document !== 'undefined') {\n // Apply the polyfill to the global document, so that no JavaScript\n // coordination is required to use the polyfill in the top-level document:\n applyFocusVisiblePolyfill(document);\n }\n\n})));\n", "/*!\n * escape-html\n * Copyright(c) 2012-2013 TJ Holowaychuk\n * Copyright(c) 2015 Andreas Lubbe\n * Copyright(c) 2015 Tiancheng \"Timothy\" Gu\n * MIT Licensed\n */\n\n'use strict';\n\n/**\n * Module variables.\n * @private\n */\n\nvar matchHtmlRegExp = /[\"'&<>]/;\n\n/**\n * Module exports.\n * @public\n */\n\nmodule.exports = escapeHtml;\n\n/**\n * Escape special characters in the given string of html.\n *\n * @param {string} string The string to escape for inserting into HTML\n * @return {string}\n * @public\n */\n\nfunction escapeHtml(string) {\n var str = '' + string;\n var match = matchHtmlRegExp.exec(str);\n\n if (!match) {\n return str;\n }\n\n var escape;\n var html = '';\n var index = 0;\n var lastIndex = 0;\n\n for (index = match.index; index < str.length; index++) {\n switch (str.charCodeAt(index)) {\n case 34: // \"\n escape = '"';\n break;\n case 38: // &\n escape = '&';\n break;\n case 39: // '\n escape = ''';\n break;\n case 60: // <\n escape = '<';\n break;\n case 62: // >\n escape = '>';\n break;\n default:\n continue;\n }\n\n if (lastIndex !== index) {\n html += str.substring(lastIndex, index);\n }\n\n lastIndex = index + 1;\n html += escape;\n }\n\n return lastIndex !== index\n ? html + str.substring(lastIndex, index)\n : html;\n}\n", "/*!\n * clipboard.js v2.0.11\n * https://clipboardjs.com/\n *\n * Licensed MIT \u00A9 Zeno Rocha\n */\n(function webpackUniversalModuleDefinition(root, factory) {\n\tif(typeof exports === 'object' && typeof module === 'object')\n\t\tmodule.exports = factory();\n\telse if(typeof define === 'function' && define.amd)\n\t\tdefine([], factory);\n\telse if(typeof exports === 'object')\n\t\texports[\"ClipboardJS\"] = factory();\n\telse\n\t\troot[\"ClipboardJS\"] = factory();\n})(this, function() {\nreturn /******/ (function() { // webpackBootstrap\n/******/ \tvar __webpack_modules__ = ({\n\n/***/ 686:\n/***/ (function(__unused_webpack_module, __webpack_exports__, __webpack_require__) {\n\n\"use strict\";\n\n// EXPORTS\n__webpack_require__.d(__webpack_exports__, {\n \"default\": function() { return /* binding */ clipboard; }\n});\n\n// EXTERNAL MODULE: ./node_modules/tiny-emitter/index.js\nvar tiny_emitter = __webpack_require__(279);\nvar tiny_emitter_default = /*#__PURE__*/__webpack_require__.n(tiny_emitter);\n// EXTERNAL MODULE: ./node_modules/good-listener/src/listen.js\nvar listen = __webpack_require__(370);\nvar listen_default = /*#__PURE__*/__webpack_require__.n(listen);\n// EXTERNAL MODULE: ./node_modules/select/src/select.js\nvar src_select = __webpack_require__(817);\nvar select_default = /*#__PURE__*/__webpack_require__.n(src_select);\n;// CONCATENATED MODULE: ./src/common/command.js\n/**\n * Executes a given operation type.\n * @param {String} type\n * @return {Boolean}\n */\nfunction command(type) {\n try {\n return document.execCommand(type);\n } catch (err) {\n return false;\n }\n}\n;// CONCATENATED MODULE: ./src/actions/cut.js\n\n\n/**\n * Cut action wrapper.\n * @param {String|HTMLElement} target\n * @return {String}\n */\n\nvar ClipboardActionCut = function ClipboardActionCut(target) {\n var selectedText = select_default()(target);\n command('cut');\n return selectedText;\n};\n\n/* harmony default export */ var actions_cut = (ClipboardActionCut);\n;// CONCATENATED MODULE: ./src/common/create-fake-element.js\n/**\n * Creates a fake textarea element with a value.\n * @param {String} value\n * @return {HTMLElement}\n */\nfunction createFakeElement(value) {\n var isRTL = document.documentElement.getAttribute('dir') === 'rtl';\n var fakeElement = document.createElement('textarea'); // Prevent zooming on iOS\n\n fakeElement.style.fontSize = '12pt'; // Reset box model\n\n fakeElement.style.border = '0';\n fakeElement.style.padding = '0';\n fakeElement.style.margin = '0'; // Move element out of screen horizontally\n\n fakeElement.style.position = 'absolute';\n fakeElement.style[isRTL ? 'right' : 'left'] = '-9999px'; // Move element to the same position vertically\n\n var yPosition = window.pageYOffset || document.documentElement.scrollTop;\n fakeElement.style.top = \"\".concat(yPosition, \"px\");\n fakeElement.setAttribute('readonly', '');\n fakeElement.value = value;\n return fakeElement;\n}\n;// CONCATENATED MODULE: ./src/actions/copy.js\n\n\n\n/**\n * Create fake copy action wrapper using a fake element.\n * @param {String} target\n * @param {Object} options\n * @return {String}\n */\n\nvar fakeCopyAction = function fakeCopyAction(value, options) {\n var fakeElement = createFakeElement(value);\n options.container.appendChild(fakeElement);\n var selectedText = select_default()(fakeElement);\n command('copy');\n fakeElement.remove();\n return selectedText;\n};\n/**\n * Copy action wrapper.\n * @param {String|HTMLElement} target\n * @param {Object} options\n * @return {String}\n */\n\n\nvar ClipboardActionCopy = function ClipboardActionCopy(target) {\n var options = arguments.length > 1 && arguments[1] !== undefined ? arguments[1] : {\n container: document.body\n };\n var selectedText = '';\n\n if (typeof target === 'string') {\n selectedText = fakeCopyAction(target, options);\n } else if (target instanceof HTMLInputElement && !['text', 'search', 'url', 'tel', 'password'].includes(target === null || target === void 0 ? void 0 : target.type)) {\n // If input type doesn't support `setSelectionRange`. Simulate it. https://developer.mozilla.org/en-US/docs/Web/API/HTMLInputElement/setSelectionRange\n selectedText = fakeCopyAction(target.value, options);\n } else {\n selectedText = select_default()(target);\n command('copy');\n }\n\n return selectedText;\n};\n\n/* harmony default export */ var actions_copy = (ClipboardActionCopy);\n;// CONCATENATED MODULE: ./src/actions/default.js\nfunction _typeof(obj) { \"@babel/helpers - typeof\"; if (typeof Symbol === \"function\" && typeof Symbol.iterator === \"symbol\") { _typeof = function _typeof(obj) { return typeof obj; }; } else { _typeof = function _typeof(obj) { return obj && typeof Symbol === \"function\" && obj.constructor === Symbol && obj !== Symbol.prototype ? \"symbol\" : typeof obj; }; } return _typeof(obj); }\n\n\n\n/**\n * Inner function which performs selection from either `text` or `target`\n * properties and then executes copy or cut operations.\n * @param {Object} options\n */\n\nvar ClipboardActionDefault = function ClipboardActionDefault() {\n var options = arguments.length > 0 && arguments[0] !== undefined ? arguments[0] : {};\n // Defines base properties passed from constructor.\n var _options$action = options.action,\n action = _options$action === void 0 ? 'copy' : _options$action,\n container = options.container,\n target = options.target,\n text = options.text; // Sets the `action` to be performed which can be either 'copy' or 'cut'.\n\n if (action !== 'copy' && action !== 'cut') {\n throw new Error('Invalid \"action\" value, use either \"copy\" or \"cut\"');\n } // Sets the `target` property using an element that will be have its content copied.\n\n\n if (target !== undefined) {\n if (target && _typeof(target) === 'object' && target.nodeType === 1) {\n if (action === 'copy' && target.hasAttribute('disabled')) {\n throw new Error('Invalid \"target\" attribute. Please use \"readonly\" instead of \"disabled\" attribute');\n }\n\n if (action === 'cut' && (target.hasAttribute('readonly') || target.hasAttribute('disabled'))) {\n throw new Error('Invalid \"target\" attribute. You can\\'t cut text from elements with \"readonly\" or \"disabled\" attributes');\n }\n } else {\n throw new Error('Invalid \"target\" value, use a valid Element');\n }\n } // Define selection strategy based on `text` property.\n\n\n if (text) {\n return actions_copy(text, {\n container: container\n });\n } // Defines which selection strategy based on `target` property.\n\n\n if (target) {\n return action === 'cut' ? actions_cut(target) : actions_copy(target, {\n container: container\n });\n }\n};\n\n/* harmony default export */ var actions_default = (ClipboardActionDefault);\n;// CONCATENATED MODULE: ./src/clipboard.js\nfunction clipboard_typeof(obj) { \"@babel/helpers - typeof\"; if (typeof Symbol === \"function\" && typeof Symbol.iterator === \"symbol\") { clipboard_typeof = function _typeof(obj) { return typeof obj; }; } else { clipboard_typeof = function _typeof(obj) { return obj && typeof Symbol === \"function\" && obj.constructor === Symbol && obj !== Symbol.prototype ? \"symbol\" : typeof obj; }; } return clipboard_typeof(obj); }\n\nfunction _classCallCheck(instance, Constructor) { if (!(instance instanceof Constructor)) { throw new TypeError(\"Cannot call a class as a function\"); } }\n\nfunction _defineProperties(target, props) { for (var i = 0; i < props.length; i++) { var descriptor = props[i]; descriptor.enumerable = descriptor.enumerable || false; descriptor.configurable = true; if (\"value\" in descriptor) descriptor.writable = true; Object.defineProperty(target, descriptor.key, descriptor); } }\n\nfunction _createClass(Constructor, protoProps, staticProps) { if (protoProps) _defineProperties(Constructor.prototype, protoProps); if (staticProps) _defineProperties(Constructor, staticProps); return Constructor; }\n\nfunction _inherits(subClass, superClass) { if (typeof superClass !== \"function\" && superClass !== null) { throw new TypeError(\"Super expression must either be null or a function\"); } subClass.prototype = Object.create(superClass && superClass.prototype, { constructor: { value: subClass, writable: true, configurable: true } }); if (superClass) _setPrototypeOf(subClass, superClass); }\n\nfunction _setPrototypeOf(o, p) { _setPrototypeOf = Object.setPrototypeOf || function _setPrototypeOf(o, p) { o.__proto__ = p; return o; }; return _setPrototypeOf(o, p); }\n\nfunction _createSuper(Derived) { var hasNativeReflectConstruct = _isNativeReflectConstruct(); return function _createSuperInternal() { var Super = _getPrototypeOf(Derived), result; if (hasNativeReflectConstruct) { var NewTarget = _getPrototypeOf(this).constructor; result = Reflect.construct(Super, arguments, NewTarget); } else { result = Super.apply(this, arguments); } return _possibleConstructorReturn(this, result); }; }\n\nfunction _possibleConstructorReturn(self, call) { if (call && (clipboard_typeof(call) === \"object\" || typeof call === \"function\")) { return call; } return _assertThisInitialized(self); }\n\nfunction _assertThisInitialized(self) { if (self === void 0) { throw new ReferenceError(\"this hasn't been initialised - super() hasn't been called\"); } return self; }\n\nfunction _isNativeReflectConstruct() { if (typeof Reflect === \"undefined\" || !Reflect.construct) return false; if (Reflect.construct.sham) return false; if (typeof Proxy === \"function\") return true; try { Date.prototype.toString.call(Reflect.construct(Date, [], function () {})); return true; } catch (e) { return false; } }\n\nfunction _getPrototypeOf(o) { _getPrototypeOf = Object.setPrototypeOf ? Object.getPrototypeOf : function _getPrototypeOf(o) { return o.__proto__ || Object.getPrototypeOf(o); }; return _getPrototypeOf(o); }\n\n\n\n\n\n\n/**\n * Helper function to retrieve attribute value.\n * @param {String} suffix\n * @param {Element} element\n */\n\nfunction getAttributeValue(suffix, element) {\n var attribute = \"data-clipboard-\".concat(suffix);\n\n if (!element.hasAttribute(attribute)) {\n return;\n }\n\n return element.getAttribute(attribute);\n}\n/**\n * Base class which takes one or more elements, adds event listeners to them,\n * and instantiates a new `ClipboardAction` on each click.\n */\n\n\nvar Clipboard = /*#__PURE__*/function (_Emitter) {\n _inherits(Clipboard, _Emitter);\n\n var _super = _createSuper(Clipboard);\n\n /**\n * @param {String|HTMLElement|HTMLCollection|NodeList} trigger\n * @param {Object} options\n */\n function Clipboard(trigger, options) {\n var _this;\n\n _classCallCheck(this, Clipboard);\n\n _this = _super.call(this);\n\n _this.resolveOptions(options);\n\n _this.listenClick(trigger);\n\n return _this;\n }\n /**\n * Defines if attributes would be resolved using internal setter functions\n * or custom functions that were passed in the constructor.\n * @param {Object} options\n */\n\n\n _createClass(Clipboard, [{\n key: \"resolveOptions\",\n value: function resolveOptions() {\n var options = arguments.length > 0 && arguments[0] !== undefined ? arguments[0] : {};\n this.action = typeof options.action === 'function' ? options.action : this.defaultAction;\n this.target = typeof options.target === 'function' ? options.target : this.defaultTarget;\n this.text = typeof options.text === 'function' ? options.text : this.defaultText;\n this.container = clipboard_typeof(options.container) === 'object' ? options.container : document.body;\n }\n /**\n * Adds a click event listener to the passed trigger.\n * @param {String|HTMLElement|HTMLCollection|NodeList} trigger\n */\n\n }, {\n key: \"listenClick\",\n value: function listenClick(trigger) {\n var _this2 = this;\n\n this.listener = listen_default()(trigger, 'click', function (e) {\n return _this2.onClick(e);\n });\n }\n /**\n * Defines a new `ClipboardAction` on each click event.\n * @param {Event} e\n */\n\n }, {\n key: \"onClick\",\n value: function onClick(e) {\n var trigger = e.delegateTarget || e.currentTarget;\n var action = this.action(trigger) || 'copy';\n var text = actions_default({\n action: action,\n container: this.container,\n target: this.target(trigger),\n text: this.text(trigger)\n }); // Fires an event based on the copy operation result.\n\n this.emit(text ? 'success' : 'error', {\n action: action,\n text: text,\n trigger: trigger,\n clearSelection: function clearSelection() {\n if (trigger) {\n trigger.focus();\n }\n\n window.getSelection().removeAllRanges();\n }\n });\n }\n /**\n * Default `action` lookup function.\n * @param {Element} trigger\n */\n\n }, {\n key: \"defaultAction\",\n value: function defaultAction(trigger) {\n return getAttributeValue('action', trigger);\n }\n /**\n * Default `target` lookup function.\n * @param {Element} trigger\n */\n\n }, {\n key: \"defaultTarget\",\n value: function defaultTarget(trigger) {\n var selector = getAttributeValue('target', trigger);\n\n if (selector) {\n return document.querySelector(selector);\n }\n }\n /**\n * Allow fire programmatically a copy action\n * @param {String|HTMLElement} target\n * @param {Object} options\n * @returns Text copied.\n */\n\n }, {\n key: \"defaultText\",\n\n /**\n * Default `text` lookup function.\n * @param {Element} trigger\n */\n value: function defaultText(trigger) {\n return getAttributeValue('text', trigger);\n }\n /**\n * Destroy lifecycle.\n */\n\n }, {\n key: \"destroy\",\n value: function destroy() {\n this.listener.destroy();\n }\n }], [{\n key: \"copy\",\n value: function copy(target) {\n var options = arguments.length > 1 && arguments[1] !== undefined ? arguments[1] : {\n container: document.body\n };\n return actions_copy(target, options);\n }\n /**\n * Allow fire programmatically a cut action\n * @param {String|HTMLElement} target\n * @returns Text cutted.\n */\n\n }, {\n key: \"cut\",\n value: function cut(target) {\n return actions_cut(target);\n }\n /**\n * Returns the support of the given action, or all actions if no action is\n * given.\n * @param {String} [action]\n */\n\n }, {\n key: \"isSupported\",\n value: function isSupported() {\n var action = arguments.length > 0 && arguments[0] !== undefined ? arguments[0] : ['copy', 'cut'];\n var actions = typeof action === 'string' ? [action] : action;\n var support = !!document.queryCommandSupported;\n actions.forEach(function (action) {\n support = support && !!document.queryCommandSupported(action);\n });\n return support;\n }\n }]);\n\n return Clipboard;\n}((tiny_emitter_default()));\n\n/* harmony default export */ var clipboard = (Clipboard);\n\n/***/ }),\n\n/***/ 828:\n/***/ (function(module) {\n\nvar DOCUMENT_NODE_TYPE = 9;\n\n/**\n * A polyfill for Element.matches()\n */\nif (typeof Element !== 'undefined' && !Element.prototype.matches) {\n var proto = Element.prototype;\n\n proto.matches = proto.matchesSelector ||\n proto.mozMatchesSelector ||\n proto.msMatchesSelector ||\n proto.oMatchesSelector ||\n proto.webkitMatchesSelector;\n}\n\n/**\n * Finds the closest parent that matches a selector.\n *\n * @param {Element} element\n * @param {String} selector\n * @return {Function}\n */\nfunction closest (element, selector) {\n while (element && element.nodeType !== DOCUMENT_NODE_TYPE) {\n if (typeof element.matches === 'function' &&\n element.matches(selector)) {\n return element;\n }\n element = element.parentNode;\n }\n}\n\nmodule.exports = closest;\n\n\n/***/ }),\n\n/***/ 438:\n/***/ (function(module, __unused_webpack_exports, __webpack_require__) {\n\nvar closest = __webpack_require__(828);\n\n/**\n * Delegates event to a selector.\n *\n * @param {Element} element\n * @param {String} selector\n * @param {String} type\n * @param {Function} callback\n * @param {Boolean} useCapture\n * @return {Object}\n */\nfunction _delegate(element, selector, type, callback, useCapture) {\n var listenerFn = listener.apply(this, arguments);\n\n element.addEventListener(type, listenerFn, useCapture);\n\n return {\n destroy: function() {\n element.removeEventListener(type, listenerFn, useCapture);\n }\n }\n}\n\n/**\n * Delegates event to a selector.\n *\n * @param {Element|String|Array} [elements]\n * @param {String} selector\n * @param {String} type\n * @param {Function} callback\n * @param {Boolean} useCapture\n * @return {Object}\n */\nfunction delegate(elements, selector, type, callback, useCapture) {\n // Handle the regular Element usage\n if (typeof elements.addEventListener === 'function') {\n return _delegate.apply(null, arguments);\n }\n\n // Handle Element-less usage, it defaults to global delegation\n if (typeof type === 'function') {\n // Use `document` as the first parameter, then apply arguments\n // This is a short way to .unshift `arguments` without running into deoptimizations\n return _delegate.bind(null, document).apply(null, arguments);\n }\n\n // Handle Selector-based usage\n if (typeof elements === 'string') {\n elements = document.querySelectorAll(elements);\n }\n\n // Handle Array-like based usage\n return Array.prototype.map.call(elements, function (element) {\n return _delegate(element, selector, type, callback, useCapture);\n });\n}\n\n/**\n * Finds closest match and invokes callback.\n *\n * @param {Element} element\n * @param {String} selector\n * @param {String} type\n * @param {Function} callback\n * @return {Function}\n */\nfunction listener(element, selector, type, callback) {\n return function(e) {\n e.delegateTarget = closest(e.target, selector);\n\n if (e.delegateTarget) {\n callback.call(element, e);\n }\n }\n}\n\nmodule.exports = delegate;\n\n\n/***/ }),\n\n/***/ 879:\n/***/ (function(__unused_webpack_module, exports) {\n\n/**\n * Check if argument is a HTML element.\n *\n * @param {Object} value\n * @return {Boolean}\n */\nexports.node = function(value) {\n return value !== undefined\n && value instanceof HTMLElement\n && value.nodeType === 1;\n};\n\n/**\n * Check if argument is a list of HTML elements.\n *\n * @param {Object} value\n * @return {Boolean}\n */\nexports.nodeList = function(value) {\n var type = Object.prototype.toString.call(value);\n\n return value !== undefined\n && (type === '[object NodeList]' || type === '[object HTMLCollection]')\n && ('length' in value)\n && (value.length === 0 || exports.node(value[0]));\n};\n\n/**\n * Check if argument is a string.\n *\n * @param {Object} value\n * @return {Boolean}\n */\nexports.string = function(value) {\n return typeof value === 'string'\n || value instanceof String;\n};\n\n/**\n * Check if argument is a function.\n *\n * @param {Object} value\n * @return {Boolean}\n */\nexports.fn = function(value) {\n var type = Object.prototype.toString.call(value);\n\n return type === '[object Function]';\n};\n\n\n/***/ }),\n\n/***/ 370:\n/***/ (function(module, __unused_webpack_exports, __webpack_require__) {\n\nvar is = __webpack_require__(879);\nvar delegate = __webpack_require__(438);\n\n/**\n * Validates all params and calls the right\n * listener function based on its target type.\n *\n * @param {String|HTMLElement|HTMLCollection|NodeList} target\n * @param {String} type\n * @param {Function} callback\n * @return {Object}\n */\nfunction listen(target, type, callback) {\n if (!target && !type && !callback) {\n throw new Error('Missing required arguments');\n }\n\n if (!is.string(type)) {\n throw new TypeError('Second argument must be a String');\n }\n\n if (!is.fn(callback)) {\n throw new TypeError('Third argument must be a Function');\n }\n\n if (is.node(target)) {\n return listenNode(target, type, callback);\n }\n else if (is.nodeList(target)) {\n return listenNodeList(target, type, callback);\n }\n else if (is.string(target)) {\n return listenSelector(target, type, callback);\n }\n else {\n throw new TypeError('First argument must be a String, HTMLElement, HTMLCollection, or NodeList');\n }\n}\n\n/**\n * Adds an event listener to a HTML element\n * and returns a remove listener function.\n *\n * @param {HTMLElement} node\n * @param {String} type\n * @param {Function} callback\n * @return {Object}\n */\nfunction listenNode(node, type, callback) {\n node.addEventListener(type, callback);\n\n return {\n destroy: function() {\n node.removeEventListener(type, callback);\n }\n }\n}\n\n/**\n * Add an event listener to a list of HTML elements\n * and returns a remove listener function.\n *\n * @param {NodeList|HTMLCollection} nodeList\n * @param {String} type\n * @param {Function} callback\n * @return {Object}\n */\nfunction listenNodeList(nodeList, type, callback) {\n Array.prototype.forEach.call(nodeList, function(node) {\n node.addEventListener(type, callback);\n });\n\n return {\n destroy: function() {\n Array.prototype.forEach.call(nodeList, function(node) {\n node.removeEventListener(type, callback);\n });\n }\n }\n}\n\n/**\n * Add an event listener to a selector\n * and returns a remove listener function.\n *\n * @param {String} selector\n * @param {String} type\n * @param {Function} callback\n * @return {Object}\n */\nfunction listenSelector(selector, type, callback) {\n return delegate(document.body, selector, type, callback);\n}\n\nmodule.exports = listen;\n\n\n/***/ }),\n\n/***/ 817:\n/***/ (function(module) {\n\nfunction select(element) {\n var selectedText;\n\n if (element.nodeName === 'SELECT') {\n element.focus();\n\n selectedText = element.value;\n }\n else if (element.nodeName === 'INPUT' || element.nodeName === 'TEXTAREA') {\n var isReadOnly = element.hasAttribute('readonly');\n\n if (!isReadOnly) {\n element.setAttribute('readonly', '');\n }\n\n element.select();\n element.setSelectionRange(0, element.value.length);\n\n if (!isReadOnly) {\n element.removeAttribute('readonly');\n }\n\n selectedText = element.value;\n }\n else {\n if (element.hasAttribute('contenteditable')) {\n element.focus();\n }\n\n var selection = window.getSelection();\n var range = document.createRange();\n\n range.selectNodeContents(element);\n selection.removeAllRanges();\n selection.addRange(range);\n\n selectedText = selection.toString();\n }\n\n return selectedText;\n}\n\nmodule.exports = select;\n\n\n/***/ }),\n\n/***/ 279:\n/***/ (function(module) {\n\nfunction E () {\n // Keep this empty so it's easier to inherit from\n // (via https://github.com/lipsmack from https://github.com/scottcorgan/tiny-emitter/issues/3)\n}\n\nE.prototype = {\n on: function (name, callback, ctx) {\n var e = this.e || (this.e = {});\n\n (e[name] || (e[name] = [])).push({\n fn: callback,\n ctx: ctx\n });\n\n return this;\n },\n\n once: function (name, callback, ctx) {\n var self = this;\n function listener () {\n self.off(name, listener);\n callback.apply(ctx, arguments);\n };\n\n listener._ = callback\n return this.on(name, listener, ctx);\n },\n\n emit: function (name) {\n var data = [].slice.call(arguments, 1);\n var evtArr = ((this.e || (this.e = {}))[name] || []).slice();\n var i = 0;\n var len = evtArr.length;\n\n for (i; i < len; i++) {\n evtArr[i].fn.apply(evtArr[i].ctx, data);\n }\n\n return this;\n },\n\n off: function (name, callback) {\n var e = this.e || (this.e = {});\n var evts = e[name];\n var liveEvents = [];\n\n if (evts && callback) {\n for (var i = 0, len = evts.length; i < len; i++) {\n if (evts[i].fn !== callback && evts[i].fn._ !== callback)\n liveEvents.push(evts[i]);\n }\n }\n\n // Remove event from queue to prevent memory leak\n // Suggested by https://github.com/lazd\n // Ref: https://github.com/scottcorgan/tiny-emitter/commit/c6ebfaa9bc973b33d110a84a307742b7cf94c953#commitcomment-5024910\n\n (liveEvents.length)\n ? e[name] = liveEvents\n : delete e[name];\n\n return this;\n }\n};\n\nmodule.exports = E;\nmodule.exports.TinyEmitter = E;\n\n\n/***/ })\n\n/******/ \t});\n/************************************************************************/\n/******/ \t// The module cache\n/******/ \tvar __webpack_module_cache__ = {};\n/******/ \t\n/******/ \t// The require function\n/******/ \tfunction __webpack_require__(moduleId) {\n/******/ \t\t// Check if module is in cache\n/******/ \t\tif(__webpack_module_cache__[moduleId]) {\n/******/ \t\t\treturn __webpack_module_cache__[moduleId].exports;\n/******/ \t\t}\n/******/ \t\t// Create a new module (and put it into the cache)\n/******/ \t\tvar module = __webpack_module_cache__[moduleId] = {\n/******/ \t\t\t// no module.id needed\n/******/ \t\t\t// no module.loaded needed\n/******/ \t\t\texports: {}\n/******/ \t\t};\n/******/ \t\n/******/ \t\t// Execute the module function\n/******/ \t\t__webpack_modules__[moduleId](module, module.exports, __webpack_require__);\n/******/ \t\n/******/ \t\t// Return the exports of the module\n/******/ \t\treturn module.exports;\n/******/ \t}\n/******/ \t\n/************************************************************************/\n/******/ \t/* webpack/runtime/compat get default export */\n/******/ \t!function() {\n/******/ \t\t// getDefaultExport function for compatibility with non-harmony modules\n/******/ \t\t__webpack_require__.n = function(module) {\n/******/ \t\t\tvar getter = module && module.__esModule ?\n/******/ \t\t\t\tfunction() { return module['default']; } :\n/******/ \t\t\t\tfunction() { return module; };\n/******/ \t\t\t__webpack_require__.d(getter, { a: getter });\n/******/ \t\t\treturn getter;\n/******/ \t\t};\n/******/ \t}();\n/******/ \t\n/******/ \t/* webpack/runtime/define property getters */\n/******/ \t!function() {\n/******/ \t\t// define getter functions for harmony exports\n/******/ \t\t__webpack_require__.d = function(exports, definition) {\n/******/ \t\t\tfor(var key in definition) {\n/******/ \t\t\t\tif(__webpack_require__.o(definition, key) && !__webpack_require__.o(exports, key)) {\n/******/ \t\t\t\t\tObject.defineProperty(exports, key, { enumerable: true, get: definition[key] });\n/******/ \t\t\t\t}\n/******/ \t\t\t}\n/******/ \t\t};\n/******/ \t}();\n/******/ \t\n/******/ \t/* webpack/runtime/hasOwnProperty shorthand */\n/******/ \t!function() {\n/******/ \t\t__webpack_require__.o = function(obj, prop) { return Object.prototype.hasOwnProperty.call(obj, prop); }\n/******/ \t}();\n/******/ \t\n/************************************************************************/\n/******/ \t// module exports must be returned from runtime so entry inlining is disabled\n/******/ \t// startup\n/******/ \t// Load entry module and return exports\n/******/ \treturn __webpack_require__(686);\n/******/ })()\n.default;\n});", "/*\n * Copyright (c) 2016-2024 Martin Donath \n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy\n * of this software and associated documentation files (the \"Software\"), to\n * deal in the Software without restriction, including without limitation the\n * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or\n * sell copies of the Software, and to permit persons to whom the Software is\n * furnished to do so, subject to the following conditions:\n *\n * The above copyright notice and this permission notice shall be included in\n * all copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\n * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE\n * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\n * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING\n * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS\n * IN THE SOFTWARE.\n */\n\nimport \"focus-visible\"\n\nimport {\n EMPTY,\n NEVER,\n Observable,\n Subject,\n defer,\n delay,\n filter,\n map,\n merge,\n mergeWith,\n shareReplay,\n switchMap\n} from \"rxjs\"\n\nimport { configuration, feature } from \"./_\"\nimport {\n at,\n getActiveElement,\n getOptionalElement,\n requestJSON,\n setLocation,\n setToggle,\n watchDocument,\n watchKeyboard,\n watchLocation,\n watchLocationTarget,\n watchMedia,\n watchPrint,\n watchScript,\n watchViewport\n} from \"./browser\"\nimport {\n getComponentElement,\n getComponentElements,\n mountAnnounce,\n mountBackToTop,\n mountConsent,\n mountContent,\n mountDialog,\n mountHeader,\n mountHeaderTitle,\n mountPalette,\n mountProgress,\n mountSearch,\n mountSearchHiglight,\n mountSidebar,\n mountSource,\n mountTableOfContents,\n mountTabs,\n watchHeader,\n watchMain\n} from \"./components\"\nimport {\n SearchIndex,\n setupClipboardJS,\n setupInstantNavigation,\n setupVersionSelector\n} from \"./integrations\"\nimport {\n patchEllipsis,\n patchIndeterminate,\n patchScrollfix,\n patchScrolllock\n} from \"./patches\"\nimport \"./polyfills\"\n\n/* ----------------------------------------------------------------------------\n * Functions - @todo refactor\n * ------------------------------------------------------------------------- */\n\n/**\n * Fetch search index\n *\n * @returns Search index observable\n */\nfunction fetchSearchIndex(): Observable {\n if (location.protocol === \"file:\") {\n return watchScript(\n `${new URL(\"search/search_index.js\", config.base)}`\n )\n .pipe(\n // @ts-ignore - @todo fix typings\n map(() => __index),\n shareReplay(1)\n )\n } else {\n return requestJSON(\n new URL(\"search/search_index.json\", config.base)\n )\n }\n}\n\n/* ----------------------------------------------------------------------------\n * Application\n * ------------------------------------------------------------------------- */\n\n/* Yay, JavaScript is available */\ndocument.documentElement.classList.remove(\"no-js\")\ndocument.documentElement.classList.add(\"js\")\n\n/* Set up navigation observables and subjects */\nconst document$ = watchDocument()\nconst location$ = watchLocation()\nconst target$ = watchLocationTarget(location$)\nconst keyboard$ = watchKeyboard()\n\n/* Set up media observables */\nconst viewport$ = watchViewport()\nconst tablet$ = watchMedia(\"(min-width: 960px)\")\nconst screen$ = watchMedia(\"(min-width: 1220px)\")\nconst print$ = watchPrint()\n\n/* Retrieve search index, if search is enabled */\nconst config = configuration()\nconst index$ = document.forms.namedItem(\"search\")\n ? fetchSearchIndex()\n : NEVER\n\n/* Set up Clipboard.js integration */\nconst alert$ = new Subject()\nsetupClipboardJS({ alert$ })\n\n/* Set up progress indicator */\nconst progress$ = new Subject()\n\n/* Set up instant navigation, if enabled */\nif (feature(\"navigation.instant\"))\n setupInstantNavigation({ location$, viewport$, progress$ })\n .subscribe(document$)\n\n/* Set up version selector */\nif (config.version?.provider === \"mike\")\n setupVersionSelector({ document$ })\n\n/* Always close drawer and search on navigation */\nmerge(location$, target$)\n .pipe(\n delay(125)\n )\n .subscribe(() => {\n setToggle(\"drawer\", false)\n setToggle(\"search\", false)\n })\n\n/* Set up global keyboard handlers */\nkeyboard$\n .pipe(\n filter(({ mode }) => mode === \"global\")\n )\n .subscribe(key => {\n switch (key.type) {\n\n /* Go to previous page */\n case \"p\":\n case \",\":\n const prev = getOptionalElement(\"link[rel=prev]\")\n if (typeof prev !== \"undefined\")\n setLocation(prev)\n break\n\n /* Go to next page */\n case \"n\":\n case \".\":\n const next = getOptionalElement(\"link[rel=next]\")\n if (typeof next !== \"undefined\")\n setLocation(next)\n break\n\n /* Expand navigation, see https://bit.ly/3ZjG5io */\n case \"Enter\":\n const active = getActiveElement()\n if (active instanceof HTMLLabelElement)\n active.click()\n }\n })\n\n/* Set up patches */\npatchEllipsis({ viewport$, document$ })\npatchIndeterminate({ document$, tablet$ })\npatchScrollfix({ document$ })\npatchScrolllock({ viewport$, tablet$ })\n\n/* Set up header and main area observable */\nconst header$ = watchHeader(getComponentElement(\"header\"), { viewport$ })\nconst main$ = document$\n .pipe(\n map(() => getComponentElement(\"main\")),\n switchMap(el => watchMain(el, { viewport$, header$ })),\n shareReplay(1)\n )\n\n/* Set up control component observables */\nconst control$ = merge(\n\n /* Consent */\n ...getComponentElements(\"consent\")\n .map(el => mountConsent(el, { target$ })),\n\n /* Dialog */\n ...getComponentElements(\"dialog\")\n .map(el => mountDialog(el, { alert$ })),\n\n /* Color palette */\n ...getComponentElements(\"palette\")\n .map(el => mountPalette(el)),\n\n /* Progress bar */\n ...getComponentElements(\"progress\")\n .map(el => mountProgress(el, { progress$ })),\n\n /* Search */\n ...getComponentElements(\"search\")\n .map(el => mountSearch(el, { index$, keyboard$ })),\n\n /* Repository information */\n ...getComponentElements(\"source\")\n .map(el => mountSource(el))\n)\n\n/* Set up content component observables */\nconst content$ = defer(() => merge(\n\n /* Announcement bar */\n ...getComponentElements(\"announce\")\n .map(el => mountAnnounce(el)),\n\n /* Content */\n ...getComponentElements(\"content\")\n .map(el => mountContent(el, { viewport$, target$, print$ })),\n\n /* Search highlighting */\n ...getComponentElements(\"content\")\n .map(el => feature(\"search.highlight\")\n ? mountSearchHiglight(el, { index$, location$ })\n : EMPTY\n ),\n\n /* Header */\n ...getComponentElements(\"header\")\n .map(el => mountHeader(el, { viewport$, header$, main$ })),\n\n /* Header title */\n ...getComponentElements(\"header-title\")\n .map(el => mountHeaderTitle(el, { viewport$, header$ })),\n\n /* Sidebar */\n ...getComponentElements(\"sidebar\")\n .map(el => el.getAttribute(\"data-md-type\") === \"navigation\"\n ? at(screen$, () => mountSidebar(el, { viewport$, header$, main$ }))\n : at(tablet$, () => mountSidebar(el, { viewport$, header$, main$ }))\n ),\n\n /* Navigation tabs */\n ...getComponentElements(\"tabs\")\n .map(el => mountTabs(el, { viewport$, header$ })),\n\n /* Table of contents */\n ...getComponentElements(\"toc\")\n .map(el => mountTableOfContents(el, {\n viewport$, header$, main$, target$\n })),\n\n /* Back-to-top button */\n ...getComponentElements(\"top\")\n .map(el => mountBackToTop(el, { viewport$, header$, main$, target$ }))\n))\n\n/* Set up component observables */\nconst component$ = document$\n .pipe(\n switchMap(() => content$),\n mergeWith(control$),\n shareReplay(1)\n )\n\n/* Subscribe to all components */\ncomponent$.subscribe()\n\n/* ----------------------------------------------------------------------------\n * Exports\n * ------------------------------------------------------------------------- */\n\nwindow.document$ = document$ /* Document observable */\nwindow.location$ = location$ /* Location subject */\nwindow.target$ = target$ /* Location target observable */\nwindow.keyboard$ = keyboard$ /* Keyboard observable */\nwindow.viewport$ = viewport$ /* Viewport observable */\nwindow.tablet$ = tablet$ /* Media tablet observable */\nwindow.screen$ = screen$ /* Media screen observable */\nwindow.print$ = print$ /* Media print observable */\nwindow.alert$ = alert$ /* Alert subject */\nwindow.progress$ = progress$ /* Progress indicator subject */\nwindow.component$ = component$ /* Component observable */\n", "/******************************************************************************\nCopyright (c) Microsoft Corporation.\n\nPermission to use, copy, modify, and/or distribute this software for any\npurpose with or without fee is hereby granted.\n\nTHE SOFTWARE IS PROVIDED \"AS IS\" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH\nREGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY\nAND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,\nINDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM\nLOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR\nOTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR\nPERFORMANCE OF THIS SOFTWARE.\n***************************************************************************** */\n/* global Reflect, Promise, SuppressedError, Symbol, Iterator */\n\nvar extendStatics = function(d, b) {\n extendStatics = Object.setPrototypeOf ||\n ({ __proto__: [] } instanceof Array && function (d, b) { d.__proto__ = b; }) ||\n function (d, b) { for (var p in b) if (Object.prototype.hasOwnProperty.call(b, p)) d[p] = b[p]; };\n return extendStatics(d, b);\n};\n\nexport function __extends(d, b) {\n if (typeof b !== \"function\" && b !== null)\n throw new TypeError(\"Class extends value \" + String(b) + \" is not a constructor or null\");\n extendStatics(d, b);\n function __() { this.constructor = d; }\n d.prototype = b === null ? Object.create(b) : (__.prototype = b.prototype, new __());\n}\n\nexport var __assign = function() {\n __assign = Object.assign || function __assign(t) {\n for (var s, i = 1, n = arguments.length; i < n; i++) {\n s = arguments[i];\n for (var p in s) if (Object.prototype.hasOwnProperty.call(s, p)) t[p] = s[p];\n }\n return t;\n }\n return __assign.apply(this, arguments);\n}\n\nexport function __rest(s, e) {\n var t = {};\n for (var p in s) if (Object.prototype.hasOwnProperty.call(s, p) && e.indexOf(p) < 0)\n t[p] = s[p];\n if (s != null && typeof Object.getOwnPropertySymbols === \"function\")\n for (var i = 0, p = Object.getOwnPropertySymbols(s); i < p.length; i++) {\n if (e.indexOf(p[i]) < 0 && Object.prototype.propertyIsEnumerable.call(s, p[i]))\n t[p[i]] = s[p[i]];\n }\n return t;\n}\n\nexport function __decorate(decorators, target, key, desc) {\n var c = arguments.length, r = c < 3 ? target : desc === null ? desc = Object.getOwnPropertyDescriptor(target, key) : desc, d;\n if (typeof Reflect === \"object\" && typeof Reflect.decorate === \"function\") r = Reflect.decorate(decorators, target, key, desc);\n else for (var i = decorators.length - 1; i >= 0; i--) if (d = decorators[i]) r = (c < 3 ? d(r) : c > 3 ? d(target, key, r) : d(target, key)) || r;\n return c > 3 && r && Object.defineProperty(target, key, r), r;\n}\n\nexport function __param(paramIndex, decorator) {\n return function (target, key) { decorator(target, key, paramIndex); }\n}\n\nexport function __esDecorate(ctor, descriptorIn, decorators, contextIn, initializers, extraInitializers) {\n function accept(f) { if (f !== void 0 && typeof f !== \"function\") throw new TypeError(\"Function expected\"); return f; }\n var kind = contextIn.kind, key = kind === \"getter\" ? \"get\" : kind === \"setter\" ? \"set\" : \"value\";\n var target = !descriptorIn && ctor ? contextIn[\"static\"] ? ctor : ctor.prototype : null;\n var descriptor = descriptorIn || (target ? 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Iterator : Object).prototype);\n return g.next = verb(0), g[\"throw\"] = verb(1), g[\"return\"] = verb(2), typeof Symbol === \"function\" && (g[Symbol.iterator] = function() { return this; }), g;\n function verb(n) { return function (v) { return step([n, v]); }; }\n function step(op) {\n if (f) throw new TypeError(\"Generator is already executing.\");\n while (g && (g = 0, op[0] && (_ = 0)), _) try {\n if (f = 1, y && (t = op[0] & 2 ? y[\"return\"] : op[0] ? y[\"throw\"] || ((t = y[\"return\"]) && t.call(y), 0) : y.next) && !(t = t.call(y, op[1])).done) return t;\n if (y = 0, t) op = [op[0] & 2, t.value];\n switch (op[0]) {\n case 0: case 1: t = op; break;\n case 4: _.label++; return { value: op[1], done: false };\n case 5: _.label++; y = op[1]; op = [0]; continue;\n case 7: op = _.ops.pop(); _.tries.pop(); continue;\n default:\n if (!(t = _.tries, t = t.length > 0 && t[t.length - 1]) && (op[0] === 6 || op[0] === 2)) { _ = 0; continue; }\n if (op[0] === 3 && (!t || (op[1] > t[0] && op[1] < t[3]))) { _.label = op[1]; break; }\n if (op[0] === 6 && _.label < t[1]) { _.label = t[1]; t = op; break; }\n if (t && _.label < t[2]) { _.label = t[2]; _.ops.push(op); break; }\n if (t[2]) _.ops.pop();\n _.tries.pop(); continue;\n }\n op = body.call(thisArg, _);\n } catch (e) { op = [6, e]; y = 0; } finally { f = t = 0; }\n if (op[0] & 5) throw op[1]; return { value: op[0] ? op[1] : void 0, done: true };\n }\n}\n\nexport var __createBinding = Object.create ? (function(o, m, k, k2) {\n if (k2 === undefined) k2 = k;\n var desc = Object.getOwnPropertyDescriptor(m, k);\n if (!desc || (\"get\" in desc ? !m.__esModule : desc.writable || desc.configurable)) {\n desc = { enumerable: true, get: function() { return m[k]; } };\n }\n Object.defineProperty(o, k2, desc);\n}) : (function(o, m, k, k2) {\n if (k2 === undefined) k2 = k;\n o[k2] = m[k];\n});\n\nexport function __exportStar(m, o) {\n for (var p in m) if (p !== \"default\" && !Object.prototype.hasOwnProperty.call(o, p)) __createBinding(o, m, p);\n}\n\nexport function __values(o) {\n var s = typeof Symbol === \"function\" && Symbol.iterator, m = s && o[s], i = 0;\n if (m) return m.call(o);\n if (o && typeof o.length === \"number\") return {\n next: function () {\n if (o && i >= o.length) o = void 0;\n return { value: o && o[i++], done: !o };\n }\n };\n throw new TypeError(s ? \"Object is not iterable.\" : \"Symbol.iterator is not defined.\");\n}\n\nexport function __read(o, n) {\n var m = typeof Symbol === \"function\" && o[Symbol.iterator];\n if (!m) return o;\n var i = m.call(o), r, ar = [], e;\n try {\n while ((n === void 0 || n-- > 0) && !(r = i.next()).done) ar.push(r.value);\n }\n catch (error) { e = { error: error }; }\n finally {\n try {\n if (r && !r.done && (m = i[\"return\"])) m.call(i);\n }\n finally { if (e) throw e.error; }\n }\n return ar;\n}\n\n/** @deprecated */\nexport function __spread() {\n for (var ar = [], i = 0; i < arguments.length; i++)\n ar = ar.concat(__read(arguments[i]));\n return ar;\n}\n\n/** @deprecated */\nexport function __spreadArrays() {\n for (var s = 0, i = 0, il = arguments.length; i < il; i++) s += arguments[i].length;\n for (var r = Array(s), k = 0, i = 0; i < il; i++)\n for (var a = arguments[i], j = 0, jl = a.length; j < jl; j++, k++)\n r[k] = a[j];\n return r;\n}\n\nexport function __spreadArray(to, from, pack) {\n if (pack || arguments.length === 2) for (var i = 0, l = from.length, ar; i < l; i++) {\n if (ar || !(i in from)) {\n if (!ar) ar = Array.prototype.slice.call(from, 0, i);\n ar[i] = from[i];\n }\n }\n return to.concat(ar || Array.prototype.slice.call(from));\n}\n\nexport function __await(v) {\n return this instanceof __await ? (this.v = v, this) : new __await(v);\n}\n\nexport function __asyncGenerator(thisArg, _arguments, generator) {\n if (!Symbol.asyncIterator) throw new TypeError(\"Symbol.asyncIterator is not defined.\");\n var g = generator.apply(thisArg, _arguments || []), i, q = [];\n return i = Object.create((typeof AsyncIterator === \"function\" ? AsyncIterator : Object).prototype), verb(\"next\"), verb(\"throw\"), verb(\"return\", awaitReturn), i[Symbol.asyncIterator] = function () { return this; }, i;\n function awaitReturn(f) { return function (v) { return Promise.resolve(v).then(f, reject); }; }\n function verb(n, f) { if (g[n]) { i[n] = function (v) { return new Promise(function (a, b) { q.push([n, v, a, b]) > 1 || resume(n, v); }); }; if (f) i[n] = f(i[n]); } }\n function resume(n, v) { try { step(g[n](v)); } catch (e) { settle(q[0][3], e); } }\n function step(r) { r.value instanceof __await ? Promise.resolve(r.value.v).then(fulfill, reject) : settle(q[0][2], r); }\n function fulfill(value) { resume(\"next\", value); }\n function reject(value) { resume(\"throw\", value); }\n function settle(f, v) { if (f(v), q.shift(), q.length) resume(q[0][0], q[0][1]); }\n}\n\nexport function __asyncDelegator(o) {\n var i, p;\n return i = {}, verb(\"next\"), verb(\"throw\", function (e) { throw e; }), verb(\"return\"), i[Symbol.iterator] = function () { return this; }, i;\n function verb(n, f) { i[n] = o[n] ? function (v) { return (p = !p) ? { value: __await(o[n](v)), done: false } : f ? f(v) : v; } : f; }\n}\n\nexport function __asyncValues(o) {\n if (!Symbol.asyncIterator) throw new TypeError(\"Symbol.asyncIterator is not defined.\");\n var m = o[Symbol.asyncIterator], i;\n return m ? m.call(o) : (o = typeof __values === \"function\" ? __values(o) : o[Symbol.iterator](), i = {}, verb(\"next\"), verb(\"throw\"), verb(\"return\"), i[Symbol.asyncIterator] = function () { return this; }, i);\n function verb(n) { i[n] = o[n] && function (v) { return new Promise(function (resolve, reject) { v = o[n](v), settle(resolve, reject, v.done, v.value); }); }; }\n function settle(resolve, reject, d, v) { Promise.resolve(v).then(function(v) { resolve({ value: v, done: d }); }, reject); }\n}\n\nexport function __makeTemplateObject(cooked, raw) {\n if (Object.defineProperty) { Object.defineProperty(cooked, \"raw\", { value: raw }); } else { cooked.raw = raw; }\n return cooked;\n};\n\nvar __setModuleDefault = Object.create ? (function(o, v) {\n Object.defineProperty(o, \"default\", { enumerable: true, value: v });\n}) : function(o, v) {\n o[\"default\"] = v;\n};\n\nexport function __importStar(mod) {\n if (mod && mod.__esModule) return mod;\n var result = {};\n if (mod != null) for (var k in mod) if (k !== \"default\" && Object.prototype.hasOwnProperty.call(mod, k)) __createBinding(result, mod, k);\n __setModuleDefault(result, mod);\n return result;\n}\n\nexport function __importDefault(mod) {\n return (mod && mod.__esModule) ? mod : { default: mod };\n}\n\nexport function __classPrivateFieldGet(receiver, state, kind, f) {\n if (kind === \"a\" && !f) throw new TypeError(\"Private accessor was defined without a getter\");\n if (typeof state === \"function\" ? receiver !== state || !f : !state.has(receiver)) throw new TypeError(\"Cannot read private member from an object whose class did not declare it\");\n return kind === \"m\" ? f : kind === \"a\" ? f.call(receiver) : f ? f.value : state.get(receiver);\n}\n\nexport function __classPrivateFieldSet(receiver, state, value, kind, f) {\n if (kind === \"m\") throw new TypeError(\"Private method is not writable\");\n if (kind === \"a\" && !f) throw new TypeError(\"Private accessor was defined without a setter\");\n if (typeof state === \"function\" ? receiver !== state || !f : !state.has(receiver)) throw new TypeError(\"Cannot write private member to an object whose class did not declare it\");\n return (kind === \"a\" ? f.call(receiver, value) : f ? f.value = value : state.set(receiver, value)), value;\n}\n\nexport function __classPrivateFieldIn(state, receiver) {\n if (receiver === null || (typeof receiver !== \"object\" && typeof receiver !== \"function\")) throw new TypeError(\"Cannot use 'in' operator on non-object\");\n return typeof state === \"function\" ? receiver === state : state.has(receiver);\n}\n\nexport function __addDisposableResource(env, value, async) {\n if (value !== null && value !== void 0) {\n if (typeof value !== \"object\" && typeof value !== \"function\") throw new TypeError(\"Object expected.\");\n var dispose, inner;\n if (async) {\n if (!Symbol.asyncDispose) throw new TypeError(\"Symbol.asyncDispose is not defined.\");\n dispose = value[Symbol.asyncDispose];\n }\n if (dispose === void 0) {\n if (!Symbol.dispose) throw new TypeError(\"Symbol.dispose is not defined.\");\n dispose = value[Symbol.dispose];\n if (async) inner = dispose;\n }\n if (typeof dispose !== \"function\") throw new TypeError(\"Object not disposable.\");\n if (inner) dispose = function() { try { inner.call(this); } catch (e) { return Promise.reject(e); } };\n env.stack.push({ value: value, dispose: dispose, async: async });\n }\n else if (async) {\n env.stack.push({ async: true });\n }\n return value;\n}\n\nvar _SuppressedError = typeof SuppressedError === \"function\" ? SuppressedError : function (error, suppressed, message) {\n var e = new Error(message);\n return e.name = \"SuppressedError\", e.error = error, e.suppressed = suppressed, e;\n};\n\nexport function __disposeResources(env) {\n function fail(e) {\n env.error = env.hasError ? new _SuppressedError(e, env.error, \"An error was suppressed during disposal.\") : e;\n env.hasError = true;\n }\n var r, s = 0;\n function next() {\n while (r = env.stack.pop()) {\n try {\n if (!r.async && s === 1) return s = 0, env.stack.push(r), Promise.resolve().then(next);\n if (r.dispose) {\n var result = r.dispose.call(r.value);\n if (r.async) return s |= 2, Promise.resolve(result).then(next, function(e) { fail(e); return next(); });\n }\n else s |= 1;\n }\n catch (e) {\n fail(e);\n }\n }\n if (s === 1) return env.hasError ? Promise.reject(env.error) : Promise.resolve();\n if (env.hasError) throw env.error;\n }\n return next();\n}\n\nexport default {\n __extends,\n __assign,\n __rest,\n __decorate,\n __param,\n __metadata,\n __awaiter,\n __generator,\n __createBinding,\n __exportStar,\n __values,\n __read,\n __spread,\n __spreadArrays,\n __spreadArray,\n __await,\n __asyncGenerator,\n __asyncDelegator,\n __asyncValues,\n __makeTemplateObject,\n __importStar,\n __importDefault,\n __classPrivateFieldGet,\n __classPrivateFieldSet,\n __classPrivateFieldIn,\n __addDisposableResource,\n __disposeResources,\n};\n", "/**\n * Returns true if the object is a function.\n * @param value The value to check\n */\nexport function isFunction(value: any): value is (...args: any[]) => any {\n return typeof value === 'function';\n}\n", "/**\n * Used to create Error subclasses until the community moves away from ES5.\n *\n * This is because compiling from TypeScript down to ES5 has issues with subclassing Errors\n * as well as other built-in types: https://github.com/Microsoft/TypeScript/issues/12123\n *\n * @param createImpl A factory function to create the actual constructor implementation. The returned\n * function should be a named function that calls `_super` internally.\n */\nexport function createErrorClass(createImpl: (_super: any) => any): T {\n const _super = (instance: any) => {\n Error.call(instance);\n instance.stack = new Error().stack;\n };\n\n const ctorFunc = createImpl(_super);\n ctorFunc.prototype = Object.create(Error.prototype);\n ctorFunc.prototype.constructor = ctorFunc;\n return ctorFunc;\n}\n", "import { createErrorClass } from './createErrorClass';\n\nexport interface UnsubscriptionError extends Error {\n readonly errors: any[];\n}\n\nexport interface UnsubscriptionErrorCtor {\n /**\n * @deprecated Internal implementation detail. Do not construct error instances.\n * Cannot be tagged as internal: https://github.com/ReactiveX/rxjs/issues/6269\n */\n new (errors: any[]): UnsubscriptionError;\n}\n\n/**\n * An error thrown when one or more errors have occurred during the\n * `unsubscribe` of a {@link Subscription}.\n */\nexport const UnsubscriptionError: UnsubscriptionErrorCtor = createErrorClass(\n (_super) =>\n function UnsubscriptionErrorImpl(this: any, errors: (Error | string)[]) {\n _super(this);\n this.message = errors\n ? `${errors.length} errors occurred during unsubscription:\n${errors.map((err, i) => `${i + 1}) ${err.toString()}`).join('\\n ')}`\n : '';\n this.name = 'UnsubscriptionError';\n this.errors = errors;\n }\n);\n", "/**\n * Removes an item from an array, mutating it.\n * @param arr The array to remove the item from\n * @param item The item to remove\n */\nexport function arrRemove(arr: T[] | undefined | null, item: T) {\n if (arr) {\n const index = arr.indexOf(item);\n 0 <= index && arr.splice(index, 1);\n }\n}\n", "import { isFunction } from './util/isFunction';\nimport { UnsubscriptionError } from './util/UnsubscriptionError';\nimport { SubscriptionLike, TeardownLogic, Unsubscribable } from './types';\nimport { arrRemove } from './util/arrRemove';\n\n/**\n * Represents a disposable resource, such as the execution of an Observable. A\n * Subscription has one important method, `unsubscribe`, that takes no argument\n * and just disposes the resource held by the subscription.\n *\n * Additionally, subscriptions may be grouped together through the `add()`\n * method, which will attach a child Subscription to the current Subscription.\n * When a Subscription is unsubscribed, all its children (and its grandchildren)\n * will be unsubscribed as well.\n *\n * @class Subscription\n */\nexport class Subscription implements SubscriptionLike {\n /** @nocollapse */\n public static EMPTY = (() => {\n const empty = new Subscription();\n empty.closed = true;\n return empty;\n })();\n\n /**\n * A flag to indicate whether this Subscription has already been unsubscribed.\n */\n public closed = false;\n\n private _parentage: Subscription[] | Subscription | null = null;\n\n /**\n * The list of registered finalizers to execute upon unsubscription. Adding and removing from this\n * list occurs in the {@link #add} and {@link #remove} methods.\n */\n private _finalizers: Exclude[] | null = null;\n\n /**\n * @param initialTeardown A function executed first as part of the finalization\n * process that is kicked off when {@link #unsubscribe} is called.\n */\n constructor(private initialTeardown?: () => void) {}\n\n /**\n * Disposes the resources held by the subscription. May, for instance, cancel\n * an ongoing Observable execution or cancel any other type of work that\n * started when the Subscription was created.\n * @return {void}\n */\n unsubscribe(): void {\n let errors: any[] | undefined;\n\n if (!this.closed) {\n this.closed = true;\n\n // Remove this from it's parents.\n const { _parentage } = this;\n if (_parentage) {\n this._parentage = null;\n if (Array.isArray(_parentage)) {\n for (const parent of _parentage) {\n parent.remove(this);\n }\n } else {\n _parentage.remove(this);\n }\n }\n\n const { initialTeardown: initialFinalizer } = this;\n if (isFunction(initialFinalizer)) {\n try {\n initialFinalizer();\n } catch (e) {\n errors = e instanceof UnsubscriptionError ? e.errors : [e];\n }\n }\n\n const { _finalizers } = this;\n if (_finalizers) {\n this._finalizers = null;\n for (const finalizer of _finalizers) {\n try {\n execFinalizer(finalizer);\n } catch (err) {\n errors = errors ?? [];\n if (err instanceof UnsubscriptionError) {\n errors = [...errors, ...err.errors];\n } else {\n errors.push(err);\n }\n }\n }\n }\n\n if (errors) {\n throw new UnsubscriptionError(errors);\n }\n }\n }\n\n /**\n * Adds a finalizer to this subscription, so that finalization will be unsubscribed/called\n * when this subscription is unsubscribed. If this subscription is already {@link #closed},\n * because it has already been unsubscribed, then whatever finalizer is passed to it\n * will automatically be executed (unless the finalizer itself is also a closed subscription).\n *\n * Closed Subscriptions cannot be added as finalizers to any subscription. Adding a closed\n * subscription to a any subscription will result in no operation. (A noop).\n *\n * Adding a subscription to itself, or adding `null` or `undefined` will not perform any\n * operation at all. (A noop).\n *\n * `Subscription` instances that are added to this instance will automatically remove themselves\n * if they are unsubscribed. Functions and {@link Unsubscribable} objects that you wish to remove\n * will need to be removed manually with {@link #remove}\n *\n * @param teardown The finalization logic to add to this subscription.\n */\n add(teardown: TeardownLogic): void {\n // Only add the finalizer if it's not undefined\n // and don't add a subscription to itself.\n if (teardown && teardown !== this) {\n if (this.closed) {\n // If this subscription is already closed,\n // execute whatever finalizer is handed to it automatically.\n execFinalizer(teardown);\n } else {\n if (teardown instanceof Subscription) {\n // We don't add closed subscriptions, and we don't add the same subscription\n // twice. Subscription unsubscribe is idempotent.\n if (teardown.closed || teardown._hasParent(this)) {\n return;\n }\n teardown._addParent(this);\n }\n (this._finalizers = this._finalizers ?? []).push(teardown);\n }\n }\n }\n\n /**\n * Checks to see if a this subscription already has a particular parent.\n * This will signal that this subscription has already been added to the parent in question.\n * @param parent the parent to check for\n */\n private _hasParent(parent: Subscription) {\n const { _parentage } = this;\n return _parentage === parent || (Array.isArray(_parentage) && _parentage.includes(parent));\n }\n\n /**\n * Adds a parent to this subscription so it can be removed from the parent if it\n * unsubscribes on it's own.\n *\n * NOTE: THIS ASSUMES THAT {@link _hasParent} HAS ALREADY BEEN CHECKED.\n * @param parent The parent subscription to add\n */\n private _addParent(parent: Subscription) {\n const { _parentage } = this;\n this._parentage = Array.isArray(_parentage) ? (_parentage.push(parent), _parentage) : _parentage ? [_parentage, parent] : parent;\n }\n\n /**\n * Called on a child when it is removed via {@link #remove}.\n * @param parent The parent to remove\n */\n private _removeParent(parent: Subscription) {\n const { _parentage } = this;\n if (_parentage === parent) {\n this._parentage = null;\n } else if (Array.isArray(_parentage)) {\n arrRemove(_parentage, parent);\n }\n }\n\n /**\n * Removes a finalizer from this subscription that was previously added with the {@link #add} method.\n *\n * Note that `Subscription` instances, when unsubscribed, will automatically remove themselves\n * from every other `Subscription` they have been added to. This means that using the `remove` method\n * is not a common thing and should be used thoughtfully.\n *\n * If you add the same finalizer instance of a function or an unsubscribable object to a `Subscription` instance\n * more than once, you will need to call `remove` the same number of times to remove all instances.\n *\n * All finalizer instances are removed to free up memory upon unsubscription.\n *\n * @param teardown The finalizer to remove from this subscription\n */\n remove(teardown: Exclude): void {\n const { _finalizers } = this;\n _finalizers && arrRemove(_finalizers, teardown);\n\n if (teardown instanceof Subscription) {\n teardown._removeParent(this);\n }\n }\n}\n\nexport const EMPTY_SUBSCRIPTION = Subscription.EMPTY;\n\nexport function isSubscription(value: any): value is Subscription {\n return (\n value instanceof Subscription ||\n (value && 'closed' in value && isFunction(value.remove) && isFunction(value.add) && isFunction(value.unsubscribe))\n );\n}\n\nfunction execFinalizer(finalizer: Unsubscribable | (() => void)) {\n if (isFunction(finalizer)) {\n finalizer();\n } else {\n finalizer.unsubscribe();\n }\n}\n", "import { Subscriber } from './Subscriber';\nimport { ObservableNotification } from './types';\n\n/**\n * The {@link GlobalConfig} object for RxJS. It is used to configure things\n * like how to react on unhandled errors.\n */\nexport const config: GlobalConfig = {\n onUnhandledError: null,\n onStoppedNotification: null,\n Promise: undefined,\n useDeprecatedSynchronousErrorHandling: false,\n useDeprecatedNextContext: false,\n};\n\n/**\n * The global configuration object for RxJS, used to configure things\n * like how to react on unhandled errors. Accessible via {@link config}\n * object.\n */\nexport interface GlobalConfig {\n /**\n * A registration point for unhandled errors from RxJS. These are errors that\n * cannot were not handled by consuming code in the usual subscription path. For\n * example, if you have this configured, and you subscribe to an observable without\n * providing an error handler, errors from that subscription will end up here. This\n * will _always_ be called asynchronously on another job in the runtime. This is because\n * we do not want errors thrown in this user-configured handler to interfere with the\n * behavior of the library.\n */\n onUnhandledError: ((err: any) => void) | null;\n\n /**\n * A registration point for notifications that cannot be sent to subscribers because they\n * have completed, errored or have been explicitly unsubscribed. By default, next, complete\n * and error notifications sent to stopped subscribers are noops. However, sometimes callers\n * might want a different behavior. For example, with sources that attempt to report errors\n * to stopped subscribers, a caller can configure RxJS to throw an unhandled error instead.\n * This will _always_ be called asynchronously on another job in the runtime. This is because\n * we do not want errors thrown in this user-configured handler to interfere with the\n * behavior of the library.\n */\n onStoppedNotification: ((notification: ObservableNotification, subscriber: Subscriber) => void) | null;\n\n /**\n * The promise constructor used by default for {@link Observable#toPromise toPromise} and {@link Observable#forEach forEach}\n * methods.\n *\n * @deprecated As of version 8, RxJS will no longer support this sort of injection of a\n * Promise constructor. If you need a Promise implementation other than native promises,\n * please polyfill/patch Promise as you see appropriate. Will be removed in v8.\n */\n Promise?: PromiseConstructorLike;\n\n /**\n * If true, turns on synchronous error rethrowing, which is a deprecated behavior\n * in v6 and higher. This behavior enables bad patterns like wrapping a subscribe\n * call in a try/catch block. It also enables producer interference, a nasty bug\n * where a multicast can be broken for all observers by a downstream consumer with\n * an unhandled error. DO NOT USE THIS FLAG UNLESS IT'S NEEDED TO BUY TIME\n * FOR MIGRATION REASONS.\n *\n * @deprecated As of version 8, RxJS will no longer support synchronous throwing\n * of unhandled errors. All errors will be thrown on a separate call stack to prevent bad\n * behaviors described above. Will be removed in v8.\n */\n useDeprecatedSynchronousErrorHandling: boolean;\n\n /**\n * If true, enables an as-of-yet undocumented feature from v5: The ability to access\n * `unsubscribe()` via `this` context in `next` functions created in observers passed\n * to `subscribe`.\n *\n * This is being removed because the performance was severely problematic, and it could also cause\n * issues when types other than POJOs are passed to subscribe as subscribers, as they will likely have\n * their `this` context overwritten.\n *\n * @deprecated As of version 8, RxJS will no longer support altering the\n * context of next functions provided as part of an observer to Subscribe. Instead,\n * you will have access to a subscription or a signal or token that will allow you to do things like\n * unsubscribe and test closed status. Will be removed in v8.\n */\n useDeprecatedNextContext: boolean;\n}\n", "import type { TimerHandle } from './timerHandle';\ntype SetTimeoutFunction = (handler: () => void, timeout?: number, ...args: any[]) => TimerHandle;\ntype ClearTimeoutFunction = (handle: TimerHandle) => void;\n\ninterface TimeoutProvider {\n setTimeout: SetTimeoutFunction;\n clearTimeout: ClearTimeoutFunction;\n delegate:\n | {\n setTimeout: SetTimeoutFunction;\n clearTimeout: ClearTimeoutFunction;\n }\n | undefined;\n}\n\nexport const timeoutProvider: TimeoutProvider = {\n // When accessing the delegate, use the variable rather than `this` so that\n // the functions can be called without being bound to the provider.\n setTimeout(handler: () => void, timeout?: number, ...args) {\n const { delegate } = timeoutProvider;\n if (delegate?.setTimeout) {\n return delegate.setTimeout(handler, timeout, ...args);\n }\n return setTimeout(handler, timeout, ...args);\n },\n clearTimeout(handle) {\n const { delegate } = timeoutProvider;\n return (delegate?.clearTimeout || clearTimeout)(handle as any);\n },\n delegate: undefined,\n};\n", "import { config } from '../config';\nimport { timeoutProvider } from '../scheduler/timeoutProvider';\n\n/**\n * Handles an error on another job either with the user-configured {@link onUnhandledError},\n * or by throwing it on that new job so it can be picked up by `window.onerror`, `process.on('error')`, etc.\n *\n * This should be called whenever there is an error that is out-of-band with the subscription\n * or when an error hits a terminal boundary of the subscription and no error handler was provided.\n *\n * @param err the error to report\n */\nexport function reportUnhandledError(err: any) {\n timeoutProvider.setTimeout(() => {\n const { onUnhandledError } = config;\n if (onUnhandledError) {\n // Execute the user-configured error handler.\n onUnhandledError(err);\n } else {\n // Throw so it is picked up by the runtime's uncaught error mechanism.\n throw err;\n }\n });\n}\n", "/* tslint:disable:no-empty */\nexport function noop() { }\n", "import { CompleteNotification, NextNotification, ErrorNotification } from './types';\n\n/**\n * A completion object optimized for memory use and created to be the\n * same \"shape\" as other notifications in v8.\n * @internal\n */\nexport const COMPLETE_NOTIFICATION = (() => createNotification('C', undefined, undefined) as CompleteNotification)();\n\n/**\n * Internal use only. Creates an optimized error notification that is the same \"shape\"\n * as other notifications.\n * @internal\n */\nexport function errorNotification(error: any): ErrorNotification {\n return createNotification('E', undefined, error) as any;\n}\n\n/**\n * Internal use only. Creates an optimized next notification that is the same \"shape\"\n * as other notifications.\n * @internal\n */\nexport function nextNotification(value: T) {\n return createNotification('N', value, undefined) as NextNotification;\n}\n\n/**\n * Ensures that all notifications created internally have the same \"shape\" in v8.\n *\n * TODO: This is only exported to support a crazy legacy test in `groupBy`.\n * @internal\n */\nexport function createNotification(kind: 'N' | 'E' | 'C', value: any, error: any) {\n return {\n kind,\n value,\n error,\n };\n}\n", "import { config } from '../config';\n\nlet context: { errorThrown: boolean; error: any } | null = null;\n\n/**\n * Handles dealing with errors for super-gross mode. Creates a context, in which\n * any synchronously thrown errors will be passed to {@link captureError}. Which\n * will record the error such that it will be rethrown after the call back is complete.\n * TODO: Remove in v8\n * @param cb An immediately executed function.\n */\nexport function errorContext(cb: () => void) {\n if (config.useDeprecatedSynchronousErrorHandling) {\n const isRoot = !context;\n if (isRoot) {\n context = { errorThrown: false, error: null };\n }\n cb();\n if (isRoot) {\n const { errorThrown, error } = context!;\n context = null;\n if (errorThrown) {\n throw error;\n }\n }\n } else {\n // This is the general non-deprecated path for everyone that\n // isn't crazy enough to use super-gross mode (useDeprecatedSynchronousErrorHandling)\n cb();\n }\n}\n\n/**\n * Captures errors only in super-gross mode.\n * @param err the error to capture\n */\nexport function captureError(err: any) {\n if (config.useDeprecatedSynchronousErrorHandling && context) {\n context.errorThrown = true;\n context.error = err;\n }\n}\n", "import { isFunction } from './util/isFunction';\nimport { Observer, ObservableNotification } from './types';\nimport { isSubscription, Subscription } from './Subscription';\nimport { config } from './config';\nimport { reportUnhandledError } from './util/reportUnhandledError';\nimport { noop } from './util/noop';\nimport { nextNotification, errorNotification, COMPLETE_NOTIFICATION } from './NotificationFactories';\nimport { timeoutProvider } from './scheduler/timeoutProvider';\nimport { captureError } from './util/errorContext';\n\n/**\n * Implements the {@link Observer} interface and extends the\n * {@link Subscription} class. While the {@link Observer} is the public API for\n * consuming the values of an {@link Observable}, all Observers get converted to\n * a Subscriber, in order to provide Subscription-like capabilities such as\n * `unsubscribe`. Subscriber is a common type in RxJS, and crucial for\n * implementing operators, but it is rarely used as a public API.\n *\n * @class Subscriber\n */\nexport class Subscriber extends Subscription implements Observer {\n /**\n * A static factory for a Subscriber, given a (potentially partial) definition\n * of an Observer.\n * @param next The `next` callback of an Observer.\n * @param error The `error` callback of an\n * Observer.\n * @param complete The `complete` callback of an\n * Observer.\n * @return A Subscriber wrapping the (partially defined)\n * Observer represented by the given arguments.\n * @nocollapse\n * @deprecated Do not use. Will be removed in v8. There is no replacement for this\n * method, and there is no reason to be creating instances of `Subscriber` directly.\n * If you have a specific use case, please file an issue.\n */\n static create(next?: (x?: T) => void, error?: (e?: any) => void, complete?: () => void): Subscriber {\n return new SafeSubscriber(next, error, complete);\n }\n\n /** @deprecated Internal implementation detail, do not use directly. Will be made internal in v8. */\n protected isStopped: boolean = false;\n /** @deprecated Internal implementation detail, do not use directly. Will be made internal in v8. */\n protected destination: Subscriber | Observer; // this `any` is the escape hatch to erase extra type param (e.g. R)\n\n /**\n * @deprecated Internal implementation detail, do not use directly. Will be made internal in v8.\n * There is no reason to directly create an instance of Subscriber. This type is exported for typings reasons.\n */\n constructor(destination?: Subscriber | Observer) {\n super();\n if (destination) {\n this.destination = destination;\n // Automatically chain subscriptions together here.\n // if destination is a Subscription, then it is a Subscriber.\n if (isSubscription(destination)) {\n destination.add(this);\n }\n } else {\n this.destination = EMPTY_OBSERVER;\n }\n }\n\n /**\n * The {@link Observer} callback to receive notifications of type `next` from\n * the Observable, with a value. The Observable may call this method 0 or more\n * times.\n * @param {T} [value] The `next` value.\n * @return {void}\n */\n next(value?: T): void {\n if (this.isStopped) {\n handleStoppedNotification(nextNotification(value), this);\n } else {\n this._next(value!);\n }\n }\n\n /**\n * The {@link Observer} callback to receive notifications of type `error` from\n * the Observable, with an attached `Error`. Notifies the Observer that\n * the Observable has experienced an error condition.\n * @param {any} [err] The `error` exception.\n * @return {void}\n */\n error(err?: any): void {\n if (this.isStopped) {\n handleStoppedNotification(errorNotification(err), this);\n } else {\n this.isStopped = true;\n this._error(err);\n }\n }\n\n /**\n * The {@link Observer} callback to receive a valueless notification of type\n * `complete` from the Observable. Notifies the Observer that the Observable\n * has finished sending push-based notifications.\n * @return {void}\n */\n complete(): void {\n if (this.isStopped) {\n handleStoppedNotification(COMPLETE_NOTIFICATION, this);\n } else {\n this.isStopped = true;\n this._complete();\n }\n }\n\n unsubscribe(): void {\n if (!this.closed) {\n this.isStopped = true;\n super.unsubscribe();\n this.destination = null!;\n }\n }\n\n protected _next(value: T): void {\n this.destination.next(value);\n }\n\n protected _error(err: any): void {\n try {\n this.destination.error(err);\n } finally {\n this.unsubscribe();\n }\n }\n\n protected _complete(): void {\n try {\n this.destination.complete();\n } finally {\n this.unsubscribe();\n }\n }\n}\n\n/**\n * This bind is captured here because we want to be able to have\n * compatibility with monoid libraries that tend to use a method named\n * `bind`. In particular, a library called Monio requires this.\n */\nconst _bind = Function.prototype.bind;\n\nfunction bind any>(fn: Fn, thisArg: any): Fn {\n return _bind.call(fn, thisArg);\n}\n\n/**\n * Internal optimization only, DO NOT EXPOSE.\n * @internal\n */\nclass ConsumerObserver implements Observer {\n constructor(private partialObserver: Partial>) {}\n\n next(value: T): void {\n const { partialObserver } = this;\n if (partialObserver.next) {\n try {\n partialObserver.next(value);\n } catch (error) {\n handleUnhandledError(error);\n }\n }\n }\n\n error(err: any): void {\n const { partialObserver } = this;\n if (partialObserver.error) {\n try {\n partialObserver.error(err);\n } catch (error) {\n handleUnhandledError(error);\n }\n } else {\n handleUnhandledError(err);\n }\n }\n\n complete(): void {\n const { partialObserver } = this;\n if (partialObserver.complete) {\n try {\n partialObserver.complete();\n } catch (error) {\n handleUnhandledError(error);\n }\n }\n }\n}\n\nexport class SafeSubscriber extends Subscriber {\n constructor(\n observerOrNext?: Partial> | ((value: T) => void) | null,\n error?: ((e?: any) => void) | null,\n complete?: (() => void) | null\n ) {\n super();\n\n let partialObserver: Partial>;\n if (isFunction(observerOrNext) || !observerOrNext) {\n // The first argument is a function, not an observer. The next\n // two arguments *could* be observers, or they could be empty.\n partialObserver = {\n next: (observerOrNext ?? undefined) as (((value: T) => void) | undefined),\n error: error ?? undefined,\n complete: complete ?? undefined,\n };\n } else {\n // The first argument is a partial observer.\n let context: any;\n if (this && config.useDeprecatedNextContext) {\n // This is a deprecated path that made `this.unsubscribe()` available in\n // next handler functions passed to subscribe. This only exists behind a flag\n // now, as it is *very* slow.\n context = Object.create(observerOrNext);\n context.unsubscribe = () => this.unsubscribe();\n partialObserver = {\n next: observerOrNext.next && bind(observerOrNext.next, context),\n error: observerOrNext.error && bind(observerOrNext.error, context),\n complete: observerOrNext.complete && bind(observerOrNext.complete, context),\n };\n } else {\n // The \"normal\" path. Just use the partial observer directly.\n partialObserver = observerOrNext;\n }\n }\n\n // Wrap the partial observer to ensure it's a full observer, and\n // make sure proper error handling is accounted for.\n this.destination = new ConsumerObserver(partialObserver);\n }\n}\n\nfunction handleUnhandledError(error: any) {\n if (config.useDeprecatedSynchronousErrorHandling) {\n captureError(error);\n } else {\n // Ideal path, we report this as an unhandled error,\n // which is thrown on a new call stack.\n reportUnhandledError(error);\n }\n}\n\n/**\n * An error handler used when no error handler was supplied\n * to the SafeSubscriber -- meaning no error handler was supplied\n * do the `subscribe` call on our observable.\n * @param err The error to handle\n */\nfunction defaultErrorHandler(err: any) {\n throw err;\n}\n\n/**\n * A handler for notifications that cannot be sent to a stopped subscriber.\n * @param notification The notification being sent\n * @param subscriber The stopped subscriber\n */\nfunction handleStoppedNotification(notification: ObservableNotification, subscriber: Subscriber) {\n const { onStoppedNotification } = config;\n onStoppedNotification && timeoutProvider.setTimeout(() => onStoppedNotification(notification, subscriber));\n}\n\n/**\n * The observer used as a stub for subscriptions where the user did not\n * pass any arguments to `subscribe`. Comes with the default error handling\n * behavior.\n */\nexport const EMPTY_OBSERVER: Readonly> & { closed: true } = {\n closed: true,\n next: noop,\n error: defaultErrorHandler,\n complete: noop,\n};\n", "/**\n * Symbol.observable or a string \"@@observable\". Used for interop\n *\n * @deprecated We will no longer be exporting this symbol in upcoming versions of RxJS.\n * Instead polyfill and use Symbol.observable directly *or* use https://www.npmjs.com/package/symbol-observable\n */\nexport const observable: string | symbol = (() => (typeof Symbol === 'function' && Symbol.observable) || '@@observable')();\n", "/**\n * This function takes one parameter and just returns it. Simply put,\n * this is like `(x: T): T => x`.\n *\n * ## Examples\n *\n * This is useful in some cases when using things like `mergeMap`\n *\n * ```ts\n * import { interval, take, map, range, mergeMap, identity } from 'rxjs';\n *\n * const source$ = interval(1000).pipe(take(5));\n *\n * const result$ = source$.pipe(\n * map(i => range(i)),\n * mergeMap(identity) // same as mergeMap(x => x)\n * );\n *\n * result$.subscribe({\n * next: console.log\n * });\n * ```\n *\n * Or when you want to selectively apply an operator\n *\n * ```ts\n * import { interval, take, identity } from 'rxjs';\n *\n * const shouldLimit = () => Math.random() < 0.5;\n *\n * const source$ = interval(1000);\n *\n * const result$ = source$.pipe(shouldLimit() ? take(5) : identity);\n *\n * result$.subscribe({\n * next: console.log\n * });\n * ```\n *\n * @param x Any value that is returned by this function\n * @returns The value passed as the first parameter to this function\n */\nexport function identity(x: T): T {\n return x;\n}\n", "import { identity } from './identity';\nimport { UnaryFunction } from '../types';\n\nexport function pipe(): typeof identity;\nexport function pipe(fn1: UnaryFunction): UnaryFunction;\nexport function pipe(fn1: UnaryFunction, fn2: UnaryFunction): UnaryFunction;\nexport function pipe(fn1: UnaryFunction, fn2: UnaryFunction, fn3: UnaryFunction): UnaryFunction;\nexport function pipe(\n fn1: UnaryFunction,\n fn2: UnaryFunction,\n fn3: UnaryFunction,\n fn4: UnaryFunction\n): UnaryFunction;\nexport function pipe(\n fn1: UnaryFunction,\n fn2: UnaryFunction,\n fn3: UnaryFunction,\n fn4: UnaryFunction,\n fn5: UnaryFunction\n): UnaryFunction;\nexport function pipe(\n fn1: UnaryFunction,\n fn2: UnaryFunction,\n fn3: UnaryFunction,\n fn4: UnaryFunction,\n fn5: UnaryFunction,\n fn6: UnaryFunction\n): UnaryFunction;\nexport function pipe(\n fn1: UnaryFunction,\n fn2: UnaryFunction,\n fn3: UnaryFunction,\n fn4: UnaryFunction,\n fn5: UnaryFunction,\n fn6: UnaryFunction,\n fn7: UnaryFunction\n): UnaryFunction;\nexport function pipe(\n fn1: UnaryFunction,\n fn2: UnaryFunction,\n fn3: UnaryFunction,\n fn4: UnaryFunction,\n fn5: UnaryFunction,\n fn6: UnaryFunction,\n fn7: UnaryFunction,\n fn8: UnaryFunction\n): UnaryFunction;\nexport function pipe(\n fn1: UnaryFunction,\n fn2: UnaryFunction,\n fn3: UnaryFunction,\n fn4: UnaryFunction,\n fn5: UnaryFunction,\n fn6: UnaryFunction,\n fn7: UnaryFunction,\n fn8: UnaryFunction,\n fn9: UnaryFunction\n): UnaryFunction;\nexport function pipe(\n fn1: UnaryFunction,\n fn2: UnaryFunction,\n fn3: UnaryFunction,\n fn4: UnaryFunction,\n fn5: UnaryFunction,\n fn6: UnaryFunction,\n fn7: UnaryFunction,\n fn8: UnaryFunction,\n fn9: UnaryFunction,\n ...fns: UnaryFunction[]\n): UnaryFunction;\n\n/**\n * pipe() can be called on one or more functions, each of which can take one argument (\"UnaryFunction\")\n * and uses it to return a value.\n * It returns a function that takes one argument, passes it to the first UnaryFunction, and then\n * passes the result to the next one, passes that result to the next one, and so on. \n */\nexport function pipe(...fns: Array>): UnaryFunction {\n return pipeFromArray(fns);\n}\n\n/** @internal */\nexport function pipeFromArray(fns: Array>): UnaryFunction {\n if (fns.length === 0) {\n return identity as UnaryFunction;\n }\n\n if (fns.length === 1) {\n return fns[0];\n }\n\n return function piped(input: T): R {\n return fns.reduce((prev: any, fn: UnaryFunction) => fn(prev), input as any);\n };\n}\n", "import { Operator } from './Operator';\nimport { SafeSubscriber, Subscriber } from './Subscriber';\nimport { isSubscription, Subscription } from './Subscription';\nimport { TeardownLogic, OperatorFunction, Subscribable, Observer } from './types';\nimport { observable as Symbol_observable } from './symbol/observable';\nimport { pipeFromArray } from './util/pipe';\nimport { config } from './config';\nimport { isFunction } from './util/isFunction';\nimport { errorContext } from './util/errorContext';\n\n/**\n * A representation of any set of values over any amount of time. This is the most basic building block\n * of RxJS.\n *\n * @class Observable\n */\nexport class Observable implements Subscribable {\n /**\n * @deprecated Internal implementation detail, do not use directly. Will be made internal in v8.\n */\n source: Observable | undefined;\n\n /**\n * @deprecated Internal implementation detail, do not use directly. Will be made internal in v8.\n */\n operator: Operator | undefined;\n\n /**\n * @constructor\n * @param {Function} subscribe the function that is called when the Observable is\n * initially subscribed to. This function is given a Subscriber, to which new values\n * can be `next`ed, or an `error` method can be called to raise an error, or\n * `complete` can be called to notify of a successful completion.\n */\n constructor(subscribe?: (this: Observable, subscriber: Subscriber) => TeardownLogic) {\n if (subscribe) {\n this._subscribe = subscribe;\n }\n }\n\n // HACK: Since TypeScript inherits static properties too, we have to\n // fight against TypeScript here so Subject can have a different static create signature\n /**\n * Creates a new Observable by calling the Observable constructor\n * @owner Observable\n * @method create\n * @param {Function} subscribe? the subscriber function to be passed to the Observable constructor\n * @return {Observable} a new observable\n * @nocollapse\n * @deprecated Use `new Observable()` instead. Will be removed in v8.\n */\n static create: (...args: any[]) => any = (subscribe?: (subscriber: Subscriber) => TeardownLogic) => {\n return new Observable(subscribe);\n };\n\n /**\n * Creates a new Observable, with this Observable instance as the source, and the passed\n * operator defined as the new observable's operator.\n * @method lift\n * @param operator the operator defining the operation to take on the observable\n * @return a new observable with the Operator applied\n * @deprecated Internal implementation detail, do not use directly. Will be made internal in v8.\n * If you have implemented an operator using `lift`, it is recommended that you create an\n * operator by simply returning `new Observable()` directly. See \"Creating new operators from\n * scratch\" section here: https://rxjs.dev/guide/operators\n */\n lift(operator?: Operator): Observable {\n const observable = new Observable();\n observable.source = this;\n observable.operator = operator;\n return observable;\n }\n\n subscribe(observerOrNext?: Partial> | ((value: T) => void)): Subscription;\n /** @deprecated Instead of passing separate callback arguments, use an observer argument. Signatures taking separate callback arguments will be removed in v8. Details: https://rxjs.dev/deprecations/subscribe-arguments */\n subscribe(next?: ((value: T) => void) | null, error?: ((error: any) => void) | null, complete?: (() => void) | null): Subscription;\n /**\n * Invokes an execution of an Observable and registers Observer handlers for notifications it will emit.\n *\n * Use it when you have all these Observables, but still nothing is happening.\n *\n * `subscribe` is not a regular operator, but a method that calls Observable's internal `subscribe` function. It\n * might be for example a function that you passed to Observable's constructor, but most of the time it is\n * a library implementation, which defines what will be emitted by an Observable, and when it be will emitted. This means\n * that calling `subscribe` is actually the moment when Observable starts its work, not when it is created, as it is often\n * the thought.\n *\n * Apart from starting the execution of an Observable, this method allows you to listen for values\n * that an Observable emits, as well as for when it completes or errors. You can achieve this in two\n * of the following ways.\n *\n * The first way is creating an object that implements {@link Observer} interface. It should have methods\n * defined by that interface, but note that it should be just a regular JavaScript object, which you can create\n * yourself in any way you want (ES6 class, classic function constructor, object literal etc.). In particular, do\n * not attempt to use any RxJS implementation details to create Observers - you don't need them. Remember also\n * that your object does not have to implement all methods. If you find yourself creating a method that doesn't\n * do anything, you can simply omit it. Note however, if the `error` method is not provided and an error happens,\n * it will be thrown asynchronously. Errors thrown asynchronously cannot be caught using `try`/`catch`. Instead,\n * use the {@link onUnhandledError} configuration option or use a runtime handler (like `window.onerror` or\n * `process.on('error)`) to be notified of unhandled errors. Because of this, it's recommended that you provide\n * an `error` method to avoid missing thrown errors.\n *\n * The second way is to give up on Observer object altogether and simply provide callback functions in place of its methods.\n * This means you can provide three functions as arguments to `subscribe`, where the first function is equivalent\n * of a `next` method, the second of an `error` method and the third of a `complete` method. Just as in case of an Observer,\n * if you do not need to listen for something, you can omit a function by passing `undefined` or `null`,\n * since `subscribe` recognizes these functions by where they were placed in function call. When it comes\n * to the `error` function, as with an Observer, if not provided, errors emitted by an Observable will be thrown asynchronously.\n *\n * You can, however, subscribe with no parameters at all. This may be the case where you're not interested in terminal events\n * and you also handled emissions internally by using operators (e.g. using `tap`).\n *\n * Whichever style of calling `subscribe` you use, in both cases it returns a Subscription object.\n * This object allows you to call `unsubscribe` on it, which in turn will stop the work that an Observable does and will clean\n * up all resources that an Observable used. Note that cancelling a subscription will not call `complete` callback\n * provided to `subscribe` function, which is reserved for a regular completion signal that comes from an Observable.\n *\n * Remember that callbacks provided to `subscribe` are not guaranteed to be called asynchronously.\n * It is an Observable itself that decides when these functions will be called. For example {@link of}\n * by default emits all its values synchronously. Always check documentation for how given Observable\n * will behave when subscribed and if its default behavior can be modified with a `scheduler`.\n *\n * #### Examples\n *\n * Subscribe with an {@link guide/observer Observer}\n *\n * ```ts\n * import { of } from 'rxjs';\n *\n * const sumObserver = {\n * sum: 0,\n * next(value) {\n * console.log('Adding: ' + value);\n * this.sum = this.sum + value;\n * },\n * error() {\n * // We actually could just remove this method,\n * // since we do not really care about errors right now.\n * },\n * complete() {\n * console.log('Sum equals: ' + this.sum);\n * }\n * };\n *\n * of(1, 2, 3) // Synchronously emits 1, 2, 3 and then completes.\n * .subscribe(sumObserver);\n *\n * // Logs:\n * // 'Adding: 1'\n * // 'Adding: 2'\n * // 'Adding: 3'\n * // 'Sum equals: 6'\n * ```\n *\n * Subscribe with functions ({@link deprecations/subscribe-arguments deprecated})\n *\n * ```ts\n * import { of } from 'rxjs'\n *\n * let sum = 0;\n *\n * of(1, 2, 3).subscribe(\n * value => {\n * console.log('Adding: ' + value);\n * sum = sum + value;\n * },\n * undefined,\n * () => console.log('Sum equals: ' + sum)\n * );\n *\n * // Logs:\n * // 'Adding: 1'\n * // 'Adding: 2'\n * // 'Adding: 3'\n * // 'Sum equals: 6'\n * ```\n *\n * Cancel a subscription\n *\n * ```ts\n * import { interval } from 'rxjs';\n *\n * const subscription = interval(1000).subscribe({\n * next(num) {\n * console.log(num)\n * },\n * complete() {\n * // Will not be called, even when cancelling subscription.\n * console.log('completed!');\n * }\n * });\n *\n * setTimeout(() => {\n * subscription.unsubscribe();\n * console.log('unsubscribed!');\n * }, 2500);\n *\n * // Logs:\n * // 0 after 1s\n * // 1 after 2s\n * // 'unsubscribed!' after 2.5s\n * ```\n *\n * @param {Observer|Function} observerOrNext (optional) Either an observer with methods to be called,\n * or the first of three possible handlers, which is the handler for each value emitted from the subscribed\n * Observable.\n * @param {Function} error (optional) A handler for a terminal event resulting from an error. If no error handler is provided,\n * the error will be thrown asynchronously as unhandled.\n * @param {Function} complete (optional) A handler for a terminal event resulting from successful completion.\n * @return {Subscription} a subscription reference to the registered handlers\n * @method subscribe\n */\n subscribe(\n observerOrNext?: Partial> | ((value: T) => void) | null,\n error?: ((error: any) => void) | null,\n complete?: (() => void) | null\n ): Subscription {\n const subscriber = isSubscriber(observerOrNext) ? observerOrNext : new SafeSubscriber(observerOrNext, error, complete);\n\n errorContext(() => {\n const { operator, source } = this;\n subscriber.add(\n operator\n ? // We're dealing with a subscription in the\n // operator chain to one of our lifted operators.\n operator.call(subscriber, source)\n : source\n ? // If `source` has a value, but `operator` does not, something that\n // had intimate knowledge of our API, like our `Subject`, must have\n // set it. We're going to just call `_subscribe` directly.\n this._subscribe(subscriber)\n : // In all other cases, we're likely wrapping a user-provided initializer\n // function, so we need to catch errors and handle them appropriately.\n this._trySubscribe(subscriber)\n );\n });\n\n return subscriber;\n }\n\n /** @internal */\n protected _trySubscribe(sink: Subscriber): TeardownLogic {\n try {\n return this._subscribe(sink);\n } catch (err) {\n // We don't need to return anything in this case,\n // because it's just going to try to `add()` to a subscription\n // above.\n sink.error(err);\n }\n }\n\n /**\n * Used as a NON-CANCELLABLE means of subscribing to an observable, for use with\n * APIs that expect promises, like `async/await`. You cannot unsubscribe from this.\n *\n * **WARNING**: Only use this with observables you *know* will complete. If the source\n * observable does not complete, you will end up with a promise that is hung up, and\n * potentially all of the state of an async function hanging out in memory. To avoid\n * this situation, look into adding something like {@link timeout}, {@link take},\n * {@link takeWhile}, or {@link takeUntil} amongst others.\n *\n * #### Example\n *\n * ```ts\n * import { interval, take } from 'rxjs';\n *\n * const source$ = interval(1000).pipe(take(4));\n *\n * async function getTotal() {\n * let total = 0;\n *\n * await source$.forEach(value => {\n * total += value;\n * console.log('observable -> ' + value);\n * });\n *\n * return total;\n * }\n *\n * getTotal().then(\n * total => console.log('Total: ' + total)\n * );\n *\n * // Expected:\n * // 'observable -> 0'\n * // 'observable -> 1'\n * // 'observable -> 2'\n * // 'observable -> 3'\n * // 'Total: 6'\n * ```\n *\n * @param next a handler for each value emitted by the observable\n * @return a promise that either resolves on observable completion or\n * rejects with the handled error\n */\n forEach(next: (value: T) => void): Promise;\n\n /**\n * @param next a handler for each value emitted by the observable\n * @param promiseCtor a constructor function used to instantiate the Promise\n * @return a promise that either resolves on observable completion or\n * rejects with the handled error\n * @deprecated Passing a Promise constructor will no longer be available\n * in upcoming versions of RxJS. This is because it adds weight to the library, for very\n * little benefit. If you need this functionality, it is recommended that you either\n * polyfill Promise, or you create an adapter to convert the returned native promise\n * to whatever promise implementation you wanted. Will be removed in v8.\n */\n forEach(next: (value: T) => void, promiseCtor: PromiseConstructorLike): Promise;\n\n forEach(next: (value: T) => void, promiseCtor?: PromiseConstructorLike): Promise {\n promiseCtor = getPromiseCtor(promiseCtor);\n\n return new promiseCtor((resolve, reject) => {\n const subscriber = new SafeSubscriber({\n next: (value) => {\n try {\n next(value);\n } catch (err) {\n reject(err);\n subscriber.unsubscribe();\n }\n },\n error: reject,\n complete: resolve,\n });\n this.subscribe(subscriber);\n }) as Promise;\n }\n\n /** @internal */\n protected _subscribe(subscriber: Subscriber): TeardownLogic {\n return this.source?.subscribe(subscriber);\n }\n\n /**\n * An interop point defined by the es7-observable spec https://github.com/zenparsing/es-observable\n * @method Symbol.observable\n * @return {Observable} this instance of the observable\n */\n [Symbol_observable]() {\n return this;\n }\n\n /* tslint:disable:max-line-length */\n pipe(): Observable;\n pipe(op1: OperatorFunction): Observable;\n pipe(op1: OperatorFunction, op2: OperatorFunction): Observable;\n pipe(op1: OperatorFunction, op2: OperatorFunction, op3: OperatorFunction): Observable;\n pipe(\n op1: OperatorFunction,\n op2: OperatorFunction,\n op3: OperatorFunction,\n op4: OperatorFunction\n ): Observable;\n pipe(\n op1: OperatorFunction,\n op2: OperatorFunction,\n op3: OperatorFunction,\n op4: OperatorFunction,\n op5: OperatorFunction\n ): Observable;\n pipe(\n op1: OperatorFunction,\n op2: OperatorFunction,\n op3: OperatorFunction,\n op4: OperatorFunction,\n op5: OperatorFunction,\n op6: OperatorFunction\n ): Observable;\n pipe(\n op1: OperatorFunction,\n op2: OperatorFunction,\n op3: OperatorFunction,\n op4: OperatorFunction,\n op5: OperatorFunction,\n op6: OperatorFunction,\n op7: OperatorFunction\n ): Observable;\n pipe(\n op1: OperatorFunction,\n op2: OperatorFunction,\n op3: OperatorFunction,\n op4: OperatorFunction,\n op5: OperatorFunction,\n op6: OperatorFunction,\n op7: OperatorFunction,\n op8: OperatorFunction\n ): Observable;\n pipe(\n op1: OperatorFunction,\n op2: OperatorFunction,\n op3: OperatorFunction,\n op4: OperatorFunction,\n op5: OperatorFunction,\n op6: OperatorFunction,\n op7: OperatorFunction,\n op8: OperatorFunction,\n op9: OperatorFunction\n ): Observable;\n pipe(\n op1: OperatorFunction,\n op2: OperatorFunction,\n op3: OperatorFunction,\n op4: OperatorFunction,\n op5: OperatorFunction,\n op6: OperatorFunction,\n op7: OperatorFunction,\n op8: OperatorFunction,\n op9: OperatorFunction,\n ...operations: OperatorFunction[]\n ): Observable;\n /* tslint:enable:max-line-length */\n\n /**\n * Used to stitch together functional operators into a chain.\n * @method pipe\n * @return {Observable} the Observable result of all of the operators having\n * been called in the order they were passed in.\n *\n * ## Example\n *\n * ```ts\n * import { interval, filter, map, scan } from 'rxjs';\n *\n * interval(1000)\n * .pipe(\n * filter(x => x % 2 === 0),\n * map(x => x + x),\n * scan((acc, x) => acc + x)\n * )\n * .subscribe(x => console.log(x));\n * ```\n */\n pipe(...operations: OperatorFunction[]): Observable {\n return pipeFromArray(operations)(this);\n }\n\n /* tslint:disable:max-line-length */\n /** @deprecated Replaced with {@link firstValueFrom} and {@link lastValueFrom}. Will be removed in v8. Details: https://rxjs.dev/deprecations/to-promise */\n toPromise(): Promise;\n /** @deprecated Replaced with {@link firstValueFrom} and {@link lastValueFrom}. Will be removed in v8. Details: https://rxjs.dev/deprecations/to-promise */\n toPromise(PromiseCtor: typeof Promise): Promise;\n /** @deprecated Replaced with {@link firstValueFrom} and {@link lastValueFrom}. Will be removed in v8. Details: https://rxjs.dev/deprecations/to-promise */\n toPromise(PromiseCtor: PromiseConstructorLike): Promise;\n /* tslint:enable:max-line-length */\n\n /**\n * Subscribe to this Observable and get a Promise resolving on\n * `complete` with the last emission (if any).\n *\n * **WARNING**: Only use this with observables you *know* will complete. If the source\n * observable does not complete, you will end up with a promise that is hung up, and\n * potentially all of the state of an async function hanging out in memory. To avoid\n * this situation, look into adding something like {@link timeout}, {@link take},\n * {@link takeWhile}, or {@link takeUntil} amongst others.\n *\n * @method toPromise\n * @param [promiseCtor] a constructor function used to instantiate\n * the Promise\n * @return A Promise that resolves with the last value emit, or\n * rejects on an error. If there were no emissions, Promise\n * resolves with undefined.\n * @deprecated Replaced with {@link firstValueFrom} and {@link lastValueFrom}. Will be removed in v8. Details: https://rxjs.dev/deprecations/to-promise\n */\n toPromise(promiseCtor?: PromiseConstructorLike): Promise {\n promiseCtor = getPromiseCtor(promiseCtor);\n\n return new promiseCtor((resolve, reject) => {\n let value: T | undefined;\n this.subscribe(\n (x: T) => (value = x),\n (err: any) => reject(err),\n () => resolve(value)\n );\n }) as Promise;\n }\n}\n\n/**\n * Decides between a passed promise constructor from consuming code,\n * A default configured promise constructor, and the native promise\n * constructor and returns it. If nothing can be found, it will throw\n * an error.\n * @param promiseCtor The optional promise constructor to passed by consuming code\n */\nfunction getPromiseCtor(promiseCtor: PromiseConstructorLike | undefined) {\n return promiseCtor ?? config.Promise ?? Promise;\n}\n\nfunction isObserver(value: any): value is Observer {\n return value && isFunction(value.next) && isFunction(value.error) && isFunction(value.complete);\n}\n\nfunction isSubscriber(value: any): value is Subscriber {\n return (value && value instanceof Subscriber) || (isObserver(value) && isSubscription(value));\n}\n", "import { Observable } from '../Observable';\nimport { Subscriber } from '../Subscriber';\nimport { OperatorFunction } from '../types';\nimport { isFunction } from './isFunction';\n\n/**\n * Used to determine if an object is an Observable with a lift function.\n */\nexport function hasLift(source: any): source is { lift: InstanceType['lift'] } {\n return isFunction(source?.lift);\n}\n\n/**\n * Creates an `OperatorFunction`. Used to define operators throughout the library in a concise way.\n * @param init The logic to connect the liftedSource to the subscriber at the moment of subscription.\n */\nexport function operate(\n init: (liftedSource: Observable, subscriber: Subscriber) => (() => void) | void\n): OperatorFunction {\n return (source: Observable) => {\n if (hasLift(source)) {\n return source.lift(function (this: Subscriber, liftedSource: Observable) {\n try {\n return init(liftedSource, this);\n } catch (err) {\n this.error(err);\n }\n });\n }\n throw new TypeError('Unable to lift unknown Observable type');\n };\n}\n", "import { Subscriber } from '../Subscriber';\n\n/**\n * Creates an instance of an `OperatorSubscriber`.\n * @param destination The downstream subscriber.\n * @param onNext Handles next values, only called if this subscriber is not stopped or closed. Any\n * error that occurs in this function is caught and sent to the `error` method of this subscriber.\n * @param onError Handles errors from the subscription, any errors that occur in this handler are caught\n * and send to the `destination` error handler.\n * @param onComplete Handles completion notification from the subscription. Any errors that occur in\n * this handler are sent to the `destination` error handler.\n * @param onFinalize Additional teardown logic here. This will only be called on teardown if the\n * subscriber itself is not already closed. This is called after all other teardown logic is executed.\n */\nexport function createOperatorSubscriber(\n destination: Subscriber,\n onNext?: (value: T) => void,\n onComplete?: () => void,\n onError?: (err: any) => void,\n onFinalize?: () => void\n): Subscriber {\n return new OperatorSubscriber(destination, onNext, onComplete, onError, onFinalize);\n}\n\n/**\n * A generic helper for allowing operators to be created with a Subscriber and\n * use closures to capture necessary state from the operator function itself.\n */\nexport class OperatorSubscriber extends Subscriber {\n /**\n * Creates an instance of an `OperatorSubscriber`.\n * @param destination The downstream subscriber.\n * @param onNext Handles next values, only called if this subscriber is not stopped or closed. Any\n * error that occurs in this function is caught and sent to the `error` method of this subscriber.\n * @param onError Handles errors from the subscription, any errors that occur in this handler are caught\n * and send to the `destination` error handler.\n * @param onComplete Handles completion notification from the subscription. Any errors that occur in\n * this handler are sent to the `destination` error handler.\n * @param onFinalize Additional finalization logic here. This will only be called on finalization if the\n * subscriber itself is not already closed. This is called after all other finalization logic is executed.\n * @param shouldUnsubscribe An optional check to see if an unsubscribe call should truly unsubscribe.\n * NOTE: This currently **ONLY** exists to support the strange behavior of {@link groupBy}, where unsubscription\n * to the resulting observable does not actually disconnect from the source if there are active subscriptions\n * to any grouped observable. (DO NOT EXPOSE OR USE EXTERNALLY!!!)\n */\n constructor(\n destination: Subscriber,\n onNext?: (value: T) => void,\n onComplete?: () => void,\n onError?: (err: any) => void,\n private onFinalize?: () => void,\n private shouldUnsubscribe?: () => boolean\n ) {\n // It's important - for performance reasons - that all of this class's\n // members are initialized and that they are always initialized in the same\n // order. This will ensure that all OperatorSubscriber instances have the\n // same hidden class in V8. This, in turn, will help keep the number of\n // hidden classes involved in property accesses within the base class as\n // low as possible. If the number of hidden classes involved exceeds four,\n // the property accesses will become megamorphic and performance penalties\n // will be incurred - i.e. inline caches won't be used.\n //\n // The reasons for ensuring all instances have the same hidden class are\n // further discussed in this blog post from Benedikt Meurer:\n // https://benediktmeurer.de/2018/03/23/impact-of-polymorphism-on-component-based-frameworks-like-react/\n super(destination);\n this._next = onNext\n ? function (this: OperatorSubscriber, value: T) {\n try {\n onNext(value);\n } catch (err) {\n destination.error(err);\n }\n }\n : super._next;\n this._error = onError\n ? function (this: OperatorSubscriber, err: any) {\n try {\n onError(err);\n } catch (err) {\n // Send any errors that occur down stream.\n destination.error(err);\n } finally {\n // Ensure finalization.\n this.unsubscribe();\n }\n }\n : super._error;\n this._complete = onComplete\n ? function (this: OperatorSubscriber) {\n try {\n onComplete();\n } catch (err) {\n // Send any errors that occur down stream.\n destination.error(err);\n } finally {\n // Ensure finalization.\n this.unsubscribe();\n }\n }\n : super._complete;\n }\n\n unsubscribe() {\n if (!this.shouldUnsubscribe || this.shouldUnsubscribe()) {\n const { closed } = this;\n super.unsubscribe();\n // Execute additional teardown if we have any and we didn't already do so.\n !closed && this.onFinalize?.();\n }\n }\n}\n", "import { Subscription } from '../Subscription';\n\ninterface AnimationFrameProvider {\n schedule(callback: FrameRequestCallback): Subscription;\n requestAnimationFrame: typeof requestAnimationFrame;\n cancelAnimationFrame: typeof cancelAnimationFrame;\n delegate:\n | {\n requestAnimationFrame: typeof requestAnimationFrame;\n cancelAnimationFrame: typeof cancelAnimationFrame;\n }\n | undefined;\n}\n\nexport const animationFrameProvider: AnimationFrameProvider = {\n // When accessing the delegate, use the variable rather than `this` so that\n // the functions can be called without being bound to the provider.\n schedule(callback) {\n let request = requestAnimationFrame;\n let cancel: typeof cancelAnimationFrame | undefined = cancelAnimationFrame;\n const { delegate } = animationFrameProvider;\n if (delegate) {\n request = delegate.requestAnimationFrame;\n cancel = delegate.cancelAnimationFrame;\n }\n const handle = request((timestamp) => {\n // Clear the cancel function. The request has been fulfilled, so\n // attempting to cancel the request upon unsubscription would be\n // pointless.\n cancel = undefined;\n callback(timestamp);\n });\n return new Subscription(() => cancel?.(handle));\n },\n requestAnimationFrame(...args) {\n const { delegate } = animationFrameProvider;\n return (delegate?.requestAnimationFrame || requestAnimationFrame)(...args);\n },\n cancelAnimationFrame(...args) {\n const { delegate } = animationFrameProvider;\n return (delegate?.cancelAnimationFrame || cancelAnimationFrame)(...args);\n },\n delegate: undefined,\n};\n", "import { createErrorClass } from './createErrorClass';\n\nexport interface ObjectUnsubscribedError extends Error {}\n\nexport interface ObjectUnsubscribedErrorCtor {\n /**\n * @deprecated Internal implementation detail. Do not construct error instances.\n * Cannot be tagged as internal: https://github.com/ReactiveX/rxjs/issues/6269\n */\n new (): ObjectUnsubscribedError;\n}\n\n/**\n * An error thrown when an action is invalid because the object has been\n * unsubscribed.\n *\n * @see {@link Subject}\n * @see {@link BehaviorSubject}\n *\n * @class ObjectUnsubscribedError\n */\nexport const ObjectUnsubscribedError: ObjectUnsubscribedErrorCtor = createErrorClass(\n (_super) =>\n function ObjectUnsubscribedErrorImpl(this: any) {\n _super(this);\n this.name = 'ObjectUnsubscribedError';\n this.message = 'object unsubscribed';\n }\n);\n", "import { Operator } from './Operator';\nimport { Observable } from './Observable';\nimport { Subscriber } from './Subscriber';\nimport { Subscription, EMPTY_SUBSCRIPTION } from './Subscription';\nimport { Observer, SubscriptionLike, TeardownLogic } from './types';\nimport { ObjectUnsubscribedError } from './util/ObjectUnsubscribedError';\nimport { arrRemove } from './util/arrRemove';\nimport { errorContext } from './util/errorContext';\n\n/**\n * A Subject is a special type of Observable that allows values to be\n * multicasted to many Observers. Subjects are like EventEmitters.\n *\n * Every Subject is an Observable and an Observer. You can subscribe to a\n * Subject, and you can call next to feed values as well as error and complete.\n */\nexport class Subject extends Observable implements SubscriptionLike {\n closed = false;\n\n private currentObservers: Observer[] | null = null;\n\n /** @deprecated Internal implementation detail, do not use directly. Will be made internal in v8. */\n observers: Observer[] = [];\n /** @deprecated Internal implementation detail, do not use directly. Will be made internal in v8. */\n isStopped = false;\n /** @deprecated Internal implementation detail, do not use directly. Will be made internal in v8. */\n hasError = false;\n /** @deprecated Internal implementation detail, do not use directly. Will be made internal in v8. */\n thrownError: any = null;\n\n /**\n * Creates a \"subject\" by basically gluing an observer to an observable.\n *\n * @nocollapse\n * @deprecated Recommended you do not use. Will be removed at some point in the future. Plans for replacement still under discussion.\n */\n static create: (...args: any[]) => any = (destination: Observer, source: Observable): AnonymousSubject => {\n return new AnonymousSubject(destination, source);\n };\n\n constructor() {\n // NOTE: This must be here to obscure Observable's constructor.\n super();\n }\n\n /** @deprecated Internal implementation detail, do not use directly. Will be made internal in v8. */\n lift(operator: Operator): Observable {\n const subject = new AnonymousSubject(this, this);\n subject.operator = operator as any;\n return subject as any;\n }\n\n /** @internal */\n protected _throwIfClosed() {\n if (this.closed) {\n throw new ObjectUnsubscribedError();\n }\n }\n\n next(value: T) {\n errorContext(() => {\n this._throwIfClosed();\n if (!this.isStopped) {\n if (!this.currentObservers) {\n this.currentObservers = Array.from(this.observers);\n }\n for (const observer of this.currentObservers) {\n observer.next(value);\n }\n }\n });\n }\n\n error(err: any) {\n errorContext(() => {\n this._throwIfClosed();\n if (!this.isStopped) {\n this.hasError = this.isStopped = true;\n this.thrownError = err;\n const { observers } = this;\n while (observers.length) {\n observers.shift()!.error(err);\n }\n }\n });\n }\n\n complete() {\n errorContext(() => {\n this._throwIfClosed();\n if (!this.isStopped) {\n this.isStopped = true;\n const { observers } = this;\n while (observers.length) {\n observers.shift()!.complete();\n }\n }\n });\n }\n\n unsubscribe() {\n this.isStopped = this.closed = true;\n this.observers = this.currentObservers = null!;\n }\n\n get observed() {\n return this.observers?.length > 0;\n }\n\n /** @internal */\n protected _trySubscribe(subscriber: Subscriber): TeardownLogic {\n this._throwIfClosed();\n return super._trySubscribe(subscriber);\n }\n\n /** @internal */\n protected _subscribe(subscriber: Subscriber): Subscription {\n this._throwIfClosed();\n this._checkFinalizedStatuses(subscriber);\n return this._innerSubscribe(subscriber);\n }\n\n /** @internal */\n protected _innerSubscribe(subscriber: Subscriber) {\n const { hasError, isStopped, observers } = this;\n if (hasError || isStopped) {\n return EMPTY_SUBSCRIPTION;\n }\n this.currentObservers = null;\n observers.push(subscriber);\n return new Subscription(() => {\n this.currentObservers = null;\n arrRemove(observers, subscriber);\n });\n }\n\n /** @internal */\n protected _checkFinalizedStatuses(subscriber: Subscriber) {\n const { hasError, thrownError, isStopped } = this;\n if (hasError) {\n subscriber.error(thrownError);\n } else if (isStopped) {\n subscriber.complete();\n }\n }\n\n /**\n * Creates a new Observable with this Subject as the source. You can do this\n * to create custom Observer-side logic of the Subject and conceal it from\n * code that uses the Observable.\n * @return {Observable} Observable that the Subject casts to\n */\n asObservable(): Observable {\n const observable: any = new Observable();\n observable.source = this;\n return observable;\n }\n}\n\n/**\n * @class AnonymousSubject\n */\nexport class AnonymousSubject extends Subject {\n constructor(\n /** @deprecated Internal implementation detail, do not use directly. Will be made internal in v8. */\n public destination?: Observer,\n source?: Observable\n ) {\n super();\n this.source = source;\n }\n\n next(value: T) {\n this.destination?.next?.(value);\n }\n\n error(err: any) {\n this.destination?.error?.(err);\n }\n\n complete() {\n this.destination?.complete?.();\n }\n\n /** @internal */\n protected _subscribe(subscriber: Subscriber): Subscription {\n return this.source?.subscribe(subscriber) ?? EMPTY_SUBSCRIPTION;\n }\n}\n", "import { Subject } from './Subject';\nimport { Subscriber } from './Subscriber';\nimport { Subscription } from './Subscription';\n\n/**\n * A variant of Subject that requires an initial value and emits its current\n * value whenever it is subscribed to.\n *\n * @class BehaviorSubject\n */\nexport class BehaviorSubject extends Subject {\n constructor(private _value: T) {\n super();\n }\n\n get value(): T {\n return this.getValue();\n }\n\n /** @internal */\n protected _subscribe(subscriber: Subscriber): Subscription {\n const subscription = super._subscribe(subscriber);\n !subscription.closed && subscriber.next(this._value);\n return subscription;\n }\n\n getValue(): T {\n const { hasError, thrownError, _value } = this;\n if (hasError) {\n throw thrownError;\n }\n this._throwIfClosed();\n return _value;\n }\n\n next(value: T): void {\n super.next((this._value = value));\n }\n}\n", "import { TimestampProvider } from '../types';\n\ninterface DateTimestampProvider extends TimestampProvider {\n delegate: TimestampProvider | undefined;\n}\n\nexport const dateTimestampProvider: DateTimestampProvider = {\n now() {\n // Use the variable rather than `this` so that the function can be called\n // without being bound to the provider.\n return (dateTimestampProvider.delegate || Date).now();\n },\n delegate: undefined,\n};\n", "import { Subject } from './Subject';\nimport { TimestampProvider } from './types';\nimport { Subscriber } from './Subscriber';\nimport { Subscription } from './Subscription';\nimport { dateTimestampProvider } from './scheduler/dateTimestampProvider';\n\n/**\n * A variant of {@link Subject} that \"replays\" old values to new subscribers by emitting them when they first subscribe.\n *\n * `ReplaySubject` has an internal buffer that will store a specified number of values that it has observed. Like `Subject`,\n * `ReplaySubject` \"observes\" values by having them passed to its `next` method. When it observes a value, it will store that\n * value for a time determined by the configuration of the `ReplaySubject`, as passed to its constructor.\n *\n * When a new subscriber subscribes to the `ReplaySubject` instance, it will synchronously emit all values in its buffer in\n * a First-In-First-Out (FIFO) manner. The `ReplaySubject` will also complete, if it has observed completion; and it will\n * error if it has observed an error.\n *\n * There are two main configuration items to be concerned with:\n *\n * 1. `bufferSize` - This will determine how many items are stored in the buffer, defaults to infinite.\n * 2. `windowTime` - The amount of time to hold a value in the buffer before removing it from the buffer.\n *\n * Both configurations may exist simultaneously. So if you would like to buffer a maximum of 3 values, as long as the values\n * are less than 2 seconds old, you could do so with a `new ReplaySubject(3, 2000)`.\n *\n * ### Differences with BehaviorSubject\n *\n * `BehaviorSubject` is similar to `new ReplaySubject(1)`, with a couple of exceptions:\n *\n * 1. `BehaviorSubject` comes \"primed\" with a single value upon construction.\n * 2. `ReplaySubject` will replay values, even after observing an error, where `BehaviorSubject` will not.\n *\n * @see {@link Subject}\n * @see {@link BehaviorSubject}\n * @see {@link shareReplay}\n */\nexport class ReplaySubject extends Subject {\n private _buffer: (T | number)[] = [];\n private _infiniteTimeWindow = true;\n\n /**\n * @param bufferSize The size of the buffer to replay on subscription\n * @param windowTime The amount of time the buffered items will stay buffered\n * @param timestampProvider An object with a `now()` method that provides the current timestamp. This is used to\n * calculate the amount of time something has been buffered.\n */\n constructor(\n private _bufferSize = Infinity,\n private _windowTime = Infinity,\n private _timestampProvider: TimestampProvider = dateTimestampProvider\n ) {\n super();\n this._infiniteTimeWindow = _windowTime === Infinity;\n this._bufferSize = Math.max(1, _bufferSize);\n this._windowTime = Math.max(1, _windowTime);\n }\n\n next(value: T): void {\n const { isStopped, _buffer, _infiniteTimeWindow, _timestampProvider, _windowTime } = this;\n if (!isStopped) {\n _buffer.push(value);\n !_infiniteTimeWindow && _buffer.push(_timestampProvider.now() + _windowTime);\n }\n this._trimBuffer();\n super.next(value);\n }\n\n /** @internal */\n protected _subscribe(subscriber: Subscriber): Subscription {\n this._throwIfClosed();\n this._trimBuffer();\n\n const subscription = this._innerSubscribe(subscriber);\n\n const { _infiniteTimeWindow, _buffer } = this;\n // We use a copy here, so reentrant code does not mutate our array while we're\n // emitting it to a new subscriber.\n const copy = _buffer.slice();\n for (let i = 0; i < copy.length && !subscriber.closed; i += _infiniteTimeWindow ? 1 : 2) {\n subscriber.next(copy[i] as T);\n }\n\n this._checkFinalizedStatuses(subscriber);\n\n return subscription;\n }\n\n private _trimBuffer() {\n const { _bufferSize, _timestampProvider, _buffer, _infiniteTimeWindow } = this;\n // If we don't have an infinite buffer size, and we're over the length,\n // use splice to truncate the old buffer values off. Note that we have to\n // double the size for instances where we're not using an infinite time window\n // because we're storing the values and the timestamps in the same array.\n const adjustedBufferSize = (_infiniteTimeWindow ? 1 : 2) * _bufferSize;\n _bufferSize < Infinity && adjustedBufferSize < _buffer.length && _buffer.splice(0, _buffer.length - adjustedBufferSize);\n\n // Now, if we're not in an infinite time window, remove all values where the time is\n // older than what is allowed.\n if (!_infiniteTimeWindow) {\n const now = _timestampProvider.now();\n let last = 0;\n // Search the array for the first timestamp that isn't expired and\n // truncate the buffer up to that point.\n for (let i = 1; i < _buffer.length && (_buffer[i] as number) <= now; i += 2) {\n last = i;\n }\n last && _buffer.splice(0, last + 1);\n }\n }\n}\n", "import { Scheduler } from '../Scheduler';\nimport { Subscription } from '../Subscription';\nimport { SchedulerAction } from '../types';\n\n/**\n * A unit of work to be executed in a `scheduler`. An action is typically\n * created from within a {@link SchedulerLike} and an RxJS user does not need to concern\n * themselves about creating and manipulating an Action.\n *\n * ```ts\n * class Action extends Subscription {\n * new (scheduler: Scheduler, work: (state?: T) => void);\n * schedule(state?: T, delay: number = 0): Subscription;\n * }\n * ```\n *\n * @class Action\n */\nexport class Action extends Subscription {\n constructor(scheduler: Scheduler, work: (this: SchedulerAction, state?: T) => void) {\n super();\n }\n /**\n * Schedules this action on its parent {@link SchedulerLike} for execution. May be passed\n * some context object, `state`. May happen at some point in the future,\n * according to the `delay` parameter, if specified.\n * @param {T} [state] Some contextual data that the `work` function uses when\n * called by the Scheduler.\n * @param {number} [delay] Time to wait before executing the work, where the\n * time unit is implicit and defined by the Scheduler.\n * @return {void}\n */\n public schedule(state?: T, delay: number = 0): Subscription {\n return this;\n }\n}\n", "import type { TimerHandle } from './timerHandle';\ntype SetIntervalFunction = (handler: () => void, timeout?: number, ...args: any[]) => TimerHandle;\ntype ClearIntervalFunction = (handle: TimerHandle) => void;\n\ninterface IntervalProvider {\n setInterval: SetIntervalFunction;\n clearInterval: ClearIntervalFunction;\n delegate:\n | {\n setInterval: SetIntervalFunction;\n clearInterval: ClearIntervalFunction;\n }\n | undefined;\n}\n\nexport const intervalProvider: IntervalProvider = {\n // When accessing the delegate, use the variable rather than `this` so that\n // the functions can be called without being bound to the provider.\n setInterval(handler: () => void, timeout?: number, ...args) {\n const { delegate } = intervalProvider;\n if (delegate?.setInterval) {\n return delegate.setInterval(handler, timeout, ...args);\n }\n return setInterval(handler, timeout, ...args);\n },\n clearInterval(handle) {\n const { delegate } = intervalProvider;\n return (delegate?.clearInterval || clearInterval)(handle as any);\n },\n delegate: undefined,\n};\n", "import { Action } from './Action';\nimport { SchedulerAction } from '../types';\nimport { Subscription } from '../Subscription';\nimport { AsyncScheduler } from './AsyncScheduler';\nimport { intervalProvider } from './intervalProvider';\nimport { arrRemove } from '../util/arrRemove';\nimport { TimerHandle } from './timerHandle';\n\nexport class AsyncAction extends Action {\n public id: TimerHandle | undefined;\n public state?: T;\n // @ts-ignore: Property has no initializer and is not definitely assigned\n public delay: number;\n protected pending: boolean = false;\n\n constructor(protected scheduler: AsyncScheduler, protected work: (this: SchedulerAction, state?: T) => void) {\n super(scheduler, work);\n }\n\n public schedule(state?: T, delay: number = 0): Subscription {\n if (this.closed) {\n return this;\n }\n\n // Always replace the current state with the new state.\n this.state = state;\n\n const id = this.id;\n const scheduler = this.scheduler;\n\n //\n // Important implementation note:\n //\n // Actions only execute once by default, unless rescheduled from within the\n // scheduled callback. This allows us to implement single and repeat\n // actions via the same code path, without adding API surface area, as well\n // as mimic traditional recursion but across asynchronous boundaries.\n //\n // However, JS runtimes and timers distinguish between intervals achieved by\n // serial `setTimeout` calls vs. a single `setInterval` call. An interval of\n // serial `setTimeout` calls can be individually delayed, which delays\n // scheduling the next `setTimeout`, and so on. `setInterval` attempts to\n // guarantee the interval callback will be invoked more precisely to the\n // interval period, regardless of load.\n //\n // Therefore, we use `setInterval` to schedule single and repeat actions.\n // If the action reschedules itself with the same delay, the interval is not\n // canceled. If the action doesn't reschedule, or reschedules with a\n // different delay, the interval will be canceled after scheduled callback\n // execution.\n //\n if (id != null) {\n this.id = this.recycleAsyncId(scheduler, id, delay);\n }\n\n // Set the pending flag indicating that this action has been scheduled, or\n // has recursively rescheduled itself.\n this.pending = true;\n\n this.delay = delay;\n // If this action has already an async Id, don't request a new one.\n this.id = this.id ?? this.requestAsyncId(scheduler, this.id, delay);\n\n return this;\n }\n\n protected requestAsyncId(scheduler: AsyncScheduler, _id?: TimerHandle, delay: number = 0): TimerHandle {\n return intervalProvider.setInterval(scheduler.flush.bind(scheduler, this), delay);\n }\n\n protected recycleAsyncId(_scheduler: AsyncScheduler, id?: TimerHandle, delay: number | null = 0): TimerHandle | undefined {\n // If this action is rescheduled with the same delay time, don't clear the interval id.\n if (delay != null && this.delay === delay && this.pending === false) {\n return id;\n }\n // Otherwise, if the action's delay time is different from the current delay,\n // or the action has been rescheduled before it's executed, clear the interval id\n if (id != null) {\n intervalProvider.clearInterval(id);\n }\n\n return undefined;\n }\n\n /**\n * Immediately executes this action and the `work` it contains.\n * @return {any}\n */\n public execute(state: T, delay: number): any {\n if (this.closed) {\n return new Error('executing a cancelled action');\n }\n\n this.pending = false;\n const error = this._execute(state, delay);\n if (error) {\n return error;\n } else if (this.pending === false && this.id != null) {\n // Dequeue if the action didn't reschedule itself. Don't call\n // unsubscribe(), because the action could reschedule later.\n // For example:\n // ```\n // scheduler.schedule(function doWork(counter) {\n // /* ... I'm a busy worker bee ... */\n // var originalAction = this;\n // /* wait 100ms before rescheduling the action */\n // setTimeout(function () {\n // originalAction.schedule(counter + 1);\n // }, 100);\n // }, 1000);\n // ```\n this.id = this.recycleAsyncId(this.scheduler, this.id, null);\n }\n }\n\n protected _execute(state: T, _delay: number): any {\n let errored: boolean = false;\n let errorValue: any;\n try {\n this.work(state);\n } catch (e) {\n errored = true;\n // HACK: Since code elsewhere is relying on the \"truthiness\" of the\n // return here, we can't have it return \"\" or 0 or false.\n // TODO: Clean this up when we refactor schedulers mid-version-8 or so.\n errorValue = e ? e : new Error('Scheduled action threw falsy error');\n }\n if (errored) {\n this.unsubscribe();\n return errorValue;\n }\n }\n\n unsubscribe() {\n if (!this.closed) {\n const { id, scheduler } = this;\n const { actions } = scheduler;\n\n this.work = this.state = this.scheduler = null!;\n this.pending = false;\n\n arrRemove(actions, this);\n if (id != null) {\n this.id = this.recycleAsyncId(scheduler, id, null);\n }\n\n this.delay = null!;\n super.unsubscribe();\n }\n }\n}\n", "import { Action } from './scheduler/Action';\nimport { Subscription } from './Subscription';\nimport { SchedulerLike, SchedulerAction } from './types';\nimport { dateTimestampProvider } from './scheduler/dateTimestampProvider';\n\n/**\n * An execution context and a data structure to order tasks and schedule their\n * execution. Provides a notion of (potentially virtual) time, through the\n * `now()` getter method.\n *\n * Each unit of work in a Scheduler is called an `Action`.\n *\n * ```ts\n * class Scheduler {\n * now(): number;\n * schedule(work, delay?, state?): Subscription;\n * }\n * ```\n *\n * @class Scheduler\n * @deprecated Scheduler is an internal implementation detail of RxJS, and\n * should not be used directly. Rather, create your own class and implement\n * {@link SchedulerLike}. Will be made internal in v8.\n */\nexport class Scheduler implements SchedulerLike {\n public static now: () => number = dateTimestampProvider.now;\n\n constructor(private schedulerActionCtor: typeof Action, now: () => number = Scheduler.now) {\n this.now = now;\n }\n\n /**\n * A getter method that returns a number representing the current time\n * (at the time this function was called) according to the scheduler's own\n * internal clock.\n * @return {number} A number that represents the current time. May or may not\n * have a relation to wall-clock time. May or may not refer to a time unit\n * (e.g. milliseconds).\n */\n public now: () => number;\n\n /**\n * Schedules a function, `work`, for execution. May happen at some point in\n * the future, according to the `delay` parameter, if specified. May be passed\n * some context object, `state`, which will be passed to the `work` function.\n *\n * The given arguments will be processed an stored as an Action object in a\n * queue of actions.\n *\n * @param {function(state: ?T): ?Subscription} work A function representing a\n * task, or some unit of work to be executed by the Scheduler.\n * @param {number} [delay] Time to wait before executing the work, where the\n * time unit is implicit and defined by the Scheduler itself.\n * @param {T} [state] Some contextual data that the `work` function uses when\n * called by the Scheduler.\n * @return {Subscription} A subscription in order to be able to unsubscribe\n * the scheduled work.\n */\n public schedule(work: (this: SchedulerAction, state?: T) => void, delay: number = 0, state?: T): Subscription {\n return new this.schedulerActionCtor(this, work).schedule(state, delay);\n }\n}\n", "import { Scheduler } from '../Scheduler';\nimport { Action } from './Action';\nimport { AsyncAction } from './AsyncAction';\nimport { TimerHandle } from './timerHandle';\n\nexport class AsyncScheduler extends Scheduler {\n public actions: Array> = [];\n /**\n * A flag to indicate whether the Scheduler is currently executing a batch of\n * queued actions.\n * @type {boolean}\n * @internal\n */\n public _active: boolean = false;\n /**\n * An internal ID used to track the latest asynchronous task such as those\n * coming from `setTimeout`, `setInterval`, `requestAnimationFrame`, and\n * others.\n * @type {any}\n * @internal\n */\n public _scheduled: TimerHandle | undefined;\n\n constructor(SchedulerAction: typeof Action, now: () => number = Scheduler.now) {\n super(SchedulerAction, now);\n }\n\n public flush(action: AsyncAction): void {\n const { actions } = this;\n\n if (this._active) {\n actions.push(action);\n return;\n }\n\n let error: any;\n this._active = true;\n\n do {\n if ((error = action.execute(action.state, action.delay))) {\n break;\n }\n } while ((action = actions.shift()!)); // exhaust the scheduler queue\n\n this._active = false;\n\n if (error) {\n while ((action = actions.shift()!)) {\n action.unsubscribe();\n }\n throw error;\n }\n }\n}\n", "import { AsyncAction } from './AsyncAction';\nimport { AsyncScheduler } from './AsyncScheduler';\n\n/**\n *\n * Async Scheduler\n *\n * Schedule task as if you used setTimeout(task, duration)\n *\n * `async` scheduler schedules tasks asynchronously, by putting them on the JavaScript\n * event loop queue. It is best used to delay tasks in time or to schedule tasks repeating\n * in intervals.\n *\n * If you just want to \"defer\" task, that is to perform it right after currently\n * executing synchronous code ends (commonly achieved by `setTimeout(deferredTask, 0)`),\n * better choice will be the {@link asapScheduler} scheduler.\n *\n * ## Examples\n * Use async scheduler to delay task\n * ```ts\n * import { asyncScheduler } from 'rxjs';\n *\n * const task = () => console.log('it works!');\n *\n * asyncScheduler.schedule(task, 2000);\n *\n * // After 2 seconds logs:\n * // \"it works!\"\n * ```\n *\n * Use async scheduler to repeat task in intervals\n * ```ts\n * import { asyncScheduler } from 'rxjs';\n *\n * function task(state) {\n * console.log(state);\n * this.schedule(state + 1, 1000); // `this` references currently executing Action,\n * // which we reschedule with new state and delay\n * }\n *\n * asyncScheduler.schedule(task, 3000, 0);\n *\n * // Logs:\n * // 0 after 3s\n * // 1 after 4s\n * // 2 after 5s\n * // 3 after 6s\n * ```\n */\n\nexport const asyncScheduler = new AsyncScheduler(AsyncAction);\n\n/**\n * @deprecated Renamed to {@link asyncScheduler}. Will be removed in v8.\n */\nexport const async = asyncScheduler;\n", "import { AsyncAction } from './AsyncAction';\nimport { Subscription } from '../Subscription';\nimport { QueueScheduler } from './QueueScheduler';\nimport { SchedulerAction } from '../types';\nimport { TimerHandle } from './timerHandle';\n\nexport class QueueAction extends AsyncAction {\n constructor(protected scheduler: QueueScheduler, protected work: (this: SchedulerAction, state?: T) => void) {\n super(scheduler, work);\n }\n\n public schedule(state?: T, delay: number = 0): Subscription {\n if (delay > 0) {\n return super.schedule(state, delay);\n }\n this.delay = delay;\n this.state = state;\n this.scheduler.flush(this);\n return this;\n }\n\n public execute(state: T, delay: number): any {\n return delay > 0 || this.closed ? super.execute(state, delay) : this._execute(state, delay);\n }\n\n protected requestAsyncId(scheduler: QueueScheduler, id?: TimerHandle, delay: number = 0): TimerHandle {\n // If delay exists and is greater than 0, or if the delay is null (the\n // action wasn't rescheduled) but was originally scheduled as an async\n // action, then recycle as an async action.\n\n if ((delay != null && delay > 0) || (delay == null && this.delay > 0)) {\n return super.requestAsyncId(scheduler, id, delay);\n }\n\n // Otherwise flush the scheduler starting with this action.\n scheduler.flush(this);\n\n // HACK: In the past, this was returning `void`. However, `void` isn't a valid\n // `TimerHandle`, and generally the return value here isn't really used. So the\n // compromise is to return `0` which is both \"falsy\" and a valid `TimerHandle`,\n // as opposed to refactoring every other instanceo of `requestAsyncId`.\n return 0;\n }\n}\n", "import { AsyncScheduler } from './AsyncScheduler';\n\nexport class QueueScheduler extends AsyncScheduler {\n}\n", "import { QueueAction } from './QueueAction';\nimport { QueueScheduler } from './QueueScheduler';\n\n/**\n *\n * Queue Scheduler\n *\n * Put every next task on a queue, instead of executing it immediately\n *\n * `queue` scheduler, when used with delay, behaves the same as {@link asyncScheduler} scheduler.\n *\n * When used without delay, it schedules given task synchronously - executes it right when\n * it is scheduled. However when called recursively, that is when inside the scheduled task,\n * another task is scheduled with queue scheduler, instead of executing immediately as well,\n * that task will be put on a queue and wait for current one to finish.\n *\n * This means that when you execute task with `queue` scheduler, you are sure it will end\n * before any other task scheduled with that scheduler will start.\n *\n * ## Examples\n * Schedule recursively first, then do something\n * ```ts\n * import { queueScheduler } from 'rxjs';\n *\n * queueScheduler.schedule(() => {\n * queueScheduler.schedule(() => console.log('second')); // will not happen now, but will be put on a queue\n *\n * console.log('first');\n * });\n *\n * // Logs:\n * // \"first\"\n * // \"second\"\n * ```\n *\n * Reschedule itself recursively\n * ```ts\n * import { queueScheduler } from 'rxjs';\n *\n * queueScheduler.schedule(function(state) {\n * if (state !== 0) {\n * console.log('before', state);\n * this.schedule(state - 1); // `this` references currently executing Action,\n * // which we reschedule with new state\n * console.log('after', state);\n * }\n * }, 0, 3);\n *\n * // In scheduler that runs recursively, you would expect:\n * // \"before\", 3\n * // \"before\", 2\n * // \"before\", 1\n * // \"after\", 1\n * // \"after\", 2\n * // \"after\", 3\n *\n * // But with queue it logs:\n * // \"before\", 3\n * // \"after\", 3\n * // \"before\", 2\n * // \"after\", 2\n * // \"before\", 1\n * // \"after\", 1\n * ```\n */\n\nexport const queueScheduler = new QueueScheduler(QueueAction);\n\n/**\n * @deprecated Renamed to {@link queueScheduler}. Will be removed in v8.\n */\nexport const queue = queueScheduler;\n", "import { AsyncAction } from './AsyncAction';\nimport { AnimationFrameScheduler } from './AnimationFrameScheduler';\nimport { SchedulerAction } from '../types';\nimport { animationFrameProvider } from './animationFrameProvider';\nimport { TimerHandle } from './timerHandle';\n\nexport class AnimationFrameAction extends AsyncAction {\n constructor(protected scheduler: AnimationFrameScheduler, protected work: (this: SchedulerAction, state?: T) => void) {\n super(scheduler, work);\n }\n\n protected requestAsyncId(scheduler: AnimationFrameScheduler, id?: TimerHandle, delay: number = 0): TimerHandle {\n // If delay is greater than 0, request as an async action.\n if (delay !== null && delay > 0) {\n return super.requestAsyncId(scheduler, id, delay);\n }\n // Push the action to the end of the scheduler queue.\n scheduler.actions.push(this);\n // If an animation frame has already been requested, don't request another\n // one. If an animation frame hasn't been requested yet, request one. Return\n // the current animation frame request id.\n return scheduler._scheduled || (scheduler._scheduled = animationFrameProvider.requestAnimationFrame(() => scheduler.flush(undefined)));\n }\n\n protected recycleAsyncId(scheduler: AnimationFrameScheduler, id?: TimerHandle, delay: number = 0): TimerHandle | undefined {\n // If delay exists and is greater than 0, or if the delay is null (the\n // action wasn't rescheduled) but was originally scheduled as an async\n // action, then recycle as an async action.\n if (delay != null ? delay > 0 : this.delay > 0) {\n return super.recycleAsyncId(scheduler, id, delay);\n }\n // If the scheduler queue has no remaining actions with the same async id,\n // cancel the requested animation frame and set the scheduled flag to\n // undefined so the next AnimationFrameAction will request its own.\n const { actions } = scheduler;\n if (id != null && actions[actions.length - 1]?.id !== id) {\n animationFrameProvider.cancelAnimationFrame(id as number);\n scheduler._scheduled = undefined;\n }\n // Return undefined so the action knows to request a new async id if it's rescheduled.\n return undefined;\n }\n}\n", "import { AsyncAction } from './AsyncAction';\nimport { AsyncScheduler } from './AsyncScheduler';\n\nexport class AnimationFrameScheduler extends AsyncScheduler {\n public flush(action?: AsyncAction): void {\n this._active = true;\n // The async id that effects a call to flush is stored in _scheduled.\n // Before executing an action, it's necessary to check the action's async\n // id to determine whether it's supposed to be executed in the current\n // flush.\n // Previous implementations of this method used a count to determine this,\n // but that was unsound, as actions that are unsubscribed - i.e. cancelled -\n // are removed from the actions array and that can shift actions that are\n // scheduled to be executed in a subsequent flush into positions at which\n // they are executed within the current flush.\n const flushId = this._scheduled;\n this._scheduled = undefined;\n\n const { actions } = this;\n let error: any;\n action = action || actions.shift()!;\n\n do {\n if ((error = action.execute(action.state, action.delay))) {\n break;\n }\n } while ((action = actions[0]) && action.id === flushId && actions.shift());\n\n this._active = false;\n\n if (error) {\n while ((action = actions[0]) && action.id === flushId && actions.shift()) {\n action.unsubscribe();\n }\n throw error;\n }\n }\n}\n", "import { AnimationFrameAction } from './AnimationFrameAction';\nimport { AnimationFrameScheduler } from './AnimationFrameScheduler';\n\n/**\n *\n * Animation Frame Scheduler\n *\n * Perform task when `window.requestAnimationFrame` would fire\n *\n * When `animationFrame` scheduler is used with delay, it will fall back to {@link asyncScheduler} scheduler\n * behaviour.\n *\n * Without delay, `animationFrame` scheduler can be used to create smooth browser animations.\n * It makes sure scheduled task will happen just before next browser content repaint,\n * thus performing animations as efficiently as possible.\n *\n * ## Example\n * Schedule div height animation\n * ```ts\n * // html:
\n * import { animationFrameScheduler } from 'rxjs';\n *\n * const div = document.querySelector('div');\n *\n * animationFrameScheduler.schedule(function(height) {\n * div.style.height = height + \"px\";\n *\n * this.schedule(height + 1); // `this` references currently executing Action,\n * // which we reschedule with new state\n * }, 0, 0);\n *\n * // You will see a div element growing in height\n * ```\n */\n\nexport const animationFrameScheduler = new AnimationFrameScheduler(AnimationFrameAction);\n\n/**\n * @deprecated Renamed to {@link animationFrameScheduler}. Will be removed in v8.\n */\nexport const animationFrame = animationFrameScheduler;\n", "import { Observable } from '../Observable';\nimport { SchedulerLike } from '../types';\n\n/**\n * A simple Observable that emits no items to the Observer and immediately\n * emits a complete notification.\n *\n * Just emits 'complete', and nothing else.\n *\n * ![](empty.png)\n *\n * A simple Observable that only emits the complete notification. It can be used\n * for composing with other Observables, such as in a {@link mergeMap}.\n *\n * ## Examples\n *\n * Log complete notification\n *\n * ```ts\n * import { EMPTY } from 'rxjs';\n *\n * EMPTY.subscribe({\n * next: () => console.log('Next'),\n * complete: () => console.log('Complete!')\n * });\n *\n * // Outputs\n * // Complete!\n * ```\n *\n * Emit the number 7, then complete\n *\n * ```ts\n * import { EMPTY, startWith } from 'rxjs';\n *\n * const result = EMPTY.pipe(startWith(7));\n * result.subscribe(x => console.log(x));\n *\n * // Outputs\n * // 7\n * ```\n *\n * Map and flatten only odd numbers to the sequence `'a'`, `'b'`, `'c'`\n *\n * ```ts\n * import { interval, mergeMap, of, EMPTY } from 'rxjs';\n *\n * const interval$ = interval(1000);\n * const result = interval$.pipe(\n * mergeMap(x => x % 2 === 1 ? of('a', 'b', 'c') : EMPTY),\n * );\n * result.subscribe(x => console.log(x));\n *\n * // Results in the following to the console:\n * // x is equal to the count on the interval, e.g. (0, 1, 2, 3, ...)\n * // x will occur every 1000ms\n * // if x % 2 is equal to 1, print a, b, c (each on its own)\n * // if x % 2 is not equal to 1, nothing will be output\n * ```\n *\n * @see {@link Observable}\n * @see {@link NEVER}\n * @see {@link of}\n * @see {@link throwError}\n */\nexport const EMPTY = new Observable((subscriber) => subscriber.complete());\n\n/**\n * @param scheduler A {@link SchedulerLike} to use for scheduling\n * the emission of the complete notification.\n * @deprecated Replaced with the {@link EMPTY} constant or {@link scheduled} (e.g. `scheduled([], scheduler)`). Will be removed in v8.\n */\nexport function empty(scheduler?: SchedulerLike) {\n return scheduler ? emptyScheduled(scheduler) : EMPTY;\n}\n\nfunction emptyScheduled(scheduler: SchedulerLike) {\n return new Observable((subscriber) => scheduler.schedule(() => subscriber.complete()));\n}\n", "import { SchedulerLike } from '../types';\nimport { isFunction } from './isFunction';\n\nexport function isScheduler(value: any): value is SchedulerLike {\n return value && isFunction(value.schedule);\n}\n", "import { SchedulerLike } from '../types';\nimport { isFunction } from './isFunction';\nimport { isScheduler } from './isScheduler';\n\nfunction last(arr: T[]): T | undefined {\n return arr[arr.length - 1];\n}\n\nexport function popResultSelector(args: any[]): ((...args: unknown[]) => unknown) | undefined {\n return isFunction(last(args)) ? args.pop() : undefined;\n}\n\nexport function popScheduler(args: any[]): SchedulerLike | undefined {\n return isScheduler(last(args)) ? args.pop() : undefined;\n}\n\nexport function popNumber(args: any[], defaultValue: number): number {\n return typeof last(args) === 'number' ? args.pop()! : defaultValue;\n}\n", "export const isArrayLike = ((x: any): x is ArrayLike => x && typeof x.length === 'number' && typeof x !== 'function');", "import { isFunction } from \"./isFunction\";\n\n/**\n * Tests to see if the object is \"thennable\".\n * @param value the object to test\n */\nexport function isPromise(value: any): value is PromiseLike {\n return isFunction(value?.then);\n}\n", "import { InteropObservable } from '../types';\nimport { observable as Symbol_observable } from '../symbol/observable';\nimport { isFunction } from './isFunction';\n\n/** Identifies an input as being Observable (but not necessary an Rx Observable) */\nexport function isInteropObservable(input: any): input is InteropObservable {\n return isFunction(input[Symbol_observable]);\n}\n", "import { isFunction } from './isFunction';\n\nexport function isAsyncIterable(obj: any): obj is AsyncIterable {\n return Symbol.asyncIterator && isFunction(obj?.[Symbol.asyncIterator]);\n}\n", "/**\n * Creates the TypeError to throw if an invalid object is passed to `from` or `scheduled`.\n * @param input The object that was passed.\n */\nexport function createInvalidObservableTypeError(input: any) {\n // TODO: We should create error codes that can be looked up, so this can be less verbose.\n return new TypeError(\n `You provided ${\n input !== null && typeof input === 'object' ? 'an invalid object' : `'${input}'`\n } where a stream was expected. You can provide an Observable, Promise, ReadableStream, Array, AsyncIterable, or Iterable.`\n );\n}\n", "export function getSymbolIterator(): symbol {\n if (typeof Symbol !== 'function' || !Symbol.iterator) {\n return '@@iterator' as any;\n }\n\n return Symbol.iterator;\n}\n\nexport const iterator = getSymbolIterator();\n", "import { iterator as Symbol_iterator } from '../symbol/iterator';\nimport { isFunction } from './isFunction';\n\n/** Identifies an input as being an Iterable */\nexport function isIterable(input: any): input is Iterable {\n return isFunction(input?.[Symbol_iterator]);\n}\n", "import { ReadableStreamLike } from '../types';\nimport { isFunction } from './isFunction';\n\nexport async function* readableStreamLikeToAsyncGenerator(readableStream: ReadableStreamLike): AsyncGenerator {\n const reader = readableStream.getReader();\n try {\n while (true) {\n const { value, done } = await reader.read();\n if (done) {\n return;\n }\n yield value!;\n }\n } finally {\n reader.releaseLock();\n }\n}\n\nexport function isReadableStreamLike(obj: any): obj is ReadableStreamLike {\n // We don't want to use instanceof checks because they would return\n // false for instances from another Realm, like an + + +
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Class List
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Here are the classes, structs, unions and interfaces with brief descriptions:
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[detail level 12]
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 ▼Nenums
 CJLinkAccessFlags
 CJLinkAccessMaskFlags
 CJLinkBreakpoint
 CJLinkBreakpointImplementation
 CJLinkCore
 CJLinkCPUCapabilities
 CJLinkDataErrors
 CJLinkDeviceFamily
 CJLinkEraseErrors
 CJLinkEventTypes
 CJLinkFlags
 CJLinkFlashErrors
 CJLinkFunctions
 CJLinkGlobalErrors
 CJLinkHaltReasons
 CJLinkHost
 CJLinkInterfaces
 CJLinkReadErrors
 CJLinkResetStrategyCortexM3
 CJLinkROMTable
 CJLinkRTTCommand
 CJLinkRTTDirection
 CJLinkRTTErrors
 CJLinkStraceCommand
 CJLinkStraceEvent
 CJLinkStraceOperation
 CJLinkSWOCommands
 CJLinkSWOInterfaces
 CJLinkTraceCommand
 CJLinkTraceFormat
 CJLinkTraceSource
 CJLinkVectorCatchCortexM3
 CJLinkWriteErrors
 ▼Nerrors
 CJLinkDataException
 CJLinkEraseException
 CJLinkException
 CJLinkFlashException
 CJLinkReadException
 CJLinkRTTException
 CJLinkWriteException
 ▼Niec60730_test_base
 Ciec60730_logger
 Ciec60730TestBase
 ▼Nintegration_test_iec60730_cpu_registers
 Ciec60730_cpu_regsIEC60730 CPU Register Check Tests
 ▼Nintegration_test_iec60730_invariable_memory
 Ciec60730_imcIEC60730 Invariable Memory Plausibility Verification Tests
 ▼Nintegration_test_iec60730_irq
 Ciec60730_irqIEC60730 IRQ Plausibility Verification Tests
 ▼Nintegration_test_iec60730_program_counter
 Ciec60730_programme_counterIEC60730 CPU Program counter Tests
 ▼Nintegration_test_iec60730_system_clock
 Ciec60730_system_clockIEC60730 System Clock Verification Tests
 ▼Nintegration_test_iec60730_variable_memory
 Ciec60730_vmcIEC60730 Variable Memory Plausibility Verification Tests
 ▼Nintegration_test_iec60730_watchdog
 Ciec60730_watchdogIEC60730 Watchdog Verification Tests
 ▼Njlink
 CJLinkDll
 ▼Njlink_constants
 CJlinkArm_Speed_Info_CStruct
 CJLinkArmEmuConnectInfo_CStruct
 CJLinkJtagIdData_CStruct
 ▼Nunit_test_iec60730_get_report
 Ciec60730_unit_test_resultIEC60730 get unit test result
 ▼Nutil
 CPyTestSuites
 CTelnetDeviceUtil
 CTelnetHostUtil
 CTimeStampUtil
 Csl_iec60730_imc_params_tThis structure is used as configuration for IMC testing, that holds GPCRC Register
 Csl_iec60730_imc_test_multiple_regions_t
 Csl_iec60730_imc_test_region_tThis structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check
 Csl_iec60730_irq_cfg_t
 Csl_iec60730_irq_execution_bounds_t
 Csl_iec60730_irq_fail_t
 Csl_iec60730_library_version_t
 Csl_iec60730_safety_check_t
 Csl_iec60730_update_crc_params_t
 Csl_iec60730_vmc_test_multiple_regions_tThis structure is used as multiple test regions for VMC testing
 Csl_iec60730_vmc_test_region_tThis structure is used as configuration for VMC testing
 Csl_iec60730_watchdog_tWatchdog component configuration structure
+
+
+ +
 + + diff --git a/docs/document_api_iec60730_library/app_8h.html b/docs/document_api_iec60730_library/app_8h.html new file mode 100644 index 00000000..c639226d --- /dev/null +++ b/docs/document_api_iec60730_library/app_8h.html @@ -0,0 +1,151 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/app.h File Reference + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Functions
+
+
app.h File Reference
+
+
+ +

Top level application functions. +More...

+
#include "unit_test_common.h"
+#include "unit_test_iec60730_post.h"
+#include "unit_test_iec60730_bist.h"
+#include "unit_test_iec60730_program_counter.h"
+#include "unit_test_iec60730_safety_check.h"
+#include "unit_test_iec60730_irq.h"
+#include "unit_test_iec60730_system_clock.h"
+#include "unit_test_iec60730_watchdog.h"
+#include "unit_test_iec60730_cpu_registers.h"
+#include "unit_test_iec60730_variable_memory.h"
+#include "unit_test_iec60730_invariable_memory.h"
+
+

Go to the source code of this file.

+ + + + + + +

+Functions

void app_init (void)
 
void app_process_action (void)
 
+

Detailed Description

+

Top level application functions.

+

+License

+

Copyright 2024 Silicon Laboratories Inc. www.silabs.com

+

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

+

Function Documentation

+ +

◆ app_init()

+ +
+
+ + + + + + + + +
void app_init (void )
+
+

Initialize application.

+ +
+
+ +

◆ app_process_action()

+ +
+
+ + + + + + + + +
void app_process_action (void )
+
+

App ticking function.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/app_8h_source.html b/docs/document_api_iec60730_library/app_8h_source.html new file mode 100644 index 00000000..37410d0f --- /dev/null +++ b/docs/document_api_iec60730_library/app_8h_source.html @@ -0,0 +1,116 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/app.h Source File + + + + + + + + + +
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app.h
+
+
+Go to the documentation of this file.
1 /***************************************************************************/
+
18 #ifndef APP_H
+
19 #define APP_H
+
20 
+
21 #include "unit_test_common.h"
+
22 #include "unit_test_iec60730_post.h"
+
23 #include "unit_test_iec60730_bist.h"
+
24 #include "unit_test_iec60730_program_counter.h"
+
25 #include "unit_test_iec60730_safety_check.h"
+
26 #include "unit_test_iec60730_irq.h"
+
27 #include "unit_test_iec60730_system_clock.h"
+
28 #include "unit_test_iec60730_watchdog.h"
+
29 #include "unit_test_iec60730_cpu_registers.h"
+
30 #include "unit_test_iec60730_variable_memory.h"
+
31 #include "unit_test_iec60730_invariable_memory.h"
+
32 
+
33 /***************************************************************************/
+
36 void app_init(void);
+
37 
+
38 /***************************************************************************/
+
41 void app_process_action(void);
+
42 
+
43 #endif // APP_H
+
+
app_init
void app_init(void)
+
unit_test_iec60730_system_clock.h
Unit tests for functions in system_clock module.
+
unit_test_iec60730_variable_memory.h
Unit tests for functions in variable memory module.
+
unit_test_iec60730_invariable_memory.h
Unit tests for functions in invariable memory module.
+
unit_test_iec60730_cpu_registers.h
Unit tests for functions in cpu registers module.
+
unit_test_iec60730_post.h
Unit test function sl_iec60730_post().
+
unit_test_common.h
common unit test api
+
unit_test_iec60730_irq.h
Unit tests for functions in irq module.
+
unit_test_iec60730_bist.h
Unit test function sl_iec60730_bist().
+
app_process_action
void app_process_action(void)
+
unit_test_iec60730_safety_check.h
Unit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().
+
unit_test_iec60730_watchdog.h
Unit tests for functions in watchdog module.
+
unit_test_iec60730_program_counter.h
Unit test function sl_iec60730_program_counter_test().
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/bc_s.png b/docs/document_api_iec60730_library/bc_s.png new file mode 100644 index 00000000..224b29aa Binary files /dev/null and b/docs/document_api_iec60730_library/bc_s.png differ diff --git a/docs/document_api_iec60730_library/bdwn.png b/docs/document_api_iec60730_library/bdwn.png new file mode 100644 index 00000000..940a0b95 Binary files /dev/null and b/docs/document_api_iec60730_library/bdwn.png differ diff --git a/docs/document_api_iec60730_library/bist_flowchart.png b/docs/document_api_iec60730_library/bist_flowchart.png new file mode 100644 index 00000000..b03334a8 Binary files /dev/null and b/docs/document_api_iec60730_library/bist_flowchart.png differ diff --git a/docs/document_api_iec60730_library/bist_system_clock_frequency.png b/docs/document_api_iec60730_library/bist_system_clock_frequency.png new file mode 100644 index 00000000..15f5a7fd Binary files /dev/null and b/docs/document_api_iec60730_library/bist_system_clock_frequency.png differ diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkAccessFlags-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkAccessFlags-members.html new file mode 100644 index 00000000..a4b27823 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkAccessFlags-members.html @@ -0,0 +1,89 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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enums.JLinkAccessFlags Member List
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This is the complete list of members for enums.JLinkAccessFlags, including all inherited members.

+ + + + + + + +
PRIV (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
READ (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
SIZE_16BIT (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
SIZE_32BIT (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
SIZE_8BIT (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
WRITE (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
+ +
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+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkAccessFlags.html b/docs/document_api_iec60730_library/classenums_1_1JLinkAccessFlags.html new file mode 100644 index 00000000..fe790fae --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkAccessFlags.html @@ -0,0 +1,119 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkAccessFlags Class Reference + + + + + + + + + +
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enums.JLinkAccessFlags Class Reference
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+Static Public Attributes

+tuple READ = (0 << 0)
 
+tuple WRITE = (1 << 0)
 
+tuple PRIV = (1 << 4)
 
+tuple SIZE_8BIT = (0 << 1)
 
+tuple SIZE_16BIT = (1 << 1)
 
+tuple SIZE_32BIT = (2 << 1)
 
+

Detailed Description

+
J-Link access types for data events.
+These access types allow specifying the different types of access events
+that should be monitored.
+Attributes:
+  READ: specifies to monitor read accesses.
+  WRITE: specifies to monitor write accesses.
+  PRIVILEGED: specifies to monitor privileged accesses.
+  SIZE_8BIT: specifies to monitor an 8-bit access width.
+  SIZE_16BIT: specifies to monitor an 16-bit access width.
+  SIZE_32BIT: specifies to monitor an 32-bit access width.
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
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+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkAccessMaskFlags-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkAccessMaskFlags-members.html new file mode 100644 index 00000000..d57d089d --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkAccessMaskFlags-members.html @@ -0,0 +1,86 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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enums.JLinkAccessMaskFlags Member List
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This is the complete list of members for enums.JLinkAccessMaskFlags, including all inherited members.

+ + + + +
DIR (defined in enums.JLinkAccessMaskFlags)enums.JLinkAccessMaskFlagsstatic
PRIV (defined in enums.JLinkAccessMaskFlags)enums.JLinkAccessMaskFlagsstatic
SIZE (defined in enums.JLinkAccessMaskFlags)enums.JLinkAccessMaskFlagsstatic
+ +
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+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkAccessMaskFlags.html b/docs/document_api_iec60730_library/classenums_1_1JLinkAccessMaskFlags.html new file mode 100644 index 00000000..1a8ec102 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkAccessMaskFlags.html @@ -0,0 +1,105 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkAccessMaskFlags Class Reference + + + + + + + + + +
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enums.JLinkAccessMaskFlags Class Reference
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+Static Public Attributes

+tuple SIZE = (3 << 1)
 
+tuple DIR = (1 << 0)
 
+tuple PRIV = (1 << 4)
 
+

Detailed Description

+
J-Link access mask flags.
+Attributes:
+  SIZE: specifies to not care about the access size of the event.
+  DIR: specifies to not care about the access direction of the event.
+  PRIV: specifies to not care about the access privilege of the event.
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkBreakpoint-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkBreakpoint-members.html new file mode 100644 index 00000000..6925ac6c --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkBreakpoint-members.html @@ -0,0 +1,90 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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ANY (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
ARM (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
HW (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
SW (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
SW_FLASH (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
SW_RAM (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
THUMB (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
+ +
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+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkBreakpoint.html b/docs/document_api_iec60730_library/classenums_1_1JLinkBreakpoint.html new file mode 100644 index 00000000..81bd7273 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkBreakpoint.html @@ -0,0 +1,121 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkBreakpoint Class Reference + + + + + + + + + +
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+Static Public Attributes

+tuple SW_RAM = (1 << 4)
 
+tuple SW_FLASH = (1 << 5)
 
+tuple SW = (0x000000F0)
 
+tuple HW = (0xFFFFFF00)
 
+tuple ANY = (0xFFFFFFF0)
 
+tuple ARM = (1 << 0)
 
+tuple THUMB = (2 << 0)
 
+

Detailed Description

+
J-Link breakpoint types.
+Attributes:
+  SW_RAM: Software breakpont located in RAM.
+  SW_FLASH: Software breakpoint located in flash.
+  SW: Software breakpoint located in RAM or flash.
+  HW: Hardware breakpoint.
+  ANY: Allows specifying any time of breakpoint.
+  ARM: Breakpoint in ARM mode (only available on ARM 7/9 cores).
+  THUMB: Breakpoint in THUMB mode (only available on ARM 7/9 cores).
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
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FLASH (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
HARD (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
PENDING (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
SOFT (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
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enums.JLinkBreakpointImplementation Class Reference
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+Static Public Attributes

+tuple HARD = (1 << 0)
 
+tuple SOFT = (1 << 1)
 
+tuple PENDING = (1 << 2)
 
+tuple FLASH = (1 << 4)
 
+

Detailed Description

+
J-Link breakpoint implementation types.
+Attributes:
+  HARD: Hardware breakpoint using a breakpoint unit.
+  SOFT: Software breakpoint using a breakpoint instruction.
+  PENDING: Breakpoint has not been set yet.
+  FLASH: Breakpoint set in flash.
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkCPUCapabilities-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkCPUCapabilities-members.html new file mode 100644 index 00000000..fab04cd4 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkCPUCapabilities-members.html @@ -0,0 +1,96 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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DCC (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
GO (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
HALT (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
HSS (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
IS_HALTED (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
READ_MEMORY (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
READ_REGISTERS (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
RESET (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
RUN_STOP (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
STEP (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
TERMINAL (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
WRITE_MEMORY (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
WRITE_REGISTERS (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
+ +
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+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkCPUCapabilities.html b/docs/document_api_iec60730_library/classenums_1_1JLinkCPUCapabilities.html new file mode 100644 index 00000000..438d5f53 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkCPUCapabilities.html @@ -0,0 +1,130 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkCPUCapabilities Class Reference + + + + + + + + + +
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enums.JLinkCPUCapabilities Class Reference
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+Static Public Attributes

+tuple READ_MEMORY = (1 << 1)
 
+tuple WRITE_MEMORY = (1 << 2)
 
+tuple READ_REGISTERS = (1 << 3)
 
+tuple WRITE_REGISTERS = (1 << 4)
 
+tuple GO = (1 << 5)
 
+tuple STEP = (1 << 6)
 
+tuple HALT = (1 << 7)
 
+tuple IS_HALTED = (1 << 8)
 
+tuple RESET = (1 << 9)
 
+tuple RUN_STOP = (1 << 10)
 
+tuple TERMINAL = (1 << 11)
 
+tuple DCC = (1 << 14)
 
+tuple HSS = (1 << 15)
 
+

Detailed Description

+
Target CPU Cabilities.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkCore-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkCore-members.html new file mode 100644 index 00000000..1c05f4bf --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkCore-members.html @@ -0,0 +1,163 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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enums.JLinkCore Member List
+
+
+ +

This is the complete list of members for enums.JLinkCore, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ANY (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM11 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136J (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136J_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136JF (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1136JF_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1156 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176J (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176J_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176JF (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM1176JF_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_R3 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_R4 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_S_R3 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM7TDMI_S_R4 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM9 (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM920T (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM922T (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM926EJ_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM946E_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM966E_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM968E_S (defined in enums.JLinkCore)enums.JLinkCorestatic
ARM9TDMI_S (defined in enums.JLinkCore)enums.JLinkCorestatic
CIP51 (defined in enums.JLinkCore)enums.JLinkCorestatic
COLDFIRE (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A12 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A15 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A17 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A5 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A7 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A8 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_A9 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M0 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M1 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M3 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M3_R1P0 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M3_R1P1 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M3_R2P0 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M4 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M7 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M_V8BASEL (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_M_V8MAINL (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_R4 (defined in enums.JLinkCore)enums.JLinkCorestatic
CORTEX_R5 (defined in enums.JLinkCore)enums.JLinkCorestatic
EFM8_UNSPEC (defined in enums.JLinkCore)enums.JLinkCorestatic
MIPS (defined in enums.JLinkCore)enums.JLinkCorestatic
MIPS_M4K (defined in enums.JLinkCore)enums.JLinkCorestatic
MIPS_MICROAPTIV (defined in enums.JLinkCore)enums.JLinkCorestatic
NONE (defined in enums.JLinkCore)enums.JLinkCorestatic
POWER_PC (defined in enums.JLinkCore)enums.JLinkCorestatic
POWER_PC_N1 (defined in enums.JLinkCore)enums.JLinkCorestatic
POWER_PC_N2 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX (defined in enums.JLinkCore)enums.JLinkCorestatic
RX110 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX111 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX113 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX210 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX21A (defined in enums.JLinkCore)enums.JLinkCorestatic
RX220 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX230 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX231 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX23T (defined in enums.JLinkCore)enums.JLinkCorestatic
RX610 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX621 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX62G (defined in enums.JLinkCore)enums.JLinkCorestatic
RX62N (defined in enums.JLinkCore)enums.JLinkCorestatic
RX62T (defined in enums.JLinkCore)enums.JLinkCorestatic
RX630 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX631 (defined in enums.JLinkCore)enums.JLinkCorestatic
RX63N (defined in enums.JLinkCore)enums.JLinkCorestatic
RX63T (defined in enums.JLinkCore)enums.JLinkCorestatic
RX64M (defined in enums.JLinkCore)enums.JLinkCorestatic
RX71M (defined in enums.JLinkCore)enums.JLinkCorestatic
SIM (defined in enums.JLinkCore)enums.JLinkCorestatic
XSCALE (defined in enums.JLinkCore)enums.JLinkCorestatic
+ +
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enums.JLinkCore Class Reference
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+Static Public Attributes

+int NONE = 0x00000000
 
+int ANY = 0xFFFFFFFF
 
+int CORTEX_M1 = 0x010000FF
 
+int COLDFIRE = 0x02FFFFFF
 
+int CORTEX_M3 = 0x030000FF
 
+int CORTEX_M3_R1P0 = 0x03000010
 
+int CORTEX_M3_R1P1 = 0x03000011
 
+int CORTEX_M3_R2P0 = 0x03000020
 
+int SIM = 0x04FFFFFF
 
+int XSCALE = 0x05FFFFFF
 
+int CORTEX_M0 = 0x060000FF
 
+int CORTEX_M_V8BASEL = 0x060100FF
 
+int ARM7 = 0x07FFFFFF
 
+int ARM7TDMI = 0x070000FF
 
+int ARM7TDMI_R3 = 0x0700003F
 
+int ARM7TDMI_R4 = 0x0700004F
 
+int ARM7TDMI_S = 0x070001FF
 
+int ARM7TDMI_S_R3 = 0x0700013F
 
+int ARM7TDMI_S_R4 = 0x0700014F
 
+int CORTEX_A8 = 0x080000FF
 
+int CORTEX_A7 = 0x080800FF
 
+int CORTEX_A9 = 0x080900FF
 
+int CORTEX_A12 = 0x080A00FF
 
+int CORTEX_A15 = 0x080B00FF
 
+int CORTEX_A17 = 0x080C00FF
 
+int ARM9 = 0x09FFFFFF
 
+int ARM9TDMI_S = 0x090001FF
 
+int ARM920T = 0x092000FF
 
+int ARM922T = 0x092200FF
 
+int ARM926EJ_S = 0x092601FF
 
+int ARM946E_S = 0x094601FF
 
+int ARM966E_S = 0x096601FF
 
+int ARM968E_S = 0x096801FF
 
+int ARM11 = 0x0BFFFFFF
 
+int ARM1136 = 0x0B36FFFF
 
+int ARM1136J = 0x0B3602FF
 
+int ARM1136J_S = 0x0B3603FF
 
+int ARM1136JF = 0x0B3606FF
 
+int ARM1136JF_S = 0x0B3607FF
 
+int ARM1156 = 0x0B56FFFF
 
+int ARM1176 = 0x0B76FFFF
 
+int ARM1176J = 0x0B7602FF
 
+int ARM1176J_S = 0x0B7603FF
 
+int ARM1176JF = 0x0B7606FF
 
+int ARM1176JF_S = 0x0B7607FF
 
+int CORTEX_R4 = 0x0C0000FF
 
+int CORTEX_R5 = 0x0C0100FF
 
+int RX = 0x0DFFFFFF
 
+int RX610 = 0x0D00FFFF
 
+int RX62N = 0x0D01FFFF
 
+int RX62T = 0x0D02FFFF
 
+int RX63N = 0x0D03FFFF
 
+int RX630 = 0x0D04FFFF
 
+int RX63T = 0x0D05FFFF
 
+int RX621 = 0x0D06FFFF
 
+int RX62G = 0x0D07FFFF
 
+int RX631 = 0x0D08FFFF
 
+int RX210 = 0x0D10FFFF
 
+int RX21A = 0x0D11FFFF
 
+int RX220 = 0x0D12FFFF
 
+int RX230 = 0x0D13FFFF
 
+int RX231 = 0x0D14FFFF
 
+int RX23T = 0x0D15FFFF
 
+int RX111 = 0x0D20FFFF
 
+int RX110 = 0x0D21FFFF
 
+int RX113 = 0x0D22FFFF
 
+int RX64M = 0x0D30FFFF
 
+int RX71M = 0x0D31FFFF
 
+int CORTEX_M4 = 0x0E0000FF
 
+int CORTEX_M7 = 0x0E0100FF
 
+int CORTEX_M_V8MAINL = 0x0E0200FF
 
+int CORTEX_A5 = 0x0F0000FF
 
+int POWER_PC = 0x10FFFFFF
 
+int POWER_PC_N1 = 0x10FF00FF
 
+int POWER_PC_N2 = 0x10FF01FF
 
+int MIPS = 0x11FFFFFF
 
+int MIPS_M4K = 0x1100FFFF
 
+int MIPS_MICROAPTIV = 0x1101FFFF
 
+int EFM8_UNSPEC = 0x12FFFFFF
 
+int CIP51 = 0x1200FFFF
 
+

Detailed Description

+
Enumeration for the different CPU core identifiers.
+These are the possible cores for targets the J-Link is connected to.
+Note that these are bitfields.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkDataErrors-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkDataErrors-members.html new file mode 100644 index 00000000..c4673dfd --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkDataErrors-members.html @@ -0,0 +1,111 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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enums.JLinkDataErrors Member List
+
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+ +

This is the complete list of members for enums.JLinkDataErrors, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ERROR_INVALID_ACCESS_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_INVALID_ADDR_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_INVALID_DATA_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_ADDR_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_DATA_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_EVENTS (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_UNKNOWN (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkDataErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkDataErrors.html b/docs/document_api_iec60730_library/classenums_1_1JLinkDataErrors.html new file mode 100644 index 00000000..708bd2fa --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkDataErrors.html @@ -0,0 +1,218 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkDataErrors Class Reference + + + + + + + + + +
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+Public Member Functions | +Static Public Attributes | +List of all members
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enums.JLinkDataErrors Class Reference
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+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int ERROR_UNKNOWN = 0x80000000
 
+int ERROR_NO_MORE_EVENTS = 0x80000001
 
+int ERROR_NO_MORE_ADDR_COMP = 0x80000002
 
+int ERROR_NO_MORE_DATA_COMP = 0x80000004
 
+int ERROR_INVALID_ADDR_MASK = 0x80000020
 
+int ERROR_INVALID_DATA_MASK = 0x80000040
 
+int ERROR_INVALID_ACCESS_MASK = 0x80000080
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated when setting a data event.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkDataErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given error code.
+Args:
+  cls (JLinkDataErrors): the ``JLinkDataErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily-members.html new file mode 100644 index 00000000..38780fcc --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily-members.html @@ -0,0 +1,104 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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+
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+
enums.JLinkDeviceFamily Member List
+
+
+ +

This is the complete list of members for enums.JLinkDeviceFamily, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + +
ANY (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
ARM10 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
ARM11 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
ARM7 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
ARM9 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
AUTO (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
COLDFIRE (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_A5 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_A8 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_A9 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_M0 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_M1 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_M3 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_M4 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
CORTEX_R4 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
EFM8 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
MIPS (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
POWERPC (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
RX (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
SIMULATOR (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
XSCALE (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily.html b/docs/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily.html new file mode 100644 index 00000000..21c11c17 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily.html @@ -0,0 +1,156 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkDeviceFamily Class Reference + + + + + + + + + +
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enums.JLinkDeviceFamily Class Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int AUTO = 0
 
+int CORTEX_M1 = 1
 
+int COLDFIRE = 2
 
+int CORTEX_M3 = 3
 
+int SIMULATOR = 4
 
+int XSCALE = 5
 
+int CORTEX_M0 = 6
 
+int ARM7 = 7
 
+int CORTEX_A8 = 8
 
+int CORTEX_A9 = 8
 
+int ARM9 = 9
 
+int ARM10 = 10
 
+int ARM11 = 11
 
+int CORTEX_R4 = 12
 
+int RX = 13
 
+int CORTEX_M4 = 14
 
+int CORTEX_A5 = 15
 
+int POWERPC = 16
 
+int MIPS = 17
 
+int EFM8 = 18
 
+int ANY = 255
 
+

Detailed Description

+
Enumeration for the difference device families.
+These are the possible device families for targets that the J-Link is
+connected to.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
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CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ILLEGAL_COMMAND (defined in enums.JLinkEraseErrors)enums.JLinkEraseErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkEraseErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkEraseErrors.html b/docs/document_api_iec60730_library/classenums_1_1JLinkEraseErrors.html new file mode 100644 index 00000000..5f5397f6 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkEraseErrors.html @@ -0,0 +1,200 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkEraseErrors Class Reference + + + + + + + + + +
+
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+
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+Public Member Functions | +Static Public Attributes | +List of all members
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enums.JLinkEraseErrors Class Reference
+
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+ + + + +

+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int ILLEGAL_COMMAND = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated during an erase operation.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkEraseErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkEraseErrors): the ``JLinkEraseErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkEventTypes-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkEventTypes-members.html new file mode 100644 index 00000000..603323e9 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkEventTypes-members.html @@ -0,0 +1,84 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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BREAKPOINT (defined in enums.JLinkEventTypes)enums.JLinkEventTypesstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkEventTypes.html b/docs/document_api_iec60730_library/classenums_1_1JLinkEventTypes.html new file mode 100644 index 00000000..85aab74e --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkEventTypes.html @@ -0,0 +1,97 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkEventTypes Class Reference + + + + + + + + + +
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enums.JLinkEventTypes Class Reference
+
+
+ + + + +

+Static Public Attributes

+tuple BREAKPOINT = (1 << 0)
 
+

Detailed Description

+
J-Link data event types.
+Attributes:
+  BREAKPOINT: breakpoint data event.
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkFlags-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkFlags-members.html new file mode 100644 index 00000000..98969fab --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkFlags-members.html @@ -0,0 +1,91 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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DLG_BUTTON_CANCEL (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
DLG_BUTTON_NO (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
DLG_BUTTON_OK (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
DLG_BUTTON_YES (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
GO_OVERSTEP_BP (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
HW_PIN_STATUS_HIGH (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
HW_PIN_STATUS_LOW (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
HW_PIN_STATUS_UNKNOWN (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkFlags.html b/docs/document_api_iec60730_library/classenums_1_1JLinkFlags.html new file mode 100644 index 00000000..ba25cd26 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkFlags.html @@ -0,0 +1,116 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkFlags Class Reference + + + + + + + + + +
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+Static Public Attributes | +List of all members
+
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enums.JLinkFlags Class Reference
+
+
+ + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+tuple GO_OVERSTEP_BP = (1 << 0)
 
+tuple DLG_BUTTON_YES = (1 << 0)
 
+tuple DLG_BUTTON_NO = (1 << 1)
 
+tuple DLG_BUTTON_OK = (1 << 2)
 
+tuple DLG_BUTTON_CANCEL = (1 << 3)
 
+int HW_PIN_STATUS_LOW = 0
 
+int HW_PIN_STATUS_HIGH = 1
 
+int HW_PIN_STATUS_UNKNOWN = 255
 
+

Detailed Description

+
Enumeration for the different flags that are passed to the J-Link C SDK
+API methods.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkFlashErrors-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkFlashErrors-members.html new file mode 100644 index 00000000..8794387c --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkFlashErrors-members.html @@ -0,0 +1,107 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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COMPARE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
PROGRAM_ERASE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkFlashErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VERIFICATION_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkFlashErrors.html b/docs/document_api_iec60730_library/classenums_1_1JLinkFlashErrors.html new file mode 100644 index 00000000..bccf7191 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkFlashErrors.html @@ -0,0 +1,206 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkFlashErrors Class Reference + + + + + + + + + +
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+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int COMPARE_ERROR = -2
 
+int PROGRAM_ERASE_ERROR = -3
 
+int VERIFICATION_ERROR = -4
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated during a flash operation.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkFlashErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkFlashErrors): the ``JLinkFlashErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkFunctions-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkFunctions-members.html new file mode 100644 index 00000000..20ab7038 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkFunctions-members.html @@ -0,0 +1,86 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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FLASH_PROGRESS_PROTOTYPE (defined in enums.JLinkFunctions)enums.JLinkFunctionsstatic
LOG_PROTOTYPE (defined in enums.JLinkFunctions)enums.JLinkFunctionsstatic
UNSECURE_HOOK_PROTOTYPE (defined in enums.JLinkFunctions)enums.JLinkFunctionsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkFunctions.html b/docs/document_api_iec60730_library/classenums_1_1JLinkFunctions.html new file mode 100644 index 00000000..0dfc1e26 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkFunctions.html @@ -0,0 +1,152 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkFunctions Class Reference + + + + + + + + + +
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enums.JLinkFunctions Class Reference
+
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+Static Public Attributes

+ LOG_PROTOTYPE = ctypes.CFUNCTYPE(None, ctypes.c_char_p)
 
 UNSECURE_HOOK_PROTOTYPE
 
 FLASH_PROGRESS_PROTOTYPE
 
+

Detailed Description

+
Collection of function prototype and type builders for the J-Link SDK
+API calls.

Member Data Documentation

+ +

◆ FLASH_PROGRESS_PROTOTYPE

+ +
+
+ + + + + +
+ + + + +
enums.JLinkFunctions.FLASH_PROGRESS_PROTOTYPE
+ 		+static
+
+Initial value:
= ctypes.CFUNCTYPE(None,
+
ctypes.c_char_p,
+
ctypes.c_char_p,
+
ctypes.c_int)
+
+
+
+ +

◆ UNSECURE_HOOK_PROTOTYPE

+ +
+
+ + + + + +
+ + + + +
enums.JLinkFunctions.UNSECURE_HOOK_PROTOTYPE
+ 		+static
+
+Initial value:
= ctypes.CFUNCTYPE(ctypes.c_int,
+
ctypes.c_char_p,
+
ctypes.c_char_p,
+
ctypes.c_uint32)
+
+
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors-members.html new file mode 100644 index 00000000..ebf794c3 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors-members.html @@ -0,0 +1,104 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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+ + + + + + + + + + + + + + + + + + + + + + +
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkGlobalErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors.html b/docs/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors.html new file mode 100644 index 00000000..32c073d6 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors.html @@ -0,0 +1,197 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkGlobalErrors Class Reference + + + + + + + + + +
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Document API IEC60730 Library +
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+Public Member Functions | +Static Public Attributes | +List of all members
+
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enums.JLinkGlobalErrors Class Reference
+
+
+ + + + +

+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes which any J-Link SDK DLL API-function
+can have as a return value.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkGlobalErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JlinkGlobalErrors): the ``JLinkGlobalErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented in enums.JLinkRTTErrors, enums.JLinkDataErrors, enums.JLinkReadErrors, enums.JLinkWriteErrors, enums.JLinkFlashErrors, and enums.JLinkEraseErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkHaltReasons-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkHaltReasons-members.html new file mode 100644 index 00000000..d37736cb --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkHaltReasons-members.html @@ -0,0 +1,87 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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enums.JLinkHaltReasons Member List
+
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+ + + + + +
CODE_BREAKPOINT (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
DATA_BREAKPOINT (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
DBGRQ (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
VECTOR_CATCH (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkHaltReasons.html b/docs/document_api_iec60730_library/classenums_1_1JLinkHaltReasons.html new file mode 100644 index 00000000..f3edd8ef --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkHaltReasons.html @@ -0,0 +1,109 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkHaltReasons Class Reference + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
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+Static Public Attributes | +List of all members
+
+
enums.JLinkHaltReasons Class Reference
+
+
+ + + + + + + + + + +

+Static Public Attributes

+int DBGRQ = 0
 
+int CODE_BREAKPOINT = 1
 
+int DATA_BREAKPOINT = 2
 
+int VECTOR_CATCH = 3
 
+

Detailed Description

+
Halt reasons for the CPU.
+Attributes:
+  DBGRQ: CPU has been halted because DBGRQ signal asserted.
+  CODE_BREAKPOINT: CPU has been halted because of code breakpoint match.
+  DATA_BREAKPOINT: CPU has been halted because of data breakpoint match.
+  VECTOR_CATCH: CPU has been halted because of vector catch.
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkHost-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkHost-members.html new file mode 100644 index 00000000..5748ffe3 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkHost-members.html @@ -0,0 +1,86 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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IP (defined in enums.JLinkHost)enums.JLinkHoststatic
USB (defined in enums.JLinkHost)enums.JLinkHoststatic
USB_OR_IP (defined in enums.JLinkHost)enums.JLinkHoststatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkHost.html b/docs/document_api_iec60730_library/classenums_1_1JLinkHost.html new file mode 100644 index 00000000..8435cc7d --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkHost.html @@ -0,0 +1,100 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkHost Class Reference + + + + + + + + + +
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enums.JLinkHost Class Reference
+
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+ + + + + + + + +

+Static Public Attributes

+tuple USB = (1 << 0)
 
+tuple IP = (1 << 1)
 
+tuple USB_OR_IP = USB | IP
 
+

Detailed Description

+
Enumeration for the different JLink hosts: currently only IP and USB.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkInterfaces-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkInterfaces-members.html new file mode 100644 index 00000000..9a68f544 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkInterfaces-members.html @@ -0,0 +1,89 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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C2 (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
FINE (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
ICSP (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
JTAG (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
SPI (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
SWD (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
+ +
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+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkInterfaces.html b/docs/document_api_iec60730_library/classenums_1_1JLinkInterfaces.html new file mode 100644 index 00000000..6aac06cf --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkInterfaces.html @@ -0,0 +1,109 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkInterfaces Class Reference + + + + + + + + + +
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+
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enums.JLinkInterfaces Class Reference
+
+
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+Static Public Attributes

+int JTAG = 0
 
+int SWD = 1
 
+int FINE = 3
 
+int ICSP = 4
 
+int SPI = 5
 
+int C2 = 6
 
+

Detailed Description

+
Target interfaces for the J-Link.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkROMTable-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkROMTable-members.html new file mode 100644 index 00000000..80676ad1 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkROMTable-members.html @@ -0,0 +1,99 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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AHBAP (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
APBAP (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
DBG (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
DWT (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
ETB (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
ETM (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
FPB (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
ITM (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
MTB (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
NONE (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
NVIC (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
PTM (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
SECURE (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
TF (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
TMC (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
TPIU (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkROMTable.html b/docs/document_api_iec60730_library/classenums_1_1JLinkROMTable.html new file mode 100644 index 00000000..96ab14e8 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkROMTable.html @@ -0,0 +1,139 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkROMTable Class Reference + + + + + + + + + +
+
+ + + + + + +
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+
+
enums.JLinkROMTable Class Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int NONE = 0x100
 
+int ETM = 0x101
 
+int MTB = 0x102
 
+int TPIU = 0x103
 
+int ITM = 0x104
 
+int DWT = 0x105
 
+int FPB = 0x106
 
+int NVIC = 0x107
 
+int TMC = 0x108
 
+int TF = 0x109
 
+int PTM = 0x10A
 
+int ETB = 0x10B
 
+int DBG = 0x10C
 
+int APBAP = 0x10D
 
+int AHBAP = 0x10E
 
+int SECURE = 0x10F
 
+

Detailed Description

+
The J-Link ROM tables.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkRTTCommand-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTCommand-members.html new file mode 100644 index 00000000..bfbfce22 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTCommand-members.html @@ -0,0 +1,88 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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enums.JLinkRTTCommand Member List
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+ + + + + + +
GETDESC (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
GETNUMBUF (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
GETSTAT (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
START (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
STOP (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkRTTCommand.html b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTCommand.html new file mode 100644 index 00000000..f1e04759 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTCommand.html @@ -0,0 +1,106 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkRTTCommand Class Reference + + + + + + + + + +
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+
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+Static Public Attributes

+int START = 0
 
+int STOP = 1
 
+int GETDESC = 2
 
+int GETNUMBUF = 3
 
+int GETSTAT = 4
 
+

Detailed Description

+
RTT commands.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkRTTDirection-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTDirection-members.html new file mode 100644 index 00000000..a7b51750 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTDirection-members.html @@ -0,0 +1,85 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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+ + + +
DOWN (defined in enums.JLinkRTTDirection)enums.JLinkRTTDirectionstatic
UP (defined in enums.JLinkRTTDirection)enums.JLinkRTTDirectionstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkRTTDirection.html b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTDirection.html new file mode 100644 index 00000000..ade766fa --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTDirection.html @@ -0,0 +1,97 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkRTTDirection Class Reference + + + + + + + + + +
+
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Document API IEC60730 Library +
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+Static Public Attributes | +List of all members
+
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enums.JLinkRTTDirection Class Reference
+
+
+ + + + + + +

+Static Public Attributes

+int UP = 0
 
+int DOWN = 1
 
+

Detailed Description

+
RTT Direction.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkRTTErrors-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTErrors-members.html new file mode 100644 index 00000000..b1e18359 --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTErrors-members.html @@ -0,0 +1,105 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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+ + + + + + + + + + + + + + + + + + + + + + + +
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
RTT_ERROR_CONTROL_BLOCK_NOT_FOUND (defined in enums.JLinkRTTErrors)enums.JLinkRTTErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkRTTErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
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+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkRTTErrors.html b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTErrors.html new file mode 100644 index 00000000..6196c44f --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkRTTErrors.html @@ -0,0 +1,200 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkRTTErrors Class Reference + + + + + + + + + +
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enums.JLinkRTTErrors Class Reference
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+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int RTT_ERROR_CONTROL_BLOCK_NOT_FOUND = -2
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for error codes from RTT.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkRTTErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given error code.
+Args:
+  cls (JLinkRTTErrors): the ``JLinkRTTErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkReadErrors-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkReadErrors-members.html new file mode 100644 index 00000000..7be9415e --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkReadErrors-members.html @@ -0,0 +1,105 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkReadErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ZONE_NOT_FOUND_ERROR (defined in enums.JLinkReadErrors)enums.JLinkReadErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkReadErrors.html b/docs/document_api_iec60730_library/classenums_1_1JLinkReadErrors.html new file mode 100644 index 00000000..33b5740c --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkReadErrors.html @@ -0,0 +1,200 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkReadErrors Class Reference + + + + + + + + + +
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enums.JLinkReadErrors Class Reference
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+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int ZONE_NOT_FOUND_ERROR = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated during a read.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkReadErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkReadErrors): the ``JLinkReadErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
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+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkResetStrategyCortexM3-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkResetStrategyCortexM3-members.html new file mode 100644 index 00000000..4ff0d18c --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkResetStrategyCortexM3-members.html @@ -0,0 +1,94 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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ADI_HALT_AFTER_KERNEL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
CONNECT_UNDER_RESET (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
CORE (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
CORE_AND_PERIPHERALS (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
HALT_AFTER_BTL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
HALT_BEFORE_BTL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
KINETIS (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
LPC1200 (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
NORMAL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
RESETPIN (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
S3FN60D (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
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+Static Public Attributes

+int NORMAL = 0
 
+int CORE = 1
 
+int RESETPIN = 2
 
+int CONNECT_UNDER_RESET = 3
 
+int HALT_AFTER_BTL = 4
 
+int HALT_BEFORE_BTL = 5
 
+int KINETIS = 6
 
+int ADI_HALT_AFTER_KERNEL = 7
 
+int CORE_AND_PERIPHERALS = 8
 
+int LPC1200 = 9
 
+int S3FN60D = 10
 
+

Detailed Description

+
Target reset strategies for the J-Link.
+Attributes:
+  NORMAL: default reset strategy, does whatever is best to reset.
+  CORE: only the core is reset via the ``VECTRESET`` bit.
+  RESETPIN: pulls the reset pin low to reset the core and peripherals.
+  CONNECT_UNDER_RESET: J-Link connects to target while keeping reset
+    active.  This is recommended for STM32 devices.
+  HALT_AFTER_BTL: halt the core after the bootloader is executed.
+  HALT_BEFORE_BTL: halt the core before the bootloader is executed.
+  KINETIS: performs a normal reset, but also disables the watchdog.
+  ADI_HALT_AFTER_KERNEL: sets the ``SYSRESETREQ`` bit in the ``AIRCR`` in
+    order to reset the device.
+  CORE_AND_PERIPHERALS: sets the ``SYSRESETREQ`` bit in the ``AIRCR``, and
+    the ``VC_CORERESET`` bit in the ``DEMCR`` to make sure that the CPU is
+    halted immediately after reset.
+  LPC1200: reset for LPC1200 devices.
+  S3FN60D: reset for Samsung S3FN60D devices.
+Note:
+  Please see the J-Link SEGGER Documentation, UM8001, for full information
+  about the different reset strategies.
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
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FLUSH (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
GET_NUM_BYTES (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
GET_SPEED_INFO (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
SET_BUFFERSIZE_EMU (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
SET_BUFFERSIZE_HOST (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
START (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
STOP (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
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+Static Public Attributes

+int START = 0
 
+int STOP = 1
 
+int FLUSH = 2
 
+int GET_SPEED_INFO = 3
 
+int GET_NUM_BYTES = 10
 
+int SET_BUFFERSIZE_HOST = 20
 
+int SET_BUFFERSIZE_EMU = 21
 
+

Detailed Description

+
Serial Wire Output (SWO) commands.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
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+Generated by   +doxygen + 1.8.17 +
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MANCHESTER (defined in enums.JLinkSWOInterfaces)enums.JLinkSWOInterfacesstatic
UART (defined in enums.JLinkSWOInterfaces)enums.JLinkSWOInterfacesstatic
+ +
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+Static Public Attributes

+int UART = 0
 
+int MANCHESTER = 1
 
+

Detailed Description

+
Serial Wire Output (SWO) interfaces.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
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SET_BUFFER_SIZE (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
TRACE_EVENT_CLR (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
TRACE_EVENT_CLR_ALL (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
TRACE_EVENT_SET (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
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+Static Public Attributes

+int TRACE_EVENT_SET = 0
 
+int TRACE_EVENT_CLR = 1
 
+int TRACE_EVENT_CLR_ALL = 2
 
+int SET_BUFFER_SIZE = 3
 
+

Detailed Description

+
STRACE commands.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
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CODE_FETCH (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
DATA_ACCESS (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
DATA_LOAD (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
DATA_STORE (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
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+int CODE_FETCH = 0
 
+int DATA_ACCESS = 1
 
+int DATA_LOAD = 2
 
+int DATA_STORE = 3
 
+

Detailed Description

+
STRACE events.
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    +
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TRACE_EXCLUDE_RANGE (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
TRACE_INCLUDE_RANGE (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
TRACE_START (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
TRACE_STOP (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
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+Static Public Attributes

+int TRACE_START = 0
 
+int TRACE_STOP = 1
 
+int TRACE_INCLUDE_RANGE = 2
 
+int TRACE_EXCLUDE_RANGE = 3
 
+

Detailed Description

+
STRACE operation specifiers.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
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FLUSH (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_CONF_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_FORMAT (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_MAX_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_MIN_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_NUM_REGIONS (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_NUM_SAMPLES (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_REGION_PROPS (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
GET_REGION_PROPS_EX (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
SET_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
SET_FORMAT (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
START (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
STOP (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
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enums.JLinkTraceCommand Class Reference
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+Static Public Attributes

+int START = 0x0
 
+int STOP = 0x1
 
+int FLUSH = 0x2
 
+int GET_NUM_SAMPLES = 0x10
 
+int GET_CONF_CAPACITY = 0x11
 
+int SET_CAPACITY = 0x12
 
+int GET_MIN_CAPACITY = 0x13
 
+int GET_MAX_CAPACITY = 0x14
 
+int SET_FORMAT = 0x20
 
+int GET_FORMAT = 0x21
 
+int GET_NUM_REGIONS = 0x30
 
+int GET_REGION_PROPS = 0x31
 
+int GET_REGION_PROPS_EX = 0x32
 
+

Detailed Description

+
J-Link trace commands.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
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FORMAT_16BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_1BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_2BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_4BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_8BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_DEMULTIPLEXED (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_DOUBLE_EDGE (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_ETM10 (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_ETM7_9 (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
FORMAT_MULTIPLEXED (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
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+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkTraceFormat.html b/docs/document_api_iec60730_library/classenums_1_1JLinkTraceFormat.html new file mode 100644 index 00000000..1bb7cd6a --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkTraceFormat.html @@ -0,0 +1,133 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkTraceFormat Class Reference + + + + + + + + + +
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+Static Public Attributes

+int FORMAT_4BIT = 0x1
 
+int FORMAT_8BIT = 0x2
 
+int FORMAT_16BIT = 0x4
 
+int FORMAT_MULTIPLEXED = 0x8
 
+int FORMAT_DEMULTIPLEXED = 0x10
 
+int FORMAT_DOUBLE_EDGE = 0x20
 
+int FORMAT_ETM7_9 = 0x40
 
+int FORMAT_ETM10 = 0x80
 
+int FORMAT_1BIT = 0x100
 
+int FORMAT_2BIT = 0x200
 
+

Detailed Description

+
J-Link trace formats.
+Attributes:
+  FORMAT_4BIT: 4-bit data.
+  FORMAT_8BIT: 8-bit data.
+  FORMAT_16BIT: 16-bit data.
+  FORMAT_MULTIPLEXED: multiplexing on ETM / buffer link.
+  FORMAT_DEMULTIPLEXED: de-multiplexing on ETM / buffer link.
+  FORMAT_DOUBLE_EDGE: clock data on both ETM / buffer link edges.
+  FORMAT_ETM7_9: ETM7/ETM9 protocol.
+  FORMAT_ETM10: ETM10 protocol.
+  FORMAT_1BIT: 1-bit data.
+  FORMAT_2BIT: 2-bit data.
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
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ETB (defined in enums.JLinkTraceSource)enums.JLinkTraceSourcestatic
ETM (defined in enums.JLinkTraceSource)enums.JLinkTraceSourcestatic
MTB (defined in enums.JLinkTraceSource)enums.JLinkTraceSourcestatic
+ +
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enums.JLinkTraceSource Class Reference
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+Static Public Attributes

+int ETB = 0
 
+int ETM = 1
 
+int MTB = 2
 
+

Detailed Description

+
Sources for tracing.
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classenums_1_1JLinkVectorCatchCortexM3-members.html b/docs/document_api_iec60730_library/classenums_1_1JLinkVectorCatchCortexM3-members.html new file mode 100644 index 00000000..0cd624ab --- /dev/null +++ b/docs/document_api_iec60730_library/classenums_1_1JLinkVectorCatchCortexM3-members.html @@ -0,0 +1,91 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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BUS_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
CHECK_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
COPROCESSOR_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
CORE_RESET (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
HARD_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
INT_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
MEM_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
STATE_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
+ +
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enums.JLinkVectorCatchCortexM3 Class Reference
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+Static Public Attributes

+tuple CORE_RESET = (1 << 0)
 
+tuple MEM_ERROR = (1 << 4)
 
+tuple COPROCESSOR_ERROR = (1 << 5)
 
+tuple CHECK_ERROR = (1 << 6)
 
+tuple STATE_ERROR = (1 << 7)
 
+tuple BUS_ERROR = (1 << 8)
 
+tuple INT_ERROR = (1 << 9)
 
+tuple HARD_ERROR = (1 << 10)
 
+

Detailed Description

+
Vector catch types for the ARM Cortex M3.
+Attributes:
+  CORE_RESET: The CPU core reset.
+  MEM_ERROR: A memory management error occurred.
+  COPROCESSOR_ERROR: Usage fault error accessing the Coprocessor.
+  CHECK_ERROR: Usage fault error on enabled check.
+  STATE_ERROR: Usage fault state error.
+  BUS_ERROR: Normal bus error.
+  INT_ERROR: Interrupt or exception service error.
+  HARD_ERROR: Hard fault error.
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
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CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkWriteErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ZONE_NOT_FOUND_ERROR (defined in enums.JLinkWriteErrors)enums.JLinkWriteErrorsstatic
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enums.JLinkWriteErrors Class Reference
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+Public Member Functions

def to_string (cls, error_code)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Static Public Attributes

+int ZONE_NOT_FOUND_ERROR = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Enumeration for the error codes generated during a write.

Member Function Documentation

+ +

◆ to_string()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def enums.JLinkWriteErrors.to_string ( cls,
 error_code 
)
+
+
Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkWriteErrors): the ``JLinkWriteErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
+

Reimplemented from enums.JLinkGlobalErrors.

+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/enums.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
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__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ERROR_INVALID_ACCESS_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_INVALID_ADDR_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_INVALID_DATA_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_ADDR_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_DATA_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_NO_MORE_EVENTS (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
ERROR_UNKNOWN (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkDataErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
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+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkDataErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkDataErrors
+int ERROR_UNKNOWN = 0x80000000
 
+int ERROR_NO_MORE_EVENTS = 0x80000001
 
+int ERROR_NO_MORE_ADDR_COMP = 0x80000002
 
+int ERROR_NO_MORE_DATA_COMP = 0x80000004
 
+int ERROR_INVALID_ADDR_MASK = 0x80000020
 
+int ERROR_INVALID_DATA_MASK = 0x80000040
 
+int ERROR_INVALID_ACCESS_MASK = 0x80000080
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link data event exception.
The documentation for this class was generated from the following file:
    +
  • test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkEraseException-members.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkEraseException-members.html new file mode 100644 index 00000000..7afed6a6 --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkEraseException-members.html @@ -0,0 +1,128 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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errors.JLinkEraseException Member List
+
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+ +

This is the complete list of members for errors.JLinkEraseException, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ILLEGAL_COMMAND (defined in enums.JLinkEraseErrors)enums.JLinkEraseErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkEraseErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkEraseException.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkEraseException.html new file mode 100644 index 00000000..9d5469df --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkEraseException.html @@ -0,0 +1,168 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkEraseException Class Reference + + + + + + + + + +
+
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errors.JLinkEraseException Class Reference
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+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkEraseErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkEraseErrors
+int ILLEGAL_COMMAND = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link erase exception.
The documentation for this class was generated from the following file:
    +
  • test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkException-members.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkException-members.html new file mode 100644 index 00000000..c1c6b430 --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkException-members.html @@ -0,0 +1,107 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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+ + + + + + + + + + + + + + + + + + + + + + + + + +
__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkGlobalErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkException.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkException.html new file mode 100644 index 00000000..3887c167 --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkException.html @@ -0,0 +1,208 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkException Class Reference + + + + + + + + + +
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+Public Member Functions | +Public Attributes | +List of all members
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errors.JLinkException Class Reference
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+Public Member Functions

def __init__ (self, code)
 
- Public Member Functions inherited from enums.JLinkGlobalErrors
def to_string (cls, error_code)
 
+ + + + + +

+Public Attributes

+ code
 
+ message
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Additional Inherited Members

- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
Generic J-Link exception.

Constructor & Destructor Documentation

+ +

◆ __init__()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def errors.JLinkException.__init__ ( self,
 code 
)
+
+
Generates an exception by coercing the given ``code`` to an error
+string if is a number, otherwise assumes it is the message.
+
+Args:
+  self (JLinkException): the 'JLinkException' instance
+  code (object): message or error code
+
+Returns:
+  ``None``
+
+
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkFlashException-members.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkFlashException-members.html new file mode 100644 index 00000000..60bada81 --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkFlashException-members.html @@ -0,0 +1,130 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
COMPARE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
PROGRAM_ERASE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkFlashErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VERIFICATION_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkFlashException.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkFlashException.html new file mode 100644 index 00000000..6420eb08 --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkFlashException.html @@ -0,0 +1,174 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkFlashException Class Reference + + + + + + + + + +
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+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkFlashErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkFlashErrors
+int COMPARE_ERROR = -2
 
+int PROGRAM_ERASE_ERROR = -3
 
+int VERIFICATION_ERROR = -4
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link flash exception.
The documentation for this class was generated from the following file:
    +
  • test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkRTTException-members.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkRTTException-members.html new file mode 100644 index 00000000..1c71d36f --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkRTTException-members.html @@ -0,0 +1,128 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
RTT_ERROR_CONTROL_BLOCK_NOT_FOUND (defined in enums.JLinkRTTErrors)enums.JLinkRTTErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkRTTErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkRTTException.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkRTTException.html new file mode 100644 index 00000000..0c0508f9 --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkRTTException.html @@ -0,0 +1,168 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkRTTException Class Reference + + + + + + + + + +
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errors.JLinkRTTException Class Reference
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+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkRTTErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkRTTErrors
+int RTT_ERROR_CONTROL_BLOCK_NOT_FOUND = -2
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link RTT exception.
The documentation for this class was generated from the following file:
    +
  • test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkReadException-members.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkReadException-members.html new file mode 100644 index 00000000..b5c2ee14 --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkReadException-members.html @@ -0,0 +1,128 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkReadErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ZONE_NOT_FOUND_ERROR (defined in enums.JLinkReadErrors)enums.JLinkReadErrorsstatic
+ +
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+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkReadErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkReadErrors
+int ZONE_NOT_FOUND_ERROR = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link read exception.
The documentation for this class was generated from the following file:
    +
  • test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classerrors_1_1JLinkWriteException-members.html b/docs/document_api_iec60730_library/classerrors_1_1JLinkWriteException-members.html new file mode 100644 index 00000000..becd01e4 --- /dev/null +++ b/docs/document_api_iec60730_library/classerrors_1_1JLinkWriteException-members.html @@ -0,0 +1,128 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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__init__(self, code)errors.JLinkException
code (defined in errors.JLinkException)errors.JLinkException
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
message (defined in errors.JLinkException)errors.JLinkException
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
to_string(cls, error_code)enums.JLinkWriteErrors
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
ZONE_NOT_FOUND_ERROR (defined in enums.JLinkWriteErrors)enums.JLinkWriteErrorsstatic
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+Additional Inherited Members

- Public Member Functions inherited from enums.JLinkWriteErrors
def to_string (cls, error_code)
 
- Public Member Functions inherited from errors.JLinkException
def __init__ (self, code)
 
- Public Attributes inherited from errors.JLinkException
+ code
 
+ message
 
- Static Public Attributes inherited from enums.JLinkWriteErrors
+int ZONE_NOT_FOUND_ERROR = -5
 
- Static Public Attributes inherited from enums.JLinkGlobalErrors
+int UNSPECIFIED_ERROR = -1
 
+int EMU_NO_CONNECTION = -256
 
+int EMU_COMM_ERROR = -257
 
+int DLL_NOT_OPEN = -258
 
+int VCC_FAILURE = -259
 
+int INVALID_HANDLE = -260
 
+int NO_CPU_FOUND = -261
 
+int EMU_FEATURE_UNSUPPORTED = -262
 
+int EMU_NO_MEMORY = -263
 
+int TIF_STATUS_ERROR = -264
 
+int FLASH_PROG_COMPARE_FAILED = -265
 
+int FLASH_PROG_PROGRAM_FAILED = -266
 
+int FLASH_PROG_VERIFY_FAILED = -267
 
+int OPEN_FILE_FAILED = -268
 
+int UNKNOWN_FILE_FORMAT = -269
 
+int WRITE_TARGET_MEMORY_FAILED = -270
 
+int DEVICE_FEATURE_NOT_SUPPORTED = -271
 
+int WRONG_USER_CONFIG = -272
 
+int NO_TARGET_DEVICE_SELECTED = -273
 
+int CPU_IN_LOW_POWER_MODE = -274
 
+

Detailed Description

+
J-Link write exception.
The documentation for this class was generated from the following file:
    +
  • test/test_script/errors.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classes.html b/docs/document_api_iec60730_library/classes.html new file mode 100644 index 00000000..e9caf879 --- /dev/null +++ b/docs/document_api_iec60730_library/classes.html @@ -0,0 +1,177 @@ + + + + + + + +Document API IEC60730 Library: Class Index + + + + + + + + + +
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  i  
+		JlinkArm_Speed_Info_CStruct (jlink_constants)   JLinkFlashException (errors)   JLinkStraceEvent (enums)   sl_iec60730_imc_test_multiple_regions_t   
JLinkArmEmuConnectInfo_CStruct (jlink_constants)   JLinkFunctions (enums)   JLinkStraceOperation (enums)   sl_iec60730_imc_test_region_t   
iec60730_cpu_regs (integration_test_iec60730_cpu_registers)   JLinkBreakpoint (enums)   JLinkGlobalErrors (enums)   JLinkSWOCommands (enums)   sl_iec60730_irq_cfg_t   
iec60730_imc (integration_test_iec60730_invariable_memory)   JLinkBreakpointImplementation (enums)   JLinkHaltReasons (enums)   JLinkSWOInterfaces (enums)   sl_iec60730_irq_execution_bounds_t   
iec60730_irq (integration_test_iec60730_irq)   JLinkCore (enums)   JLinkHost (enums)   JLinkTraceCommand (enums)   sl_iec60730_irq_fail_t   
iec60730_logger (iec60730_test_base)   JLinkCPUCapabilities (enums)   JLinkInterfaces (enums)   JLinkTraceFormat (enums)   sl_iec60730_library_version_t   
iec60730_programme_counter (integration_test_iec60730_program_counter)   JLinkDataErrors (enums)   JLinkJtagIdData_CStruct (jlink_constants)   JLinkTraceSource (enums)   sl_iec60730_safety_check_t   
iec60730_system_clock (integration_test_iec60730_system_clock)   JLinkDataException (errors)   JLinkReadErrors (enums)   JLinkVectorCatchCortexM3 (enums)   sl_iec60730_update_crc_params_t   
iec60730_unit_test_result (unit_test_iec60730_get_report)   JLinkDeviceFamily (enums)   JLinkReadException (errors)   JLinkWriteErrors (enums)   sl_iec60730_vmc_test_multiple_regions_t   
iec60730_vmc (integration_test_iec60730_variable_memory)   JLinkDll (jlink)   JLinkResetStrategyCortexM3 (enums)   JLinkWriteException (errors)   sl_iec60730_vmc_test_region_t   
iec60730_watchdog (integration_test_iec60730_watchdog)   JLinkEraseErrors (enums)   JLinkROMTable (enums)   
  p  
+		sl_iec60730_watchdog_t   
iec60730TestBase (iec60730_test_base)   JLinkEraseException (errors)   JLinkRTTCommand (enums)   
  t  
+
  j  
+		JLinkEventTypes (enums)   JLinkRTTDirection (enums)   PyTestSuites (util)   
JLinkException (errors)   JLinkRTTErrors (enums)   
  s  
+		TelnetDeviceUtil (util)   
JLinkAccessFlags (enums)   JLinkFlags (enums)   JLinkRTTException (errors)   TelnetHostUtil (util)   
JLinkAccessMaskFlags (enums)   JLinkFlashErrors (enums)   JLinkStraceCommand (enums)   sl_iec60730_imc_params_t   TimeStampUtil (util)   
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adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
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+Public Member Functions

+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + + +

+Public Attributes

+ logger
 
+ adapter
 
+
The documentation for this class was generated from the following file:
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iec60730_test_base.iec60730_logger Member List
+
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+ +

This is the complete list of members for iec60730_test_base.iec60730_logger, including all inherited members.

+ + + +
init_logger() (defined in iec60730_test_base.iec60730_logger)iec60730_test_base.iec60730_loggerstatic
remove_handler() (defined in iec60730_test_base.iec60730_logger)iec60730_test_base.iec60730_logger
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classiec60730__test__base_1_1iec60730__logger.html b/docs/document_api_iec60730_library/classiec60730__test__base_1_1iec60730__logger.html new file mode 100644 index 00000000..9ac1645a --- /dev/null +++ b/docs/document_api_iec60730_library/classiec60730__test__base_1_1iec60730__logger.html @@ -0,0 +1,100 @@ + + + + + + + +Document API IEC60730 Library: iec60730_test_base.iec60730_logger Class Reference + + + + + + + + + +
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iec60730_test_base.iec60730_logger Class Reference
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+Public Member Functions

+def remove_handler ()
 
+ + + +

+Static Public Member Functions

+def init_logger ()
 
+
The documentation for this class was generated from the following file:
    +
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+ + diff --git a/docs/document_api_iec60730_library/classintegration__test__iec60730__cpu__registers_1_1iec60730__cpu__regs-members.html b/docs/document_api_iec60730_library/classintegration__test__iec60730__cpu__registers_1_1iec60730__cpu__regs-members.html new file mode 100644 index 00000000..e439eb4e --- /dev/null +++ b/docs/document_api_iec60730_library/classintegration__test__iec60730__cpu__registers_1_1iec60730__cpu__regs-members.html @@ -0,0 +1,120 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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integration_test_iec60730_cpu_registers.iec60730_cpu_regs Member List
+
+
+ +

This is the complete list of members for integration_test_iec60730_cpu_registers.iec60730_cpu_regs, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
core_register_common_test(self, bkp_label_inject, bkp_testcase_pass, bkp_fail, reg_test, reg_mask, reg_new_value=[0])integration_test_iec60730_cpu_registers.iec60730_cpu_regs
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_01_core_register_apsr(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_02_msp_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_03_msp_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_04_psp_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_05_psp_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_06_msplim_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_07_msplim_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_08_psplim_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_09_psplim_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_10_control_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_11_control_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_12_primask_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_13_primask_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_14_basepri_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_15_basepri_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_16_faultmask_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_17_faultmask_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_18_fpr_fpscr_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
test_19_fpu_sx_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
TEST_SUITE_NAMEintegration_test_iec60730_cpu_registers.iec60730_cpu_regsstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classintegration__test__iec60730__cpu__registers_1_1iec60730__cpu__regs.html b/docs/document_api_iec60730_library/classintegration__test__iec60730__cpu__registers_1_1iec60730__cpu__regs.html new file mode 100644 index 00000000..6bab9055 --- /dev/null +++ b/docs/document_api_iec60730_library/classintegration__test__iec60730__cpu__registers_1_1iec60730__cpu__regs.html @@ -0,0 +1,699 @@ + + + + + + + +Document API IEC60730 Library: integration_test_iec60730_cpu_registers.iec60730_cpu_regs Class Reference + + + + + + + + + +
+
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+
Document API IEC60730 Library +
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integration_test_iec60730_cpu_registers.iec60730_cpu_regs Class Reference
IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » CPU Register Check Automated Verification Tests
+
+
+ +

IEC60730 CPU Register Check Tests. + More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 Set up connect device.
 
+def core_register_common_test (self, bkp_label_inject, bkp_testcase_pass, bkp_fail, reg_test, reg_mask, reg_new_value=[0])
 Supports setting breakpoints and changing test register values.
 
def test_01_core_register_apsr (self)
 Verify the error detected correctly on the Core Registers APSR, R0-R2, LR. More...
 
def test_02_msp_ns_register (self)
 Verify the error detected correctly on the Core Registers MSP_NS. More...
 
def test_03_msp_s_register (self)
 Verify the error detected correctly on the Register MSP_S. More...
 
def test_04_psp_ns_register (self)
 Verify the error detected correctly on the Register PSP_NS. More...
 
def test_05_psp_s_register (self)
 Verify the error detected correctly on the Register PSP_S. More...
 
def test_06_msplim_ns_register (self)
 Verify the error detected correctly on the Register MSPLIM_NS. More...
 
def test_07_msplim_s_register (self)
 Verify the error detected correctly on the Register MSPLIM_S. More...
 
def test_08_psplim_ns_register (self)
 Verify the error detected correctly on the Register PSPLIM_NS. More...
 
def test_09_psplim_s_register (self)
 Verify the error detected correctly on the Register PSPLIM_S. More...
 
def test_10_control_ns_register (self)
 Verify the error detected correctly on the Register CONTROL_NS. More...
 
def test_11_control_s_register (self)
 Verify the error detected correctly on the Register CONTROL_S. More...
 
def test_12_primask_ns_register (self)
 Verify the error detected correctly on the Register PRIMASK_NS. More...
 
def test_13_primask_s_register (self)
 Verify the error detected correctly on the Register PRIMASK_S. More...
 
def test_14_basepri_ns_register (self)
 Verify the error detected correctly on the Register BASEPRI_NS. More...
 
def test_15_basepri_s_register (self)
 Verify the error detected correctly on the Register BASEPRI_S. More...
 
def test_16_faultmask_ns_register (self)
 Verify the error detected correctly on the Register FAULTMASK_NS. More...
 
def test_17_faultmask_s_register (self)
 Verify the error detected correctly on the Register FAULTMASK_S. More...
 
def test_18_fpr_fpscr_register (self)
 Verify the error detected correctly on the Register FPSCR. More...
 
def test_19_fpu_sx_register (self)
 Verify the error detected correctly on the FPU Registers S0 - S31. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "CPU_REGS"
 Text name of the test suite, used in XML output.
 
+ + + + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ logger
 
+ adapter
 
+

Detailed Description

+

IEC60730 CPU Register Check Tests.

+

This class runs IEC60730 CPU Register tests.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_01_core_register_apsr()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_01_core_register_apsr ( self)
+
+ +

Verify the error detected correctly on the Core Registers APSR, R0-R2, LR.

+

Order of execution:

    +
  • Verify error detecting on APSR
    • +
  • Verify error detecting on R0-R2
    • +
  • Verify error detecting on R2-R13
    • +
  • Verify error detecting on LR
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_02_msp_ns_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_02_msp_ns_register ( self)
+
+ +

Verify the error detected correctly on the Core Registers MSP_NS.

+

Order of execution:

    +
  • Verify error detecting on MSP_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_03_msp_s_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_03_msp_s_register ( self)
+
+ +

Verify the error detected correctly on the Register MSP_S.

+

Order of execution:

    +
  • Verify error detecting on MSP_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_04_psp_ns_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_04_psp_ns_register ( self)
+
+ +

Verify the error detected correctly on the Register PSP_NS.

+

Order of execution:

    +
  • Verify error detecting on PSP_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_05_psp_s_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_05_psp_s_register ( self)
+
+ +

Verify the error detected correctly on the Register PSP_S.

+

Order of execution:

    +
  • Verify error detecting on PSP_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_06_msplim_ns_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_06_msplim_ns_register ( self)
+
+ +

Verify the error detected correctly on the Register MSPLIM_NS.

+

Order of execution:

    +
  • Verify error detecting on MSPLIM_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_07_msplim_s_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_07_msplim_s_register ( self)
+
+ +

Verify the error detected correctly on the Register MSPLIM_S.

+

Order of execution:

    +
  • Verify error detecting on MSPLIM_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_08_psplim_ns_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_08_psplim_ns_register ( self)
+
+ +

Verify the error detected correctly on the Register PSPLIM_NS.

+

Order of execution:

    +
  • Verify error detecting on PSPLIM_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_09_psplim_s_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_09_psplim_s_register ( self)
+
+ +

Verify the error detected correctly on the Register PSPLIM_S.

+

Order of execution:

    +
  • Verify error detecting on PSPLIM_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_10_control_ns_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_10_control_ns_register ( self)
+
+ +

Verify the error detected correctly on the Register CONTROL_NS.

+

Order of execution:

    +
  • Verify error detecting on CONTROL_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_11_control_s_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_11_control_s_register ( self)
+
+ +

Verify the error detected correctly on the Register CONTROL_S.

+

Order of execution:

    +
  • Verify error detecting on CONTROL_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_12_primask_ns_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_12_primask_ns_register ( self)
+
+ +

Verify the error detected correctly on the Register PRIMASK_NS.

+

Order of execution:

    +
  • Verify error detecting on PRIMASK_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_13_primask_s_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_13_primask_s_register ( self)
+
+ +

Verify the error detected correctly on the Register PRIMASK_S.

+

Order of execution:

    +
  • Verify error detecting on PRIMASK_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_14_basepri_ns_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_14_basepri_ns_register ( self)
+
+ +

Verify the error detected correctly on the Register BASEPRI_NS.

+

Order of execution:

    +
  • Verify error detecting on BASEPRI_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_15_basepri_s_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_15_basepri_s_register ( self)
+
+ +

Verify the error detected correctly on the Register BASEPRI_S.

+

Order of execution:

    +
  • Verify error detecting on BASEPRI_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_16_faultmask_ns_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_16_faultmask_ns_register ( self)
+
+ +

Verify the error detected correctly on the Register FAULTMASK_NS.

+

Order of execution:

    +
  • Verify error detecting on FAULTMASK_NS
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_17_faultmask_s_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_17_faultmask_s_register ( self)
+
+ +

Verify the error detected correctly on the Register FAULTMASK_S.

+

Order of execution:

    +
  • Verify error detecting on FAULTMASK_S
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_18_fpr_fpscr_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_18_fpr_fpscr_register ( self)
+
+ +

Verify the error detected correctly on the Register FPSCR.

+

Order of execution:

    +
  • Verify error detecting on FPSCR
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+ +

◆ test_19_fpu_sx_register()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_19_fpu_sx_register ( self)
+
+ +

Verify the error detected correctly on the FPU Registers S0 - S31.

+

Order of execution:

    +
  • Verify error detecting on S0 - S31
    • +
  • Test passes, return True
    • +
+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/integration_test_iec60730_cpu_registers.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classintegration__test__iec60730__invariable__memory_1_1iec60730__imc-members.html b/docs/document_api_iec60730_library/classintegration__test__iec60730__invariable__memory_1_1iec60730__imc-members.html new file mode 100644 index 00000000..434874a1 --- /dev/null +++ b/docs/document_api_iec60730_library/classintegration__test__iec60730__invariable__memory_1_1iec60730__imc-members.html @@ -0,0 +1,107 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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integration_test_iec60730_invariable_memory.iec60730_imc Member List
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+ + + + + + + + + + + + + + + + + + + + + + + + + +
adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
reach_to_breakpoint(self, label, setbkp, time)integration_test_iec60730_invariable_memory.iec60730_imc
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_breakpoint(self, label)integration_test_iec60730_invariable_memory.iec60730_imc
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self)integration_test_iec60730_invariable_memory.iec60730_imc
test_cal_crc_block_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
test_cal_crc_full_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
test_corrupt_crc_cal_crc_block_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
test_corrupt_crc_full_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
test_corrupt_integrity_iec60730_run_crc_block_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
TEST_SUITE_NAMEintegration_test_iec60730_invariable_memory.iec60730_imcstatic
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integration_test_iec60730_invariable_memory.iec60730_imc Class Reference
IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » Invariable Memory Automated Verification Tests
+
+
+ +

IEC60730 Invariable Memory Plausibility Verification Tests. + More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 Set up connect device.
 
+def set_breakpoint (self, label)
 Set breakpoint.
 
+def reach_to_breakpoint (self, label, setbkp, time)
 Run to breakpoint.
 
def test_cal_crc_full_memory (self)
 Verify the DUT calculation of CRC value at POST. More...
 
def test_corrupt_crc_full_memory (self)
 Verify the DUT jump to sl_iec60730_safe_state when flash faied at POST. More...
 
def test_cal_crc_block_memory (self)
 Verify the DUT calculation of CRC value at BIST. More...
 
def test_corrupt_crc_cal_crc_block_memory (self)
 Verify the DUT jump to sl_iec60730_safe_state when flash faied at BIST. More...
 
def test_corrupt_integrity_iec60730_run_crc_block_memory (self)
 Verify integrity of iec60730_run_crc variable. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "IMC"
 Text name of the test suite, used in XML output.
 
+ + + + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ logger
 
+ adapter
 
+

Detailed Description

+

IEC60730 Invariable Memory Plausibility Verification Tests.

+

This class runs IEC60730 verification tests for the invariable memory plausibility test.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_cal_crc_block_memory()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_invariable_memory.iec60730_imc.test_cal_crc_block_memory ( self)
+
+ +

Verify the DUT calculation of CRC value at BIST.

+

This TC checks under normal conditions with no exceptions, firmware will calculate the CRC values for each step of BIST and accumulate these values. Finally, the calculated CRC value SHOULD be equal to the value stored in the flash.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reaches breakpoint at IEC60730_IMC_BIST_CRCBLOCK_BKPT
    • +
  • Loop with IEC60730_IMC_BIST_CALCRC_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_IMC_BIST_END_BKPT (success)
    • +
+
Returns
True
+ +
+
+ +

◆ test_cal_crc_full_memory()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_invariable_memory.iec60730_imc.test_cal_crc_full_memory ( self)
+
+ +

Verify the DUT calculation of CRC value at POST.

+

This test case (TC) checks under normal conditions with no exceptions, firmware will calculate the CRC of the entire flash, the calculated value SHOULD be equal to the calculated value stored in the flash.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reaches breakpoint at IEC60730_IMC_POST_START_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_IMC_POST_END_BKPT
    • +
+
Returns
True
+ +
+
+ +

◆ test_corrupt_crc_cal_crc_block_memory()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_invariable_memory.iec60730_imc.test_corrupt_crc_cal_crc_block_memory ( self)
+
+ +

Verify the DUT jump to sl_iec60730_safe_state when flash faied at BIST.

+

This TC simulates an abnormal situation that causes the variable iec60730_cur_crc to be changed, resulting in the calculated CRC value for the entire flash being different from the value stored in the flash. This leads to jump to break point at sl_iec60730_safe_state.

+

In the IMC documentation there is a detailed description of the variable iec60730_cur_crc.

+

Order of execution

+
Returns
True
+ +
+
+ +

◆ test_corrupt_crc_full_memory()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_invariable_memory.iec60730_imc.test_corrupt_crc_full_memory ( self)
+
+ +

Verify the DUT jump to sl_iec60730_safe_state when flash faied at POST.

+

This TC simulates an abnormal situation that causes the variable iec60730_ref_crc to be changed, resulting in the calculated CRC value for the entire flash being different from the value stored in the flash. This leads to jump to break point at sl_iec60730_safe_state.

+

In the IMC documentation there is a detailed description of the variable iec60730_ref_crc.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reaches breakpoint at IEC60730_IMC_POST_START_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT +
    • +
+
Returns
True
+ +
+
+ +

◆ test_corrupt_integrity_iec60730_run_crc_block_memory()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_invariable_memory.iec60730_imc.test_corrupt_integrity_iec60730_run_crc_block_memory ( self)
+
+ +

Verify integrity of iec60730_run_crc variable.

+

This TC simulates an abnormal situation that causes the variable iec60730_run_crc to be changed, resulting in the calculated CRC value for the entire flash being different from the value stored in the flash. This leads to jump to break point at sl_iec60730_safe_state.

+

In the IMC documentation there is a detailed description of the variable iec60730_run_crc.

+

Order of execution

+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/integration_test_iec60730_invariable_memory.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
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adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self)integration_test_iec60730_irq.iec60730_irq
test_irq_execution(self)integration_test_iec60730_irq.iec60730_irq
test_irq_out_of_bounds(self)integration_test_iec60730_irq.iec60730_irq
TEST_SUITE_NAMEintegration_test_iec60730_irq.iec60730_irqstatic
+ +
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+ + diff --git a/docs/document_api_iec60730_library/classintegration__test__iec60730__irq_1_1iec60730__irq.html b/docs/document_api_iec60730_library/classintegration__test__iec60730__irq_1_1iec60730__irq.html new file mode 100644 index 00000000..7eef3f4b --- /dev/null +++ b/docs/document_api_iec60730_library/classintegration__test__iec60730__irq_1_1iec60730__irq.html @@ -0,0 +1,228 @@ + + + + + + + +Document API IEC60730 Library: integration_test_iec60730_irq.iec60730_irq Class Reference + + + + + + + + + +
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integration_test_iec60730_irq.iec60730_irq Class Reference
IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » IRQ Automated Verification Tests
+
+
+ +

IEC60730 IRQ Plausibility Verification Tests. + More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 Set up connect device.
 
def test_irq_execution (self)
 Verify the DUT repeatedly executes the IRQ plausibility test, indicating no erroneous entry into safe state. More...
 
def test_irq_out_of_bounds (self)
 Verifies that the IRQ plausibility test forces entry into safe state when IRQs execute out-of-spec. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "IRQ"
 Text name of the test suite, used in XML output.
 
+ + + + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ logger
 
+ adapter
 
+

Detailed Description

+

IEC60730 IRQ Plausibility Verification Tests.

+

This class runs IEC60730 verification tests for the irq plausibility test.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_irq_execution()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_irq.iec60730_irq.test_irq_execution ( self)
+
+ +

Verify the DUT repeatedly executes the IRQ plausibility test, indicating no erroneous entry into safe state.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
      +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_irq_out_of_bounds()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_irq.iec60730_irq.test_irq_out_of_bounds ( self)
+
+ +

Verifies that the IRQ plausibility test forces entry into safe state when IRQs execute out-of-spec.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
    • +
  • Force value of interrupt count to be less than minimum
    • +
  • Verify safe state entrance
    • +
  • Reset
    • +
  • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
    • +
  • Force value of interrupt count to be higher than maximum
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT +
    • +
+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/integration_test_iec60730_irq.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
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This is the complete list of members for integration_test_iec60730_program_counter.iec60730_programme_counter, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + +
adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self)integration_test_iec60730_program_counter.iec60730_programme_counter
test_program_counter_execution(self)integration_test_iec60730_program_counter.iec60730_programme_counter
test_program_counter_too_slow(self)integration_test_iec60730_program_counter.iec60730_programme_counter
TEST_SUITE_NAMEintegration_test_iec60730_program_counter.iec60730_programme_counterstatic
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classintegration__test__iec60730__program__counter_1_1iec60730__programme__counter.html b/docs/document_api_iec60730_library/classintegration__test__iec60730__program__counter_1_1iec60730__programme__counter.html new file mode 100644 index 00000000..31810403 --- /dev/null +++ b/docs/document_api_iec60730_library/classintegration__test__iec60730__program__counter_1_1iec60730__programme__counter.html @@ -0,0 +1,223 @@ + + + + + + + +Document API IEC60730 Library: integration_test_iec60730_program_counter.iec60730_programme_counter Class Reference + + + + + + + + + +
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integration_test_iec60730_program_counter.iec60730_programme_counter Class Reference
IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » Program Counter Verification Tests
+
+
+ +

IEC60730 CPU Program counter Tests. + More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 Set up connect device.
 
def test_program_counter_execution (self)
 Verify the DUT repeatedly Program counter test, indicating Program counter correctly running. More...
 
def test_program_counter_too_slow (self)
 Verify the DUT repeatedly executes Program counter test, indicating Program counter enters safe state. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "PROGRAM COUNTER"
 Text name of the test suite, used in XML output.
 
+ + + + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ logger
 
+ adapter
 
+

Detailed Description

+

IEC60730 CPU Program counter Tests.

+

This class runs IEC60730 Program counter tests.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_program_counter_execution()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_program_counter.iec60730_programme_counter.test_program_counter_execution ( self)
+
+ +

Verify the DUT repeatedly Program counter test, indicating Program counter correctly running.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_PC_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_PC_BKPT
      +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_program_counter_too_slow()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_program_counter.iec60730_programme_counter.test_program_counter_too_slow ( self)
+
+ +

Verify the DUT repeatedly executes Program counter test, indicating Program counter enters safe state.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_PC_BKPT
    • +
  • Inject fault condition into Program counter flags
    • +
  • Verify code reaches breakpoint at iec60730_SafeState
      +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/integration_test_iec60730_program_counter.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classintegration__test__iec60730__system__clock_1_1iec60730__system__clock-members.html b/docs/document_api_iec60730_library/classintegration__test__iec60730__system__clock_1_1iec60730__system__clock-members.html new file mode 100644 index 00000000..3710628b --- /dev/null +++ b/docs/document_api_iec60730_library/classintegration__test__iec60730__system__clock_1_1iec60730__system__clock-members.html @@ -0,0 +1,102 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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integration_test_iec60730_system_clock.iec60730_system_clock Member List
+
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This is the complete list of members for integration_test_iec60730_system_clock.iec60730_system_clock, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + +
adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self)integration_test_iec60730_system_clock.iec60730_system_clock
TEST_SUITE_NAMEintegration_test_iec60730_system_clock.iec60730_system_clockstatic
test_system_clock_execution(self)integration_test_iec60730_system_clock.iec60730_system_clock
test_system_clock_out_of_bound(self)integration_test_iec60730_system_clock.iec60730_system_clock
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classintegration__test__iec60730__system__clock_1_1iec60730__system__clock.html b/docs/document_api_iec60730_library/classintegration__test__iec60730__system__clock_1_1iec60730__system__clock.html new file mode 100644 index 00000000..7c668e9c --- /dev/null +++ b/docs/document_api_iec60730_library/classintegration__test__iec60730__system__clock_1_1iec60730__system__clock.html @@ -0,0 +1,225 @@ + + + + + + + +Document API IEC60730 Library: integration_test_iec60730_system_clock.iec60730_system_clock Class Reference + + + + + + + + + +
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integration_test_iec60730_system_clock.iec60730_system_clock Class Reference
IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » System Clock Automated Verification Tests
+
+
+ +

IEC60730 System Clock Verification Tests. + More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 Set up connect device.
 
def test_system_clock_execution (self)
 Verify the DUT repeatedly executes the system clock test, indicating no erroneous entry into safe state. More...
 
def test_system_clock_out_of_bound (self)
 Verifies that the BIST system clock test enters safe state when out-of-bounds system clock is enabled. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "System Clock"
 Text name of the test suite, used in XML output.
 
+ + + + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ logger
 
+ adapter
 
+

Detailed Description

+

IEC60730 System Clock Verification Tests.

+

This class runs IEC60730 verification tests for the system clock test.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_system_clock_execution()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_system_clock.iec60730_system_clock.test_system_clock_execution ( self)
+
+ +

Verify the DUT repeatedly executes the system clock test, indicating no erroneous entry into safe state.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_SYSTEM_CLOCK_TICK_BKPT (to verify Clock counter is working).
    • +
  • Verify code reaches breakpoint at IEC60730_TEST_CLOCK_TICK_BKPT (To verify Clock counter is checked. Test finishes without stuck in safe state.).
      +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_system_clock_out_of_bound()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_system_clock.iec60730_system_clock.test_system_clock_out_of_bound ( self)
+
+ +

Verifies that the BIST system clock test enters safe state when out-of-bounds system clock is enabled.

+

The system clock test is validated by forcing a system clock frequency that runs low bound checked by the test. Testing validates that the system enters safe state after the system clock is forced low bound.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_SYSTEM_CLOCK_FREQ_ADJUSTMENT_BKPT
    • +
  • Force value of sl_iec60730_sys_clock_count to be out of bound
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT +
    • +
+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/integration_test_iec60730_system_clock.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc-members.html b/docs/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc-members.html new file mode 100644 index 00000000..0024fa87 --- /dev/null +++ b/docs/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc-members.html @@ -0,0 +1,109 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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integration_test_iec60730_variable_memory.iec60730_vmc Member List
+
+
+ +

This is the complete list of members for integration_test_iec60730_variable_memory.iec60730_vmc, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + +
adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
corruption(self, address=0, value=0, time=1, label='', label_pass='sl_iec60730_safe_state')integration_test_iec60730_variable_memory.iec60730_vmc
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
reach_to_breakpoint(self, label, setbkp, time)integration_test_iec60730_variable_memory.iec60730_vmc
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_breakpoint(self, label)integration_test_iec60730_variable_memory.iec60730_vmc
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self)integration_test_iec60730_variable_memory.iec60730_vmc
test_correct_background_full_ram(self)integration_test_iec60730_variable_memory.iec60730_vmc
test_correct_background_step_ram(self)integration_test_iec60730_variable_memory.iec60730_vmc
test_detect_corruption_full_ram(self)integration_test_iec60730_variable_memory.iec60730_vmc
test_detect_corruption_step_ram(self)integration_test_iec60730_variable_memory.iec60730_vmc
test_detect_failed_stack_test(self)integration_test_iec60730_variable_memory.iec60730_vmc
TEST_SUITE_NAMEintegration_test_iec60730_variable_memory.iec60730_vmcstatic
test_work_normally_stack_test(self)integration_test_iec60730_variable_memory.iec60730_vmc
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc.html b/docs/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc.html new file mode 100644 index 00000000..596b7029 --- /dev/null +++ b/docs/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc.html @@ -0,0 +1,513 @@ + + + + + + + +Document API IEC60730 Library: integration_test_iec60730_variable_memory.iec60730_vmc Class Reference + + + + + + + + + +
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integration_test_iec60730_variable_memory.iec60730_vmc Class Reference
IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » Variable Memory Automated Verification Tests
+
+
+ +

IEC60730 Variable Memory Plausibility Verification Tests. + More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 Set up connect device.
 
+def set_breakpoint (self, label)
 Set breakpoint.
 
+def reach_to_breakpoint (self, label, setbkp, time)
 Run to breakpoint.
 
+def corruption (self, address=0, value=0, time=1, label='', label_pass='sl_iec60730_safe_state')
 Corruption changes the value at the breakpoint label.
 
def test_correct_background_full_ram (self)
 Verify the DUT run step by step when testing full ram at POST. More...
 
def test_detect_corruption_full_ram (self)
 Verify the DUT jump to sl_iec60730_safe_state when testing ram failed at post. More...
 
def test_correct_background_step_ram (self)
 Verify the DUT run step by step when testing full ram at BIST. More...
 
def test_detect_corruption_step_ram (self)
 Verify the DUT jump to sl_iec60730_safe_state when testing ram failed at BIST. More...
 
def test_work_normally_stack_test (self)
 Verify the DUT run to check RAM and not failed at BIST. More...
 
def test_detect_failed_stack_test (self)
 Verify the DUT jump to sl_iec60730_safe_state when stack test failed at BIST. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "VMC"
 Text name of the test suite, used in XML output.
 
+ + + + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ logger
 
+ adapter
 
+

Detailed Description

+

IEC60730 Variable Memory Plausibility Verification Tests.

+

This class runs IEC60730 verification tests for the variable memory plausibility test.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_correct_background_full_ram()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_variable_memory.iec60730_vmc.test_correct_background_full_ram ( self)
+
+ +

Verify the DUT run step by step when testing full ram at POST.

+

This test case (TC) checks under normal conditions with no exceptions, VMC module DOES NOT raise issue.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_SAVE
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP1
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP2
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP3
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP4
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP5
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP6
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_RESTORE
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_MARCH_RET
    • +
  • Verify code reaches breakpoint at IEC60730_VMC_POST_MARCHC_STEP_BKPT
    • +
+

This process in loop with coditon iec60730_rt_check < RAMTEST_END. In case this condition is not satisfied, clear all break point and verify

+
    +
  • Verify code reaches breakpoint at IEC60730_VMC_POST_CHECK_BKBUF_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF1
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF2
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF3
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF4
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF5
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF6
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_MARCH_RET
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_RET
    • +
+
Returns
True
+ +
+
+ +

◆ test_correct_background_step_ram()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_variable_memory.iec60730_vmc.test_correct_background_step_ram ( self)
+
+ +

Verify the DUT run step by step when testing full ram at BIST.

+

This TC checks under normal conditions with no exceptions, vmc module DOES NOT raise issue.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT
    • +
+

The loop with coditon iec60730_rt_check < RAMTEST_END

    +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_SAVE
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP1
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP2
    • +
  • if not enable MatchX
      +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP3
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP4
      • +
    +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP5
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP6
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_RESTORE
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_MARCH_RET
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_RET
    • +
  • Verify code reaches breakpoint at IEC60730_VMC_BIST_MARCHC_STEP_BKPT
    • +
+

In case condition is not satisfied, clear all break point and verify

+
    +
  • Verify code reaches breakpoint at IEC60730_IMC_BIST_CHECK_BKBUF_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF1
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF2
    • +
  • if not enable MatchX
      +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF3
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF4
      • +
    +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF5
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF6
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_MARCH_RET
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_RET
    • +
+
Returns
True
+ +
+
+ +

◆ test_detect_corruption_full_ram()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_variable_memory.iec60730_vmc.test_detect_corruption_full_ram ( self)
+
+ +

Verify the DUT jump to sl_iec60730_safe_state when testing ram failed at post.

+

This TC simulates an abnormal situation that causes the iec60730_rt_check, and iec60730_bk_buf variables to be changed. This leads to jump to break point at sl_iec60730_safe_state.

+

In the VMC documentation there is a detailed description of the iec60730_rt_check, and iec60730_bk_buf variables.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP2. We don't reach IEC60730_MARCHC_STEP_STEP1 because this step only write (W1) +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP3 +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP4 +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP5 +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP6 +
    • +
  • Verify code reaches breakpoint at IEC60730_VMC_POST_CHECK_BKBUF_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF2. We don't reach IEC60730_MARCHC_STEP_BUFF1 because this step only write (W1) +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF3 +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF4 +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF5 +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF6 +
    • +
+
Returns
True
+ +
+
+ +

◆ test_detect_corruption_step_ram()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_variable_memory.iec60730_vmc.test_detect_corruption_step_ram ( self)
+
+ +

Verify the DUT jump to sl_iec60730_safe_state when testing ram failed at BIST.

+

This TC simulates an abnormal situation that causes the variable iec60730_rt_check, iec60730_bk_buf to be changed. This leads to jump to break point at sl_iec60730_safe_state.

+

In the VMC documentation there is a detailed description of the iec60730_rt_check, and iec60730_bk_buf variables.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP2. We don't reach IEC60730_MARCHXC_STEP_STEP1 because this step only write (W1) +
    • +
  • if not enable MatchX +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP5 +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP6 +
    • +
  • Verify code reaches breakpoint at IEC60730_IMC_BIST_CHECK_BKBUF_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF2. We don't reach IEC60730_MARCHXC_STEP_BUFF1 because this step only write (W1) +
    • +
  • if not enable MatchX +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF6 +
    • +
  • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF6 +
    • +
+
Returns
True
+ +
+
+ +

◆ test_detect_failed_stack_test()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_variable_memory.iec60730_vmc.test_detect_failed_stack_test ( self)
+
+ +

Verify the DUT jump to sl_iec60730_safe_state when stack test failed at BIST.

+

This TC simulates an abnormal situation that causes the variable iec60730_stack_test_over_flow to be changed. This leads to jump to break point at sl_iec60730_safe_state.

+

In the VMC documentation there is a detailed description of the variable iec60730_stack_test_over_flow.

+

Order of execution

+
Returns
True
+ +
+
+ +

◆ test_work_normally_stack_test()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_variable_memory.iec60730_vmc.test_work_normally_stack_test ( self)
+
+ +

Verify the DUT run to check RAM and not failed at BIST.

+

This TC checks under normal conditions with no exceptions, vmc module DOES NOT raise issue.

+

Order of execution

    +
  • Reset device
    • +
  • Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_VMC_BIST_STACK_TEST_OK_BKPT
    • +
+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/integration_test_iec60730_variable_memory.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
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integration_test_iec60730_watchdog.iec60730_watchdog Member List
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This is the complete list of members for integration_test_iec60730_watchdog.iec60730_watchdog, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + +
adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
clear_rst_causes(self)integration_test_iec60730_watchdog.iec60730_watchdog
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
setUp(self)integration_test_iec60730_watchdog.iec60730_watchdog
TEST_SUITE_NAMEintegration_test_iec60730_watchdog.iec60730_watchdogstatic
test_tc1_watchdog_por_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
test_tc2_watchdog_counter_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
test_tc3_watchdog_wrong_rst_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
test_tc4_watchdog_wrong_testing_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
test_tc5_restart_watchdog_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
wdog_power_cycle(self)integration_test_iec60730_watchdog.iec60730_watchdog
wdog_test_running_enable(self)integration_test_iec60730_watchdog.iec60730_watchdog
+ +
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+Public Member Functions | +Static Public Attributes | +List of all members
+
+
integration_test_iec60730_watchdog.iec60730_watchdog Class Reference
IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » Watchdog Automated Verification Tests
+
+
+ +

IEC60730 Watchdog Verification Tests. + More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def setUp (self)
 Set up connect device.
 
+def clear_rst_causes (self)
 Clear reset cause register.
 
+def wdog_test_running_enable (self)
 Allows to start running test watchdog.
 
+def wdog_power_cycle (self)
 Reset watchdog by power on by sending command to hostIP.
 
def test_tc1_watchdog_por_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
def test_tc2_watchdog_counter_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
def test_tc3_watchdog_wrong_rst_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
def test_tc4_watchdog_wrong_testing_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
def test_tc5_restart_watchdog_execution (self)
 Verify the DUT follows the watchdog timer POST test logic correctly. More...
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + +

+Static Public Attributes

+string TEST_SUITE_NAME = "Watchdog"
 Text name of the test suite, used in XML output.
 
+ + + + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ logger
 
+ adapter
 
+

Detailed Description

+

IEC60730 Watchdog Verification Tests.

+

This class runs IEC60730 verification tests for the watchdog.

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+

Member Function Documentation

+ +

◆ test_tc1_watchdog_por_execution()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc1_watchdog_por_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_POR_RESET_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TIMEOUT_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_END_BKPT
      +
    • Verify the Watchdog status is SL_IEC60730_WATCHDOG_VALID
      • +
    • Verify the Watchdog status saved to BURAM is SL_IEC60730_WATCHDOG_VALID (On EFR32 series 2 only)
      • +
    • Code correctly tested watchdog timer and watchdog reset trigger, enters main loop
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_tc2_watchdog_counter_execution()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc2_watchdog_counter_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly enters safe state
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_tc3_watchdog_wrong_rst_execution()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc3_watchdog_wrong_rst_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly enters safe state
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_tc4_watchdog_wrong_testing_execution()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc4_watchdog_wrong_testing_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_WORKING_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly enters safe state
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+ +

◆ test_tc5_restart_watchdog_execution()

+ +
+
+ + + + + + + + +
def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc5_restart_watchdog_execution ( self)
+
+ +

Verify the DUT follows the watchdog timer POST test logic correctly.

+

Order of execution:

    +
  • Verify code reaches breakpoint at IEC60730_TEST_RESTART_WDOG_BKPT
    • +
  • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
      +
    • Code correctly enters safe state
      • +
    • Test passes, return True
      • +
    +
    • +
+
Returns
True
+ +
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/integration_test_iec60730_watchdog.py
    • +
+
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__init__(self, lib_path) (defined in jlink.JLinkDll)jlink.JLinkDll
abort(self, errMsg) (defined in jlink.JLinkDll)jlink.JLinkDll
clear_all_breakpoints(self) (defined in jlink.JLinkDll)jlink.JLinkDll
clear_breakpoint(self, bp_to_clear)jlink.JLinkDll
close(self)jlink.JLinkDll
connect(self, serial_number, chip_name) (defined in jlink.JLinkDll)jlink.JLinkDll
download(self, image, offset=0) (defined in jlink.JLinkDll)jlink.JLinkDll
erase_chip(self)jlink.JLinkDll
ErrorOutHandler(cls, errorMsg)jlink.JLinkDll
execute_command(self, command_string)jlink.JLinkDll
get_adapter_list(self)jlink.JLinkDll
get_device_family(self) (defined in jlink.JLinkDll)jlink.JLinkDll
get_id(self)jlink.JLinkDll
get_id_data(self)jlink.JLinkDll
get_speed(self)jlink.JLinkDll
get_speed_info(self)jlink.JLinkDll
get_tcp_ip_adapter_list(self)jlink.JLinkDll
get_usb_adapter_list(self)jlink.JLinkDll
go_ex(self)jlink.JLinkDll
halt(self) (defined in jlink.JLinkDll)jlink.JLinkDll
halted(self)jlink.JLinkDll
MAX_BUF_SIZE (defined in jlink.JLinkDll)jlink.JLinkDllstatic
MAX_NUM_ADAPTERS (defined in jlink.JLinkDll)jlink.JLinkDllstatic
MAX_NUM_CPU_REGISTERS (defined in jlink.JLinkDll)jlink.JLinkDllstatic
memory_read(self, addr, num_units, zone=None, nbits=None)jlink.JLinkDll
memory_read16(self, addr, num_halfwords, zone=None)jlink.JLinkDll
memory_read32(self, addr, num_words, zone=None)jlink.JLinkDll
memory_read64(self, addr, num_long_words)jlink.JLinkDll
memory_read8(self, addr, num_bytes, zone=None)jlink.JLinkDll
memory_write(self, addr, data, zone=None, nbits=None)jlink.JLinkDll
memory_write16(self, addr, data, zone=None)jlink.JLinkDll
memory_write32(self, addr, data, zone=None)jlink.JLinkDll
memory_write64(self, addr, data, zone=None)jlink.JLinkDll
memory_write8(self, addr, data, zone=None)jlink.JLinkDll
num_active_breakpoints(self)jlink.JLinkDll
read_mem(self, address, num_bytes) (defined in jlink.JLinkDll)jlink.JLinkDll
read_ram_arm_16(self, address, num_words) (defined in jlink.JLinkDll)jlink.JLinkDll
read_ram_arm_32(self, address, num_words) (defined in jlink.JLinkDll)jlink.JLinkDll
read_ram_arm_64(self, address, num_words)jlink.JLinkDll
read_ram_arm_8(self, address, num_bytes) (defined in jlink.JLinkDll)jlink.JLinkDll
register_list(self)jlink.JLinkDll
register_name(self, register_index)jlink.JLinkDll
register_read(self, register_index)jlink.JLinkDll
register_write(self, reg_index, value)jlink.JLinkDll
reset(self, halt=True)jlink.JLinkDll
run_to_breakpoint(self, timeout) (defined in jlink.JLinkDll)jlink.JLinkDll
set_breakpoint(self, address, typeflags)jlink.JLinkDll
set_device(self, device) (defined in jlink.JLinkDll)jlink.JLinkDll
set_max_speed(self)jlink.JLinkDll
set_speed(self, speed=4000)jlink.JLinkDll
step(self) (defined in jlink.JLinkDll)jlink.JLinkDll
WarnOutHandler(cls, warnMsg)jlink.JLinkDll
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classjlink_1_1JLinkDll.html b/docs/document_api_iec60730_library/classjlink_1_1JLinkDll.html new file mode 100644 index 00000000..0f4b879a --- /dev/null +++ b/docs/document_api_iec60730_library/classjlink_1_1JLinkDll.html @@ -0,0 +1,1459 @@ + + + + + + + +Document API IEC60730 Library: jlink.JLinkDll Class Reference + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Public Member Functions | +Static Public Attributes | +List of all members
+
+
jlink.JLinkDll Class Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

+def __init__ (self, lib_path)
 
+def abort (self, errMsg)
 
def execute_command (self, command_string)
 
def get_usb_adapter_list (self)
 
def get_tcp_ip_adapter_list (self)
 
def get_adapter_list (self)
 
+def connect (self, serial_number, chip_name)
 
def close (self)
 
def get_speed (self)
 
def set_max_speed (self)
 
def set_speed (self, speed=4000)
 
def get_speed_info (self)
 
def get_id (self)
 
def get_id_data (self)
 
def halted (self)
 
+def run_to_breakpoint (self, timeout)
 
def go_ex (self)
 
+def step (self)
 
+def halt (self)
 
def reset (self, halt=True)
 
+def get_device_family (self)
 
+def set_device (self, device)
 
+def read_mem (self, address, num_bytes)
 
+def read_ram_arm_8 (self, address, num_bytes)
 
+def read_ram_arm_16 (self, address, num_words)
 
+def read_ram_arm_32 (self, address, num_words)
 
def read_ram_arm_64 (self, address, num_words)
 
def clear_breakpoint (self, bp_to_clear)
 
+def clear_all_breakpoints (self)
 
def register_name (self, register_index)
 
def register_list (self)
 
def register_read (self, register_index)
 
def register_write (self, reg_index, value)
 
def num_active_breakpoints (self)
 
def set_breakpoint (self, address, typeflags)
 
def memory_read (self, addr, num_units, zone=None, nbits=None)
 
def memory_read8 (self, addr, num_bytes, zone=None)
 
def memory_read16 (self, addr, num_halfwords, zone=None)
 
def memory_read32 (self, addr, num_words, zone=None)
 
def memory_read64 (self, addr, num_long_words)
 
def memory_write (self, addr, data, zone=None, nbits=None)
 
def memory_write8 (self, addr, data, zone=None)
 
def memory_write16 (self, addr, data, zone=None)
 
def memory_write32 (self, addr, data, zone=None)
 
def memory_write64 (self, addr, data, zone=None)
 
def erase_chip (self)
 
+def download (self, image, offset=0)
 
def ErrorOutHandler (cls, errorMsg)
 
def WarnOutHandler (cls, warnMsg)
 
+ + + + + + + +

+Static Public Attributes

+int MAX_BUF_SIZE = 336
 
+int MAX_NUM_ADAPTERS = 32
 
+int MAX_NUM_CPU_REGISTERS = 256
 
+

Detailed Description

+
Object for accessing and controlling a JLink adapter
+

Member Function Documentation

+ +

◆ clear_breakpoint()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.clear_breakpoint ( self,
 bp_to_clear 
)
+
+
Clears breakpoint on the connected device.
+
+Keyword arguments:
+bp_to_clear - Handle of the breakpoint to clear.
+    Pass JLINKARM_BP_HANDLE_ALL to clear all breakpoints.
+
+
+
+ +

◆ close()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.close ( self)
+
+
Closes the connection to the JLink adapter.
+
+
+
+ +

◆ erase_chip()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.erase_chip ( self)
+
+
Erases all user flash on the connected device.
+
+
+
+ +

◆ ErrorOutHandler()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.ErrorOutHandler ( cls,
 errorMsg 
)
+
+
Log error from the DLL.
+
+:param errorMsg: The DLL error message.
+
+
+
+ +

◆ execute_command()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.execute_command ( self,
 command_string 
)
+
+
Execute a JLink command string.
+
+Keyword arguments:
+command_string -- the string to execute with JLINKARM_ExecCommand()
+
+Returns the return value of the executed command.
+
+
+
+ +

◆ get_adapter_list()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_adapter_list ( self)
+
+
Returns a list of all adapters connected to the host via TCP/IP or USB.
+
+
+
+ +

◆ get_id()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_id ( self)
+
+
Retrieves ID of the core.
+
+
+
+ +

◆ get_id_data()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_id_data ( self)
+
+
Retrieves detailed info of the device on the JTAG bus.
+
+
+
+ +

◆ get_speed()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_speed ( self)
+
+
Returns the current JTAG connection speed.
+
+
+
+ +

◆ get_speed_info()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_speed_info ( self)
+
+
Gets the target interface speed information.
+
+Returns a dictionary containing the speed information.
+
+
+
+ +

◆ get_tcp_ip_adapter_list()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_tcp_ip_adapter_list ( self)
+
+
Returns a list of all adapters connected to the host via TCP/IP.
+
+
+
+ +

◆ get_usb_adapter_list()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.get_usb_adapter_list ( self)
+
+
Returns a list of all adapters connected to the host via USB.
+
+
+
+ +

◆ go_ex()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.go_ex ( self)
+
+
Runs the currently connected device, skipping over any breakpoint at the current instruction.
+
+
+
+ +

◆ halted()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.halted ( self)
+
+
Returns whether the CPU core was halted.
+
+Args:
+  self (JLink): the ``JLink`` instance
+
+Returns:
+  ``True`` if the CPU core is halted, otherwise ``False``.
+
+Raises:
+  JLinkException: on device errors.
+
+
+
+ +

◆ memory_read()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read ( self,
 addr,
 num_units,
 zone = None,
 nbits = None 
)
+
+
Reads memory from a target system or specific memory zone.
+
+The optional ``zone`` specifies a memory zone to access to read from,
+e.g. ``IDATA``, ``DDATA``, or ``CODE``.
+
+The given number of bits, if provided, must be either ``8``, ``16``, or
+``32``.  If not provided, always reads ``num_units`` bytes.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_units (int): number of units to read
+  zone (str): optional memory zone name to access
+  nbits (int): number of bits to use for each unit
+
+Returns:
+  List of units read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read.
+  ValueError: if ``nbits`` is not ``None``, and not in ``8``, ``16``,
+    or ``32``.
+
+
+
+ +

◆ memory_read16()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read16 ( self,
 addr,
 num_halfwords,
 zone = None 
)
+
+
Reads memory from the target system in units of 16-bits.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_halfwords (int): number of half words to read
+  zone (str): memory zone to read from
+
+Returns:
+  List of halfwords read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read
+
+
+
+ +

◆ memory_read32()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read32 ( self,
 addr,
 num_words,
 zone = None 
)
+
+
Reads memory from the target system in units of 32-bits.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_words (int): number of words to read
+  zone (str): memory zone to read from
+
+Returns:
+  List of words read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read
+
+
+
+ +

◆ memory_read64()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read64 ( self,
 addr,
 num_long_words 
)
+
+
Reads memory from the target system in units of 64-bits.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_long_words (int): number of long words to read
+
+Returns:
+  List of long words read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read
+
+
+
+ +

◆ memory_read8()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_read8 ( self,
 addr,
 num_bytes,
 zone = None 
)
+
+
Reads memory from the target system in units of bytes.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_bytes (int): number of bytes to read
+  zone (str): memory zone to read from
+
+Returns:
+  List of bytes read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read.
+
+
+
+ +

◆ memory_write()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write ( self,
 addr,
 data,
 zone = None,
 nbits = None 
)
+
+
Writes memory to a target system or specific memory zone.
+
+The optional ``zone`` specifies a memory zone to access to write to,
+e.g. ``IDATA``, ``DDATA``, or ``CODE``.
+
+The given number of bits, if provided, must be either ``8``, ``16``, or
+``32``.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of data units to write
+  zone (str): optional memory zone name to access
+  nbits (int): number of bits to use for each unit
+
+Returns:
+  Number of units written.
+
+Raises:
+  JLinkException: on write hardware failure.
+  ValueError: if ``nbits`` is not ``None``, and not in ``8``, ``16`` or
+    ``32``.
+
+
+
+ +

◆ memory_write16()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write16 ( self,
 addr,
 data,
 zone = None 
)
+
+
Writes half-words to memory of a target system.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of half-words to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of half-words written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
+
+
+ +

◆ memory_write32()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write32 ( self,
 addr,
 data,
 zone = None 
)
+
+
Writes words to memory of a target system.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of words to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of words written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
+
+
+ +

◆ memory_write64()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write64 ( self,
 addr,
 data,
 zone = None 
)
+
+
Writes long words to memory of a target system.
+
+Note:
+  This is little-endian.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of long words to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of long words written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
+
+
+ +

◆ memory_write8()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.memory_write8 ( self,
 addr,
 data,
 zone = None 
)
+
+
Writes bytes to memory of a target system.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of bytes to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of bytes written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
+
+
+ +

◆ num_active_breakpoints()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.num_active_breakpoints ( self)
+
+
Returns the number of currently active breakpoints.
+
+Args:
+  self (JLink): the ``JLink`` instance
+
+Returns:
+  The number of breakpoints that are currently set.
+
+
+
+ +

◆ read_ram_arm_64()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.read_ram_arm_64 ( self,
 address,
 num_words 
)
+
+
Reads a block of RAM in 64-bit words.
+
+Keyword arguments:
+address -- starting address to read
+num_words -- number of 64-bit words to read
+
+
+
+ +

◆ register_list()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.register_list ( self)
+
+
Returns a list of the indices for the CPU registers.
+
+The returned indices can be used to read the register content or grab
+the register name.
+
+Args:
+  self (JLink): the ``JLink`` instance
+
+Returns:
+  List of registers.
+
+
+
+ +

◆ register_name()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.register_name ( self,
 register_index 
)
+
+
Retrieves and returns the name of an ARM CPU register.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  register_index (int): index of the register whose name to retrieve
+
+Returns:
+  Name of the register.
+
+
+
+ +

◆ register_read()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.register_read ( self,
 register_index 
)
+
+
Reads the value from the given register.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  register_index (int/str): the register to read
+
+Returns:
+  The value stored in the given register.
+
+
+
+ +

◆ register_write()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.register_write ( self,
 reg_index,
 value 
)
+
+
Writes into an ARM register.
+
+Note:
+  The data is not immediately written, but is cached before being
+  transferred to the CPU on CPU start.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  reg_index (int/str): the ARM register to write to
+  value (int): the value to write to the register
+
+Returns:
+  The value written to the ARM register.
+
+Raises:
+  JLinkException: on write error.
+
+
+
+ +

◆ reset()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.reset ( self,
 halt = True 
)
+
+
Resets the currently connected device.
+
+Keyword arguments:
+halt -- if true, the part will be halted before reset
+if false, the part will not be halted before reset
+
+
+
+ +

◆ set_breakpoint()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.set_breakpoint ( self,
 address,
 typeflags 
)
+
+
Set a breakpoint within the CPU.
+
+address - Address for the breakpoint.
+typeflags - Flags for the breakpoint.  Ignored for EFM8 devices.
+
+
+
+ +

◆ set_max_speed()

+ +
+
+ + + + + + + + +
def jlink.JLinkDll.set_max_speed ( self)
+
+
Sets the JTAG connection speed to its maximum value.
+
+
+
+ +

◆ set_speed()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.set_speed ( self,
 speed = 4000 
)
+
+
Sets the JTAG connection speed.
+
+Keyword arguments:
+speed -- speed of JTAG connection in kHz.
+
+
+
+ +

◆ WarnOutHandler()

+ +
+
+ + + + + + + + + + + + + + + + + + +
def jlink.JLinkDll.WarnOutHandler ( cls,
 warnMsg 
)
+
+
Log warning from the DLL.
+
+:param warnMsg: The DLL error message.
+
+
+
+
The documentation for this class was generated from the following file:
    +
  • test/test_script/jlink.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct-members.html b/docs/document_api_iec60730_library/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct-members.html new file mode 100644 index 00000000..b01edcb5 --- /dev/null +++ b/docs/document_api_iec60730_library/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct-members.html @@ -0,0 +1,82 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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+ + + + + + +
+
Document API IEC60730 Library +
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jlink_constants.JLinkArmEmuConnectInfo_CStruct Member List
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This is the complete list of members for jlink_constants.JLinkArmEmuConnectInfo_CStruct, including all inherited members.

+
+ +
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+ + diff --git a/docs/document_api_iec60730_library/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct.html b/docs/document_api_iec60730_library/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct.html new file mode 100644 index 00000000..5b09398c --- /dev/null +++ b/docs/document_api_iec60730_library/classjlink__constants_1_1JLinkArmEmuConnectInfo__CStruct.html @@ -0,0 +1,86 @@ + + + + + + + +Document API IEC60730 Library: jlink_constants.JLinkArmEmuConnectInfo_CStruct Class Reference + + + + + + + + + +
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+
+
jlink_constants.JLinkArmEmuConnectInfo_CStruct Class Reference
+
+
+

Detailed Description

+
JLINKARM_EMU_CONNECT_INFO struct
The documentation for this class was generated from the following file:
    +
  • test/test_script/jlink_constants.py
    • +
+
+ +
+Generated by   +doxygen + 1.8.17 +
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JLINKARM_EMU_CONNECT_INFO struct
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JLINKARM_SPEED_INFO struct
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adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
get_unit_test_result(self) (defined in unit_test_iec60730_get_report.iec60730_unit_test_result)unit_test_iec60730_get_report.iec60730_unit_test_result
get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
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IEC60730 get unit test result. + More...

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+Public Member Functions

+def get_unit_test_result (self)
 
- Public Member Functions inherited from iec60730_test_base.iec60730TestBase
+def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
 
+def init_connect_group (self)
 
+def connect_mcu (self, chip_name)
 
+def re_connect_mcu (self)
 
+def adapter_close (self)
 
+def flash_mcu (self)
 
+def erase_mcu (self)
 
+def scan_adapter (self, serial_number, chip_name)
 
+def pre_exec_test (self)
 
+def post_exec_test (self)
 
+def get_variable_address (self, relative_path, var_name)
 
+def get_label (self, address)
 
+def set_chip_name (self, chip_name)
 
+ + + + + + +

+Additional Inherited Members

- Public Attributes inherited from iec60730_test_base.iec60730TestBase
+ logger
 
+ adapter
 
+

Detailed Description

+

IEC60730 get unit test result.

+

This class runs IEC60730 get unit test results

+

Hardware setup: Connect DUT to PC. No additional hardware setup required.

+
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__init__(self, xmlDir=None) (defined in util.PyTestSuites)util.PyTestSuites
abort_test_suite(self) (defined in util.PyTestSuites)util.PyTestSuites
assume(self, statement, level=1) (defined in util.PyTestSuites)util.PyTestSuites
close_test_suite(self) (defined in util.PyTestSuites)util.PyTestSuites
complete_test_case(self) (defined in util.PyTestSuites)util.PyTestSuites
insert_test_case(self, testName, testClass, testResult=None, file=None) (defined in util.PyTestSuites)util.PyTestSuites
log_test(self, msg) (defined in util.PyTestSuites)util.PyTestSuites
store_log(self, msg) (defined in util.PyTestSuites)util.PyTestSuites
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+def __init__ (self, xmlDir=None)
 
+def store_log (self, msg)
 
+def log_test (self, msg)
 
+def close_test_suite (self)
 
+def complete_test_case (self)
 
+def insert_test_case (self, testName, testClass, testResult=None, file=None)
 
+def abort_test_suite (self)
 
+def assume (self, statement, level=1)
 
+
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__init__(self, logService=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
clear_binding_table(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
close_device_connection(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
close_host_connection(self, hide=None)util.TelnetHostUtil
device_read_until(self, expectStr, timeout) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
device_send(self, cmd, timeout=None, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
device_send_expect(self, cmd, expectStr, timeout=None, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
device_send_no_socket_ret(self, cmd, timeout=None, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
host_send(self, cmd, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
host_send_expect(self, cmd, expectStr, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
is_host_connected(self) (defined in util.TelnetHostUtil)util.TelnetHostUtil
leave_nwk_and_reset_device(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
log(self, msg, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
open_device_connection(self, hostName, hostPort=None, timeout=30, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
open_host_connection(self, hostName=None, hostPort=None, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
reset_device(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
write_log(self, msg, hide=None, logAsResult=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
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+def __init__ (self, logService=None)
 
+def log (self, msg, hide=None)
 
+def open_device_connection (self, hostName, hostPort=None, timeout=30, hide=None)
 
+def close_device_connection (self, hide=None)
 
+def leave_nwk_and_reset_device (self, hide=None)
 
+def reset_device (self, hide=None)
 
+def clear_binding_table (self, hide=None)
 
+def device_read_until (self, expectStr, timeout)
 
+def device_send (self, cmd, timeout=None, hide=None)
 
+def device_send_expect (self, cmd, expectStr, timeout=None, hide=None)
 
+def device_send_no_socket_ret (self, cmd, timeout=None, hide=None)
 
- Public Member Functions inherited from util.TelnetHostUtil
+def open_host_connection (self, hostName=None, hostPort=None, timeout=None, hide=None)
 
+def host_send_expect (self, cmd, expectStr, timeout=None, hide=None)
 
+def host_send (self, cmd, timeout=None, hide=None)
 
+def write_log (self, msg, hide=None, logAsResult=None)
 
+def close_host_connection (self, hide=None)
 Helper methods.
 
+def is_host_connected (self)
 
+
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  • test/test_script/util.py
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__init__(self, logService=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
close_host_connection(self, hide=None)util.TelnetHostUtil
host_send(self, cmd, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
host_send_expect(self, cmd, expectStr, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
is_host_connected(self) (defined in util.TelnetHostUtil)util.TelnetHostUtil
log(self, msg, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
open_host_connection(self, hostName=None, hostPort=None, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
write_log(self, msg, hide=None, logAsResult=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
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+def __init__ (self, logService=None)
 
+def open_host_connection (self, hostName=None, hostPort=None, timeout=None, hide=None)
 
+def host_send_expect (self, cmd, expectStr, timeout=None, hide=None)
 
+def host_send (self, cmd, timeout=None, hide=None)
 
+def log (self, msg, hide=None)
 
+def write_log (self, msg, hide=None, logAsResult=None)
 
+def close_host_connection (self, hide=None)
 Helper methods.
 
+def is_host_connected (self)
 
+
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__init__(self) (defined in util.TimeStampUtil)util.TimeStampUtil
convert_time_to_readable(self, timeIn) (defined in util.TimeStampUtil)util.TimeStampUtil
get_absolute_time(self) (defined in util.TimeStampUtil)util.TimeStampUtil
get_total_running_time(self) (defined in util.TimeStampUtil)util.TimeStampUtil
update_startUp_time(self) (defined in util.TimeStampUtil)util.TimeStampUtil
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+def __init__ (self)
 
+def update_startUp_time (self)
 
+def get_absolute_time (self)
 
+def get_total_running_time (self)
 
+def convert_time_to_readable (self, timeIn)
 
+
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file  app.h [code]
 Top level application functions.
 
file  unit_test_common.h [code]
 common unit test api
 
file  unit_test_iec60730_bist.h [code]
 Unit test function sl_iec60730_bist().
 
file  unit_test_iec60730_cpu_registers.h [code]
 Unit tests for functions in cpu registers module.
 
file  unit_test_iec60730_invariable_memory.h [code]
 Unit tests for functions in invariable memory module.
 
file  unit_test_iec60730_irq.h [code]
 Unit tests for functions in irq module.
 
file  unit_test_iec60730_post.h [code]
 Unit test function sl_iec60730_post().
 
file  unit_test_iec60730_program_counter.h [code]
 Unit test function sl_iec60730_program_counter_test().
 
file  unit_test_iec60730_safety_check.h [code]
 Unit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().
 
file  unit_test_iec60730_system_clock.h [code]
 Unit tests for functions in system_clock module.
 
file  unit_test_iec60730_variable_memory.h [code]
 Unit tests for functions in variable memory module.
 
file  unit_test_iec60730_watchdog.h [code]
 Unit tests for functions in watchdog module.
 
+
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file  sl_iec60730_config.h [code]
 Library configuration.
 
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+Files

file  sl_iec60730.h [code]
 Library definitions.
 
file  sl_iec60730_comm.h [code]
 Comm check.
 
file  sl_iec60730_cpu_registers.h [code]
 CPU Registers check.
 
file  sl_iec60730_internal.h [code]
 Internal definitions.
 
file  sl_iec60730_invariable_memory.h [code]
 Invariable memory check.
 
file  sl_iec60730_irq.h [code]
 Interrupt check.
 
file  sl_iec60730_library_documentation.h [code]
 Library Documentation.
 
file  sl_iec60730_program_counter.h [code]
 Program Counter check.
 
file  sl_iec60730_system_clock.h [code]
 Clock check.
 
file  sl_iec60730_toolchain.h [code]
 Compiler abstraction.
 
file  sl_iec60730_variable_memory.h [code]
 Variable memory check.
 
file  sl_iec60730_watchdog.h [code]
 Watchdog check.
 
+
+ +
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+ -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} +.paramname code { + line-height: 14px; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname, .tparams .paramname, .exception .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype, .tparams .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir, .tparams .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #728DC1; + border-top:1px solid #5373B4; + border-left:1px solid #5373B4; + border-right:1px solid #C4CFE5; + border-bottom:1px solid #C4CFE5; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; + vertical-align: middle; +} + + + +/* @end */ + +/* these are for tree view inside a (index) page */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #9CAFD4; + border-bottom: 1px solid #9CAFD4; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; + padding-top: 3px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.entry a img { + border: none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + padding-top: 3px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3D578C; +} + +.arrow { + color: #9CAFD4; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; + cursor: pointer; + font-size: 80%; + display: inline-block; + width: 16px; + height: 22px; +} + +.icon { + font-family: Arial, Helvetica; + font-weight: bold; + font-size: 12px; + height: 14px; + width: 16px; + display: inline-block; + background-color: #728DC1; + color: white; + text-align: center; + border-radius: 4px; + margin-left: 2px; + margin-right: 2px; +} + +.icona { + width: 24px; + height: 22px; + display: inline-block; +} + +.iconfopen { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('folderopen.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +.iconfclosed { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('folderclosed.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +.icondoc { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('doc.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +table.directory { + font: 400 14px Roboto,sans-serif; +} + +/* @end */ + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #2A3D61; +} + +table.doxtable caption { + caption-side: top; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + /*width: 100%;*/ + margin-bottom: 10px; + border: 1px solid #A8B8D9; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + vertical-align: top; +} + +.fieldtable td.fieldname { + padding-top: 3px; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A8B8D9; + /*width: 100%;*/ +} + +.fieldtable td.fielddoc p:first-child { + margin-top: 0px; +} + +.fieldtable td.fielddoc p:last-child { + margin-bottom: 2px; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + font-size: 90%; + color: #253555; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + font-weight: 400; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A8B8D9; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + background-position: 0 -5px; + height:30px; + line-height:30px; + color:#8AA0CC; + border:solid 1px #C2CDE4; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#364D7C; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #283A5D; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; +} + +.navpath li.navelem a:hover +{ + color:#6884BD; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#364D7C; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +table.classindex +{ + margin: 10px; + white-space: nowrap; + margin-left: 3%; + margin-right: 3%; + width: 94%; + border: 0; + border-spacing: 0; + padding: 0; +} + +div.ingroups +{ + font-size: 8pt; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C4CFE5; +} + +div.headertitle +{ + padding: 5px 5px 5px 10px; +} + +.PageDocRTL-title div.headertitle { + text-align: right; + direction: rtl; +} + +dl { + padding: 0 0 0 0; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug, dl.examples */ +dl.section { + margin-left: 0px; + padding-left: 0px; +} + +dl.section.DocNodeRTL { + margin-right: 0px; + padding-right: 0px; +} + +dl.note { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #D0C000; +} + +dl.note.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #FF0000; +} + +dl.warning.DocNodeRTL, dl.attention.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #00D000; +} + +dl.pre.DocNodeRTL, dl.post.DocNodeRTL, dl.invariant.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #00D000; +} + +dl.deprecated { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #505050; +} + +dl.deprecated.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #505050; +} + +dl.todo { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #00C0E0; +} + +dl.todo.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #00C0E0; +} + +dl.test { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #3030E0; +} + +dl.test.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #3030E0; +} + +dl.bug { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #C08050; +} + +dl.bug.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectalign +{ + vertical-align: middle; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5373B4; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.plantumlgraph +{ + text-align: center; +} + +.diagraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #90A5CE; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#334975; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D8DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 8px 10px 10px; + width: 200px; +} + +.PageDocRTL-title div.toc { + float: left !important; + text-align: right; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +.PageDocRTL-title div.toc li { + background-position-x: right !important; + padding-left: 0 !important; + padding-right: 10px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4665A2; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.PageDocRTL-title div.toc li.level1 { + margin-left: 0 !important; + margin-right: 0; +} + +.PageDocRTL-title div.toc li.level2 { + margin-left: 0 !important; + margin-right: 15px; +} + +.PageDocRTL-title div.toc li.level3 { + margin-left: 0 !important; + margin-right: 30px; +} + +.PageDocRTL-title div.toc li.level4 { + margin-left: 0 !important; + margin-right: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +/* tooltip related style info */ + +.ttc { + position: absolute; + display: none; +} + +#powerTip { + cursor: default; + white-space: nowrap; + background-color: white; + border: 1px solid gray; + border-radius: 4px 4px 4px 4px; + box-shadow: 1px 1px 7px gray; + display: none; + font-size: smaller; + max-width: 80%; + opacity: 0.9; + padding: 1ex 1em 1em; + position: absolute; + z-index: 2147483647; +} + +#powerTip div.ttdoc { + color: grey; + font-style: italic; +} + +#powerTip div.ttname a { + font-weight: bold; +} + +#powerTip div.ttname { + font-weight: bold; +} + +#powerTip div.ttdeci { + color: #006318; +} + +#powerTip div { + margin: 0px; + padding: 0px; + font: 12px/16px Roboto,sans-serif; +} + +#powerTip:before, #powerTip:after { + content: ""; + position: absolute; + margin: 0px; +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.s:after, #powerTip.s:before, +#powerTip.w:after, #powerTip.w:before, +#powerTip.e:after, #powerTip.e:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.nw:after, #powerTip.nw:before, +#powerTip.sw:after, #powerTip.sw:before { + border: solid transparent; + content: " "; + height: 0; + width: 0; + position: absolute; +} + +#powerTip.n:after, #powerTip.s:after, +#powerTip.w:after, #powerTip.e:after, +#powerTip.nw:after, #powerTip.ne:after, +#powerTip.sw:after, #powerTip.se:after { + border-color: rgba(255, 255, 255, 0); +} + +#powerTip.n:before, #powerTip.s:before, +#powerTip.w:before, #powerTip.e:before, +#powerTip.nw:before, #powerTip.ne:before, +#powerTip.sw:before, #powerTip.se:before { + border-color: rgba(128, 128, 128, 0); +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.nw:after, #powerTip.nw:before { + top: 100%; +} + +#powerTip.n:after, #powerTip.ne:after, #powerTip.nw:after { + border-top-color: #FFFFFF; + border-width: 10px; + margin: 0px -10px; +} +#powerTip.n:before { + border-top-color: #808080; + border-width: 11px; + margin: 0px -11px; +} +#powerTip.n:after, #powerTip.n:before { + left: 50%; +} + +#powerTip.nw:after, #powerTip.nw:before { + right: 14px; +} + +#powerTip.ne:after, #powerTip.ne:before { + left: 14px; +} + +#powerTip.s:after, #powerTip.s:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.sw:after, #powerTip.sw:before { + bottom: 100%; +} + +#powerTip.s:after, #powerTip.se:after, #powerTip.sw:after { + border-bottom-color: #FFFFFF; + border-width: 10px; + margin: 0px -10px; +} + +#powerTip.s:before, #powerTip.se:before, #powerTip.sw:before { + border-bottom-color: #808080; + border-width: 11px; + margin: 0px -11px; +} + +#powerTip.s:after, #powerTip.s:before { + left: 50%; +} + +#powerTip.sw:after, #powerTip.sw:before { + right: 14px; +} + +#powerTip.se:after, #powerTip.se:before { + left: 14px; +} + +#powerTip.e:after, #powerTip.e:before { + left: 100%; +} +#powerTip.e:after { + border-left-color: #FFFFFF; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.e:before { + border-left-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +#powerTip.w:after, #powerTip.w:before { + right: 100%; +} +#powerTip.w:after { + border-right-color: #FFFFFF; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.w:before { + border-right-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + +/* @group Markdown */ + +/* +table.markdownTable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.markdownTable td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.markdownTableHead tr { +} + +table.markdownTableBodyLeft td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +th.markdownTableHeadLeft th.markdownTableHeadRight th.markdownTableHeadCenter th.markdownTableHeadNone { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +th.markdownTableHeadLeft { + text-align: left +} + +th.markdownTableHeadRight { + text-align: right +} + +th.markdownTableHeadCenter { + text-align: center +} +*/ + +table.markdownTable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.markdownTable td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.markdownTable tr { +} + +th.markdownTableHeadLeft, th.markdownTableHeadRight, th.markdownTableHeadCenter, th.markdownTableHeadNone { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +th.markdownTableHeadLeft, td.markdownTableBodyLeft { + text-align: left +} + +th.markdownTableHeadRight, td.markdownTableBodyRight { + text-align: right +} + +th.markdownTableHeadCenter, td.markdownTableBodyCenter { + text-align: center +} + +.DocNodeRTL { + text-align: right; + direction: rtl; +} + +.DocNodeLTR { + text-align: left; + direction: ltr; +} + +table.DocNodeRTL { + width: auto; + margin-right: 0; + margin-left: auto; +} + +table.DocNodeLTR { + width: auto; + margin-right: auto; + margin-left: 0; +} + +tt, code, kbd, samp +{ + display: inline-block; + direction:ltr; +} +/* @end */ + +u { + text-decoration: underline; +} + diff --git a/docs/document_api_iec60730_library/doxygen.png b/docs/document_api_iec60730_library/doxygen.png new file mode 100644 index 00000000..3ff17d80 Binary files /dev/null and b/docs/document_api_iec60730_library/doxygen.png differ diff --git a/docs/document_api_iec60730_library/dynsections.js b/docs/document_api_iec60730_library/dynsections.js new file mode 100644 index 00000000..ea0a7b39 --- /dev/null +++ b/docs/document_api_iec60730_library/dynsections.js @@ -0,0 +1,120 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function toggleVisibility(linkObj) +{ + var base = $(linkObj).attr('id'); + var summary = $('#'+base+'-summary'); + var content = $('#'+base+'-content'); + var trigger = $('#'+base+'-trigger'); + var src=$(trigger).attr('src'); + if (content.is(':visible')===true) { + content.hide(); + summary.show(); + $(linkObj).addClass('closed').removeClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-8)+'closed.png'); + } else { + content.show(); + summary.hide(); + $(linkObj).removeClass('closed').addClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-10)+'open.png'); + } + return false; +} + +function updateStripes() +{ + $('table.directory tr'). + removeClass('even').filter(':visible:even').addClass('even'); +} + +function toggleLevel(level) +{ + $('table.directory tr').each(function() { + var l = this.id.split('_').length-1; + var i = $('#img'+this.id.substring(3)); + var a = $('#arr'+this.id.substring(3)); + if (l + + + + + + +Document API IEC60730 Library: File List + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
File List
+
+
+
Here is a list of all documented files with brief descriptions:
+
[detail level 1234]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
 ▼ lib
 ▼ config
 sl_iec60730_config.hLibrary configuration
 ▼ inc
 sl_iec60730.hLibrary definitions
 sl_iec60730_board.h
 sl_iec60730_comm.hComm check
 sl_iec60730_cpu_registers.hCPU Registers check
 sl_iec60730_internal.hInternal definitions
 sl_iec60730_invariable_memory.hInvariable memory check
 sl_iec60730_irq.hInterrupt check
 sl_iec60730_library_documentation.hLibrary Documentation
 sl_iec60730_program_counter.hProgram Counter check
 sl_iec60730_system_clock.hClock check
 sl_iec60730_toolchain.hCompiler abstraction
 sl_iec60730_variable_memory.hVariable memory check
 sl_iec60730_watchdog.hWatchdog check
 ▼ test
 ▼ unit_test
 ▼ inc
 app.hTop level application functions
 unit_test_common.hCommon unit test api
 unit_test_iec60730_bist.hUnit test function sl_iec60730_bist()
 unit_test_iec60730_cpu_registers.hUnit tests for functions in cpu registers module
 unit_test_iec60730_invariable_memory.hUnit tests for functions in invariable memory module
 unit_test_iec60730_irq.hUnit tests for functions in irq module
 unit_test_iec60730_post.hUnit test function sl_iec60730_post()
 unit_test_iec60730_program_counter.hUnit test function sl_iec60730_program_counter_test()
 unit_test_iec60730_safety_check.hUnit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur()
 unit_test_iec60730_system_clock.hUnit tests for functions in system_clock module
 unit_test_iec60730_variable_memory.hUnit tests for functions in variable memory module
 unit_test_iec60730_watchdog.hUnit tests for functions in watchdog module
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+Functions
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+
Bist Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate function sl_iec60730_bist(). +More...

+ + + + + + + + +

+Functions

void test_sl_iec60730_bist_pass_all_check_condition (void)
 
void test_sl_iec60730_bist_failed_check_condition (void)
 
void test_iec60730_safety_check_error_occur (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate function sl_iec60730_bist().

+

IEC60730 Bist Unit Tests

+

These test cases run unit tests to check the operation of the function sl_iec60730_bist()

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_iec60730_safety_check_error_occur()

+ +
+
+ + + + + + + + +
void test_iec60730_safety_check_error_occur (void )
+
+

Public Check sl_iec60730_bist() operate

+
Returns
None.
+

If bool local is_function_called variable true, and iec60730_safety_check is not equal SL_IEC60730_NO_FAILURE. It means test result routine of sl_iec60730_bist() is a failure, function sl_iec60730_safe_state() is called.

+ +
+
+ +

◆ test_sl_iec60730_bist_failed_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_bist_failed_check_condition (void )
+
+

Public Check sl_iec60730_bist() operate

+
Returns
None.
+

If bool local is_function_called variable true. It means test result routine of sl_iec60730_bist() is a failure, function sl_iec60730_safe_state() is called.

+ +
+
+ +

◆ test_sl_iec60730_bist_pass_all_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_bist_pass_all_check_condition (void )
+
+

Public Check sl_iec60730_bist() operate

+
Returns
None.
+

If bool local is_function_called variable equal false. It means test result routine of sl_iec60730_bist() is a pass, function sl_iec60730_safe_state() is not called.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION.html b/docs/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION.html new file mode 100644 index 00000000..5e1586ea --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION.html @@ -0,0 +1,129 @@ + + + + + + + +Document API IEC60730 Library: CPU Register Check Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
CPU Register Check Automated Verification Tests
IEC60730 Test Specification » Integration Test Modules In Library IEC60730
+
+
+ +

Python script for the IEC60730 CPU Register Check Verification tests. +More...

+ + + + + +

+Classes

class  integration_test_iec60730_cpu_registers.iec60730_cpu_regs
 IEC60730 CPU Register Check Tests. More...
 
+ + + +

+Functions

+bytes integration_test_iec60730_cpu_registers.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + + + + + +

+Variables

+ integration_test_iec60730_cpu_registers.chip_name = os.getenv('CHIP')
 Chip name run test.
 
+ integration_test_iec60730_cpu_registers.lst_file_path = os.getenv('LST_PATH')
 Path to file *.lst.
 
+ integration_test_iec60730_cpu_registers.adapter_serial_no = os.getenv('ADAPTER_SN')
 serialno of device
 
+ integration_test_iec60730_cpu_registers.lib_path = os.getenv('JLINK_PATH')
 Path to jlink library.
 
+ integration_test_iec60730_cpu_registers.line = sys.argv.pop()
 Number of arguments passed into the script file.
 
+ integration_test_iec60730_cpu_registers.compiler = line
 compiler creates the file *.lst
 
+

Detailed Description

+

Python script for the IEC60730 CPU Register Check Verification tests.

+

For details on the tests, see iec60730_cpu_registers.iec60730_cpu_regs.

+

+Test Results

+

EFR32 Device | Test Results ----------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION__UNIT__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..8470de1e --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,232 @@ + + + + + + + +Document API IEC60730 Library: CPU Registers Verification Unit Tests + + + + + + + + + +
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Document API IEC60730 Library +
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+Functions
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CPU Registers Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate functions in cpu registers module. +More...

+ + + + + + + + + + + + + + +

+Functions

void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition (void)
 
void test_sl_iec60730_cpu_registers_bist_failed_check_condition (void)
 
void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition (void)
 
void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition (void)
 
void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition (void)
 
void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate functions in cpu registers module.

+

IEC60730 CPU REGISTERS Unit Tests

+

These test cases run unit tests to check the operation of the function in cpu registers module.

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_sl_iec60730_cpu_registers_bist_failed_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_cpu_registers_bist_failed_check_condition (void )
+
+

Public Check sl_iec60730_cpu_registers_bist() operate

+
Returns
None.
+

If one of the register checks in the function sl_iec60730_cpu_registers_bist() failed, then sl_iec60730_program_counter_check will be 0.

+ +
+
+ +

◆ test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition (void )
+
+

Public Check sl_iec60730_cpu_registers_bist_ns() operate

+
Returns
None.
+

This test case only checks when the chip supports is cortex M33. If one of the register checks in the function sl_iec60730_cpu_registers_bist_ns() failed, then function will be returned SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition (void )
+
+

Public Check sl_iec60730_cpu_registers_bist_ns() operate

+
Returns
None.
+

This test case only checks when the chip supports is cortex M33. If the register checks in the function sl_iec60730_cpu_registers_bist_ns() pass, then function will be returned SL_IEC60730_TEST_PASSED.

+ +
+
+ +

◆ test_sl_iec60730_cpu_registers_bist_pass_all_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition (void )
+
+

Public Check sl_iec60730_cpu_registers_bist() operate

+
Returns
None.
+

If the register checks in the function sl_iec60730_cpu_registers_bist() pass, then sl_iec60730_program_counter_check will be set IEC60730_CPU_REGS_COMPLETE.

+ +
+
+ +

◆ test_sl_iec60730_cpu_registers_bist_s_failed_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition (void )
+
+

Public Check sl_iec60730_cpu_registers_bist_s() operate

+
Returns
None.
+

This test case only checks when the chip supports is cortex M33. If one of the register checks in the function sl_iec60730_cpu_registers_bist_s() failed, then function will be returned SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition (void )
+
+

Public Check sl_iec60730_cpu_registers_bist_s() operate

+
Returns
None.
+

This test case only checks when the chip supports is cortex M33. If the register checks in the function sl_iec60730_cpu_registers_bist_s() pass, then function will be returned SL_IEC60730_TEST_PASSED.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__CPU__REG__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__CPU__REG__TEST.html new file mode 100644 index 00000000..033ff905 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__CPU__REG__TEST.html @@ -0,0 +1,210 @@ + + + + + + + +Document API IEC60730 Library: CPU Registers Check + + + + + + + + + +
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Document API IEC60730 Library +
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+Functions
+
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CPU Registers Check
EFR32 IEC60730 Library
+
+
+ +

Verifies CPU registers are working correctly. +More...

+ + + + + + + + + + +

+Functions

sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns (void)
 
sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s (void)
 
sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist (void)
 
sl_iec60730_test_result_t sl_iec60730_cpu_registers_post (void)
 
+

Detailed Description

+

Verifies CPU registers are working correctly.

+

+Hardware Architecture

+

The CM33 CPU registers include the following registers:

+

General-purpose registers: • R0-R12

+

Stack pointer registers: • MSP + MSPLIM (secure/non-secure) • PSP + PSPLIM (secure/non-secure)

+

Special registers: • APSR • CONTROL (secure/non-secure) • PRIMASK (secure/non-secure) • FAULTMASK (secure/non-secure) • BASEPRI (secure/non-secure)

+

Link register: • LR

+

FPU registers: • FPSCR • S0 – S31

+

There is a set of tests performed once after the MCU reset and also during runtime.

+

+Failure Risks

+

The primary risks with the CPU registers are stuck bits and shorted bits. The CPU register tests will verify that bits can be set high and low, and adjacent bits are not shorted.

+

+Software Architecture

+

Because internal CPU registers are being tested, the code must be written using assembly language.

+

The identification of safety errors is ensured by the specific FAIL return if some registers have the stuck-at fault. Assess the return value of every function. If the value equals the FAIL return, then a jump into the safety error handling function should occur. The safety error handling function may be specific to the application and it is not a part of the library. The main purpose of this function is to put the application into a safe state.

+

In some special cases, the error is not reported by the FAIL return, because it would require the action of a corrupt register. In that case, the function waits for reset in an endless loop. The principle of the stuck-at error test of the CPU registers is to write and compare two test patterns in every register. The content of the register is compared with the constant or with the value written into another register that was tested before. Most of the time, R0, R1, and R2 are used as auxiliary registers. Patterns are defined to check the logical one and logical zero values in all register bits.

+

Due to the Arm TrustZone support, some core registers are banked between the security states. The Secure (S) or Non-Secure (NS) sets of the corresponding registers are accessible during execution (depending on the current security state). Both register versions are accessible during the S state, but not during the NS state. This is the reason why the NXP Safety Library must be executed in a secure mode. All of the banked registers are listed above.

+

For the EFR32 IEC60730 implementation, Figure 1 shows the logic flow chart of the CPU registers check during BIST and POST.

+
+ +
+Figure 1 CPU registers check flowchart
+

+

Function Documentation

+ +

◆ sl_iec60730_cpu_registers_bist()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist (void )
+
+

public IEC60730 CPU Registers Built In Self Test

+
Returns
sl_iec60730_test_result_t
+
+SL_IEC60730_TEST_FAILED means test failed, SL_IEC60730_TEST_PASSED means test passed.
+

This function will do a test of all the CPU core registers in non-secure and secure state.

+ +
+
+ +

◆ sl_iec60730_cpu_registers_bist_ns()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns (void )
+
+

public IEC60730 CPU Registers Built In Self Test

+
Returns
sl_iec60730_test_result_t
+
+SL_IEC60730_TEST_FAILED means test failed, SL_IEC60730_TEST_PASSED means test passed.
+

This function will do a test of all the CPU core registers in non-secure state

+ +
+
+ +

◆ sl_iec60730_cpu_registers_bist_s()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s (void )
+
+

public IEC60730 CPU Registers Built In Self Test

+
Returns
sl_iec60730_test_result_t
+
+SL_IEC60730_TEST_FAILED means test failed, SL_IEC60730_TEST_PASSED means test passed.
+

This function will do a test of all the CPU core registers in secure state

+ +
+
+ +

◆ sl_iec60730_cpu_registers_post()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_cpu_registers_post (void )
+
+

public IEC60730 CPU Registers Power On Self Test

+
Returns
sl_iec60730_test_result_t
+

This function simply calls the sl_iec60730_cpu_registers_bist() function.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__INTEGRATION__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__INTEGRATION__TEST.html new file mode 100644 index 00000000..501ac29e --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__INTEGRATION__TEST.html @@ -0,0 +1,108 @@ + + + + + + + +Document API IEC60730 Library: Integration Test Modules In Library IEC60730 + + + + + + + + + +
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+
Document API IEC60730 Library +
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+Modules
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+
Integration Test Modules In Library IEC60730
IEC60730 Test Specification
+
+
+ +

Python script supports running test case integration tests for internal modules in library IEC60730. +More...

+ + + + + + + + + + + + + + + + + + + + + + + +

+Modules

 CPU Register Check Automated Verification Tests
 Python script for the IEC60730 CPU Register Check Verification tests.
 
 IRQ Automated Verification Tests
 Python script for the IEC60730 IRQ plausibility verification tests.
 
 Invariable Memory Automated Verification Tests
 Python script for the IEC60730 Invariable Memory plausibility verification tests.
 
 Program Counter Verification Tests
 Python script for the IEC60730 Program counter Verification tests.
 
 System Clock Automated Verification Tests
 Python script for the IEC60730 system clock Verification tests.
 
 Variable Memory Automated Verification Tests
 Python script for the IEC60730 Variable Memory plausibility verification tests.
 
 Watchdog Automated Verification Tests
 Python script for the IEC60730 Watchdog timer Verification tests.
 
+

Detailed Description

+

Python script supports running test case integration tests for internal modules in library IEC60730.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__TEST.html new file mode 100644 index 00000000..4aa61af4 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__TEST.html @@ -0,0 +1,1032 @@ + + + + + + + +Document API IEC60730 Library: Invariable Memory Check + + + + + + + + + +
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+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Macros | +Typedefs | +Enumerations | +Functions | +Variables
+
+
Invariable Memory Check
EFR32 IEC60730 Library
+
+
+ +

Verifies contents of flash memory. +More...

+ + + + + + + + + + + + +

+Classes

struct  sl_iec60730_imc_params_t
 This structure is used as configuration for IMC testing, that holds GPCRC Register. More...
 
struct  sl_iec60730_update_crc_params_t
 
struct  sl_iec60730_imc_test_region_t
 This structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check. More...
 
struct  sl_iec60730_imc_test_multiple_regions_t
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define sl_iec60730_crc_t
 
#define SL_IEC60730_INVAR_BLOCKS_PER_BIST
 
#define SL_IEC60730_ROM_SIZE   ((uint32_t) SL_IEC60730_ROM_END - (uint32_t) SL_IEC60730_ROM_START)
 
#define STEPS_NUMBER   ((uint32_t) SL_IEC60730_ROM_SIZE / SL_IEC60730_FLASH_BLOCK)
 
#define SL_IEC60730_ROM_SIZE_INWORDS   ((uint32_t) SL_IEC60730_ROM_SIZE / 4U)
 
#define SL_IEC60730_FLASH_BLOCK_WORDS   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS / STEPS_NUMBER))
 
#define SL_IEC60730_ROM_SIZE_TEST(start, end)   ((uint32_t) end - (uint32_t) start)
 
#define STEPS_NUMBER_TEST(start, end)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / SL_IEC60730_FLASH_BLOCK)
 
#define SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / 4U)
 
#define SL_IEC60730_FLASH_BLOCK_WORDS_TEST(start, end)   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) / STEPS_NUMBER_TEST(start, end)))
 
#define SL_IEC60730_REF_CRC   (check_sum)
 
+#define SL_IEC60370_ENTER_ATOMIC()   CORE_ENTER_ATOMIC()
 Enter ATOMIC section.
 
+#define SL_IEC60370_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
 Exit ATOMIC section.
 
+#define SL_IEC60370_DECLARE_IRQ_STATE   CORE_DECLARE_IRQ_STATE;
 Declare irq state.
 
#define SL_IEC60730_IMC_POST_ENTER_ATOMIC()
 Enter ATOMIC section of IMC Post. More...
 
+#define SL_IEC60730_IMC_POST_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
 Exit ATOMIC section of IMC Post.
 
#define SL_IEC60730_IMC_BIST_ENTER_ATOMIC()
 Enter ATOMIC section of IMC Bist. More...
 
+#define SL_IEC60730_IMC_BIST_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
 Exit ATOMIC section of IMC Bist.
 
+#define SL_IEC60730_CRC_INIT(crc, init)   GPCRC_Init(crc, init)
 Initialize the General Purpose Cyclic Redundancy Check (GPCRC) module.
 
+#define SL_IEC60730_CRC_RESET(crc)   GPCRC_Reset(crc)
 Reset GPCRC registers to the hardware reset state.
 
+#define SL_IEC60730_CRC_START(crc)   GPCRC_Start(crc)
 Issues a command to initialize CRC calculation.
 
+#define SL_IEC60730_CRC_INPUTU32(crc, d)   GPCRC_InputU32(crc, d)
 Writes a 32-bit value to the input data register of the CRC.
 
+#define SL_IEC60730_CRC_INPUTU16(crc, d)   GPCRC_InputU16(crc, d)
 Writes a 32-bit value to the input data register of the CRC.
 
+#define SL_IEC60730_CRC_INPUTU8(crc, d)   GPCRC_InputU8(crc, d)
 Writes a 8-bit value to the input data register of the CRC.
 
+#define SL_IEC60730_CRC_DATA_READ(crc)   GPCRC_DataRead(crc)
 Reads the data register of the CRC.
 
+#define SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(crc)   GPCRC_DataReadBitReversed(crc)
 Reads the data register of the CRC.
 
+#define SL_IEC60730_CRC_DATA_READ_BYTE_REVERSED(crc)   GPCRC_DataReadByteReversed(crc)
 Reads the data register of the CRC.
 
#define SL_IEC60730_DEFAULT_GPRC
 
#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST   "123456789"
 
#define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE
 
#define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT
 
#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT
 
#define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT
 
#define SL_IEC60730_ROM_START   ((uint32_t *) (&flash_start))
 
#define SL_IEC60730_ROM_END   ((uint32_t *) (&check_sum))
 
#define SL_IEC60730_IMC_INIT_VALUE
 
#define SL_IEC60730_IMC_XOROUTPUT
 
#define SL_IEC60730_IMC_INIT_DEFAULT
 
+#define SL_IEC60730_CRC_DEBUG_ENABLE   1
 Use this definition for debugging purposes.
 
+#define SL_IEC60730_INVAR_BLOCKS_PER_BIST   512
 Number of blocks per test bist.
 
#define SL_IEC60730_FLASH_BLOCK   64
 
#define SL_IEC60730_CRC_USE_SW_ENABLE   0
 
#define SL_IEC60730_SW_CRC_TABLE_ENABLE   0
 
#define SL_IEC60730_USE_CRC_32_ENABLE   0
 
+ + + + + + + + + + +

+Typedefs

+typedef GPCRC_TypeDef sl_iec60730_crc_typedef
 the General Purpose Cyclic Redundancy Check (GPCRC) module
 
+typedef GPCRC_Init_TypeDef sl_iec60730_crc_init_typedef
 CRC initialization structure.
 
+typedef uint8_t sl_iec60730_read_type_t
 The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer.
 
+ + + + +

+Enumerations

enum  { SL_IEC60730_IMC_DATA_READ = 0, +SL_IEC60730_IMC_DATA_READ_BIT_REVERSED, +SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED + }
 The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer. More...
 
+ + + + + + + + + +

+Functions

void sl_iec60730_imc_init (sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config)
 
sl_iec60730_test_result_t sl_iec60730_update_crc_with_data_buffer (sl_iec60730_update_crc_params_t *params, sl_iec60730_crc_t *crc, uint8_t *buffer, uint32_t size)
 
sl_iec60730_test_result_t sl_iec60730_imc_post (void)
 
sl_iec60730_test_result_t sl_iec60730_imc_bist (void)
 
+ + + + + + +

+Variables

sl_iec60730_crc_t check_sum
 
+uint32_t flash_start
 Flash start address.
 
+

Detailed Description

+

Verifies contents of flash memory.

+

+Hardware Architecture

+

In the current version, the calculation of CRC for Flash is calculated starting from the starting address of the Flash (that value can be changed) to the end address whose value is specified by the address of the check_sum variable. Currently, the check_sum variable is set to the end address of user code that uses IEC60730 Library.

+

To test the Flash memory, a Cyclic Redundancy Check (CRC) is computed and compared with a value stored in Flash. Any change in the Flash will cause the CRC not to match the stored value.

+

We support multiple calculation modes. These modes are selected by the user. User adds definitions to use these modes. Please reference definitions SL_IEC60730_CRC_DEBUG_ENABLE, SL_IEC60730_CRC_USE_SW_ENABLE, and SL_IEC60730_USE_CRC_32_ENABLE for more detail.

+

+Failure Risks

+

As electrically eraseable memories, the primary risk with Flash is losing charge. Normal memory concerns such as stuck-at, coupling, and address faults may also occur. All these faults will be detected by a CRC across the region. Another risk is the hardware CRC module operating incorrectly. In this case, the CRC comparison will fail and sl_iec60730_safe_state() will begin.

+

+Software Architecture

+

The Invariable Memory Check (IMC) validates that the Flash memory storing the firmware and any persistent configuration information has not been corrupted. The IMC calculates a CRC across designated areas to verify their contents.

+

We support calculation CRC by using hardware and software. The default CRC is hardware calculation. User CAN use the SL_IEC60730_CRC_USE_SW_ENABLE definition in case using CRC software.

+

With case CRC software is chosen, the default is calculate CRC-table in initialization process. User CAN use the SL_IEC60730_SW_CRC_TABLE_ENABLE definition in case using pre-defined table.

+

We support both CRC-16 and CRC-32 mode. With CRC-16, the CRC engine is configured to use the CRC-16/XMODEM polynominal 0x1021. With CRC-32, the CRC engine is configured to use the CRC-32 polynominal 0x04C11DB7. The default is CRC-16 mode. In case using CRC-32, user SHOULD enable define the SL_IEC60730_USE_CRC_32_ENABLE definition.

+

We also provide scripts named sl_iec60730_call_crc16.sh (for CRC-16 mode) and sl_iec60730_call_crc32.sh (for CRC-32 mode) which is used in Post Build process to calculate CRC value of the Flash and place this CRC value at the end of user code determined by address of check_sum variable. We WILL call these scripts with the common name sl_iec60730_call_crcXY. These scripts work for both GCC and IAR compiler. To use these scripts, user SHOULD install srecord that can be downloaded (.exe) file for Window OS or run command as below for Linux OS.

+
$sudo apt install srecord
+

Script sl_iec60730_call_crcXY requires the following parameters

Parameters
+ + + + + + +
$1Name of your project.
$2Directory of building. This directory MUST contain *.hex file and *.map file. The *.map file MUST contains check_sum variable.
$3Path of srecord. With Linux OS, it SHOULD be blank. With Win OS, it SHOULD be the path to install folder of srecord. For example: 'C:\srecord-1.64-win32' in Win OS.
$4Compiler: GCC or IAR.
$5Start address of Flash. Or multiple regions address of Flash
+
+
+

The struct sl_iec60730_imc_params_t is used to manage hardware configuration of CRC. In case using CRC software (define SL_IEC60730_CRC_USE_SW_ENABLE), you can pass NULL pointer to function use this struct.

+

We use a pair of variables to check intergrity. Using the following macros in case you want to work with pair of variables need to be checked intergrity. These macros are defined in sl_iec60730.h file.

+ +

Some detail about implementing of IMC and using variables for testing purpose. These variables are also used in the test cases (TC) of the IMC module.

+

+

    +
  • Variable iec60730_cur_crc is variable that stores on (*.classb_ram*) section. This variable is CRC calculated value after each function call sl_iec60730_imc_bist. That means this value will be accumulated for each step of BIST. After checking all Flash regions the user wants to check, the final value of iec60730_cur_crc under normal conditions, no exception SHOULD be equal to the value stored in Flash.
    • +
+

    +
  • Variable iec60730_run_crc is variable that stores on (*.classb_ram*) section. This pointer points to the start address region of the testing process. In case iec60730_run_crc is less than the end address region, every time function sl_iec60730_imc_bist&nbsp;is invoked, the value of iec60730_run_crc increases by SL_IEC60730_FLASH_BLOCK_WORDS. Otherwise, compare the current number of regions calculated with the number of areas the user wants to check. If smaller, continue to calculate the next region. Otherwise, calculate iec60730_cur_crc compare it with the value of iec60730_ref_crc or the value stored in SL_IEC60730_REF_CRC.
    • +
+

To provide complete definitions of IMC modules, in SL_IEC60730_BOARD_HEADER file, user SHOULD pay attention to the SL_IEC60730_ROM_START definition. The STEPS_NUMBER, SL_IEC60730_ROM_SIZE_INWORDS, and SL_IEC60730_FLASH_BLOCK_WORDS definitions SHOULD use our default definitions. The SL_IEC60730_FLASH_BLOCK, SL_IEC60730_ROM_END, and SL_IEC60730_REF_CRC definitions can be redefined by the user but SHOULD not be recommended unless the user has knowledge of linker and Flash configuration.

+

Figure 1 describes a Flash with multiple applications on that. These applications are named Application 1, Application 2, ..., Application N, and Application (N+1). Where Application N is a main application that uses the IEC60730 library.

+

+ +
+Figure 1 Example of calculating CRC
+

The SL_IEC60730_ROM_START definition can be placed anywhere that guarantees the description of SL_IEC60730_ROM_START. As you can see in Figure 1, it is possible that SL_IEC60730_ROM_START is either SL_IEC60730_ROM_START (1) or SL_IEC60730_ROM_START (N).

+

The SL_IEC60730_ROM_END definition as described at the address of the variable check_sum. As the linker files is used in our example will be at address the end of Application (N). The CRC calculation will go from address SL_IEC60730_ROM_START to SL_IEC60730_ROM_END.

+

With SL_IEC60730_ROM_START (1) we calculate CRC (1) and with SL_IEC60730_ROM_START (N) we calculate CRC (N). The CRC value is calculated and placed at the location of the variable check_sum. Calculating and placing are implemented by script sl_iec60730_call_crcXY.

+

In this example you see that Application (N + 1) is an application that does not use the IEC60730 library. Our reference solutions DO NOT support customizing check_sum anywhere in Flash. Therefore, the CRC calculation WILL not cover the Flash area of Application (N + 1).

+

In case the user edits their linker to let the check_sum variable go to any location (of course larger than SL_IEC60730_ROM_START), the IMC modules WILL still work normally. For example, the user adjust the address of check_sum to the end address of Flash of Application (N + 1), then the CRC calculation WILL completely cover Application (N + 1).

+

Function sl_iec60730_imc_post() checks for all the invariable memory areas have been configured.

+

On BIST, partial memory sections are tested to keep overall BIST test time reasonable. Global variables store the current location being tested and other information. Each call to sl_iec60730_imc_bist() it checks SL_IEC60730_INVAR_BLOCKS_PER_BIST. After the calculation is finished, the CRC does not match the expected value, SL_IEC60730_TEST_FAILED is returned. If it does match, the global variables are configured for the next CRC entry. If all areas are complete, SL_IEC60730_TEST_PASSED is returned. If all areas are not complete, SL_IEC60730_TEST_IN_PROGRESS is returned.

+

+ +
+Figure 2 Flow chart of Invariable Memory Check BIST&POST
+

Macro Definition Documentation

+ +

◆ sl_iec60730_crc_t

+ +
+
+ + + + +
#define sl_iec60730_crc_t
+
+

Support for cleaner code.

+ +
+
+ +

◆ SL_IEC60730_CRC_USE_SW_ENABLE

+ +
+
+ + + + +
#define SL_IEC60730_CRC_USE_SW_ENABLE   0
+
+

The library support both hardware and software CRC. Use this definition in case the user use software CRC. The default hardware is used.

+ +
+
+ +

◆ SL_IEC60730_DEFAULT_GPRC

+ +
+
+ + + + +
#define SL_IEC60730_DEFAULT_GPRC
+
+

This macro is the default of GPCRC Register.

+ +
+
+ +

◆ SL_IEC60730_FLASH_BLOCK

+ +
+
+ + + + +
#define SL_IEC60730_FLASH_BLOCK   64
+
+

The value of this definition SHOULD be a power of two. The minimal value SHOULD be 4 and maximum value SHOULD be the alignment value that is defined in linker (GCC compiler) or in configuration of IAR. Our example use alignment 64 for check_sum variable. So that in our example the SL_IEC60730_FLASH_BLOCK definition is 64. User can refer to our example linker on how to provide check_sum variable with alignment 64.

+ +
+
+ +

◆ SL_IEC60730_FLASH_BLOCK_WORDS

+ +
+
+ + + + +
#define SL_IEC60730_FLASH_BLOCK_WORDS   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS / STEPS_NUMBER))
+
+

The SL_IEC60730_FLASH_BLOCK_WORDS definitionn WILL be defined base on SL_IEC60730_ROM_SIZE_INWORDS and STEPS_NUMBER definitions. User SHOULD not change it.

+ +
+
+ +

◆ SL_IEC60730_FLASH_BLOCK_WORDS_TEST

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define SL_IEC60730_FLASH_BLOCK_WORDS_TEST( start,
 end 
)   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) / STEPS_NUMBER_TEST(start, end)))
+
+

The SL_IEC60730_FLASH_BLOCK_WORDS_TEST definitionn WILL be defined base on SL_IEC60730_ROM_SIZE_INWORDS_TEST and STEPS_NUMBER_TEST definitions. User SHOULD not change it.

+ +
+
+ +

◆ SL_IEC60730_IMC_BIST_ENTER_ATOMIC

+ +
+
+ + + + + + + +
#define SL_IEC60730_IMC_BIST_ENTER_ATOMIC()
+
+Value:
CORE_DECLARE_IRQ_STATE; \
+
CORE_ENTER_ATOMIC()
+
+

Enter ATOMIC section of IMC Bist.

+ +
+
+ +

◆ SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE

+ +
+
+ + + + +
#define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE
+
+

This macro is the initial value used for CRC calculations. User DOES NOT change this value

    +
  • CRC-16: 0x0000 (SW) CRC-32: 0xFFFFFFFFuL (SW)
    • +
  • CRC-16: 0xFFFF (HW) CRC-32: 0xFFFFFFFFuL (HW)
    • +
+ +
+
+ +

◆ SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT

+ +
+
+ + + + +
#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT
+
+

This macro is the expected CRC value with input buffer that equal to "123456789" and init value CRC is 0x0000 (CRC16) or 0xFFFFFFFF (CRC32) . These value are only used in development phase. User DOES NOT take care this definition.

    +
  • CRC-16: 0x31C3 CRC-32: 0xCBF43926
    • +
+ +
+
+ +

◆ SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST

+ +
+
+ + + + +
#define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST   "123456789"
+
+

This macro is the sample test buffer used for testing CRC algorithm. This value is used in development phase. User DOES NOT take care this definition.

+ +
+
+ +

◆ SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT

+ +
+
+ + + + +
#define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT
+
+

This macro is the default value of struct sl_iec60730_update_crc_params_t. User DOES NOT change this value

+ +
+
+ +

◆ SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT

+ +
+
+ + + + +
#define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT
+
+

This macro is the value that will XOR with calculated CRC value to get CRC output value. User DOES NOT change this value

    +
  • CRC-16: 0x0000 (SW) CRC-32: 0xFFFFFFFFuL (SW)
    • +
  • CRC-16: 0x0000 (HW) CRC-32: 0xFFFFFFFFuL (HW)
    • +
+ +
+
+ +

◆ SL_IEC60730_IMC_INIT_DEFAULT

+ +
+
+ + + + +
#define SL_IEC60730_IMC_INIT_DEFAULT
+
+

This macro is the default value of struct #CRC_INIT_TypeDef. In our library, The #CRC_INIT_TypeDef struct WILL be #GPCRC_Init_TypeDef struct, a struct is defined for CRC by Silicon Labs.

+ +
+
+ +

◆ SL_IEC60730_IMC_INIT_VALUE

+ +
+
+ + + + +
#define SL_IEC60730_IMC_INIT_VALUE
+
+

This macro is the initial value used for CRC calculations.

+ +
+
+ +

◆ SL_IEC60730_IMC_POST_ENTER_ATOMIC

+ +
+
+ + + + + + + +
#define SL_IEC60730_IMC_POST_ENTER_ATOMIC()
+
+Value:
CORE_DECLARE_IRQ_STATE; \
+
CORE_ENTER_ATOMIC()
+
+

Enter ATOMIC section of IMC Post.

+ +
+
+ +

◆ SL_IEC60730_IMC_XOROUTPUT

+ +
+
+ + + + +
#define SL_IEC60730_IMC_XOROUTPUT
+
+

This macro is the value that will XOR with calculated CRC value to get CRC output value.

+ +
+
+ +

◆ SL_IEC60730_INVAR_BLOCKS_PER_BIST

+ +
+
+ + + + +
#define SL_IEC60730_INVAR_BLOCKS_PER_BIST
+
+

The SL_IEC60730_INVAR_BLOCKS_PER_BIST desribles maximum number of loops that perform the CRC calculation each time the sl_iec60730_imc_bist is invoked. We provide default value for this definition in sl_iec60730.h file.

+ +
+
+ +

◆ SL_IEC60730_REF_CRC

+ +
+
+ + + + +
#define SL_IEC60730_REF_CRC   (check_sum)
+
+

The SL_IEC60730_REF_CRC definition describes variable that address of this variable store CRC value that is calculated by sl_iec60730_call_crcXY in Post Build. We use check_sum so in our example SL_IEC60730_REF_CRC definition is check_sum.

+ +
+
+ +

◆ SL_IEC60730_ROM_END

+ +
+
+ + + + +
#define SL_IEC60730_ROM_END   ((uint32_t *) (&check_sum))
+
+

The SL_IEC60730_ROM_END definition describes the end address of Flash. It is the address of check_sum variables. In this version, users SHOULD not change this definition. Refer to the example in invariable_memory_check_example_flowchart, to better understand the SL_IEC60730_ROM_START, and SL_IEC60730_ROM_END definitions.

+ +
+
+ +

◆ SL_IEC60730_ROM_SIZE

+ +
+
+ + + + +
#define SL_IEC60730_ROM_SIZE   ((uint32_t) SL_IEC60730_ROM_END - (uint32_t) SL_IEC60730_ROM_START)
+
+

The SL_IEC60730_ROM_SIZE definition describes the size of Flash calculated CRC value. This calculation based on SL_IEC60730_ROM_END, and SL_IEC60730_ROM_START definitions.

+ +
+
+ +

◆ SL_IEC60730_ROM_SIZE_INWORDS

+ +
+
+ + + + +
#define SL_IEC60730_ROM_SIZE_INWORDS   ((uint32_t) SL_IEC60730_ROM_SIZE / 4U)
+
+

The SL_IEC60730_ROM_SIZE_INWORDS definitionn WILL be defined base on SL_IEC60730_ROM_SIZE definition. User SHOULD not change it.

+ +
+
+ +

◆ SL_IEC60730_ROM_SIZE_INWORDS_TEST

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define SL_IEC60730_ROM_SIZE_INWORDS_TEST( start,
 end 
)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / 4U)
+
+

The SL_IEC60730_ROM_SIZE_INWORDS_TEST definitionn WILL be defined base on SL_IEC60730_ROM_SIZE_TEST definition. User SHOULD not change it.

+ +
+
+ +

◆ SL_IEC60730_ROM_SIZE_TEST

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define SL_IEC60730_ROM_SIZE_TEST( start,
 end 
)   ((uint32_t) end - (uint32_t) start)
+
+

The SL_IEC60730_ROM_SIZE_TEST definition describes the size of region Flash calculated CRC value. This calculation based on #end address, and #start address region is transmitted. definitions.

+ +
+
+ +

◆ SL_IEC60730_ROM_START

+ +
+
+ + + + +
#define SL_IEC60730_ROM_START   ((uint32_t *) (&flash_start))
+
+

The SL_IEC60730_ROM_START definition describes the start address of Flash for CRC calculation. This definition MUST be alignment of SL_IEC60730_FLASH_BLOCK and can be changed by user so that the value DOES NOT exceed the end address of Flash (the SL_IEC60730_ROM_END definition). Otherwise, sl_iec60730_imc_post and sl_iec60730_imc_bist return SL_IEC60730_TEST_FAILED. The default value of the SL_IEC60730_ROM_START can be found in sl_iec60730_board.h file.

+

In case you change value of this definition then you SHOULD change the 5th parameter of the script sl_iec60730_call_crcXY when running the Post Build.

+

In our example, we use the variable flash_start provided by the linker file to simply define the start address of Flash. User can redefine SL_IEC60730_ROM_START as follows.

#define SL_IEC60730_ROM_START ((uint32_t *)(&flash_start))
+
+
+
+ +

◆ SL_IEC60730_SW_CRC_TABLE_ENABLE

+ +
+
+ + + + +
#define SL_IEC60730_SW_CRC_TABLE_ENABLE   0
+
+

If using SL_IEC60730_CRC_USE_SW_ENABLE definition then the SL_IEC60730_SW_CRC_TABLE_ENABLE definition is used for using pre-defined table for calculating.

+ +
+
+ +

◆ SL_IEC60730_USE_CRC_32_ENABLE

+ +
+
+ + + + +
#define SL_IEC60730_USE_CRC_32_ENABLE   0
+
+

Use this definition in case the user use CRC-32 for calculating the CRC value. The default CRC-16 is used.

+ +
+
+ +

◆ STEPS_NUMBER

+ +
+
+ + + + +
#define STEPS_NUMBER   ((uint32_t) SL_IEC60730_ROM_SIZE / SL_IEC60730_FLASH_BLOCK)
+
+

The STEPS_NUMBER definitionn WILL be defined base on SL_IEC60730_ROM_SIZE and SL_IEC60730_FLASH_BLOCK definition. User SHOULD not change it.

+ +
+
+ +

◆ STEPS_NUMBER_TEST

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define STEPS_NUMBER_TEST( start,
 end 
)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / SL_IEC60730_FLASH_BLOCK)
+
+

The STEPS_NUMBER_TEST definitionn WILL be defined base on SL_IEC60730_ROM_SIZE_TEST and SL_IEC60730_FLASH_BLOCK definition. User SHOULD not change it.

+ +
+
+

Enumeration Type Documentation

+ +

◆ anonymous enum

+ +
+
+ + + + +
anonymous enum
+
+ +

The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer.

+ + + + +
Enumerator
SL_IEC60730_IMC_DATA_READ 

use function GPCRC_DataRead to read CRC

+
SL_IEC60730_IMC_DATA_READ_BIT_REVERSED 

use function GPCRC_DataReadBitReversed to read CRC

+
SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED 

use function GPCRC_DataReadByteReversed to read CRC

+
+ +
+
+

Function Documentation

+ +

◆ sl_iec60730_imc_bist()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_imc_bist (void )
+
+

public IEC60730 Invariable Memory Check BIST

+
Returns
sl_iec60730_test_result_t. +
+

Performs a CRC check across all defined memory areas. For details how sl_iec60730_imc_bist work, please refer to Software Architecture

+

Requires sl_iec60730_imc_init to be called first to setup global variables.

+ +
+
+ +

◆ sl_iec60730_imc_init()

+ +
+
+ + + + + + + + + + + + + + + + + + +
void sl_iec60730_imc_init (sl_iec60730_imc_params_t * params,
sl_iec60730_imc_test_multiple_regions_t * test_config 
)
+
+

public IEC60730 Invariable Memory Check (IMC) Init

+
Parameters
+ + + +
paramsinput parameter hardware configuration of CRC
test_configinput parameter of region and number of regions user want to test
+
+
+
Returns
None
+

Performs a initialization of global variables and hardware configuration in case hardware support.

+ +
+
+ +

◆ sl_iec60730_imc_post()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_imc_post (void )
+
+

public IEC60730 Invariable Memory Check POST

+
Returns
sl_iec60730_test_result_t. +
+

Performs a CRC check across all defined memory areas.

+ +
+
+ +

◆ sl_iec60730_update_crc_with_data_buffer()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_update_crc_with_data_buffer (sl_iec60730_update_crc_params_t * params,
sl_iec60730_crc_t * crc,
uint8_t * buffer,
uint32_t size 
)
+
+

public IEC60730 Update CRC git pull with Data Buffer

+
Parameters
+ + + + + +
paramsinput parameter hardware configuration of CRC
crcThe CRC to be updated. The initial value of crc is also initial value of CRC calculation.
bufferA contiguous array of 1-byte values to be used to update the CRC.
sizeThe number of bytes stored in the buffer.
+
+
+
Returns
sl_iec60730_test_result_t. +
+

This routine takes a CRC and updates it on a pointer crc using a buffer of one or more bytes of data. For details on the CRC polynomial used, see Hardware Architecture

+ +
+
+

Variable Documentation

+ +

◆ check_sum

+ +
+
+ + + + +
sl_iec60730_crc_t check_sum
+
+

The end address of Flash is specified by the address of the check_sum variable. This variable is provided by linker in GCC or generated by configurations in IAR.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html b/docs/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html new file mode 100644 index 00000000..b0305f73 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html @@ -0,0 +1,130 @@ + + + + + + + +Document API IEC60730 Library: Invariable Memory Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Variables
+
+
Invariable Memory Automated Verification Tests
IEC60730 Test Specification » Integration Test Modules In Library IEC60730
+
+
+ +

Python script for the IEC60730 Invariable Memory plausibility verification tests. +More...

+ + + + + +

+Classes

class  integration_test_iec60730_invariable_memory.iec60730_imc
 IEC60730 Invariable Memory Plausibility Verification Tests. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + +

+Variables

+bool integration_test_iec60730_invariable_memory.is_crc32 = False
 Allows testing with CRC32.
 
+ integration_test_iec60730_invariable_memory.chip_name = os.getenv('CHIP')
 Chip name run test.
 
+ integration_test_iec60730_invariable_memory.lst_file_path = os.getenv('LST_PATH')
 Path to file *.lst.
 
+ integration_test_iec60730_invariable_memory.adapter_serial_no = os.getenv('ADAPTER_SN')
 serialno of device
 
+ integration_test_iec60730_invariable_memory.lib_path = os.getenv('JLINK_PATH')
 Path to jlink library.
 
+ integration_test_iec60730_invariable_memory.cal_crc_32 = os.getenv('INTEGRATION_TEST_ENABLE_CAL_CRC_32')
 Enable test calculation with CRC32.
 
+ integration_test_iec60730_invariable_memory.line = sys.argv.pop()
 Number of arguments passed into the script file.
 
+ integration_test_iec60730_invariable_memory.compiler = line
 compiler creates the file *.lst
 
+

Detailed Description

+

Python script for the IEC60730 Invariable Memory plausibility verification tests.

+

For details on the tests, see iec60730_invariable_memory.iec60730_invariable_memory.

+

+Test Results

+

EFR32 Device| Test Results ---------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..3baa2d64 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,392 @@ + + + + + + + +Document API IEC60730 Library: Invariable Memory Verification Unit Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
Invariable Memory Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate functions in invariable memory module. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

uint32_t * unit_test_iec60730_imc_mock_init_run_crc (void)
 
sl_iec60730_test_result_t unit_test_mock_check_integrity (void)
 
bool unit_test_iec60730_imc_mock_enable_gpcrc (void)
 
bool unit_test_iec60730_imc_mock_sw_enable_cal_crc (void)
 
void test_sl_iec60730_imc_init_param_null (void)
 
void test_sl_iec60730_imc_post_pass_check (void)
 
void test_sl_iec60730_imc_post_fail_check (void)
 
void test_sl_iec60730_imc_bist_pass_all_check (void)
 
void test_sl_iec60730_imc_bist_fail_check_integrity (void)
 
void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address (void)
 
void test_sl_iec60730_imc_bist_fail_compare_crc (void)
 
void test_sl_iec60730_update_crc_with_data_buffer_params_null (void)
 
void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate functions in invariable memory module.

+

IEC60730 Invariable Memory Unit Tests

+

These test cases run unit tests to check the operation of the functions in invariable memory module.

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_sl_iec60730_imc_bist_fail_check_integrity()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_imc_bist_fail_check_integrity (void )
+
+

Public Check sl_iec60730_imc_bist() operate

+
Returns
None.
+

If the check integrity of the pointer fails, the function sl_iec60730_imc_bist() returns SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_imc_bist_fail_compare_crc()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_imc_bist_fail_compare_crc (void )
+
+

Public Check sl_iec60730_imc_bist() operate

+
Returns
None.
+

In the case of SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the value crc calculated value is not equal value calculated from sl_iec60730_imc_post(), or in the case of SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is not equal to the value stored in check_sum. The function sl_iec60730_imc_bist() returns SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address (void )
+
+

Public Check sl_iec60730_imc_bist() operate

+
Returns
None.
+

If iec60730_run_crc init greater than rom end address before iec60730_cur_crc is calculated. Then the function sl_iec60730_imc_bist() returns SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_imc_bist_pass_all_check()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_imc_bist_pass_all_check (void )
+
+

Public Check sl_iec60730_imc_bist() operate

+
Returns
None.
+

In the case of SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the value crc calculated value is equal value calculated from sl_iec60730_imc_post(), or in the case of SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is equal to the value stored in check_sum. The function returns# SL_IEC60730_TEST_PASSED.

+

Public Check sl_iec60730_imc_bist() operate

+
Returns
None.
+

In the case of SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the value crc calculated value is equal value calculated from sl_iec60730_imc_post(), or in the case of SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is equal to the value stored in check_sum. The function sl_iec60730_imc_bist() returns SL_IEC60730_TEST_PASSED.

+ +
+
+ +

◆ test_sl_iec60730_imc_init_param_null()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_imc_init_param_null (void )
+
+

Public Check sl_iec60730_imc_init() operate

+
Returns
None.
+

If the passed parameter value is NULL, the sl_iec60730_imc_init() function will fail. When calling the function sl_iec60730_imc_post(), the value will be returned SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_imc_post_fail_check()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_imc_post_fail_check (void )
+
+

Public Check sl_iec60730_imc_post() operate

+
Returns
None.
+

In the case of SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the initial crc calculated value is 0, or in the case of SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is not equal to the value stored in check_sum. The function returns SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_imc_post_pass_check()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_imc_post_pass_check (void )
+
+

Public Check sl_iec60730_imc_post() operate

+
Returns
None.
+

If the passed parameter value is valid, the sl_iec60730_imc_init() function will success. When calling the function sl_iec60730_imc_post(), the value will be returned SL_IEC60730_TEST_PASSED.

+ +
+
+ +

◆ test_sl_iec60730_update_crc_with_data_buffer_calculation_crc()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc (void )
+
+

Public Check sl_iec60730_update_crc_with_data_buffer() operate

+
Returns
None.
+

Calculate the CRC value of the input string, check whether the returned CRC value is correct or not.

+ +
+
+ +

◆ test_sl_iec60730_update_crc_with_data_buffer_params_null()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_update_crc_with_data_buffer_params_null (void )
+
+

Public Check sl_iec60730_update_crc_with_data_buffer() operate

+
Returns
None.
+

If the passed parameter value is NULL, the sl_iec60730_update_crc_with_data_buffer() function will fail. returns SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ unit_test_iec60730_imc_mock_enable_gpcrc()

+ +
+
+ + + + + + + + +
bool unit_test_iec60730_imc_mock_enable_gpcrc (void )
+
+

Public Function mock enable gpcrc hardware operate.

+
Returns
boolean.
+ +
+
+ +

◆ unit_test_iec60730_imc_mock_init_run_crc()

+ +
+
+ + + + + + + + +
uint32_t* unit_test_iec60730_imc_mock_init_run_crc (void )
+
+

Public Function mock returns the starting address value of the ram test area

+
Returns
pointer uint32_t*.
+ +
+
+ +

◆ unit_test_iec60730_imc_mock_sw_enable_cal_crc()

+ +
+
+ + + + + + + + +
bool unit_test_iec60730_imc_mock_sw_enable_cal_crc (void )
+
+

Public Function mock enable calculate crc by software.

+
Returns
boolean.
+ +
+
+ +

◆ unit_test_mock_check_integrity()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t unit_test_mock_check_integrity (void )
+
+

Public Function simulates the result of variable value integrity check.

+
Returns
boolean.
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__IRQ__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__IRQ__TEST.html new file mode 100644 index 00000000..05603271 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__IRQ__TEST.html @@ -0,0 +1,271 @@ + + + + + + + +Document API IEC60730 Library: IRQ Check + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Macros | +Functions
+
+
IRQ Check
EFR32 IEC60730 Library
+
+
+ +

Verifies interrupt frequency is within bounds. +More...

+ + + + + + + + +

+Classes

struct  sl_iec60730_irq_execution_bounds_t
 
struct  sl_iec60730_irq_fail_t
 
struct  sl_iec60730_irq_cfg_t
 
+ + + + + + + + + +

+Macros

#define IEC60730_MAX_IRQ_CHECK   32
 
+#define SL_IEC60730_IRQ_TYPE_VARIABLE   uint8_t
 Data type for iec60730_IRQExecCount variables.
 
+#define SL_IEC60730_IRQ_STATUS_ENABLE   0
 Enable using sl_iec60730_get_irq_index_failed() function to get the value of failed irqs.
 
+ + + + + + + + + + + +

+Functions

void sl_iec60730_irq_reset_fail_result (void)
 
sl_iec60730_irq_fail_t * sl_iec60730_get_irq_index_failed (void)
 
void sl_iec60730_irq_init (sl_iec60730_irq_cfg_t *irq_cfg_ptr)
 
void sl_iec60730_irq_reset_counter (void)
 
void sl_iec60730_irq_check (void)
 
+

Detailed Description

+

Verifies interrupt frequency is within bounds.

+

The interrupt plausibility test checks that enabled interrupts are executing at a frequency that is within expected minimum and maximum bounds every test timer period.

+

OEM firmware is responsible for setting expected minimum and maximum bounds for each enabled interrupt in the oem_irq_freq_bounds structure. The OEM is also responsible for incrementing the element in the oem_irq_exec_count array inside each enabled interrupt. In sl_iec60730_irq_check(), which executes as part of the test timer-driven tests of the BIST, this counter array is compared with the defined bounds to determine whether each interrupt is operating within safe parameters.

+

+Hardware Architecture

+

Most hardware-implemented peripherals in Silicon Labs EFR32 devices offer the ability to vector to an interrupt service routine in order to quickly respond peripheral-related events and state updates.

+

In order to vector to an interrupt from executing foreground code, hardware pushes the program counter to the stack and vectors to a hardware-defined entry in a vector table stored in non-volatile memory in a region of Flash. The code of the interrupt service routine is either stored directly within this table entry, or stored elsewhere in memory and accessed through a jump instruction placed in the vector table, depending on the size of the interrupt service routine.

+

Once the function body of the interrupt service routine has completed executing, the program counter is pop from the stack and returns to foreground code to continue execution.

+

Each interrupt has a flag in a register that must be cleared inside the interrupt service routine function to signal that the interrupt has been processed in firmware. Failure to clear this flag inside the function body will result in the hardware immediately vectoring back to the interrupt.

+

+Failure Risks

+

It is the OEM's responsibility to accurately estimate the frequency of each enabled interrupt in a firmware project. For interrupts that are asynchronous and may not execute at all within a test timer period, the lower bounds for the interrupt should be set to 0.

+

It is also the OEM's responsibility to increment values in oem_irq_exec_count once and only once per interrupt execution. Failure to include this incrementing command will result in an interrupt that appears to be executing below minimum defined bounds, which will force safe state entry.

+

The OEM should also be mindful of all hardware-related constraints of each interrupt. Failure to clear an interrupt flag inside an interrupt service routine will cause the routine to execute repeatedly, which will increment an oem_irq_exec_count entry beyond upper bounds and cause a safe state entry.

+

The OEM must also perform a bounds check on the element in oem_irq_exec_count being incremented to ensure that the counter does not exceed the upper bounds defined by its data type and overflow back to 0. Failure to perform this bounds check could have the effect of creating a passing IRQ plausibility test when the interrupt is actually running outside of defined limits.

+

+Software Architecture

+

The interrupt plausibility test function relies on an array of counters called oem_irq_exec_count, stored in volatile memory and an array of struct sl_iec60730_irq_execution_bounds_t found in non-volatile memory and called oem_irq_freq_bounds. OEM firmware increments bytes in oem_irq_exec_count during execution of each enabled interrupt service routine. When the test timer interrupt occurs, sl_iec60730_irq_check() executes. Inside this function, firmware compares the count values to the bound values, and sets iec60730_safety_check by called function sl_iec60730_safety_check_error_occur to SL_IEC60730_INTERRUPT_FAIL if a count exceeds either the minimum or maximum bounds. The next execution of the BIST routine will detect the SL_IEC60730_TEST_FAILED state and enter safe state. A flowchart of this functionality is shown in Figure 1 .

+

For more information on configuration of the test timer, please see System Clock Check.

+

+ +
+Figure 1 Flow chart of interrupt plausibility check
+

Macro Definition Documentation

+ +

◆ IEC60730_MAX_IRQ_CHECK

+ +
+
+ + + + +
#define IEC60730_MAX_IRQ_CHECK   32
+
+

The maximum number of interrupted users that can be used for testing. The param passed to the init function sl_iec60730_irq_init() must have a size value smaller than this value

+ +
+
+

Function Documentation

+ +

◆ sl_iec60730_get_irq_index_failed()

+ +
+
+ + + + + + + + +
sl_iec60730_irq_fail_t* sl_iec60730_get_irq_index_failed (void )
+
+

public IEC60730 Get The Location Of The Failed IRQ

+
Returns
pointer type sl_iec60730_irq_fail_t point to variable containing the errors that occurred and the number of errors
+

This function return a iec60730_irq_fail_result. That variable contains the number of failed irq checks and stores the failed interrupt value in bits.

+ +
+
+ +

◆ sl_iec60730_irq_check()

+ +
+
+ + + + + + + + +
void sl_iec60730_irq_check (void )
+
+

public IEC60730 Interrupt Plausibility Check

+
Returns
None.
+

This function compares each entry in oem_irq_exec_count with its corresponding bounds defined in oem_irq_freq_bounds. If the entry is found to exceed the defined bounds, iec60730_safety_check is set to SL_IEC60730_INTERRUPT_FAIL. Otherwise no action is taken. The function ends by setting IEC60730_INTERRUPT_COMPLETE.

+ +
+
+ +

◆ sl_iec60730_irq_init()

+ +
+
+ + + + + + + + +
void sl_iec60730_irq_init (sl_iec60730_irq_cfg_t * irq_cfg_ptr)
+
+

public IEC60730 Interrupt Init

+
Parameters
+ + +
irq_cfg_ptrinput pointer point to value config by user
+
+
+
Returns
None.
+

This function set a pointer point to address oem_irq_freq_bounds min and max and oem_irq_exec_count. To initialize test values ​​for the sl_iec60730_irq_check() function.

+ +
+
+ +

◆ sl_iec60730_irq_reset_counter()

+ +
+
+ + + + + + + + +
void sl_iec60730_irq_reset_counter (void )
+
+

public IEC60730 Interrupt Reset Counter

+
Returns
None.
+

This function reset counter oem_irq_exec_count to 0

+ +
+
+ +

◆ sl_iec60730_irq_reset_fail_result()

+ +
+
+ + + + + + + + +
void sl_iec60730_irq_reset_fail_result (void )
+
+

public IEC60730 Reset IRQ Failed Results

+
Returns
None.
+

This function reset local counter irq fail iec60730_irq_fail_result to 0

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION.html b/docs/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION.html new file mode 100644 index 00000000..12862183 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION.html @@ -0,0 +1,129 @@ + + + + + + + +Document API IEC60730 Library: IRQ Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
IRQ Automated Verification Tests
IEC60730 Test Specification » Integration Test Modules In Library IEC60730
+
+
+ +

Python script for the IEC60730 IRQ plausibility verification tests. +More...

+ + + + + +

+Classes

class  integration_test_iec60730_irq.iec60730_irq
 IEC60730 IRQ Plausibility Verification Tests. More...
 
+ + + +

+Functions

+bytes integration_test_iec60730_irq.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + + + + + +

+Variables

+ integration_test_iec60730_irq.chip_name = os.getenv('CHIP')
 Chip name run test.
 
+ integration_test_iec60730_irq.lst_file_path = os.getenv('LST_PATH')
 Path to file *.lst.
 
+ integration_test_iec60730_irq.adapter_serial_no = os.getenv('ADAPTER_SN')
 serialno of device
 
+ integration_test_iec60730_irq.lib_path = os.getenv('JLINK_PATH')
 Path to jlink library.
 
+ integration_test_iec60730_irq.line = sys.argv.pop()
 Number of arguments passed into the script file.
 
+ integration_test_iec60730_irq.compiler = line
 compiler creates the file *.lst
 
+

Detailed Description

+

Python script for the IEC60730 IRQ plausibility verification tests.

+

For details on the tests, see iec60730_irq.iec60730_irq.

+

+Test Results

+

EFR32 Device| Test Results ---------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION__UNIT__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..aefd8abe --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,255 @@ + + + + + + + +Document API IEC60730 Library: IRQ Verification Unit Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
IRQ Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate functions in irq module. +More...

+ + + + + + + + + + + + + + + + +

+Functions

void test_sl_iec60730_irq_init_param_null (void)
 
void test_sl_iec60730_irq_init_param_size_greater_than_max_irq (void)
 
void test_sl_iec60730_irq_check_count_in_bound (void)
 
void test_sl_iec60730_irq_check_count_out_bound (void)
 
void test_sl_iec60730_irq_reset_counter (void)
 
void test_sl_iec60730_irq_fail_occur (void)
 
void test_sl_iec60730_irq_reset_fail_result (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate functions in irq module.

+

IEC60730 IRQ Unit Tests

+

These test cases run unit tests to check the operation of the functions in irq module.

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_sl_iec60730_irq_check_count_in_bound()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_irq_check_count_in_bound (void )
+
+

Public Check sl_iec60730_irq_check() operate

+
Returns
None.
+

After successful initialization, after calling function. If the test element has an irq_count between the irq_bounds max and min values, function sl_iec60730_safe_state() is not called.

+ +
+
+ +

◆ test_sl_iec60730_irq_check_count_out_bound()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_irq_check_count_out_bound (void )
+
+

Public Check sl_iec60730_irq_check() operate

+
Returns
None.
+

After successful initialization, after calling function. If the test element has an irq_count out of range the irq_bounds max and min values, function sl_iec60730_safe_state() is called.

+ +
+
+ +

◆ test_sl_iec60730_irq_fail_occur()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_irq_fail_occur (void )
+
+

Public Check sl_iec60730_irq_fail_occur() operate

+
Returns
None.
+

Check if the value of wrong interrupt count and wrong interrupt index passed into the function is equal to the value received from function sl_iec60730_get_irq_index_failed(), then test passes.

+ +
+
+ +

◆ test_sl_iec60730_irq_init_param_null()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_irq_init_param_null (void )
+
+

Public Check sl_iec60730_irq_init() operate

+
Returns
None.
+

If the passed param is NULL after call sl_iec60730_irq_check(), function sl_iec60730_safe_state() will be called (variable local is_function_called set true).

+ +
+
+ +

◆ test_sl_iec60730_irq_init_param_size_greater_than_max_irq()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_irq_init_param_size_greater_than_max_irq (void )
+
+

Public Check sl_iec60730_irq_init() operate

+
Returns
None.
+

If the param greater than IEC60730_MAX_IRQ_CHECK, function sl_iec60730_safe_state() will be called (variable local is_function_called set true).

+ +
+
+ +

◆ test_sl_iec60730_irq_reset_counter()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_irq_reset_counter (void )
+
+

Public Check sl_iec60730_irq_reset_counter() operate

+
Returns
None.
+

After calling this function, check the value of the irq_count element of the config variable passed to function sl_iec60730_irq_init(). If the value is 0, the test case passes.

+ +
+
+ +

◆ test_sl_iec60730_irq_reset_fail_result()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_irq_reset_fail_result (void )
+
+

Public Check sl_iec60730_irq_reset_fail_result() operate

+
Returns
None.
+

Check if the value of wrong interrupt count and wrong interrupt position received from function sl_iec60730_get_irq_index_failed() is 0 after calling sl_iec60730_irq_reset_fail_result() then test passes.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__OEM__COMM__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__OEM__COMM__TEST.html new file mode 100644 index 00000000..c2fb0594 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__OEM__COMM__TEST.html @@ -0,0 +1,107 @@ + + + + + + + +Document API IEC60730 Library: OEM External Communications Example using UART + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
OEM External Communications Example using UART
EFR32 IEC60730 Library
+
+
+ +

Verifies communication channel is operating as expected. +More...

+

Verifies communication channel is operating as expected.

+

+Hardware Architecture

+

For communications interfaces to be IEC60730 compliant, they must meet the following conditions:

    +
  1. Provide address redundancy, transmitting the sender's unique address
    2. +
  2. CRC coverage of transmission bytes
    3. +
  3. Scheduled transmission
    4. +
+

Each type of hardware-implemented serial interface supported by a device must meet the three above communications requirements using a combination of hardware features and firmware-implemented support.

+

For I2C interfaces, the protocol requires that a transaction begin with a slave address identifying the intended recipient of the message, which meets requirement 1. Each message transferred must end with a 2-byte CRC covering all transmitted bytes. Hardware CRC generation is available on some devices and a buffer of bytes can generate a CRC using the sl_iec60730_update_crc_with_data_buffer provided, which meets requirement #2. Requirement #3 can be met by initiating a periodic transaction using the test timer allocated for the system clock plausibility check.

+

A SPI interface meets the requirements above in a way that is similar to the I2C interface, except that an address must be included through firmware, because the protocol and the hardware do not support a slave address inherently.

+

A UART interface meets requirements similar to a SPI interface, where the address must be transmitted through firmware implemented protocol.

+

+Failure Risks

+

A disruption of the serial interface signals/clocks could cause a bit of error or a timing-related issue. This will result in a CRC mismatch when the receiver of the message processes the packet and safe state entrance.

+

If the device sending status packets to a host gets somehow stuck in such a state where it is unable to transmit status packets, the receiver expecting periodic packets will enter a safe state after a bounded amount of time, likely governed by a bist frequency check that determines no status packets have been received within a frequency check interval. Based on the suggested configuration of the bist frequency check period, the upper limit for the time between the reception of a status packet would be 1 second. Based on the suggested configuration of the test timer, typically the status packet will be transmitted once every 100 ms.

+

All serial interfaces require some amount of port configuration to ensure that the correct pins are digital inputs and outputs, open drain, or push-pull. Without these requirements being met, the device will be unable to transmit and receive data packets properly, which will result in a safe state entrance by one or both of the devices communicating across a serial interface.

+

+Software Architecture

+

The library provides a support function sl_iec60730_update_crc_with_data_buffer() to generate the CRC of a buffer being transmitted. OEM firmware is responsible for interfacing with serial communication hardware to send packets that begin with address information to identify the sender and end with a 2-byte CRC.

+

In order to transmit a status packet, the device needs to allocate an on-chip timer, or use the test timer already allocated for the system clock plausibility check.

+

Devices receiving status packets rely on a bist frequency check where one requirement for the comm plausibility test to have executed successfully is the reception of a valid status packet.

+

Figure 1 shows the main components of both a receiver and a transmitter of a compliant serial interface. Note that received packages are processed by checking for an address and a valid CRC. Additionally, a bist frequency check determines whether status packets are being received at an acceptable rate. For transmission, all data payloads go through firmware that adds required address and CRC information. Additionally, the test timer interrupt service routine initiates a periodic transmission of a status packet.

+
+ +
+Figure 1 Comm plausibility check flowchart
+

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html b/docs/document_api_iec60730_library/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html new file mode 100644 index 00000000..173ad018 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html @@ -0,0 +1,129 @@ + + + + + + + +Document API IEC60730 Library: Program Counter Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
Program Counter Verification Tests
IEC60730 Test Specification » Integration Test Modules In Library IEC60730
+
+
+ +

Python script for the IEC60730 Program counter Verification tests. +More...

+ + + + + +

+Classes

class  integration_test_iec60730_program_counter.iec60730_programme_counter
 IEC60730 CPU Program counter Tests. More...
 
+ + + +

+Functions

+bytes integration_test_iec60730_program_counter.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + + + + + +

+Variables

+ integration_test_iec60730_program_counter.chip_name = os.getenv('CHIP')
 Chip name run test.
 
+ integration_test_iec60730_program_counter.lst_file_path = os.getenv('LST_PATH')
 Path to file *.lst.
 
+ integration_test_iec60730_program_counter.adapter_serial_no = os.getenv('ADAPTER_SN')
 serialno of device
 
+ integration_test_iec60730_program_counter.lib_path = os.getenv('JLINK_PATH')
 Path to jlink library.
 
+ integration_test_iec60730_program_counter.line = sys.argv.pop()
 Number of arguments passed into the script file.
 
+ integration_test_iec60730_program_counter.compiler = line
 compiler creates the file *.lst
 
+

Detailed Description

+

Python script for the IEC60730 Program counter Verification tests.

+

For details on the tests, see iec60730_programme_counter.iec60730_programme_counter.

+

+Test Results

+

EFR32 Device | Test Results ----------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER.html b/docs/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER.html new file mode 100644 index 00000000..fae660c8 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER.html @@ -0,0 +1,266 @@ + + + + + + + +Document API IEC60730 Library: Program Counter Check + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Macros | +Functions | +Variables
+
+
Program Counter Check
EFR32 IEC60730 Library
+
+
+ +

Verifies all tests have completed on time. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

+#define IEC60730_VMC_COMPLETE   (1 << 0)
 Mask bit used for Variable Memory Checks completed.
 
+#define IEC60730_IMC_COMPLETE   (1 << 1)
 Mask bit used for Invariable Memory Checks completed.
 
+#define IEC60730_CPU_CLOCKS_COMPLETE   (1 << 2)
 Mask bit used for CPU Clocks Checks completed.
 
+#define IEC60730_CPU_REGS_COMPLETE   (1 << 3)
 Mask bit used for CPU Register Checks completed.
 
+#define IEC60730_INTERRUPT_COMPLETE   (1 << 4)
 Mask bit used for Interrupt Checks completed.
 
+#define IEC60730_GPIO_COMPLETE   (1 << 5)
 Mask bit used for GPIO Plausibility Checks completed.
 
+#define IEC60730_ANALOG_COMPLETE   (1 << 6)
 Mask bit used for Analog Plausibility Checks completed.
 
+#define IEC60730_COMMS_COMPLETE   (1 << 7)
 Mask bit used for Communications Plausibility Checks completed.
 
+#define IEC60730_OEM0_COMPLETE   (1 << 8)
 Mask bit used for OEM Check 0 completed.
 
+#define IEC60730_OEM1_COMPLETE   (1 << 9)
 Mask bit used for OEM Check 1 completed.
 
+#define IEC60730_OEM2_COMPLETE   (1 << 10)
 Mask bit used for OEM Check 2 completed.
 
+#define IEC60730_OEM3_COMPLETE   (1 << 11)
 Mask bit used for OEM Check 3 completed.
 
+#define IEC60730_OEM4_COMPLETE   (1 << 12)
 Mask bit used for OEM Check 4 completed.
 
+#define IEC60730_OEM5_COMPLETE   (1 << 13)
 Mask bit used for OEM Check 5 completed.
 
+#define IEC60730_OEM6_COMPLETE   (1 << 14)
 Mask bit used for OEM Check 6 completed.
 
+#define IEC60730_OEM7_COMPLETE   (1 << 15)
 Mask bit used for OEM Check 7 completed.
 
#define IEC60730_ALL_COMPLETE_BITS
 Mask used for checking that all bits are set. More...
 
+ + + +

+Functions

void sl_iec60730_program_counter_test (void)
 
+ + + +

+Variables

uint16_t sl_iec60730_program_counter_check
 
+

Detailed Description

+

Verifies all tests have completed on time.

+

The frequency of test execution must be checked to ensure that tests are being run in time.

+

+Hardware Architecture

+

The Program counter check requires that each BIST test set a bit in a bit array whenever an iteration of testing completes. The Program counter check uses the test clock timer configured in the system clock plausibility test to determine when to execute. See System Clock Check for system clock plausibility details. The Program counter test executes at 1/10 the frequency of the system clock plausibility test. Best practice recommendations and example OEM code configure the system clock plausibility test to run at 100 ms intervals, resulting in BIST frequency check intervals of 1s.

+

Bits within sl_iec60730_program_counter_check are set as tests pass. OEMs can determine how fast their tests are running by checking this variable. If a bit is still clear, that test has not completed.

+

+Suggested OEM Configuration

+

OEM configuration of this test is dependent on system clock plausibility configuration. Please see System Clock Check for details.

+

+Failure Risks

+

The library's BIST execution frequency test will force entry into safe state if a period of time defined by 1/10 test clock test frequency passes without all BIST tests completing their test execution. It is the OEM's responsibility to call the BIST in the main() loop with enough frequency to execute all tests within the required time period.

+

If the system clock test's test timer is not configured as expected, so that 1/10 test clock frequency is unexpectedly fast, the system may fall into safe state because tests have not had enough time to execute to completion.

+

+Software Architecture

+

For the IEC60730 implementation, see Figure 1

+
+ +
+Figure 1 Program counter check flowchart
+

+

Macro Definition Documentation

+ +

◆ IEC60730_ALL_COMPLETE_BITS

+ +
+
+ + + + +
#define IEC60730_ALL_COMPLETE_BITS
+
+Value:
(IEC60730_VMC_COMPLETE | IEC60730_IMC_COMPLETE \
+
| IEC60730_CPU_CLOCKS_COMPLETE | IEC60730_CPU_REGS_COMPLETE \
+
| IEC60730_INTERRUPT_COMPLETE | IEC60730_GPIO_COMPLETE \
+
| IEC60730_ANALOG_COMPLETE | IEC60730_COMMS_COMPLETE \
+
| IEC60730_OEM0_COMPLETE | IEC60730_OEM1_COMPLETE | IEC60730_OEM2_COMPLETE \
+
| IEC60730_OEM3_COMPLETE | IEC60730_OEM4_COMPLETE | IEC60730_OEM5_COMPLETE \
+
| IEC60730_OEM6_COMPLETE | IEC60730_OEM7_COMPLETE)
+
+

Mask used for checking that all bits are set.

+ +
+
+

Function Documentation

+ +

◆ sl_iec60730_program_counter_test()

+ +
+
+ + + + + + + + +
void sl_iec60730_program_counter_test (void )
+
+

public IEC60730 program counter test

+

Checks flags in sl_iec60730_program_counter_check set by each BIST test to determine if BIST is executing within a specified period.

Returns
sl_iec60730_test_result_t. If test fails, returns SL_IEC60730_TEST_FAILED;
+
+otherwise SL_IEC60730_TEST_PASSED.
+ +
+
+

Variable Documentation

+ +

◆ sl_iec60730_program_counter_check

+ +
+
+ + + + +
uint16_t sl_iec60730_program_counter_check
+
+

Global variable used by BIST to determine if modules are running frequently enough to meet maximum fault time.

+

sl_iec60730_program_counter_check equals 0 before BIST check. Each module then sets its assigned bit once it has completed testing. Before the maximum fault time, sl_iec60730_program_counter_test() verifies that the value is IEC60730_ALL_COMPLETE_BITS.

+ +
+
+
+
IEC60730_COMMS_COMPLETE
#define IEC60730_COMMS_COMPLETE
Mask bit used for Communications Plausibility Checks completed.
Definition: sl_iec60730.h:346
+
IEC60730_CPU_REGS_COMPLETE
#define IEC60730_CPU_REGS_COMPLETE
Mask bit used for CPU Register Checks completed.
Definition: sl_iec60730.h:338
+
IEC60730_GPIO_COMPLETE
#define IEC60730_GPIO_COMPLETE
Mask bit used for GPIO Plausibility Checks completed.
Definition: sl_iec60730.h:342
+
IEC60730_IMC_COMPLETE
#define IEC60730_IMC_COMPLETE
Mask bit used for Invariable Memory Checks completed.
Definition: sl_iec60730.h:334
+
IEC60730_CPU_CLOCKS_COMPLETE
#define IEC60730_CPU_CLOCKS_COMPLETE
Mask bit used for CPU Clocks Checks completed.
Definition: sl_iec60730.h:336
+
IEC60730_OEM7_COMPLETE
#define IEC60730_OEM7_COMPLETE
Mask bit used for OEM Check 7 completed.
Definition: sl_iec60730.h:362
+
IEC60730_OEM0_COMPLETE
#define IEC60730_OEM0_COMPLETE
Mask bit used for OEM Check 0 completed.
Definition: sl_iec60730.h:348
+
IEC60730_OEM6_COMPLETE
#define IEC60730_OEM6_COMPLETE
Mask bit used for OEM Check 6 completed.
Definition: sl_iec60730.h:360
+
IEC60730_ANALOG_COMPLETE
#define IEC60730_ANALOG_COMPLETE
Mask bit used for Analog Plausibility Checks completed.
Definition: sl_iec60730.h:344
+
IEC60730_VMC_COMPLETE
#define IEC60730_VMC_COMPLETE
Mask bit used for Variable Memory Checks completed.
Definition: sl_iec60730.h:332
+
IEC60730_INTERRUPT_COMPLETE
#define IEC60730_INTERRUPT_COMPLETE
Mask bit used for Interrupt Checks completed.
Definition: sl_iec60730.h:340
+
IEC60730_OEM2_COMPLETE
#define IEC60730_OEM2_COMPLETE
Mask bit used for OEM Check 2 completed.
Definition: sl_iec60730.h:352
+
IEC60730_OEM3_COMPLETE
#define IEC60730_OEM3_COMPLETE
Mask bit used for OEM Check 3 completed.
Definition: sl_iec60730.h:354
+
IEC60730_OEM4_COMPLETE
#define IEC60730_OEM4_COMPLETE
Mask bit used for OEM Check 4 completed.
Definition: sl_iec60730.h:356
+
IEC60730_OEM1_COMPLETE
#define IEC60730_OEM1_COMPLETE
Mask bit used for OEM Check 1 completed.
Definition: sl_iec60730.h:350
+
IEC60730_OEM5_COMPLETE
#define IEC60730_OEM5_COMPLETE
Mask bit used for OEM Check 5 completed.
Definition: sl_iec60730.h:358
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER__VERIFICATION__UNIT__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..0456ff52 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,140 @@ + + + + + + + +Document API IEC60730 Library: Program Counter Verification Unit Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
Program Counter Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate function sl_iec60730_program_counter_test(). +More...

+ + + + + + +

+Functions

void test_sl_iec60730_program_counter_complete_all_bit_check (void)
 
void test_sl_iec60730_program_counter_fail_some_bit_check (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate function sl_iec60730_program_counter_test().

+

IEC60730 Program Counter Unit Tests

+

These test cases run unit tests to check the operation of the function sl_iec60730_program_counter_test()

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_sl_iec60730_program_counter_complete_all_bit_check()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_program_counter_complete_all_bit_check (void )
+
+

Public Check sl_iec60730_program_counter_test() operate

+
Returns
None.
+

If bool local is_function_called variable equal false. It means test result routine of sl_iec60730_program_counter_test() is a pass, function sl_iec60730_safety_check_error_occur() is not called.

+ +
+
+ +

◆ test_sl_iec60730_program_counter_fail_some_bit_check()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_program_counter_fail_some_bit_check (void )
+
+

Public Check sl_iec60730_program_counter_test() operate

+
Returns
None.
+

If bool local is_function_called variable true. It means test result routine of sl_iec60730_program_counter_test() is a failure, function sl_iec60730_safety_check_error_occur() is called.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__SAFETY__CHECK__VERIFICATION__UNIT__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__SAFETY__CHECK__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..793cfbd8 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__SAFETY__CHECK__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,140 @@ + + + + + + + +Document API IEC60730 Library: Safety Check Verification Unit Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
Safety Check Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur(). +More...

+ + + + + + +

+Functions

void test_sl_iec60730_safety_check_error_occur (void)
 
void test_sl_iec60730_safety_check_reset_error (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().

+

IEC60730 Safety Check Unit Tests

+

These test cases run unit tests to check the operation of the function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur()

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_sl_iec60730_safety_check_error_occur()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_safety_check_error_occur (void )
+
+

Public Check sl_iec60730_safety_check_error_occur() operate

+
Returns
None.
+

If iec60730_safety_check.error value get from sl_iec60730_safety_check_get_error() equal error passed in via function sl_iec60730_safety_check_error_occur(). Then test case is pass.

+ +
+
+ +

◆ test_sl_iec60730_safety_check_reset_error()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_safety_check_reset_error (void )
+
+

Public Check sl_iec60730_safety_check_reset_error() operate

+
Returns
None.
+

If iec60730_safety_check.error and iec60730_safety_check.number_error value get from sl_iec60730_safety_check_get_error() is 0. Then test case is pass.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__SAFE__STATE.html b/docs/document_api_iec60730_library/group__IEC60730__SAFE__STATE.html new file mode 100644 index 00000000..f8b2e1ee --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__SAFE__STATE.html @@ -0,0 +1,119 @@ + + + + + + + +Document API IEC60730 Library: Safe State + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
Safe State
EFR32 IEC60730 Library
+
+
+ +

When incorrect behavior is detected, this state prevents further execution. +More...

+ + + + +

+Functions

void sl_iec60730_safe_state (sl_iec60730_test_failure_t failure)
 
+

Detailed Description

+

When incorrect behavior is detected, this state prevents further execution.

+

The Safe State function must be written by the OEM to configure the system to prevent any potential negative effects from occurring. GPIOs and communications channels must be configured appropriately.

+

Once any configuration is complete, the function loops to restart the watchdog. This prevents any resets until the end-user power-cycles the device.

+

Function Documentation

+ +

◆ sl_iec60730_safe_state()

+ +
+
+ + + + + + + + +
void sl_iec60730_safe_state (sl_iec60730_test_failure_t failure)
+
+

public IEC60730 Safe State

+
Parameters
+ + +
failureEnum with the failing test, can be preserved for debug. See sl_iec60730_test_failure_t
+
+
+
Returns
Never.
+

When a validation failure is detected, the Safe State function is executed to prevent further system failures.

Note
This is an example; an OEM must fully implement this according to their system needs.
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__TEST.html new file mode 100644 index 00000000..c9285930 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__TEST.html @@ -0,0 +1,357 @@ + + + + + + + +Document API IEC60730 Library: System Clock Check + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Macros | +Enumerations | +Functions
+
+
System Clock Check
EFR32 IEC60730 Library
+
+
+ +

Verifies that system clocks are within expected frequencies. +More...

+ + + + + + + + + +

+Macros

+#define SL_IEC60730_TEST_CLOCK_MULTIPLIER   10
 Determines how many entrances into sl_iec60730_test_clock_tick() occur before bist frequency test executes.
 
#define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ   10
 
#define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE   1
 
+ + + + +

+Enumerations

enum  sl_iec60730_timer_test_control_t { SL_IEC60730_TIMER_TEST_DISABLE = 0, +SL_IEC60730_TIMER_TEST_ENABLE = 1 + }
 Enable/disable switch for system timer test. More...
 
+ + + + + + + + + + + + + +

+Functions

void sl_iec60730_sys_clock_count_tick (void)
 
void sl_iec60730_test_clock_tick (void)
 
void sl_iec60730_sys_clock_count_reset (void)
 
uint16_t sl_iec60730_get_number_test_timer_tick (void)
 
void sl_iec60730_sys_clock_test_enable (void)
 
void sl_iec60730_sys_clock_test_disable (void)
 
+

Detailed Description

+

Verifies that system clocks are within expected frequencies.

+

For IEC60730, a plausibility check must be performed to check that the system clock is running at a frequency with an expected bounds. This check requires that the system clock frequency be compared against a second, independent clock's frequency (test clock).

+

+Hardware Architecture

+

EFR32 family devices provide a high frequency internal oscillator as well as a low frequency internal oscillator. The devices also provide timers modules that can be configured to use either oscillator as a clock source. These peripherals can be configured to vector code to interrupt service routines when the counter incremented by the peripheral and clocked by one of the clock sources meets certain criteria.

+

For timers, the criteria is a counter overflow event. The frequency of this overflow is defined by a reload value configured in firmware that hardware automatically loads into the timer's counter upon overflow.

+

Some timers offer a special mode where the timer's clock source is gated by a falling edge of the low frequency oscillator. In these cases, the system clock can be used as the clock source, and the number of timer counter ticks captured during the low frequency oscillator's logic low phase expresses the relationship between the two clocks.

+

The define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ holds the ratio value between system clock timer interrupt period and test clock timer interrupt period, this value is used to compare with the system clock counter. The ratio value is divided by slow timer period (test clock timer interrupt period) and fast timer period (system clock timer interrupt period).

+

The tolerance of test (OEM set value of the define, config: SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE) is typical (+/-) 10%-49% of the SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ.

+

+Suggested OEM Configuration

+

Not every EFR32 device offers the same types of timers and clock sources. For this reason, the optimal resource usage on each device family varies. The following chart offers a suggested configuration for each EFR32 family. Firmware examples configure system and test timers as in Table 1

+
Table 1 Suggested system and test timer configuration on EFR32 device families

+ + + + + + +
EFR32 device System timer Test timer
Series 1
    +
  • +TIMERn clocked by system clock HFCLK which is the master clock of the core and other peripherals.
    • +
  • +Special case: If the ADC module is clocked by AUXHFRCO then OEM could use IRQCheck to measure clock indirectly via sample rate interrupt.
    • +
+
    +
  • +LETIMER0 clocked by internal fixed clock (LFRCO or ULFRCO) with configurable prescaler.
    • +
+
Series 2
    +
  • +TIMERn clocked by one of the HFXO, HFRCODPLL, HFRCOEM23, FSRCO clock sources that could be used to test for CPU, high speed peripherals (SYSCLK), Radio module (HFXO) and IADC module (HFRCOEM23).
    • +
  • +WDOGn clocked by HCLK when system clock (SYSCLK) is selected as CLKIN0
    • +
+
    +
  • +LETIMERn clocked by internal fixed clock (LFRCO or ULFRCO).
    • +
+
+

+Failure Risks

+

The library's system clock plausibility test will force entry into safe state if the frequency relationship between the system clock and the test clock exceeds upper and lower bounds.

+

The library examines the relationship between the two clocks using calls that the OEM must place in OEM-defined timer interrupt service routines. Code examples for each EFR32 device provide drop-in firmware solutions for OEMs for timer initialization and ISR source code. OEMs must ensure that timer ISRs are able to be serviced promptly during operation.

+

Additionally, the OEM is responsible for leaving the system clock at a constant and defined operating frequency throughout all OEM firmware.

+

Finally, the OEM is responsible for setting sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_DISABLE within safety-critical code by calling function sl_iec60730_sys_clock_test_disable(). This value is only used in cases where the system is executing non-safety-critical code, where the BIST routine is also not being called. When returning to normal operation, clear all interrupt counters in iec60730 IRQ execution count, reset the timer clock tick and system clock tick timers, and set sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_ENABLE.

+

+Software Architecture

+

Table 1

+

For the EFR32 IEC60730 implementation, Figure 1 shows the logic flow chart of the system clock frequency check during BIST. The test executes in the test timer interrupt, which runs as foreground calls to OEM functions and the foreground BIST test continuously execute.

+
+ +
+Figure 1 System clock frequency check flowchart
+

+

Macro Definition Documentation

+ +

◆ SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ

+ +
+
+ + + + +
#define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ   10
+
+

This define holds the ratio value between system clock timer interrupt period and test clock timer interrupt period

+ +
+
+ +

◆ SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE

+ +
+
+ + + + +
#define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE   1
+
+

(OEM set value of the define) is typical (+/-) 10%-49% of the SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ.

+ +
+
+

Enumeration Type Documentation

+ +

◆ sl_iec60730_timer_test_control_t

+ +
+
+ + + + +
enum sl_iec60730_timer_test_control_t
+
+ +

Enable/disable switch for system timer test.

+ + + +
Enumerator
SL_IEC60730_TIMER_TEST_DISABLE 

timer tests will not execute

+
SL_IEC60730_TIMER_TEST_ENABLE 

timer tests will execute

+
+ +
+
+

Function Documentation

+ +

◆ sl_iec60730_get_number_test_timer_tick()

+ +
+
+ + + + + + + + +
uint16_t sl_iec60730_get_number_test_timer_tick (void )
+
+

public IEC60730 Get Timer Tick

+
Returns
sl_iec60730_number_test_timer_tick.
+

Function get value sl_iec60730_number_test_timer_tick, used for OEM testing

+ +
+
+ +

◆ sl_iec60730_sys_clock_count_reset()

+ +
+
+ + + + + + + + +
void sl_iec60730_sys_clock_count_reset (void )
+
+

public IEC60730 Initialize iec60730 timer tick variables

+
Returns
None.
+

This function should be called within the sl_iec60730_test_clock_tick() callback. During the initialization of the test clock timers, this function resets the internal test clock and system clock tick variables to known reset states.

+ +
+
+ +

◆ sl_iec60730_sys_clock_count_tick()

+ +
+
+ + + + + + + + +
void sl_iec60730_sys_clock_count_tick (void )
+
+

OEMs use the defines SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ and SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE in the config file to define the expected tolerance and clock frequency of executions for each test clock tick included in a project. OEM code need to disable ISR-based timer test execution when in safe states. This local variable allows OEM code to test when events occur. static uint16_t sl_iec60730_number_test_timer_tick; Provides the expected ratio of system clock to test clock ticks Allows OEM code to run tests using timer tick. Must be defined as system clock (faster clock) / test clock (slower clock). The ratio value cannot exceed 0xFFFF.

+

This local variable allows customers to stop ISR-based tests when code enters a safe state where BIST is not being called because the code is not safety critical. Tests whose execution is gated by this value are the system clock test, the interrupt plausibility test, and the BIST execution frequency test. static uint8_t sl_iec60730_timer_test_control

+

This local variable allows customers to know the number of times the function sl_iec60730_test_clock_tick is called, used for customers testing static uint16_t sl_iec60730_number_test_timer_tick public IEC60730 System Clock Tick

+
Returns
None.
+

This function increments a system clock counter sl_iec60730_sys_clock_count, which is compared to a test clock counter as part of the system clock frequency check. It should be called in the timer interrupt service routine designated as the system clock timer in oem_iec60730_timer.c.

+ +
+
+ +

◆ sl_iec60730_sys_clock_test_disable()

+ +
+
+ + + + + + + + +
void sl_iec60730_sys_clock_test_disable (void )
+
+

public IEC60730 Disable Timer Test

+
Returns
None.
+

Function set sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_DISABLE.

+ +
+
+ +

◆ sl_iec60730_sys_clock_test_enable()

+ +
+
+ + + + + + + + +
void sl_iec60730_sys_clock_test_enable (void )
+
+

public IEC60730 Enable Timer Test

+
Returns
None.
+

Function set sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_ENABLE.

+ +
+
+ +

◆ sl_iec60730_test_clock_tick()

+ +
+
+ + + + + + + + +
void sl_iec60730_test_clock_tick (void )
+
+

public IEC60730 Test Clock Tick

+
Returns
None.
+

This function increments a test clock counter. The function executes all interrupt service routine-based IEC60730 tests, including the system clock frequency check. It should be called in the timer interrupt service routine designated as the test clock timer in oem_iec60730_timer.c.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html b/docs/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html new file mode 100644 index 00000000..75b972fe --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html @@ -0,0 +1,129 @@ + + + + + + + +Document API IEC60730 Library: System Clock Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
System Clock Automated Verification Tests
IEC60730 Test Specification » Integration Test Modules In Library IEC60730
+
+
+ +

Python script for the IEC60730 system clock Verification tests. +More...

+ + + + + +

+Classes

class  integration_test_iec60730_system_clock.iec60730_system_clock
 IEC60730 System Clock Verification Tests. More...
 
+ + + +

+Functions

+bytes integration_test_iec60730_system_clock.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + + + + + +

+Variables

+ integration_test_iec60730_system_clock.chip_name = os.getenv('CHIP')
 Chip name run test.
 
+ integration_test_iec60730_system_clock.lst_file_path = os.getenv('LST_PATH')
 Path to file *.lst.
 
+ integration_test_iec60730_system_clock.adapter_serial_no = os.getenv('ADAPTER_SN')
 serialno of device
 
+ integration_test_iec60730_system_clock.lib_path = os.getenv('JLINK_PATH')
 Path to jlink library.
 
+ integration_test_iec60730_system_clock.line = sys.argv.pop()
 Number of arguments passed into the script file.
 
+ integration_test_iec60730_system_clock.compiler = line
 compiler creates the file *.lst
 
+

Detailed Description

+

Python script for the IEC60730 system clock Verification tests.

+

For details on the tests, see iec60730_system_clock.iec60730_system_clock.

+

+Test Results

+

EFR32 Device | Test Results ----------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION__UNIT__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..26f86c09 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,232 @@ + + + + + + + +Document API IEC60730 Library: System Clock Verification Unit Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
System Clock Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate functions in system_clock module. +More...

+ + + + + + + + + + + + + + +

+Functions

void test_sl_iec60730_test_clock_tick_timer_test_disable (void)
 
void test_sl_iec60730_test_clock_tick_count_in_bound (void)
 
void test_sl_iec60730_test_clock_tick_count_out_bound (void)
 
void test_sl_iec60730_sys_clock_count_reset (void)
 
void test_sl_iec60730_test_clock_tick_test_clock_multiplier (void)
 
void test_sl_iec60730_get_number_test_timer_tick (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate functions in system_clock module.

+

IEC60730 System Clock Unit Tests

+

These test cases run unit tests to check the operation of the functions in system_clock module.

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_sl_iec60730_get_number_test_timer_tick()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_get_number_test_timer_tick (void )
+
+

Public Check sl_iec60730_get_number_test_timer_tick() operate

+
Returns
None.
+

Check if the number of times the function sl_iec60730_test_clock_tick() has been called is the same as the value received from the function sl_iec60730_get_number_test_timer_tick().

+ +
+
+ +

◆ test_sl_iec60730_sys_clock_count_reset()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_sys_clock_count_reset (void )
+
+

Public Check sl_iec60730_test_clock_tick() operate

+
Returns
None.
+

If sl_iec60730_timer_test_control equals SL_IEC60730_TIMER_TEST_ENABLE. Call function sl_iec60730_sys_clock_count_tick() to increase the value of variable sl_iec60730_sys_clock_count. If the sl_iec60730_sys_clock_count value is within the check boundary value. Then call function sl_iec60730_sys_clock_count_reset() to reset variable sl_iec60730_sys_clock_count. Function sl_iec60730_safe_state() will be called.

+ +
+
+ +

◆ test_sl_iec60730_test_clock_tick_count_in_bound()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_test_clock_tick_count_in_bound (void )
+
+

Public Check sl_iec60730_test_clock_tick() operate

+
Returns
None.
+

If sl_iec60730_timer_test_control equals SL_IEC60730_TIMER_TEST_ENABLE. Call function sl_iec60730_sys_clock_count_tick() to increase the value of variable sl_iec60730_sys_clock_count. If the sl_iec60730_sys_clock_count value is within the check boundary value. Function sl_iec60730_safe_state() will not be called.

+ +
+
+ +

◆ test_sl_iec60730_test_clock_tick_count_out_bound()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_test_clock_tick_count_out_bound (void )
+
+

Public Check sl_iec60730_test_clock_tick() operate

+
Returns
None.
+

If sl_iec60730_timer_test_control equals SL_IEC60730_TIMER_TEST_ENABLE. Call function sl_iec60730_sys_clock_count_tick() to increase the value of variable sl_iec60730_sys_clock_count. If the sl_iec60730_sys_clock_count value is out of range the check boundary value. Function sl_iec60730_safe_state() will be called.

+ +
+
+ +

◆ test_sl_iec60730_test_clock_tick_test_clock_multiplier()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_test_clock_tick_test_clock_multiplier (void )
+
+

Public Check sl_iec60730_test_clock_tick() operate

+
Returns
None.
+

The number of function sl_iec60730_test_clock_tick() calls is greater than the default value and variable sl_iec60730_sys_clock_count value is within the check boundary value each time call. Function sl_iec60730_program_counter_test() will be called.

+ +
+
+ +

◆ test_sl_iec60730_test_clock_tick_timer_test_disable()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_test_clock_tick_timer_test_disable (void )
+
+

Public Check sl_iec60730_test_clock_tick() operate

+
Returns
None.
+

If sl_iec60730_timer_test_control equals SL_IEC60730_TIMER_TEST_DISABLE. Function sl_iec60730_safe_state() will be called.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__UNIT__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__UNIT__TEST.html new file mode 100644 index 00000000..77bc2811 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__UNIT__TEST.html @@ -0,0 +1,117 @@ + + + + + + + +Document API IEC60730 Library: UNIT Test Functions In Modules In Library IEC60730 + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Modules
+
+
UNIT Test Functions In Modules In Library IEC60730
IEC60730 Test Specification
+
+
+ +

C file combined with Unity framework. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Modules

 Bist Verification Unit Tests
 Header file list of test cases for the verification operate function sl_iec60730_bist().
 
 CPU Registers Verification Unit Tests
 Header file list of test cases for the verification operate functions in cpu registers module.
 
 IRQ Verification Unit Tests
 Header file list of test cases for the verification operate functions in irq module.
 
 Invariable Memory Verification Unit Tests
 Header file list of test cases for the verification operate functions in invariable memory module.
 
 Post Verification Unit Tests
 Header file list of test cases for the verification operate function sl_iec60730_post().
 
 Program Counter Verification Unit Tests
 Header file list of test cases for the verification operate function sl_iec60730_program_counter_test().
 
 Safety Check Verification Unit Tests
 Header file list of test cases for the verification operate function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().
 
 System Clock Verification Unit Tests
 Header file list of test cases for the verification operate functions in system_clock module.
 
 Variable Memory Verification Unit Tests
 Header file list of test cases for the verification operate functions in variable memory module.
 
 Watchdog Verification Unit Tests
 Header file list of test cases for the verification operate functions in watchdog module.
 
+

Detailed Description

+

C file combined with Unity framework.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__UNIT__TEST__POST.html b/docs/document_api_iec60730_library/group__IEC60730__UNIT__TEST__POST.html new file mode 100644 index 00000000..5f11741c --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__UNIT__TEST__POST.html @@ -0,0 +1,140 @@ + + + + + + + +Document API IEC60730 Library: Post Verification Unit Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
Post Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate function sl_iec60730_post(). +More...

+ + + + + + +

+Functions

void test_sl_iec60730_post_pass_all_check_condition (void)
 
void test_sl_iec60730_post_failed_check_condition (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate function sl_iec60730_post().

+

IEC60730 Post Unit Tests

+

These test cases run unit tests to check the operation of the function sl_iec60730_post()

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_sl_iec60730_post_failed_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_post_failed_check_condition (void )
+
+

Public Check sl_iec60730_post() operate

+
Returns
None.
+

If bool local is_function_called variable true. It means test result routine of sl_iec60730_post() is a failure, function sl_iec60730_safe_state() is called.

+ +
+
+ +

◆ test_sl_iec60730_post_pass_all_check_condition()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_post_pass_all_check_condition (void )
+
+

Public Check sl_iec60730_post() operate

+
Returns
None.
+

If bool local is_function_called variable equal false. It means test result routine of sl_iec60730_post() is a pass, function sl_iec60730_safe_state() is not called. So timer support test is enabled.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__TEST.html new file mode 100644 index 00000000..c28a99b9 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__TEST.html @@ -0,0 +1,547 @@ + + + + + + + +Document API IEC60730 Library: Variable Memory Check + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Macros | +Functions | +Variables
+
+
Variable Memory Check
EFR32 IEC60730 Library
+
+
+ +

Verifies RAM is working correctly. +More...

+ + + + + + + + +

+Classes

struct  sl_iec60730_vmc_test_region_t
 This structure is used as configuration for VMC testing. More...
 
struct  sl_iec60730_vmc_test_multiple_regions_t
 This structure is used as multiple test regions for VMC testing. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define BLOCKSIZE   (4)
 
#define RT_BLOCK_OVERLAP   (1)
 
#define RT_BLOCKSIZE   (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
 
#define BACKGROUND   ((uint32_t) 0x00000000uL)
 
#define SL_IEC60730_VMC_POST_ENTER_CRITICAL()
 Enter ATOMIC section of VMC Post. More...
 
+#define SL_IEC60730_VMC_POST_EXIT_CRITICAL()   CORE_EXIT_CRITICAL()
 Exit ATOMIC section of VMC Post.
 
#define SL_IEC60730_VMC_BIST_ENTER_CRITICAL()
 Enter ATOMIC section of VMC Bist. More...
 
+#define SL_IEC60730_VMC_BIST_EXIT_CRITICAL()   CORE_EXIT_CRITICAL()
 Exit ATOMIC section of VMC Bist.
 
+#define STACK_CHECK   ((uint32_t *) (&stack_check))
 
+#define RAM_START   ((uint32_t *) (&ram_start))
 RAM starting address.
 
+#define RAM_END   ((uint32_t *) ((uint32_t) RAM_BACKUP - 1))
 RAM ending address.
 
+#define RAM_BACKUP   ((uint32_t *) (&__StackTop))
 RAM backup address.
 
+#define CLASSB_START   ((uint32_t *) (&classb_start))
 ClassbRAM starting address.
 
+#define CLASSB_END   ((uint32_t *) ((uint32_t) (&class_b_limit) - 1))
 ClassbRAM ending address.
 
+#define RAMTEST_START   CLASSB_START
 Example RAM starting address test.
 
+#define RAMTEST_END   CLASSB_END
 Example RAM ending address test.
 
+#define SL_IEC60730_USE_MARCHX_ENABLE   1
 Enable used the algorithm used in BIST is March-X.
 
+#define SL_IEC60730_VAR_BLOCKS_PER_BIST   256
 Number of ram blocks tested per BIST.
 
+#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0   (0xEEEEEEEEuL)
 Pattern 0 is used for stack overflow.
 
+#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1   (0xCCCCCCCCuL)
 Pattern 1 is used for stack overflow.
 
+#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2   (0xBBBBBBBBuL)
 Pattern 2 is used for stack overflow.
 
+#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3   (0xDDDDDDDDuL)
 Pattern 3 is used for stack overflow.
 
+ + + + + + + + + + + + + +

+Functions

void sl_iec60730_vmc_init (sl_iec60730_vmc_test_multiple_regions_t *test_config)
 
sl_iec60730_test_result_t sl_iec60730_vmc_post (void)
 
sl_iec60730_test_result_t sl_iec60730_vmc_bist (void)
 
bool sl_iec60730_vmc_pre_run_marchxc_step (uint32_t *addr, uint32_t size)
 This function is called before performing the RAM check. Depending on the RAM region will be checked to give reasonable actions. More...
 
void sl_iec60730_vmc_post_run_marchxc_step (uint32_t *addr, uint32_t size)
 After testing the RAM, you can restore the previous work. More...
 
+ + + + + + + + + + + + + +

+Variables

+uint32_t classb_start
 
+uint32_t classb_end
 
+uint32_t __StackTop
 
+uint32_t ram_start
 
+uint32_t class_b_limit
 
+uint32_t stack_check
 
+

Detailed Description

+

Verifies RAM is working correctly.

+

+Hardware Architecture

+

Depending on using the definitation, the testing process takes place through different steps and different region RAM memory.

+

+Failure Risks

+

There are several potential sources of failure in the variable memory hardware

    +
  • Stuck bits that do not change (either 0 or 1)
    • +
  • Coupled bits that change based on a neighbor
    • +
  • Address lines that couple or disconnect, activating an incorrect location
    • +
  • Single Event Upset (SEU) that toggle a bit or bits without permanent damage to the memory hardware
    • +
+

The variable memory check can detect the first three types of errors using the March-X algorithm. The VMC is based on a word-oriented March-X algorithm from http://www.ece.uc.edu/~wjone/Memory.pdf.

+

SEU failures are not detected in a class B control, and would require class C level of validation to detect - data duplication, error- detecting-and-correcting memory, etc. A failure of this type will be detected once it causes a secondary failure such as missing a watchdog restart or incorrect clock frequency.

+

+Software Architecture

+

As show in Software Architecture, there are 3 test processes happen. In the case POST testing, the algorithm used is March-C. In the BIST testing, the algorithm used is March-X by default. If user DOES NOT use the SL_IEC60730_USE_MARCHX_ENABLE definition, the algorithm used is March-C. March-X algorithm is faster than March-C because March-X algorithm is only March-C algorithm that omits some steps (Step 3, 4). The March-C algorithm (van de Goor,1991) is described as below steps

+
    +
  • STEP 1: Write all zeros to array
    • +
  • STEP 2: Starting at lowest address, read zeros, write ones, increment up array
    • +
  • STEP 3: Starting at lowest address, read ones, write zeros, increment up array.
    • +
  • STEP 4: Starting at highest address, read zeros, write ones, decrement down array.
    • +
  • STEP 5: Starting at highest address, read ones, write zeros, decrement down array.
    • +
  • STEP 6: Read all zeros from array.
    • +
+

Some detail about implementing of Variable Memory Check (VMC) and used variables. These variables are also used in the test cases (TC) of the VMC module.

+

To make sure the VMC module as well as the IMC module work properly, it is necessary to ensure the location of the ram area for these modules. The sections SHOULD be placed in the correct order: (*.rt_buf*) -> (*.overlap*). DO NOT change this order. Please refer to our example linker for more details.

+

User need declare a variable of struct sl_iec60730_vmc_test_region_t. In the initialization step, we need to assign the start address and end address to this variable for executing the VMC. For example, we will call the starting address RAMTEST_START and the ending address RAMTEST_END to make it easier to describe later.

+

    +
  • Variable iec60730_bk_buf is a buffer used to backup data during testing process and is placed at (*.rt_buf*) section. The size of this variable is defined in file sl_iec60730.h (i.e RT_BLOCKSIZE definition). The RT_BLOCKSIZE definition will be mentioned later.
    • +
+

+

+

Before performing the RAM test, we provide a callback function named sl_iec60730_vmc_pre_run_marchxc_step. After performing the RAM test, we also provide a callback function named sl_iec60730_vmc_post_run_marchxc_step, and the user decides what to do after the RAM test is over.

+

As mentioned about SL_IEC60730_BOARD_HEADER in Invariable Memory Check module, the definition SL_IEC60730_BOARD_HEADER also has the necessary information for VMC module to run. The RAMTEST_START and RAMTEST_END definitions are used to assigned to start, and end member of a variable of type sl_iec60730_vmc_test_region_t. Two definitions are optional because the user can directly assign values to the start and end member of a variable as long as these values satisfy the conditions describled of the RAMTEST_START, and RAMTEST_END definitions. The BACKGROUND, BLOCKSIZE, RT_BLOCK_OVERLAP, and RT_BLOCKSIZE SHOULD use our default definitions.

+

Currently we also support stack test to check for stack overflow using pattern (here is an array with 4 elements) placed at the bottom of the stack. You can refer to the (*.stack_bottom*) section in our linker example. The initialization values of this array are initialized when calling the function sl_iec60730_vmc_init. Every time when executing sl_iec60730_vmc_bist will check the value of this array and based on the check results will return SL_IEC60730_TEST_FAILED nor not.

+

+

sl_iec60730_vmc_post()

+

+ +
+Figure 1 Flow chart of Variable Memory Check POST
+

sl_iec60730_vmc_bist()

+

+ +
+Figure 2 Flow chart of Variable Memory Check BIST
+

Figure 3 shows two examples of RAM configurations. The figure on the left can be found in our examples. The figure on the right is a possible scenario. We will analyze these cases as below.

+

+ +
+Figure 3 Example of RAM memory configuration
+

With the figure on the left, as mentioned above (*.rt_buf*) and (*.overlap*) are placed in fixed order, namely Ram Backup and Overlap as shown in the Figure. The RAMTEST_START can start the next Overlap. This figure also describes the algorithm of testing. The RAM area under test is defined starting from RAMTEST_START to RAMTEST_END, and split into multiple BLOCKs. Each block has a size determined by BLOCKSIZE. In the first test step, the BLOCK (1) and Overlap are tested. The Ram Backup is used to back up the data in the BLOCK being tested, and will restore it after the test in BLOCKs competletey. In the second test step, BLOCK (2) is tested and a part of BLOCK (1) is also tested. There is an area in BLOCK (1), also called overlap, which will be tested twice. This makes the test even more secure. Continue like this until the test reaches BLOCK (N), the last block, then return to test the Ram Backup.

+

The image on the right is slightly different when, the tested area (from RAMTEST_START to RAMTEST_END) contains Ram Backup and Overlap. In order to ensure the algorithm works properly, in the case like the figure on the right at the starting position (RAMTEST_START) it is necessary to create an overlap area. As mentioned above this overlap is also tested so user DOES NOT need to worry. Next, the test process is the same as said, will test the BLOCKs (from BLOCK (1) to BLOCK (N)). Here is a point to note when testing to Ram Backup, it will be ignored because this Ram Backup WILL be tested after the test of the last block (BLOCK (N)).

+

In case the tested area has the address of RAMTEST_START smaller than the address of Ram Backup, the test process is similar to the figure on the right.

+

Macro Definition Documentation

+ +

◆ BACKGROUND

+ +
+
+ + + + +
#define BACKGROUND   ((uint32_t) 0x00000000uL)
+
+

The BACKGROUND definition is background used to testing. In our sample, value 0x00000000uL is used value for background. Of course, we can define another value. We recommend using definition like ours (0x00000000uL) because it accurately describes the steps of the March-X/March-C algorithm described above.

+ +
+
+ +

◆ BLOCKSIZE

+ +
+
+ + + + +
#define BLOCKSIZE   (4)
+
+

The BLOCKSIZE definition MUST be 4 as our example for the algorithm to work properly.

+ +
+
+ +

◆ RT_BLOCK_OVERLAP

+ +
+
+ + + + +
#define RT_BLOCK_OVERLAP   (1)
+
+

The RT_BLOCK_OVERLAP definition is used to present the size of #iec60730_ram_test_overlap buffer. The variable #iec60730_ram_test_overlap has a size of (2 * RT_BLOCK_OVERLAP). For the algorithm (March-X/March-C) to work properly this definition MUST take the value 1 as in our example.

+ +
+
+ +

◆ RT_BLOCKSIZE

+ +
+
+ + + + +
#define RT_BLOCKSIZE   (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
+
+

The definition of RT_BLOCKSIZE is taken from the definition of BLOCKSIZE and RT_BLOCK_OVERLAP.

+ +
+
+ +

◆ SL_IEC60730_VMC_BIST_ENTER_CRITICAL

+ +
+
+ + + + + + + +
#define SL_IEC60730_VMC_BIST_ENTER_CRITICAL()
+
+Value:
CORE_DECLARE_IRQ_STATE; \
+
CORE_ENTER_CRITICAL()
+
+

Enter ATOMIC section of VMC Bist.

+ +
+
+ +

◆ SL_IEC60730_VMC_POST_ENTER_CRITICAL

+ +
+
+ + + + + + + +
#define SL_IEC60730_VMC_POST_ENTER_CRITICAL()
+
+Value:
CORE_DECLARE_IRQ_STATE; \
+
CORE_ENTER_CRITICAL()
+
+

Enter ATOMIC section of VMC Post.

+ +
+
+

Function Documentation

+ +

◆ sl_iec60730_vmc_bist()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_vmc_bist (void )
+
+

public IEC60730 Variable Memory Check (VMC) BIST

+
Parameters
+ + +
paramsinput parameter of struct sl_iec60730_vmc_test_region_t form
+
+
+
Returns
sl_iec60730_test_result_t. +
+

Performs a variable memory check in defined area. For details how sl_iec60730_vmc_bist work, please refer to Software Architecture

+

Requires sl_iec60730_vmc_init to be called first to setup global variables.

+ +
+
+ +

◆ sl_iec60730_vmc_init()

+ +
+
+ + + + + + + + +
void sl_iec60730_vmc_init (sl_iec60730_vmc_test_multiple_regions_t * test_config)
+
+

public IEC60730 Variable Memory Check (VMC) Initialize

+
Parameters
+ + +
paramsinput parameter of struct sl_iec60730_vmc_test_multiple_regions_t form
+
+
+
Returns
void
+

Performs a initialization of global variables. This function SHOULD call before calling sl_iec60730_vmc_post()

+ +
+
+ +

◆ sl_iec60730_vmc_post()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_vmc_post (void )
+
+

public IEC60730 Variable Memory Check (VMC) POST

+
Parameters
+ + +
paramsinput parameter of struct sl_iec60730_vmc_test_region_t form
+
+
+
Returns
sl_iec60730_test_result_t. +
+

Performs a variable memory check in defined area. For details how sl_iec60730_vmc_post work, please refer to Software Architecture

+ +
+
+ +

◆ sl_iec60730_vmc_post_run_marchxc_step()

+ +
+
+ + + + + + + + + + + + + + + + + + +
void sl_iec60730_vmc_post_run_marchxc_step (uint32_t * addr,
uint32_t size 
)
+
+ +

After testing the RAM, you can restore the previous work.

+
Parameters
+ + + +
addrThe starting address of the ram under test
sizeThe size of the ram area to be tested. This parameter
+
+
+
Returns
void
+ +
+
+ +

◆ sl_iec60730_vmc_pre_run_marchxc_step()

+ +
+
+ + + + + + + + + + + + + + + + + + +
bool sl_iec60730_vmc_pre_run_marchxc_step (uint32_t * addr,
uint32_t size 
)
+
+ +

This function is called before performing the RAM check. Depending on the RAM region will be checked to give reasonable actions.

+
Parameters
+ + + +
addrThe starting address of the ram under test
sizeThe size of the ram area to be tested. This parameter is BLOCKSIZE
+
+
+
Returns
bool
    +
  • true - allow running RAM test
    • +
  • false - not allow
    • +
+
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html b/docs/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html new file mode 100644 index 00000000..f64e6003 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html @@ -0,0 +1,130 @@ + + + + + + + +Document API IEC60730 Library: Variable Memory Automated Verification Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Variables
+
+
Variable Memory Automated Verification Tests
IEC60730 Test Specification » Integration Test Modules In Library IEC60730
+
+
+ +

Python script for the IEC60730 Variable Memory plausibility verification tests. +More...

+ + + + + +

+Classes

class  integration_test_iec60730_variable_memory.iec60730_vmc
 IEC60730 Variable Memory Plausibility Verification Tests. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + +

+Variables

+bool integration_test_iec60730_variable_memory.isEnableMarchXC = True
 Disallowance testing with MARCH-X algorithm.
 
+ integration_test_iec60730_variable_memory.chip_name = os.getenv('CHIP')
 Chip name run test.
 
+ integration_test_iec60730_variable_memory.lst_file_path = os.getenv('LST_PATH')
 Path to file *.lst.
 
+ integration_test_iec60730_variable_memory.adapter_serial_no = os.getenv('ADAPTER_SN')
 serialno of device
 
+ integration_test_iec60730_variable_memory.lib_path = os.getenv('JLINK_PATH')
 Path to jlink library.
 
+ integration_test_iec60730_variable_memory.use_marchx_enable = os.getenv('INTEGRATION_TEST_USE_MARCHX_DISABLE')
 Enable test with MARCH-X algorithm.
 
+ integration_test_iec60730_variable_memory.line = sys.argv.pop()
 Number of arguments passed into the script file.
 
+ integration_test_iec60730_variable_memory.compiler = line
 compiler creates the file *.lst
 
+

Detailed Description

+

Python script for the IEC60730 Variable Memory plausibility verification tests.

+

For details on the tests, see iec60730_variable_memory.iec60730_variable_memory.

+

+Test Results

+

EFR32 Device| Test Results ---------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..c102b825 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,439 @@ + + + + + + + +Document API IEC60730 Library: Variable Memory Verification Unit Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
Variable Memory Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate functions in variable memory module. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

sl_iec60730_test_result_t unit_test_mock_check_integrity (void)
 
void test_sl_iec60730_vmc_init_param_null (void)
 
void test_sl_iec60730_vmc_init_start_address_greater_than_end_address (void)
 
void test_sl_iec60730_vmc_post_pass_all_check_sections (void)
 
void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section (void)
 
void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section (void)
 
void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section (void)
 
void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section (void)
 
void test_sl_iec60730_vmc_bist_pass_all_check_sections (void)
 
void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section (void)
 
void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section (void)
 
void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section (void)
 
void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section (void)
 
void test_sl_iec60730_vmc_bist_checking_allow_run_test (void)
 
void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate functions in variable memory module.

+

IEC60730 Variable Memory Unit Tests

+

These test cases run unit tests to check the operation of the functions in variable memory module.

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_sl_iec60730_vmc_bist_checking_allow_run_test()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_bist_checking_allow_run_test (void )
+
+

Public Check sl_iec60730_vmc_bist() operate

+
Returns
None.
+

If sl_iec60730_vmc_pre_run_marchxc_step() returns false, meaning it is not allowed to run test sl_iec60730_vmc_marchxc_step() to check the ram section. Function sl_iec60730_vmc_marchxc_step() will not be called when checking ram section.

+ +
+
+ +

◆ test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section (void )
+
+

Public Check sl_iec60730_vmc_bist() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchxc algorithms to check the backup section pass, but checking the integrity of the variable iec60730_rt_check fail. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section (void )
+
+

Public Check sl_iec60730_vmc_bist() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchxc algorithms to check the ram section pass, but checking the integrity of the variable iec60730_rt_check fail. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section (void )
+
+

Public Check sl_iec60730_vmc_bist() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchxc algorithms to check the backup section fail. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section (void )
+
+

Public Check sl_iec60730_vmc_bist() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchxc algorithms to check the ram and backup section fail. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_bist_fail_stack_test_over_flow()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow (void )
+
+

Public Check sl_iec60730_vmc_bist() operate

+
Returns
None.
+

If check that the value of the iec60730_stack_test_over_flow variable located in the ending stack area is different from the initial initial value. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_bist_pass_all_check_sections()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_bist_pass_all_check_sections (void )
+
+

Public Check sl_iec60730_vmc_bist() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchxc algorithms to check the ram and backup section pass, checking the integrity of the variable iec60730_rt_check pass, check stack over flow pass The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_PASSED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_init_param_null()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_init_param_null (void )
+
+

Public Check sl_iec60730_vmc_init() operate

+
Returns
None.
+

If the input parameter has the value NULL, the components in the initialization value are NULL, the vmc test initialization flag fails. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_init_start_address_greater_than_end_address()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_init_start_address_greater_than_end_address (void )
+
+

Public Check sl_iec60730_vmc_init() operate

+
Returns
None.
+

If the input parameter has the value start member greater than value end member, the vmc test initialization flag fails. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_post_fail_check_integrity_backup_section()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section (void )
+
+

Public Check sl_iec60730_vmc_post() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchc algorithms to check the backup section pass, but checking the integrity of the variable iec60730_rt_check fail. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_post_fail_check_integrity_ram_section()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section (void )
+
+

Public Check sl_iec60730_vmc_post() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchc algorithms to check the ram section pass, but checking the integrity of the variable iec60730_rt_check fail. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_post_fail_marchc_check_backup_section()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section (void )
+
+

Public Check sl_iec60730_vmc_post() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchc algorithms to check the backup section fail. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_post_fail_marchc_check_ram_section()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section (void )
+
+

Public Check sl_iec60730_vmc_post() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchc algorithms to check the ram and backup section fail. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

+ +
+
+ +

◆ test_sl_iec60730_vmc_post_pass_all_check_sections()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_vmc_post_pass_all_check_sections (void )
+
+

Public Check sl_iec60730_vmc_post() operate

+
Returns
None.
+

If the initialization value is successful, the functions run the marchc algorithms to check the ram and backup section pass, checking the integrity of the variable iec60730_rt_check pass. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_PASSED.

+ +
+
+ +

◆ unit_test_mock_check_integrity()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t unit_test_mock_check_integrity (void )
+
+

Public Check sl_iec60730_vmc_init() operate

+
Returns
boolean.
+

Function simulates the result of iec60730_rt_check variable value integrity check.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__VERIFICATION.html b/docs/document_api_iec60730_library/group__IEC60730__VERIFICATION.html new file mode 100644 index 00000000..82b2d081 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__VERIFICATION.html @@ -0,0 +1,93 @@ + + + + + + + +Document API IEC60730 Library: IEC60730 Test Specification + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Modules
+
+
IEC60730 Test Specification
+
+
+ +

Automated tests for validating correct firmware operation. +More...

+ + + + + + + + +

+Modules

 Integration Test Modules In Library IEC60730
 Python script supports running test case integration tests for internal modules in library IEC60730.
 
 UNIT Test Functions In Modules In Library IEC60730
 C file combined with Unity framework.
 
+

Detailed Description

+

Automated tests for validating correct firmware operation.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION.html b/docs/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION.html new file mode 100644 index 00000000..b4387952 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION.html @@ -0,0 +1,137 @@ + + + + + + + +Document API IEC60730 Library: Watchdog Automated Verification Tests + + + + + + + + + +
+
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+
Document API IEC60730 Library +
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+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions | +Variables
+
+
Watchdog Automated Verification Tests
IEC60730 Test Specification » Integration Test Modules In Library IEC60730
+
+
+ +

Python script for the IEC60730 Watchdog timer Verification tests. +More...

+ + + + + +

+Classes

class  integration_test_iec60730_watchdog.iec60730_watchdog
 IEC60730 Watchdog Verification Tests. More...
 
+ + + +

+Functions

+bytes integration_test_iec60730_watchdog.int_to_bytes (int number)
 
+ + + + + + + + + + + + + + + + + + + + + + + + + +

+Variables

+ integration_test_iec60730_watchdog.hostIP = os.getenv('HOST_IP')
 IP address of device.
 
+ integration_test_iec60730_watchdog.chip_name = os.getenv('CHIP')
 Chip name run test.
 
+ integration_test_iec60730_watchdog.lst_file_path = os.getenv('LST_PATH')
 Path to file *.lst.
 
+ integration_test_iec60730_watchdog.adapter_serial_no = os.getenv('ADAPTER_SN')
 serialno of device
 
+ integration_test_iec60730_watchdog.lib_path = os.getenv('JLINK_PATH')
 Path to jlink library.
 
+ integration_test_iec60730_watchdog.wdog1_present = os.getenv('INTEGRATION_TEST_WDOG1_ENABLE')
 Enable test watchdog 1.
 
+ integration_test_iec60730_watchdog.line = sys.argv.pop()
 Number of arguments passed into the script file.
 
+ integration_test_iec60730_watchdog.compiler = line
 compiler creates the file *.lst
 
+

Detailed Description

+

Python script for the IEC60730 Watchdog timer Verification tests.

+

For details on the tests, see iec60730_watchdog.iec60730_watchdog.

+

+Test Results

+

EFR32 Device | Test Results ----------—|----------—

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION__UNIT__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..06e53b23 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,408 @@ + + + + + + + +Document API IEC60730 Library: Watchdog Verification Unit Tests + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Functions
+
+
Watchdog Verification Unit Tests
IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
+
+
+ +

Header file list of test cases for the verification operate functions in watchdog module. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

void unit_test_iec60730_watchdog_set_up (void)
 
bool unit_test_iec60730_watchdog_mock_rst_por (void)
 
bool unit_test_iec60730_watchdog_mock_rst_em4 (void)
 
bool unit_test_iec60730_watchdog_mock_rst_wdog0 (void)
 
bool unit_test_iec60730_watchdog_mock_rst_wdog1 (void)
 
bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min (void)
 
void unit_test_iec60730_watchdog_mock_rstcause_clear (void)
 
uint32_t unit_test_iec60730_watchdog_mock_rstcause (void)
 
void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog (void)
 
void test_sl_iec60730_watchdog_post_wachdog_reset_before_por (void)
 
void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success (void)
 
void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail (void)
 
void test_sl_iec60730_watchdog_post_reset_resason_no_valid (void)
 
void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value (void)
 
+

Detailed Description

+

Header file list of test cases for the verification operate functions in watchdog module.

+

IEC60730 Watchdog Unit Tests

+

These test cases run unit tests to check the operation of the functions in watchdog module.

+

Hardware setup:

+
    +
  • Connect DUT to PC. No additional hardware setup required.
    • +
+

Function Documentation

+ +

◆ test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value (void )
+
+

Public Check sl_iec60730_watchdog_post() operate

+
Returns
None.
+

Check the function sl_iec60730_watchdog_post() operation when checking condition to prevent unexpected changed value when reset or return from power saving mode. If iec60730_watchdog_count value >= SL_IEC60730_WDOGINST_NUMB after device power on reset, the function sl_iec60730_watchdog_post() return result is SL_IEC60730_TEST_FAILED

+ +
+
+ +

◆ test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog (void )
+
+

Public Check sl_iec60730_watchdog_post() operate

+
Returns
None.
+

If reset causes are not POR and not watchdog reset then no action. Value return by function sl_iec60730_watchdog_post() is SL_IEC60730_TEST_PASSED.

+ +
+
+ +

◆ test_sl_iec60730_watchdog_post_reset_resason_no_valid()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_watchdog_post_reset_resason_no_valid (void )
+
+

Public Check sl_iec60730_watchdog_post() operate

+
Returns
None.
+

When the device is reset by power on reset first set the variable iec60730_watchdog_state to the value SL_IEC60730_WATCHDOG_TESTING, then check the watchdog reset. If sli_iec60730_set_watchdog_timout_min() is set successfully, and the device does not wake up from EM4, all Watchdogs are tested then finished. The cause of the reset is not by watchdog, the function sl_iec60730_watchdog_post() return result is SL_IEC60730_TEST_PASSED

+ +
+
+ +

◆ test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail (void )
+
+

Public Check sl_iec60730_watchdog_post() operate

+
Returns
None.
+

When the device is reset by power on reset first set the variable iec60730_watchdog_state to the value SL_IEC60730_WATCHDOG_TESTING, then check the watchdog reset. If sli_iec60730_set_watchdog_timout_min() is failed, then after call sl_iec60730_watchdog_post() again, return result is SL_IEC60730_TEST_FAILED

+ +
+
+ +

◆ test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success (void )
+
+

Public Check sl_iec60730_watchdog_post() operate

+
Returns
None.
+

When the device is reset by power on reset first set the variable iec60730_watchdog_state to the value SL_IEC60730_WATCHDOG_TESTING, then check the watchdog reset. If sli_iec60730_set_watchdog_timout_min() is set successfully, and the device does not wake up from EM4, all Watchdogs are tested then finished. The cause of the reset is by watchdog, the function sl_iec60730_watchdog_post() return result is SL_IEC60730_TEST_PASSED

+ +
+
+ +

◆ test_sl_iec60730_watchdog_post_wachdog_reset_before_por()

+ +
+
+ + + + + + + + +
void test_sl_iec60730_watchdog_post_wachdog_reset_before_por (void )
+
+

Public Check sl_iec60730_watchdog_post() operate

+
Returns
None.
+

When the device is reset by power on reset after watchdog reset, the variable iec60730_watchdog_state does not set to the value SL_IEC60730_WATCHDOG_TESTING, then check return value is SL_IEC60730_TEST_FAILED

+ +
+
+ +

◆ unit_test_iec60730_watchdog_mock_rst_em4()

+ +
+
+ + + + + + + + +
bool unit_test_iec60730_watchdog_mock_rst_em4 (void )
+
+

Public Function replaces the value for the device being reset by EM4 Wakeup. Only used for unit testing.

+
Returns
boolean.
+ +
+
+ +

◆ unit_test_iec60730_watchdog_mock_rst_por()

+ +
+
+ + + + + + + + +
bool unit_test_iec60730_watchdog_mock_rst_por (void )
+
+

Public Function replaces the value for the device being reset by Power On Reset. Only used for unit testing.

+
Returns
boolean.
+ +
+
+ +

◆ unit_test_iec60730_watchdog_mock_rst_wdog0()

+ +
+
+ + + + + + + + +
bool unit_test_iec60730_watchdog_mock_rst_wdog0 (void )
+
+

Public Function replaces the value for the device being reset by Watchdog 0. Only used for unit testing.

+
Returns
boolean.
+ +
+
+ +

◆ unit_test_iec60730_watchdog_mock_rst_wdog1()

+ +
+
+ + + + + + + + +
bool unit_test_iec60730_watchdog_mock_rst_wdog1 (void )
+
+

Public Function replaces the value for the device being reset by Watchdog 1. Only used for unit testing.

+
Returns
boolean.
+ +
+
+ +

◆ unit_test_iec60730_watchdog_mock_rstcause()

+ +
+
+ + + + + + + + +
uint32_t unit_test_iec60730_watchdog_mock_rstcause (void )
+
+

Public The function replaces the value of the RSTCAUSE register indicating the cause of the reset. Only used for unit testing

+
Returns
Value RSTCAUSE register.
+ +
+
+ +

◆ unit_test_iec60730_watchdog_mock_rstcause_clear()

+ +
+
+ + + + + + + + +
void unit_test_iec60730_watchdog_mock_rstcause_clear (void )
+
+

Public Function replaces watchdog clear register rstcause. Only used for unit testing.

+
Returns
None.
+ +
+
+ +

◆ unit_test_iec60730_watchdog_mock_set_watchdog_timout_min()

+ +
+
+ + + + + + + + +
bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min (void )
+
+

Public Function replaces watchdog timeout min set value successfully or not. Only used for unit testing.

+
Returns
boolean.
+ +
+
+ +

◆ unit_test_iec60730_watchdog_set_up()

+ +
+
+ + + + + + + + +
void unit_test_iec60730_watchdog_set_up (void )
+
+

Public Function setup condition before running test case. Only used for unit testing.

+
Returns
None.
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__IEC60730__WDOG__TEST.html b/docs/document_api_iec60730_library/group__IEC60730__WDOG__TEST.html new file mode 100644 index 00000000..d7db79d2 --- /dev/null +++ b/docs/document_api_iec60730_library/group__IEC60730__WDOG__TEST.html @@ -0,0 +1,318 @@ + + + + + + + +Document API IEC60730 Library: Watchdog Check + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Macros | +Enumerations | +Functions | +Variables
+
+
Watchdog Check
EFR32 IEC60730 Library
+
+
+ +

Monitors CPU execution. +More...

+ + + + + +

+Classes

struct  sl_iec60730_watchdog_t
 Watchdog component configuration structure. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

+#define SL_IEC60730_WDOGINST_NUMB   1
 Default configuration number of enabled watchdog.
 
+#define SL_IEC60730_WDOG_WAIT_TIMEOUT   (uint32_t) 0x0000FFFFUL
 Timeout time to wait for wachdog to reset.
 
+#define SL_IEC60730_WDOG_INST(n)   WDOG##n
 Define gets the default value of watchdog(n).
 
+#define SL_IEC60730_RST   RMU
 Hardware manages the reset cause of the device. With series 2 is EMU.
 
+#define SL_IEC60730_RSTCAUSE_POR   RMU_RSTCAUSE_PORST
 The reset cause of the device is power on reset.
 
+#define SL_IEC60730_RSTCAUSE_EM4   RMU_RSTCAUSE_EM4RST
 The reset cause of the device is em4 reset.
 
+#define SL_IEC60730_RSTCAUSE_WDOG0   RMU_RSTCAUSE_WDOGRST
 The reset cause of the device is watchdog reset.
 
+#define SL_IEC60730_RSTCAUSE_WDOG1   RMU_RSTCAUSE_WDOGRST
 The reset cause of the device is watchdog reset.
 
+#define SL_IEC60730_RSTCAUSES_CLEAR()
 Function macro clear hardware reset cause bit SL_IEC60730_RST.
 
+#define SL_IEC60730_RSTCAUSE   (SL_IEC60730_RST->RSTCAUSE)
 Enable bit flag clear causes reset.
 
+#define SL_IEC60730_RSTCAUSE   (SL_IEC60730_RST->RSTCAUSE)
 Enable bit flag clear causes reset.
 
+#define SL_IEC60730_RST_POR   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_POR)
 
+#define SL_IEC60730_RST_EM4   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_EM4)
 
+#define SL_IEC60730_RST_WDOG0   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG0)
 
+#define SL_IEC60730_RST_WDOG1   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG1)
 
+#define SL_IEC60730_RST_WDOGS   (SL_IEC60730_RST_WDOG0 || SL_IEC60730_RST_WDOG1)
 
+#define SL_IEC60730_BURAM_IDX   0UL
 index buram to store the value
 
+#define SL_IEC60730_WDOG0_ENABLE   1
 Enable Watchdog 0.
 
+#define SL_IEC60730_WDOG1_ENABLE   0
 Enable Watchdog 1.
 
+#define SL_IEC60730_SAVE_STAGE_ENABLE   0
 Enable saving iec60730_watchdog_state to backup RAM on Series 2.
 
+#define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE   1
 Reset cause flags in the RSTCASUES register.
 
+ + + + +

+Enumerations

enum  sl_iec60730_test_watchdog_t { SL_IEC60730_WATCHDOG_INVALID = 0, +SL_IEC60730_WATCHDOG_TESTING = 1, +SL_IEC60730_WATCHDOG_VALID = 2 + }
 State of watchdog testing. More...
 
+ + + + + +

+Functions

void sl_iec60730_restart_watchdogs (void)
 
sl_iec60730_test_result_t sl_iec60730_watchdog_post (void)
 
+ + + +

+Variables

volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state
 
+

Detailed Description

+

Monitors CPU execution.

+

For IEC60730, a watchdog timer must be enabled to validate proper operation of the Program Counter. A watchdog timer resets the device if it has not been restarted.

+

+Hardware Architecture

+

The second implementation has a dedicated watchdog peripheral WDOG0, WDOG1 watchdog timers in the EFR32 family.

+
Warning
- The watchdog timer must be disabled during flash page erase.
+

+Failure Risks

+

The watchdog timer will force entry into Safe State if the firmware program execution does not return to the BIST quick enough. This will detect a failure that causes the CPU to halt or enter an infinite loop. The watchdog timer POST verifies that a watchdog timer reset is possible.

+

OEMs must ensure that their system works reliably in all modes of operation using the watchdog timeout. Insufficient testing may allow for firmware states that inadvertently trigger a watchdog reset.

+

+Software Architecture

+

For the EFR32 IEC60730 implementation, Figure 1 shows the logic flow chart of the Watchdog Timer during POST. The POST test determines if the reset source was a power-on, and if so, validates that a watchdog reset can occur. If the reset source was a watchdog reset, it determines if the watchdog reset was expected as part of POST testing, or unexpected. An unexpected reset causes immediate sl_iec60730_safe_state() entry. Otherwise normal operation continues.

+
+ +
+Figure 1 Flow chart of watchdog timer POST validation
+

The main loop must execute sl_iec60730_bist() faster than the nominal timeout, or call sl_iec60730_restart_watchdogs(). After sl_iec60730_bist() has confirmed all modules are operating correctly it restarts the Watchdog Timer with sl_iec60730_restart_watchdogs(). If a module is not operating correctly, sl_iec60730_bist() calls sl_iec60730_safe_state(). sl_iec60730_safe_state() will call sl_iec60730_restart_watchdogs() continuously. The system must be powered down and restarted to resume normal operation.

+

The function sl_iec60730_watchdog_post() will set the timeout period (PERSEL) to minimum when check watchdog units to avoid wasting time.

+

+Software Configuration

+

The number of watchdog units that are tested by lib is defined by config code by defining the macros "#SL_IEC60730_WDOGINST_NUMB" and SL_IEC60730_WDOGx_ENABLE (x = 0, 1). The number of Watchdog unit depends on target EFR32 series. Example for series 1:

+
    +
  • #define SL_IEC60730_WDOGINST_NUMB 1
    • +
  • #define SL_IEC60730_WDOG0_ENABLE 1
    • +
+

User can define macro SL_IEC60730_WDOG_INST(n) to select appropriate watchdog peripheral. User can define macro SL_IEC60730_RST to select appropriate reset peripheral.

+

If these macros are not defined then the default configuration will be used.

+

To clear reset cause flags in the RSTCASUES register after watchdog testing completed -> Enable the definition of macro SL_IEC60730_RSTCAUSES_CLEAR_ENABLE on file sl_iec60730_config.h. By default this feature is disabled.

+

If the Watchdog module is build in secure mode then the macro must not be defined SL_IEC60730_NON_SECURE_ENABLE and defined SL_TRUSTZONE_SECURE to enable the lib using secure address of the watchdog peripheral.

+
Warning
    +
  • The static variable iec60730_watchdog_count must be located at memory location that is not cleared when system startup (section ".ram_no_clear").
    • +
  • The global variable iec60730_watchdog_state must be located at memory location that is not cleared when system startup. And it should be located at section ram_no_clear in RAM block that is available on EFR32 Series 1 devices (section ".ram_no_clear"). This will avoid the missing contain of the variable when device returns from the power saving mode EM4.
    • +
+
+

On EFR32 Series 2 devices, they have backup RAM (BURAM) that could be used to save value of the variable. To enable saving iec60730_watchdog_state to backup RAM on Series 2, enable the macro SL_IEC60730_SAVE_STAGE_ENABLE on file sl_iec60730_config.h. By default it will be disabled. Define macro SL_IEC60730_BURAM_IDX to select which register of the BURAM will be used. The default value is 0x0.

+

Enumeration Type Documentation

+ +

◆ sl_iec60730_test_watchdog_t

+ +
+
+ + + + +
enum sl_iec60730_test_watchdog_t
+
+ +

State of watchdog testing.

+ + + + +
Enumerator
SL_IEC60730_WATCHDOG_INVALID 

Watchdog POST test not done.

+
SL_IEC60730_WATCHDOG_TESTING 

Watchdog POST testing in progress.

+
SL_IEC60730_WATCHDOG_VALID 

Watchdog POST test complete, watchdog valid.

+
+ +
+
+

Function Documentation

+ +

◆ sl_iec60730_restart_watchdogs()

+ +
+
+ + + + + + + + +
void sl_iec60730_restart_watchdogs (void )
+
+

public IEC60730 Watchdog Restart

+
Returns
None.
+

This function abstracts the differences between the EFR32 family watchdog timers. OEMs can call it during long duration executions to restart the watchdog timer.

+ +
+
+ +

◆ sl_iec60730_watchdog_post()

+ +
+
+ + + + + + + + +
sl_iec60730_test_result_t sl_iec60730_watchdog_post (void )
+
+

public IEC60730 Watchdog Power On Self Test

+
Returns
sl_iec60730_test_result_t If a non-watchdog reset occurred, test watchdog (will not return). Otherwise determine if watchdog reset was planned or unplanned. Unplanned watchdog resets result in failure and entry to Safe State. Planned watchdog resets return SL_IEC60730_TEST_PASSED.
+

This function will test the watchdog timer by forcing a watchdog reset on the first power-up. Any subsequent watchdog reset forces entry into sl_iec60730_safe_state().

+
Warning
Remove all accesses to Watchdog Timer hardware from init device. Reset state of pins must be safe for the device. During POST test, device pins will be kept in reset state while validating watchdog reset.
+ +
+
+

Variable Documentation

+ +

◆ iec60730_watchdog_state

+ +
+
+ + + + +
volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state
+
+

Global variable used to track watchdog testing state.

+
Warning
Must be placed in a memory area not cleared to 0x0 on start!
+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__efr32__iec60730.html b/docs/document_api_iec60730_library/group__efr32__iec60730.html new file mode 100644 index 00000000..3f8ec0b4 --- /dev/null +++ b/docs/document_api_iec60730_library/group__efr32__iec60730.html @@ -0,0 +1,465 @@ + + + + + + + +Document API IEC60730 Library: EFR32 IEC60730 Library + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Modules
+
+
EFR32 IEC60730 Library
+
+
+ +

Overview and documentation of IEC60730 library APIs. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Modules

 BIST
 Built In Self Test - Executed periodically.
 
 CPU Registers Check
 Verifies CPU registers are working correctly.
 
 IRQ Check
 Verifies interrupt frequency is within bounds.
 
 Invariable Memory Check
 Verifies contents of flash memory.
 
 OEM External Communications Example using UART
 Verifies communication channel is operating as expected.
 
 POST
 Power On Self Test - Executed once during power up.
 
 Program Counter Check
 Verifies all tests have completed on time.
 
 Safe State
 When incorrect behavior is detected, this state prevents further execution.
 
 System Clock Check
 Verifies that system clocks are within expected frequencies.
 
 Variable Memory Check
 Verifies RAM is working correctly.
 
 Watchdog Check
 Monitors CPU execution.
 
+

Detailed Description

+

Overview and documentation of IEC60730 library APIs.

+

+Introduction

+

The IEC60730 library for EFR32 provides a basic implementation required to Support the requirements found in Table H.1 in the IEC60730 specification. It includes all the Power On Self Test (POST) functions executed when a device is first powered on, as well as Built In Self Test (BIST) functions that are called periodically to ensure correct operation. Certain portions of the requirements require a detailed understanding of The system is under development.  Callback functions must be completed by the developer to guarantee meeting the full specification. These include a Safe State function used when validation detects an anomaly, properly implemented communications channels (redundancy, error detection, periodic communications), and Plausibility functions to validate system state (internal variables and inputs/outputs).

+

+License

+

Copyright 2024 Silicon Laboratories Inc. www.silabs.com Source code in this repo is covered by one of several different licenses. The default license is the Master Software License Agreement (MSLA) MSLA, which applies unless otherwise noted.

+

During the unit test build process, some third-party code will be added to this repository and separated into another license. An example can be found in the build/_deps directory, where the Unity library uses the MIT license.

+

+IEC60730 Certificate

+

The final certificate and detailed report shall be provided for the specific devices.

+

+OEM Testing

+

Once OEMs have completed integrating their system with the IEC60730 Library, they will need to certify their device with a qualified certification house.

+

+Supported Families

+

This library supports all EFR32MG devices listed in the Selector Guide.

+

+Software Requirements

+

The IEC60730 library dependencies:

    +
  1. CMSIS package.
    2. +
  2. Silicon Labs Devices header files.
    3. +
+

Users could get dependency source files from the GSDK suite (platform). To get the latest version of GSDK, please refer to Gecko SDK.

+
Note
The IEC60730 library support extension for GSDK 4.4.2 using Simplicity Studio 5.
+

Details on the validation test setup used internally by Silicon Labs can be found at IEC60730 Test Specification. Test results can be found inside each module.

+

Currently tested on Windows and Linux platforms.

+

+Building the IEC60730 Demo

+

To use Simplicity Studio to generate and build a demo IEC60730 and OEM Customization, refer to the IEC60730 Safety Library Integration to SDK in the docs folder for more details.

+

See OEM Customization for details on customizing the project and adding custom code.

+
Warning
While source code is provided for the IEC60730 library, Silicon Labs recommends using the certified library file. When applying for certification, the certified library file will reduce the certification time.
+
Note
The Simplicity Studio debugger will allow breakpoints and code tracing into the IEC60730 library, except for sl_iec60730_cpu_registers_bist(), since that test requires special compiler commands. To set breakpoints or trace inside sl_iec60730_cpu_registers_bist(), set a breakpoint inside sl_iec60730_bist() at the line with sl_iec60730_cpu_registers_bist(), and single-step into the function.
+

+Generate document API

+

+Generate document

+

Using Doxygen to generate HTML documentation, the documents will be generated in docs/document_api_iec60730_library

+
$ sudo apt-get install doxygen
+
$ doxygen iec60730.doxygen
+

Using MkDocs to support read mark-down files.

+

+MkDocs

+

MkDocs User Guide:

+ +

MkDocs markdown fetaures and syntax reference:

+ +

Search for icons and Emojis:

+ +

+Install MkDocs

+

*Step 1:** Install mkdocs

+
pip3 install mkdocs
+

*Step 2:** Install mkdocs-material

+
pip3 install mkdocs-material
+

*Step 3:** Install mkdocs-material-extensions

+
pip3 install mkdocs-material-extensions
+

+Verify and build your documentaion

+
    +
  • Ensure you have mkdocs.yml file in place
    • +
  • Preview your documentation locally
    • +
+
python3 -m mkdocs serve
+
    +
  • If you want to use your browser to read your docs locally. Build the pages in the folder ./site, which will be added to your project. It will starting from the site/index.html
    • +
+
python3 -m mkdocs build --no-directory-urls
+
Note
To support running Github Pages, you need to run the command above.
+

+Coding convention tool

+

+Features

+
    +
  • Automatically fixes end-of-file issues.
    • +
  • Removes trailing whitespace from lines.
    • +
  • Identifies and suggests fixes for common spelling errors using codespell.
    • +
  • Formats code according to specified Uncrustify rules base on Silabs's coding standard.
    • +
  • Checks for identifiers naming style mismatch of function, definition, struct, variable using clang-tidy.
    • +
  • Checks code for potential errors and style issues using cppcheck.
    • +
+

+Installation

+

Recommended version:

    +
  • Codespell 2.2.4
    • +
  • Uncrustify 0.72.0
    • +
  • Clang tidy 14.0.0
    • +
  • Cppcheck 1.9
    • +
+
$ pip install pre-commit
+
$ sudo apt install uncrustify clang-tidy cppcheck
+

+Run

+

Run pre-commit install to install pre-commit into your git hooks. pre-commit will now run on every commit:

+
$ pre-commit install
+

Staging files need formatting. For example:

+
$ git add data_format_sample.c
+

Run pre-commit hooks on a repository to check coding convention.

+
$ pre-commit run --all-files
+

+Compiler specifications

+

The C compilers:

+
    +
  • GNU GCC V12.2
    • +
  • IAR EW for ARM V9.20
    • +
+

Tools specification

+
    +
  • Test frame work tools:
      +
    • Python V3.11
      • +
    +
    • +
  • Simplicity Studio Commander
      +
    • Simplicity Commander version 1v16p8b1613
      • +
    +
    • +
  • Support CMake
      +
    • CMake version >=3.25
      • +
    +
    • +
  • SEGGER JLink
      +
    • JLink version 17.0.11
      • +
    +
    • +
  • SLC-CLI
      +
    • slc version 5.9.1.1
      • +
    +
    • +
  • Source code control:
      +
    • GIT V2.39
      • +
    • JIRA V8.22.2
      • +
    +
    • +
  • SDK support:
      +
    • Gecko SDK Suite v4.4.2
      • +
    +
    • +
+
Note
If you want this extension to match your geck_sdk change the sdk field in the iec60730.slce file. For example, you want to use simplicity sdk version:
sdk:
+
id: simplicity_sdk
+
version: 2024.6.1
+
+

+System Architecture

+

This library consists of two main components. The POST component operates immediately after the power is turned on, validating the system state before entering the main execution loop.

+

The BIST component is executed periodically within the main execution loop.

+

Validation for IEC60730 also requires external communications validation. Each OEM application has unique external communication requirements. This library includes an example UART communications library that complies with IEC60730 standards. OEMs must adapt their communications to meet the requirements outlined in IEC60730.

+

The file oem_iec60730.c contains functions and variables that OEMs should modify to suit their specific systems.

+

This EFR32 IEC60730 library fulfills the requirements for a Class B device. Table 1 outlines the firmware requirements that must be met by controls, as specified in IEC60730, including new entries from Annex H.

+

Table 2 details the firmware-specific requirements for software-based controls, derived from Table H.1 in IEC60730.

+
Table 1 Requirements that must be met by controls

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Information Clause Method [1] Notes specific to this library [2]
36 Limits of activating quantity 11.3.2 H.11.4.15 H.17.14 H.18.1.5 H.27.1.1 H.28 X Not Applicable
52 Minimum parameters of any heat dissipator 14 X Not Applicable
53 Type of output waveform if other than sinusoidal H.25 X Not Applicable
54 Details of the leakage current waveform produced after failure of the basic insulation H.27 X Not Applicable
55 Relevant parameters of electronic devices unlikely to fail H.27 X Not Applicable
56 Type of output waveform produced after failure of an electronic device H.27 X Not Applicable
57 The effect on controlled outputs after electronic circuit component failure H.27 X To be provided by OEM
58b The effect on controlled outputs after a failure to operate as a result of tests H.26.2 H.26.15 X Not Applicable
66 Software sequence documentation H.11.12.2.9 D Covered by this documentation
67 Program documentation H.11.12.2.9 H.11.12.2.12 D Covered by this documentation
68 Software fault analysis H.11.12 H.27.1.1.4 D Covered by this documentation
69 Software class(es) and structure H.11.12.2 H.11.12.3 H.27.1.2.2.1 H.27.1.2.3.1 D Covered by this documentation
70 Analytical measure and fault/error control techniques employed H.11.12.1.2 D Covered by this documentation
71 Software fault/error detection times for controls H.2.17.10 X Provided by OEM timer ticks. Example uses 1 second.
72 Control responses in case of detected fault/error H.11.12.2.7 X Must be provided by OEM
73 Controls subjected to a second fault analysis and declared condition as a result of the second fault H.27.1.2.3 X Must be provided by OEM
74. External load and emission control measures to be used for test purposes H.23.1.1 X Not Applicable
91 Fault reaction time H.2.23.2 H.27.1.2.2.2 H.27.1.2.2.3 H.27.1.2.3.2 H.27.1.2.3.3 H.27.1.2.4.2 H.27.1.2.4.3 X Provided by OEM timer ticks. Example uses 1 second.
92 Class or classes of control functions H.6.18 H.27.1.2.2 H.27.1.2.3 D This library is for Class B control functions
93 Maximum number of reset actions within a time period H.11.12.4.3.6 H.11.12.4.3.4 X Not Applicable
94 Number of remote reset actions H.17.1.4.3 X Not Applicable
+
    +
  1. Methods (See IEC60730 documentation for additional details):
      +
    • C - Marking
      • +
    • D - Hard copy
      • +
    • E - Documentation on electronic media, internal or external
      • +
    • X - Declaration on materials provided to the certification body
      • +
    +
    2. +
  2. OEMs are still responsible for providing any documentation for software outside the IEC60730 library.
    3. +
+
Table 2 Measures to address software fault/errors

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Component Measure Used Notes
1.1 Registers Periodic self-test using a Static memory test Provided by library
1.2 Instruction decoding and execution None Not required for Class B
1.3 Program counter / Watchdog Logical monitoring of the program sequence. Code execution sets flag that is periodically checked. Watchdog timer prevents runaway program execution. Provided by library, see example for integration sample
1.4 Addressing None Not required for Class B
1.5 Data paths Instruction decoding None Not required for Class B
2 Interrupt handling and execution Time-slot monitoring(upper and lower limit) Provided by library, see example for integration sample
3 Clock Reciprocal Comparison. Use separate oscillator to monitor SYSCLK - Calculate ratio and determine range based on accuracy Provided by library, see example for integration sample
4.1 Invariable memory Periodic 16 bit CRC Provided by library, see example for integration sample
4.2 Variable memory Periodic static memory test using March-C & stack guard. Provided by library, see example for integration sample
4.3 Addressing (variable and invariable memory) 4.1 and 4.2 provide coverage for this component
5.1 Internal data path 4.1 and 4.2 provide coverage for this component
5.2 Internal addressing 4.1 and 4.2 provide coverage for this component
6 External Communication Provided by OEM, UART example in library
6.1 External Communications - Data 16 bit CRC CRC check provided by library
6.2 External Communications - Addressing 16 bit CRC including the address OEM must include in protocol proper address verification - see UART example in library
6.3 External Communications - Timing (UART example) Scheduled transmission OEM must include in protocol proper timing measures - see UART example in library
7 Input/output periphery / 7.1 Digital I/O Plausibility check Provided by OEM
7.2 Analog I/O / 7.2.1 A/D and D/A converter Plausibility check Provided by OEM
7.2.2 Analog multiplexer Plausibility check Provided by OEM
8 Monitoring device and comparators None Not needed for class B
9 Custom chips None Not Applicable
+

+Test Specifications

+

Test Specifications provide detailed specifications for verification testing.

+

+Coding Standard

+

The IEC60730 library follows Silicon Labs Coding Standard.

+

+Support

+

Customers with support questions can begin with the Silicon Labs support page. Customers can also post their questions to the Silicon Labs Community Forums for help from other Silicon Labs customers.

+

If a customer needs help with a complex issue, create a Support Request on the support page. The Silicon Labs MCU Applications Engineering team will assist with duplicating the problem and understanding the root cause.

+

+Change Control and Update process

+

The IEC60730 library is a complex software project that will require ongoing support and updates in the future. This section outlines how Silicon Labs will assist customers with their implementation and release updates for the IEC60730 library.

+

Once an issue is confirmed to be a problem with the IEC60730 Library, a JIRA ticket must be filed within the Developer Services Team project (DS), starting with the prefix "IEC60730: ".The team lead will assess each issue and assign a severity level, which can be categorized as follows:

    +
  • Blocker (Customer cannot move forward/is lines-down)
    • +
  • Critical (Customer can proceed, but with major inconvenience/no workaround)
    • +
  • High (Customer can proceed with minor inconvenience/workaround)
    • +
  • Low (Customer can proceed with no inconvenience, no workaround necessary). Each ticket will also include information about the impact of the change on the library and an estimated timeline for implementation.
    • +
+

The issue ticket will be assigned to the Developer Services Team manager later. At their discretion, they may convene a meeting with the IEC60730 Change Control Board (comprising the DS team lead) to discuss the open JIRA tickets for the IEC60730 Library. After the meeting, Tickets on JIRA will be created and determine whether the issue ticket will be fixed or not. The status of each ticket JIRA will be updated accordingly, and work will be delegated to the appropriate firmware team members. Work will be conducted in a separate branch from the main branch within the Git Version Control System.

+

Once the updated firmware is complete, the developer will check it into the Silicon Labs Git version control system and create a Code Review JIRA ticket. A review developer will then examine the code to ensure compliance with the Coding Standard. If feasible, a Git Pull Request will be created between the two revisions of the source code. Any comments from the review developer will be logged in a Git branch of the IEC60730 project. The Git commit ID will be linked to the Code Review JIRA ticket. The developer is responsible for addressing the comments from the code review and providing explanations for any declined changes.

+

Following these steps, the version of the IEC60730 library will be incremented. For any issues resolved, an automated test will be created to replicate the previous issue and demonstrate that it no longer exists in the new library. The developer must also confirm that the Python code functions correctly when the original tests are executed.

+

If an issue cannot be validated through automated testing, a special waiver must be obtained from the Change Control Board, with instructions for manual testing included in the documentation for the affected module. A complete automated and manual validation cycle must be completed before the updated library is ready for release. This is done by initiating a Daily Firmware build job in the Jenkins build and test environment, using the Git branch as the source.

+

Once the Daily Firmware build job and any required manual tests confirm the correct operation of the firmware, the branch will be merged back into the master branch. A Release Build will then be triggered in Jenkins, using the new release version along with the master branch.

+

The MCU FW Team Manager must sign off on the validation results via JIRA. After the library passes validation, the updated library, along with a change list, will be submitted to the certification house for re-certification. Upon completion of re-certification, an Errata document will be created or updated to include a list of all resolved and unresolved issues, along with any available workarounds.

+

The new library, along with the Errata document and an updated Readme file containing the new version number, will be uploaded to the Silicon Labs downloads site and made available through Simplicity Studio.

+

+OEM Customization and Integration

+

An OEM must be aware of these items when integrating the IEC60730 library into their final product.

+
Warning
Any certification image must use the Release source files of the IEC60730 library.
+

+Safe state

+

OEMs must customize the sl_iec60730_safe_state() function according to their system configuration. Safe State must configure any external signals and communications channels such that the system will not cause damage or unexpected operation. The function may attempt external notification, however it must be done cautiously to prevent further deterioration of the system.

+

+POST

+

sl_iec60730_post() is normally called after system initialization is complete, but before beginning primary operating mode. It includes a Watchdog test that resets the system to verify Watchdog operation. OEMs must expect initialization code before sl_iec60730_post() to execute twice. Initialization code execution time must be short enough that the watchdog can be refreshed in sl_iec60730_post() before expiration.

+

+BIST

+

sl_iec60730_bist() is executed as part of the main system loop, typically at the end. Systems with long execution times will require manual watchdog refresh, and adjustment of sl_iec60730_test_clock_tick() frequency to ensure sl_iec60730_program_counter_test() passes, or calling sl_iec60730_bist() at multiple locations in the main system loop.

+

When in safety-critical code where POST and BIST are executing, interrupts should remain globally enabled. If interrupts must be disabled for a critical section of firmware, the critical section should follow best practices and be as short as possible. The time in the critical section must be shorter than the fastest clock timer interrupt (usually 10ms), or sl_iec60730_sys_clock_test_disable() must be used to disable the timer tests.

+

+Program counter

+

IEC60730_GPIO_COMPLETE and IEC60730_ANALOG_COMPLETE must be set by OEM validation code.

+

OEMs can use IEC60730_OEM0_COMPLETE - IEC60730_OEM7_COMPLETE or into sl_iec60730_program_counter_check to verify their own test algorithms are executing at least once per every call to sl_iec60730_program_counter_test(). Unused flags must be set to 1.

+
Warning
sl_iec60730_bist() can take several ms to execute, see Execution Time for details. If the execution time is longer than the system can tolerate, customize the sl_iec60730_bist() routine or split it up into individual calls in the main system loop.
+

+Watchdog

+

User should setup the internal watchdog as user's design expectation.

+

When in a long latency loop, use sl_iec60730_restart_watchdogs() to prevent a watchdog reset. Minimize the time in the loop as much as possible.

+
Warning
Call sl_iec60730_restart_watchdogs() to re-enable the watchdog once the flash erase has completed. During the flash erase time, any control signals must remain in a safe configuration. Watchdog Test provides details.
+

+IRQ

+

OEMs must update oem_irq_freq_bounds for their system use. Interrupt service routines must include code for incrementing oem_irq_exec_count. For an example, see oem_iec60730.c. OEMs must choose and enumerate the index values for oem_irq_exec_count.

+
Warning
Interrupts are disabled during portions of the CPU Registers Check , Invariable Memory Check and Variable Memory Check . Interrupts must be tolerant of the latency times these tests introduce to servicing an interrupt.
+

+Clock

+

OEMs can modify the default System Clock and Timer Clock configurations in oem_iec60730_timer.c according to their system requirements.

+

+Invariable memory

+

OEMs must modify the sl_iec60730_imc_test_region_t structure to align with their memory usage. iec60730_cur_crc or similar must be modified to store the CRC values. The number of areas to be tested depends on the OEM

+

During the CRC generation for a block of memory, the CPU is halted and unable to respond to interrupt requests.

+

For a typical system, the amount of invariable memory checked will determine the fault reaction time.

+

+Variable memory

+

OEMs must modify the sl_iec60730_vmc_test_region_t structure to align with the RAM they want to check. The number of areas to be tested depends on the OEM.

+

During the CRC generation for a block of memory, the CPU is halted and unable to respond to interrupt requests.

+

+External communications

+

OEMs must write their safety-related communications protocol according to the IEC60730 requirements. The demo provides an example protocol test for UART 0.

+

+Additional OEM safety checks

+

OEMs can implement additional safety checks and call sl_iec60730_safe_state() with custom define SL_IEC60730_OEM_FAIL_1 - SL_IEC60730_OEM_FAIL_4 settings.

+

+Execution Time

+

The sizes given below are for the example programs demo provided by extension with the SDK.

+

OEM devices that do not use a communications channel(~400 bytes), or have simple plausilbity functions (~200 bytes), will use less space.

+

OEMs can use these numbers for planning purposes, but must verify against their implementation.

+

+BIST call frequency

+

All tests must complete execution before sl_iec60730_program_counter_test() is called. The example code calls sl_iec60730_program_counter_test() once per second.

+

The test requiring the most iterations to complete is the Invariable Memory Check and Variable Memory Check . It may require calls to sl_iec60730_bist() to guarantee all the invariable memory areas and variable memory areas are checked before sl_iec60730_program_counter_test() is called. This table assumes the largest invariable memory size for each device, and a check across the whole memory area.

+

The number of blocks per BIST call SL_IEC60730_INVAR_BLOCKS_PER_BIST is chosen to get the time between BIST calls close to the watchdog timeout.

+

Number of sl_iec60730_bist() calls/second = Size of memory / (Size of CRC block * number of blocks per BIST call)

+

Maximum time between BIST calls= 1 / (Number of sl_iec60730_bist calls)

+

Checking against smaller areas increase the time between BIST calls.

+

+Fault Reaction Time

+

The default Fault Reaction Time for the IEC60730 library is 1 second. Because of the BIST call frequency configuration above, a full invariable memory test can take 1 second to run on the largest memory EFR32 devices. The Program counter check runs once per second by default, and all completion bits must be set. OEMs can modify the Clock according to their needs to increase the Fault Reaction Time.

+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__sl__iec60730__bist.html b/docs/document_api_iec60730_library/group__sl__iec60730__bist.html new file mode 100644 index 00000000..4cfd78fc --- /dev/null +++ b/docs/document_api_iec60730_library/group__sl__iec60730__bist.html @@ -0,0 +1,200 @@ + + + + + + + +Document API IEC60730 Library: BIST + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Functions
+
+
BIST
EFR32 IEC60730 Library
+
+
+ +

Built In Self Test - Executed periodically. +More...

+ + + + +

+Classes

struct  sl_iec60730_safety_check_t
 
+ + + + + + + + + +

+Functions

void sl_iec60730_safety_check_error_occur (sl_iec60730_test_failure_t failure)
 
void sl_iec60730_safety_check_reset_error (void)
 
sl_iec60730_safety_check_t * sl_iec60730_safety_check_get_error (void)
 
void sl_iec60730_bist (void)
 
+

Detailed Description

+

Built In Self Test - Executed periodically.

+

sl_iec60730_bist() confirms correct operation of the device during main loop execution. If a module validation fails, sl_iec60730_safe_state() is called.

+

OEM code must call sl_iec60730_safety_check_error_occur to set iec60730_safety_check to one of the failure conditions in sl_iec60730_test_failure_t if the code determines a failure has occurred. This can be used for communications channels or to trigger Safe State entry due to a failure within an interrupt.

+

The validation time for the full memory varies between devices depending on the size of memory available, and how frequently  sl_iec60730_bist() is called by the main loop. For details see BIST call frequency.

+

Periodic BIST execution is shown in Figure 1

+

+ +
+Figure 1 Flow chart of periodic BIST execution
+

Function Documentation

+ +

◆ sl_iec60730_bist()

+ +
+
+ + + + + + + + +
void sl_iec60730_bist (void )
+
+

public IEC60730 Built In Self Test

+
Returns
None. If validation fails function never returns. If validation passes, function returns.
+

Each module is tested, and if a failure is detected sl_iec60730_safe_state() is called. If a test failure occurs outside this function (such as comms), called function sl_iec60730_safety_check_error_occur set iec60730_safety_check to sl_iec60730_test_failure_t.

+ +
+
+ +

◆ sl_iec60730_safety_check_error_occur()

+ +
+
+ + + + + + + + +
void sl_iec60730_safety_check_error_occur (sl_iec60730_test_failure_t failure)
+
+

public IEC60730 save error to variable iec60730_safety_check

+
Parameters
+ + +
failureEnum with the failing test, can be preserved for debug.
+
+
+
Returns
None.
+

Called by OEM and interrupt check functions to set iec60730_safety_check to sl_iec60730_test_failure_t.

+ +
+
+ +

◆ sl_iec60730_safety_check_get_error()

+ +
+
+ + + + + + + + +
sl_iec60730_safety_check_t* sl_iec60730_safety_check_get_error (void )
+
+

public IEC60730 return value variable iec60730_safety_check

+
Returns
pointer type sl_iec60730_safety_check_t point to variable containing the errors that occurred and the number of errors
+

Called by OEM in sl_iec60730_safe_state functions to get value iec60730_safety_check, so OEM can get all sl_iec60730_test_failure_t occur

+ +
+
+ +

◆ sl_iec60730_safety_check_reset_error()

+ +
+
+ + + + + + + + +
void sl_iec60730_safety_check_reset_error (void )
+
+

public IEC60730 reset value local iec60730_safety_check

+
Returns
None
+

Called by OEM when wanting to reset local variable value iec60730_safety_check which containing the errors that occurred and the number of errors

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__sl__iec60730__post.html b/docs/document_api_iec60730_library/group__sl__iec60730__post.html new file mode 100644 index 00000000..c45c888f --- /dev/null +++ b/docs/document_api_iec60730_library/group__sl__iec60730__post.html @@ -0,0 +1,549 @@ + + + + + + + +Document API IEC60730 Library: POST + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Classes | +Macros | +Enumerations | +Functions | +Variables
+
+
POST
EFR32 IEC60730 Library
+
+
+ +

Power On Self Test - Executed once during power up. +More...

+ + + + +

+Classes

struct  sl_iec60730_library_version_t
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define UNUSED_VAR(x)   (void) (x)
 
+#define __CONCAT(x, y)   x##y
 Macro merge separate words to be joined into a single word.
 
+#define CONCAT(x, y)   __CONCAT(x, y)
 
+#define STR(x)   #x
 Macro convert to string.
 
+#define XSTR(x)   STR(x)
 
#define LABEL_DEF(NAME)   LB_ASM volatile(LB_XSTR(NAME))
 
#define __no_init
 
#define DEC_CLASSB_VARS(vartype, name)
 
#define EXTERN_DEC_CLASSB_VARS(vartype, name)
 
#define sl_static_dec_classb_vars(vartype, name)
 
#define INV_CLASSB_VAR(vartype, name)   CONCAT(name, _inv) = (vartype) (~(vartype) name)
 
#define INV_CLASSB_PVAR(vartype, name)   CONCAT(name, _inv) = (vartype *) (~(vartype) name)
 
#define CHECK_INTEGRITY(vartype, x)   ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, _inv)))
 
+ + + + + + + +

+Enumerations

enum  sl_iec60730_test_result_t { SL_IEC60730_TEST_FAILED = 0, +SL_IEC60730_TEST_PASSED = 1, +SL_IEC60730_TEST_IN_PROGRESS = 2 + }
 The result of a test. More...
 
enum  sl_iec60730_test_failure_t {
+  SL_IEC60730_NO_FAILURE = 0, +SL_IEC60730_TEST_VERIFY = 1, +SL_IEC60730_WATCHDOG_POST_FAIL = 2, +SL_IEC60730_VMC_FAIL = 3, +
+  SL_IEC60730_IMC_FAIL = 4, +SL_IEC60730_CPU_REGISTERS_FAIL = 5, +SL_IEC60730_CLOCK_FAIL = 6, +SL_IEC60730_INTERRUPT_FAIL = 7, +
+  SL_IEC60730_PROGRAM_COUNTER_FAIL = 8, +SL_IEC60730_GPIO_FAIL = 9, +SL_IEC60730_ANALOG_FAIL = 10, +SL_IEC60730_CS0_FAIL = 11, +
+  SL_IEC60730_LESENSE0_FAIL = 12, +SL_IEC60730_RADIO_FAIL = 13, +SL_IEC60730_I2C0_FAIL = 14, +SL_IEC60730_I2C1_FAIL = 15, +
+  SL_IEC60730_USART0_FAIL = 16, +SL_IEC60730_USART1_FAIL = 17, +SL_IEC60730_USART2_FAIL = 18, +SL_IEC60730_USART3_FAIL = 19, +
+  SL_IEC60730_LEUART0_FAIL = 20, +SL_IEC60730_EUART0_FAIL = 21, +SL_IEC60730_PDM0_FAIL = 22, +SL_IEC60730_OEM_FAIL_1 = 23, +
+  SL_IEC60730_OEM_FAIL_2 = 24, +SL_IEC60730_OEM_FAIL_3 = 25, +SL_IEC60730_OEM_FAIL_4 = 26, +SL_IEC60730_SAFETY_CHECK_FAIL = 0XFF +
+ }
 Cause of failure passed to Safe State function. More...
 
+ + + +

+Functions

void sl_iec60730_post (void)
 
+ + + + +

+Variables

+const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION
 Global variable which holds the IEC60370 library version.
 
+

Detailed Description

+

Power On Self Test - Executed once during power up.

+

sl_iec60730_post() validates system health before starting execution of the main loop. It must be called first in the main() function. If the result of a test routine is a failure, sl_iec60730_safe_state() is called.

+ +
+Figure 1 Post flowchart
+

Macro Definition Documentation

+ +

◆ __no_init

+ +
+
+ + + + +
#define __no_init
+
+

The __no_init macro is used for compatibility between GCC and IAR compiler.

+ +
+
+ +

◆ CHECK_INTEGRITY

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define CHECK_INTEGRITY( vartype,
 x 
)   ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, _inv)))
+
+

The CHECK_INTEGRITY definition used for checking integrity of pair of variables stored in *.classb_ram* section.

+ +
+
+ +

◆ DEC_CLASSB_VARS

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define DEC_CLASSB_VARS( vartype,
 name 
)
+
+Value:
__no_init vartype name __CLASSB_RAM; \
+
__no_init vartype CONCAT(name, _inv) __CLASSB_RAM
+

The DEC_CLASSB_VARS definition is used for declaring pair of classsb_ram variables.

+ +
+
+ +

◆ EXTERN_DEC_CLASSB_VARS

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define EXTERN_DEC_CLASSB_VARS( vartype,
 name 
)
+
+Value:
extern __no_init vartype name __CLASSB_RAM; \
+
extern __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
+

The EXTERN_DEC_CLASSB_VARS definition is extern of pair of DEC_CLASSB_VARS

+ +
+
+ +

◆ INV_CLASSB_PVAR

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define INV_CLASSB_PVAR( vartype,
 name 
)   CONCAT(name, _inv) = (vartype *) (~(vartype) name)
+
+

The INV_CLASSB_PVAR macro is used to inverse a Inv value of pointer pair DEC_CLASSB_VARS

+ +
+
+ +

◆ INV_CLASSB_VAR

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define INV_CLASSB_VAR( vartype,
 name 
)   CONCAT(name, _inv) = (vartype) (~(vartype) name)
+
+

The INV_CLASSB_VAR macro is used to inverse a Inv value of pair DEC_CLASSB_VARS

+ +
+
+ +

◆ LABEL_DEF

+ +
+
+ + + + + + + + +
#define LABEL_DEF( NAME)   LB_ASM volatile(LB_XSTR(NAME))
+
+

The LABEL_DEF macro is used to generate label for break points. Using this macro avoids label removal by the compiler's optimize levels.

+ +
+
+ +

◆ sl_static_dec_classb_vars

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define sl_static_dec_classb_vars( vartype,
 name 
)
+
+Value:
static __no_init vartype name __CLASSB_RAM; \
+
static __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
+

The sl_static_dec_classb_vars definition used for declaring static pair DEC_CLASSB_VARS

+ +
+
+ +

◆ UNUSED_VAR

+ +
+
+ + + + + + + + +
#define UNUSED_VAR( x)   (void) (x)
+
+

Useful macro for avoiding compiler warnings related to unused function arguments or unused variables.

+ +
+
+

Enumeration Type Documentation

+ +

◆ sl_iec60730_test_failure_t

+ +
+
+ + + + +
enum sl_iec60730_test_failure_t
+
+ +

Cause of failure passed to Safe State function.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Enumerator
SL_IEC60730_NO_FAILURE 

No failure detected.

+
SL_IEC60730_TEST_VERIFY 

Special case used for automated verification testing.

+
SL_IEC60730_WATCHDOG_POST_FAIL 

Watchdog POST test failed.

+
SL_IEC60730_VMC_FAIL 

Variable Memory Check detected a failure.

+
SL_IEC60730_IMC_FAIL 

Invariable Memory Check detected a failure.

+
SL_IEC60730_CPU_REGISTERS_FAIL 

CPU Registers Check detected a failure.

+
SL_IEC60730_CLOCK_FAIL 

System Clock Check detected a failure.

+
SL_IEC60730_INTERRUPT_FAIL 

Interrupt Plausibility Check detected a failure.

+
SL_IEC60730_PROGRAM_COUNTER_FAIL 

Program Counter Check detected a failure.

+
SL_IEC60730_GPIO_FAIL 

GPIO Plausibility Check detected a failure.

+
SL_IEC60730_ANALOG_FAIL 

Analog Plausibility Check detected a failure.

+
SL_IEC60730_CS0_FAIL 

CSEN0 detected a failureLESENSE.

+
SL_IEC60730_LESENSE0_FAIL 

LESENSE0 detected a failure.

+
SL_IEC60730_RADIO_FAIL 

Radio comms detected a failure.

+
SL_IEC60730_I2C0_FAIL 

I2C0 comms channel detected a failure.

+
SL_IEC60730_I2C1_FAIL 

I2C1 comms channel detected a failure.

+
SL_IEC60730_USART0_FAIL 

USART0 comms channel detected a failure.

+
SL_IEC60730_USART1_FAIL 

USART1 comms channel detected a failure.

+
SL_IEC60730_USART2_FAIL 

USART2 comms channel detected a failure.

+
SL_IEC60730_USART3_FAIL 

USART3 comms channel detected a failure.

+
SL_IEC60730_LEUART0_FAIL 

LEUART comms channel detected a failure.

+
SL_IEC60730_EUART0_FAIL 

EUART comms channel detected a failure.

+
SL_IEC60730_PDM0_FAIL 

PDM comms channel detected a failure.

+
SL_IEC60730_OEM_FAIL_1 

OEM defined failure.

+
SL_IEC60730_OEM_FAIL_2 

OEM defined failure.

+
SL_IEC60730_OEM_FAIL_3 

OEM defined failure.

+
SL_IEC60730_OEM_FAIL_4 

OEM defined failure.

+
SL_IEC60730_SAFETY_CHECK_FAIL 

iec60730_safety_check detected some failure

+
+ +
+
+ +

◆ sl_iec60730_test_result_t

+ +
+
+ + + + +
enum sl_iec60730_test_result_t
+
+ +

The result of a test.

+ + + + +
Enumerator
SL_IEC60730_TEST_FAILED 

test result failed

+
SL_IEC60730_TEST_PASSED 

test result passed

+
SL_IEC60730_TEST_IN_PROGRESS 

test is still in progress

+
+ +
+
+

Function Documentation

+ +

◆ sl_iec60730_post()

+ +
+
+ + + + + + + + +
void sl_iec60730_post (void )
+
+

public IEC60730 Power On Self Test

+
Returns
None.
+

Each module is tested to validate system health before starting the execution of the main loop, and if a failure is detected sl_iec60730_safe_state() is called.

+ +
+
+
+
__CLASSB_RAM
#define __CLASSB_RAM
Definition: sl_iec60730_toolchain.h:78
+
__no_init
#define __no_init
Definition: sl_iec60730.h:136
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/group__toolchain__group.html b/docs/document_api_iec60730_library/group__toolchain__group.html new file mode 100644 index 00000000..9f6279ac --- /dev/null +++ b/docs/document_api_iec60730_library/group__toolchain__group.html @@ -0,0 +1,208 @@ + + + + + + + +Document API IEC60730 Library: Toolchain Abstraction + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+Macros
+
+
Toolchain Abstraction
+
+
+ +

Macros for toolchain abstraction. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

+#define NULL   ((void *) 0)
 Make sure there is a NULL defined if the toolchain does not provide it.
 
#define NOP()   __NOP()
 
+#define IEC60730_VAR_NO_INIT   __attribute__((section(".noinit")))
 No init at startup.
 
+#define IEC60730_DATA_NO_CLEAR   __attribute__((section(".ram_no_clear")))
 No clear at startup.
 
#define __STACK_BOTTOM   __attribute__((section(".stack_bottom")))
 
#define __CLASSB_RAM   __attribute__((section(".classb_ram")))
 
#define __RT_BUF   __attribute__((section(".rt_buf")))
 
#define __OVERLAP   __attribute__((section(".overlap")))
 
+#define LB_ASM   __asm__
 Add assembly code.
 
+#define LB_XSTR(x)   XSTR(x:)
 Add label.
 
+

Detailed Description

+

Macros for toolchain abstraction.

+

+Introduction

+

This header file contains macros that are used to provide an abstraction for toolchain use in source code. The EFR32 compiler requires C-language extensions in order to fully use features of the EFR32 architecture. All compilers for EFR32 implement a set of extensions but use different names and ways of implementing those extensions. This header file provides macros that are defined for each supported toolchain and can be used in the source code. This allows the source code to use EFR32 extensions and remain independent of which toolchain is used for compilation.

+

+Prior Toolchain Abstraction Header File

+

Refer file: sl_iec60730_toolchain.h

+

+Supported Toolchains

+
    +
  • GNU GCC
    • +
  • IAR ICCARM
    • +
+

Macro Definition Documentation

+ +

◆ __CLASSB_RAM

+ +
+
+ + + + +
#define __CLASSB_RAM   __attribute__((section(".classb_ram")))
+
+

The __CLASSB_RAM macro is used to define (.classb_ram) section.

+ +
+
+ +

◆ __OVERLAP

+ +
+
+ + + + +
#define __OVERLAP   __attribute__((section(".overlap")))
+
+

The __OVERLAP macro is used to define (.overlap) section.

+ +
+
+ +

◆ __RT_BUF

+ +
+
+ + + + +
#define __RT_BUF   __attribute__((section(".rt_buf")))
+
+

The __RT_BUF macro is used to define (.rt_buf) section.

+ +
+
+ +

◆ __STACK_BOTTOM

+ +
+
+ + + + +
#define __STACK_BOTTOM   __attribute__((section(".stack_bottom")))
+
+

The __STACK_BOTTOM macro is used to define (.stack_bottom) section.

+ +
+
+ +

◆ NOP

+ +
+
+ + + + + + + +
#define NOP()   __NOP()
+
+

__NOP should be declared in cmsis header core_cmInstr.h extern void __NOP(void); Macro to insert a no-operation (NOP) instruction.

+ +
+
+
+ +
+Generated by   +doxygen + 1.8.17 +
+ + diff --git a/docs/document_api_iec60730_library/hierarchy.html b/docs/document_api_iec60730_library/hierarchy.html new file mode 100644 index 00000000..6fb87ea5 --- /dev/null +++ b/docs/document_api_iec60730_library/hierarchy.html @@ -0,0 +1,170 @@ + + + + + + + +Document API IEC60730 Library: Class Hierarchy + + + + + + + + + +
+
+ + + + + + +
+
Document API IEC60730 Library +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
Class Hierarchy
+
+
+
This inheritance list is sorted roughly, but not completely, alphabetically:
+
[detail level 1234]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
 ▼CException
 ▼Cerrors.JLinkException
 Cerrors.JLinkDataException
 Cerrors.JLinkEraseException
 Cerrors.JLinkFlashException
 Cerrors.JLinkReadException
 Cerrors.JLinkRTTException
 Cerrors.JLinkWriteException
 Ciec60730_test_base.iec60730_logger
 ▼Ciec60730_test_base.iec60730TestBase
 Cintegration_test_iec60730_cpu_registers.iec60730_cpu_regsIEC60730 CPU Register Check Tests
 Cintegration_test_iec60730_invariable_memory.iec60730_imcIEC60730 Invariable Memory Plausibility Verification Tests
 Cintegration_test_iec60730_irq.iec60730_irqIEC60730 IRQ Plausibility Verification Tests
 Cintegration_test_iec60730_program_counter.iec60730_programme_counterIEC60730 CPU Program counter Tests
 Cintegration_test_iec60730_system_clock.iec60730_system_clockIEC60730 System Clock Verification Tests
 Cintegration_test_iec60730_variable_memory.iec60730_vmcIEC60730 Variable Memory Plausibility Verification Tests
 Cintegration_test_iec60730_watchdog.iec60730_watchdogIEC60730 Watchdog Verification Tests
 Cunit_test_iec60730_get_report.iec60730_unit_test_resultIEC60730 get unit test result
 Cjlink.JLinkDll
 ▼Cobject
 Cenums.JLinkAccessFlags
 Cenums.JLinkAccessMaskFlags
 Cenums.JLinkBreakpoint
 Cenums.JLinkBreakpointImplementation
 Cenums.JLinkCore
 Cenums.JLinkCPUCapabilities
 Cenums.JLinkDeviceFamily
 Cenums.JLinkEventTypes
 Cenums.JLinkFlags
 Cenums.JLinkFunctions
 ▼Cenums.JLinkGlobalErrors
 ▼Cenums.JLinkDataErrors
 Cerrors.JLinkDataException
 ▼Cenums.JLinkEraseErrors
 Cerrors.JLinkEraseException
 ▼Cenums.JLinkFlashErrors
 Cerrors.JLinkFlashException
 ▼Cenums.JLinkReadErrors
 Cerrors.JLinkReadException
 ▼Cenums.JLinkRTTErrors
 Cerrors.JLinkRTTException
 ▼Cenums.JLinkWriteErrors
 Cerrors.JLinkWriteException
 Cerrors.JLinkException
 Cenums.JLinkHaltReasons
 Cenums.JLinkHost
 Cenums.JLinkInterfaces
 Cenums.JLinkResetStrategyCortexM3
 Cenums.JLinkROMTable
 Cenums.JLinkRTTCommand
 Cenums.JLinkRTTDirection
 Cenums.JLinkStraceCommand
 Cenums.JLinkStraceEvent
 Cenums.JLinkStraceOperation
 Cenums.JLinkSWOCommands
 Cenums.JLinkSWOInterfaces
 Cenums.JLinkTraceCommand
 Cenums.JLinkTraceFormat
 Cenums.JLinkTraceSource
 Cenums.JLinkVectorCatchCortexM3
 Cutil.PyTestSuites
 Cutil.TimeStampUtil
 Csl_iec60730_imc_params_tThis structure is used as configuration for IMC testing, that holds GPCRC Register
 Csl_iec60730_imc_test_multiple_regions_t
 Csl_iec60730_imc_test_region_tThis structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check
 Csl_iec60730_irq_cfg_t
 Csl_iec60730_irq_execution_bounds_t
 Csl_iec60730_irq_fail_t
 Csl_iec60730_library_version_t
 Csl_iec60730_safety_check_t
 Csl_iec60730_update_crc_params_t
 Csl_iec60730_vmc_test_multiple_regions_tThis structure is used as multiple test regions for VMC testing
 Csl_iec60730_vmc_test_region_tThis structure is used as configuration for VMC testing
 Csl_iec60730_watchdog_tWatchdog component configuration structure
 ▼CStructure
 Cjlink_constants.JlinkArm_Speed_Info_CStruct
 Cjlink_constants.JLinkArmEmuConnectInfo_CStruct
 Cjlink_constants.JLinkJtagIdData_CStruct
 ▼CTelnet
 ▼Cutil.TelnetHostUtil
 Cutil.TelnetDeviceUtil
 ▼CTestCase
 Cintegration_test_iec60730_cpu_registers.iec60730_cpu_regsIEC60730 CPU Register Check Tests
 Cintegration_test_iec60730_invariable_memory.iec60730_imcIEC60730 Invariable Memory Plausibility Verification Tests
 Cintegration_test_iec60730_irq.iec60730_irqIEC60730 IRQ Plausibility Verification Tests
 Cintegration_test_iec60730_program_counter.iec60730_programme_counterIEC60730 CPU Program counter Tests
 Cintegration_test_iec60730_system_clock.iec60730_system_clockIEC60730 System Clock Verification Tests
 Cintegration_test_iec60730_variable_memory.iec60730_vmcIEC60730 Variable Memory Plausibility Verification Tests
 Cintegration_test_iec60730_watchdog.iec60730_watchdogIEC60730 Watchdog Verification Tests
 Cunit_test_iec60730_get_report.iec60730_unit_test_resultIEC60730 get unit test result
+
+
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+
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+
Document API IEC60730 Library +
+
+
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Document API IEC60730 Library Documentation
+
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orientationchange":$.proxy(this.winResize,this)},i)),this.opts.subIndicators&&(this.$subArrow=$("").addClass("sub-arrow"),this.opts.subIndicatorsText&&this.$subArrow.html(this.opts.subIndicatorsText)),initMouseDetection()}if(this.$firstSub=this.$root.find("ul").each(function(){e.menuInit($(this))}).eq(0),this.$firstLink=this.$root.find("a").eq(0),this.opts.markCurrentItem){var s=/(index|default)\.[^#\?\/]*/i,o=/#.*/,a=window.location.href.replace(s,""),n=a.replace(o,"");this.$root.find("a").each(function(){var t=this.href.replace(s,""),i=$(this);(t==a||t==n)&&(i.addClass("current"),e.opts.markCurrentTree&&i.parentsUntil("[data-smartmenus-id]","ul").each(function(){$(this).dataSM("parent-a").addClass("current")}))})}this.wasCollapsible=this.isCollapsible()},destroy:function(t){if(!t){var e=".smartmenus";this.$root.removeData("smartmenus").removeAttr("data-smartmenus-id").removeDataSM("level").off(e),e+=this.rootId,$(document).off(e),$(window).off(e),this.opts.subIndicators&&(this.$subArrow=null)}this.menuHideAll();var i=this;this.$root.find("ul").each(function(){var t=$(this);t.dataSM("scroll-arrows")&&t.dataSM("scroll-arrows").remove(),t.dataSM("shown-before")&&((i.opts.subMenusMinWidth||i.opts.subMenusMaxWidth)&&t.css({width:"",minWidth:"",maxWidth:""}).removeClass("sm-nowrap"),t.dataSM("scroll-arrows")&&t.dataSM("scroll-arrows").remove(),t.css({zIndex:"",top:"",left:"",marginLeft:"",marginTop:"",display:""})),0==(t.attr("id")||"").indexOf(i.accessIdPrefix)&&t.removeAttr("id")}).removeDataSM("in-mega").removeDataSM("shown-before").removeDataSM("scroll-arrows").removeDataSM("parent-a").removeDataSM("level").removeDataSM("beforefirstshowfired").removeAttr("role").removeAttr("aria-hidden").removeAttr("aria-labelledby").removeAttr("aria-expanded"),this.$root.find("a.has-submenu").each(function(){var t=$(this);0==t.attr("id").indexOf(i.accessIdPrefix)&&t.removeAttr("id")}).removeClass("has-submenu").removeDataSM("sub").removeAttr("aria-haspopup").removeAttr("aria-controls").removeAttr("aria-expanded").closest("li").removeDataSM("sub"),this.opts.subIndicators&&this.$root.find("span.sub-arrow").remove(),this.opts.markCurrentItem&&this.$root.find("a.current").removeClass("current"),t||(this.$root=null,this.$firstLink=null,this.$firstSub=null,this.$disableOverlay&&(this.$disableOverlay.remove(),this.$disableOverlay=null),menuTrees.splice($.inArray(this,menuTrees),1))},disable:function(t){if(!this.disabled){if(this.menuHideAll(),!t&&!this.opts.isPopup&&this.$root.is(":visible")){var e=this.$root.offset();this.$disableOverlay=$('
').css({position:"absolute",top:e.top,left:e.left,width:this.$root.outerWidth(),height:this.$root.outerHeight(),zIndex:this.getStartZIndex(!0),opacity:0}).appendTo(document.body)}this.disabled=!0}},docClick:function(t){return this.$touchScrollingSub?(this.$touchScrollingSub=null,void 0):((this.visibleSubMenus.length&&!$.contains(this.$root[0],t.target)||$(t.target).closest("a").length)&&this.menuHideAll(),void 0)},docTouchEnd:function(){if(this.lastTouch){if(!(!this.visibleSubMenus.length||void 0!==this.lastTouch.x2&&this.lastTouch.x1!=this.lastTouch.x2||void 0!==this.lastTouch.y2&&this.lastTouch.y1!=this.lastTouch.y2||this.lastTouch.target&&$.contains(this.$root[0],this.lastTouch.target))){this.hideTimeout&&(clearTimeout(this.hideTimeout),this.hideTimeout=0);var t=this;this.hideTimeout=setTimeout(function(){t.menuHideAll()},350)}this.lastTouch=null}},docTouchMove:function(t){if(this.lastTouch){var e=t.originalEvent.touches[0];this.lastTouch.x2=e.pageX,this.lastTouch.y2=e.pageY}},docTouchStart:function(t){var e=t.originalEvent.touches[0];this.lastTouch={x1:e.pageX,y1:e.pageY,target:e.target}},enable:function(){this.disabled&&(this.$disableOverlay&&(this.$disableOverlay.remove(),this.$disableOverlay=null),this.disabled=!1)},getClosestMenu:function(t){for(var e=$(t).closest("ul");e.dataSM("in-mega");)e=e.parent().closest("ul");return e[0]||null},getHeight:function(t){return this.getOffset(t,!0)},getOffset:function(t,e){var i;"none"==t.css("display")&&(i={position:t[0].style.position,visibility:t[0].style.visibility},t.css({position:"absolute",visibility:"hidden"}).show());var s=t[0].getBoundingClientRect&&t[0].getBoundingClientRect(),o=s&&(e?s.height||s.bottom-s.top:s.width||s.right-s.left);return o||0===o||(o=e?t[0].offsetHeight:t[0].offsetWidth),i&&t.hide().css(i),o},getStartZIndex:function(t){var e=parseInt(this[t?"$root":"$firstSub"].css("z-index"));return!t&&isNaN(e)&&(e=parseInt(this.$root.css("z-index"))),isNaN(e)?1:e},getTouchPoint:function(t){return t.touches&&t.touches[0]||t.changedTouches&&t.changedTouches[0]||t},getViewport:function(t){var e=t?"Height":"Width",i=document.documentElement["client"+e],s=window["inner"+e];return s&&(i=Math.min(i,s)),i},getViewportHeight:function(){return this.getViewport(!0)},getViewportWidth:function(){return this.getViewport()},getWidth:function(t){return this.getOffset(t)},handleEvents:function(){return!this.disabled&&this.isCSSOn()},handleItemEvents:function(t){return this.handleEvents()&&!this.isLinkInMegaMenu(t)},isCollapsible:function(){return"static"==this.$firstSub.css("position")},isCSSOn:function(){return"inline"!=this.$firstLink.css("display")},isFixed:function(){var t="fixed"==this.$root.css("position");return t||this.$root.parentsUntil("body").each(function(){return"fixed"==$(this).css("position")?(t=!0,!1):void 0}),t},isLinkInMegaMenu:function(t){return $(this.getClosestMenu(t[0])).hasClass("mega-menu")},isTouchMode:function(){return!mouse||this.opts.noMouseOver||this.isCollapsible()},itemActivate:function(t,e){var i=t.closest("ul"),s=i.dataSM("level");if(s>1&&(!this.activatedItems[s-2]||this.activatedItems[s-2][0]!=i.dataSM("parent-a")[0])){var o=this;$(i.parentsUntil("[data-smartmenus-id]","ul").get().reverse()).add(i).each(function(){o.itemActivate($(this).dataSM("parent-a"))})}if((!this.isCollapsible()||e)&&this.menuHideSubMenus(this.activatedItems[s-1]&&this.activatedItems[s-1][0]==t[0]?s:s-1),this.activatedItems[s-1]=t,this.$root.triggerHandler("activate.smapi",t[0])!==!1){var a=t.dataSM("sub");a&&(this.isTouchMode()||!this.opts.showOnClick||this.clickActivated)&&this.menuShow(a)}},itemBlur:function(t){var e=$(t.currentTarget);this.handleItemEvents(e)&&this.$root.triggerHandler("blur.smapi",e[0])},itemClick:function(t){var e=$(t.currentTarget);if(this.handleItemEvents(e)){if(this.$touchScrollingSub&&this.$touchScrollingSub[0]==e.closest("ul")[0])return this.$touchScrollingSub=null,t.stopPropagation(),!1;if(this.$root.triggerHandler("click.smapi",e[0])===!1)return!1;var i=$(t.target).is(".sub-arrow"),s=e.dataSM("sub"),o=s?2==s.dataSM("level"):!1,a=this.isCollapsible(),n=/toggle$/.test(this.opts.collapsibleBehavior),r=/link$/.test(this.opts.collapsibleBehavior),h=/^accordion/.test(this.opts.collapsibleBehavior);if(s&&!s.is(":visible")){if((!r||!a||i)&&(this.opts.showOnClick&&o&&(this.clickActivated=!0),this.itemActivate(e,h),s.is(":visible")))return this.focusActivated=!0,!1}else if(a&&(n||i))return this.itemActivate(e,h),this.menuHide(s),n&&(this.focusActivated=!1),!1;return this.opts.showOnClick&&o||e.hasClass("disabled")||this.$root.triggerHandler("select.smapi",e[0])===!1?!1:void 0}},itemDown:function(t){var e=$(t.currentTarget);this.handleItemEvents(e)&&e.dataSM("mousedown",!0)},itemEnter:function(t){var e=$(t.currentTarget);if(this.handleItemEvents(e)){if(!this.isTouchMode()){this.showTimeout&&(clearTimeout(this.showTimeout),this.showTimeout=0);var i=this;this.showTimeout=setTimeout(function(){i.itemActivate(e)},this.opts.showOnClick&&1==e.closest("ul").dataSM("level")?1:this.opts.showTimeout)}this.$root.triggerHandler("mouseenter.smapi",e[0])}},itemFocus:function(t){var e=$(t.currentTarget);this.handleItemEvents(e)&&(!this.focusActivated||this.isTouchMode()&&e.dataSM("mousedown")||this.activatedItems.length&&this.activatedItems[this.activatedItems.length-1][0]==e[0]||this.itemActivate(e,!0),this.$root.triggerHandler("focus.smapi",e[0]))},itemLeave:function(t){var e=$(t.currentTarget);this.handleItemEvents(e)&&(this.isTouchMode()||(e[0].blur(),this.showTimeout&&(clearTimeout(this.showTimeout),this.showTimeout=0)),e.removeDataSM("mousedown"),this.$root.triggerHandler("mouseleave.smapi",e[0]))},menuHide:function(t){if(this.$root.triggerHandler("beforehide.smapi",t[0])!==!1&&(canAnimate&&t.stop(!0,!0),"none"!=t.css("display"))){var e=function(){t.css("z-index","")};this.isCollapsible()?canAnimate&&this.opts.collapsibleHideFunction?this.opts.collapsibleHideFunction.call(this,t,e):t.hide(this.opts.collapsibleHideDuration,e):canAnimate&&this.opts.hideFunction?this.opts.hideFunction.call(this,t,e):t.hide(this.opts.hideDuration,e),t.dataSM("scroll")&&(this.menuScrollStop(t),t.css({"touch-action":"","-ms-touch-action":"","-webkit-transform":"",transform:""}).off(".smartmenus_scroll").removeDataSM("scroll").dataSM("scroll-arrows").hide()),t.dataSM("parent-a").removeClass("highlighted").attr("aria-expanded","false"),t.attr({"aria-expanded":"false","aria-hidden":"true"});var i=t.dataSM("level");this.activatedItems.splice(i-1,1),this.visibleSubMenus.splice($.inArray(t,this.visibleSubMenus),1),this.$root.triggerHandler("hide.smapi",t[0])}},menuHideAll:function(){this.showTimeout&&(clearTimeout(this.showTimeout),this.showTimeout=0);for(var t=this.opts.isPopup?1:0,e=this.visibleSubMenus.length-1;e>=t;e--)this.menuHide(this.visibleSubMenus[e]);this.opts.isPopup&&(canAnimate&&this.$root.stop(!0,!0),this.$root.is(":visible")&&(canAnimate&&this.opts.hideFunction?this.opts.hideFunction.call(this,this.$root):this.$root.hide(this.opts.hideDuration))),this.activatedItems=[],this.visibleSubMenus=[],this.clickActivated=!1,this.focusActivated=!1,this.zIndexInc=0,this.$root.triggerHandler("hideAll.smapi")},menuHideSubMenus:function(t){for(var e=this.activatedItems.length-1;e>=t;e--){var i=this.activatedItems[e].dataSM("sub");i&&this.menuHide(i)}},menuInit:function(t){if(!t.dataSM("in-mega")){t.hasClass("mega-menu")&&t.find("ul").dataSM("in-mega",!0);for(var e=2,i=t[0];(i=i.parentNode.parentNode)!=this.$root[0];)e++;var s=t.prevAll("a").eq(-1);s.length||(s=t.prevAll().find("a").eq(-1)),s.addClass("has-submenu").dataSM("sub",t),t.dataSM("parent-a",s).dataSM("level",e).parent().dataSM("sub",t);var o=s.attr("id")||this.accessIdPrefix+ ++this.idInc,a=t.attr("id")||this.accessIdPrefix+ ++this.idInc;s.attr({id:o,"aria-haspopup":"true","aria-controls":a,"aria-expanded":"false"}),t.attr({id:a,role:"group","aria-hidden":"true","aria-labelledby":o,"aria-expanded":"false"}),this.opts.subIndicators&&s[this.opts.subIndicatorsPos](this.$subArrow.clone())}},menuPosition:function(t){var e,i,s=t.dataSM("parent-a"),o=s.closest("li"),a=o.parent(),n=t.dataSM("level"),r=this.getWidth(t),h=this.getHeight(t),u=s.offset(),l=u.left,c=u.top,d=this.getWidth(s),m=this.getHeight(s),p=$(window),f=p.scrollLeft(),v=p.scrollTop(),b=this.getViewportWidth(),S=this.getViewportHeight(),g=a.parent().is("[data-sm-horizontal-sub]")||2==n&&!a.hasClass("sm-vertical"),M=this.opts.rightToLeftSubMenus&&!o.is("[data-sm-reverse]")||!this.opts.rightToLeftSubMenus&&o.is("[data-sm-reverse]"),w=2==n?this.opts.mainMenuSubOffsetX:this.opts.subMenusSubOffsetX,T=2==n?this.opts.mainMenuSubOffsetY:this.opts.subMenusSubOffsetY;if(g?(e=M?d-r-w:w,i=this.opts.bottomToTopSubMenus?-h-T:m+T):(e=M?w-r:d-w,i=this.opts.bottomToTopSubMenus?m-T-h:T),this.opts.keepInViewport){var y=l+e,I=c+i;if(M&&f>y?e=g?f-y+e:d-w:!M&&y+r>f+b&&(e=g?f+b-r-y+e:w-r),g||(S>h&&I+h>v+S?i+=v+S-h-I:(h>=S||v>I)&&(i+=v-I)),g&&(I+h>v+S+.49||v>I)||!g&&h>S+.49){var x=this;t.dataSM("scroll-arrows")||t.dataSM("scroll-arrows",$([$('')[0],$('')[0]]).on({mouseenter:function(){t.dataSM("scroll").up=$(this).hasClass("scroll-up"),x.menuScroll(t)},mouseleave:function(e){x.menuScrollStop(t),x.menuScrollOut(t,e)},"mousewheel DOMMouseScroll":function(t){t.preventDefault()}}).insertAfter(t));var A=".smartmenus_scroll";if(t.dataSM("scroll",{y:this.cssTransforms3d?0:i-m,step:1,itemH:m,subH:h,arrowDownH:this.getHeight(t.dataSM("scroll-arrows").eq(1))}).on(getEventsNS({mouseover:function(e){x.menuScrollOver(t,e)},mouseout:function(e){x.menuScrollOut(t,e)},"mousewheel DOMMouseScroll":function(e){x.menuScrollMousewheel(t,e)}},A)).dataSM("scroll-arrows").css({top:"auto",left:"0",marginLeft:e+(parseInt(t.css("border-left-width"))||0),width:r-(parseInt(t.css("border-left-width"))||0)-(parseInt(t.css("border-right-width"))||0),zIndex:t.css("z-index")}).eq(g&&this.opts.bottomToTopSubMenus?0:1).show(),this.isFixed()){var C={};C[touchEvents?"touchstart touchmove touchend":"pointerdown pointermove pointerup MSPointerDown MSPointerMove MSPointerUp"]=function(e){x.menuScrollTouch(t,e)},t.css({"touch-action":"none","-ms-touch-action":"none"}).on(getEventsNS(C,A))}}}t.css({top:"auto",left:"0",marginLeft:e,marginTop:i-m})},menuScroll:function(t,e,i){var s,o=t.dataSM("scroll"),a=t.dataSM("scroll-arrows"),n=o.up?o.upEnd:o.downEnd;if(!e&&o.momentum){if(o.momentum*=.92,s=o.momentum,.5>s)return this.menuScrollStop(t),void 0}else s=i||(e||!this.opts.scrollAccelerate?this.opts.scrollStep:Math.floor(o.step));var r=t.dataSM("level");if(this.activatedItems[r-1]&&this.activatedItems[r-1].dataSM("sub")&&this.activatedItems[r-1].dataSM("sub").is(":visible")&&this.menuHideSubMenus(r-1),o.y=o.up&&o.y>=n||!o.up&&n>=o.y?o.y:Math.abs(n-o.y)>s?o.y+(o.up?s:-s):n,t.css(this.cssTransforms3d?{"-webkit-transform":"translate3d(0, "+o.y+"px, 0)",transform:"translate3d(0, "+o.y+"px, 0)"}:{marginTop:o.y}),mouse&&(o.up&&o.y>o.downEnd||!o.up&&o.y0;t.dataSM("scroll-arrows").eq(i?0:1).is(":visible")&&(t.dataSM("scroll").up=i,this.menuScroll(t,!0))}e.preventDefault()},menuScrollOut:function(t,e){mouse&&(/^scroll-(up|down)/.test((e.relatedTarget||"").className)||(t[0]==e.relatedTarget||$.contains(t[0],e.relatedTarget))&&this.getClosestMenu(e.relatedTarget)==t[0]||t.dataSM("scroll-arrows").css("visibility","hidden"))},menuScrollOver:function(t,e){if(mouse&&!/^scroll-(up|down)/.test(e.target.className)&&this.getClosestMenu(e.target)==t[0]){this.menuScrollRefreshData(t);var i=t.dataSM("scroll"),s=$(window).scrollTop()-t.dataSM("parent-a").offset().top-i.itemH;t.dataSM("scroll-arrows").eq(0).css("margin-top",s).end().eq(1).css("margin-top",s+this.getViewportHeight()-i.arrowDownH).end().css("visibility","visible")}},menuScrollRefreshData:function(t){var e=t.dataSM("scroll"),i=$(window).scrollTop()-t.dataSM("parent-a").offset().top-e.itemH;this.cssTransforms3d&&(i=-(parseFloat(t.css("margin-top"))-i)),$.extend(e,{upEnd:i,downEnd:i+this.getViewportHeight()-e.subH})},menuScrollStop:function(t){return this.scrollTimeout?(cancelAnimationFrame(this.scrollTimeout),this.scrollTimeout=0,t.dataSM("scroll").step=1,!0):void 0},menuScrollTouch:function(t,e){if(e=e.originalEvent,isTouchEvent(e)){var i=this.getTouchPoint(e);if(this.getClosestMenu(i.target)==t[0]){var s=t.dataSM("scroll");if(/(start|down)$/i.test(e.type))this.menuScrollStop(t)?(e.preventDefault(),this.$touchScrollingSub=t):this.$touchScrollingSub=null,this.menuScrollRefreshData(t),$.extend(s,{touchStartY:i.pageY,touchStartTime:e.timeStamp});else if(/move$/i.test(e.type)){var o=void 0!==s.touchY?s.touchY:s.touchStartY;if(void 0!==o&&o!=i.pageY){this.$touchScrollingSub=t;var a=i.pageY>o;void 0!==s.up&&s.up!=a&&$.extend(s,{touchStartY:i.pageY,touchStartTime:e.timeStamp}),$.extend(s,{up:a,touchY:i.pageY}),this.menuScroll(t,!0,Math.abs(i.pageY-o))}e.preventDefault()}else void 0!==s.touchY&&((s.momentum=15*Math.pow(Math.abs(i.pageY-s.touchStartY)/(e.timeStamp-s.touchStartTime),2))&&(this.menuScrollStop(t),this.menuScroll(t),e.preventDefault()),delete s.touchY)}}},menuShow:function(t){if((t.dataSM("beforefirstshowfired")||(t.dataSM("beforefirstshowfired",!0),this.$root.triggerHandler("beforefirstshow.smapi",t[0])!==!1))&&this.$root.triggerHandler("beforeshow.smapi",t[0])!==!1&&(t.dataSM("shown-before",!0),canAnimate&&t.stop(!0,!0),!t.is(":visible"))){var e=t.dataSM("parent-a"),i=this.isCollapsible();if((this.opts.keepHighlighted||i)&&e.addClass("highlighted"),i)t.removeClass("sm-nowrap").css({zIndex:"",width:"auto",minWidth:"",maxWidth:"",top:"",left:"",marginLeft:"",marginTop:""});else{if(t.css("z-index",this.zIndexInc=(this.zIndexInc||this.getStartZIndex())+1),(this.opts.subMenusMinWidth||this.opts.subMenusMaxWidth)&&(t.css({width:"auto",minWidth:"",maxWidth:""}).addClass("sm-nowrap"),this.opts.subMenusMinWidth&&t.css("min-width",this.opts.subMenusMinWidth),this.opts.subMenusMaxWidth)){var s=this.getWidth(t);t.css("max-width",this.opts.subMenusMaxWidth),s>this.getWidth(t)&&t.removeClass("sm-nowrap").css("width",this.opts.subMenusMaxWidth)}this.menuPosition(t)}var o=function(){t.css("overflow","")};i?canAnimate&&this.opts.collapsibleShowFunction?this.opts.collapsibleShowFunction.call(this,t,o):t.show(this.opts.collapsibleShowDuration,o):canAnimate&&this.opts.showFunction?this.opts.showFunction.call(this,t,o):t.show(this.opts.showDuration,o),e.attr("aria-expanded","true"),t.attr({"aria-expanded":"true","aria-hidden":"false"}),this.visibleSubMenus.push(t),this.$root.triggerHandler("show.smapi",t[0])}},popupHide:function(t){this.hideTimeout&&(clearTimeout(this.hideTimeout),this.hideTimeout=0);var e=this;this.hideTimeout=setTimeout(function(){e.menuHideAll()},t?1:this.opts.hideTimeout)},popupShow:function(t,e){if(!this.opts.isPopup)return alert('SmartMenus jQuery Error:\n\nIf you want to show this menu via the "popupShow" method, set the isPopup:true option.'),void 0;if(this.hideTimeout&&(clearTimeout(this.hideTimeout),this.hideTimeout=0),this.$root.dataSM("shown-before",!0),canAnimate&&this.$root.stop(!0,!0),!this.$root.is(":visible")){this.$root.css({left:t,top:e});var i=this,s=function(){i.$root.css("overflow","")};canAnimate&&this.opts.showFunction?this.opts.showFunction.call(this,this.$root,s):this.$root.show(this.opts.showDuration,s),this.visibleSubMenus[0]=this.$root}},refresh:function(){this.destroy(!0),this.init(!0)},rootKeyDown:function(t){if(this.handleEvents())switch(t.keyCode){case 27:var e=this.activatedItems[0];if(e){this.menuHideAll(),e[0].focus();var i=e.dataSM("sub");i&&this.menuHide(i)}break;case 32:var s=$(t.target);if(s.is("a")&&this.handleItemEvents(s)){var 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See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function initMenu(relPath,searchEnabled,serverSide,searchPage,search) { + function makeTree(data,relPath) { + var result=''; + if ('children' in data) { + result+=''; + } + return result; + } + + $('#main-nav').append(makeTree(menudata,relPath)); + $('#main-nav').children(':first').addClass('sm sm-dox').attr('id','main-menu'); + if (searchEnabled) { + if (serverSide) { + $('#main-menu').append('
    • '); + } else { + $('#main-menu').append('
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    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    Modules
    +
    +
    +
    Here is a list of all modules:
    +
    [detail level 123]
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
     ▼EFR32 IEC60730 LibraryOverview and documentation of IEC60730 library APIs
     BISTBuilt In Self Test - Executed periodically
     CPU Registers CheckVerifies CPU registers are working correctly
     IRQ CheckVerifies interrupt frequency is within bounds
     Invariable Memory CheckVerifies contents of flash memory
     OEM External Communications Example using UARTVerifies communication channel is operating as expected
     POSTPower On Self Test - Executed once during power up
     Program Counter CheckVerifies all tests have completed on time
     Safe StateWhen incorrect behavior is detected, this state prevents further execution
     System Clock CheckVerifies that system clocks are within expected frequencies
     Variable Memory CheckVerifies RAM is working correctly
     Watchdog CheckMonitors CPU execution
     ▼IEC60730 Test SpecificationAutomated tests for validating correct firmware operation
     ▼Integration Test Modules In Library IEC60730Python script supports running test case integration tests for internal modules in library IEC60730
     CPU Register Check Automated Verification TestsPython script for the IEC60730 CPU Register Check Verification tests
     IRQ Automated Verification TestsPython script for the IEC60730 IRQ plausibility verification tests
     Invariable Memory Automated Verification TestsPython script for the IEC60730 Invariable Memory plausibility verification tests
     Program Counter Verification TestsPython script for the IEC60730 Program counter Verification tests
     System Clock Automated Verification TestsPython script for the IEC60730 system clock Verification tests
     Variable Memory Automated Verification TestsPython script for the IEC60730 Variable Memory plausibility verification tests
     Watchdog Automated Verification TestsPython script for the IEC60730 Watchdog timer Verification tests
     ▼UNIT Test Functions In Modules In Library IEC60730C file combined with Unity framework
     Bist Verification Unit TestsHeader file list of test cases for the verification operate function sl_iec60730_bist()
     CPU Registers Verification Unit TestsHeader file list of test cases for the verification operate functions in cpu registers module
     IRQ Verification Unit TestsHeader file list of test cases for the verification operate functions in irq module
     Invariable Memory Verification Unit TestsHeader file list of test cases for the verification operate functions in invariable memory module
     Post Verification Unit TestsHeader file list of test cases for the verification operate function sl_iec60730_post()
     Program Counter Verification Unit TestsHeader file list of test cases for the verification operate function sl_iec60730_program_counter_test()
     Safety Check Verification Unit TestsHeader file list of test cases for the verification operate function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur()
     System Clock Verification Unit TestsHeader file list of test cases for the verification operate functions in system_clock module
     Variable Memory Verification Unit TestsHeader file list of test cases for the verification operate functions in variable memory module
     Watchdog Verification Unit TestsHeader file list of test cases for the verification operate functions in watchdog module
     Toolchain AbstractionMacros for toolchain abstraction
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/namespacejlink.html b/docs/document_api_iec60730_library/namespacejlink.html new file mode 100644 index 00000000..c60ef14e --- /dev/null +++ b/docs/document_api_iec60730_library/namespacejlink.html @@ -0,0 +1,97 @@ + + + + + + + +Document API IEC60730 Library: jlink Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + +
    +
    +
    +Classes | +Variables
    +
    +
    jlink Namespace Reference
    +
    +
    + + + + +

    +Classes

    class  JLinkDll
     
    + + + + + +

    +Variables

    +int JLINKARM_HOSTIF_USB = 0x01
     
    +int JLINKARM_HOSTIF_IP = 0x02
     
    +

    Detailed Description

    +
    jlink.py:  JLinkARM.dll Wrapper - Python Edition
+
+This module provides access to all functions of JLinkARM.dll.
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/namespacejlink__constants.html b/docs/document_api_iec60730_library/namespacejlink__constants.html new file mode 100644 index 00000000..d161f383 --- /dev/null +++ b/docs/document_api_iec60730_library/namespacejlink__constants.html @@ -0,0 +1,92 @@ + + + + + + + +Document API IEC60730 Library: jlink_constants Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + +
    +
    +
    +Classes
    +
    +
    jlink_constants Namespace Reference
    +
    +
    + + + + + + + + +

    +Classes

    class  JlinkArm_Speed_Info_CStruct
     
    class  JLinkArmEmuConnectInfo_CStruct
     
    class  JLinkJtagIdData_CStruct
     
    +

    Detailed Description

    +
    jlink_constants.py:  Constants for JLinkARM.dll Wrapper - Python Edition
+
+This module provides constants used by the JLinkARM.dll wrapper jlink.py.
+
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/namespaces.html b/docs/document_api_iec60730_library/namespaces.html new file mode 100644 index 00000000..7d42f90a --- /dev/null +++ b/docs/document_api_iec60730_library/namespaces.html @@ -0,0 +1,82 @@ + + + + + + + +Document API IEC60730 Library: Namespace List + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    Namespace List
    +
    +
    +
    Here is a list of all documented namespaces with brief descriptions:
    + + + +
     Njlink
     Njlink_constants
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
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+ -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +.SelectItem { + font: 8pt Arial, Verdana, sans-serif; + padding-left: 2px; + padding-right: 12px; + border: 0px; +} + +span.SelectionMark { + margin-right: 4px; + font-family: monospace; + outline-style: none; + text-decoration: none; +} + +a.SelectItem { + display: block; + outline-style: none; + color: #000000; + text-decoration: none; + padding-left: 6px; + padding-right: 12px; +} + +a.SelectItem:focus, +a.SelectItem:active { + color: #000000; + outline-style: none; + text-decoration: none; +} + +a.SelectItem:hover { + color: #FFFFFF; + background-color: #3D578C; + outline-style: none; + text-decoration: none; + cursor: pointer; + display: block; +} + +/*---------------- Search results window */ + +iframe#MSearchResults { + width: 60ex; + height: 15em; +} + +#MSearchResultsWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #000; + background-color: #EEF1F7; + z-index:10000; +} + +/* ----------------------------------- */ + + +#SRIndex { + clear:both; + padding-bottom: 15px; +} + +.SREntry { + font-size: 10pt; + padding-left: 1ex; +} + +.SRPage .SREntry { + font-size: 8pt; + padding: 1px 5px; +} + +body.SRPage { + margin: 5px 2px; +} + +.SRChildren { + padding-left: 3ex; padding-bottom: .5em +} + +.SRPage .SRChildren { + display: none; +} + +.SRSymbol { + font-weight: bold; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRScope { + display: block; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRSymbol:focus, a.SRSymbol:active, +a.SRScope:focus, a.SRScope:active { + text-decoration: underline; +} + +span.SRScope { + padding-left: 4px; +} + +.SRPage .SRStatus { + padding: 2px 5px; + font-size: 8pt; + font-style: italic; +} + +.SRResult { + display: none; +} + +DIV.searchresults { + margin-left: 10px; + margin-right: 10px; +} + +/*---------------- External search page results */ + +.searchresult { + background-color: #F0F3F8; +} + +.pages b { + color: white; + padding: 5px 5px 3px 5px; + background-image: url("../tab_a.png"); + background-repeat: repeat-x; + text-shadow: 0 1px 1px #000000; +} + +.pages { + line-height: 17px; + margin-left: 4px; + text-decoration: none; +} + +.hl { + font-weight: bold; +} + +#searchresults { + margin-bottom: 20px; +} + +.searchpages { + margin-top: 10px; +} + diff --git a/docs/document_api_iec60730_library/search/search.js b/docs/document_api_iec60730_library/search/search.js new file mode 100644 index 00000000..a554ab9c --- /dev/null +++ b/docs/document_api_iec60730_library/search/search.js @@ -0,0 +1,814 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function convertToId(search) +{ + var result = ''; + for (i=0;i do a search + { + this.Search(); + } + } + + this.OnSearchSelectKey = function(evt) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==40 && this.searchIndex0) // Up + { + this.searchIndex--; + this.OnSelectItem(this.searchIndex); + } + else if (e.keyCode==13 || e.keyCode==27) + { + this.OnSelectItem(this.searchIndex); + this.CloseSelectionWindow(); + this.DOMSearchField().focus(); + } + return false; + } + + // --------- Actions + + // Closes the results window. + this.CloseResultsWindow = function() + { + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.Activate(false); + } + + this.CloseSelectionWindow = function() + { + this.DOMSearchSelectWindow().style.display = 'none'; + } + + // Performs a search. + this.Search = function() + { + this.keyTimeout = 0; + + // strip leading whitespace + var searchValue = this.DOMSearchField().value.replace(/^ +/, ""); + + var code = searchValue.toLowerCase().charCodeAt(0); + var idxChar = searchValue.substr(0, 1).toLowerCase(); + if ( 0xD800 <= code && code <= 0xDBFF && searchValue > 1) // surrogate pair + { + idxChar = searchValue.substr(0, 2); + } + + var resultsPage; + var resultsPageWithSearch; + var hasResultsPage; + + var idx = indexSectionsWithContent[this.searchIndex].indexOf(idxChar); + if (idx!=-1) + { + var hexCode=idx.toString(16); + resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + '.html'; + resultsPageWithSearch = resultsPage+'?'+escape(searchValue); + hasResultsPage = true; + } + else // nothing available for this search term + { + resultsPage = this.resultsPath + '/nomatches.html'; + resultsPageWithSearch = resultsPage; + hasResultsPage = false; + } + + window.frames.MSearchResults.location = resultsPageWithSearch; + var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow(); + + if (domPopupSearchResultsWindow.style.display!='block') + { + var domSearchBox = this.DOMSearchBox(); + this.DOMSearchClose().style.display = 'inline'; + if (this.insideFrame) + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + domPopupSearchResultsWindow.style.position = 'relative'; + domPopupSearchResultsWindow.style.display = 'block'; + var width = document.body.clientWidth - 8; // the -8 is for IE :-( + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResults.style.width = width + 'px'; + } + else + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; + var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + } + } + + this.lastSearchValue = searchValue; + this.lastResultsPage = resultsPage; + } + + // -------- Activation Functions + + // Activates or deactivates the search panel, resetting things to + // their default values if necessary. + this.Activate = function(isActive) + { + if (isActive || // open it + this.DOMPopupSearchResultsWindow().style.display == 'block' + ) + { + this.DOMSearchBox().className = 'MSearchBoxActive'; + + var searchField = this.DOMSearchField(); + + if (searchField.value == this.searchLabel) // clear "Search" term upon entry + { + searchField.value = ''; + this.searchActive = true; + } + } + else if (!isActive) // directly remove the panel + { + this.DOMSearchBox().className = 'MSearchBoxInactive'; + this.DOMSearchField().value = this.searchLabel; + this.searchActive = false; + this.lastSearchValue = '' + this.lastResultsPage = ''; + } + } +} + +// ----------------------------------------------------------------------- + +// The class that handles everything on the search results page. +function SearchResults(name) +{ + // The number of matches from the last run of . + this.lastMatchCount = 0; + this.lastKey = 0; + this.repeatOn = false; + + // Toggles the visibility of the passed element ID. + this.FindChildElement = function(id) + { + var parentElement = document.getElementById(id); + var element = parentElement.firstChild; + + while (element && element!=parentElement) + { + if (element.nodeName == 'DIV' && element.className == 'SRChildren') + { + return element; + } + + if (element.nodeName == 'DIV' && element.hasChildNodes()) + { + element = element.firstChild; + } + else if (element.nextSibling) + { + element = element.nextSibling; + } + else + { + do + { + element = element.parentNode; + } + while (element && element!=parentElement && !element.nextSibling); + + if (element && element!=parentElement) + { + element = element.nextSibling; + } + } + } + } + + this.Toggle = function(id) + { + var element = this.FindChildElement(id); + if (element) + { + if (element.style.display == 'block') + { + element.style.display = 'none'; + } + else + { + element.style.display = 'block'; + } + } + } + + // Searches for the passed string. If there is no parameter, + // it takes it from the URL query. + // + // Always returns true, since other documents may try to call it + // and that may or may not be possible. + this.Search = function(search) + { + if (!search) // get search word from URL + { + search = window.location.search; + search = search.substring(1); // Remove the leading '?' + search = unescape(search); + } + + search = search.replace(/^ +/, ""); // strip leading spaces + search = search.replace(/ +$/, ""); // strip trailing spaces + search = search.toLowerCase(); + search = convertToId(search); + + var resultRows = document.getElementsByTagName("div"); + var matches = 0; + + var i = 0; + while (i < resultRows.length) + { + var row = resultRows.item(i); + if (row.className == "SRResult") + { + var rowMatchName = row.id.toLowerCase(); + rowMatchName = rowMatchName.replace(/^sr\d*_/, ''); // strip 'sr123_' + + if (search.length<=rowMatchName.length && + rowMatchName.substr(0, search.length)==search) + { + row.style.display = 'block'; + matches++; + } + else + { + row.style.display = 'none'; + } + } + i++; + } + document.getElementById("Searching").style.display='none'; + if (matches == 0) // no results + { + document.getElementById("NoMatches").style.display='block'; + } + else // at least one result + { + document.getElementById("NoMatches").style.display='none'; + } + this.lastMatchCount = matches; + return true; + } + + // return the first item with index index or higher that is visible + this.NavNext = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index++; + } + return focusItem; + } + + this.NavPrev = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index--; + } + return focusItem; + } + + this.ProcessKeys = function(e) + { + if (e.type == "keydown") + { + this.repeatOn = false; + this.lastKey = e.keyCode; + } + else if (e.type == "keypress") + { + if (!this.repeatOn) + { + if (this.lastKey) this.repeatOn = true; + return false; // ignore first keypress after keydown + } + } + else if (e.type == "keyup") + { + this.lastKey = 0; + this.repeatOn = false; + } + return this.lastKey!=0; + } + + this.Nav = function(evt,itemIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + var newIndex = itemIndex-1; + var focusItem = this.NavPrev(newIndex); + if (focusItem) + { + var child = this.FindChildElement(focusItem.parentNode.parentNode.id); + if (child && child.style.display == 'block') // children visible + { + var n=0; + var tmpElem; + while (1) // search for last child + { + tmpElem = document.getElementById('Item'+newIndex+'_c'+n); + if (tmpElem) + { + focusItem = tmpElem; + } + else // found it! + { + break; + } + n++; + } + } + } + if (focusItem) + { + focusItem.focus(); + } + else // return focus to search field + { + parent.document.getElementById("MSearchField").focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = itemIndex+1; + var focusItem; + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem && elem.style.display == 'block') // children visible + { + focusItem = document.getElementById('Item'+itemIndex+'_c0'); + } + if (!focusItem) focusItem = this.NavNext(newIndex); + if (focusItem) focusItem.focus(); + } + else if (this.lastKey==39) // Right + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'block'; + } + else if (this.lastKey==37) // Left + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'none'; + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } + + this.NavChild = function(evt,itemIndex,childIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + if (childIndex>0) + { + var newIndex = childIndex-1; + document.getElementById('Item'+itemIndex+'_c'+newIndex).focus(); + } + else // already at first child, jump to parent + { + document.getElementById('Item'+itemIndex).focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = childIndex+1; + var elem = document.getElementById('Item'+itemIndex+'_c'+newIndex); + if (!elem) // last child, jump to parent next parent + { + elem = this.NavNext(itemIndex+1); + } + if (elem) + { + elem.focus(); + } + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } +} + +function setKeyActions(elem,action) +{ + elem.setAttribute('onkeydown',action); + elem.setAttribute('onkeypress',action); + elem.setAttribute('onkeyup',action); +} + +function setClassAttr(elem,attr) +{ + elem.setAttribute('class',attr); + elem.setAttribute('className',attr); +} + +function createResults() +{ + var results = document.getElementById("SRResults"); + for (var e=0; e + + + + + + + + +
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    +
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    +
    Document API IEC60730 Library +
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    +Classes | +Macros | +Typedefs | +Enumerations | +Functions | +Variables
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    sl_iec60730.h File Reference
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    Library definitions. +More...

    +
    #include "sl_iec60730_config.h"
    +#include "sl_iec60730_toolchain.h"
    +#include "em_device.h"
    +#include "em_core.h"
    +#include "em_gpcrc.h"
    +
    +

    Go to the source code of this file.

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    +Classes

    struct  sl_iec60730_library_version_t
     
    struct  sl_iec60730_safety_check_t
     
    struct  sl_iec60730_irq_execution_bounds_t
     
    struct  sl_iec60730_irq_fail_t
     
    struct  sl_iec60730_irq_cfg_t
     
    struct  sl_iec60730_imc_params_t
     This structure is used as configuration for IMC testing, that holds GPCRC Register. More...
     
    struct  sl_iec60730_update_crc_params_t
     
    struct  sl_iec60730_imc_test_region_t
     This structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check. More...
     
    struct  sl_iec60730_imc_test_multiple_regions_t
     
    struct  sl_iec60730_vmc_test_region_t
     This structure is used as configuration for VMC testing. More...
     
    struct  sl_iec60730_vmc_test_multiple_regions_t
     This structure is used as multiple test regions for VMC testing. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    +#define IE60730_LIBRARY_VERSION   { 2, 0, 0 }
     
    #define SL_IEC60730_BOARD_HEADER
     
    #define UNUSED_VAR(x)   (void) (x)
     
    +#define __CONCAT(x, y)   x##y
     Macro merge separate words to be joined into a single word.
     
    +#define CONCAT(x, y)   __CONCAT(x, y)
     
    +#define STR(x)   #x
     Macro convert to string.
     
    +#define XSTR(x)   STR(x)
     
    #define LABEL_DEF(NAME)   LB_ASM volatile(LB_XSTR(NAME))
     
    #define __no_init
     
    #define DEC_CLASSB_VARS(vartype, name)
     
    #define EXTERN_DEC_CLASSB_VARS(vartype, name)
     
    #define sl_static_dec_classb_vars(vartype, name)
     
    #define INV_CLASSB_VAR(vartype, name)   CONCAT(name, _inv) = (vartype) (~(vartype) name)
     
    #define INV_CLASSB_PVAR(vartype, name)   CONCAT(name, _inv) = (vartype *) (~(vartype) name)
     
    #define CHECK_INTEGRITY(vartype, x)   ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, _inv)))
     
    #define sl_iec60730_crc_t
     
    #define SL_IEC60730_INVAR_BLOCKS_PER_BIST
     
    #define SL_IEC60730_ROM_SIZE   ((uint32_t) SL_IEC60730_ROM_END - (uint32_t) SL_IEC60730_ROM_START)
     
    #define STEPS_NUMBER   ((uint32_t) SL_IEC60730_ROM_SIZE / SL_IEC60730_FLASH_BLOCK)
     
    #define SL_IEC60730_ROM_SIZE_INWORDS   ((uint32_t) SL_IEC60730_ROM_SIZE / 4U)
     
    #define SL_IEC60730_FLASH_BLOCK_WORDS   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS / STEPS_NUMBER))
     
    #define SL_IEC60730_ROM_SIZE_TEST(start, end)   ((uint32_t) end - (uint32_t) start)
     
    #define STEPS_NUMBER_TEST(start, end)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / SL_IEC60730_FLASH_BLOCK)
     
    #define SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / 4U)
     
    #define SL_IEC60730_FLASH_BLOCK_WORDS_TEST(start, end)   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) / STEPS_NUMBER_TEST(start, end)))
     
    #define SL_IEC60730_REF_CRC   (check_sum)
     
    #define BLOCKSIZE   (4)
     
    #define RT_BLOCK_OVERLAP   (1)
     
    #define RT_BLOCKSIZE   (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
     
    #define BACKGROUND   ((uint32_t) 0x00000000uL)
     
    +#define IEC60730_VMC_COMPLETE   (1 << 0)
     Mask bit used for Variable Memory Checks completed.
     
    +#define IEC60730_IMC_COMPLETE   (1 << 1)
     Mask bit used for Invariable Memory Checks completed.
     
    +#define IEC60730_CPU_CLOCKS_COMPLETE   (1 << 2)
     Mask bit used for CPU Clocks Checks completed.
     
    +#define IEC60730_CPU_REGS_COMPLETE   (1 << 3)
     Mask bit used for CPU Register Checks completed.
     
    +#define IEC60730_INTERRUPT_COMPLETE   (1 << 4)
     Mask bit used for Interrupt Checks completed.
     
    +#define IEC60730_GPIO_COMPLETE   (1 << 5)
     Mask bit used for GPIO Plausibility Checks completed.
     
    +#define IEC60730_ANALOG_COMPLETE   (1 << 6)
     Mask bit used for Analog Plausibility Checks completed.
     
    +#define IEC60730_COMMS_COMPLETE   (1 << 7)
     Mask bit used for Communications Plausibility Checks completed.
     
    +#define IEC60730_OEM0_COMPLETE   (1 << 8)
     Mask bit used for OEM Check 0 completed.
     
    +#define IEC60730_OEM1_COMPLETE   (1 << 9)
     Mask bit used for OEM Check 1 completed.
     
    +#define IEC60730_OEM2_COMPLETE   (1 << 10)
     Mask bit used for OEM Check 2 completed.
     
    +#define IEC60730_OEM3_COMPLETE   (1 << 11)
     Mask bit used for OEM Check 3 completed.
     
    +#define IEC60730_OEM4_COMPLETE   (1 << 12)
     Mask bit used for OEM Check 4 completed.
     
    +#define IEC60730_OEM5_COMPLETE   (1 << 13)
     Mask bit used for OEM Check 5 completed.
     
    +#define IEC60730_OEM6_COMPLETE   (1 << 14)
     Mask bit used for OEM Check 6 completed.
     
    +#define IEC60730_OEM7_COMPLETE   (1 << 15)
     Mask bit used for OEM Check 7 completed.
     
    #define IEC60730_ALL_COMPLETE_BITS
     Mask used for checking that all bits are set. More...
     
    #define IEC60730_MAX_IRQ_CHECK   32
     
    +#define SL_IEC60370_ENTER_ATOMIC()   CORE_ENTER_ATOMIC()
     Enter ATOMIC section.
     
    +#define SL_IEC60370_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
     Exit ATOMIC section.
     
    +#define SL_IEC60370_DECLARE_IRQ_STATE   CORE_DECLARE_IRQ_STATE;
     Declare irq state.
     
    #define SL_IEC60730_IMC_POST_ENTER_ATOMIC()
     Enter ATOMIC section of IMC Post. More...
     
    +#define SL_IEC60730_IMC_POST_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
     Exit ATOMIC section of IMC Post.
     
    #define SL_IEC60730_IMC_BIST_ENTER_ATOMIC()
     Enter ATOMIC section of IMC Bist. More...
     
    +#define SL_IEC60730_IMC_BIST_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
     Exit ATOMIC section of IMC Bist.
     
    +#define SL_IEC60730_CRC_INIT(crc, init)   GPCRC_Init(crc, init)
     Initialize the General Purpose Cyclic Redundancy Check (GPCRC) module.
     
    +#define SL_IEC60730_CRC_RESET(crc)   GPCRC_Reset(crc)
     Reset GPCRC registers to the hardware reset state.
     
    +#define SL_IEC60730_CRC_START(crc)   GPCRC_Start(crc)
     Issues a command to initialize CRC calculation.
     
    +#define SL_IEC60730_CRC_INPUTU32(crc, d)   GPCRC_InputU32(crc, d)
     Writes a 32-bit value to the input data register of the CRC.
     
    +#define SL_IEC60730_CRC_INPUTU16(crc, d)   GPCRC_InputU16(crc, d)
     Writes a 32-bit value to the input data register of the CRC.
     
    +#define SL_IEC60730_CRC_INPUTU8(crc, d)   GPCRC_InputU8(crc, d)
     Writes a 8-bit value to the input data register of the CRC.
     
    +#define SL_IEC60730_CRC_DATA_READ(crc)   GPCRC_DataRead(crc)
     Reads the data register of the CRC.
     
    +#define SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(crc)   GPCRC_DataReadBitReversed(crc)
     Reads the data register of the CRC.
     
    +#define SL_IEC60730_CRC_DATA_READ_BYTE_REVERSED(crc)   GPCRC_DataReadByteReversed(crc)
     Reads the data register of the CRC.
     
    #define SL_IEC60730_DEFAULT_GPRC
     
    #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST   "123456789"
     
    #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE
     
    #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT
     
    #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT
     
    #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT
     
    #define SL_IEC60730_VMC_POST_ENTER_CRITICAL()
     Enter ATOMIC section of VMC Post. More...
     
    +#define SL_IEC60730_VMC_POST_EXIT_CRITICAL()   CORE_EXIT_CRITICAL()
     Exit ATOMIC section of VMC Post.
     
    #define SL_IEC60730_VMC_BIST_ENTER_CRITICAL()
     Enter ATOMIC section of VMC Bist. More...
     
    +#define SL_IEC60730_VMC_BIST_EXIT_CRITICAL()   CORE_EXIT_CRITICAL()
     Exit ATOMIC section of VMC Bist.
     
    + + + + + + + + + + +

    +Typedefs

    +typedef GPCRC_TypeDef sl_iec60730_crc_typedef
     the General Purpose Cyclic Redundancy Check (GPCRC) module
     
    +typedef GPCRC_Init_TypeDef sl_iec60730_crc_init_typedef
     CRC initialization structure.
     
    +typedef uint8_t sl_iec60730_read_type_t
     The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer.
     
    + + + + + + + + + + + + + +

    +Enumerations

    enum  sl_iec60730_test_result_t { SL_IEC60730_TEST_FAILED = 0, +SL_IEC60730_TEST_PASSED = 1, +SL_IEC60730_TEST_IN_PROGRESS = 2 + }
     The result of a test. More...
     
    enum  sl_iec60730_test_failure_t {
    +  SL_IEC60730_NO_FAILURE = 0, +SL_IEC60730_TEST_VERIFY = 1, +SL_IEC60730_WATCHDOG_POST_FAIL = 2, +SL_IEC60730_VMC_FAIL = 3, +
    +  SL_IEC60730_IMC_FAIL = 4, +SL_IEC60730_CPU_REGISTERS_FAIL = 5, +SL_IEC60730_CLOCK_FAIL = 6, +SL_IEC60730_INTERRUPT_FAIL = 7, +
    +  SL_IEC60730_PROGRAM_COUNTER_FAIL = 8, +SL_IEC60730_GPIO_FAIL = 9, +SL_IEC60730_ANALOG_FAIL = 10, +SL_IEC60730_CS0_FAIL = 11, +
    +  SL_IEC60730_LESENSE0_FAIL = 12, +SL_IEC60730_RADIO_FAIL = 13, +SL_IEC60730_I2C0_FAIL = 14, +SL_IEC60730_I2C1_FAIL = 15, +
    +  SL_IEC60730_USART0_FAIL = 16, +SL_IEC60730_USART1_FAIL = 17, +SL_IEC60730_USART2_FAIL = 18, +SL_IEC60730_USART3_FAIL = 19, +
    +  SL_IEC60730_LEUART0_FAIL = 20, +SL_IEC60730_EUART0_FAIL = 21, +SL_IEC60730_PDM0_FAIL = 22, +SL_IEC60730_OEM_FAIL_1 = 23, +
    +  SL_IEC60730_OEM_FAIL_2 = 24, +SL_IEC60730_OEM_FAIL_3 = 25, +SL_IEC60730_OEM_FAIL_4 = 26, +SL_IEC60730_SAFETY_CHECK_FAIL = 0XFF +
    + }
     Cause of failure passed to Safe State function. More...
     
    enum  sl_iec60730_timer_test_control_t { SL_IEC60730_TIMER_TEST_DISABLE = 0, +SL_IEC60730_TIMER_TEST_ENABLE = 1 + }
     Enable/disable switch for system timer test. More...
     
    enum  { SL_IEC60730_IMC_DATA_READ = 0, +SL_IEC60730_IMC_DATA_READ_BIT_REVERSED, +SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED + }
     The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void sl_iec60730_safe_state (sl_iec60730_test_failure_t failure)
     
    void sl_iec60730_post (void)
     
    void sl_iec60730_safety_check_error_occur (sl_iec60730_test_failure_t failure)
     
    void sl_iec60730_safety_check_reset_error (void)
     
    sl_iec60730_safety_check_t * sl_iec60730_safety_check_get_error (void)
     
    void sl_iec60730_bist (void)
     
    void sl_iec60730_restart_watchdogs (void)
     
    void sl_iec60730_sys_clock_count_tick (void)
     
    void sl_iec60730_test_clock_tick (void)
     
    void sl_iec60730_sys_clock_count_reset (void)
     
    void sl_iec60730_imc_init (sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config)
     
    sl_iec60730_test_result_t sl_iec60730_update_crc_with_data_buffer (sl_iec60730_update_crc_params_t *params, sl_iec60730_crc_t *crc, uint8_t *buffer, uint32_t size)
     
    void sl_iec60730_vmc_init (sl_iec60730_vmc_test_multiple_regions_t *test_config)
     
    + + + + + + + + +

    +Variables

    +const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION
     Global variable which holds the IEC60370 library version.
     
    sl_iec60730_crc_t check_sum
     
    uint16_t sl_iec60730_program_counter_check
     
    +

    Detailed Description

    +

    Library definitions.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +

    Macro Definition Documentation

    + +

    ◆ SL_IEC60730_BOARD_HEADER

    + +
    +
    + + + + +
    #define SL_IEC60730_BOARD_HEADER
    +
    +

    User SHOULD define SL_IEC60730_BOARD_HEADER definition for using IMC and VMC modules. This definition SHOULD be a header file. In this header file SHOULD be definitions listed in IMC and VMC modules. In our example we defined the SL_IEC60730_BOARD_HEADER definition is sl_iec60730_board.h. Our definitions in SL_IEC60730_BOARD_HEADER is an example that you can reference. Of course, user CAN redefine the SL_IEC60730_BOARD_HEADER definition to any header file.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730_8h_source.html new file mode 100644 index 00000000..4f686521 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730_8h_source.html @@ -0,0 +1,647 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_H
    +
    19 #define SL_IEC60730_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730_config.h"
    +
    26 #include "sl_iec60730_toolchain.h"
    +
    27 #include "em_device.h"
    +
    28 #include "em_core.h"
    +
    29 #include "em_gpcrc.h"
    +
    30 #include SL_IEC60730_BOARD_HEADER
    +
    31 
    +
    32 #define IE60730_LIBRARY_VERSION { 2, 0, 0 }
    +
    33 
    +
    34 #ifdef DOXYGEN
    +
    35 #define SL_IEC60730_BOARD_HEADER
    +
    42 
    +
    43 #else
    +
    44 #define IEC60370_CM4 0
    +
    45 #define IEC60370_CM33 1
    +
    46 #if defined(__CM4_REV)
    +
    47 #define IEC60370_CPU IEC60370_CM4
    +
    48 #elif defined(__CM33_REV)
    +
    49 #define IEC60370_CPU IEC60370_CM33
    +
    50 #else
    +
    51 #error "Unknown Core type!"
    +
    52 #endif
    +
    53 
    +
    54 #endif /* DOXYGEN */
    +
    55 
    +
    56 /**************************************************************************/
    +
    62 typedef struct {
    +
    63  uint8_t major;
    +
    64  uint8_t minor;
    +
    65  uint8_t revision;
    +
    66 } sl_iec60730_library_version_t;
    +
    67 
    +
    69 extern const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION;
    +
    70 
    +
    72 typedef enum {
    +
    73  SL_IEC60730_TEST_FAILED = 0,
    +
    74  SL_IEC60730_TEST_PASSED = 1,
    +
    75  SL_IEC60730_TEST_IN_PROGRESS = 2,
    +
    76 } sl_iec60730_test_result_t;
    +
    77 
    +
    79 typedef enum {
    +
    80  SL_IEC60730_NO_FAILURE = 0,
    +
    81  SL_IEC60730_TEST_VERIFY = 1,
    +
    82  SL_IEC60730_WATCHDOG_POST_FAIL = 2,
    +
    83  SL_IEC60730_VMC_FAIL = 3,
    +
    84  SL_IEC60730_IMC_FAIL = 4,
    +
    85  SL_IEC60730_CPU_REGISTERS_FAIL = 5,
    +
    86  SL_IEC60730_CLOCK_FAIL = 6,
    +
    87  SL_IEC60730_INTERRUPT_FAIL = 7,
    +
    88  SL_IEC60730_PROGRAM_COUNTER_FAIL = 8,
    +
    89  SL_IEC60730_GPIO_FAIL = 9,
    +
    90  SL_IEC60730_ANALOG_FAIL = 10,
    +
    91  SL_IEC60730_CS0_FAIL = 11,
    +
    92  SL_IEC60730_LESENSE0_FAIL = 12,
    +
    93  SL_IEC60730_RADIO_FAIL = 13,
    +
    94  SL_IEC60730_I2C0_FAIL = 14,
    +
    95  SL_IEC60730_I2C1_FAIL = 15,
    +
    96  SL_IEC60730_USART0_FAIL = 16,
    +
    97  SL_IEC60730_USART1_FAIL = 17,
    +
    98  SL_IEC60730_USART2_FAIL = 18,
    +
    99  SL_IEC60730_USART3_FAIL = 19,
    +
    100  SL_IEC60730_LEUART0_FAIL = 20,
    +
    101  SL_IEC60730_EUART0_FAIL = 21,
    +
    102  SL_IEC60730_PDM0_FAIL = 22,
    +
    103  SL_IEC60730_OEM_FAIL_1 = 23,
    +
    104  SL_IEC60730_OEM_FAIL_2 = 24,
    +
    105  SL_IEC60730_OEM_FAIL_3 = 25,
    +
    106  SL_IEC60730_OEM_FAIL_4 = 26,
    +
    107  SL_IEC60730_SAFETY_CHECK_FAIL = 0XFF,
    +
    108 } sl_iec60730_test_failure_t;
    +
    109 
    +
    112 #ifndef UNUSED_VAR
    +
    113 #define UNUSED_VAR(x) (void) (x)
    +
    114 #endif /* UNUSED_VAR */
    +
    115 
    +
    117 #ifndef __CONCAT
    +
    118 #define __CONCAT(x, y) x##y
    +
    119 #endif
    +
    120 
    +
    121 #define CONCAT(x, y) __CONCAT(x, y)
    +
    122 
    +
    124 #define STR(x) #x
    +
    125 #define XSTR(x) STR(x)
    +
    126 
    +
    129 #ifndef LABEL_DEF
    +
    130 #define LABEL_DEF(NAME) LB_ASM volatile(LB_XSTR(NAME))
    +
    131 #endif /* LABEL_DEF */
    +
    132 
    +
    133 #ifdef DOXYGEN
    +
    134 #define __no_init
    +
    137 #else // !DOXYGEN
    +
    138 #ifndef __no_init
    +
    139 #define __no_init
    +
    140 #endif /* __no_init */
    +
    141 #endif // DOXYGEN
    +
    142 
    +
    145 #define DEC_CLASSB_VARS(vartype, name) \
    +
    146  __no_init vartype name __CLASSB_RAM; \
    +
    147  __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
    +
    148 
    +
    151 #define EXTERN_DEC_CLASSB_VARS(vartype, name) \
    +
    152  extern __no_init vartype name __CLASSB_RAM; \
    +
    153  extern __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
    +
    154 
    +
    157 #define sl_static_dec_classb_vars(vartype, name) \
    +
    158  static __no_init vartype name __CLASSB_RAM; \
    +
    159  static __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
    +
    160 
    +
    163 #define INV_CLASSB_VAR(vartype, name) \
    +
    164  CONCAT(name, _inv) = (vartype) (~(vartype) name)
    +
    165 
    +
    168 #define INV_CLASSB_PVAR(vartype, name) \
    +
    169  CONCAT(name, _inv) = (vartype *) (~(vartype) name)
    +
    170 
    +
    171 #if ((defined UNIT_TEST_IEC60730_VARIABLE_MEMORY_ENABLE) || defined (UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE))
    +
    172 #define CHECK_INTEGRITY(vartype, x) unit_test_mock_check_integrity()
    +
    173 #else
    +
    174 #define CHECK_INTEGRITY(vartype, x) \
    +
    177  ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, _inv)))
    +
    178 #endif // (UNIT_TEST_IEC60730_VARIABLE_MEMORY_ENABLE || UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE)
    +
    179 
    +
    182 /**************************************************************************/
    +
    187 #ifdef DOXYGEN
    +
    188 #define sl_iec60730_crc_t
    +
    192 
    +
    196 #define SL_IEC60730_INVAR_BLOCKS_PER_BIST
    +
    197 
    +
    198 #else // !DOXYGEN
    +
    199 
    +
    200 #if (SL_IEC60730_USE_CRC_32_ENABLE == 1)
    +
    201 typedef uint32_t sl_iec60730_crc_t;
    +
    203 #else /* !SL_IEC60730_USE_CRC_32_ENABLE */
    +
    204 typedef uint16_t sl_iec60730_crc_t;
    +
    206 #endif /* SL_IEC60730_USE_CRC_32_ENABLE */
    +
    207 
    +
    208 #endif // DOXYGEN
    +
    209 
    +
    213 extern sl_iec60730_crc_t check_sum;
    +
    214 
    +
    217 #define SL_IEC60730_ROM_SIZE ((uint32_t) SL_IEC60730_ROM_END - (uint32_t) SL_IEC60730_ROM_START)
    +
    218 
    +
    221 #define STEPS_NUMBER ((uint32_t) SL_IEC60730_ROM_SIZE / SL_IEC60730_FLASH_BLOCK)
    +
    222 
    +
    225 #define SL_IEC60730_ROM_SIZE_INWORDS ((uint32_t) SL_IEC60730_ROM_SIZE / 4U)
    +
    226 
    +
    229 #define SL_IEC60730_FLASH_BLOCK_WORDS ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS / STEPS_NUMBER))
    +
    230 
    +
    234 #define SL_IEC60730_ROM_SIZE_TEST(start, end) \
    +
    235  ((uint32_t) end - (uint32_t) start)
    +
    236 
    +
    239 #define STEPS_NUMBER_TEST(start, end) \
    +
    240  ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / SL_IEC60730_FLASH_BLOCK)
    +
    241 
    +
    244 #define SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / 4U)
    +
    245 
    +
    248 #define SL_IEC60730_FLASH_BLOCK_WORDS_TEST(start, end) ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) / STEPS_NUMBER_TEST(start, end)))
    +
    249 
    +
    253 #ifndef SL_IEC60730_REF_CRC
    +
    254 #define SL_IEC60730_REF_CRC (check_sum)
    +
    255 #endif
    +
    256 
    +
    259 /**************************************************************************/
    +
    264 #define BLOCKSIZE (4)
    +
    267 
    +
    272 #define RT_BLOCK_OVERLAP (1)
    +
    273 
    +
    276 #define RT_BLOCKSIZE (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
    +
    277 
    +
    283 #ifndef BACKGROUND
    +
    284 #define BACKGROUND ((uint32_t) 0x00000000uL)
    +
    285 #endif
    +
    286 
    +
    289 /**************************************************************************/
    +
    301 /**************************************************************************/
    +
    314 void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure);
    +
    317 /**************************************************************************/
    +
    322 extern uint16_t sl_iec60730_program_counter_check;
    +
    330 
    +
    332 #define IEC60730_VMC_COMPLETE (1 << 0)
    +
    333 #define IEC60730_IMC_COMPLETE (1 << 1)
    +
    335 #define IEC60730_CPU_CLOCKS_COMPLETE (1 << 2)
    +
    337 #define IEC60730_CPU_REGS_COMPLETE (1 << 3)
    +
    339 #define IEC60730_INTERRUPT_COMPLETE (1 << 4)
    +
    341 #define IEC60730_GPIO_COMPLETE (1 << 5)
    +
    343 #define IEC60730_ANALOG_COMPLETE (1 << 6)
    +
    345 #define IEC60730_COMMS_COMPLETE (1 << 7)
    +
    347 #define IEC60730_OEM0_COMPLETE (1 << 8)
    +
    349 #define IEC60730_OEM1_COMPLETE (1 << 9)
    +
    351 #define IEC60730_OEM2_COMPLETE (1 << 10)
    +
    353 #define IEC60730_OEM3_COMPLETE (1 << 11)
    +
    355 #define IEC60730_OEM4_COMPLETE (1 << 12)
    +
    357 #define IEC60730_OEM5_COMPLETE (1 << 13)
    +
    359 #define IEC60730_OEM6_COMPLETE (1 << 14)
    +
    361 #define IEC60730_OEM7_COMPLETE (1 << 15)
    +
    363 #define IEC60730_ALL_COMPLETE_BITS \
    +
    365  (IEC60730_VMC_COMPLETE | IEC60730_IMC_COMPLETE \
    +
    366  | IEC60730_CPU_CLOCKS_COMPLETE | IEC60730_CPU_REGS_COMPLETE \
    +
    367  | IEC60730_INTERRUPT_COMPLETE | IEC60730_GPIO_COMPLETE \
    +
    368  | IEC60730_ANALOG_COMPLETE | IEC60730_COMMS_COMPLETE \
    +
    369  | IEC60730_OEM0_COMPLETE | IEC60730_OEM1_COMPLETE | IEC60730_OEM2_COMPLETE \
    +
    370  | IEC60730_OEM3_COMPLETE | IEC60730_OEM4_COMPLETE | IEC60730_OEM5_COMPLETE \
    +
    371  | IEC60730_OEM6_COMPLETE | IEC60730_OEM7_COMPLETE)
    +
    372 
    +
    375 /**************************************************************************/
    +
    386 /**************************************************************************/
    +
    394 void sl_iec60730_post(void);
    +
    397 /**************************************************************************/
    +
    420 typedef struct {
    +
    426  uint32_t error;
    +
    427  uint8_t number_error;
    +
    428 } sl_iec60730_safety_check_t;
    +
    429 
    +
    430 /**************************************************************************/
    +
    440 void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure);
    +
    441 
    +
    442 /**************************************************************************/
    +
    450 void sl_iec60730_safety_check_reset_error(void);
    +
    451 
    +
    452 /**************************************************************************/
    +
    461 sl_iec60730_safety_check_t* sl_iec60730_safety_check_get_error(void);
    +
    462 
    +
    463 /**************************************************************************/
    +
    475 void sl_iec60730_bist(void);
    +
    478 /**************************************************************************/
    +
    483 /**************************************************************************/
    +
    492 void sl_iec60730_restart_watchdogs(void);
    +
    493 
    +
    496 /**************************************************************************/
    +
    501 typedef enum {
    +
    503  SL_IEC60730_TIMER_TEST_DISABLE = 0,
    +
    504  SL_IEC60730_TIMER_TEST_ENABLE = 1,
    +
    505 } sl_iec60730_timer_test_control_t;
    +
    506 
    +
    529 
    +
    530 /**************************************************************************/
    +
    540 void sl_iec60730_sys_clock_count_tick(void);
    +
    541 
    +
    542 /**************************************************************************/
    +
    552 void sl_iec60730_test_clock_tick(void);
    +
    553 
    +
    554 /**************************************************************************/
    +
    564 void sl_iec60730_sys_clock_count_reset(void);
    +
    565 
    +
    568 /**************************************************************************/
    +
    573 #define IEC60730_MAX_IRQ_CHECK 32
    +
    577 
    +
    580 typedef struct {
    +
    581  SL_IEC60730_IRQ_TYPE_VARIABLE
    +
    582  min;
    +
    583  SL_IEC60730_IRQ_TYPE_VARIABLE
    +
    584  max;
    +
    585 } sl_iec60730_irq_execution_bounds_t;
    +
    586 
    +
    589 // registered to check.
    +
    590 typedef struct {
    +
    591  uint32_t irq_fail;
    +
    592  uint8_t num_irq_fail;
    +
    593 } sl_iec60730_irq_fail_t;
    +
    594 
    +
    611 typedef struct {
    +
    612  volatile SL_IEC60730_IRQ_TYPE_VARIABLE* irq_count;
    +
    613  const sl_iec60730_irq_execution_bounds_t* irq_bounds;
    +
    614  uint8_t size;
    +
    615 }sl_iec60730_irq_cfg_t;
    +
    618 /**************************************************************************/
    +
    623 #define SL_IEC60370_ENTER_ATOMIC() CORE_ENTER_ATOMIC()
    +
    625 #define SL_IEC60370_EXIT_ATOMIC() CORE_EXIT_ATOMIC()
    +
    627 #define SL_IEC60370_DECLARE_IRQ_STATE CORE_DECLARE_IRQ_STATE;
    +
    629 
    +
    631 #define SL_IEC60730_IMC_POST_ENTER_ATOMIC() \
    +
    632  CORE_DECLARE_IRQ_STATE; \
    +
    633  CORE_ENTER_ATOMIC()
    +
    634 
    +
    636 #define SL_IEC60730_IMC_POST_EXIT_ATOMIC() CORE_EXIT_ATOMIC()
    +
    637 
    +
    639 #define SL_IEC60730_IMC_BIST_ENTER_ATOMIC() \
    +
    640  CORE_DECLARE_IRQ_STATE; \
    +
    641  CORE_ENTER_ATOMIC()
    +
    642 
    +
    644 #define SL_IEC60730_IMC_BIST_EXIT_ATOMIC() CORE_EXIT_ATOMIC()
    +
    645 
    +
    647 #define SL_IEC60730_CRC_INIT(crc, init) GPCRC_Init(crc, init)
    +
    648 #define SL_IEC60730_CRC_RESET(crc) GPCRC_Reset(crc)
    +
    650 #define SL_IEC60730_CRC_START(crc) GPCRC_Start(crc)
    +
    652 #define SL_IEC60730_CRC_INPUTU32(crc, d) GPCRC_InputU32(crc, d)
    +
    654 #define SL_IEC60730_CRC_INPUTU16(crc, d) GPCRC_InputU16(crc, d)
    +
    656 #define SL_IEC60730_CRC_INPUTU8(crc, d) GPCRC_InputU8(crc, d)
    +
    658 #define SL_IEC60730_CRC_DATA_READ(crc) GPCRC_DataRead(crc)
    +
    660 #define SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(crc) GPCRC_DataReadBitReversed(crc)
    +
    662 #define SL_IEC60730_CRC_DATA_READ_BYTE_REVERSED(crc) GPCRC_DataReadByteReversed(crc)
    +
    664 
    +
    665 // CRC
    +
    667 typedef GPCRC_TypeDef sl_iec60730_crc_typedef;
    +
    669 typedef GPCRC_Init_TypeDef sl_iec60730_crc_init_typedef;
    +
    670 
    +
    672 typedef uint8_t sl_iec60730_read_type_t;
    +
    674 enum {
    +
    675  SL_IEC60730_IMC_DATA_READ = 0,
    +
    676  SL_IEC60730_IMC_DATA_READ_BIT_REVERSED =
    +
    677  1,
    +
    678  SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED =
    +
    679  2,
    +
    680 };
    +
    681 
    +
    683 typedef struct {
    +
    684  sl_iec60730_crc_typedef *gpcrc;
    +
    685 } sl_iec60730_imc_params_t;
    +
    686 
    +
    690 typedef struct {
    +
    691 #if (SL_IEC60730_CRC_USE_SW_ENABLE == 0)
    +
    692  sl_iec60730_imc_params_t hal;
    +
    693  sl_iec60730_crc_init_typedef init;
    +
    694  sl_iec60730_read_type_t readType;
    +
    695 #endif /* SL_IEC60730_CRC_USE_SW_ENABLE */
    +
    696  sl_iec60730_crc_t xorOut;
    +
    697 } sl_iec60730_update_crc_params_t;
    +
    698 
    +
    700 typedef struct {
    +
    701  uint32_t *start;
    +
    702  uint32_t *end;
    +
    703 } sl_iec60730_imc_test_region_t;
    +
    704 
    +
    708 typedef struct {
    +
    709  const sl_iec60730_imc_test_region_t *region;
    +
    710  uint8_t number_of_test_regions;
    +
    711 } sl_iec60730_imc_test_multiple_regions_t;
    +
    712 
    +
    713 #ifdef DOXYGEN
    +
    714 #define SL_IEC60730_DEFAULT_GPRC
    +
    718 #else
    +
    719 #ifndef SL_IEC60730_DEFAULT_GPRC
    +
    720 #if (_SILICON_LABS_32B_SERIES == 2)
    +
    721 #if ((defined SL_IEC60730_NON_SECURE_ENABLE) || (!defined(SL_TRUSTZONE_SECURE)))
    +
    722 #define SL_IEC60730_DEFAULT_GPRC GPCRC_NS
    +
    724 #else
    +
    725 #define SL_IEC60730_DEFAULT_GPRC GPCRC
    +
    727 #endif
    +
    728 #else // (_SILICON_LABS_32B_SERIES == 2)
    +
    729 #define SL_IEC60730_DEFAULT_GPRC GPCRC
    +
    731 #endif // (_SILICON_LABS_32B_SERIES == 2)
    +
    732 #endif // !SL_IEC60730_DEFAULT_GPRC
    +
    733 #endif // DOXYGEN
    +
    734 
    +
    737 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST "123456789"
    +
    738 
    +
    739 #ifdef DOXYGEN
    +
    740 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE
    +
    745 
    +
    750 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT
    +
    751 
    +
    756 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT
    +
    757 
    +
    760 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT
    +
    761 
    +
    762 #else
    +
    763 
    +
    764 #if (SL_IEC60730_CRC_USE_SW_ENABLE == 1)
    +
    765 #if (SL_IEC60730_USE_CRC_32_ENABLE == 1)
    +
    766 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE
    +
    767 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0xFFFFFFFFuL)
    +
    768 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0xCBF43926)
    +
    769 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT { SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT }
    +
    770 #else /* !SL_IEC60730_USE_CRC_32_ENABLE */
    +
    771 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE
    +
    772 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0x0000)
    +
    773 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0x31C3)
    +
    774 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT { SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT }
    +
    775 #endif /* SL_IEC60730_USE_CRC_32_ENABLE */
    +
    776 #else /* !SL_IEC60730_CRC_USE_SW_ENABLE */
    +
    777 #if (SL_IEC60730_USE_CRC_32_ENABLE == 1)
    +
    778 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE
    +
    779 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0xFFFFFFFFuL)
    +
    780 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0xCBF43926)
    +
    781 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT \
    +
    782  { \
    +
    783  0x04C11DB7UL, \
    +
    784  SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE, \
    +
    785  false, \
    +
    786  false, \
    +
    787  false, \
    +
    788  false, \
    +
    789  true, \
    +
    790  }
    +
    791 
    +
    792 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT \
    +
    793  { { SL_IEC60730_DEFAULT_GPRC }, \
    +
    794  SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT, \
    +
    795  SL_IEC60730_IMC_DATA_READ, \
    +
    796  SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT }
    +
    797 #else /* !SL_IEC60730_USE_CRC_32_ENABLE */
    +
    798 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE
    +
    799 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0x0000)
    +
    800 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0x31C3)
    +
    801 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT \
    +
    802  { \
    +
    803  0x1021UL, \
    +
    804  SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE, \
    +
    805  false, \
    +
    806  true, \
    +
    807  false, \
    +
    808  false, \
    +
    809  true, \
    +
    810  }
    +
    811 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT \
    +
    812  { { SL_IEC60730_DEFAULT_GPRC }, \
    +
    813  SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT, \
    +
    814  SL_IEC60730_IMC_DATA_READ_BIT_REVERSED, \
    +
    815  SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT }
    +
    816 #endif /* SL_IEC60730_USE_CRC_32_ENABLE */
    +
    817 #endif /* SL_IEC60730_CRC_USE_SW_ENABLE */
    +
    818 
    +
    819 #endif // DOXYGEN
    +
    820 
    +
    821 /**************************************************************************/
    +
    832 void sl_iec60730_imc_init(sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config);
    +
    833 
    +
    834 /**************************************************************************/
    +
    851 sl_iec60730_test_result_t
    +
    852 sl_iec60730_update_crc_with_data_buffer(sl_iec60730_update_crc_params_t *params,
    +
    853  sl_iec60730_crc_t *crc,
    +
    854  uint8_t *buffer,
    +
    855  uint32_t size);
    +
    856 
    +
    859 /**************************************************************************/
    +
    864 #define SL_IEC60730_VMC_POST_ENTER_CRITICAL() \
    +
    866  CORE_DECLARE_IRQ_STATE; \
    +
    867  CORE_ENTER_CRITICAL()
    +
    868 
    +
    870 #define SL_IEC60730_VMC_POST_EXIT_CRITICAL() CORE_EXIT_CRITICAL()
    +
    871 
    +
    873 #define SL_IEC60730_VMC_BIST_ENTER_CRITICAL() \
    +
    874  CORE_DECLARE_IRQ_STATE; \
    +
    875  CORE_ENTER_CRITICAL()
    +
    876 
    +
    878 #define SL_IEC60730_VMC_BIST_EXIT_CRITICAL() CORE_EXIT_CRITICAL()
    +
    879 
    +
    881 typedef struct {
    +
    882  uint32_t *start;
    +
    883  uint32_t *end;
    +
    884 } sl_iec60730_vmc_test_region_t;
    +
    885 
    +
    887 typedef struct {
    +
    888  const sl_iec60730_vmc_test_region_t *region;
    +
    889  uint8_t number_of_test_regions;
    +
    890 } sl_iec60730_vmc_test_multiple_regions_t;
    +
    891 
    +
    892 /**************************************************************************/
    +
    902 void sl_iec60730_vmc_init(sl_iec60730_vmc_test_multiple_regions_t *test_config);
    +
    903 
    +
    906 #if (_SILICON_LABS_32B_SERIES == 2)
    +
    907 // Write to backup ram module
    +
    908 // buram_inst: Pointer to BURAM instance
    +
    909 // idx: BURAM Reg index
    +
    910 // val: write value
    +
    911 #define SL_IEC60730_BURAM_WRITE(buram_inst, idx, val) \
    +
    912  do { \
    +
    913  buram_inst->RET[idx].REG = val; \
    +
    914  } while (0)
    +
    915 
    +
    916 // Read from backup ram module
    +
    917 // buram_inst: Pointer to BURAM instance
    +
    918 // idx: BURAM Reg index
    +
    919 #define SL_IEC60730_BURAM_READ(buram_inst, idx) (buram_inst->RET[idx].REG)
    +
    920 #endif
    +
    921 
    +
    924 #ifdef __cplusplus
    +
    925 }
    +
    926 #endif /* __cplusplus */
    +
    927 
    +
    928 #endif /* SL_IEC60730_H */
    +
    +
    SL_IEC60730_NO_FAILURE
    @ SL_IEC60730_NO_FAILURE
    No failure detected.
    Definition: sl_iec60730.h:80
    +
    SL_IEC60730_OEM_FAIL_2
    @ SL_IEC60730_OEM_FAIL_2
    OEM defined failure.
    Definition: sl_iec60730.h:104
    +
    sl_iec60730_imc_params_t::gpcrc
    sl_iec60730_crc_typedef * gpcrc
    GPCRC Register.
    Definition: sl_iec60730.h:684
    +
    SL_IEC60730_INTERRUPT_FAIL
    @ SL_IEC60730_INTERRUPT_FAIL
    Interrupt Plausibility Check detected a failure.
    Definition: sl_iec60730.h:87
    +
    sl_iec60730_test_failure_t
    sl_iec60730_test_failure_t
    Cause of failure passed to Safe State function.
    Definition: sl_iec60730.h:79
    +
    sl_iec60730_restart_watchdogs
    void sl_iec60730_restart_watchdogs(void)
    +
    sl_iec60730_update_crc_params_t::readType
    sl_iec60730_read_type_t readType
    The way to read calculated CRC value.
    Definition: sl_iec60730.h:694
    +
    check_sum
    sl_iec60730_crc_t check_sum
    +
    sl_iec60730_imc_test_multiple_regions_t
    Definition: sl_iec60730.h:708
    +
    sl_iec60730_imc_test_region_t
    This structure is used as configuration for IMC testing. The variable contains information about the ...
    Definition: sl_iec60730.h:700
    +
    SL_IEC60730_USART3_FAIL
    @ SL_IEC60730_USART3_FAIL
    USART3 comms channel detected a failure.
    Definition: sl_iec60730.h:99
    +
    sl_iec60730_program_counter_check
    uint16_t sl_iec60730_program_counter_check
    +
    SL_IEC60730_RADIO_FAIL
    @ SL_IEC60730_RADIO_FAIL
    Radio comms detected a failure.
    Definition: sl_iec60730.h:93
    +
    sl_iec60730_irq_execution_bounds_t::max
    SL_IEC60730_IRQ_TYPE_VARIABLE max
    Maximum executed executions of ISR. Can be 0-255, must be greater than or equal to min.
    Definition: sl_iec60730.h:584
    +
    SL_IEC60730_EUART0_FAIL
    @ SL_IEC60730_EUART0_FAIL
    EUART comms channel detected a failure.
    Definition: sl_iec60730.h:101
    +
    sl_iec60730_update_crc_params_t::init
    sl_iec60730_crc_init_typedef init
    CRC initialization structure.
    Definition: sl_iec60730.h:693
    +
    sl_iec60730_safety_check_t
    Definition: sl_iec60730.h:425
    +
    SL_IEC60730_LESENSE0_FAIL
    @ SL_IEC60730_LESENSE0_FAIL
    LESENSE0 detected a failure.
    Definition: sl_iec60730.h:92
    +
    sl_iec60730_timer_test_control_t
    sl_iec60730_timer_test_control_t
    Enable/disable switch for system timer test.
    Definition: sl_iec60730.h:502
    +
    sl_iec60730_library_version_t::minor
    uint8_t minor
    Minor version.
    Definition: sl_iec60730.h:64
    +
    SL_IEC60730_TIMER_TEST_ENABLE
    @ SL_IEC60730_TIMER_TEST_ENABLE
    timer tests will execute
    Definition: sl_iec60730.h:504
    +
    SL_IEC60730_OEM_FAIL_3
    @ SL_IEC60730_OEM_FAIL_3
    OEM defined failure.
    Definition: sl_iec60730.h:105
    +
    SL_IEC60730_CS0_FAIL
    @ SL_IEC60730_CS0_FAIL
    CSEN0 detected a failureLESENSE.
    Definition: sl_iec60730.h:91
    +
    SL_IEC60730_CLOCK_FAIL
    @ SL_IEC60730_CLOCK_FAIL
    System Clock Check detected a failure.
    Definition: sl_iec60730.h:86
    +
    SL_IEC60730_USART0_FAIL
    @ SL_IEC60730_USART0_FAIL
    USART0 comms channel detected a failure.
    Definition: sl_iec60730.h:96
    +
    sl_iec60730_crc_init_typedef
    GPCRC_Init_TypeDef sl_iec60730_crc_init_typedef
    CRC initialization structure.
    Definition: sl_iec60730.h:669
    +
    sl_iec60730_imc_test_multiple_regions_t::number_of_test_regions
    uint8_t number_of_test_regions
    Number of test regions.
    Definition: sl_iec60730.h:710
    +
    sl_iec60730_safety_check_get_error
    sl_iec60730_safety_check_t * sl_iec60730_safety_check_get_error(void)
    +
    sl_iec60730_vmc_test_multiple_regions_t
    This structure is used as multiple test regions for VMC testing.
    Definition: sl_iec60730.h:887
    +
    SL_IEC60730_TEST_IN_PROGRESS
    @ SL_IEC60730_TEST_IN_PROGRESS
    test is still in progress
    Definition: sl_iec60730.h:75
    +
    sl_iec60730_sys_clock_count_reset
    void sl_iec60730_sys_clock_count_reset(void)
    +
    sl_iec60730_update_crc_params_t
    Definition: sl_iec60730.h:690
    +
    sl_iec60730_crc_typedef
    GPCRC_TypeDef sl_iec60730_crc_typedef
    the General Purpose Cyclic Redundancy Check (GPCRC) module
    Definition: sl_iec60730.h:667
    +
    sl_iec60730_library_version_t
    Definition: sl_iec60730.h:62
    +
    sl_iec60730_vmc_init
    void sl_iec60730_vmc_init(sl_iec60730_vmc_test_multiple_regions_t *test_config)
    +
    sl_iec60730_read_type_t
    uint8_t sl_iec60730_read_type_t
    The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer.
    Definition: sl_iec60730.h:672
    +
    sl_iec60730_vmc_test_region_t::start
    uint32_t * start
    Start address of RAM to check.
    Definition: sl_iec60730.h:882
    +
    sl_iec60730_vmc_test_region_t::end
    uint32_t * end
    End address of RAM to check.
    Definition: sl_iec60730.h:883
    +
    SL_IEC60730_PDM0_FAIL
    @ SL_IEC60730_PDM0_FAIL
    PDM comms channel detected a failure.
    Definition: sl_iec60730.h:102
    +
    sl_iec60730_crc_t
    #define sl_iec60730_crc_t
    Definition: sl_iec60730.h:191
    +
    sl_iec60730_library_version_t::major
    uint8_t major
    Major version.
    Definition: sl_iec60730.h:63
    +
    SL_IEC60730_I2C1_FAIL
    @ SL_IEC60730_I2C1_FAIL
    I2C1 comms channel detected a failure.
    Definition: sl_iec60730.h:95
    +
    sl_iec60730_test_clock_tick
    void sl_iec60730_test_clock_tick(void)
    +
    SL_IEC60730_IMC_DATA_READ
    @ SL_IEC60730_IMC_DATA_READ
    use function GPCRC_DataRead to read CRC
    Definition: sl_iec60730.h:675
    +
    sl_iec60730_irq_execution_bounds_t
    Definition: sl_iec60730.h:580
    +
    sl_iec60730_sys_clock_count_tick
    void sl_iec60730_sys_clock_count_tick(void)
    +
    SL_IEC60730_WATCHDOG_POST_FAIL
    @ SL_IEC60730_WATCHDOG_POST_FAIL
    Watchdog POST test failed.
    Definition: sl_iec60730.h:82
    +
    sl_iec60730_library_version_t::revision
    uint8_t revision
    Revision.
    Definition: sl_iec60730.h:65
    +
    SL_IEC60730_USART1_FAIL
    @ SL_IEC60730_USART1_FAIL
    USART1 comms channel detected a failure.
    Definition: sl_iec60730.h:97
    +
    sl_iec60730_bist
    void sl_iec60730_bist(void)
    +
    SL_IEC60730_VMC_FAIL
    @ SL_IEC60730_VMC_FAIL
    Variable Memory Check detected a failure.
    Definition: sl_iec60730.h:83
    +
    SL_IEC60730_OEM_FAIL_1
    @ SL_IEC60730_OEM_FAIL_1
    OEM defined failure.
    Definition: sl_iec60730.h:103
    +
    SL_IEC60730_IMC_DATA_READ_BIT_REVERSED
    @ SL_IEC60730_IMC_DATA_READ_BIT_REVERSED
    use function GPCRC_DataReadBitReversed to read CRC
    Definition: sl_iec60730.h:676
    +
    SL_IEC60730_TEST_VERIFY
    @ SL_IEC60730_TEST_VERIFY
    Special case used for automated verification testing.
    Definition: sl_iec60730.h:81
    +
    sl_iec60730_irq_execution_bounds_t::min
    SL_IEC60730_IRQ_TYPE_VARIABLE min
    Minimum expected executions of ISR. Can be 0-255, must be less than or equal to max.
    Definition: sl_iec60730.h:582
    +
    SL_IEC60730_IRQ_TYPE_VARIABLE
    #define SL_IEC60730_IRQ_TYPE_VARIABLE
    Data type for iec60730_IRQExecCount variables.
    Definition: sl_iec60730_config.h:38
    +
    SL_IEC60730_TIMER_TEST_DISABLE
    @ SL_IEC60730_TIMER_TEST_DISABLE
    timer tests will not execute
    Definition: sl_iec60730.h:503
    +
    SL_IEC60730_TEST_FAILED
    @ SL_IEC60730_TEST_FAILED
    test result failed
    Definition: sl_iec60730.h:73
    +
    sl_iec60730_vmc_test_region_t
    This structure is used as configuration for VMC testing.
    Definition: sl_iec60730.h:881
    +
    sl_iec60730_irq_fail_t
    Definition: sl_iec60730.h:590
    +
    sl_iec60730_irq_cfg_t
    Definition: sl_iec60730.h:611
    +
    sl_iec60730_post
    void sl_iec60730_post(void)
    +
    sl_iec60730_vmc_test_multiple_regions_t::number_of_test_regions
    uint8_t number_of_test_regions
    Number of test regions.
    Definition: sl_iec60730.h:889
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    SL_IEC60730_OEM_FAIL_4
    @ SL_IEC60730_OEM_FAIL_4
    OEM defined failure.
    Definition: sl_iec60730.h:106
    +
    sl_iec60730_safety_check_error_occur
    void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure)
    +
    SL_IEC60730_IMC_FAIL
    @ SL_IEC60730_IMC_FAIL
    Invariable Memory Check detected a failure.
    Definition: sl_iec60730.h:84
    +
    SL_IEC60730_CPU_REGISTERS_FAIL
    @ SL_IEC60730_CPU_REGISTERS_FAIL
    CPU Registers Check detected a failure.
    Definition: sl_iec60730.h:85
    +
    sl_iec60730_update_crc_params_t::hal
    sl_iec60730_imc_params_t hal
    struct sl_iec60730_imc_params_t that contain GPCRC Register
    Definition: sl_iec60730.h:692
    +
    sl_iec60730_update_crc_params_t::xorOut
    sl_iec60730_crc_t xorOut
    XOR with calculated CRC value.
    Definition: sl_iec60730.h:696
    +
    SL_IEC60730_LIBRARY_VERSION
    const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION
    Global variable which holds the IEC60370 library version.
    +
    SL_IEC60730_LEUART0_FAIL
    @ SL_IEC60730_LEUART0_FAIL
    LEUART comms channel detected a failure.
    Definition: sl_iec60730.h:100
    +
    sl_iec60730_safe_state
    void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure)
    +
    SL_IEC60730_TEST_PASSED
    @ SL_IEC60730_TEST_PASSED
    test result passed
    Definition: sl_iec60730.h:74
    +
    SL_IEC60730_GPIO_FAIL
    @ SL_IEC60730_GPIO_FAIL
    GPIO Plausibility Check detected a failure.
    Definition: sl_iec60730.h:89
    +
    sl_iec60730_imc_test_region_t::start
    uint32_t * start
    Start address of FLASH to check.
    Definition: sl_iec60730.h:701
    +
    SL_IEC60730_SAFETY_CHECK_FAIL
    @ SL_IEC60730_SAFETY_CHECK_FAIL
    iec60730_safety_check detected some failure
    Definition: sl_iec60730.h:107
    +
    SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED
    @ SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED
    use function GPCRC_DataReadByteReversed to read CRC
    Definition: sl_iec60730.h:678
    +
    sl_iec60730_imc_test_region_t::end
    uint32_t * end
    End address of FLASH to check.
    Definition: sl_iec60730.h:702
    +
    sl_iec60730_toolchain.h
    Compiler abstraction.
    +
    sl_iec60730_imc_params_t
    This structure is used as configuration for IMC testing, that holds GPCRC Register.
    Definition: sl_iec60730.h:683
    +
    sl_iec60730_imc_init
    void sl_iec60730_imc_init(sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config)
    +
    sl_iec60730_update_crc_with_data_buffer
    sl_iec60730_test_result_t sl_iec60730_update_crc_with_data_buffer(sl_iec60730_update_crc_params_t *params, sl_iec60730_crc_t *crc, uint8_t *buffer, uint32_t size)
    +
    SL_IEC60730_ANALOG_FAIL
    @ SL_IEC60730_ANALOG_FAIL
    Analog Plausibility Check detected a failure.
    Definition: sl_iec60730.h:90
    +
    SL_IEC60730_USART2_FAIL
    @ SL_IEC60730_USART2_FAIL
    USART2 comms channel detected a failure.
    Definition: sl_iec60730.h:98
    +
    sl_iec60730_config.h
    Library configuration.
    +
    SL_IEC60730_PROGRAM_COUNTER_FAIL
    @ SL_IEC60730_PROGRAM_COUNTER_FAIL
    Program Counter Check detected a failure.
    Definition: sl_iec60730.h:88
    +
    sl_iec60730_safety_check_reset_error
    void sl_iec60730_safety_check_reset_error(void)
    +
    SL_IEC60730_I2C0_FAIL
    @ SL_IEC60730_I2C0_FAIL
    I2C0 comms channel detected a failure.
    Definition: sl_iec60730.h:94
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__board_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__board_8h_source.html new file mode 100644 index 00000000..25666203 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__board_8h_source.html @@ -0,0 +1,139 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_board.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730_board.h
    +
    +
    +
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_BOARD_H
    +
    19 #define SL_IEC60730_BOARD_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 // Standard libraries
    +
    26 #include <stdbool.h>
    +
    27 #include <stdint.h>
    +
    28 #include <stddef.h>
    +
    29 
    +
    30 /**************************************************************************/
    +
    37 /* Invariable Memory */
    +
    39 extern uint32_t flash_start;
    +
    40 
    +
    57 #ifndef SL_IEC60730_ROM_END
    +
    58 #define SL_IEC60730_ROM_START ((uint32_t *) (&flash_start))
    +
    59 #endif
    +
    60 
    +
    66 #ifndef SL_IEC60730_ROM_END
    +
    67 #define SL_IEC60730_ROM_END ((uint32_t *) (&check_sum))
    +
    68 #endif
    +
    69 
    +
    72 /**************************************************************************/
    +
    77 /* Variable Memory */
    +
    78 extern uint32_t classb_start;
    +
    79 extern uint32_t classb_end;
    +
    80 extern uint32_t __StackTop;
    +
    81 extern uint32_t ram_start;
    +
    82 extern uint32_t class_b_limit;
    +
    83 
    +
    84 #if defined(__GNUC__)
    +
    85 extern uint32_t stack_check;
    +
    86 #define STACK_CHECK ((uint32_t *) (&stack_check))
    +
    87 #elif defined(__ICCARM__)
    +
    88 #pragma section = ".stack_bottom"
    +
    89 #define STACK_CHECK __section_begin(".stack_bottom")
    +
    90 #else // unknown toolchain
    +
    91 #error Unrecognized toolchain in sl_iec60730_toolchain.h
    +
    92 #endif
    +
    93 
    +
    95 #define RAM_START ((uint32_t *) (&ram_start))
    +
    96 #define RAM_END ((uint32_t *) ((uint32_t) RAM_BACKUP - 1))
    +
    98 #define RAM_BACKUP ((uint32_t *) (&__StackTop))
    +
    100 
    +
    102 #define CLASSB_START ((uint32_t *) (&classb_start))
    +
    103 #define CLASSB_END ((uint32_t *) ((uint32_t) (&class_b_limit) - 1))
    +
    105 
    +
    107 #define RAMTEST_START CLASSB_START
    +
    108 #define RAMTEST_END CLASSB_END
    +
    110 
    +
    114 #ifdef __cplusplus
    +
    115 }
    +
    116 #endif /* __cplusplus */
    +
    117 
    +
    118 #endif /* SL_IEC60730_BOARD_H */
    +
    +
    flash_start
    uint32_t flash_start
    Flash start address.
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__comm_8h.html b/docs/document_api_iec60730_library/sl__iec60730__comm_8h.html new file mode 100644 index 00000000..0f3a689f --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__comm_8h.html @@ -0,0 +1,91 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_comm.h File Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
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    +
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    sl_iec60730_comm.h File Reference
    +
    +
    + +

    Comm check. +More...

    + +

    Go to the source code of this file.

    +

    Detailed Description

    +

    Comm check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__comm_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__comm_8h_source.html new file mode 100644 index 00000000..37009e69 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__comm_8h_source.html @@ -0,0 +1,94 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_comm.h Source File + + + + + + + + + +
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    sl_iec60730_comm.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_COMM_H
    +
    19 #define SL_IEC60730_COMM_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 /**************************************************************************/
    +
    104 #ifdef __cplusplus
    +
    105 }
    +
    106 #endif /* __cplusplus */
    +
    107 
    +
    108 #endif /* SL_IEC60730_COMM_H */
    +
    + +
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    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__config_8h.html b/docs/document_api_iec60730_library/sl__iec60730__config_8h.html new file mode 100644 index 00000000..0bc6b01f --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__config_8h.html @@ -0,0 +1,169 @@ + + + + + + + +Document API IEC60730 Library: lib/config/sl_iec60730_config.h File Reference + + + + + + + + + +
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    Document API IEC60730 Library +
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    sl_iec60730_config.h File Reference
    +
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    Library configuration. +More...

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    Go to the source code of this file.

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    +Macros

    +#define SL_IEC60730_IRQ_TYPE_VARIABLE   uint8_t
     Data type for iec60730_IRQExecCount variables.
     
    +#define SL_IEC60730_IRQ_STATUS_ENABLE   0
     Enable using sl_iec60730_get_irq_index_failed() function to get the value of failed irqs.
     
    +#define SL_IEC60730_WDOG0_ENABLE   1
     Enable Watchdog 0.
     
    +#define SL_IEC60730_WDOG1_ENABLE   0
     Enable Watchdog 1.
     
    +#define SL_IEC60730_SAVE_STAGE_ENABLE   0
     Enable saving iec60730_watchdog_state to backup RAM on Series 2.
     
    +#define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE   1
     Reset cause flags in the RSTCASUES register.
     
    +#define SL_IEC60730_TEST_CLOCK_MULTIPLIER   10
     Determines how many entrances into sl_iec60730_test_clock_tick() occur before bist frequency test executes.
     
    #define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ   10
     
    #define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE   1
     
    +#define SL_IEC60730_USE_MARCHX_ENABLE   1
     Enable used the algorithm used in BIST is March-X.
     
    +#define SL_IEC60730_VAR_BLOCKS_PER_BIST   256
     Number of ram blocks tested per BIST.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0   (0xEEEEEEEEuL)
     Pattern 0 is used for stack overflow.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1   (0xCCCCCCCCuL)
     Pattern 1 is used for stack overflow.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2   (0xBBBBBBBBuL)
     Pattern 2 is used for stack overflow.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3   (0xDDDDDDDDuL)
     Pattern 3 is used for stack overflow.
     
    +#define SL_IEC60730_CRC_DEBUG_ENABLE   1
     Use this definition for debugging purposes.
     
    +#define SL_IEC60730_INVAR_BLOCKS_PER_BIST   512
     Number of blocks per test bist.
     
    #define SL_IEC60730_FLASH_BLOCK   64
     
    #define SL_IEC60730_CRC_USE_SW_ENABLE   0
     
    #define SL_IEC60730_SW_CRC_TABLE_ENABLE   0
     
    #define SL_IEC60730_USE_CRC_32_ENABLE   0
     
    +

    Detailed Description

    +

    Library configuration.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__config_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__config_8h_source.html new file mode 100644 index 00000000..c9626ede --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__config_8h_source.html @@ -0,0 +1,213 @@ + + + + + + + +Document API IEC60730 Library: lib/config/sl_iec60730_config.h Source File + + + + + + + + + +
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    Document API IEC60730 Library +
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    sl_iec60730_config.h
    +
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    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_CONFIG_H
    +
    19 #define SL_IEC60730_CONFIG_H
    +
    20 
    +
    21 // <<< Use Configuration Wizard in Context Menu >>>
    +
    22 
    +
    23 /**************************************************************************/
    +
    30 // <h> IEC60730_IRQ
    +
    31 
    +
    32 // <o SL_IEC60730_IRQ_TYPE_VARIABLE> Data type for iec60730_IRQExecCount variables
    +
    34 // <uint8_t=> uint8_t
    +
    35 // <uint16_t=> uint16_t
    +
    36 // <uint32_t=> uint32_t
    +
    37 // <i> Default: uint8_t
    +
    38 #define SL_IEC60730_IRQ_TYPE_VARIABLE uint8_t
    +
    39 // <q SL_IEC60730_IRQ_STATUS_ENABLE> Enable function to get the value of failed irqs
    +
    41 // <i> Default: 0
    +
    42 #define SL_IEC60730_IRQ_STATUS_ENABLE 0
    +
    43 
    +
    44 // </h>
    +
    45 
    +
    48 /**************************************************************************/
    +
    53 // <h> IEC60730_WATCHDOG
    +
    54 
    +
    55 // <q SL_IEC60730_WDOG0_ENABLE> Enable Watchdog 0
    +
    57 // <i> Default: 1
    +
    58 #ifndef SL_IEC60730_WDOG0_ENABLE
    +
    59 #define SL_IEC60730_WDOG0_ENABLE 1
    +
    60 #endif //SL_IEC60730_WDOG0_ENABLE
    +
    61 
    +
    62 // <q SL_IEC60730_WDOG1_ENABLE> Enable Watchdog 1
    +
    64 // <i> Default: 0
    +
    65 #ifndef SL_IEC60730_WDOG1_ENABLE
    +
    66 #define SL_IEC60730_WDOG1_ENABLE 0
    +
    67 #endif //SL_IEC60730_WDOG1_ENABLE
    +
    68 
    +
    69 // <q SL_IEC60730_SAVE_STAGE_ENABLE> Enable saving iec60730_watchdog_state to backup RAM on Series 2.
    +
    71 // <i> Default: 0
    +
    72 #define SL_IEC60730_SAVE_STAGE_ENABLE 0
    +
    73 
    +
    74 // <q SL_IEC60730_RSTCAUSES_CLEAR_ENABLE> Reset cause flags in the RSTCASUES register.
    +
    76 // <i> Default: 1
    +
    77 #define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE 1
    +
    78 
    +
    79 // </h>
    +
    80 
    +
    83 /**************************************************************************/
    +
    88 // <h> IEC60730_SYS_CLOCK
    +
    89 
    +
    90 // <o SL_IEC60730_TEST_CLOCK_MULTIPLIER> Determines how many entrances into sl_iec60730_test_clock_tick() occur before bist frequency test executes
    +
    92 // <i> Default: 10
    +
    93 #define SL_IEC60730_TEST_CLOCK_MULTIPLIER 10
    +
    94 
    +
    95 // <o SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ> This value is used to compare with the system clock counter
    +
    98 // <i> Default: 10
    +
    99 #define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ 10
    +
    100 
    +
    101 // <o SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE> The tolerance of test
    +
    104 // <i> Default: 1
    +
    105 #define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE 1
    +
    106 
    +
    107 // </h>
    +
    108 
    +
    111 /**************************************************************************/
    +
    116 // <h> IEC60730_VMC
    +
    117 
    +
    118 // <q SL_IEC60730_USE_MARCHX_ENABLE> Enable used the algorithm used in BIST is March-X.
    +
    120 // <i> Default: 1
    +
    121 #ifndef SL_IEC60730_USE_MARCHX_ENABLE
    +
    122 #define SL_IEC60730_USE_MARCHX_ENABLE 1
    +
    123 #endif // SL_IEC60730_USE_MARCHX_ENABLE
    +
    124 
    +
    125 // <o SL_IEC60730_VAR_BLOCKS_PER_BIST> SL_IEC60730_VAR_BLOCKS_PER_BIST
    +
    127 // <i> Default: 256
    +
    128 #define SL_IEC60730_VAR_BLOCKS_PER_BIST 256
    +
    129 
    +
    130 // <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0> Pattern 0 is used for stack overflow
    +
    132 // <i> Default: (0xEEEEEEEEuL)
    +
    133 #define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0 (0xEEEEEEEEuL)
    +
    134 
    +
    135 // <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1> Pattern 1 is used for stack overflow
    +
    137 // <i> Default: (0xCCCCCCCCuL)
    +
    138 #define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1 (0xCCCCCCCCuL)
    +
    139 
    +
    140 // <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2> Pattern 2 is used for stack overflow
    +
    142 // <i> Default: (0xBBBBBBBBuL)
    +
    143 #define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2 (0xBBBBBBBBuL)
    +
    144 
    +
    145 // <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3> Pattern 3 is used for stack overflow
    +
    147 // <i> Default: (0xDDDDDDDDuL)
    +
    148 #define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3 (0xDDDDDDDDuL)
    +
    149 
    +
    150 // </h>
    +
    151 
    +
    154 /**************************************************************************/
    +
    159 // <h> IEC60730_IMC
    +
    160 
    +
    161 // <q SL_IEC60730_CRC_DEBUG_ENABLE> Enable debug IMC module
    +
    163 // <i> Default: 1
    +
    164 #define SL_IEC60730_CRC_DEBUG_ENABLE 1
    +
    165 
    +
    166 // <o SL_IEC60730_INVAR_BLOCKS_PER_BIST> SL_IEC60730_INVAR_BLOCKS_PER_BIST
    +
    168 // <i> Default: 512
    +
    169 #define SL_IEC60730_INVAR_BLOCKS_PER_BIST 512
    +
    170 
    +
    171 // <o SL_IEC60730_FLASH_BLOCK> Definition is size of block of Flash
    +
    179 // <i> Default: 64
    +
    180 #define SL_IEC60730_FLASH_BLOCK 64
    +
    181 
    +
    182 // <e SL_IEC60730_CRC_USE_SW_ENABLE> Enable CRC calculation using software instead of hardware
    +
    185 // <i> Default: 0
    +
    186 #ifndef SL_IEC60730_CRC_USE_SW_ENABLE
    +
    187 #define SL_IEC60730_CRC_USE_SW_ENABLE 0
    +
    188 #endif // SL_IEC60730_CRC_USE_SW_ENABLE
    +
    189 
    +
    190 // <q SL_IEC60730_SW_CRC_TABLE_ENABLE> Enable pre-defined table for calculating CRC
    +
    193 // <i> Default: 0
    +
    194 #ifndef SL_IEC60730_SW_CRC_TABLE_ENABLE
    +
    195 #define SL_IEC60730_SW_CRC_TABLE_ENABLE 0
    +
    196 #endif // SL_IEC60730_SW_CRC_TABLE_ENABLE
    +
    197 // </e>
    +
    198 
    +
    199 // <q SL_IEC60730_USE_CRC_32_ENABLE> Enable CRC-32 for calculating the CRC value
    +
    202 // <i> Default: 0
    +
    203 #ifndef SL_IEC60730_USE_CRC_32_ENABLE
    +
    204 #define SL_IEC60730_USE_CRC_32_ENABLE 0
    +
    205 #endif // SL_IEC60730_USE_CRC_32_ENABLE
    +
    206 
    +
    207 // </h>
    +
    208 
    +
    212 // <<< end of configuration section >>>
    +
    213 
    +
    214 #endif /* SL_IEC60730_CONFIG_H */
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__cpu__registers_8h.html b/docs/document_api_iec60730_library/sl__iec60730__cpu__registers_8h.html new file mode 100644 index 00000000..5dac4451 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__cpu__registers_8h.html @@ -0,0 +1,106 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_cpu_registers.h File Reference + + + + + + + + + +
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    Document API IEC60730 Library +
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    + + +
    + +
    + + +
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    +Functions
    +
    +
    sl_iec60730_cpu_registers.h File Reference
    +
    +
    + +

    CPU Registers check. +More...

    +
    #include "sl_iec60730_internal.h"
    +
    +

    Go to the source code of this file.

    + + + + + + + + + + +

    +Functions

    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns (void)
     
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s (void)
     
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist (void)
     
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_post (void)
     
    +

    Detailed Description

    +

    CPU Registers check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__cpu__registers_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__cpu__registers_8h_source.html new file mode 100644 index 00000000..b4bd649e --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__cpu__registers_8h_source.html @@ -0,0 +1,114 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_cpu_registers.h Source File + + + + + + + + + +
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    Document API IEC60730 Library +
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    +
    +
    sl_iec60730_cpu_registers.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_CPU_REGISTERS_H
    +
    19 #define SL_IEC60730_CPU_REGISTERS_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730_internal.h"
    +
    26 
    +
    27 /**************************************************************************/
    +
    97 /**************************************************************************/
    +
    106 sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns(void);
    +
    107 
    +
    108 /**************************************************************************/
    +
    117 sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s(void);
    +
    118 
    +
    119 /**************************************************************************/
    +
    128 sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist(void);
    +
    129 
    +
    130 /**************************************************************************/
    +
    137 sl_iec60730_test_result_t sl_iec60730_cpu_registers_post(void);
    +
    138 
    +
    142 #ifdef __cplusplus
    +
    143 }
    +
    144 #endif /* __cplusplus */
    +
    145 
    +
    146 #endif /* SL_IEC60730_CPU_REGISTERS_H */
    +
    +
    sl_iec60730_cpu_registers_post
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_post(void)
    +
    sl_iec60730_internal.h
    Internal definitions.
    +
    sl_iec60730_cpu_registers_bist_s
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s(void)
    +
    sl_iec60730_cpu_registers_bist_ns
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns(void)
    +
    sl_iec60730_cpu_registers_bist
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist(void)
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__internal_8h.html b/docs/document_api_iec60730_library/sl__iec60730__internal_8h.html new file mode 100644 index 00000000..d0b76f4a --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__internal_8h.html @@ -0,0 +1,101 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_internal.h File Reference + + + + + + + + + +
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    Document API IEC60730 Library +
    +
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    +
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    +
    +
    sl_iec60730_internal.h File Reference
    +
    +
    + +

    Internal definitions. +More...

    +
    #include <stdbool.h>
    +#include <stdint.h>
    +#include "sl_iec60730.h"
    +#include "sl_iec60730_watchdog.h"
    +#include "sl_iec60730_invariable_memory.h"
    +#include "sl_iec60730_variable_memory.h"
    +#include "sl_iec60730_cpu_registers.h"
    +#include "sl_iec60730_system_clock.h"
    +#include "sl_iec60730_program_counter.h"
    +#include "sl_iec60730_irq.h"
    +
    +

    Go to the source code of this file.

    +

    Detailed Description

    +

    Internal definitions.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__internal_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__internal_8h_source.html new file mode 100644 index 00000000..fa3730ad --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__internal_8h_source.html @@ -0,0 +1,115 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_internal.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
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    +
    +
    +
    sl_iec60730_internal.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_INTERNAL_H
    +
    19 #define SL_IEC60730_INTERNAL_H
    +
    20 
    +
    21 // Standard libraries
    +
    22 #include <stdbool.h>
    +
    23 #include <stdint.h>
    +
    24 
    +
    25 // Header files needed for publics
    +
    26 #include "sl_iec60730.h"
    +
    27 
    +
    28 // Header files needed for privates
    +
    29 #include "sl_iec60730_watchdog.h"
    +
    30 #include "sl_iec60730_invariable_memory.h"
    +
    31 #include "sl_iec60730_variable_memory.h"
    +
    32 #include "sl_iec60730_cpu_registers.h"
    +
    33 #include "sl_iec60730_system_clock.h"
    +
    34 #include "sl_iec60730_program_counter.h"
    +
    35 #include "sl_iec60730_irq.h"
    +
    36 
    +
    37 // Disable warnings on unused labels. Labels are used to set breakpoints for
    +
    38 // automated testing.
    +
    39 #if defined(__GNUC__)
    +
    40 #pragma GCC diagnostic ignored "-Wunused-label"
    +
    41 #endif
    +
    42 
    +
    43 #endif /* SL_IEC60730_INTERNAL_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    sl_iec60730_system_clock.h
    Clock check.
    +
    sl_iec60730_watchdog.h
    Watchdog check.
    +
    sl_iec60730_invariable_memory.h
    Invariable memory check.
    +
    sl_iec60730_irq.h
    Interrupt check.
    +
    sl_iec60730_program_counter.h
    Program Counter check.
    +
    sl_iec60730_variable_memory.h
    Variable memory check.
    +
    sl_iec60730_cpu_registers.h
    CPU Registers check.
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__invariable__memory_8h.html b/docs/document_api_iec60730_library/sl__iec60730__invariable__memory_8h.html new file mode 100644 index 00000000..2c2c612d --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__invariable__memory_8h.html @@ -0,0 +1,112 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_invariable_memory.h File Reference + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Macros | +Functions
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    +
    sl_iec60730_invariable_memory.h File Reference
    +
    +
    + +

    Invariable memory check. +More...

    +
    #include "sl_iec60730.h"
    +
    +

    Go to the source code of this file.

    + + + + + + + + +

    +Macros

    #define SL_IEC60730_IMC_INIT_VALUE
     
    #define SL_IEC60730_IMC_XOROUTPUT
     
    #define SL_IEC60730_IMC_INIT_DEFAULT
     
    + + + + + +

    +Functions

    sl_iec60730_test_result_t sl_iec60730_imc_post (void)
     
    sl_iec60730_test_result_t sl_iec60730_imc_bist (void)
     
    +

    Detailed Description

    +

    Invariable memory check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__invariable__memory_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__invariable__memory_8h_source.html new file mode 100644 index 00000000..a8686484 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__invariable__memory_8h_source.html @@ -0,0 +1,146 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_invariable_memory.h Source File + + + + + + + + + +
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    + + + + + + +
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    Document API IEC60730 Library +
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    +
    sl_iec60730_invariable_memory.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_INVARIABLE_MEMORY_H
    +
    19 #define SL_IEC60730_INVARIABLE_MEMORY_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730.h"
    +
    26 #include SL_IEC60730_BOARD_HEADER
    +
    27 
    +
    28 /**************************************************************************/
    +
    201 #ifdef DOXYGEN
    +
    202 
    +
    207 #define SL_IEC60730_IMC_INIT_VALUE
    +
    208 
    +
    214 #define SL_IEC60730_IMC_XOROUTPUT
    +
    215 
    +
    219 #define SL_IEC60730_IMC_INIT_DEFAULT
    +
    220 
    +
    221 #else
    +
    222 
    +
    223 #if (SL_IEC60730_USE_CRC_32_ENABLE == 1)
    +
    224 #define SL_IEC60730_IMC_INIT_VALUE (0xFFFFFFFFuL)
    +
    225 #define SL_IEC60730_IMC_XOROUTPUT (0xFFFFFFFFuL)
    +
    226 #define SL_IEC60730_IMC_INIT_DEFAULT \
    +
    227  { \
    +
    228  0x04C11DB7UL, /* CRC32 Polynomial value. */ \
    +
    229  SL_IEC60730_IMC_INIT_VALUE, /* Initialization value. */ \
    +
    230  false, /* Byte order is normal. */ \
    +
    231  false, /* Bit order is not reversed on output. */ \
    +
    232  false, /* Disable byte mode. */ \
    +
    233  false, /* Disable automatic initialization on data read. */ \
    +
    234  true, /* Enable GPCRC. */ \
    +
    235  }
    +
    236 #else /* !SL_IEC60730_USE_CRC_32_ENABLE */
    +
    237 #define SL_IEC60730_IMC_INIT_VALUE (0x0000)
    +
    238 #define SL_IEC60730_IMC_XOROUTPUT (0x0000)
    +
    239 #define SL_IEC60730_IMC_INIT_DEFAULT \
    +
    240  { \
    +
    241  0x1021UL, \
    +
    242  SL_IEC60730_IMC_INIT_VALUE, \
    +
    243  false, \
    +
    244  true, \
    +
    245  false, \
    +
    246  false, \
    +
    247  true, \
    +
    248  }
    +
    249 #endif /* SL_IEC60730_USE_CRC_32_ENABLE */
    +
    250 #endif // DOXYGEN
    +
    251 
    +
    252 /**************************************************************************/
    +
    261 sl_iec60730_test_result_t sl_iec60730_imc_post(void);
    +
    262 
    +
    263 /**************************************************************************/
    +
    276 sl_iec60730_test_result_t sl_iec60730_imc_bist(void);
    +
    277 
    +
    280 #ifdef __cplusplus
    +
    281 }
    +
    282 #endif /* __cplusplus */
    +
    283 
    +
    284 #endif /* SL_IEC60730_INVARIABLE_MEMORY_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    sl_iec60730_imc_post
    sl_iec60730_test_result_t sl_iec60730_imc_post(void)
    +
    sl_iec60730_imc_bist
    sl_iec60730_test_result_t sl_iec60730_imc_bist(void)
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    + +
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    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__irq_8h.html b/docs/document_api_iec60730_library/sl__iec60730__irq_8h.html new file mode 100644 index 00000000..b7e8a029 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__irq_8h.html @@ -0,0 +1,110 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_irq.h File Reference + + + + + + + + + +
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    sl_iec60730_irq.h File Reference
    +
    +
    + +

    Interrupt check. +More...

    +
    #include "sl_iec60730_toolchain.h"
    +#include <stdint.h>
    +#include "sl_iec60730.h"
    +
    +

    Go to the source code of this file.

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    +Functions

    void sl_iec60730_irq_reset_fail_result (void)
     
    sl_iec60730_irq_fail_t * sl_iec60730_get_irq_index_failed (void)
     
    void sl_iec60730_irq_init (sl_iec60730_irq_cfg_t *irq_cfg_ptr)
     
    void sl_iec60730_irq_reset_counter (void)
     
    void sl_iec60730_irq_check (void)
     
    +

    Detailed Description

    +

    Interrupt check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__irq_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__irq_8h_source.html new file mode 100644 index 00000000..6106f2c5 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__irq_8h_source.html @@ -0,0 +1,122 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_irq.h Source File + + + + + + + + + +
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    sl_iec60730_irq.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_IRQ_H
    +
    19 #define SL_IEC60730_IRQ_H
    +
    20 
    +
    21 #include "sl_iec60730_toolchain.h"
    +
    22 #include <stdint.h>
    +
    23 #include "sl_iec60730.h"
    +
    24 
    +
    25 #ifdef __cplusplus
    +
    26 extern "C" {
    +
    27 #endif /* __cplusplus */
    +
    28 
    +
    29 /**************************************************************************/
    +
    112 /**************************************************************************/
    +
    119 void sl_iec60730_irq_reset_fail_result(void);
    +
    120 
    +
    121 /**************************************************************************/
    +
    130 sl_iec60730_irq_fail_t* sl_iec60730_get_irq_index_failed(void);
    +
    131 
    +
    132 /**************************************************************************/
    +
    142 void sl_iec60730_irq_init(sl_iec60730_irq_cfg_t* irq_cfg_ptr);
    +
    143 
    +
    144 /**************************************************************************/
    +
    151 void sl_iec60730_irq_reset_counter(void);
    +
    152 
    +
    153 /**************************************************************************/
    +
    165 void sl_iec60730_irq_check(void);
    +
    166 
    +
    170 #ifdef __cplusplus
    +
    171 }
    +
    172 #endif /* __cplusplus */
    +
    173 
    +
    174 #endif /* SL_IEC60730_IRQ_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    sl_iec60730_irq_init
    void sl_iec60730_irq_init(sl_iec60730_irq_cfg_t *irq_cfg_ptr)
    +
    sl_iec60730_get_irq_index_failed
    sl_iec60730_irq_fail_t * sl_iec60730_get_irq_index_failed(void)
    +
    sl_iec60730_irq_reset_counter
    void sl_iec60730_irq_reset_counter(void)
    +
    sl_iec60730_irq_reset_fail_result
    void sl_iec60730_irq_reset_fail_result(void)
    +
    sl_iec60730_irq_fail_t
    Definition: sl_iec60730.h:590
    +
    sl_iec60730_irq_cfg_t
    Definition: sl_iec60730.h:611
    +
    sl_iec60730_irq_check
    void sl_iec60730_irq_check(void)
    +
    sl_iec60730_toolchain.h
    Compiler abstraction.
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__library__documentation_8h.html b/docs/document_api_iec60730_library/sl__iec60730__library__documentation_8h.html new file mode 100644 index 00000000..3530c170 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__library__documentation_8h.html @@ -0,0 +1,91 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_library_documentation.h File Reference + + + + + + + + + +
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    Library Documentation. +More...

    + +

    Go to the source code of this file.

    +

    Detailed Description

    +

    Library Documentation.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__library__documentation_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__library__documentation_8h_source.html new file mode 100644 index 00000000..c412ef83 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__library__documentation_8h_source.html @@ -0,0 +1,100 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_library_documentation.h Source File + + + + + + + + + +
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    Document API IEC60730 Library +
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    +
    +
    +
    sl_iec60730_library_documentation.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 // This file is a centralized location for documentation on OEM functions.
    +
    19 // It contains no source.
    +
    20 
    +
    21 /**************************************************************************/
    +
    545 /**************************************************************************/
    +
    550 /**************************************************************************/
    +
    557 /**************************************************************************/
    +
    564 /**************************************************************************/
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    571 /**************************************************************************/
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    578 /**************************************************************************/
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    585 /**************************************************************************/
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    592 /**************************************************************************/
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    599 /**************************************************************************/
    +
    606 /**************************************************************************/
    +
    613 /**************************************************************************/
    +
    620 /**************************************************************************/
    +
    629 /**************************************************************************/
    +
    636 /**************************************************************************/
    +
    646 /**************************************************************************/
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__program__counter_8h.html b/docs/document_api_iec60730_library/sl__iec60730__program__counter_8h.html new file mode 100644 index 00000000..f5b4fc8e --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__program__counter_8h.html @@ -0,0 +1,100 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_program_counter.h File Reference + + + + + + + + + +
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    Document API IEC60730 Library +
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    +
    +
    sl_iec60730_program_counter.h File Reference
    +
    +
    + +

    Program Counter check. +More...

    +
    #include "sl_iec60730_internal.h"
    +
    +

    Go to the source code of this file.

    + + + + +

    +Functions

    void sl_iec60730_program_counter_test (void)
     
    +

    Detailed Description

    +

    Program Counter check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__program__counter_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__program__counter_8h_source.html new file mode 100644 index 00000000..6665d7c1 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__program__counter_8h_source.html @@ -0,0 +1,100 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_program_counter.h Source File + + + + + + + + + +
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    +
    sl_iec60730_program_counter.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_PROGRAM_COUNTER_H
    +
    19 #define SL_IEC60730_PROGRAM_COUNTER_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730_internal.h"
    +
    26 
    +
    27 /**************************************************************************/
    +
    74 void sl_iec60730_program_counter_test(void);
    +
    81 
    +
    85 #ifdef __cplusplus
    +
    86 }
    +
    87 #endif /* __cplusplus */
    +
    88 
    +
    89 #endif /* SL_IEC60730_PROGRAM_COUNTER_H */
    +
    +
    sl_iec60730_internal.h
    Internal definitions.
    +
    sl_iec60730_program_counter_test
    void sl_iec60730_program_counter_test(void)
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__system__clock_8h.html b/docs/document_api_iec60730_library/sl__iec60730__system__clock_8h.html new file mode 100644 index 00000000..edcddcb7 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__system__clock_8h.html @@ -0,0 +1,105 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_system_clock.h File Reference + + + + + + + + + +
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    +
    Document API IEC60730 Library +
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    +Functions
    +
    +
    sl_iec60730_system_clock.h File Reference
    +
    +
    + +

    Clock check. +More...

    +
    #include <stdint.h>
    +#include "sl_iec60730_toolchain.h"
    +
    +

    Go to the source code of this file.

    + + + + + + + + +

    +Functions

    uint16_t sl_iec60730_get_number_test_timer_tick (void)
     
    void sl_iec60730_sys_clock_test_enable (void)
     
    void sl_iec60730_sys_clock_test_disable (void)
     
    +

    Detailed Description

    +

    Clock check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__system__clock_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__system__clock_8h_source.html new file mode 100644 index 00000000..a04851e7 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__system__clock_8h_source.html @@ -0,0 +1,110 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_system_clock.h Source File + + + + + + + + + +
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    Document API IEC60730 Library +
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    +
    +
    sl_iec60730_system_clock.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_SYSTEM_CLOCK_H
    +
    19 #define SL_IEC60730_SYSTEM_CLOCK_H
    +
    20 
    +
    21 #include <stdint.h>
    +
    22 #include "sl_iec60730_toolchain.h"
    +
    23 
    +
    24 #ifdef __cplusplus
    +
    25 extern "C" {
    +
    26 #endif /* __cplusplus */
    +
    27 
    +
    28 /**************************************************************************/
    +
    120 /**************************************************************************/
    +
    127 uint16_t sl_iec60730_get_number_test_timer_tick(void);
    +
    128 
    +
    129 /**************************************************************************/
    +
    136 void sl_iec60730_sys_clock_test_enable(void);
    +
    137 
    +
    138 /**************************************************************************/
    +
    145 void sl_iec60730_sys_clock_test_disable(void);
    +
    146 
    +
    150 #ifdef __cplusplus
    +
    151 }
    +
    152 #endif /* __cplusplus */
    +
    153 
    +
    154 #endif /* SL_IEC60730_SYSTEM_CLOCK_H */
    +
    +
    sl_iec60730_get_number_test_timer_tick
    uint16_t sl_iec60730_get_number_test_timer_tick(void)
    +
    sl_iec60730_toolchain.h
    Compiler abstraction.
    +
    sl_iec60730_sys_clock_test_disable
    void sl_iec60730_sys_clock_test_disable(void)
    +
    sl_iec60730_sys_clock_test_enable
    void sl_iec60730_sys_clock_test_enable(void)
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__toolchain_8h.html b/docs/document_api_iec60730_library/sl__iec60730__toolchain_8h.html new file mode 100644 index 00000000..bdc28543 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__toolchain_8h.html @@ -0,0 +1,127 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_toolchain.h File Reference + + + + + + + + + +
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    Document API IEC60730 Library +
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    +
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    sl_iec60730_toolchain.h File Reference
    +
    +
    + +

    Compiler abstraction. +More...

    + +

    Go to the source code of this file.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    +#define NULL   ((void *) 0)
     Make sure there is a NULL defined if the toolchain does not provide it.
     
    #define NOP()   __NOP()
     
    +#define IEC60730_VAR_NO_INIT   __attribute__((section(".noinit")))
     No init at startup.
     
    +#define IEC60730_DATA_NO_CLEAR   __attribute__((section(".ram_no_clear")))
     No clear at startup.
     
    #define __STACK_BOTTOM   __attribute__((section(".stack_bottom")))
     
    #define __CLASSB_RAM   __attribute__((section(".classb_ram")))
     
    #define __RT_BUF   __attribute__((section(".rt_buf")))
     
    #define __OVERLAP   __attribute__((section(".overlap")))
     
    +#define LB_ASM   __asm__
     Add assembly code.
     
    +#define LB_XSTR(x)   XSTR(x:)
     Add label.
     
    +

    Detailed Description

    +

    Compiler abstraction.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__toolchain_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__toolchain_8h_source.html new file mode 100644 index 00000000..62dccc86 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__toolchain_8h_source.html @@ -0,0 +1,155 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_toolchain.h Source File + + + + + + + + + +
    +
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    +
    Document API IEC60730 Library +
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    + +
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    +
    sl_iec60730_toolchain.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_TOOLCHAIN_H
    +
    19 #define SL_IEC60730_TOOLCHAIN_H
    +
    20 
    +
    21 /**************************************************************************/
    +
    49 #ifndef NULL
    +
    51 #define NULL ((void *) 0)
    +
    52 #endif
    +
    53 
    +
    54 // -------------------------------
    +
    55 // GCC for ARM Cortex-M
    +
    56 //
    +
    57 #if defined(__GNUC__)
    +
    58 
    +
    62 #define NOP() __NOP()
    +
    63 
    +
    65 #define IEC60730_VAR_NO_INIT __attribute__((section(".noinit")))
    +
    66 #define IEC60730_DATA_NO_CLEAR __attribute__((section(".ram_no_clear")))
    +
    68 
    +
    71 #ifndef __STACK_BOTTOM
    +
    72 #define __STACK_BOTTOM __attribute__((section(".stack_bottom")))
    +
    73 #endif /* __STACK_BOTTOM */
    +
    74 
    +
    77 #ifndef __CLASSB_RAM
    +
    78 #define __CLASSB_RAM __attribute__((section(".classb_ram")))
    +
    79 #endif /* __CLASSB_RAM */
    +
    80 
    +
    83 #ifndef __RT_BUF
    +
    84 #define __RT_BUF __attribute__((section(".rt_buf")))
    +
    85 #endif /* __RT_BUF */
    +
    86 
    +
    89 #ifndef __OVERLAP
    +
    90 #define __OVERLAP __attribute__((section(".overlap")))
    +
    91 #endif /* __OVERLAP */
    +
    92 
    +
    94 #define LB_ASM __asm__
    +
    95 #define LB_XSTR(x) XSTR(x:)
    +
    97 
    +
    98 // -------------------------------
    +
    99 // IAR for ARM Cortex-M
    +
    100 //
    +
    101 #elif defined(__ICCARM__)
    +
    102 
    +
    103 // __NOP should be declared in cmsis header core_cmInstr.h
    +
    104 // extern void __NOP(void);
    +
    106 #define NOP() __NOP()
    +
    107 
    +
    108 // No init at startup
    +
    109 #define IEC60730_VAR_NO_INIT __attribute__((section(".noinit")))
    +
    110 #define IEC60730_DATA_NO_CLEAR __attribute__((section(".ram_no_clear")))
    +
    112 
    +
    115 #ifndef __STACK_BOTTOM
    +
    116 #define __STACK_BOTTOM __attribute__((section(".stack_bottom")))
    +
    117 #endif /* __STACK_BOTTOM */
    +
    118 
    +
    121 #ifndef __CLASSB_RAM
    +
    122 #define __CLASSB_RAM __attribute__((section(".classb_ram")))
    +
    123 #endif /* __CLASSB_RAM */
    +
    124 
    +
    127 #ifndef __RT_BUF
    +
    128 #define __RT_BUF __attribute__((section(".rt_buf")))
    +
    129 #endif /* __RT_BUF */
    +
    130 
    +
    133 #ifndef __OVERLAP
    +
    134 #define __OVERLAP __attribute__((section(".overlap")))
    +
    135 #endif /* __OVERLAP */
    +
    136 
    +
    137 #define LB_ASM __asm
    +
    138 #define LB_XSTR(x) XSTR(x::)
    +
    139 
    +
    140 #else // unknown toolchain
    +
    141 #error Unrecognized toolchain in sl_iec60730_toolchain.h
    +
    142 #endif
    +
    143 
    +
    146 #endif /* SL_IEC60730_TOOLCHAIN_H */
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__variable__memory_8h.html b/docs/document_api_iec60730_library/sl__iec60730__variable__memory_8h.html new file mode 100644 index 00000000..fd36dda3 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__variable__memory_8h.html @@ -0,0 +1,108 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_variable_memory.h File Reference + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Functions
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    sl_iec60730_variable_memory.h File Reference
    +
    +
    + +

    Variable memory check. +More...

    +
    #include "sl_iec60730.h"
    +
    +

    Go to the source code of this file.

    + + + + + + + + + + + + +

    +Functions

    sl_iec60730_test_result_t sl_iec60730_vmc_post (void)
     
    sl_iec60730_test_result_t sl_iec60730_vmc_bist (void)
     
    bool sl_iec60730_vmc_pre_run_marchxc_step (uint32_t *addr, uint32_t size)
     This function is called before performing the RAM check. Depending on the RAM region will be checked to give reasonable actions. More...
     
    void sl_iec60730_vmc_post_run_marchxc_step (uint32_t *addr, uint32_t size)
     After testing the RAM, you can restore the previous work. More...
     
    +

    Detailed Description

    +

    Variable memory check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
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    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__variable__memory_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__variable__memory_8h_source.html new file mode 100644 index 00000000..81a99932 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__variable__memory_8h_source.html @@ -0,0 +1,115 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_variable_memory.h Source File + + + + + + + + + +
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    Document API IEC60730 Library +
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    +
    +
    sl_iec60730_variable_memory.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_VARIABLE_MEMORY_H
    +
    19 #define SL_IEC60730_VARIABLE_MEMORY_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730.h"
    +
    26 #include SL_IEC60730_BOARD_HEADER
    +
    27 
    +
    28 /**************************************************************************/
    +
    184 /**************************************************************************/
    +
    197 sl_iec60730_test_result_t sl_iec60730_vmc_post(void);
    +
    198 
    +
    199 /**************************************************************************/
    +
    216 sl_iec60730_test_result_t sl_iec60730_vmc_bist(void);
    +
    217 
    +
    218 /**************************************************************************/
    +
    231 bool sl_iec60730_vmc_pre_run_marchxc_step(uint32_t *addr, uint32_t size);
    +
    232 
    +
    233 /**************************************************************************/
    +
    242 void sl_iec60730_vmc_post_run_marchxc_step(uint32_t *addr, uint32_t size);
    +
    243 
    +
    247 #ifdef __cplusplus
    +
    248 }
    +
    249 #endif /* __cplusplus */
    +
    250 
    +
    251 #endif /* SL_IEC60730_VARIABLE_MEMORY_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    sl_iec60730_vmc_post
    sl_iec60730_test_result_t sl_iec60730_vmc_post(void)
    +
    sl_iec60730_vmc_bist
    sl_iec60730_test_result_t sl_iec60730_vmc_bist(void)
    +
    sl_iec60730_vmc_pre_run_marchxc_step
    bool sl_iec60730_vmc_pre_run_marchxc_step(uint32_t *addr, uint32_t size)
    This function is called before performing the RAM check. Depending on the RAM region will be checked ...
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    sl_iec60730_vmc_post_run_marchxc_step
    void sl_iec60730_vmc_post_run_marchxc_step(uint32_t *addr, uint32_t size)
    After testing the RAM, you can restore the previous work.
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__watchdog_8h.html b/docs/document_api_iec60730_library/sl__iec60730__watchdog_8h.html new file mode 100644 index 00000000..a3923a7f --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__watchdog_8h.html @@ -0,0 +1,192 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_watchdog.h File Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +Classes | +Macros | +Enumerations | +Functions | +Variables
    +
    +
    sl_iec60730_watchdog.h File Reference
    +
    +
    + +

    Watchdog check. +More...

    +
    #include <stdint.h>
    +#include "em_wdog.h"
    +#include "sl_iec60730.h"
    +
    +

    Go to the source code of this file.

    + + + + + +

    +Classes

    struct  sl_iec60730_watchdog_t
     Watchdog component configuration structure. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    +#define SL_IEC60730_WDOGINST_NUMB   1
     Default configuration number of enabled watchdog.
     
    +#define SL_IEC60730_WDOG_WAIT_TIMEOUT   (uint32_t) 0x0000FFFFUL
     Timeout time to wait for wachdog to reset.
     
    +#define SL_IEC60730_WDOG_INST(n)   WDOG##n
     Define gets the default value of watchdog(n).
     
    +#define SL_IEC60730_RST   RMU
     Hardware manages the reset cause of the device. With series 2 is EMU.
     
    +#define SL_IEC60730_RSTCAUSE_POR   RMU_RSTCAUSE_PORST
     The reset cause of the device is power on reset.
     
    +#define SL_IEC60730_RSTCAUSE_EM4   RMU_RSTCAUSE_EM4RST
     The reset cause of the device is em4 reset.
     
    +#define SL_IEC60730_RSTCAUSE_WDOG0   RMU_RSTCAUSE_WDOGRST
     The reset cause of the device is watchdog reset.
     
    +#define SL_IEC60730_RSTCAUSE_WDOG1   RMU_RSTCAUSE_WDOGRST
     The reset cause of the device is watchdog reset.
     
    +#define SL_IEC60730_RSTCAUSES_CLEAR()
     Function macro clear hardware reset cause bit SL_IEC60730_RST.
     
    +#define SL_IEC60730_RSTCAUSE   (SL_IEC60730_RST->RSTCAUSE)
     Enable bit flag clear causes reset.
     
    +#define SL_IEC60730_RSTCAUSE   (SL_IEC60730_RST->RSTCAUSE)
     Enable bit flag clear causes reset.
     
    +#define SL_IEC60730_RST_POR   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_POR)
     
    +#define SL_IEC60730_RST_EM4   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_EM4)
     
    +#define SL_IEC60730_RST_WDOG0   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG0)
     
    +#define SL_IEC60730_RST_WDOG1   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG1)
     
    +#define SL_IEC60730_RST_WDOGS   (SL_IEC60730_RST_WDOG0 || SL_IEC60730_RST_WDOG1)
     
    +#define SL_IEC60730_BURAM_IDX   0UL
     index buram to store the value
     
    + + + + +

    +Enumerations

    enum  sl_iec60730_test_watchdog_t { SL_IEC60730_WATCHDOG_INVALID = 0, +SL_IEC60730_WATCHDOG_TESTING = 1, +SL_IEC60730_WATCHDOG_VALID = 2 + }
     State of watchdog testing. More...
     
    + + + +

    +Functions

    sl_iec60730_test_result_t sl_iec60730_watchdog_post (void)
     
    + + + +

    +Variables

    volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state
     
    +

    Detailed Description

    +

    Watchdog check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/sl__iec60730__watchdog_8h_source.html b/docs/document_api_iec60730_library/sl__iec60730__watchdog_8h_source.html new file mode 100644 index 00000000..da35a1b8 --- /dev/null +++ b/docs/document_api_iec60730_library/sl__iec60730__watchdog_8h_source.html @@ -0,0 +1,297 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_watchdog.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
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    + +
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    +
    sl_iec60730_watchdog.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_WATCHDOG_H
    +
    19 #define SL_IEC60730_WATCHDOG_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include <stdint.h>
    +
    26 #include "em_wdog.h"
    +
    27 #include "sl_iec60730.h"
    +
    28 
    +
    29 /**************************************************************************/
    +
    117 typedef struct {
    +
    119  WDOG_TypeDef *const SL_WDOG;
    +
    120  uint32_t rst;
    +
    121 } sl_iec60730_watchdog_t;
    +
    122 
    +
    124 typedef enum {
    +
    125  SL_IEC60730_WATCHDOG_INVALID = 0,
    +
    126  SL_IEC60730_WATCHDOG_TESTING = 1,
    +
    127  SL_IEC60730_WATCHDOG_VALID = 2,
    +
    128 } sl_iec60730_test_watchdog_t;
    +
    129 
    +
    130 #ifdef DOXYGEN
    +
    131 #define SL_IEC60730_WDOGINST_NUMB 1
    +
    133 #else // DOXYGEN
    +
    134 #if ((SL_IEC60730_WDOG0_ENABLE == 1) && (SL_IEC60730_WDOG1_ENABLE == 1))
    +
    135 #define SL_IEC60730_WDOGINST_NUMB 2
    +
    136 #elif ((SL_IEC60730_WDOG0_ENABLE == 0) && (SL_IEC60730_WDOG1_ENABLE == 0))
    +
    137 #warning No watchdogs have been selected for testing!
    +
    138 #define SL_IEC60730_WDOGINST_NUMB 0
    +
    139 #else
    +
    140 #define SL_IEC60730_WDOGINST_NUMB 1
    +
    141 #endif
    +
    142 #endif // DOXYGEN
    +
    143 
    +
    145 #ifndef SL_IEC60730_WDOG_WAIT_TIMEOUT
    +
    146 #define SL_IEC60730_WDOG_WAIT_TIMEOUT (uint32_t) 0x0000FFFFUL
    +
    147 #endif
    +
    148 
    +
    149 #ifdef DOXYGEN
    +
    150 #define SL_IEC60730_WDOG_INST(n) WDOG##n
    +
    152 
    +
    154 #define SL_IEC60730_RST RMU
    +
    155 
    +
    157 #define SL_IEC60730_RSTCAUSE_POR RMU_RSTCAUSE_PORST
    +
    158 
    +
    160 #define SL_IEC60730_RSTCAUSE_EM4 RMU_RSTCAUSE_EM4RST
    +
    161 
    +
    163 #define SL_IEC60730_RSTCAUSE_WDOG0 RMU_RSTCAUSE_WDOGRST
    +
    164 
    +
    166 #define SL_IEC60730_RSTCAUSE_WDOG1 RMU_RSTCAUSE_WDOGRST
    +
    167 
    +
    169 #define SL_IEC60730_RSTCAUSES_CLEAR()
    +
    170 
    +
    172 #define SL_IEC60730_RSTCAUSE (SL_IEC60730_RST->RSTCAUSE)
    +
    173 
    +
    174 #else // DOXYGEN
    +
    175 #ifndef SL_IEC60730_WDOG_INST
    +
    176 #if (_SILICON_LABS_32B_SERIES == 2)
    +
    177 #if ((defined SL_IEC60730_NON_SECURE_ENABLE) && (!defined(SL_TRUSTZONE_SECURE)))
    +
    178 #define SL_IEC60730_WDOG_INST(n) WDOG##n##_NS
    +
    179 #else
    +
    180 #define SL_IEC60730_WDOG_INST(n) WDOG##n
    +
    181 #endif
    +
    182 #else // Series 1 devices
    +
    183 #define SL_IEC60730_WDOG_INST(n) WDOG##n
    +
    184 #endif //(_SILICON_LABS_32B_SERIES == 2)
    +
    185 #endif
    +
    186 
    +
    187 #if (_SILICON_LABS_32B_SERIES < 2)
    +
    188 #ifndef SL_IEC60730_RST
    +
    189 #define SL_IEC60730_RST RMU
    +
    190 #endif
    +
    191 
    +
    192 #define SL_IEC60730_RSTCAUSE_POR RMU_RSTCAUSE_PORST
    +
    193 #define SL_IEC60730_RSTCAUSE_EM4 RMU_RSTCAUSE_EM4RST
    +
    194 #define SL_IEC60730_RSTCAUSE_WDOG0 RMU_RSTCAUSE_WDOGRST
    +
    195 #define SL_IEC60730_RSTCAUSE_WDOG1 RMU_RSTCAUSE_WDOGRST
    +
    196 
    +
    197 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    198 #define SL_IEC60730_RSTCAUSES_CLEAR() \
    +
    199  do { \
    +
    200  SL_IEC60730_RST->CMD |= RMU_CMD_RCCLR; \
    +
    201  } while (0)
    +
    202 #else
    +
    203 #define SL_IEC60730_RSTCAUSES_CLEAR() unit_test_iec60730_watchdog_mock_rstcause_clear()
    +
    204 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    205 #else // Series 2 devices
    +
    206 #ifndef SL_IEC60730_RST
    +
    207 #if ((defined SL_IEC60730_NON_SECURE_ENABLE) && (!defined(SL_TRUSTZONE_SECURE)))
    +
    208 #define SL_IEC60730_RST EMU_NS
    +
    209 #else
    +
    210 #define SL_IEC60730_RST EMU
    +
    211 #endif
    +
    212 #endif
    +
    213 
    +
    214 #define SL_IEC60730_RSTCAUSE_POR EMU_RSTCAUSE_POR
    +
    215 #define SL_IEC60730_RSTCAUSE_EM4 EMU_RSTCAUSE_EM4
    +
    216 #define SL_IEC60730_RSTCAUSE_WDOG0 EMU_RSTCAUSE_WDOG0
    +
    217 #define SL_IEC60730_RSTCAUSE_WDOG1 EMU_RSTCAUSE_WDOG1
    +
    218 
    +
    219 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    220 #ifdef WDOG_HAS_SET_CLEAR
    +
    221 #define SL_IEC60730_RSTCAUSES_CLEAR() \
    +
    222  do { \
    +
    223  SL_IEC60730_RST->CMD_SET = EMU_CMD_RSTCAUSECLR; \
    +
    224  } while (0)
    +
    225 #else
    +
    226 #define SL_IEC60730_RSTCAUSES_CLEAR() \
    +
    227  do { \
    +
    228  SL_IEC60730_RST->CMD |= EMU_CMD_RSTCAUSECLR; \
    +
    229  } while (0)
    +
    230 #endif // WDOG_HAS_SET_CLEAR
    +
    231 #else
    +
    232 #define SL_IEC60730_RSTCAUSES_CLEAR() unit_test_iec60730_watchdog_mock_rstcause_clear()
    +
    233 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    234 #endif // (_SILICON_LABS_32B_SERIES < 2)
    +
    235 #endif // DOXYGEN
    +
    236 
    +
    237 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    238 #define SL_IEC60730_RSTCAUSE (SL_IEC60730_RST->RSTCAUSE)
    +
    239 #else
    +
    240 #define SL_IEC60730_RSTCAUSE unit_test_iec60730_watchdog_mock_rstcause()
    +
    241 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    242 
    +
    243 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    244 #define SL_IEC60730_RST_POR (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_POR)
    +
    245 #define SL_IEC60730_RST_EM4 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_EM4)
    +
    246 #else
    +
    247 #define SL_IEC60730_RST_POR unit_test_iec60730_watchdog_mock_rst_por()
    +
    248 #define SL_IEC60730_RST_EM4 unit_test_iec60730_watchdog_mock_rst_em4()
    +
    249 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    250 
    +
    251 #ifdef DOXYGEN
    +
    252 
    +
    253 #define SL_IEC60730_RST_WDOG0 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG0)
    +
    254 #define SL_IEC60730_RST_WDOG1 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG1)
    +
    255 
    +
    256 #else // DOXYGEN
    +
    257 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    258 #if (SL_IEC60730_WDOG0_ENABLE == 1)
    +
    259 #define SL_IEC60730_RST_WDOG0 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG0)
    +
    260 #else
    +
    261 #define SL_IEC60730_RST_WDOG0 0
    +
    262 #endif // (SL_IEC60730_WDOG0_ENABLE == 1)
    +
    263 #if (SL_IEC60730_WDOG1_ENABLE == 1)
    +
    264 #define SL_IEC60730_RST_WDOG1 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG1)
    +
    265 #else
    +
    266 #define SL_IEC60730_RST_WDOG1 0
    +
    267 #endif // (SL_IEC60730_WDOG1_ENABLE == 1)
    +
    268 #else
    +
    269 #if (SL_IEC60730_WDOG0_ENABLE == 1)
    +
    270 #define SL_IEC60730_RST_WDOG0 unit_test_iec60730_watchdog_mock_rst_wdog0()
    +
    271 #else
    +
    272 #define SL_IEC60730_RST_WDOG0 0
    +
    273 #endif // (SL_IEC60730_WDOG0_ENABLE == 1)
    +
    274 #if (SL_IEC60730_WDOG1_ENABLE == 1)
    +
    275 #define SL_IEC60730_RST_WDOG1 unit_test_iec60730_watchdog_mock_rst_wdog1()
    +
    276 #else
    +
    277 #define SL_IEC60730_RST_WDOG1 0
    +
    278 #endif // (SL_IEC60730_WDOG1_ENABLE == 1)
    +
    279 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    280 #endif // DOXYGEN
    +
    281 
    +
    282 #define SL_IEC60730_RST_WDOGS (SL_IEC60730_RST_WDOG0 || SL_IEC60730_RST_WDOG1)
    +
    283 
    +
    284 #ifndef SL_IEC60730_BURAM
    +
    285 #if (_SILICON_LABS_32B_SERIES == 2)
    +
    286 #if ((defined SL_IEC60730_NON_SECURE_ENABLE) && (!defined(SL_TRUSTZONE_SECURE)))
    +
    287 #define SL_IEC60730_BURAM BURAM_NS
    +
    288 #else
    +
    289 #define SL_IEC60730_BURAM BURAM
    +
    290 #endif
    +
    291 #endif // (_SILICON_LABS_32B_SERIES == 2)
    +
    292 #endif
    +
    293 
    +
    295 #ifndef SL_IEC60730_BURAM_IDX
    +
    296 #define SL_IEC60730_BURAM_IDX 0UL
    +
    297 #endif
    +
    298 
    +
    299 #ifdef DOXYGEN
    +
    300 extern volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state;
    +
    304 #else
    +
    305 extern volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state IEC60730_DATA_NO_CLEAR;
    +
    306 #endif // DOXYGEN
    +
    307 
    +
    308 #ifdef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    309 /**************************************************************************/
    +
    315 void sl_iec60730_watchdog_count_reset(void);
    +
    316 
    +
    317 /**************************************************************************/
    +
    323 void sl_iec60730_watchdog_count_set(uint8_t count);
    +
    324 
    +
    325 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    326 
    +
    327 /**************************************************************************/
    +
    344 sl_iec60730_test_result_t sl_iec60730_watchdog_post(void);
    +
    345 
    +
    349 #ifdef __cplusplus
    +
    350 }
    +
    351 #endif /* __cplusplus */
    +
    352 
    +
    353 #endif /* SL_IEC60730_WATCHDOG_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    SL_IEC60730_WATCHDOG_INVALID
    @ SL_IEC60730_WATCHDOG_INVALID
    Watchdog POST test not done.
    Definition: sl_iec60730_watchdog.h:125
    +
    sl_iec60730_test_watchdog_t
    sl_iec60730_test_watchdog_t
    State of watchdog testing.
    Definition: sl_iec60730_watchdog.h:124
    +
    sl_iec60730_watchdog_t
    Watchdog component configuration structure.
    Definition: sl_iec60730_watchdog.h:118
    +
    sl_iec60730_watchdog_t::SL_WDOG
    WDOG_TypeDef *const SL_WDOG
    Pointer to Watchdog instance.
    Definition: sl_iec60730_watchdog.h:119
    +
    SL_IEC60730_WATCHDOG_TESTING
    @ SL_IEC60730_WATCHDOG_TESTING
    Watchdog POST testing in progress.
    Definition: sl_iec60730_watchdog.h:126
    +
    sl_iec60730_watchdog_post
    sl_iec60730_test_result_t sl_iec60730_watchdog_post(void)
    +
    sl_iec60730_watchdog_t::rst
    uint32_t rst
    Watchdog reset cause value.
    Definition: sl_iec60730_watchdog.h:120
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    SL_IEC60730_WATCHDOG_VALID
    @ SL_IEC60730_WATCHDOG_VALID
    Watchdog POST test complete, watchdog valid.
    Definition: sl_iec60730_watchdog.h:127
    +
    iec60730_watchdog_state
    volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state
    +
    IEC60730_DATA_NO_CLEAR
    #define IEC60730_DATA_NO_CLEAR
    No clear at startup.
    Definition: sl_iec60730_toolchain.h:67
    + +
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    gpcrcsl_iec60730_imc_params_t
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    sl_iec60730_imc_params_t Struct Reference
    EFR32 IEC60730 Library » Invariable Memory Check
    +
    +
    + +

    This structure is used as configuration for IMC testing, that holds GPCRC Register. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + +

    +Public Attributes

    +sl_iec60730_crc_typedef * gpcrc
     GPCRC Register.
     
    +

    Detailed Description

    +

    This structure is used as configuration for IMC testing, that holds GPCRC Register.

    +
    The documentation for this struct was generated from the following file: +
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    number_of_test_regionssl_iec60730_imc_test_multiple_regions_t
    region (defined in sl_iec60730_imc_test_multiple_regions_t)sl_iec60730_imc_test_multiple_regions_t
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    sl_iec60730_imc_test_multiple_regions_t Struct Reference
    EFR32 IEC60730 Library » Invariable Memory Check
    +
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    #include <sl_iec60730.h>

    + + + + + + + +

    +Public Attributes

    +const sl_iec60730_imc_test_region_t * region
     
    +uint8_t number_of_test_regions
     Number of test regions.
     
    +

    Detailed Description

    +

    This structure is used for multiple test regions for IMC testing with the pointer pointing to the array containing the start and end values ​​of the regions you want to test and the number of regions you want to test.

    +
    The documentation for this struct was generated from the following file: +
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    endsl_iec60730_imc_test_region_t
    startsl_iec60730_imc_test_region_t
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    sl_iec60730_imc_test_region_t Struct Reference
    EFR32 IEC60730 Library » Invariable Memory Check
    +
    +
    + +

    This structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +uint32_t * start
     Start address of FLASH to check.
     
    +uint32_t * end
     End address of FLASH to check.
     
    +

    Detailed Description

    +

    This structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check.

    +
    The documentation for this struct was generated from the following file: +
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    irq_bounds (defined in sl_iec60730_irq_cfg_t)sl_iec60730_irq_cfg_t
    irq_count (defined in sl_iec60730_irq_cfg_t)sl_iec60730_irq_cfg_t
    size (defined in sl_iec60730_irq_cfg_t)sl_iec60730_irq_cfg_t
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    sl_iec60730_irq_cfg_t Struct Reference
    EFR32 IEC60730 Library » IRQ Check
    +
    +
    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +volatile SL_IEC60730_IRQ_TYPE_VARIABLE * irq_count
     
    +const sl_iec60730_irq_execution_bounds_t * irq_bounds
     
    +uint8_t size
     
    +

    Detailed Description

    +

    Struct contains a pointer variable point to the number of execution interrupts and the boundary of each interrupt count variable. OEMs use this structure to init value. Defines SL_IEC60730_IRQ_TYPE_VARIABLE using for set type variable irq_count. This count is used by the test to step through each entry in irq_bounds to determine if the count for each interrupt exceeds expected min/max bounds. OEM code is responsible for incrementing irq_count of this array corresponding to the IRQ described by the corresponding element in irq_bounds. The incrementing instruction should only be placed inside the IRQ referred to by the element. The element will be reset to 0 by the interrupt plausibility check executing in sl_iec60730_test_clock_tick(). The interrupt plausibility test, which executes at the end of a test clock period, compares the number of ISR executions for each ISR as defined in the irq_count array. A count outside the defined bounds results in a safe state entry.

    +
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    maxsl_iec60730_irq_execution_bounds_t
    minsl_iec60730_irq_execution_bounds_t
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    sl_iec60730_irq_execution_bounds_t Struct Reference
    EFR32 IEC60730 Library » IRQ Check
    +
    +
    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +SL_IEC60730_IRQ_TYPE_VARIABLE min
     Minimum expected executions of ISR. Can be 0-255, must be less than or equal to max.
     
    +SL_IEC60730_IRQ_TYPE_VARIABLE max
     Maximum executed executions of ISR. Can be 0-255, must be greater than or equal to min.
     
    +

    Detailed Description

    +

    OEMs use this structure to define the expected min and max number of executions for each interrupt included in a project.

    +
    The documentation for this struct was generated from the following file: +
    + +
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    irq_fail (defined in sl_iec60730_irq_fail_t)sl_iec60730_irq_fail_t
    num_irq_fail (defined in sl_iec60730_irq_fail_t)sl_iec60730_irq_fail_t
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    sl_iec60730_irq_fail_t Struct Reference
    EFR32 IEC60730 Library » IRQ Check
    +
    +
    + +

    #include <sl_iec60730.h>

    + + + + + + +

    +Public Attributes

    +uint32_t irq_fail
     
    +uint8_t num_irq_fail
     
    +

    Detailed Description

    +

    Struct contains information about the IRQ number and the location of the failed IRQ in the order of the OEM array

    +
    The documentation for this struct was generated from the following file: +
    + +
    +Generated by   +doxygen + 1.8.17 +
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    sl_iec60730_library_version_t Struct Reference
    EFR32 IEC60730 Library » POST
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    +Public Attributes

    +uint8_t major
     Major version.
     
    +uint8_t minor
     Minor version.
     
    +uint8_t revision
     Revision.
     
    +
    The documentation for this struct was generated from the following file: +
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    error (defined in sl_iec60730_safety_check_t)sl_iec60730_safety_check_t
    number_error (defined in sl_iec60730_safety_check_t)sl_iec60730_safety_check_t
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    sl_iec60730_safety_check_t Struct Reference
    EFR32 IEC60730 Library » BIST
    +
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    + +

    #include <sl_iec60730.h>

    + + + + + + +

    +Public Attributes

    +uint32_t error
     
    +uint8_t number_error
     
    +

    Detailed Description

    +

    typedef struct used to relay and remember status as bit field is type of local variable iec60730_safety_check save IEC60730 safety code error. When a failure is detected, function sl_iec60730_safety_check_error_occur is called by OEM and interrupt check functions to set iec60730_safety_check to type of sl_iec60730_test_failure_t.

    +
    The documentation for this struct was generated from the following file: +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/structsl__iec60730__update__crc__params__t-members.html b/docs/document_api_iec60730_library/structsl__iec60730__update__crc__params__t-members.html new file mode 100644 index 00000000..59b4e6ed --- /dev/null +++ b/docs/document_api_iec60730_library/structsl__iec60730__update__crc__params__t-members.html @@ -0,0 +1,83 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    halsl_iec60730_update_crc_params_t
    initsl_iec60730_update_crc_params_t
    readTypesl_iec60730_update_crc_params_t
    xorOutsl_iec60730_update_crc_params_t
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    + + diff --git a/docs/document_api_iec60730_library/structsl__iec60730__update__crc__params__t.html b/docs/document_api_iec60730_library/structsl__iec60730__update__crc__params__t.html new file mode 100644 index 00000000..89bc366c --- /dev/null +++ b/docs/document_api_iec60730_library/structsl__iec60730__update__crc__params__t.html @@ -0,0 +1,106 @@ + + + + + + + +Document API IEC60730 Library: sl_iec60730_update_crc_params_t Struct Reference + + + + + + + + + +
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    sl_iec60730_update_crc_params_t Struct Reference
    EFR32 IEC60730 Library » Invariable Memory Check
    +
    +
    + +

    #include <sl_iec60730.h>

    + + + + + + + + + + + + + + +

    +Public Attributes

    +sl_iec60730_imc_params_t hal
     struct sl_iec60730_imc_params_t that contain GPCRC Register
     
    +sl_iec60730_crc_init_typedef init
     CRC initialization structure.
     
    +sl_iec60730_read_type_t readType
     The way to read calculated CRC value.
     
    +sl_iec60730_crc_t xorOut
     XOR with calculated CRC value.
     
    +

    Detailed Description

    +

    This structure is used as configuration for CRC Buffer calculation. It used when using function sl_iec60730_update_crc_with_data_buffer

    Note
    Struct sl_iec60730_crc_init_typedef defined in header file "em_gpcrc.h"
    +
    The documentation for this struct was generated from the following file: +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/structsl__iec60730__vmc__test__multiple__regions__t-members.html b/docs/document_api_iec60730_library/structsl__iec60730__vmc__test__multiple__regions__t-members.html new file mode 100644 index 00000000..9ec1a1d0 --- /dev/null +++ b/docs/document_api_iec60730_library/structsl__iec60730__vmc__test__multiple__regions__t-members.html @@ -0,0 +1,81 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    number_of_test_regionssl_iec60730_vmc_test_multiple_regions_t
    region (defined in sl_iec60730_vmc_test_multiple_regions_t)sl_iec60730_vmc_test_multiple_regions_t
    + +
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    sl_iec60730_vmc_test_multiple_regions_t Struct Reference
    EFR32 IEC60730 Library » Variable Memory Check
    +
    +
    + +

    This structure is used as multiple test regions for VMC testing. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + + + +

    +Public Attributes

    +const sl_iec60730_vmc_test_region_t * region
     
    +uint8_t number_of_test_regions
     Number of test regions.
     
    +

    Detailed Description

    +

    This structure is used as multiple test regions for VMC testing.

    +
    The documentation for this struct was generated from the following file: +
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    +Generated by   +doxygen + 1.8.17 +
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    endsl_iec60730_vmc_test_region_t
    startsl_iec60730_vmc_test_region_t
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/structsl__iec60730__vmc__test__region__t.html b/docs/document_api_iec60730_library/structsl__iec60730__vmc__test__region__t.html new file mode 100644 index 00000000..faf96dac --- /dev/null +++ b/docs/document_api_iec60730_library/structsl__iec60730__vmc__test__region__t.html @@ -0,0 +1,101 @@ + + + + + + + +Document API IEC60730 Library: sl_iec60730_vmc_test_region_t Struct Reference + + + + + + + + + +
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    sl_iec60730_vmc_test_region_t Struct Reference
    EFR32 IEC60730 Library » Variable Memory Check
    +
    +
    + +

    This structure is used as configuration for VMC testing. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +uint32_t * start
     Start address of RAM to check.
     
    +uint32_t * end
     End address of RAM to check.
     
    +

    Detailed Description

    +

    This structure is used as configuration for VMC testing.

    +
    The documentation for this struct was generated from the following file: +
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    SL_WDOGsl_iec60730_watchdog_t
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    sl_iec60730_watchdog_t Struct Reference
    EFR32 IEC60730 Library » Watchdog Check
    +
    +
    + +

    Watchdog component configuration structure. + More...

    + +

    #include <sl_iec60730_watchdog.h>

    + + + + + + + + +

    +Public Attributes

    +WDOG_TypeDef *const SL_WDOG
     Pointer to Watchdog instance.
     
    +uint32_t rst
     Watchdog reset cause value.
     
    +

    Detailed Description

    +

    Watchdog component configuration structure.

    +
    The documentation for this struct was generated from the following file: +
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    unit_test_common.h File Reference
    +
    +
    + +

    common unit test api +More...

    +
    #include <stdint.h>
    +#include <string.h>
    +#include <stdbool.h>
    +#include "unity.h"
    +#include "sl_iec60730_internal.h"
    +
    +

    Go to the source code of this file.

    + + + + +

    +Macros

    +#define MAX_NUMBER_OF_TEST_CASE   20
     
    + + + + + + + + + + + + + + + +

    +Functions

    +void run_test (UnityTestFunction func, const char *name, UNITY_LINE_TYPE line_num)
     
    +void setUp (void)
     
    +void tearDown (void)
     
    +void resetTest (void)
     
    void cmock_set_value (sl_iec60730_test_result_t sl_iec60730_test_result_t)
     
    sl_iec60730_test_result_t cmock_return_value (void)
     
    void unit_test_run_all_test_cases (void)
     
    + + + + + +

    +Variables

    +uint8_t test_case_result [MAX_NUMBER_OF_TEST_CASE]
     
    +uint8_t current_test_numth
     
    +

    Detailed Description

    +

    common unit test api

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +

    Function Documentation

    + +

    ◆ cmock_return_value()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t cmock_return_value (void )
    +
    +

    Public Function get value simulate value function mock return.

    +
    Returns
    None.
    + +
    +
    + +

    ◆ cmock_set_value()

    + +
    +
    + + + + + + + + +
    void cmock_set_value (sl_iec60730_test_result_t sl_iec60730_test_result_t)
    +
    +

    Public Function set value simulate value function mock return.

    +
    Returns
    None.
    + +
    +
    + +

    ◆ unit_test_run_all_test_cases()

    + +
    +
    + + + + + + + + +
    void unit_test_run_all_test_cases (void )
    +
    +

    Public Function runs all unit test cases.

    +
    Returns
    None.
    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/unit__test__common_8h_source.html b/docs/document_api_iec60730_library/unit__test__common_8h_source.html new file mode 100644 index 00000000..3fd853cc --- /dev/null +++ b/docs/document_api_iec60730_library/unit__test__common_8h_source.html @@ -0,0 +1,119 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_common.h Source File + + + + + + + + + +
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    1 /***************************************************************************/
    +
    18 #ifndef _TEST_COMMON_H
    +
    19 #define _TEST_COMMON_H
    +
    20 
    +
    21 #include <stdint.h>
    +
    22 #include <string.h>
    +
    23 #include <stdbool.h>
    +
    24 #include "unity.h"
    +
    25 #include "sl_iec60730_internal.h"
    +
    26 
    +
    27 /*=======Result test case=====*/
    +
    28 #define MAX_NUMBER_OF_TEST_CASE 20
    +
    29 
    +
    30 extern uint8_t test_case_result[MAX_NUMBER_OF_TEST_CASE];
    +
    31 extern uint8_t current_test_numth;
    +
    32 
    +
    33 /*=======Test Runner Used To Run Each Test=====*/
    +
    34 extern void run_test(UnityTestFunction func, const char* name, UNITY_LINE_TYPE line_num);
    +
    35 /*=======Test Reset Options=====*/
    +
    36 extern void setUp(void);
    +
    37 extern void tearDown(void);
    +
    38 extern void resetTest(void);
    +
    39 /*=======Mock Management=====*/
    +
    40 
    +
    41 /**************************************************************************/
    +
    47 extern void cmock_set_value(sl_iec60730_test_result_t sl_iec60730_test_result_t);
    +
    48 
    +
    49 /**************************************************************************/
    +
    55 extern sl_iec60730_test_result_t cmock_return_value(void);
    +
    56 
    +
    57 /**************************************************************************/
    +
    63 extern void unit_test_run_all_test_cases(void);
    +
    64 
    +
    65 #endif // _TEST_COMMON_H
    +
    +
    cmock_return_value
    sl_iec60730_test_result_t cmock_return_value(void)
    +
    sl_iec60730_internal.h
    Internal definitions.
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    cmock_set_value
    void cmock_set_value(sl_iec60730_test_result_t sl_iec60730_test_result_t)
    +
    unit_test_run_all_test_cases
    void unit_test_run_all_test_cases(void)
    + +
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    + + diff --git a/docs/document_api_iec60730_library/unit__test__iec60730__bist_8h.html b/docs/document_api_iec60730_library/unit__test__iec60730__bist_8h.html new file mode 100644 index 00000000..18cd4684 --- /dev/null +++ b/docs/document_api_iec60730_library/unit__test__iec60730__bist_8h.html @@ -0,0 +1,103 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_iec60730_bist.h File Reference + + + + + + + + + +
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    unit_test_iec60730_bist.h File Reference
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    + +

    Unit test function sl_iec60730_bist(). +More...

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    +Functions

    void test_sl_iec60730_bist_pass_all_check_condition (void)
     
    void test_sl_iec60730_bist_failed_check_condition (void)
     
    void test_iec60730_safety_check_error_occur (void)
     
    +

    Detailed Description

    +

    Unit test function sl_iec60730_bist().

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    + + diff --git a/docs/document_api_iec60730_library/unit__test__iec60730__bist_8h_source.html b/docs/document_api_iec60730_library/unit__test__iec60730__bist_8h_source.html new file mode 100644 index 00000000..5f616ba5 --- /dev/null +++ b/docs/document_api_iec60730_library/unit__test__iec60730__bist_8h_source.html @@ -0,0 +1,101 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_iec60730_bist.h Source File + + + + + + + + + +
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    unit_test_iec60730_bist.h
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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_BIST_H
    +
    35 #define UNIT_TEST_IEC60730_BIST_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_bist_pass_all_check_condition(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_bist_failed_check_condition(void);
    +
    60 
    +
    61 /**************************************************************************/
    +
    70 void test_iec60730_safety_check_error_occur(void);
    +
    71 
    +
    72 #endif // UNIT_TEST_IEC60730_BIST_H
    +
    73 
    +
    +
    test_sl_iec60730_bist_failed_check_condition
    void test_sl_iec60730_bist_failed_check_condition(void)
    +
    test_sl_iec60730_bist_pass_all_check_condition
    void test_sl_iec60730_bist_pass_all_check_condition(void)
    +
    test_iec60730_safety_check_error_occur
    void test_iec60730_safety_check_error_occur(void)
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/unit__test__iec60730__cpu__registers_8h.html b/docs/document_api_iec60730_library/unit__test__iec60730__cpu__registers_8h.html new file mode 100644 index 00000000..4665a4ca --- /dev/null +++ b/docs/document_api_iec60730_library/unit__test__iec60730__cpu__registers_8h.html @@ -0,0 +1,109 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_iec60730_cpu_registers.h File Reference + + + + + + + + + +
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    Unit tests for functions in cpu registers module. +More...

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    Go to the source code of this file.

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    void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_failed_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in cpu registers module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    + + diff --git a/docs/document_api_iec60730_library/unit__test__iec60730__cpu__registers_8h_source.html b/docs/document_api_iec60730_library/unit__test__iec60730__cpu__registers_8h_source.html new file mode 100644 index 00000000..4a86d71f --- /dev/null +++ b/docs/document_api_iec60730_library/unit__test__iec60730__cpu__registers_8h_source.html @@ -0,0 +1,113 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_iec60730_cpu_registers.h Source File + + + + + + + + + +
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    unit_test_iec60730_cpu_registers.h
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    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_CPU_REGISTERS_H
    +
    35 #define UNIT_TEST_IEC60730_CPU_REGISTERS_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_cpu_registers_bist_failed_check_condition(void);
    +
    60 
    +
    61 /**************************************************************************/
    +
    71 void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition(void);
    +
    72 
    +
    73 /**************************************************************************/
    +
    83 void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition(void);
    +
    84 
    +
    85 /**************************************************************************/
    +
    95 void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition(void);
    +
    96 
    +
    97 /**************************************************************************/
    +
    107 void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition(void);
    +
    108 
    +
    109 #endif // UNIT_TEST_IEC60730_CPU_REGISTERS_H
    +
    110 
    +
    +
    test_sl_iec60730_cpu_registers_bist_s_failed_check_condition
    void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition
    void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_pass_all_check_condition
    void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_failed_check_condition
    void test_sl_iec60730_cpu_registers_bist_failed_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition
    void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition
    void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition(void)
    + +
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    + +

    Unit tests for functions in invariable memory module. +More...

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    #include <stdint.h>
    +#include <stdbool.h>
    +#include "sl_iec60730_internal.h"
    +
    +

    Go to the source code of this file.

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    uint32_t * unit_test_iec60730_imc_mock_init_run_crc (void)
     
    sl_iec60730_test_result_t unit_test_mock_check_integrity (void)
     
    bool unit_test_iec60730_imc_mock_enable_gpcrc (void)
     
    bool unit_test_iec60730_imc_mock_sw_enable_cal_crc (void)
     
    void test_sl_iec60730_imc_init_param_null (void)
     
    void test_sl_iec60730_imc_post_pass_check (void)
     
    void test_sl_iec60730_imc_post_fail_check (void)
     
    void test_sl_iec60730_imc_bist_pass_all_check (void)
     
    void test_sl_iec60730_imc_bist_fail_check_integrity (void)
     
    void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address (void)
     
    void test_sl_iec60730_imc_bist_fail_compare_crc (void)
     
    void test_sl_iec60730_update_crc_with_data_buffer_params_null (void)
     
    void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in invariable memory module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_INVARIABLE_MEMORY_H
    +
    35 #define UNIT_TEST_IEC60730_INVARIABLE_MEMORY_H
    +
    36 
    +
    37 #include <stdint.h>
    +
    38 #include <stdbool.h>
    +
    39 #include "sl_iec60730_internal.h"
    +
    40 
    +
    41 /*======= External Functions =====*/
    +
    42 
    +
    43 /**************************************************************************/
    +
    49 extern uint32_t* unit_test_iec60730_imc_mock_init_run_crc(void);
    +
    50 
    +
    51 /**************************************************************************/
    +
    57 extern sl_iec60730_test_result_t unit_test_mock_check_integrity(void);
    +
    58 
    +
    59 /**************************************************************************/
    +
    65 extern bool unit_test_iec60730_imc_mock_enable_gpcrc(void);
    +
    66 
    +
    67 /**************************************************************************/
    +
    73 extern bool unit_test_iec60730_imc_mock_sw_enable_cal_crc(void);
    +
    74 
    +
    75 /**************************************************************************/
    +
    84 void test_sl_iec60730_imc_init_param_null(void);
    +
    85 
    +
    86 /**************************************************************************/
    +
    95 void test_sl_iec60730_imc_post_pass_check(void);
    +
    96 
    +
    97 /**************************************************************************/
    +
    108 void test_sl_iec60730_imc_post_fail_check(void);
    +
    109 
    +
    110 /**************************************************************************/
    +
    121 void test_sl_iec60730_imc_bist_pass_all_check(void);
    +
    122 
    +
    123 /**************************************************************************/
    +
    134 void test_sl_iec60730_imc_bist_pass_all_check(void);
    +
    135 
    +
    136 /**************************************************************************/
    +
    144 void test_sl_iec60730_imc_bist_fail_check_integrity(void);
    +
    145 
    +
    146 /**************************************************************************/
    +
    155 void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address(void);
    +
    156 
    +
    157 /**************************************************************************/
    +
    168 void test_sl_iec60730_imc_bist_fail_compare_crc(void);
    +
    169 
    +
    170 /**************************************************************************/
    +
    179 void test_sl_iec60730_update_crc_with_data_buffer_params_null(void);
    +
    180 
    +
    181 /**************************************************************************/
    +
    189 void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc(void);
    +
    190 
    +
    191 #endif // UNIT_TEST_IEC60730_INVARIABLE_MEMORY_H
    +
    192 
    +
    +
    test_sl_iec60730_imc_init_param_null
    void test_sl_iec60730_imc_init_param_null(void)
    +
    unit_test_mock_check_integrity
    sl_iec60730_test_result_t unit_test_mock_check_integrity(void)
    +
    test_sl_iec60730_imc_bist_fail_check_integrity
    void test_sl_iec60730_imc_bist_fail_check_integrity(void)
    +
    test_sl_iec60730_update_crc_with_data_buffer_params_null
    void test_sl_iec60730_update_crc_with_data_buffer_params_null(void)
    +
    sl_iec60730_internal.h
    Internal definitions.
    +
    unit_test_iec60730_imc_mock_sw_enable_cal_crc
    bool unit_test_iec60730_imc_mock_sw_enable_cal_crc(void)
    +
    test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address
    void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address(void)
    +
    unit_test_iec60730_imc_mock_enable_gpcrc
    bool unit_test_iec60730_imc_mock_enable_gpcrc(void)
    +
    test_sl_iec60730_imc_bist_fail_compare_crc
    void test_sl_iec60730_imc_bist_fail_compare_crc(void)
    +
    test_sl_iec60730_imc_bist_pass_all_check
    void test_sl_iec60730_imc_bist_pass_all_check(void)
    +
    test_sl_iec60730_imc_post_pass_check
    void test_sl_iec60730_imc_post_pass_check(void)
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    test_sl_iec60730_update_crc_with_data_buffer_calculation_crc
    void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc(void)
    +
    unit_test_iec60730_imc_mock_init_run_crc
    uint32_t * unit_test_iec60730_imc_mock_init_run_crc(void)
    +
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    void test_sl_iec60730_irq_init_param_null (void)
     
    void test_sl_iec60730_irq_init_param_size_greater_than_max_irq (void)
     
    void test_sl_iec60730_irq_check_count_in_bound (void)
     
    void test_sl_iec60730_irq_check_count_out_bound (void)
     
    void test_sl_iec60730_irq_reset_counter (void)
     
    void test_sl_iec60730_irq_fail_occur (void)
     
    void test_sl_iec60730_irq_reset_fail_result (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in irq module.

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    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_IRQ_H
    +
    35 #define UNIT_TEST_IEC60730_IRQ_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_irq_init_param_null(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_irq_init_param_size_greater_than_max_irq(void);
    +
    60 
    +
    61 /**************************************************************************/
    +
    71 void test_sl_iec60730_irq_check_count_in_bound(void);
    +
    72 
    +
    73 /**************************************************************************/
    +
    83 void test_sl_iec60730_irq_check_count_out_bound(void);
    +
    84 
    +
    85 /**************************************************************************/
    +
    94 void test_sl_iec60730_irq_reset_counter(void);
    +
    95 
    +
    96 /**************************************************************************/
    +
    105 void test_sl_iec60730_irq_fail_occur(void);
    +
    106 
    +
    107 /**************************************************************************/
    +
    117 void test_sl_iec60730_irq_reset_fail_result(void);
    +
    118 
    +
    119 #endif // UNIT_TEST_IEC60730_IRQ_H
    +
    120 
    +
    +
    test_sl_iec60730_irq_reset_counter
    void test_sl_iec60730_irq_reset_counter(void)
    +
    test_sl_iec60730_irq_init_param_size_greater_than_max_irq
    void test_sl_iec60730_irq_init_param_size_greater_than_max_irq(void)
    +
    test_sl_iec60730_irq_init_param_null
    void test_sl_iec60730_irq_init_param_null(void)
    +
    test_sl_iec60730_irq_check_count_out_bound
    void test_sl_iec60730_irq_check_count_out_bound(void)
    +
    test_sl_iec60730_irq_reset_fail_result
    void test_sl_iec60730_irq_reset_fail_result(void)
    +
    test_sl_iec60730_irq_check_count_in_bound
    void test_sl_iec60730_irq_check_count_in_bound(void)
    +
    test_sl_iec60730_irq_fail_occur
    void test_sl_iec60730_irq_fail_occur(void)
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    void test_sl_iec60730_post_pass_all_check_condition (void)
     
    void test_sl_iec60730_post_failed_check_condition (void)
     
    +

    Detailed Description

    +

    Unit test function sl_iec60730_post().

    +

    +License

    +

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    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_POST_H
    +
    35 #define UNIT_TEST_IEC60730_POST_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_post_pass_all_check_condition(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_post_failed_check_condition(void);
    +
    60 
    +
    61 #endif // UNIT_TEST_IEC60730_POST_H
    +
    62 
    +
    +
    test_sl_iec60730_post_failed_check_condition
    void test_sl_iec60730_post_failed_check_condition(void)
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    void test_sl_iec60730_program_counter_fail_some_bit_check (void)
     
    +

    Detailed Description

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    Unit test function sl_iec60730_program_counter_test().

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    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_PROGRAM_COUNTER_H
    +
    35 #define UNIT_TEST_IEC60730_PROGRAM_COUNTER_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_program_counter_complete_all_bit_check(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_program_counter_fail_some_bit_check(void);
    +
    60 
    +
    61 #endif // UNIT_TEST_IEC60730_PROGRAM_COUNTER_H
    +
    62 
    +
    +
    test_sl_iec60730_program_counter_complete_all_bit_check
    void test_sl_iec60730_program_counter_complete_all_bit_check(void)
    +
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    void test_sl_iec60730_safety_check_error_occur (void)
     
    void test_sl_iec60730_safety_check_reset_error (void)
     
    +

    Detailed Description

    +

    Unit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().

    +

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    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    35 #define UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    49 void test_sl_iec60730_safety_check_error_occur(void);
    +
    50 
    +
    51 /**************************************************************************/
    +
    60 void test_sl_iec60730_safety_check_reset_error(void);
    +
    61 
    +
    62 #endif // UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    63 
    +
    +
    test_sl_iec60730_safety_check_error_occur
    void test_sl_iec60730_safety_check_error_occur(void)
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    void test_sl_iec60730_test_clock_tick_timer_test_disable (void)
     
    void test_sl_iec60730_test_clock_tick_count_in_bound (void)
     
    void test_sl_iec60730_test_clock_tick_count_out_bound (void)
     
    void test_sl_iec60730_sys_clock_count_reset (void)
     
    void test_sl_iec60730_test_clock_tick_test_clock_multiplier (void)
     
    void test_sl_iec60730_get_number_test_timer_tick (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in system_clock module.

    +

    +License

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    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    35 #define UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_test_clock_tick_timer_test_disable(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    61 void test_sl_iec60730_test_clock_tick_count_in_bound(void);
    +
    62 
    +
    63 /**************************************************************************/
    +
    74 void test_sl_iec60730_test_clock_tick_count_out_bound(void);
    +
    75 
    +
    76 /**************************************************************************/
    +
    88 void test_sl_iec60730_sys_clock_count_reset(void);
    +
    89 
    +
    90 /**************************************************************************/
    +
    100 void test_sl_iec60730_test_clock_tick_test_clock_multiplier(void);
    +
    101 
    +
    102 /**************************************************************************/
    +
    111 void test_sl_iec60730_get_number_test_timer_tick(void);
    +
    112 
    +
    113 #endif // UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    114 
    +
    +
    test_sl_iec60730_test_clock_tick_count_in_bound
    void test_sl_iec60730_test_clock_tick_count_in_bound(void)
    +
    test_sl_iec60730_get_number_test_timer_tick
    void test_sl_iec60730_get_number_test_timer_tick(void)
    +
    test_sl_iec60730_test_clock_tick_count_out_bound
    void test_sl_iec60730_test_clock_tick_count_out_bound(void)
    +
    test_sl_iec60730_test_clock_tick_timer_test_disable
    void test_sl_iec60730_test_clock_tick_timer_test_disable(void)
    +
    test_sl_iec60730_test_clock_tick_test_clock_multiplier
    void test_sl_iec60730_test_clock_tick_test_clock_multiplier(void)
    +
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    Unit tests for functions in variable memory module. +More...

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    +Functions

    sl_iec60730_test_result_t unit_test_mock_check_integrity (void)
     
    void test_sl_iec60730_vmc_init_param_null (void)
     
    void test_sl_iec60730_vmc_init_start_address_greater_than_end_address (void)
     
    void test_sl_iec60730_vmc_post_pass_all_check_sections (void)
     
    void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section (void)
     
    void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section (void)
     
    void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section (void)
     
    void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section (void)
     
    void test_sl_iec60730_vmc_bist_pass_all_check_sections (void)
     
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section (void)
     
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section (void)
     
    void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section (void)
     
    void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section (void)
     
    void test_sl_iec60730_vmc_bist_checking_allow_run_test (void)
     
    void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in variable memory module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    + + diff --git a/docs/document_api_iec60730_library/unit__test__iec60730__variable__memory_8h_source.html b/docs/document_api_iec60730_library/unit__test__iec60730__variable__memory_8h_source.html new file mode 100644 index 00000000..41dff707 --- /dev/null +++ b/docs/document_api_iec60730_library/unit__test__iec60730__variable__memory_8h_source.html @@ -0,0 +1,150 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_iec60730_variable_memory.h Source File + + + + + + + + + +
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    unit_test_iec60730_variable_memory.h
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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_VARIABLE_MEMORY_H
    +
    35 #define UNIT_TEST_IEC60730_VARIABLE_MEMORY_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    47 extern sl_iec60730_test_result_t unit_test_mock_check_integrity(void);
    +
    48 
    +
    49 /**************************************************************************/
    +
    58 void test_sl_iec60730_vmc_init_param_null(void);
    +
    59 
    +
    60 /**************************************************************************/
    +
    69 void test_sl_iec60730_vmc_init_start_address_greater_than_end_address(void);
    +
    70 
    +
    71 /**************************************************************************/
    +
    81 void test_sl_iec60730_vmc_post_pass_all_check_sections(void);
    +
    82 
    +
    83 /**************************************************************************/
    +
    92 void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section(void);
    +
    93 
    +
    94 /**************************************************************************/
    +
    103 void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section(void);
    +
    104 
    +
    105 /**************************************************************************/
    +
    115 void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section(void);
    +
    116 
    +
    117 /**************************************************************************/
    +
    127 void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section(void);
    +
    128 
    +
    129 /**************************************************************************/
    +
    139 void test_sl_iec60730_vmc_bist_pass_all_check_sections(void);
    +
    140 
    +
    141 /**************************************************************************/
    +
    150 void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section(void);
    +
    151 
    +
    152 /**************************************************************************/
    +
    161 void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section(void);
    +
    162 
    +
    163 /**************************************************************************/
    +
    173 void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section(void);
    +
    174 
    +
    175 /**************************************************************************/
    +
    185 void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section(void);
    +
    186 
    +
    187 /**************************************************************************/
    +
    197 void test_sl_iec60730_vmc_bist_checking_allow_run_test(void);
    +
    198 
    +
    199 /**************************************************************************/
    +
    208 void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow(void);
    +
    209 
    +
    210 #endif // UNIT_TEST_IEC60730_VARIABLE_MEMORY_H
    +
    211 
    +
    +
    test_sl_iec60730_vmc_post_fail_marchc_check_backup_section
    void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section(void)
    +
    test_sl_iec60730_vmc_bist_pass_all_check_sections
    void test_sl_iec60730_vmc_bist_pass_all_check_sections(void)
    +
    test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section
    void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section(void)
    +
    test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section
    void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section(void)
    +
    test_sl_iec60730_vmc_post_fail_check_integrity_ram_section
    void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section(void)
    +
    test_sl_iec60730_vmc_init_start_address_greater_than_end_address
    void test_sl_iec60730_vmc_init_start_address_greater_than_end_address(void)
    +
    test_sl_iec60730_vmc_bist_fail_stack_test_over_flow
    void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow(void)
    +
    test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section(void)
    +
    test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section(void)
    +
    test_sl_iec60730_vmc_post_fail_marchc_check_ram_section
    void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section(void)
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    test_sl_iec60730_vmc_post_fail_check_integrity_backup_section
    void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section(void)
    +
    test_sl_iec60730_vmc_post_pass_all_check_sections
    void test_sl_iec60730_vmc_post_pass_all_check_sections(void)
    +
    test_sl_iec60730_vmc_bist_checking_allow_run_test
    void test_sl_iec60730_vmc_bist_checking_allow_run_test(void)
    +
    test_sl_iec60730_vmc_init_param_null
    void test_sl_iec60730_vmc_init_param_null(void)
    +
    unit_test_mock_check_integrity
    sl_iec60730_test_result_t unit_test_mock_check_integrity(void)
    + +
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    + + diff --git a/docs/document_api_iec60730_library/unit__test__iec60730__watchdog_8h.html b/docs/document_api_iec60730_library/unit__test__iec60730__watchdog_8h.html new file mode 100644 index 00000000..104d11b8 --- /dev/null +++ b/docs/document_api_iec60730_library/unit__test__iec60730__watchdog_8h.html @@ -0,0 +1,125 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_iec60730_watchdog.h File Reference + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Functions
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    unit_test_iec60730_watchdog.h File Reference
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    + +

    Unit tests for functions in watchdog module. +More...

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    Go to the source code of this file.

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    +Functions

    void unit_test_iec60730_watchdog_set_up (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_por (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_em4 (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_wdog0 (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_wdog1 (void)
     
    bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min (void)
     
    void unit_test_iec60730_watchdog_mock_rstcause_clear (void)
     
    uint32_t unit_test_iec60730_watchdog_mock_rstcause (void)
     
    void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog (void)
     
    void test_sl_iec60730_watchdog_post_wachdog_reset_before_por (void)
     
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success (void)
     
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail (void)
     
    void test_sl_iec60730_watchdog_post_reset_resason_no_valid (void)
     
    void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in watchdog module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/docs/document_api_iec60730_library/unit__test__iec60730__watchdog_8h_source.html b/docs/document_api_iec60730_library/unit__test__iec60730__watchdog_8h_source.html new file mode 100644 index 00000000..8d5338ea --- /dev/null +++ b/docs/document_api_iec60730_library/unit__test__iec60730__watchdog_8h_source.html @@ -0,0 +1,145 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_iec60730_watchdog.h Source File + + + + + + + + + +
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    unit_test_iec60730_watchdog.h
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    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_WATCHDOG_H
    +
    35 #define UNIT_TEST_IEC60730_WATCHDOG_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    46 void unit_test_iec60730_watchdog_set_up(void);
    +
    47 
    +
    48 /**************************************************************************/
    +
    55 bool unit_test_iec60730_watchdog_mock_rst_por(void);
    +
    56 
    +
    57 /**************************************************************************/
    +
    64 bool unit_test_iec60730_watchdog_mock_rst_em4(void);
    +
    65 
    +
    66 /**************************************************************************/
    +
    73 bool unit_test_iec60730_watchdog_mock_rst_wdog0(void);
    +
    74 
    +
    75 /**************************************************************************/
    +
    82 bool unit_test_iec60730_watchdog_mock_rst_wdog1(void);
    +
    83 
    +
    84 /**************************************************************************/
    +
    91 bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min(void);
    +
    92 
    +
    93 /**************************************************************************/
    +
    100 void unit_test_iec60730_watchdog_mock_rstcause_clear(void);
    +
    101 
    +
    102 /**************************************************************************/
    +
    109 uint32_t unit_test_iec60730_watchdog_mock_rstcause(void);
    +
    110 
    +
    111 /**************************************************************************/
    +
    120 void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog(void);
    +
    121 
    +
    122 /**************************************************************************/
    +
    131 void test_sl_iec60730_watchdog_post_wachdog_reset_before_por(void);
    +
    132 
    +
    133 /**************************************************************************/
    +
    146 void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success(void);
    +
    147 
    +
    148 /**************************************************************************/
    +
    159 void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail(void);
    +
    160 
    +
    161 /**************************************************************************/
    +
    174 void test_sl_iec60730_watchdog_post_reset_resason_no_valid(void);
    +
    175 
    +
    176 /**************************************************************************/
    +
    188 void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value(void);
    +
    189 
    +
    190 #endif // UNIT_TEST_IEC60730_WATCHDOG_H
    +
    191 
    +
    +
    unit_test_iec60730_watchdog_mock_rst_wdog0
    bool unit_test_iec60730_watchdog_mock_rst_wdog0(void)
    +
    unit_test_iec60730_watchdog_mock_rstcause_clear
    void unit_test_iec60730_watchdog_mock_rstcause_clear(void)
    +
    test_sl_iec60730_watchdog_post_wachdog_reset_before_por
    void test_sl_iec60730_watchdog_post_wachdog_reset_before_por(void)
    +
    unit_test_iec60730_watchdog_set_up
    void unit_test_iec60730_watchdog_set_up(void)
    +
    unit_test_iec60730_watchdog_mock_rstcause
    uint32_t unit_test_iec60730_watchdog_mock_rstcause(void)
    +
    unit_test_iec60730_watchdog_mock_rst_em4
    bool unit_test_iec60730_watchdog_mock_rst_em4(void)
    +
    test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value
    void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value(void)
    +
    test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog
    void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog(void)
    +
    test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail(void)
    +
    unit_test_iec60730_watchdog_mock_rst_por
    bool unit_test_iec60730_watchdog_mock_rst_por(void)
    +
    test_sl_iec60730_watchdog_post_reset_resason_no_valid
    void test_sl_iec60730_watchdog_post_reset_resason_no_valid(void)
    +
    test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success(void)
    +
    unit_test_iec60730_watchdog_mock_rst_wdog1
    bool unit_test_iec60730_watchdog_mock_rst_wdog1(void)
    +
    unit_test_iec60730_watchdog_mock_set_watchdog_timout_min
    bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min(void)
    + +
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    + + diff --git a/docs/document_api_iec60730_library/variable_memory_check_bist_flowchart.png b/docs/document_api_iec60730_library/variable_memory_check_bist_flowchart.png new file mode 100644 index 00000000..e1b380c1 Binary files /dev/null and b/docs/document_api_iec60730_library/variable_memory_check_bist_flowchart.png differ diff --git a/docs/document_api_iec60730_library/variable_memory_check_example_flowchart.png b/docs/document_api_iec60730_library/variable_memory_check_example_flowchart.png new file mode 100644 index 00000000..3f951c1c Binary files /dev/null and b/docs/document_api_iec60730_library/variable_memory_check_example_flowchart.png differ diff --git a/docs/document_api_iec60730_library/variable_memory_check_post_flowchart.png b/docs/document_api_iec60730_library/variable_memory_check_post_flowchart.png new file mode 100644 index 00000000..c5826c00 Binary files /dev/null and b/docs/document_api_iec60730_library/variable_memory_check_post_flowchart.png differ diff --git a/docs/document_api_iec60730_library/watchdog_flowchart.png b/docs/document_api_iec60730_library/watchdog_flowchart.png new file mode 100644 index 00000000..5810dcc8 Binary files /dev/null and b/docs/document_api_iec60730_library/watchdog_flowchart.png differ diff --git a/docs/guideline_for_running_integration_test.md b/docs/guideline_for_running_integration_test.md new file mode 100644 index 00000000..c9e2f173 --- /dev/null +++ b/docs/guideline_for_running_integration_test.md @@ -0,0 +1,302 @@ +# Guideline for running integration test + +## Export Variable + +> [!NOTE] +> Before running CMake, you need to export some variables first. + +Export SDK_PATH=, TOOL_DIRS=, TOOL_CHAINS, FLASH_REGIONS_TEST (flash start address support calculate CRC for module invariable memory), JLINK_PATH and path to `slc-cli` tool a before run config CMake. + +If you want to calculate from the start address to the end address of Flash: + +```sh +$ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk +$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin +$ export TOOL_CHAINS=GCC +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export PATH=$PATH:/media/slc_cli/slc_cli_linux_check/slc_cli +$ export FLASH_REGIONS_TEST=0x8000000 +``` + +Or if you want to calculate multiple regions: + +```sh +$ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" +``` + +with FLASH_REGIONS_TEST=0x8000000 is the flash start address of board name brd4187c (chip EFR32MG24) + +To run integration tests manually, for the watchdog module, you need to connect the device to ethernet. Export CHIP, ADAPTER_SN, LST_PATH, JLINK_PATH, and the device's IP address and run the test script, for example: + +```sh +$ export CHIP=EFR32MG24BXXXF1536 ADAPTER_SN=440111030 +$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/S +``` + +If test secure peripherals or non-secure peripherals: + +```sh +$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/NS +``` + +```sh +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export HOST_IP=192.168.1.69 +``` + +> [!NOTE] +> Environment variables need to be exported during test execution: +>> export TOOL_CHAINS= (IAR or GCC) +>> +>> export TOOL_DIRS= +>> +>> export FLASH_REGIONS_TEST= +>> +>> export HOST_IP= +>> +>> export JLINK_PATH= + +## Build test for IAR tool + +To build tests for the IAR tool, if you run a manual test, you must run the pre-build command below. + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=${BOARD_NAME} $OPTION_PRE_BUILD_IAR_TOOL +$ cd .. +$ make prepare +``` +> [!NOTE] +> Keep `$OPTION_PRE_BUILD_IAR_TOOL` the same when running the integration test CMake config + +For example, build integration test: + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake ..  -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=brd4187c -DINTEGRATION_TEST_WDOG1_ENABLE=ON  -DENABLE_INTEGRATION_TESTING=ON -DINTEGRATION_TEST_USE_MARCHX_DISABLE=ON -DENABLE_CRC_USE_SW=ON -DENABLE_CAL_CRC_32=ON +$ cd .. +$ make prepare +``` + +or you can run bash script `pre_build_iar.sh` in path [./../simplicity_sdk/pre_build_iar.sh]() with: + +- $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48 +- $2: OPTION_INTEGRATION_TEST: -DENABLE_INTEGRATION_TESTING=ON, etc... + +```sh +$ bash pre_build_iar.sh $BOARD_NAME $OPTION_INTEGRATION_TEST +``` + +For example: + +```sh +$ bash pre_build_iar.sh brd4187c "-DENABLE_INTEGRATION_TESTING=ON" +``` + +## Manually run integration tests + +CMake config + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DBOARD_NAME=brd4187c +``` + +CMake Build + +```sh +$ cmake --build . --target integration_test_info -j4 +``` + +or + +```sh +$ make integration_test_info -j4 +``` + +To support running integration tests for the watchdog module, there are 2 options when running the CMake config: + +- TEST_SECURE_PERIPHERALS_ENABLE: enable test secure peripherals + +- INTEGRATION_TEST_WDOG1_ENABLE: enable watchdog 1 to test if the device supports + +To support running integration tests for the variable memory module, there is 1 option when running CMake config: + +- INTEGRATION_TEST_USE_MARCHX_DISABLE: disable using MarchX algorithm + +By default when testing the variable memory module, enable using the MarchX algorithm. For example: + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DINTEGRATION_TEST_USE_MARCHX_DISABLE=ON -DBOARD_NAME=brd4187c +``` + +For devices that have a Trust zone implemented, secure and non-secure peripherals need to be tested. +Default enable checks non-secure peripherals. To check secure peripherals enable this option when running CMake config: TEST_SECURE_PERIPHERALS_ENABLE. For example: + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DTEST_SECURE_PERIPHERALS_ENABLE=ON -DBOARD_NAME=brd4187c +``` + +For devices that support 2 watchdogs, if you want to test both watchdogs, enable option INTEGRATION_TEST_WDOG1_ENABLE to ON when running Cmake config: + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON -DBOARD_NAME=brd4187c +``` + +To run integration tests for the watchdog module you need to connect the device to ethernet. Export CHIP, ADAPTER_SN, LST_PATH, JLINK_PATH, and the device's IP address and run the test script, for example: + +```sh +$ export CHIP=EFR32MG24BXXXF1536 ADAPTER_SN=440111030 +$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/S +``` + +If test secure peripherals or non-secure peripherals: + +```sh +$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/NS +``` + +```sh +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export HOST_IP=192.168.1.69 +``` + +```sh +$ python3 integration_test_iec60730_irq.py GCC +``` + +By default, the device enables watchdog 0 and test watchdog 0. If you want to test Watchdog 1 use this command: + +```sh +$ INTEGRATION_TEST_WDOG1_ENABLE=enable python3 integration_test_iec60730_watchdog.py GCC +``` + +If you want to test the variable memory module with disable using the MarchX algorithm: + +```sh +$ INTEGRATION_TEST_USE_MARCHX_DISABLE=disable python3 integration_test_iec60730_variable_memory.py GCC +``` + +If you want to test the invariable memory module with calculate crc32: + +```sh +$ INTEGRATION_TEST_ENABLE_CAL_CRC_32=enable python3 integration_test_iec60730_variable_memory.py GCC +``` + +## Automatically run integration tests + +Command run + +```sh +bash execute_test.sh $1 $2 $3 $4 $5 $6 +``` + +With the input arguments, there is the following information. + +- $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48 +- $2: task: all, gen-only, run-only +- $3: components: all, unit_test_iec60730_bist, unit_test_iec60730_post, ... +- $4: ADAPTER_SN +- $5: compiler: GCC, IAR +- $6: OPTION_SUPPORT_INTEGRATION_TEST: "-DENABLE_CAL_CRC_32=ON -DENABLE_CRC_USE_SW=ON -DTEST_SECURE_PERIPHERALS_ENABLE=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON - INTEGRATION_TEST_USE_MARCHX_DISABLE=ON" + +Which, components list that support testing includes: + +- integration_test_iec60730_program_counter + +- integration_test_iec60730_irq + +- integration_test_iec60730_system_clock + +- integration_test_iec60730_watchdog + +- integration_test_iec60730_cpu_registers + +- integration_test_iec60730_variable_memory + +- integration_test_iec60730_invariable_memory + +Before running the bash file, you need to install Jlink, Srecord, and slc tool, refer [Overview](./index.md) to set up some environment variables as follows: +If the compiler is GCC +- If the compiler is GCC: + +If you want to calculate from the start address to the end address of Flash: + +```sh +$ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk +$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin +$ export TOOL_CHAINS=GCC +$ export FLASH_REGIONS_TEST=0x8000000 +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export HOST_IP=192.168.1.69 +``` + +Or if you want to calculate multiple regions: + +```sh +$ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" +``` + +> [!NOTE] +> In the current integration test file, only enable computation of one region: from the start address of ​​the flash to the end of the flash. Therefore, export the flash's starting address. For example, chip EFR32MG24: +>> $ export FLASH_REGIONS_TEST=0x8000000 + +### Example + +- With GCC toolchain: + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 GCC +``` + +- With IAR toolchain: + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 IAR +``` + +### Note: +In case you want to build CRC32 run this command. For example: + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON" +``` + +Or case you want to use the above integration test support options, run this command. For example: + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 GCC "-DTEST_SECURE_PERIPHERALS_ENABLE=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON -DINTEGRATION_TEST_USE_MARCHX_DISABLE=ON -DENABLE_CAL_CRC_32=ON" +``` + +## CRC calculation options + +When running build CMake to run unit tests and integration tests for invariable memory modules, the CRC calculation image file will have the suffix _crc16 or _crc32, you must flash the image file with this suffix. + +With the commands above, the default value supports the calculation CRC-16. If you want to change to calculate for CRC-32 bits, use the CMake config command below: + +- With integration test: + +by manually + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DBOARD_NAME=brd4187c -DENABLE_CAL_CRC_32=ON +``` + +or by automatically + +```sh +bash execute_integration_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON" +``` + + +Here are some options to support running tests of invariable memory modules: + +- ENABLE_CAL_CRC_32 + +- ENABLE_CRC_USE_SW (if this option is ON, you can enable option: ENABLE_SW_CRC_TABLE for using the pre-defined table for calculating or not) + +> [!NOTE] +> Only use the ENABLE_SW_CRC_TABLE option when the ENABLE_CRC_USE_SW option is ON, otherwise, an error will be reported during the build process. \ No newline at end of file diff --git a/docs/guideline_for_running_unit_test.md b/docs/guideline_for_running_unit_test.md new file mode 100644 index 00000000..6b9550b4 --- /dev/null +++ b/docs/guideline_for_running_unit_test.md @@ -0,0 +1,195 @@ +# Guideline for running unit test + +## Export Variable + +> [!NOTE] +> Before running CMake, you need to export some variables first. + +Export SDK_PATH=, TOOL_DIRS=, TOOL_CHAINS, FLASH_REGIONS_TEST (flash start address support calculate CRC for module invariable memory), JLINK_PATH and path to `slc-cli` tool a before run config CMake. + +If you want to calculate from the start address to the end address of Flash: + +```sh +$ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk +$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin +$ export TOOL_CHAINS=GCC +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +$ export PATH=$PATH:/media/slc_cli/slc_cli_linux_check/slc_cli +$ export FLASH_REGIONS_TEST=0x8000000 +``` + +Or if you want to calculate multiple regions: + +```sh +$ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" +``` + +with FLASH_REGIONS_TEST=0x8000000 is the flash start address of board name brd4187c (chip EFR32MG24) + +## Build test for IAR tool + +To build tests for the IAR tool, if you run a manual test, you must run the pre-build command below. + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=${BOARD_NAME} $OPTION_PRE_BUILD_IAR_TOOL +$ cd .. +$ make prepare +``` + +> [!NOTE] +> Keep `$OPTION_PRE_BUILD_IAR_TOOL` the same when running unit test CMake config + +For example, build unit test: + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=brd4187c -DENABLE_UNIT_TESTING=ON -DENABLE_CRC_USE_SW=ON -DENABLE_CAL_CRC_32=ON +$ cd .. +$ make prepare +``` + +or you can run bash script `pre_build_iar.sh` in path [./../simplicity_sdk/pre_build_iar.sh]() with: + +- $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48 +- $2: OPTION_UNIT_TEST: -DENABLE_UNIT_TESTING=ON, etc... + +```sh +$ bash pre_build_iar.sh $BOARD_NAME $OPTION_UNIT_TEST +``` + +For example: + +```sh +$ bash pre_build_iar.sh brd4187c "-DENABLE_UNIT_TESTING=ON" +``` + +## Manually run unit tests + +CMake config + +```sh +$ make prepare +$ cd build +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_UNIT_TESTING=ON -DBOARD_NAME=brd4187c +``` + +CMake Build + +```sh +$ cmake --build . --target unit_test_info -j4 +``` + +or + +```sh +$ make unit_test_info -j4 +``` + +## Automatically run unit tests + +Command run + +```sh +bash execute_test.sh $1 $2 $3 $4 $5 $6 +``` + +With the input arguments, there is the following information. + +- $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48 +- $2: task: all, gen-only, run-only +- $3: components: all, unit_test_iec60730_bist, unit_test_iec60730_post, ... +- $4: ADAPTER_SN +- $5: compiler: GCC, IAR +- $6: OPTION_SUPPORT_UNIT_TEST: "-DENABLE_CAL_CRC_32=ON -DENABLE_CRC_USE_SW" + +Which, components list that supports unit testing includes: + +- unit_test_iec60730_post + +- unit_test_iec60730_bist + +- unit_test_iec60730_program_counter + +- unit_test_iec60730_safety_check + +- unit_test_iec60730_irq + +- unit_test_iec60730_system_clock + +- unit_test_iec60730_watchdog + +- unit_test_iec60730_cpu_registers + +- unit_test_iec60730_variable_memory + +- unit_test_iec60730_invariable_memory + +Before running the bash file, you need to install Jlink, Srecord, and slc tool, refer [Overview](./index.md) to set up some environment variables as follows: +If the compiler is GCC +- If the compiler is GCC: + +If you want to calculate from the start address to the end address of Flash: + +```sh +$ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk +$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin +$ export TOOL_CHAINS=GCC +$ export FLASH_REGIONS_TEST=0x8000000 +$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +``` + +Or if you want to calculate multiple regions: + +```sh +$ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" +``` + +> [!NOTE] +> In the current unit test file, only enable computation in one region: from the start address of ​​the flash to the end of the flash. Therefore, just export the flash's starting address. For example, chip EFR32MG24: +>> $ export FLASH_REGIONS_TEST=0x8000000 + +### Example + +- With GCC toolchain: + +```sh +bash execute_unit_test.sh brd4187c all all 440111030 GCC +``` + +- With IAR toolchain: + +```sh +bash execute_unit_test.sh brd4187c all all 440111030 IAR +``` + +## CRC calculation options + +When running build CMake to run unit tests and integration tests for invariable memory modules, the CRC calculation image file will have the suffix _crc16 or _crc32, you must flash the image file with this suffix. + +With the commands above, the default value supports the calculation CRC-16. If you want to change to calculate for CRC-32 bits, use the CMake config command below: + +- With unit test: + +by manually + +```sh +$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_UNIT_TESTING=ON -DBOARD_NAME=brd4187c -DENABLE_CAL_CRC_32=ON +``` + +or by automatically + +```sh +bash execute_unit_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON" +``` + +Here are some options to support running tests of invariable memory modules: + +- ENABLE_CAL_CRC_32 + +- ENABLE_CRC_USE_SW (if this option is ON, you can enable option: ENABLE_SW_CRC_TABLE for using the pre-defined table for calculating or not) + +> [!NOTE] +> Only use the ENABLE_SW_CRC_TABLE option when the ENABLE_CRC_USE_SW option is ON, otherwise, an error will be reported during the build process. \ No newline at end of file diff --git a/docs/iec60730_safety_library_integration_to_sdk.md b/docs/iec60730_safety_library_integration_to_sdk.md new file mode 100644 index 00000000..8764999c --- /dev/null +++ b/docs/iec60730_safety_library_integration_to_sdk.md @@ -0,0 +1,417 @@ +# User Guide: The Library IEC60730 Integration + +This document provides instructions for integrating the Library IEC60730 into a project. + +This will guide the developer to install the required software. Then guide the configuration of a project and integrate the source code into the project. + +![Key Features](./images/key_features.png) + + +![Silicon Labs](./images/silicon_lab_doc_integration_sdk.png) + +SILICON LABS + +## Contents + +[Contents](#contents) + +[Table of pictures](#table-of-pictures) + +[1. Background](#1-background) + +[2. Install the required software](#2-install-the-required-software) + +[3. Add an extension to Simplicity Studio](#3-add-an-extension-to-simplicity-studio) + +[4. Generate an example project](#4-generate-an-example-project) + +[5. Edit the Linker file](#5-edit-the-linker-file) + +[6. Edit the post-build steps](#6-edit-the-post-build-steps) + +[7. Edit the included path and preprocessor](#7-edit-the-included-path-and-preprocessor) + +[8. Add the source code to the project](#8-add-the-source-code-to-the-project) + +[9. Integrate code into the project](#9-integrate-code-into-the-project) + +[10. Revision history](#10-revision-history) + +## Table of pictures + +[Figure 1 Adding Extension to SDK](#figure-1-adding-extension-to-sdk) + +[Figure 2 Browse to extension location](#figure-2-browse-to-extension-location) + +[Figure 3 Create new project](#figure-3-create-new-project) + +[Figure 4 Target, SDK, and Toolchain Selection](#figure-4-target-sdk-and-toolchain-selection) + +[Figure 5 Add toolchains](#figure-5-add-toolchains) + +[Figure 6 IAR toolchain](#figure-6-iar-toolchain) + +[Figure 7 Example Project Selection](#figure-7-example-project-selection) + +[Figure 8 Project Configuration](#figure-8-project-configuration) + +[Figure 9 Project generation in workspace](#figure-9-project-generation-in-workspace) + +[Figure 10 Build Project](#figure-10-build-project) + +[Figure 11 Edit the Linker Script Path](#figure-11-edit-the-linker-script-path) + +[Figure 12 CRC-16 and CRC-32 script](#figure-12-crc-16-and-crc-32-scripts) + +[Figure 13 Add the Command to Post-build steps](#figure-13-add-the-command-to-post-build-steps) + +[Figure 14 Result after Post-build complete](#figure-14-result-after-post-build-complete) + +[Figure 15 Add the included path and preprocessor](#figure-15-add-the-included-path-and-preprocessor) + +[Figure 16 Components support library IEC60730](#figure-16-components-support-library-iec60730) + +[Figure 17 Add source code library IEC60730](#figure-17-add-source-code-library-iec60730) + +[Figure 18 Assembly code algorithm MARCHC for GCC compiler](#figure-18-assembly-code-algorithm-marchc-for-gcc-compiler) + +[Figure 19 Flow chart of the library IEC60730](#figure-19-flow-chart-of-the-library-iec60730) + +[Figure 20 Demo OEM files integrated with Library IEC60730](#figure-20-demo-oem-files-integrated-with-library-iec60730) + +[Figure 21 IAR define check_sum variable](#figure-21-iar-define-checksum-variable) + +[Figure 22 Configuration for watchdog module](#figure-22-configuration-for-watchdog-module) + +[Figure 23 Configuration for system clock module](#figure-23-configuration-for-system-clock-module) + +## 1. Background + +The IEC60730 is a safety standard used in household applications. It defines the test and diagnostic method that ensures the safe operation of devices. We provide the test of the following components: CPU registers, variable memory check, invariable memory check, program counter check, clock check, and interrupt check. + +At the time of this writing, the library IEC60730 has been tested on two devices EFR32xG12, and EFR32xG24 on Simplicity Studio 5 (SS5)with toolchain GNU ARM v12.2.1 and SDK version 4.4.2. + +## 2. Install the required software. + +We use the third-party software [SRecord](http://srecord.sourceforge.net/) to calculate CRC value. Firstly, you need to install this software. If you're using Windows OS, you can go to the link of this software (link above), download the installation, and run the installer to install. If you're using Ubuntu OS, please follow the installation instructions below. + +```sh +$ sudo apt update +$ sudo apt install srecord +``` + +## 3. Add an extension to Simplicity Studio + +The safety library IEC60730 is supported by adding the IEC60730 extension, which is built using the software environment.: + +- OS-Ubuntu 20.04 + +- Simplicity Studio 5 + +This project is organized as an extension of Simplicity Studio. This project is built upon GSDK version 4.4.2, GNU toolchain V12.2.1. The user can download the same version of GSDK from GitHub [GSDK](https://github.com/SiliconLabs/gecko_sdk) and Simplicity Studio V5 download link [Simplicity Studio V5](https://www.silabs.com/developers/simplicity-studio). + +To create and build demo projects, the user must add the IEC60730 extension to Simplicity Studio. The procedure would be `Window > Preferences > Simplicity Studio > SDKs > Gecko SDK Suite v4.4.2 > Add Extension`. + +![Figure 1 Adding Extension to SDK](./images/integration_doc_figure_1_adding_extension_to_sdk.png) +###### Figure 1 Adding Extension to SDK + + +Press `Browse` to find the directory of this extension. Then choose the folder that has the file name `iec60730.slce`. Simplicity Studio will detect SDK extensions automatically. Click `OK` then `Apply and Close` + +![ Figure 2 Browse to extension location](./images/integration_doc_figure_2_browse_to_extension_location.png) +###### Figure 2 Browse to extension location + +## 4. Generate an example project. + +Before using Simplicity Studio to generate the project, you need to add the IEC60730 extension. Please remember the following text: +> `"This extension supports a demo example for EFR32MG families"` + +Start a Project. Select `Files > New > Project` to open the New Project Wizards dialog. Choose `Silicon Labs Project Wizard > Finish`. + +![Figure 3 Create new project](./images/integration_doc_figure_3_create_new_project.png) +###### Figure 3 Create new project + +To create a new Simplicity Studio® 5 (SSv5) project, follow these three dialog steps: + +- Target, SDK, and Toolchain + +- Examples + +- Configuration + +An indicator at the top of the dialog will show you your current position in the process. You can click `Back` at any time to return to a previous dialog if you need to make changes. + +For the radio board, in the `Target, SDK, and Toolchain Selection` dialog, if you have connected to or selected a target, all relevant information will be pre-populated. If no target is selected, you can choose the target parts here. For example, you can select `EFR32MG12 2.4GHz 10 dBm Radio Board (Rev A02)` in the Target Boards section, with the Target Device set to `EFR32MG12P332F1024GL125` as shown in the image below. + +![Figure 4 Target, SDK, and Toolchain Selection](./images/integration_doc_figure_4_target_sdk_and_toolchain_selection.png) +###### Figure 4 Target, SDK, and Toolchain Selection + +Next, choose the SDK you installed, such as `Gecko SDK v4.4.2`. For the `IDE/Toolchain` select the toolchain version, such as `GNU ARM v12.2.1.` Finally, click `NEXT`. + +If you have installed the IAR toolchain and want to use it to build the demo project. For adding the IAR toolchain in Simplicity Studio: `Preferences > Toolchains > Add > Browse go to the folder containing the toolchain then click OK > Apply and Close` + +![Figure 5 Add toolchains](./images/integration_doc_figure_5_add_toolchain.png) +###### Figure 5 Add toolchains + +After you add your IAR toolchains, in the selection `IDE/Toolchain` choose toolchain `IAR ARM vn.n.n.n`. For example,Simplicity `IDE/IAR ARM v9.20.4.327`. + +![Figure 6 IAR toolchain](./images/integration_doc_figure_6_IAR_toolchain.png) +###### Figure 6 IAR toolchain + +In `Example Project Selection`, use the checkboxes or keywords to find the example of interest. To create a radio board example IEC60730 Demo, search the keyword `iec60730` in the search box, related examples will show. Choose `IEC60730 Example Demo`. Click `NEXT` + +![Figure 7 Example Project Selection](./images/integration_doc_figure_7_example_project_selection.png) +###### Figure 7 Example Project Selection + +In `Project Configuration Selection`, rename and location your project if you want. For the three selections under `With project files`, you can choose any of the selections you want. + +![Figure 8 Project Configuration](./images/integration_doc_figure_8_project_configuration.png) +###### Figure 8 Project Configuration + +Once you finish project creation, the Simplicity IDE perspective opens. There may be a slight delay in the initial configuration. + +The project typically opens `README tab`, which contains an example project description, and `OVERVIEW tab`. + +![Figure 9 Project generation in workspace](./images/integration_doc_figure_9_project_generation_in_workspace.png) +###### Figure 9 Project generation in workspace + +For the building project, choose the project you want to build and click on the icon hammer to build, or click the right mouse and choose `Build Project`. + + +![Figure 10 Build Project](./images/integration_doc_figure_10_build_project.png) +###### Figure 10 Build Project + +## 5. Edit the Linker file. + +We will base on the example extension project above and edit this project to a new linker file that meets the requirements of the library IEC60730. + +Some points for editing the linker file are described in IEC 60730's document. You can refer to the modified linker file in our demo example by checking sections 3 and 4 to create our demo. In our demo, the path to the linker file is automated and set to our linker. You should copy the linker file to another location on your PC and start editing it. + +After editing the linker file, you need to edit the path pointing to this new linker file. Figure 11 Edit the Linker Script Path shows how to edit the Linker Script Path in Simplicity Studio. + +You SHOULD follow these steps: `C/C++Build > Settings > Tool Settings > Memory Layout > Browse`. + +![Figure 11 Edit the Linker Script Path](./images/integration_doc_figure_11_edit_the_linker_script_path.png) +###### Figure 11 Edit the Linker Script Path + +## 6. Edit the post-build steps. + +By default, after building the project, files in `*.bin`, `*.hex`, and `*.s37` formats will be created. If you want to create another format, you SHOULD follow these steps: `C/C++Build  >  Settings  >  Build Steps  > Post-build steps > Command`. + +In this context, we need to modify the command in the `Post-build` steps to generate new firmware files with a CRC value appended at the end of the FLASH area. Currently, we support two scripts that calculate CRC16 and CRC32, which can be executed on PCs running Windows or Ubuntu OS. You can find these scripts in the `lib/crc` folder. + +![Figure 12 CRC-16 and CRC-32 scripts](./images/integration_doc_figure_12_crc16_and_crc32_scripts.png) +###### Figure 12 CRC-16 and CRC-32 scripts + +The scripts have suffixes of `_crc16` and `_crc32` respectively. We will use the suffix `_crcNN` for both cases. + +Detailed parameters of the `sl_iec60730_cal_crcNN` script can refer to can refer to the document [Support calculate CRC](./support_calculate_crc.md). In our example, two script files supporting CRC-16 and CRC-32 are automatically copied into the project. For a demo example, you can use this command below to calculate the CRC value for file build `*.bin`, `*.hex`, and `*.s37` and file `*.lst` with GCC toolchain : + +```sh +$ arm-none-eabi-objdump -t -h -d -S '${BuildArtifactFileBaseName}.axf' >'${BuildArtifactFileBaseName}.lst' && bash ${ProjDirPath}/iec60730_1.1.0/lib/crc/sl_iec60730_cal_crc16.sh ${BuildArtifactFileBaseName} "" "C:\srecord\bin" GCC "0x8000000" +``` + +![Figure 13 Add the Command to Post-build steps](./images/integration_doc_figure_13_add_the_command_to_post_build_steps.png) +###### Figure 13 Add the Command to Post-build steps + +Or with IAR toolchains: + +```sh +ielfdumparm --all --source ${BuildArtifactFileBaseName}.out > ${BuildArtifactFileBaseName}.lst && bash ${ProjDirPath}/iec60730_1.1.0/lib/crc/sl_iec60730_cal_crc16.sh ${BuildArtifactFileBaseName} "" "C:\srecord\bin" IAR "0x8000000" +``` + +> [!NOTE] +> In the default configuration, `SL_IEC60730_CRC_DEBUG_ENABLE` support debugging the CRC test module invariable memory +> calculations on demo project is enabled. If you want to disable this configuration, you should copy either `sl_iec60730_cal_crc32.sh` or +> `sl_iec60730_cal_crc16.sh` in the path: `lib/crc/` which helps a CRC-calculated image file for testing. +> You must flash the image with the corresponding image file suffixes _crc16 and _crc32. +> +> If, during the project configuration step, you choose an option in the `With Project File` section either `Link to SDK and Copy Project Structures` or `Link to Source`, +> you will need to copy `sl_iec60730_cal_crc32.sh` or `sl_iec60730_cal_crc16.sh` to `lib/crc` folder of your current project directory. +> +> After the build of a project is complete, it will call the command in the Post-build steps to create _crc16 or _crc32 files with the extension `*.bin`, `*.hex`, and `*.s37`. + +![Figure 14 Result after Post-build complete](./images/integration_doc_figure_14_result_after_post_build_complete.png) +###### Figure 14 Result after Post-build complete + +## 7. Edit the included path and preprocessor. + +Edit the Include paths (-l) to the location of the source code of the Library IEC60730. + +You `SHOULD` follow these steps: `C/C++Build > Settings > Tool Settings > GNU ARM C Compiler` choose `Include` or `Preprocessor` for include header files and add definitions to your project. + + + +![Figure 15 Add the included path and preprocessor](./images/integration_doc_figure_15_add_the_included_path_and%20preprocessor.png) +###### Figure 15 Add the included path and preprocessor + +Edit preprocessor, the user needs definitions as below. + +- SL_IEC60730_BOARD_HEADER="sl_iec60730_board.h" + +By default, the demo example has the definitions above. You can refer to our demo example of these settings. + +## 8. Add the source code to the project. + +In our example, after adding the SDK extension, the software component will have a few components that support adding code files (*.c, *. s) of Library IEC60730 to the project: + +![Figure 16 Components support library IEC60730](./images/integration_doc_figure_16_components_support_library_iec60730.png) +###### Figure 16 Components support library IEC60730 + +When you install these components, the source code library IEC60730 will be added. For example: + +![Figure 17 Add source code library IEC60730](./images/integration_doc_figure_17_add_source_code_library_iec60730.png) + +###### Figure 17 Add source code library IEC60730 + +Component `IEC60730 VMC MarchC`(see [Figure 16](#figure-16-components-support-library-iec60730)) support for adding assembly code algorithm `MarchC` and `MarchXC`. If you use the IAR compiler, this component will add to assembly files `sl_iec60730_vmc_marchc_iar.S` and `sl_iec60730_vmc_marchxc_iar.S`. If you use the GCC compiler, this component will add `sl_iec60730_vmc_marchc.S` and `sl_iec60730_vmc_marchxc.S` for the test VMC module. + + +![Figure 18 Assembly code algorithm MARCHC for GCC compiler](./images/integration_doc_figure_18_assembly_code_algorithm_marchc_for_gcc_compiler.png) +###### Figure 18 Assembly code algorithm MARCHC for GCC compiler + +## 9. Integrate code into the project. + +The library IEC60730 has been divided into 2 main test phases: Power on Self-Test (POST) and Build In Self-Test (BIST). [Figure 19 Flow chart of the library IEC60730](#figure-19-flow-chart-of-the-library-iec60730) shows the basics of the library IEC60730 integration into a user software solution. + +![Figure 19 Flow chart of the library IEC60730](./images/integration_doc_figure_19_flow_chart_of_the_library_iec60730.png) +###### Figure 19 Flow chart of the library IEC60730 + +In our example, we have added a demo `oem` foler (Original equipment manufacturer) to integrate with the library IEC60730 to test steps such as flow charts fully. + +![Figure 20 Demo OEM files integrated with Library IEC60730](./images/integration_doc_figure_20_demo_oem_files_integrated_with_library_iec60730.png) +###### Figure 20 Demo OEM files integrated with Library IEC60730 + +If you want to add your OEM code and don't want to use our OEM files demo, you COULD add your OEM code via the following steps below: + +### 1. Requires declaration and initialize variables for IEC60730 library with constant values. Refer function `oem_iec60730_init` in file `oem_iec60730.c`. + +```sh +sl_iec60730_vmc_test_multiple_regions_t oem_vmc_test; +sl_iec60730_imc_test_multiple_regions_t oem_imc_test __CLASSB_RAM; +sl_iec60730_irq_cfg_t oem_irq_config; +``` + + +These three variables are used for interrupt, invariable memory check and variable memory check. + +### 2. To perform an invariable memory check, the library uses CRC (Cyclic Redundancy Check) calculations for Flash memory. If the user calculates using hardware, the user will need to initialize the GPCRC module to support the calculation. Users can also enable `#define SL_IEC60730_CRC_USE_SW_ENABLE` for software calculation. To calculate the CRC value, It will have two options: + + - Start from the user's specified address and continue to the end of the Flash region. + + - Calculate multiple regions by providing the starting and ending addresses for each one. For additional details, refer to the file `oem_iec60730.c`. + +And then store the calculated CRC value in the designated end-flash variable. Currently, the `check_sum` variable is set to the end address of the user code that utilizes the IEC Library. + +In the case of the GCC toolchain, the `check_sum` variable is defined in the linker file. For the IAR toolchain, you can find it in the demo example. Right-click on the project and navigate to Properties > C/C++ Build > Settings > IAR Linker for ARM. In the Extra Options section, you can add the option for CRC_16. + +```C +--keep check_sum --place_holder check_sum,2,.checksum,64 +``` + +Or for CRC_32: + +```C +--keep check_sum --place_holder check_sum,4,.checksum,64 +``` + +By default, the demo project uses option CRC_16 + +![Figure 21 IAR define checksum variable](./images/integration_doc_figure_21_iar_define_checksum_variable.png) +###### Figure 21 IAR define checksum variable + +### 3. Configure Watchdog Test: this configuration determines which watchdog unit will be checked.The library does not initialize the watchdog units, the user should do the initialization. We support configuration for watchdog module + +![Figure 22 Configuration for watchdog module](./images/integration_doc_figure_22_configuration_for_watchdog_module.png) +###### Figure 22 Configuration for watchdog module + +The two define used to enable watchdog testing are used in the application: + +```C +#define SL_IEC60730_WDOG0_ENABLE +#define SL_IEC60730_WDOG1_ENABL +``` + +If these macros are not enabled, it will show an error saying watchdog checking is not enabled. + +- To clear reset cause flags in the RSTCASUES register after watchdog testing is completed. Enable configuration of the definition of macro `#define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE`. In our demo, this feature is enabled. + +- The static variable `iec60730_watchdog_count` must be located at a memory location that is not cleared when system startup `(section".ram_no_clear")`. + +- The global variable `iec60730_watchdog_state` must be located at a memory location that is not cleared when system startup `(section ".ram_no_clear")`. To enable saving `iec60730_watchdog_state` to backup RAM on Series 2, enable the macro `#define SL_IEC60730_SAVE_STAGE_ENABLE`. By default, it will be disabled.Define macro `SL_IEC60730_BURAM_IDX` to select which register of the BURAM will be used. The default value is `0x0UL`. + +### 4. Before calling the `sl_iec60730_post` function,we need to do the following steps: + +- Configure the clock for the timers. You can refer to these configurations in our demo examples, file `oem_iec60730_init_device.c`. + +- Create two timers with 10 milliseconds (ms) and 100 milliseconds (ms) interrupt periods (parameters 10ms and 100ms are recommended values) to test the clock and the clock switch. You can refer our demo example, file `oem_iec60730_timer.c` for more details. Note that adjusting the 10ms and 100ms values will require adjusting other configuration `IEC60730_SYS_CLK`: + +![Figure 23 Configuration for system clock module](./images/integration_doc_figure_23_configuration_for_system_clock_module_.png) +###### Figure 23 Configuration for system clock module + +### 5. To perform a variable memory check, the library uses MarchC and MarchXC algorithms. It will have two options: + +   - Start from the user's specified address in RAM and continue to the end of the RAM region. + +   - Calculate multiple RAM regions by providing the starting and ending addresses for each one. For additional details, refer to the file `oem_iec60730.c`. + +### 6. Before calling the `sl_iec60730_bist` function, we `SHOULD` set the flag for the `sl_iec60730_program_counter_check` variable. Some of the following flags are set by the Library IEC60730: `IEC60730_VMC_COMPLETE,IEC60730_IMC_COMPLETE,IEC60730_CPU_CLOCKS_COM PLETE,and IEC60730_INTERRUPT_COMPLETE`. + +Other flags (IEC60730_GPIO_COMPLETE, IEC60730_ANALOG_COMPLETE,etc.) are up to you to develop additional test functions. The `sl_iec60730_program_counter_check` variable `SHOULD` set the flags corresponding to the unavailable test to ensure that the Program Counter Check is guaranteed. + +In the demo examples,you will often see the following code. + +```C +sl_iec60730_program_counter_check |=IEC60730_GPIO_COMPLETE + | IEC60730_ANALOG_COMPLETE + | IEC60730_OEM0_COMPLETE + | IEC60730_OEM1_COMPLETE + | IEC60730_OEM2_COMPLETE + | IEC60730_OEM3_COMPLETE + | IEC60730_OEM4_COMPLETE + | IEC60730_OEM5_COMPLETE + | IEC60730_OEM6_COMPLETE + | IEC60730_OEM7_COMPLETE; +``` + +- On demo eample, executes the external communication test that sets the `IEC60730_COMMS_COMPLETE` flag by itself. + +- The function `sl_iec60730_bist` SHOULD be called in periodical task or a supper loop while(1). + +### 7. Remember to increment the IRQ counter variable every time the interrupt to test occurs. You can refer to the `oem_irq_exec_count_tick` function in our demo examples. + + +```C +void TIMERO_IRQHandler(void) { + +... + +oem_irq_exec_count_tick(); + +} + +void oem_irq_exec_count_tick(void){ + +oem_irq_exec_count[0]++; + +} + +``` + +### 8. Create the function `sl_iec60730_safe_state`. The purpose of this function is to handle when an error occurs. An example of handling of this function refer files `oem_iec60730_functions.c`. After generating our demo example successfully, you also `COULD` add your code in file app.c and app.h + +## 10. Revision history + +| Revision | Date | Description | +| -- | -- | -- | +| 0.1.0 | Oct 2021 | Initial Revision | +| 0.2.0 | Nov 2021 | Section 7: Added description for Watchdog | +| 0.3.0 | Mar 2023 | Remove Section 8. | +| 0.4.0 | Apr 2023 | Update document | +| 1.0.0 | Sep 2023 | Section 1: Added mention aboutEFM32PG22 and EFR32xG22devices. | +| 1.1.0 | June 2024 | Adding Section 3 and Section 4 for support creates a Library ExtensionUpdated other sections for suit withthe released package EFR32xG12and EFR32xG24 devices. | +| 2.0.0 | Nov 2024 | Rewrite the documentation by the re-factory code of the library support device EFR32MG families. | + + + + diff --git a/docs/images/BIST_flowchart.png b/docs/images/BIST_flowchart.png new file mode 100644 index 00000000..b03334a8 Binary files /dev/null and b/docs/images/BIST_flowchart.png differ diff --git a/docs/images/BIST_system_clock_frequency.png b/docs/images/BIST_system_clock_frequency.png new file mode 100644 index 00000000..15f5a7fd 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Guideline using IEC60730 Safety Library + +Platform codes for EFR32 series chips which complies to IEC60730 safety standard + +## Introduction +The IEC60730 library for EFR32 provides a basic implementation required to support the necessary requirements found in Table H.1 in the IEC60730 specification. It includes all the Power On Self Test (POST) functions executed when a device is first powered on, as well as Built In Self Test (BIST) functions that are called periodically to ensure correct operation. Certain portions of the requirements require a detailed understanding of the system under development. Callback functions must be completed by the developer to guarantee meeting the full specification. These include a Safe State function used when validation detects an anomaly, properly implemented communications channels (redundancy, error detection, periodic communications), and Plausibility functions to validate system state (internal variables and inputs/outputs). + +## License + +Please refer [License](../LICENSE.md) + +## Release Notes + +Please refer document in [release_note.md](./release_note.md) + +## IEC60730 Certificate + +The Silicon Labs Appliances homepage will contain the final certificate and detailed report when it is completed. + +## OEM Testing + +Once OEMs have completed integrating their system with the IEC60730 Library, they will need to certify their device with a qualified certification house. + +## Supported Families + +- Refer section [Supported Families](./document_api_iec60730_library/group__efr32__iec60730.html) + +## Software Requirements + +- Refer section [Software Requirements](./document_api_iec60730_library/group__efr32__iec60730.html) + +## Building the IEC60730 Demo + +- Refer section [Building the IEC60730 Demo](./document_api_iec60730_library/group__efr32__iec60730.html) + +## Generate document API + +- Refer section [Generate document API](./document_api_iec60730_library/group__efr32__iec60730.html) + +## Coding convention tool + +- Refer file: [coding_convention_tool.md](./coding_convention_tool.md). + +## Compiler specifications + +- Refer section [Compiler specifications](./document_api_iec60730_library/group__efr32__iec60730.html) + +## System Architecture + +- Refer section [System Architecture](./document_api_iec60730_library/group__efr32__iec60730.html) + +## CMake + +The project has a CMake template that supports running tests. Follow the steps below one by one to build and run tests. + +### Add the IEC60730 Library extension to the SDK + +- Refer to the [IEC60730 safety library integration to SDK](./iec60730_safety_library_integration_to_sdk.md) in the [docs]() folder for more details. + +### Install Dependencies + +#### Install slc-cli + +- Follow this link to Install slc: [Install slc](https://docs.silabs.com/simplicity-studio-5-users-guide/latest/ss-5-users-guide-tools-slc-cli/02-installation) +- Follow this link to [Install Amazon Corretto 17 on Debian-Based Linux](https://docs.aws.amazon.com/corretto/latest/corretto-17-ug/downloads-list.html) + +##### How to use slc + +Add the path to the expanded slc-cli to your PATH sh export PATH=$PATH:~/SimplicityStudio/slc_cli_linux/slc_cli/ + +Configure SDK. For example sh slc configuration --sdk ~/SimplicityStudio/SDKs/gecko_sdk/ + +Run slc signature trust --sdk if you have not yet trusted your SDK. + +For example your SDK locate at ~/SimplicityStudio/SDKs/gecko_sdk/. Run `slc signature trust --sdk ~/SimplicityStudio/SDKs/gecko_sdk/` + +Set toolchain For example sh slc configuration -gcc=~/SimplicityStudio-5/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/ + +Generate the project sh slc generate \path\to\example.slcp -np -d -name= --with + +Choose one of the options below to generate the project + +| Operation | Arguments | Description | +|---|---|---| +|generate | -cp, --copy-sources | Copies all files referenced by this project, selected components, and any other running tools (Pin Tool, etc.). By default, no files are copied. | +|^ | -cpproj, --copy-proj-sources | Copies all files referenced by the project and links any SDK sources. This can be combined with -cpsdk. | +|^ | -cpsdk, --copy-sdk-sources | Copies all files referenced by the selected components and links any project sources. This can be combined with -cpproj. | + +> [!NOTE]: To be able to use the extension LibIEC60730. You need to add the LibIEC60730 +> extension to your SDK in the extension folder and run the command: `slc signature trust -extpath ` + +##### For example + +```sh +$ GSDK=~/SimplicityStudio/SDKs/gecko_sdk +$ slc configuration --sdk=$GSDK --gcc-toolchain=/Applications/ARM +$ slc generate $GSDK/app/common/example/blink_baremetal -np -d blinky -name=blinky -o makefile + --with brd4166a +$ slc signature trust -extpath $GSDK/extension/IEC60730_Libs +``` + +### Run unit test + - Refer to the guideline link: [guideline_for_running_unit_test.md](./guideline_for_running_unit_test.md) +### Run integration test + - Refer to the guideline link: [guideline_for_running_integration_test.md](./guideline_for_running_integration_test.md) diff --git a/docs/release_note.md b/docs/release_note.md new file mode 100644 index 00000000..57d3e49a --- /dev/null +++ b/docs/release_note.md @@ -0,0 +1,121 @@ + + +This release contains the following components: + + ---------------- + Library (source files) + + - /lib/asm + + - /lib/config + + - /lib/inc + + - /lib/src + + - /lib/toolchain + + ---------------- + Library Dependencies (template files) + + - /simplicity_sdk + + ---------------- + Test (source files) + + - /test/unit_test + + - /test/integration_test + + - /test/test_script + + ---------------- + Sample + + - /sample + + ---------------- + CMake file + + - /cmake + + - CMakeLists.txt + + ---------------- + Documentation + + - /docs + + - mkdocs.yml + + - iec60730.doxygen + + ---------------- + SDK extension files + + - /components + + - *.slce + + - *.slsdk + + - *.xml + + + ---------------- + Coding Convention + + - /tools + + - .pre-commit-config.yaml + + ---------------- + +## Revision History + ---------------- + 2.0.0 Release + + - Supported Device: EFR32MG families + + - Supported Compilers: GCC, IAR + + - Update project from make file to CMake file + + - Rewrite the library IEC60730 code + + - Update GSDK extension for the IEC60730 Library following the changes of the source library + + - Support unit test, integration test + + - Support check coding convention + + - Support mkdocs + + ---------------- + 1.2.0 Release + + - Supported Devices: EFR32xG24, EFM32xG12 + + - Supported Compilers: GCC, IAR + + - Added GSDK extension for the IEC60730 Library. + + - Integrated demo app to the GSDK extension. + + ---------------- + 1.1.0 Release + + - Supported IEC60730 standard + + - Supported Devices: EFR32xG22, EFM32PG22 + + - Supported Compilers: GCC, IAR + + ---------------- + 1.0.0 Release + + - Supported IEC60730 standard + + - Supported Devices: EFR32xG21, EFR32xG23 + + - Supported Compilers: GCC, IAR diff --git a/docs/support_calculate_crc.md b/docs/support_calculate_crc.md new file mode 100644 index 00000000..e417cdc3 --- /dev/null +++ b/docs/support_calculate_crc.md @@ -0,0 +1,38 @@ +# Support calculate CRC by Srecord + +## Install + +On Linux + +```sh +sudo apt install srecord +``` + +On Window: Download Srecord to install + +## Arguments to bash script + +```sh +PROJ_NAME=$1 +BUILD_DIR=$2 +SREC_PATH=$3 +TOOL_CHAINS=$4 +START_ADDR=$6 +``` + +For example: + +```sh +$ bash sl_iec60730_cal_crc16.sh "${PROJ_NAME}" "${BUILD_DIR}" "C:\srecord\bin" GCC "0x8000000" +``` + + Or if you want to calculate multiple regions: + +```sh +$ bash sl_iec60730_cal_crc16.sh "${PROJ_NAME}" "${BUILD_DIR}" "C:\srecord\bin" GCC "0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190" +``` + +> [!NOTE] +> If you calculate multiple regions CRC, you need to enter the start and end addresses of each zone. For example, in the above command, srec will calculate a three-range CRC: 0x8000000 - 0x8000050; 0x80000a0 - 0x80000f0; 0x8000140 - 0x8000190. +> +> Path `${BUILD_DIR}` have the files `*.bin`, `*.hex`, and `*.s37`. A `*.map` file is also needed in this directory, so that bash can check to find the address of the `check_sum` variable to store the calculated CRC value. \ No newline at end of file diff --git a/iec60730.doxygen b/iec60730.doxygen new file mode 100644 index 00000000..e7f00576 --- /dev/null +++ b/iec60730.doxygen @@ -0,0 +1,2579 @@ +# Doxyfile 1.8.17 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project. +# +# All text after a double hash (##) is considered a comment and is placed in +# front of the TAG it is preceding. +# +# All text after a single hash (#) is considered a comment and will be ignored. +# The format is: +# TAG = value [value, ...] +# For lists, items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (\" \"). + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# This tag specifies the encoding used for all characters in the configuration +# file that follow. The default is UTF-8 which is also the encoding used for all +# text before the first occurrence of this tag. Doxygen uses libiconv (or the +# iconv built into libc) for the transcoding. See +# https://www.gnu.org/software/libiconv/ for the list of possible encodings. +# The default value is: UTF-8. + +DOXYFILE_ENCODING = UTF-8 + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded by +# double-quotes, unless you are using Doxywizard) that should identify the +# project for which the documentation is generated. This name is used in the +# title of most generated pages and in a few other places. +# The default value is: My Project. + +PROJECT_NAME = "Document API IEC60730 Library" + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. This +# could be handy for archiving the generated documentation or if some version +# control system is used. + +PROJECT_NUMBER = + +# Using the PROJECT_BRIEF tag one can provide an optional one line description +# for a project that appears at the top of each page and should give viewer a +# quick idea about the purpose of the project. Keep the description short. + +PROJECT_BRIEF = + +# With the PROJECT_LOGO tag one can specify a logo or an icon that is included +# in the documentation. The maximum height of the logo should not exceed 55 +# pixels and the maximum width should not exceed 200 pixels. Doxygen will copy +# the logo to the output directory. + +PROJECT_LOGO = + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) path +# into which the generated documentation will be written. If a relative path is +# entered, it will be relative to the location where doxygen was started. If +# left blank the current directory will be used. + +OUTPUT_DIRECTORY = $(PWD)/docs/document_api_iec60730_library + +# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub- +# directories (in 2 levels) under the output directory of each output format and +# will distribute the generated files over these directories. Enabling this +# option can be useful when feeding doxygen a huge amount of source files, where +# putting all generated files in the same directory would otherwise causes +# performance problems for the file system. +# The default value is: NO. + +CREATE_SUBDIRS = NO + +# If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII +# characters to appear in the names of generated files. If set to NO, non-ASCII +# characters will be escaped, for example _xE3_x81_x84 will be used for Unicode +# U+3044. +# The default value is: NO. + +ALLOW_UNICODE_NAMES = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese, +# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States), +# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian, +# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages), +# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian, +# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian, +# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish, +# Ukrainian and Vietnamese. +# The default value is: English. + +OUTPUT_LANGUAGE = English + +# The OUTPUT_TEXT_DIRECTION tag is used to specify the direction in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all generated output in the proper direction. +# Possible values are: None, LTR, RTL and Context. +# The default value is: None. + +OUTPUT_TEXT_DIRECTION = None + +# If the BRIEF_MEMBER_DESC tag is set to YES, doxygen will include brief member +# descriptions after the members that are listed in the file and class +# documentation (similar to Javadoc). Set to NO to disable this. +# The default value is: YES. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES, doxygen will prepend the brief +# description of a member or function before the detailed description +# +# Note: If both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. +# The default value is: YES. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator that is +# used to form the text in various listings. Each string in this list, if found +# as the leading text of the brief description, will be stripped from the text +# and the result, after processing the whole list, is used as the annotated +# text. Otherwise, the brief description is used as-is. If left blank, the +# following values are used ($name is automatically replaced with the name of +# the entity):The $name class, The $name widget, The $name file, is, provides, +# specifies, contains, represents, a, an and the. + +ABBREVIATE_BRIEF = "The $name class" \ + "The $name widget" \ + "The $name file" \ + is \ + provides \ + specifies \ + contains \ + represents \ + a \ + an \ + the + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# doxygen will generate a detailed section even if there is only a brief +# description. +# The default value is: NO. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all +# inherited members of a class in the documentation of that class as if those +# members were ordinary class members. Constructors, destructors and assignment +# operators of the base classes will not be shown. +# The default value is: NO. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES, doxygen will prepend the full path +# before files name in the file list and in the header files. If set to NO the +# shortest path that makes the file name unique will be used +# The default value is: YES. + +FULL_PATH_NAMES = YES + +# The STRIP_FROM_PATH tag can be used to strip a user-defined part of the path. +# Stripping is only done if one of the specified strings matches the left-hand +# part of the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the path to +# strip. +# +# Note that you can specify absolute paths here, but also relative paths, which +# will be relative from the directory where doxygen is started. +# This tag requires that the tag FULL_PATH_NAMES is set to YES. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of the +# path mentioned in the documentation of a class, which tells the reader which +# header file to include in order to use a class. If left blank only the name of +# the header file containing the class definition is used. Otherwise one should +# specify the list of include paths that are normally passed to the compiler +# using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter (but +# less readable) file names. This can be useful is your file systems doesn't +# support long names like on DOS, Mac, or CD-ROM. +# The default value is: NO. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then doxygen will interpret the +# first line (until the first dot) of a Javadoc-style comment as the brief +# description. If set to NO, the Javadoc-style will behave just like regular Qt- +# style comments (thus requiring an explicit @brief command for a brief +# description.) +# The default value is: NO. + +JAVADOC_AUTOBRIEF = NO + +# If the JAVADOC_BANNER tag is set to YES then doxygen will interpret a line +# such as +# /*************** +# as being the beginning of a Javadoc-style comment "banner". If set to NO, the +# Javadoc-style will behave just like regular comments and it will not be +# interpreted by doxygen. +# The default value is: NO. + +JAVADOC_BANNER = NO + +# If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first +# line (until the first dot) of a Qt-style comment as the brief description. If +# set to NO, the Qt-style will behave just like regular Qt-style comments (thus +# requiring an explicit \brief command for a brief description.) +# The default value is: NO. + +QT_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make doxygen treat a +# multi-line C++ special comment block (i.e. a block of //! or /// comments) as +# a brief description. This used to be the default behavior. The new default is +# to treat a multi-line C++ comment block as a detailed description. Set this +# tag to YES if you prefer the old behavior instead. +# +# Note that setting this tag to YES also means that rational rose comments are +# not recognized any more. +# The default value is: NO. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the +# documentation from any documented member that it re-implements. +# The default value is: YES. + +INHERIT_DOCS = YES + +# If the SEPARATE_MEMBER_PAGES tag is set to YES then doxygen will produce a new +# page for each member. If set to NO, the documentation of a member will be part +# of the file/class/namespace that contains it. +# The default value is: NO. + +SEPARATE_MEMBER_PAGES = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. Doxygen +# uses this value to replace tabs by spaces in code fragments. +# Minimum value: 1, maximum value: 16, default value: 4. + +TAB_SIZE = 4 + +# This tag can be used to specify a number of aliases that act as commands in +# the documentation. An alias has the form: +# name=value +# For example adding +# "sideeffect=@par Side Effects:\n" +# will allow you to put the command \sideeffect (or @sideeffect) in the +# documentation, which will result in a user-defined paragraph with heading +# "Side Effects:". You can put \n's in the value part of an alias to insert +# newlines (in the resulting output). You can put ^^ in the value part of an +# alias to insert a newline as if a physical newline was in the original file. +# When you need a literal { or } or , in the value part of an alias you have to +# escape them by means of a backslash (\), this can lead to conflicts with the +# commands \{ and \} for these it is advised to use the version @{ and @} or use +# a double escape (\\{ and \\}) + +ALIASES = + +# This tag can be used to specify a number of word-keyword mappings (TCL only). +# A mapping has the form "name=value". For example adding "class=itcl::class" +# will allow you to use the command class in the itcl::class meaning. + +TCL_SUBST = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. For +# instance, some of the names that are used will be different. The list of all +# members will be omitted, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_FOR_C = NO + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java or +# Python sources only. Doxygen will then generate output that is more tailored +# for that language. For instance, namespaces will be presented as packages, +# qualified scopes will look different, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the OPTIMIZE_FOR_FORTRAN tag to YES if your project consists of Fortran +# sources. Doxygen will then generate output that is tailored for Fortran. +# The default value is: NO. + +OPTIMIZE_FOR_FORTRAN = NO + +# Set the OPTIMIZE_OUTPUT_VHDL tag to YES if your project consists of VHDL +# sources. Doxygen will then generate output that is tailored for VHDL. +# The default value is: NO. + +OPTIMIZE_OUTPUT_VHDL = NO + +# Set the OPTIMIZE_OUTPUT_SLICE tag to YES if your project consists of Slice +# sources only. Doxygen will then generate output that is more tailored for that +# language. For instance, namespaces will be presented as modules, types will be +# separated into more groups, etc. +# The default value is: NO. + +OPTIMIZE_OUTPUT_SLICE = NO + +# Doxygen selects the parser to use depending on the extension of the files it +# parses. With this tag you can assign which parser to use for a given +# extension. Doxygen has a built-in mapping, but you can override or extend it +# using this tag. The format is ext=language, where ext is a file extension, and +# language is one of the parsers supported by doxygen: IDL, Java, JavaScript, +# Csharp (C#), C, C++, D, PHP, md (Markdown), Objective-C, Python, Slice, +# Fortran (fixed format Fortran: FortranFixed, free formatted Fortran: +# FortranFree, unknown formatted Fortran: Fortran. In the later case the parser +# tries to guess whether the code is fixed or free formatted code, this is the +# default for Fortran type files), VHDL, tcl. For instance to make doxygen treat +# .inc files as Fortran files (default is PHP), and .f files as C (default is +# Fortran), use: inc=Fortran f=C. +# +# Note: For files without extension you can use no_extension as a placeholder. +# +# Note that for custom extensions you also need to set FILE_PATTERNS otherwise +# the files are not read by doxygen. + +EXTENSION_MAPPING = + +# If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments +# according to the Markdown format, which allows for more readable +# documentation. See https://daringfireball.net/projects/markdown/ for details. +# The output of markdown processing is further processed by doxygen, so you can +# mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in +# case of backward compatibilities issues. +# The default value is: YES. + +MARKDOWN_SUPPORT = YES + +# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up +# to that level are automatically included in the table of contents, even if +# they do not have an id attribute. +# Note: This feature currently applies only to Markdown headings. +# Minimum value: 0, maximum value: 99, default value: 5. +# This tag requires that the tag MARKDOWN_SUPPORT is set to YES. + +TOC_INCLUDE_HEADINGS = 5 + +# When enabled doxygen tries to link words that correspond to documented +# classes, or namespaces to their corresponding documentation. Such a link can +# be prevented in individual cases by putting a % sign in front of the word or +# globally by setting AUTOLINK_SUPPORT to NO. +# The default value is: YES. + +AUTOLINK_SUPPORT = YES + +# If you use STL classes (i.e. std::string, std::vector, etc.) but do not want +# to include (a tag file for) the STL sources as input, then you should set this +# tag to YES in order to let doxygen match functions declarations and +# definitions whose arguments contain STL classes (e.g. func(std::string); +# versus func(std::string) {}). This also make the inheritance and collaboration +# diagrams that involve STL classes more complete and accurate. +# The default value is: NO. + +BUILTIN_STL_SUPPORT = NO + +# If you use Microsoft's C++/CLI language, you should set this option to YES to +# enable parsing support. +# The default value is: NO. + +CPP_CLI_SUPPORT = NO + +# Set the SIP_SUPPORT tag to YES if your project consists of sip (see: +# https://www.riverbankcomputing.com/software/sip/intro) sources only. Doxygen +# will parse them like normal C++ but will assume all classes use public instead +# of private inheritance when no explicit protection keyword is present. +# The default value is: NO. + +SIP_SUPPORT = NO + +# For Microsoft's IDL there are propget and propput attributes to indicate +# getter and setter methods for a property. Setting this option to YES will make +# doxygen to replace the get and set methods by a property in the documentation. +# This will only work if the methods are indeed getting or setting a simple +# type. If this is not the case, or you want to show the methods anyway, you +# should set this option to NO. +# The default value is: YES. + +IDL_PROPERTY_SUPPORT = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. +# The default value is: NO. + +DISTRIBUTE_GROUP_DOC = NO + +# If one adds a struct or class to a group and this option is enabled, then also +# any nested class or struct is added to the same group. By default this option +# is disabled and one has to add nested compounds explicitly via \ingroup. +# The default value is: NO. + +GROUP_NESTED_COMPOUNDS = NO + +# Set the SUBGROUPING tag to YES to allow class member groups of the same type +# (for instance a group of public functions) to be put as a subgroup of that +# type (e.g. under the Public Functions section). Set it to NO to prevent +# subgrouping. Alternatively, this can be done per class using the +# \nosubgrouping command. +# The default value is: YES. + +SUBGROUPING = YES + +# When the INLINE_GROUPED_CLASSES tag is set to YES, classes, structs and unions +# are shown inside the group in which they are included (e.g. using \ingroup) +# instead of on a separate page (for HTML and Man pages) or section (for LaTeX +# and RTF). +# +# Note that this feature does not work in combination with +# SEPARATE_MEMBER_PAGES. +# The default value is: NO. + +INLINE_GROUPED_CLASSES = NO + +# When the INLINE_SIMPLE_STRUCTS tag is set to YES, structs, classes, and unions +# with only public data fields or simple typedef fields will be shown inline in +# the documentation of the scope in which they are defined (i.e. file, +# namespace, or group documentation), provided this scope is documented. If set +# to NO, structs, classes, and unions are shown on a separate page (for HTML and +# Man pages) or section (for LaTeX and RTF). +# The default value is: NO. + +INLINE_SIMPLE_STRUCTS = NO + +# When TYPEDEF_HIDES_STRUCT tag is enabled, a typedef of a struct, union, or +# enum is documented as struct, union, or enum with the name of the typedef. So +# typedef struct TypeS {} TypeT, will appear in the documentation as a struct +# with name TypeT. When disabled the typedef will appear as a member of a file, +# namespace, or class. And the struct will be named TypeS. This can typically be +# useful for C code in case the coding convention dictates that all compound +# types are typedef'ed and only the typedef is referenced, never the tag name. +# The default value is: NO. + +TYPEDEF_HIDES_STRUCT = NO + +# The size of the symbol lookup cache can be set using LOOKUP_CACHE_SIZE. This +# cache is used to resolve symbols given their name and scope. Since this can be +# an expensive process and often the same symbol appears multiple times in the +# code, doxygen keeps a cache of pre-resolved symbols. If the cache is too small +# doxygen will become slower. If the cache is too large, memory is wasted. The +# cache size is given by this formula: 2^(16+LOOKUP_CACHE_SIZE). The valid range +# is 0..9, the default is 0, corresponding to a cache size of 2^16=65536 +# symbols. At the end of a run doxygen will report the cache usage and suggest +# the optimal cache size from a speed point of view. +# Minimum value: 0, maximum value: 9, default value: 0. + +LOOKUP_CACHE_SIZE = 0 + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES, doxygen will assume all entities in +# documentation are documented, even if no documentation was available. Private +# class members and static file members will be hidden unless the +# EXTRACT_PRIVATE respectively EXTRACT_STATIC tags are set to YES. +# Note: This will also disable the warnings about undocumented members that are +# normally produced when WARNINGS is set to YES. +# The default value is: NO. + +EXTRACT_ALL = NO + +# If the EXTRACT_PRIVATE tag is set to YES, all private members of a class will +# be included in the documentation. +# The default value is: NO. + +EXTRACT_PRIVATE = NO + +# If the EXTRACT_PRIV_VIRTUAL tag is set to YES, documented private virtual +# methods of a class will be included in the documentation. +# The default value is: NO. + +EXTRACT_PRIV_VIRTUAL = NO + +# If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal +# scope will be included in the documentation. +# The default value is: NO. + +EXTRACT_PACKAGE = NO + +# If the EXTRACT_STATIC tag is set to YES, all static members of a file will be +# included in the documentation. +# The default value is: NO. + +EXTRACT_STATIC = NO + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES, classes (and structs) defined +# locally in source files will be included in the documentation. If set to NO, +# only classes defined in header files are included. Does not have any effect +# for Java sources. +# The default value is: YES. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. If set to YES, local methods, +# which are defined in the implementation section but not in the interface are +# included in the documentation. If set to NO, only methods in the interface are +# included. +# The default value is: NO. + +EXTRACT_LOCAL_METHODS = NO + +# If this flag is set to YES, the members of anonymous namespaces will be +# extracted and appear in the documentation as a namespace called +# 'anonymous_namespace{file}', where file will be replaced with the base name of +# the file that contains the anonymous namespace. By default anonymous namespace +# are hidden. +# The default value is: NO. + +EXTRACT_ANON_NSPACES = NO + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all +# undocumented members inside documented classes or files. If set to NO these +# members will be included in the various overviews, but no documentation +# section is generated. This option has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. If set +# to NO, these classes will be included in the various overviews. This option +# has no effect if EXTRACT_ALL is enabled. +# The default value is: NO. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend +# declarations. If set to NO, these declarations will be included in the +# documentation. +# The default value is: NO. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, doxygen will hide any +# documentation blocks found inside the body of a function. If set to NO, these +# blocks will be appended to the function's detailed documentation block. +# The default value is: NO. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation that is typed after a +# \internal command is included. If the tag is set to NO then the documentation +# will be excluded. Set it to YES to include the internal documentation. +# The default value is: NO. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file +# names in lower-case letters. If set to YES, upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# (including Cygwin) ands Mac users are advised to set this option to NO. +# The default value is: system dependent. + +CASE_SENSE_NAMES = YES + +# If the HIDE_SCOPE_NAMES tag is set to NO then doxygen will show members with +# their full class and namespace scopes in the documentation. If set to YES, the +# scope will be hidden. +# The default value is: NO. + +HIDE_SCOPE_NAMES = NO + +# If the HIDE_COMPOUND_REFERENCE tag is set to NO (default) then doxygen will +# append additional text to a page's title, such as Class Reference. If set to +# YES the compound reference will be hidden. +# The default value is: NO. + +HIDE_COMPOUND_REFERENCE= NO + +# If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of +# the files that are included by a file in the documentation of that file. +# The default value is: YES. + +SHOW_INCLUDE_FILES = YES + +# If the SHOW_GROUPED_MEMB_INC tag is set to YES then Doxygen will add for each +# grouped member an include statement to the documentation, telling the reader +# which file to include in order to use the member. +# The default value is: NO. + +SHOW_GROUPED_MEMB_INC = NO + +# If the FORCE_LOCAL_INCLUDES tag is set to YES then doxygen will list include +# files with double quotes in the documentation rather than with sharp brackets. +# The default value is: NO. + +FORCE_LOCAL_INCLUDES = NO + +# If the INLINE_INFO tag is set to YES then a tag [inline] is inserted in the +# documentation for inline members. +# The default value is: YES. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES then doxygen will sort the +# (detailed) documentation of file and class members alphabetically by member +# name. If set to NO, the members will appear in declaration order. +# The default value is: YES. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the brief +# descriptions of file, namespace and class members alphabetically by member +# name. If set to NO, the members will appear in declaration order. Note that +# this will also influence the order of the classes in the class list. +# The default value is: NO. + +SORT_BRIEF_DOCS = NO + +# If the SORT_MEMBERS_CTORS_1ST tag is set to YES then doxygen will sort the +# (brief and detailed) documentation of class members so that constructors and +# destructors are listed first. If set to NO the constructors will appear in the +# respective orders defined by SORT_BRIEF_DOCS and SORT_MEMBER_DOCS. +# Note: If SORT_BRIEF_DOCS is set to NO this option is ignored for sorting brief +# member documentation. +# Note: If SORT_MEMBER_DOCS is set to NO this option is ignored for sorting +# detailed member documentation. +# The default value is: NO. + +SORT_MEMBERS_CTORS_1ST = NO + +# If the SORT_GROUP_NAMES tag is set to YES then doxygen will sort the hierarchy +# of group names into alphabetical order. If set to NO the group names will +# appear in their defined order. +# The default value is: NO. + +SORT_GROUP_NAMES = YES + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be sorted by +# fully-qualified names, including namespaces. If set to NO, the class list will +# be sorted only by class name, not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the alphabetical +# list. +# The default value is: NO. + +SORT_BY_SCOPE_NAME = NO + +# If the STRICT_PROTO_MATCHING option is enabled and doxygen fails to do proper +# type resolution of all parameters of a function it will reject a match between +# the prototype and the implementation of a member function even if there is +# only one candidate or it is obvious which candidate to choose by doing a +# simple string match. By disabling STRICT_PROTO_MATCHING doxygen will still +# accept a match between prototype and implementation in such cases. +# The default value is: NO. + +STRICT_PROTO_MATCHING = NO + +# The GENERATE_TODOLIST tag can be used to enable (YES) or disable (NO) the todo +# list. This list is created by putting \todo commands in the documentation. +# The default value is: YES. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable (YES) or disable (NO) the test +# list. This list is created by putting \test commands in the documentation. +# The default value is: YES. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable (YES) or disable (NO) the bug +# list. This list is created by putting \bug commands in the documentation. +# The default value is: YES. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or disable (NO) +# the deprecated list. This list is created by putting \deprecated commands in +# the documentation. +# The default value is: YES. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional documentation +# sections, marked by \if ... \endif and \cond +# ... \endcond blocks. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines that the +# initial value of a variable or macro / define can have for it to appear in the +# documentation. If the initializer consists of more lines than specified here +# it will be hidden. Use a value of 0 to hide initializers completely. The +# appearance of the value of individual variables and macros / defines can be +# controlled using \showinitializer or \hideinitializer command in the +# documentation regardless of this setting. +# Minimum value: 0, maximum value: 10000, default value: 30. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated at +# the bottom of the documentation of classes and structs. If set to YES, the +# list will mention the files that were used to generate the documentation. +# The default value is: YES. + +SHOW_USED_FILES = YES + +# Set the SHOW_FILES tag to NO to disable the generation of the Files page. This +# will remove the Files entry from the Quick Index and from the Folder Tree View +# (if specified). +# The default value is: YES. + +SHOW_FILES = YES + +# Set the SHOW_NAMESPACES tag to NO to disable the generation of the Namespaces +# page. This will remove the Namespaces entry from the Quick Index and from the +# Folder Tree View (if specified). +# The default value is: YES. + +SHOW_NAMESPACES = YES + +# The FILE_VERSION_FILTER tag can be used to specify a program or script that +# doxygen should invoke to get the current version for each file (typically from +# the version control system). Doxygen will invoke the program by executing (via +# popen()) the command command input-file, where command is the value of the +# FILE_VERSION_FILTER tag, and input-file is the name of an input file provided +# by doxygen. Whatever the program writes to standard output is used as the file +# version. For an example see the documentation. + +FILE_VERSION_FILTER = + +# The LAYOUT_FILE tag can be used to specify a layout file which will be parsed +# by doxygen. The layout file controls the global structure of the generated +# output files in an output format independent way. To create the layout file +# that represents doxygen's defaults, run doxygen with the -l option. You can +# optionally specify a file name after the option, if omitted DoxygenLayout.xml +# will be used as the name of the layout file. +# +# Note that if you run doxygen from a directory containing a file called +# DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE +# tag is left empty. + +LAYOUT_FILE = + +# The CITE_BIB_FILES tag can be used to specify one or more bib files containing +# the reference definitions. This must be a list of .bib files. The .bib +# extension is automatically appended if omitted. This requires the bibtex tool +# to be installed. See also https://en.wikipedia.org/wiki/BibTeX for more info. +# For LaTeX the style of the bibliography can be controlled using +# LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the +# search path. See also \cite for info how to create references. + +CITE_BIB_FILES = + +#--------------------------------------------------------------------------- +# Configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated to +# standard output by doxygen. If QUIET is set to YES this implies that the +# messages are off. +# The default value is: NO. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated to standard error (stderr) by doxygen. If WARNINGS is set to YES +# this implies that the warnings are on. +# +# Tip: Turn warnings on while writing the documentation. +# The default value is: YES. + +WARNINGS = YES + +# If the WARN_IF_UNDOCUMENTED tag is set to YES then doxygen will generate +# warnings for undocumented members. If EXTRACT_ALL is set to YES then this flag +# will automatically be disabled. +# The default value is: YES. + +WARN_IF_UNDOCUMENTED = NO + +# If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some parameters +# in a documented function, or documenting parameters that don't exist or using +# markup commands wrongly. +# The default value is: YES. + +WARN_IF_DOC_ERROR = YES + +# This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that +# are documented, but have no documentation for their parameters or return +# value. If set to NO, doxygen will only warn about wrong or incomplete +# parameter documentation, but not about the absence of documentation. If +# EXTRACT_ALL is set to YES then this flag will automatically be disabled. +# The default value is: NO. + +WARN_NO_PARAMDOC = NO + +# If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when +# a warning is encountered. +# The default value is: NO. + +WARN_AS_ERROR = NO + +# The WARN_FORMAT tag determines the format of the warning messages that doxygen +# can produce. The string should contain the $file, $line, and $text tags, which +# will be replaced by the file and line number from which the warning originated +# and the warning text. Optionally the format may contain $version, which will +# be replaced by the version of the file (if it could be obtained via +# FILE_VERSION_FILTER) +# The default value is: $file:$line: $text. + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning and error +# messages should be written. If left blank the output is written to standard +# error (stderr). + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# Configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag is used to specify the files and/or directories that contain +# documented source files. You may enter file names like myfile.cpp or +# directories like /usr/src/myproject. Separate the files or directories with +# spaces. See also FILE_PATTERNS and EXTENSION_MAPPING +# Note: If this tag is empty the current directory is searched. + +INPUT = $(PWD)/test/test_script & $(PWD)/lib/inc & $(PWD)/lib/config $(PWD)/test/unit_test/inc + +# This tag can be used to specify the character encoding of the source files +# that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses +# libiconv (or the iconv built into libc) for the transcoding. See the libiconv +# documentation (see: https://www.gnu.org/software/libiconv/) for the list of +# possible encodings. +# The default value is: UTF-8. + +INPUT_ENCODING = UTF-8 + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and +# *.h) to filter out the source-files in the directories. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# read by doxygen. +# +# If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp, +# *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h, +# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc, +# *.m, *.markdown, *.md, *.mm, *.dox (to be provided as doxygen C comment), +# *.doc (to be provided as doxygen C comment), *.txt (to be provided as doxygen +# C comment), *.py, *.pyw, *.f90, *.f95, *.f03, *.f08, *.f, *.for, *.tcl, *.vhd, +# *.vhdl, *.ucf, *.qsf and *.ice. + +FILE_PATTERNS = *.c \ + *.cc \ + *.cxx \ + *.cpp \ + *.c++ \ + *.java \ + *.ii \ + *.ixx \ + *.ipp \ + *.i++ \ + *.inl \ + *.idl \ + *.ddl \ + *.odl \ + *.h \ + *.hh \ + *.hxx \ + *.hpp \ + *.h++ \ + *.cs \ + *.d \ + *.php \ + *.php4 \ + *.php5 \ + *.phtml \ + *.inc \ + *.m \ + *.markdown \ + *.md \ + *.mm \ + *.dox \ + *.doc \ + *.txt \ + *.py \ + *.pyw \ + *.f90 \ + *.f95 \ + *.f03 \ + *.f08 \ + *.f \ + *.for \ + *.tcl \ + *.vhd \ + *.vhdl \ + *.ucf \ + *.qsf \ + *.ice + +# The RECURSIVE tag can be used to specify whether or not subdirectories should +# be searched for input files as well. +# The default value is: NO. + +RECURSIVE = YES + +# The EXCLUDE tag can be used to specify files and/or directories that should be +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. +# +# Note that relative paths are relative to the directory from which doxygen is +# run. + +EXCLUDE = + +# The EXCLUDE_SYMLINKS tag can be used to select whether or not files or +# directories that are symbolic links (a Unix file system feature) are excluded +# from the input. +# The default value is: NO. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories for example use the pattern */test/* + +EXCLUDE_PATTERNS = + +# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names +# (namespaces, classes, functions, etc.) that should be excluded from the +# output. The symbol name can be a fully qualified name, a word, or if the +# wildcard * is used, a substring. Examples: ANamespace, AClass, +# AClass::ANamespace, ANamespace::*Test +# +# Note that the wildcards are matched against the file with absolute path, so to +# exclude all test directories use the pattern */test/* + +EXCLUDE_SYMBOLS = + +# The EXAMPLE_PATH tag can be used to specify one or more files or directories +# that contain example code fragments that are included (see the \include +# command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp and +# *.h) to filter out the source-files in the directories. If left blank all +# files are included. + +EXAMPLE_PATTERNS = * + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude commands +# irrespective of the value of the RECURSIVE tag. +# The default value is: NO. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or directories +# that contain images that are to be included in the documentation (see the +# \image command). + +IMAGE_PATH = "docs/images/" + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command: +# +# +# +# where is the value of the INPUT_FILTER tag, and is the +# name of an input file. Doxygen will then use the output that the filter +# program writes to standard output. If FILTER_PATTERNS is specified, this tag +# will be ignored. +# +# Note that the filter must not add or remove lines; it is applied before the +# code is scanned, but not when the output code is generated. If lines are added +# or removed, the anchors will not be placed correctly. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# properly processed by doxygen. + +INPUT_FILTER = + +# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern +# basis. Doxygen will compare the file name with each pattern and apply the +# filter if there is a match. The filters are a list of the form: pattern=filter +# (like *.cpp=my_cpp_filter). See INPUT_FILTER for further information on how +# filters are used. If the FILTER_PATTERNS tag is empty or if none of the +# patterns match the file name, INPUT_FILTER is applied. +# +# Note that for custom extensions or not directly supported extensions you also +# need to set EXTENSION_MAPPING for the extension otherwise the files are not +# properly processed by doxygen. + +FILTER_PATTERNS = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER) will also be used to filter the input files that are used for +# producing the source files to browse (i.e. when SOURCE_BROWSER is set to YES). +# The default value is: NO. + +FILTER_SOURCE_FILES = NO + +# The FILTER_SOURCE_PATTERNS tag can be used to specify source filters per file +# pattern. A pattern will override the setting for FILTER_PATTERN (if any) and +# it is also possible to disable source filtering for a specific pattern using +# *.ext= (so without naming a filter). +# This tag requires that the tag FILTER_SOURCE_FILES is set to YES. + +FILTER_SOURCE_PATTERNS = + +# If the USE_MDFILE_AS_MAINPAGE tag refers to the name of a markdown file that +# is part of the input, its contents will be placed on the main page +# (index.html). This can be useful if you have a project on for instance GitHub +# and want to reuse the introduction page also for the doxygen output. + +USE_MDFILE_AS_MAINPAGE = + +#--------------------------------------------------------------------------- +# Configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will be +# generated. Documented entities will be cross-referenced with these sources. +# +# Note: To get rid of all source code in the generated output, make sure that +# also VERBATIM_HEADERS is set to NO. +# The default value is: NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body of functions, +# classes and enums directly into the documentation. +# The default value is: NO. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES will instruct doxygen to hide any +# special comment blocks from generated source code fragments. Normal C, C++ and +# Fortran comments will always remain visible. +# The default value is: YES. + +STRIP_CODE_COMMENTS = YES + +# If the REFERENCED_BY_RELATION tag is set to YES then for each documented +# entity all documented functions referencing it will be listed. +# The default value is: NO. + +REFERENCED_BY_RELATION = NO + +# If the REFERENCES_RELATION tag is set to YES then for each documented function +# all documented entities called/used by that function will be listed. +# The default value is: NO. + +REFERENCES_RELATION = NO + +# If the REFERENCES_LINK_SOURCE tag is set to YES and SOURCE_BROWSER tag is set +# to YES then the hyperlinks from functions in REFERENCES_RELATION and +# REFERENCED_BY_RELATION lists will link to the source code. Otherwise they will +# link to the documentation. +# The default value is: YES. + +REFERENCES_LINK_SOURCE = YES + +# If SOURCE_TOOLTIPS is enabled (the default) then hovering a hyperlink in the +# source code will show a tooltip with additional information such as prototype, +# brief description and links to the definition and documentation. Since this +# will make the HTML file larger and loading of large files a bit slower, you +# can opt to disable this feature. +# The default value is: YES. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +SOURCE_TOOLTIPS = YES + +# If the USE_HTAGS tag is set to YES then the references to source code will +# point to the HTML generated by the htags(1) tool instead of doxygen built-in +# source browser. The htags tool is part of GNU's global source tagging system +# (see https://www.gnu.org/software/global/global.html). You will need version +# 4.8.6 or higher. +# +# To use it do the following: +# - Install the latest version of global +# - Enable SOURCE_BROWSER and USE_HTAGS in the configuration file +# - Make sure the INPUT points to the root of the source tree +# - Run doxygen as normal +# +# Doxygen will invoke htags (and that will in turn invoke gtags), so these +# tools must be available from the command line (i.e. in the search path). +# +# The result: instead of the source browser generated by doxygen, the links to +# source code will now point to the output of htags. +# The default value is: NO. +# This tag requires that the tag SOURCE_BROWSER is set to YES. + +USE_HTAGS = NO + +# If the VERBATIM_HEADERS tag is set the YES then doxygen will generate a +# verbatim copy of the header file for each class for which an include is +# specified. Set to NO to disable this. +# See also: Section \class. +# The default value is: YES. + +VERBATIM_HEADERS = YES + +# If the CLANG_ASSISTED_PARSING tag is set to YES then doxygen will use the +# clang parser (see: http://clang.llvm.org/) for more accurate parsing at the +# cost of reduced performance. This can be particularly helpful with template +# rich C++ code for which doxygen's built-in parser lacks the necessary type +# information. +# Note: The availability of this option depends on whether or not doxygen was +# generated with the -Duse_libclang=ON option for CMake. +# The default value is: NO. + +CLANG_ASSISTED_PARSING = NO + +# If clang assisted parsing is enabled you can provide the compiler with command +# line options that you would normally use when invoking the compiler. Note that +# the include paths will already be set by doxygen for the files and directories +# specified with INPUT and INCLUDE_PATH. +# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES. + +CLANG_OPTIONS = + +# If clang assisted parsing is enabled you can provide the clang parser with the +# path to the compilation database (see: +# http://clang.llvm.org/docs/HowToSetupToolingForLLVM.html) used when the files +# were built. This is equivalent to specifying the "-p" option to a clang tool, +# such as clang-check. These options will then be passed to the parser. +# Note: The availability of this option depends on whether or not doxygen was +# generated with the -Duse_libclang=ON option for CMake. + +CLANG_DATABASE_PATH = + +#--------------------------------------------------------------------------- +# Configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index of all +# compounds will be generated. Enable this if the project contains a lot of +# classes, structs, unions or interfaces. +# The default value is: YES. + +ALPHABETICAL_INDEX = YES + +# The COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns in +# which the alphabetical index list will be split. +# Minimum value: 1, maximum value: 20, default value: 5. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all classes will +# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag +# can be used to specify a prefix (or a list of prefixes) that should be ignored +# while generating the index headers. +# This tag requires that the tag ALPHABETICAL_INDEX is set to YES. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES, doxygen will generate HTML output +# The default value is: YES. + +GENERATE_HTML = YES + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. If a +# relative path is entered the value of OUTPUT_DIRECTORY will be put in front of +# it. +# The default directory is: html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_OUTPUT = $(PWD)/docs/document_api_iec60730_library +# $(YOUR_DOT_PATH) +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for each +# generated HTML page (for example: .htm, .php, .asp). +# The default value is: .html. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a user-defined HTML header file for +# each generated HTML page. If the tag is left blank doxygen will generate a +# standard header. +# +# To get valid HTML the header file that includes any scripts and style sheets +# that doxygen needs, which is dependent on the configuration options used (e.g. +# the setting GENERATE_TREEVIEW). It is highly recommended to start with a +# default header using +# doxygen -w html new_header.html new_footer.html new_stylesheet.css +# YourConfigFile +# and then modify the file new_header.html. See also section "Doxygen usage" +# for information on how to generate the default header that doxygen normally +# uses. +# Note: The header is subject to change so you typically have to regenerate the +# default header when upgrading to a newer version of doxygen. For a description +# of the possible markers and block names see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_HEADER = + +# The HTML_FOOTER tag can be used to specify a user-defined HTML footer for each +# generated HTML page. If the tag is left blank doxygen will generate a standard +# footer. See HTML_HEADER for more information on how to generate a default +# footer and what special commands can be used inside the footer. See also +# section "Doxygen usage" for information on how to generate the default footer +# that doxygen normally uses. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_FOOTER = + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading style +# sheet that is used by each HTML page. It can be used to fine-tune the look of +# the HTML output. If left blank doxygen will generate a default style sheet. +# See also section "Doxygen usage" for information on how to generate the style +# sheet that doxygen normally uses. +# Note: It is recommended to use HTML_EXTRA_STYLESHEET instead of this tag, as +# it is more robust and this tag (HTML_STYLESHEET) will in the future become +# obsolete. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_STYLESHEET = + +# The HTML_EXTRA_STYLESHEET tag can be used to specify additional user-defined +# cascading style sheets that are included after the standard style sheets +# created by doxygen. Using this option one can overrule certain style aspects. +# This is preferred over using HTML_STYLESHEET since it does not replace the +# standard style sheet and is therefore more robust against future updates. +# Doxygen will copy the style sheet files to the output directory. +# Note: The order of the extra style sheet files is of importance (e.g. the last +# style sheet in the list overrules the setting of the previous ones in the +# list). For an example see the documentation. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_STYLESHEET = + +# The HTML_EXTRA_FILES tag can be used to specify one or more extra images or +# other source files which should be copied to the HTML output directory. Note +# that these files will be copied to the base HTML output directory. Use the +# $relpath^ marker in the HTML_HEADER and/or HTML_FOOTER files to load these +# files. In the HTML_STYLESHEET file, use the file name only. Also note that the +# files will be copied as-is; there are no commands or markers available. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_EXTRA_FILES = + +# The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen +# will adjust the colors in the style sheet and background images according to +# this color. Hue is specified as an angle on a colorwheel, see +# https://en.wikipedia.org/wiki/Hue for more information. For instance the value +# 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300 +# purple, and 360 is red again. +# Minimum value: 0, maximum value: 359, default value: 220. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_HUE = 220 + +# The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors +# in the HTML output. For a value of 0 the output will use grayscales only. A +# value of 255 will produce the most vivid colors. +# Minimum value: 0, maximum value: 255, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_SAT = 100 + +# The HTML_COLORSTYLE_GAMMA tag controls the gamma correction applied to the +# luminance component of the colors in the HTML output. Values below 100 +# gradually make the output lighter, whereas values above 100 make the output +# darker. The value divided by 100 is the actual gamma applied, so 80 represents +# a gamma of 0.8, The value 220 represents a gamma of 2.2, and 100 does not +# change the gamma. +# Minimum value: 40, maximum value: 240, default value: 80. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_COLORSTYLE_GAMMA = 80 + +# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML +# page will contain the date and time when the page was generated. Setting this +# to YES can help to show when doxygen was last run and thus if the +# documentation is up to date. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_TIMESTAMP = NO + +# If the HTML_DYNAMIC_MENUS tag is set to YES then the generated HTML +# documentation will contain a main index with vertical navigation menus that +# are dynamically created via JavaScript. If disabled, the navigation index will +# consists of multiple levels of tabs that are statically embedded in every HTML +# page. Disable this option to support browsers that do not have JavaScript, +# like the Qt help browser. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_MENUS = YES + +# If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML +# documentation will contain sections that can be hidden and shown after the +# page has loaded. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_DYNAMIC_SECTIONS = NO + +# With HTML_INDEX_NUM_ENTRIES one can control the preferred number of entries +# shown in the various tree structured indices initially; the user can expand +# and collapse entries dynamically later on. Doxygen will expand the tree to +# such a level that at most the specified number of entries are visible (unless +# a fully collapsed tree already exceeds this amount). So setting the number of +# entries 1 will produce a full collapsed tree by default. 0 is a special value +# representing an infinite number of entries and will result in a full expanded +# tree by default. +# Minimum value: 0, maximum value: 9999, default value: 100. +# This tag requires that the tag GENERATE_HTML is set to YES. + +HTML_INDEX_NUM_ENTRIES = 100 + +# If the GENERATE_DOCSET tag is set to YES, additional index files will be +# generated that can be used as input for Apple's Xcode 3 integrated development +# environment (see: https://developer.apple.com/xcode/), introduced with OSX +# 10.5 (Leopard). To create a documentation set, doxygen will generate a +# Makefile in the HTML output directory. Running make will produce the docset in +# that directory and running make install will install the docset in +# ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at +# startup. See https://developer.apple.com/library/archive/featuredarticles/Doxy +# genXcode/_index.html for more information. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_DOCSET = NO + +# This tag determines the name of the docset feed. A documentation feed provides +# an umbrella under which multiple documentation sets from a single provider +# (such as a company or product suite) can be grouped. +# The default value is: Doxygen generated docs. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_FEEDNAME = "Doxygen generated docs" + +# This tag specifies a string that should uniquely identify the documentation +# set bundle. This should be a reverse domain-name style string, e.g. +# com.mycompany.MyDocSet. Doxygen will append .docset to the name. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_BUNDLE_ID = org.doxygen.Project + +# The DOCSET_PUBLISHER_ID tag specifies a string that should uniquely identify +# the documentation publisher. This should be a reverse domain-name style +# string, e.g. com.mycompany.MyDocSet.documentation. +# The default value is: org.doxygen.Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_ID = org.doxygen.Publisher + +# The DOCSET_PUBLISHER_NAME tag identifies the documentation publisher. +# The default value is: Publisher. +# This tag requires that the tag GENERATE_DOCSET is set to YES. + +DOCSET_PUBLISHER_NAME = Publisher + +# If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three +# additional HTML index files: index.hhp, index.hhc, and index.hhk. The +# index.hhp is a project file that can be read by Microsoft's HTML Help Workshop +# (see: https://www.microsoft.com/en-us/download/details.aspx?id=21138) on +# Windows. +# +# The HTML Help Workshop contains a compiler that can convert all HTML output +# generated by doxygen into a single compiled HTML file (.chm). Compiled HTML +# files are now used as the Windows 98 help format, and will replace the old +# Windows help format (.hlp) on all Windows platforms in the future. Compressed +# HTML files also contain an index, a table of contents, and you can search for +# words in the documentation. The HTML workshop also contains a viewer for +# compressed HTML files. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_HTMLHELP = NO + +# The CHM_FILE tag can be used to specify the file name of the resulting .chm +# file. You can add a path in front of the file if the result should not be +# written to the html output directory. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_FILE = + +# The HHC_LOCATION tag can be used to specify the location (absolute path +# including file name) of the HTML help compiler (hhc.exe). If non-empty, +# doxygen will try to run the HTML help compiler on the generated index.hhp. +# The file has to be specified with full path. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +HHC_LOCATION = + +# The GENERATE_CHI flag controls if a separate .chi index file is generated +# (YES) or that it should be included in the master .chm file (NO). +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +GENERATE_CHI = NO + +# The CHM_INDEX_ENCODING is used to encode HtmlHelp index (hhk), content (hhc) +# and project file content. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +CHM_INDEX_ENCODING = + +# The BINARY_TOC flag controls whether a binary table of contents is generated +# (YES) or a normal table of contents (NO) in the .chm file. Furthermore it +# enables the Previous and Next buttons. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members to +# the table of contents of the HTML help documentation and to the tree view. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTMLHELP is set to YES. + +TOC_EXPAND = NO + +# If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and +# QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that +# can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help +# (.qch) of the generated HTML documentation. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_QHP = NO + +# If the QHG_LOCATION tag is specified, the QCH_FILE tag can be used to specify +# the file name of the resulting .qch file. The path specified is relative to +# the HTML output folder. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QCH_FILE = + +# The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help +# Project output. For more information please see Qt Help Project / Namespace +# (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#namespace). +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_NAMESPACE = org.doxygen.Project + +# The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt +# Help Project output. For more information please see Qt Help Project / Virtual +# Folders (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#virtual- +# folders). +# The default value is: doc. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_VIRTUAL_FOLDER = doc + +# If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom +# filter to add. For more information please see Qt Help Project / Custom +# Filters (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_NAME = + +# The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the +# custom filter to add. For more information please see Qt Help Project / Custom +# Filters (see: https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom- +# filters). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_CUST_FILTER_ATTRS = + +# The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this +# project's filter section matches. Qt Help Project / Filter Attributes (see: +# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#filter-attributes). +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHP_SECT_FILTER_ATTRS = + +# The QHG_LOCATION tag can be used to specify the location of Qt's +# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the +# generated .qhp file. +# This tag requires that the tag GENERATE_QHP is set to YES. + +QHG_LOCATION = + +# If the GENERATE_ECLIPSEHELP tag is set to YES, additional index files will be +# generated, together with the HTML files, they form an Eclipse help plugin. To +# install this plugin and make it available under the help contents menu in +# Eclipse, the contents of the directory containing the HTML and XML files needs +# to be copied into the plugins directory of eclipse. The name of the directory +# within the plugins directory should be the same as the ECLIPSE_DOC_ID value. +# After copying Eclipse needs to be restarted before the help appears. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_ECLIPSEHELP = NO + +# A unique identifier for the Eclipse help plugin. When installing the plugin +# the directory name containing the HTML and XML files should also have this +# name. Each documentation set should have its own identifier. +# The default value is: org.doxygen.Project. +# This tag requires that the tag GENERATE_ECLIPSEHELP is set to YES. + +ECLIPSE_DOC_ID = org.doxygen.Project + +# If you want full control over the layout of the generated HTML pages it might +# be necessary to disable the index and replace it with your own. The +# DISABLE_INDEX tag can be used to turn on/off the condensed index (tabs) at top +# of each HTML page. A value of NO enables the index and the value YES disables +# it. Since the tabs in the index contain the same information as the navigation +# tree, you can set this option to YES if you also set GENERATE_TREEVIEW to YES. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +DISABLE_INDEX = NO + +# The GENERATE_TREEVIEW tag is used to specify whether a tree-like index +# structure should be generated to display hierarchical information. If the tag +# value is set to YES, a side panel will be generated containing a tree-like +# index structure (just like the one that is generated for HTML Help). For this +# to work a browser that supports JavaScript, DHTML, CSS and frames is required +# (i.e. any modern browser). Windows users are probably better off using the +# HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can +# further fine-tune the look of the index. As an example, the default style +# sheet generated by doxygen has an example that shows how to put an image at +# the root of the tree instead of the PROJECT_NAME. Since the tree basically has +# the same information as the tab index, you could consider setting +# DISABLE_INDEX to YES when enabling this option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +GENERATE_TREEVIEW = NO + +# The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that +# doxygen will group on one line in the generated HTML documentation. +# +# Note that a value of 0 will completely suppress the enum values from appearing +# in the overview section. +# Minimum value: 0, maximum value: 20, default value: 4. +# This tag requires that the tag GENERATE_HTML is set to YES. + +ENUM_VALUES_PER_LINE = 4 + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be used +# to set the initial width (in pixels) of the frame in which the tree is shown. +# Minimum value: 0, maximum value: 1500, default value: 250. +# This tag requires that the tag GENERATE_HTML is set to YES. + +TREEVIEW_WIDTH = 250 + +# If the EXT_LINKS_IN_WINDOW option is set to YES, doxygen will open links to +# external symbols imported via tag files in a separate window. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +EXT_LINKS_IN_WINDOW = NO + +# Use this tag to change the font size of LaTeX formulas included as images in +# the HTML documentation. When you change the font size after a successful +# doxygen run you need to manually remove any form_*.png images from the HTML +# output directory to force them to be regenerated. +# Minimum value: 8, maximum value: 50, default value: 10. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_FONTSIZE = 10 + +# Use the FORMULA_TRANSPARENT tag to determine whether or not the images +# generated for formulas are transparent PNGs. Transparent PNGs are not +# supported properly for IE 6.0, but are supported on all modern browsers. +# +# Note that when changing this option you need to delete any form_*.png files in +# the HTML output directory before the changes have effect. +# The default value is: YES. +# This tag requires that the tag GENERATE_HTML is set to YES. + +FORMULA_TRANSPARENT = YES + +# The FORMULA_MACROFILE can contain LaTeX \newcommand and \renewcommand commands +# to create new LaTeX commands to be used in formulas as building blocks. See +# the section "Including formulas" for details. + +FORMULA_MACROFILE = + +# Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see +# https://www.mathjax.org) which uses client side JavaScript for the rendering +# instead of using pre-rendered bitmaps. Use this if you do not have LaTeX +# installed or if you want to formulas look prettier in the HTML output. When +# enabled you may also need to install MathJax separately and configure the path +# to it using the MATHJAX_RELPATH option. +# The default value is: NO. +# This tag requires that the tag GENERATE_HTML is set to YES. + +USE_MATHJAX = NO + +# When MathJax is enabled you can set the default output format to be used for +# the MathJax output. See the MathJax site (see: +# http://docs.mathjax.org/en/latest/output.html) for more details. +# Possible values are: HTML-CSS (which is slower, but has the best +# compatibility), NativeMML (i.e. MathML) and SVG. +# The default value is: HTML-CSS. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_FORMAT = HTML-CSS + +# When MathJax is enabled you need to specify the location relative to the HTML +# output directory using the MATHJAX_RELPATH option. The destination directory +# should contain the MathJax.js script. For instance, if the mathjax directory +# is located at the same level as the HTML output directory, then +# MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax +# Content Delivery Network so you can quickly see the result without installing +# MathJax. However, it is strongly recommended to install a local copy of +# MathJax from https://www.mathjax.org before deployment. +# The default value is: https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.5/. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_RELPATH = https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.5/ + +# The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax +# extension names that should be enabled during MathJax rendering. For example +# MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_EXTENSIONS = + +# The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces +# of code that will be used on startup of the MathJax code. See the MathJax site +# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an +# example see the documentation. +# This tag requires that the tag USE_MATHJAX is set to YES. + +MATHJAX_CODEFILE = + +# When the SEARCHENGINE tag is enabled doxygen will generate a search box for +# the HTML output. The underlying search engine uses javascript and DHTML and +# should work on any modern browser. Note that when using HTML help +# (GENERATE_HTMLHELP), Qt help (GENERATE_QHP), or docsets (GENERATE_DOCSET) +# there is already a search function so this one should typically be disabled. +# For large projects the javascript based search engine can be slow, then +# enabling SERVER_BASED_SEARCH may provide a better solution. It is possible to +# search using the keyboard; to jump to the search box use + S +# (what the is depends on the OS and browser, but it is typically +# , /
    + +
    +
    +
    Class List
    +
    +
    +
    Here are the classes, structs, unions and interfaces with brief descriptions:
    +
    [detail level 12]
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
     ▼Nenums
     CJLinkAccessFlags
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     CJLinkBreakpoint
     CJLinkBreakpointImplementation
     CJLinkCore
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     CJLinkDeviceFamily
     CJLinkEraseErrors
     CJLinkEventTypes
     CJLinkFlags
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     CJLinkFunctions
     CJLinkGlobalErrors
     CJLinkHaltReasons
     CJLinkHost
     CJLinkInterfaces
     CJLinkReadErrors
     CJLinkResetStrategyCortexM3
     CJLinkROMTable
     CJLinkRTTCommand
     CJLinkRTTDirection
     CJLinkRTTErrors
     CJLinkStraceCommand
     CJLinkStraceEvent
     CJLinkStraceOperation
     CJLinkSWOCommands
     CJLinkSWOInterfaces
     CJLinkTraceCommand
     CJLinkTraceFormat
     CJLinkTraceSource
     CJLinkVectorCatchCortexM3
     CJLinkWriteErrors
     ▼Nerrors
     CJLinkDataException
     CJLinkEraseException
     CJLinkException
     CJLinkFlashException
     CJLinkReadException
     CJLinkRTTException
     CJLinkWriteException
     ▼Niec60730_test_base
     Ciec60730_logger
     Ciec60730TestBase
     ▼Nintegration_test_iec60730_cpu_registers
     Ciec60730_cpu_regsIEC60730 CPU Register Check Tests
     ▼Nintegration_test_iec60730_invariable_memory
     Ciec60730_imcIEC60730 Invariable Memory Plausibility Verification Tests
     ▼Nintegration_test_iec60730_irq
     Ciec60730_irqIEC60730 IRQ Plausibility Verification Tests
     ▼Nintegration_test_iec60730_program_counter
     Ciec60730_programme_counterIEC60730 CPU Program counter Tests
     ▼Nintegration_test_iec60730_system_clock
     Ciec60730_system_clockIEC60730 System Clock Verification Tests
     ▼Nintegration_test_iec60730_variable_memory
     Ciec60730_vmcIEC60730 Variable Memory Plausibility Verification Tests
     ▼Nintegration_test_iec60730_watchdog
     Ciec60730_watchdogIEC60730 Watchdog Verification Tests
     ▼Njlink
     CJLinkDll
     ▼Njlink_constants
     CJlinkArm_Speed_Info_CStruct
     CJLinkArmEmuConnectInfo_CStruct
     CJLinkJtagIdData_CStruct
     ▼Nunit_test_iec60730_get_report
     Ciec60730_unit_test_resultIEC60730 get unit test result
     ▼Nutil
     CPyTestSuites
     CTelnetDeviceUtil
     CTelnetHostUtil
     CTimeStampUtil
     Csl_iec60730_imc_params_tThis structure is used as configuration for IMC testing, that holds GPCRC Register
     Csl_iec60730_imc_test_multiple_regions_t
     Csl_iec60730_imc_test_region_tThis structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check
     Csl_iec60730_irq_cfg_t
     Csl_iec60730_irq_execution_bounds_t
     Csl_iec60730_irq_fail_t
     Csl_iec60730_library_version_t
     Csl_iec60730_safety_check_t
     Csl_iec60730_update_crc_params_t
     Csl_iec60730_vmc_test_multiple_regions_tThis structure is used as multiple test regions for VMC testing
     Csl_iec60730_vmc_test_region_tThis structure is used as configuration for VMC testing
     Csl_iec60730_watchdog_tWatchdog component configuration structure
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/app_8h.html b/site/document_api_iec60730_library/app_8h.html new file mode 100644 index 00000000..c639226d --- /dev/null +++ b/site/document_api_iec60730_library/app_8h.html @@ -0,0 +1,151 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/app.h File Reference + + + + + + + + + +
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    +Functions
    +
    +
    app.h File Reference
    +
    +
    + +

    Top level application functions. +More...

    +
    #include "unit_test_common.h"
    +#include "unit_test_iec60730_post.h"
    +#include "unit_test_iec60730_bist.h"
    +#include "unit_test_iec60730_program_counter.h"
    +#include "unit_test_iec60730_safety_check.h"
    +#include "unit_test_iec60730_irq.h"
    +#include "unit_test_iec60730_system_clock.h"
    +#include "unit_test_iec60730_watchdog.h"
    +#include "unit_test_iec60730_cpu_registers.h"
    +#include "unit_test_iec60730_variable_memory.h"
    +#include "unit_test_iec60730_invariable_memory.h"
    +
    +

    Go to the source code of this file.

    + + + + + + +

    +Functions

    void app_init (void)
     
    void app_process_action (void)
     
    +

    Detailed Description

    +

    Top level application functions.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +

    Function Documentation

    + +

    ◆ app_init()

    + +
    +
    + + + + + + + + +
    void app_init (void )
    +
    +

    Initialize application.

    + +
    +
    + +

    ◆ app_process_action()

    + +
    +
    + + + + + + + + +
    void app_process_action (void )
    +
    +

    App ticking function.

    + +
    +
    +
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    + + diff --git a/site/document_api_iec60730_library/app_8h_source.html b/site/document_api_iec60730_library/app_8h_source.html new file mode 100644 index 00000000..37410d0f --- /dev/null +++ b/site/document_api_iec60730_library/app_8h_source.html @@ -0,0 +1,116 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/app.h Source File + + + + + + + + + +
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    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef APP_H
    +
    19 #define APP_H
    +
    20 
    +
    21 #include "unit_test_common.h"
    +
    22 #include "unit_test_iec60730_post.h"
    +
    23 #include "unit_test_iec60730_bist.h"
    +
    24 #include "unit_test_iec60730_program_counter.h"
    +
    25 #include "unit_test_iec60730_safety_check.h"
    +
    26 #include "unit_test_iec60730_irq.h"
    +
    27 #include "unit_test_iec60730_system_clock.h"
    +
    28 #include "unit_test_iec60730_watchdog.h"
    +
    29 #include "unit_test_iec60730_cpu_registers.h"
    +
    30 #include "unit_test_iec60730_variable_memory.h"
    +
    31 #include "unit_test_iec60730_invariable_memory.h"
    +
    32 
    +
    33 /***************************************************************************/
    +
    36 void app_init(void);
    +
    37 
    +
    38 /***************************************************************************/
    +
    41 void app_process_action(void);
    +
    42 
    +
    43 #endif // APP_H
    +
    +
    app_init
    void app_init(void)
    +
    unit_test_iec60730_system_clock.h
    Unit tests for functions in system_clock module.
    +
    unit_test_iec60730_variable_memory.h
    Unit tests for functions in variable memory module.
    +
    unit_test_iec60730_invariable_memory.h
    Unit tests for functions in invariable memory module.
    +
    unit_test_iec60730_cpu_registers.h
    Unit tests for functions in cpu registers module.
    +
    unit_test_iec60730_post.h
    Unit test function sl_iec60730_post().
    +
    unit_test_common.h
    common unit test api
    +
    unit_test_iec60730_irq.h
    Unit tests for functions in irq module.
    +
    unit_test_iec60730_bist.h
    Unit test function sl_iec60730_bist().
    +
    app_process_action
    void app_process_action(void)
    +
    unit_test_iec60730_safety_check.h
    Unit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().
    +
    unit_test_iec60730_watchdog.h
    Unit tests for functions in watchdog module.
    +
    unit_test_iec60730_program_counter.h
    Unit test function sl_iec60730_program_counter_test().
    + +
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    enums.JLinkAccessFlags Member List
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    This is the complete list of members for enums.JLinkAccessFlags, including all inherited members.

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    PRIV (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
    READ (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
    SIZE_16BIT (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
    SIZE_32BIT (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
    SIZE_8BIT (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
    WRITE (defined in enums.JLinkAccessFlags)enums.JLinkAccessFlagsstatic
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    enums.JLinkAccessFlags Class Reference
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    +Static Public Attributes

    +tuple READ = (0 << 0)
     
    +tuple WRITE = (1 << 0)
     
    +tuple PRIV = (1 << 4)
     
    +tuple SIZE_8BIT = (0 << 1)
     
    +tuple SIZE_16BIT = (1 << 1)
     
    +tuple SIZE_32BIT = (2 << 1)
     
    +

    Detailed Description

    +
    J-Link access types for data events.
+These access types allow specifying the different types of access events
+that should be monitored.
+Attributes:
+  READ: specifies to monitor read accesses.
+  WRITE: specifies to monitor write accesses.
+  PRIVILEGED: specifies to monitor privileged accesses.
+  SIZE_8BIT: specifies to monitor an 8-bit access width.
+  SIZE_16BIT: specifies to monitor an 16-bit access width.
+  SIZE_32BIT: specifies to monitor an 32-bit access width.
+
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
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    DIR (defined in enums.JLinkAccessMaskFlags)enums.JLinkAccessMaskFlagsstatic
    PRIV (defined in enums.JLinkAccessMaskFlags)enums.JLinkAccessMaskFlagsstatic
    SIZE (defined in enums.JLinkAccessMaskFlags)enums.JLinkAccessMaskFlagsstatic
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    +Static Public Attributes

    +tuple SIZE = (3 << 1)
     
    +tuple DIR = (1 << 0)
     
    +tuple PRIV = (1 << 4)
     
    +

    Detailed Description

    +
    J-Link access mask flags.
+Attributes:
+  SIZE: specifies to not care about the access size of the event.
+  DIR: specifies to not care about the access direction of the event.
+  PRIV: specifies to not care about the access privilege of the event.
+
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
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    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkBreakpoint-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkBreakpoint-members.html new file mode 100644 index 00000000..6925ac6c --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkBreakpoint-members.html @@ -0,0 +1,90 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    ANY (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
    ARM (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
    HW (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
    SW (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
    SW_FLASH (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
    SW_RAM (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
    THUMB (defined in enums.JLinkBreakpoint)enums.JLinkBreakpointstatic
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    enums.JLinkBreakpoint Class Reference
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    +Static Public Attributes

    +tuple SW_RAM = (1 << 4)
     
    +tuple SW_FLASH = (1 << 5)
     
    +tuple SW = (0x000000F0)
     
    +tuple HW = (0xFFFFFF00)
     
    +tuple ANY = (0xFFFFFFF0)
     
    +tuple ARM = (1 << 0)
     
    +tuple THUMB = (2 << 0)
     
    +

    Detailed Description

    +
    J-Link breakpoint types.
+Attributes:
+  SW_RAM: Software breakpont located in RAM.
+  SW_FLASH: Software breakpoint located in flash.
+  SW: Software breakpoint located in RAM or flash.
+  HW: Hardware breakpoint.
+  ANY: Allows specifying any time of breakpoint.
+  ARM: Breakpoint in ARM mode (only available on ARM 7/9 cores).
+  THUMB: Breakpoint in THUMB mode (only available on ARM 7/9 cores).
+
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
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    FLASH (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
    HARD (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
    PENDING (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
    SOFT (defined in enums.JLinkBreakpointImplementation)enums.JLinkBreakpointImplementationstatic
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    +Static Public Attributes

    +tuple HARD = (1 << 0)
     
    +tuple SOFT = (1 << 1)
     
    +tuple PENDING = (1 << 2)
     
    +tuple FLASH = (1 << 4)
     
    +

    Detailed Description

    +
    J-Link breakpoint implementation types.
+Attributes:
+  HARD: Hardware breakpoint using a breakpoint unit.
+  SOFT: Software breakpoint using a breakpoint instruction.
+  PENDING: Breakpoint has not been set yet.
+  FLASH: Breakpoint set in flash.
+
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
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    DCC (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    GO (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    HALT (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    HSS (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    IS_HALTED (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    READ_MEMORY (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    READ_REGISTERS (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    RESET (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    RUN_STOP (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    STEP (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    TERMINAL (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    WRITE_MEMORY (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    WRITE_REGISTERS (defined in enums.JLinkCPUCapabilities)enums.JLinkCPUCapabilitiesstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkCPUCapabilities.html b/site/document_api_iec60730_library/classenums_1_1JLinkCPUCapabilities.html new file mode 100644 index 00000000..438d5f53 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkCPUCapabilities.html @@ -0,0 +1,130 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkCPUCapabilities Class Reference + + + + + + + + + +
    +
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    Document API IEC60730 Library +
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    +
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    enums.JLinkCPUCapabilities Class Reference
    +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +tuple READ_MEMORY = (1 << 1)
     
    +tuple WRITE_MEMORY = (1 << 2)
     
    +tuple READ_REGISTERS = (1 << 3)
     
    +tuple WRITE_REGISTERS = (1 << 4)
     
    +tuple GO = (1 << 5)
     
    +tuple STEP = (1 << 6)
     
    +tuple HALT = (1 << 7)
     
    +tuple IS_HALTED = (1 << 8)
     
    +tuple RESET = (1 << 9)
     
    +tuple RUN_STOP = (1 << 10)
     
    +tuple TERMINAL = (1 << 11)
     
    +tuple DCC = (1 << 14)
     
    +tuple HSS = (1 << 15)
     
    +

    Detailed Description

    +
    Target CPU Cabilities.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkCore-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkCore-members.html new file mode 100644 index 00000000..1c05f4bf --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkCore-members.html @@ -0,0 +1,163 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    enums.JLinkCore Member List
    +
    +
    + +

    This is the complete list of members for enums.JLinkCore, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ANY (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM11 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1136 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1136J (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1136J_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1136JF (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1136JF_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1156 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1176 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1176J (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1176J_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1176JF (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM1176JF_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM7 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM7TDMI (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM7TDMI_R3 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM7TDMI_R4 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM7TDMI_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM7TDMI_S_R3 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM7TDMI_S_R4 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM9 (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM920T (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM922T (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM926EJ_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM946E_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM966E_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM968E_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    ARM9TDMI_S (defined in enums.JLinkCore)enums.JLinkCorestatic
    CIP51 (defined in enums.JLinkCore)enums.JLinkCorestatic
    COLDFIRE (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_A12 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_A15 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_A17 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_A5 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_A7 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_A8 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_A9 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M0 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M1 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M3 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M3_R1P0 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M3_R1P1 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M3_R2P0 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M4 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M7 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M_V8BASEL (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_M_V8MAINL (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_R4 (defined in enums.JLinkCore)enums.JLinkCorestatic
    CORTEX_R5 (defined in enums.JLinkCore)enums.JLinkCorestatic
    EFM8_UNSPEC (defined in enums.JLinkCore)enums.JLinkCorestatic
    MIPS (defined in enums.JLinkCore)enums.JLinkCorestatic
    MIPS_M4K (defined in enums.JLinkCore)enums.JLinkCorestatic
    MIPS_MICROAPTIV (defined in enums.JLinkCore)enums.JLinkCorestatic
    NONE (defined in enums.JLinkCore)enums.JLinkCorestatic
    POWER_PC (defined in enums.JLinkCore)enums.JLinkCorestatic
    POWER_PC_N1 (defined in enums.JLinkCore)enums.JLinkCorestatic
    POWER_PC_N2 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX110 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX111 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX113 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX210 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX21A (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX220 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX230 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX231 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX23T (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX610 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX621 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX62G (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX62N (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX62T (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX630 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX631 (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX63N (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX63T (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX64M (defined in enums.JLinkCore)enums.JLinkCorestatic
    RX71M (defined in enums.JLinkCore)enums.JLinkCorestatic
    SIM (defined in enums.JLinkCore)enums.JLinkCorestatic
    XSCALE (defined in enums.JLinkCore)enums.JLinkCorestatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkCore.html b/site/document_api_iec60730_library/classenums_1_1JLinkCore.html new file mode 100644 index 00000000..20ec3de0 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkCore.html @@ -0,0 +1,333 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkCore Class Reference + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Static Public Attributes

    +int NONE = 0x00000000
     
    +int ANY = 0xFFFFFFFF
     
    +int CORTEX_M1 = 0x010000FF
     
    +int COLDFIRE = 0x02FFFFFF
     
    +int CORTEX_M3 = 0x030000FF
     
    +int CORTEX_M3_R1P0 = 0x03000010
     
    +int CORTEX_M3_R1P1 = 0x03000011
     
    +int CORTEX_M3_R2P0 = 0x03000020
     
    +int SIM = 0x04FFFFFF
     
    +int XSCALE = 0x05FFFFFF
     
    +int CORTEX_M0 = 0x060000FF
     
    +int CORTEX_M_V8BASEL = 0x060100FF
     
    +int ARM7 = 0x07FFFFFF
     
    +int ARM7TDMI = 0x070000FF
     
    +int ARM7TDMI_R3 = 0x0700003F
     
    +int ARM7TDMI_R4 = 0x0700004F
     
    +int ARM7TDMI_S = 0x070001FF
     
    +int ARM7TDMI_S_R3 = 0x0700013F
     
    +int ARM7TDMI_S_R4 = 0x0700014F
     
    +int CORTEX_A8 = 0x080000FF
     
    +int CORTEX_A7 = 0x080800FF
     
    +int CORTEX_A9 = 0x080900FF
     
    +int CORTEX_A12 = 0x080A00FF
     
    +int CORTEX_A15 = 0x080B00FF
     
    +int CORTEX_A17 = 0x080C00FF
     
    +int ARM9 = 0x09FFFFFF
     
    +int ARM9TDMI_S = 0x090001FF
     
    +int ARM920T = 0x092000FF
     
    +int ARM922T = 0x092200FF
     
    +int ARM926EJ_S = 0x092601FF
     
    +int ARM946E_S = 0x094601FF
     
    +int ARM966E_S = 0x096601FF
     
    +int ARM968E_S = 0x096801FF
     
    +int ARM11 = 0x0BFFFFFF
     
    +int ARM1136 = 0x0B36FFFF
     
    +int ARM1136J = 0x0B3602FF
     
    +int ARM1136J_S = 0x0B3603FF
     
    +int ARM1136JF = 0x0B3606FF
     
    +int ARM1136JF_S = 0x0B3607FF
     
    +int ARM1156 = 0x0B56FFFF
     
    +int ARM1176 = 0x0B76FFFF
     
    +int ARM1176J = 0x0B7602FF
     
    +int ARM1176J_S = 0x0B7603FF
     
    +int ARM1176JF = 0x0B7606FF
     
    +int ARM1176JF_S = 0x0B7607FF
     
    +int CORTEX_R4 = 0x0C0000FF
     
    +int CORTEX_R5 = 0x0C0100FF
     
    +int RX = 0x0DFFFFFF
     
    +int RX610 = 0x0D00FFFF
     
    +int RX62N = 0x0D01FFFF
     
    +int RX62T = 0x0D02FFFF
     
    +int RX63N = 0x0D03FFFF
     
    +int RX630 = 0x0D04FFFF
     
    +int RX63T = 0x0D05FFFF
     
    +int RX621 = 0x0D06FFFF
     
    +int RX62G = 0x0D07FFFF
     
    +int RX631 = 0x0D08FFFF
     
    +int RX210 = 0x0D10FFFF
     
    +int RX21A = 0x0D11FFFF
     
    +int RX220 = 0x0D12FFFF
     
    +int RX230 = 0x0D13FFFF
     
    +int RX231 = 0x0D14FFFF
     
    +int RX23T = 0x0D15FFFF
     
    +int RX111 = 0x0D20FFFF
     
    +int RX110 = 0x0D21FFFF
     
    +int RX113 = 0x0D22FFFF
     
    +int RX64M = 0x0D30FFFF
     
    +int RX71M = 0x0D31FFFF
     
    +int CORTEX_M4 = 0x0E0000FF
     
    +int CORTEX_M7 = 0x0E0100FF
     
    +int CORTEX_M_V8MAINL = 0x0E0200FF
     
    +int CORTEX_A5 = 0x0F0000FF
     
    +int POWER_PC = 0x10FFFFFF
     
    +int POWER_PC_N1 = 0x10FF00FF
     
    +int POWER_PC_N2 = 0x10FF01FF
     
    +int MIPS = 0x11FFFFFF
     
    +int MIPS_M4K = 0x1100FFFF
     
    +int MIPS_MICROAPTIV = 0x1101FFFF
     
    +int EFM8_UNSPEC = 0x12FFFFFF
     
    +int CIP51 = 0x1200FFFF
     
    +

    Detailed Description

    +
    Enumeration for the different CPU core identifiers.
+These are the possible cores for targets the J-Link is connected to.
+Note that these are bitfields.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkDataErrors-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkDataErrors-members.html new file mode 100644 index 00000000..c4673dfd --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkDataErrors-members.html @@ -0,0 +1,111 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    +
    +
    +
    enums.JLinkDataErrors Member List
    +
    +
    + +

    This is the complete list of members for enums.JLinkDataErrors, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    ERROR_INVALID_ACCESS_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_INVALID_ADDR_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_INVALID_DATA_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_NO_MORE_ADDR_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_NO_MORE_DATA_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_NO_MORE_EVENTS (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_UNKNOWN (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkDataErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkDataErrors.html b/site/document_api_iec60730_library/classenums_1_1JLinkDataErrors.html new file mode 100644 index 00000000..708bd2fa --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkDataErrors.html @@ -0,0 +1,218 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkDataErrors Class Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
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    +Public Member Functions | +Static Public Attributes | +List of all members
    +
    +
    enums.JLinkDataErrors Class Reference
    +
    +
    + + + + +

    +Public Member Functions

    def to_string (cls, error_code)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int ERROR_UNKNOWN = 0x80000000
     
    +int ERROR_NO_MORE_EVENTS = 0x80000001
     
    +int ERROR_NO_MORE_ADDR_COMP = 0x80000002
     
    +int ERROR_NO_MORE_DATA_COMP = 0x80000004
     
    +int ERROR_INVALID_ADDR_MASK = 0x80000020
     
    +int ERROR_INVALID_DATA_MASK = 0x80000040
     
    +int ERROR_INVALID_ACCESS_MASK = 0x80000080
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    Enumeration for the error codes generated when setting a data event.

    Member Function Documentation

    + +

    ◆ to_string()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def enums.JLinkDataErrors.to_string ( cls,
     error_code 
    )
    +
    +
    Returns the string message for the given error code.
+Args:
+  cls (JLinkDataErrors): the ``JLinkDataErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
    +

    Reimplemented from enums.JLinkGlobalErrors.

    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily-members.html new file mode 100644 index 00000000..38780fcc --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily-members.html @@ -0,0 +1,104 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    +
    enums.JLinkDeviceFamily Member List
    +
    +
    + +

    This is the complete list of members for enums.JLinkDeviceFamily, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + +
    ANY (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    ARM10 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    ARM11 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    ARM7 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    ARM9 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    AUTO (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    COLDFIRE (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    CORTEX_A5 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    CORTEX_A8 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    CORTEX_A9 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    CORTEX_M0 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    CORTEX_M1 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    CORTEX_M3 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    CORTEX_M4 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    CORTEX_R4 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    EFM8 (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    MIPS (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    POWERPC (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    RX (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    SIMULATOR (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    XSCALE (defined in enums.JLinkDeviceFamily)enums.JLinkDeviceFamilystatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily.html b/site/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily.html new file mode 100644 index 00000000..21c11c17 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkDeviceFamily.html @@ -0,0 +1,156 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkDeviceFamily Class Reference + + + + + + + + + +
    +
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    Document API IEC60730 Library +
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    +
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    enums.JLinkDeviceFamily Class Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int AUTO = 0
     
    +int CORTEX_M1 = 1
     
    +int COLDFIRE = 2
     
    +int CORTEX_M3 = 3
     
    +int SIMULATOR = 4
     
    +int XSCALE = 5
     
    +int CORTEX_M0 = 6
     
    +int ARM7 = 7
     
    +int CORTEX_A8 = 8
     
    +int CORTEX_A9 = 8
     
    +int ARM9 = 9
     
    +int ARM10 = 10
     
    +int ARM11 = 11
     
    +int CORTEX_R4 = 12
     
    +int RX = 13
     
    +int CORTEX_M4 = 14
     
    +int CORTEX_A5 = 15
     
    +int POWERPC = 16
     
    +int MIPS = 17
     
    +int EFM8 = 18
     
    +int ANY = 255
     
    +

    Detailed Description

    +
    Enumeration for the difference device families.
+These are the possible device families for targets that the J-Link is
+connected to.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkEraseErrors-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkEraseErrors-members.html new file mode 100644 index 00000000..ac1f424a --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkEraseErrors-members.html @@ -0,0 +1,105 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    ILLEGAL_COMMAND (defined in enums.JLinkEraseErrors)enums.JLinkEraseErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkEraseErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    + +
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    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkEraseErrors.html b/site/document_api_iec60730_library/classenums_1_1JLinkEraseErrors.html new file mode 100644 index 00000000..5f5397f6 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkEraseErrors.html @@ -0,0 +1,200 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkEraseErrors Class Reference + + + + + + + + + +
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    +Public Member Functions

    def to_string (cls, error_code)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int ILLEGAL_COMMAND = -5
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    Enumeration for the error codes generated during an erase operation.

    Member Function Documentation

    + +

    ◆ to_string()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def enums.JLinkEraseErrors.to_string ( cls,
     error_code 
    )
    +
    +
    Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkEraseErrors): the ``JLinkEraseErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
    +

    Reimplemented from enums.JLinkGlobalErrors.

    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
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    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkEventTypes-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkEventTypes-members.html new file mode 100644 index 00000000..603323e9 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkEventTypes-members.html @@ -0,0 +1,84 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    BREAKPOINT (defined in enums.JLinkEventTypes)enums.JLinkEventTypesstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkEventTypes.html b/site/document_api_iec60730_library/classenums_1_1JLinkEventTypes.html new file mode 100644 index 00000000..85aab74e --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkEventTypes.html @@ -0,0 +1,97 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkEventTypes Class Reference + + + + + + + + + +
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    +
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    +
    +
    + + + + +

    +Static Public Attributes

    +tuple BREAKPOINT = (1 << 0)
     
    +

    Detailed Description

    +
    J-Link data event types.
+Attributes:
+  BREAKPOINT: breakpoint data event.
+
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkFlags-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkFlags-members.html new file mode 100644 index 00000000..98969fab --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkFlags-members.html @@ -0,0 +1,91 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    + + + + + + + + + +
    DLG_BUTTON_CANCEL (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
    DLG_BUTTON_NO (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
    DLG_BUTTON_OK (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
    DLG_BUTTON_YES (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
    GO_OVERSTEP_BP (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
    HW_PIN_STATUS_HIGH (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
    HW_PIN_STATUS_LOW (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
    HW_PIN_STATUS_UNKNOWN (defined in enums.JLinkFlags)enums.JLinkFlagsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkFlags.html b/site/document_api_iec60730_library/classenums_1_1JLinkFlags.html new file mode 100644 index 00000000..ba25cd26 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkFlags.html @@ -0,0 +1,116 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkFlags Class Reference + + + + + + + + + +
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    +
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    +
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    + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +tuple GO_OVERSTEP_BP = (1 << 0)
     
    +tuple DLG_BUTTON_YES = (1 << 0)
     
    +tuple DLG_BUTTON_NO = (1 << 1)
     
    +tuple DLG_BUTTON_OK = (1 << 2)
     
    +tuple DLG_BUTTON_CANCEL = (1 << 3)
     
    +int HW_PIN_STATUS_LOW = 0
     
    +int HW_PIN_STATUS_HIGH = 1
     
    +int HW_PIN_STATUS_UNKNOWN = 255
     
    +

    Detailed Description

    +
    Enumeration for the different flags that are passed to the J-Link C SDK
+API methods.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkFlashErrors-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkFlashErrors-members.html new file mode 100644 index 00000000..8794387c --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkFlashErrors-members.html @@ -0,0 +1,107 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    COMPARE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    PROGRAM_ERASE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkFlashErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VERIFICATION_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    + +
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    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkFlashErrors.html b/site/document_api_iec60730_library/classenums_1_1JLinkFlashErrors.html new file mode 100644 index 00000000..bccf7191 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkFlashErrors.html @@ -0,0 +1,206 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkFlashErrors Class Reference + + + + + + + + + +
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    +
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    +Public Member Functions

    def to_string (cls, error_code)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int COMPARE_ERROR = -2
     
    +int PROGRAM_ERASE_ERROR = -3
     
    +int VERIFICATION_ERROR = -4
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    Enumeration for the error codes generated during a flash operation.

    Member Function Documentation

    + +

    ◆ to_string()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def enums.JLinkFlashErrors.to_string ( cls,
     error_code 
    )
    +
    +
    Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkFlashErrors): the ``JLinkFlashErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
    +

    Reimplemented from enums.JLinkGlobalErrors.

    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkFunctions-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkFunctions-members.html new file mode 100644 index 00000000..20ab7038 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkFunctions-members.html @@ -0,0 +1,86 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    + + + + +
    FLASH_PROGRESS_PROTOTYPE (defined in enums.JLinkFunctions)enums.JLinkFunctionsstatic
    LOG_PROTOTYPE (defined in enums.JLinkFunctions)enums.JLinkFunctionsstatic
    UNSECURE_HOOK_PROTOTYPE (defined in enums.JLinkFunctions)enums.JLinkFunctionsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkFunctions.html b/site/document_api_iec60730_library/classenums_1_1JLinkFunctions.html new file mode 100644 index 00000000..0dfc1e26 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkFunctions.html @@ -0,0 +1,152 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkFunctions Class Reference + + + + + + + + + +
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    +
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    +Static Public Attributes

    + LOG_PROTOTYPE = ctypes.CFUNCTYPE(None, ctypes.c_char_p)
     
     UNSECURE_HOOK_PROTOTYPE
     
     FLASH_PROGRESS_PROTOTYPE
     
    +

    Detailed Description

    +
    Collection of function prototype and type builders for the J-Link SDK
+API calls.

    Member Data Documentation

    + +

    ◆ FLASH_PROGRESS_PROTOTYPE

    + +
    +
    + + + + + +
    + + + + +
    enums.JLinkFunctions.FLASH_PROGRESS_PROTOTYPE
    +     		+static
    +
    +Initial value:
    = ctypes.CFUNCTYPE(None,
    +
    ctypes.c_char_p,
    +
    ctypes.c_char_p,
    +
    ctypes.c_int)
    +
    +
    +
    + +

    ◆ UNSECURE_HOOK_PROTOTYPE

    + +
    +
    + + + + + +
    + + + + +
    enums.JLinkFunctions.UNSECURE_HOOK_PROTOTYPE
    +     		+static
    +
    +Initial value:
    = ctypes.CFUNCTYPE(ctypes.c_int,
    +
    ctypes.c_char_p,
    +
    ctypes.c_char_p,
    +
    ctypes.c_uint32)
    +
    +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors-members.html new file mode 100644 index 00000000..ebf794c3 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors-members.html @@ -0,0 +1,104 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    +
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    This is the complete list of members for enums.JLinkGlobalErrors, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + +
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkGlobalErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors.html b/site/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors.html new file mode 100644 index 00000000..32c073d6 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkGlobalErrors.html @@ -0,0 +1,197 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkGlobalErrors Class Reference + + + + + + + + + +
    +
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    +
    Document API IEC60730 Library +
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    +Public Member Functions | +Static Public Attributes | +List of all members
    +
    +
    enums.JLinkGlobalErrors Class Reference
    +
    +
    + + + + +

    +Public Member Functions

    def to_string (cls, error_code)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    Enumeration for the error codes which any J-Link SDK DLL API-function
+can have as a return value.

    Member Function Documentation

    + +

    ◆ to_string()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def enums.JLinkGlobalErrors.to_string ( cls,
     error_code 
    )
    +
    +
    Returns the string message for the given ``error_code``.
+Args:
+  cls (JlinkGlobalErrors): the ``JLinkGlobalErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
    +

    Reimplemented in enums.JLinkRTTErrors, enums.JLinkDataErrors, enums.JLinkReadErrors, enums.JLinkWriteErrors, enums.JLinkFlashErrors, and enums.JLinkEraseErrors.

    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkHaltReasons-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkHaltReasons-members.html new file mode 100644 index 00000000..d37736cb --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkHaltReasons-members.html @@ -0,0 +1,87 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    +
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    + + + + + +
    CODE_BREAKPOINT (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
    DATA_BREAKPOINT (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
    DBGRQ (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
    VECTOR_CATCH (defined in enums.JLinkHaltReasons)enums.JLinkHaltReasonsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkHaltReasons.html b/site/document_api_iec60730_library/classenums_1_1JLinkHaltReasons.html new file mode 100644 index 00000000..f3edd8ef --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkHaltReasons.html @@ -0,0 +1,109 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkHaltReasons Class Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
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    +Static Public Attributes | +List of all members
    +
    +
    enums.JLinkHaltReasons Class Reference
    +
    +
    + + + + + + + + + + +

    +Static Public Attributes

    +int DBGRQ = 0
     
    +int CODE_BREAKPOINT = 1
     
    +int DATA_BREAKPOINT = 2
     
    +int VECTOR_CATCH = 3
     
    +

    Detailed Description

    +
    Halt reasons for the CPU.
+Attributes:
+  DBGRQ: CPU has been halted because DBGRQ signal asserted.
+  CODE_BREAKPOINT: CPU has been halted because of code breakpoint match.
+  DATA_BREAKPOINT: CPU has been halted because of data breakpoint match.
+  VECTOR_CATCH: CPU has been halted because of vector catch.
+
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkHost-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkHost-members.html new file mode 100644 index 00000000..5748ffe3 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkHost-members.html @@ -0,0 +1,86 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    enums.JLinkHost Member List
    +
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    This is the complete list of members for enums.JLinkHost, including all inherited members.

    + + + + +
    IP (defined in enums.JLinkHost)enums.JLinkHoststatic
    USB (defined in enums.JLinkHost)enums.JLinkHoststatic
    USB_OR_IP (defined in enums.JLinkHost)enums.JLinkHoststatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkHost.html b/site/document_api_iec60730_library/classenums_1_1JLinkHost.html new file mode 100644 index 00000000..8435cc7d --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkHost.html @@ -0,0 +1,100 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkHost Class Reference + + + + + + + + + +
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    +
    +
    + + + + + + + + +

    +Static Public Attributes

    +tuple USB = (1 << 0)
     
    +tuple IP = (1 << 1)
     
    +tuple USB_OR_IP = USB | IP
     
    +

    Detailed Description

    +
    Enumeration for the different JLink hosts: currently only IP and USB.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkInterfaces-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkInterfaces-members.html new file mode 100644 index 00000000..9a68f544 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkInterfaces-members.html @@ -0,0 +1,89 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    enums.JLinkInterfaces Member List
    +
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    This is the complete list of members for enums.JLinkInterfaces, including all inherited members.

    + + + + + + + +
    C2 (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
    FINE (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
    ICSP (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
    JTAG (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
    SPI (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
    SWD (defined in enums.JLinkInterfaces)enums.JLinkInterfacesstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkInterfaces.html b/site/document_api_iec60730_library/classenums_1_1JLinkInterfaces.html new file mode 100644 index 00000000..6aac06cf --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkInterfaces.html @@ -0,0 +1,109 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkInterfaces Class Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
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    +
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    +
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    + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int JTAG = 0
     
    +int SWD = 1
     
    +int FINE = 3
     
    +int ICSP = 4
     
    +int SPI = 5
     
    +int C2 = 6
     
    +

    Detailed Description

    +
    Target interfaces for the J-Link.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkROMTable-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkROMTable-members.html new file mode 100644 index 00000000..80676ad1 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkROMTable-members.html @@ -0,0 +1,99 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    +
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    This is the complete list of members for enums.JLinkROMTable, including all inherited members.

    + + + + + + + + + + + + + + + + + +
    AHBAP (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    APBAP (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    DBG (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    DWT (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    ETB (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    ETM (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    FPB (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    ITM (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    MTB (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    NONE (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    NVIC (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    PTM (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    SECURE (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    TF (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    TMC (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    TPIU (defined in enums.JLinkROMTable)enums.JLinkROMTablestatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkROMTable.html b/site/document_api_iec60730_library/classenums_1_1JLinkROMTable.html new file mode 100644 index 00000000..96ab14e8 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkROMTable.html @@ -0,0 +1,139 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkROMTable Class Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
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    +
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    +
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    enums.JLinkROMTable Class Reference
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int NONE = 0x100
     
    +int ETM = 0x101
     
    +int MTB = 0x102
     
    +int TPIU = 0x103
     
    +int ITM = 0x104
     
    +int DWT = 0x105
     
    +int FPB = 0x106
     
    +int NVIC = 0x107
     
    +int TMC = 0x108
     
    +int TF = 0x109
     
    +int PTM = 0x10A
     
    +int ETB = 0x10B
     
    +int DBG = 0x10C
     
    +int APBAP = 0x10D
     
    +int AHBAP = 0x10E
     
    +int SECURE = 0x10F
     
    +

    Detailed Description

    +
    The J-Link ROM tables.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkRTTCommand-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkRTTCommand-members.html new file mode 100644 index 00000000..bfbfce22 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkRTTCommand-members.html @@ -0,0 +1,88 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    + + + + + + +
    GETDESC (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
    GETNUMBUF (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
    GETSTAT (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
    START (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
    STOP (defined in enums.JLinkRTTCommand)enums.JLinkRTTCommandstatic
    + +
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    +
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    +
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    +Static Public Attributes

    +int START = 0
     
    +int STOP = 1
     
    +int GETDESC = 2
     
    +int GETNUMBUF = 3
     
    +int GETSTAT = 4
     
    +

    Detailed Description

    +
    RTT commands.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkRTTDirection-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkRTTDirection-members.html new file mode 100644 index 00000000..a7b51750 --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkRTTDirection-members.html @@ -0,0 +1,85 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    + + + +
    DOWN (defined in enums.JLinkRTTDirection)enums.JLinkRTTDirectionstatic
    UP (defined in enums.JLinkRTTDirection)enums.JLinkRTTDirectionstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkRTTDirection.html b/site/document_api_iec60730_library/classenums_1_1JLinkRTTDirection.html new file mode 100644 index 00000000..ade766fa --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkRTTDirection.html @@ -0,0 +1,97 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkRTTDirection Class Reference + + + + + + + + + +
    +
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    +
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    +Static Public Attributes

    +int UP = 0
     
    +int DOWN = 1
     
    +

    Detailed Description

    +
    RTT Direction.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
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    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    RTT_ERROR_CONTROL_BLOCK_NOT_FOUND (defined in enums.JLinkRTTErrors)enums.JLinkRTTErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkRTTErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
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    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkRTTErrors.html b/site/document_api_iec60730_library/classenums_1_1JLinkRTTErrors.html new file mode 100644 index 00000000..6196c44f --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkRTTErrors.html @@ -0,0 +1,200 @@ + + + + + + + +Document API IEC60730 Library: enums.JLinkRTTErrors Class Reference + + + + + + + + + +
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    +Public Member Functions

    def to_string (cls, error_code)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int RTT_ERROR_CONTROL_BLOCK_NOT_FOUND = -2
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    Enumeration for error codes from RTT.

    Member Function Documentation

    + +

    ◆ to_string()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def enums.JLinkRTTErrors.to_string ( cls,
     error_code 
    )
    +
    +
    Returns the string message for the given error code.
+Args:
+  cls (JLinkRTTErrors): the ``JLinkRTTErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
    +

    Reimplemented from enums.JLinkGlobalErrors.

    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
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    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkReadErrors-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkReadErrors-members.html new file mode 100644 index 00000000..7be9415e --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkReadErrors-members.html @@ -0,0 +1,105 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkReadErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    ZONE_NOT_FOUND_ERROR (defined in enums.JLinkReadErrors)enums.JLinkReadErrorsstatic
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    +Public Member Functions

    def to_string (cls, error_code)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int ZONE_NOT_FOUND_ERROR = -5
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    Enumeration for the error codes generated during a read.

    Member Function Documentation

    + +

    ◆ to_string()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def enums.JLinkReadErrors.to_string ( cls,
     error_code 
    )
    +
    +
    Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkReadErrors): the ``JLinkReadErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
    +

    Reimplemented from enums.JLinkGlobalErrors.

    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkResetStrategyCortexM3-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkResetStrategyCortexM3-members.html new file mode 100644 index 00000000..4ff0d18c --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkResetStrategyCortexM3-members.html @@ -0,0 +1,94 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    ADI_HALT_AFTER_KERNEL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    CONNECT_UNDER_RESET (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    CORE (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    CORE_AND_PERIPHERALS (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    HALT_AFTER_BTL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    HALT_BEFORE_BTL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    KINETIS (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    LPC1200 (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    NORMAL (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    RESETPIN (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
    S3FN60D (defined in enums.JLinkResetStrategyCortexM3)enums.JLinkResetStrategyCortexM3static
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    +Static Public Attributes

    +int NORMAL = 0
     
    +int CORE = 1
     
    +int RESETPIN = 2
     
    +int CONNECT_UNDER_RESET = 3
     
    +int HALT_AFTER_BTL = 4
     
    +int HALT_BEFORE_BTL = 5
     
    +int KINETIS = 6
     
    +int ADI_HALT_AFTER_KERNEL = 7
     
    +int CORE_AND_PERIPHERALS = 8
     
    +int LPC1200 = 9
     
    +int S3FN60D = 10
     
    +

    Detailed Description

    +
    Target reset strategies for the J-Link.
+Attributes:
+  NORMAL: default reset strategy, does whatever is best to reset.
+  CORE: only the core is reset via the ``VECTRESET`` bit.
+  RESETPIN: pulls the reset pin low to reset the core and peripherals.
+  CONNECT_UNDER_RESET: J-Link connects to target while keeping reset
+    active.  This is recommended for STM32 devices.
+  HALT_AFTER_BTL: halt the core after the bootloader is executed.
+  HALT_BEFORE_BTL: halt the core before the bootloader is executed.
+  KINETIS: performs a normal reset, but also disables the watchdog.
+  ADI_HALT_AFTER_KERNEL: sets the ``SYSRESETREQ`` bit in the ``AIRCR`` in
+    order to reset the device.
+  CORE_AND_PERIPHERALS: sets the ``SYSRESETREQ`` bit in the ``AIRCR``, and
+    the ``VC_CORERESET`` bit in the ``DEMCR`` to make sure that the CPU is
+    halted immediately after reset.
+  LPC1200: reset for LPC1200 devices.
+  S3FN60D: reset for Samsung S3FN60D devices.
+Note:
+  Please see the J-Link SEGGER Documentation, UM8001, for full information
+  about the different reset strategies.
+
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classenums_1_1JLinkSWOCommands-members.html b/site/document_api_iec60730_library/classenums_1_1JLinkSWOCommands-members.html new file mode 100644 index 00000000..189004dd --- /dev/null +++ b/site/document_api_iec60730_library/classenums_1_1JLinkSWOCommands-members.html @@ -0,0 +1,90 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    FLUSH (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
    GET_NUM_BYTES (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
    GET_SPEED_INFO (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
    SET_BUFFERSIZE_EMU (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
    SET_BUFFERSIZE_HOST (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
    START (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
    STOP (defined in enums.JLinkSWOCommands)enums.JLinkSWOCommandsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
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    +Static Public Attributes

    +int START = 0
     
    +int STOP = 1
     
    +int FLUSH = 2
     
    +int GET_SPEED_INFO = 3
     
    +int GET_NUM_BYTES = 10
     
    +int SET_BUFFERSIZE_HOST = 20
     
    +int SET_BUFFERSIZE_EMU = 21
     
    +

    Detailed Description

    +
    Serial Wire Output (SWO) commands.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
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    MANCHESTER (defined in enums.JLinkSWOInterfaces)enums.JLinkSWOInterfacesstatic
    UART (defined in enums.JLinkSWOInterfaces)enums.JLinkSWOInterfacesstatic
    + +
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    +Static Public Attributes

    +int UART = 0
     
    +int MANCHESTER = 1
     
    +

    Detailed Description

    +
    Serial Wire Output (SWO) interfaces.
    The documentation for this class was generated from the following file:
      +
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      • +
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    SET_BUFFER_SIZE (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
    TRACE_EVENT_CLR (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
    TRACE_EVENT_CLR_ALL (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
    TRACE_EVENT_SET (defined in enums.JLinkStraceCommand)enums.JLinkStraceCommandstatic
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    +Static Public Attributes

    +int TRACE_EVENT_SET = 0
     
    +int TRACE_EVENT_CLR = 1
     
    +int TRACE_EVENT_CLR_ALL = 2
     
    +int SET_BUFFER_SIZE = 3
     
    +

    Detailed Description

    +
    STRACE commands.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
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    CODE_FETCH (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
    DATA_ACCESS (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
    DATA_LOAD (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
    DATA_STORE (defined in enums.JLinkStraceEvent)enums.JLinkStraceEventstatic
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    +Static Public Attributes

    +int CODE_FETCH = 0
     
    +int DATA_ACCESS = 1
     
    +int DATA_LOAD = 2
     
    +int DATA_STORE = 3
     
    +

    Detailed Description

    +
    STRACE events.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
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    TRACE_EXCLUDE_RANGE (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
    TRACE_INCLUDE_RANGE (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
    TRACE_START (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
    TRACE_STOP (defined in enums.JLinkStraceOperation)enums.JLinkStraceOperationstatic
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    +Static Public Attributes

    +int TRACE_START = 0
     
    +int TRACE_STOP = 1
     
    +int TRACE_INCLUDE_RANGE = 2
     
    +int TRACE_EXCLUDE_RANGE = 3
     
    +

    Detailed Description

    +
    STRACE operation specifiers.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
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    FLUSH (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    GET_CONF_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    GET_FORMAT (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    GET_MAX_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    GET_MIN_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    GET_NUM_REGIONS (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    GET_NUM_SAMPLES (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    GET_REGION_PROPS (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    GET_REGION_PROPS_EX (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    SET_CAPACITY (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    SET_FORMAT (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    START (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
    STOP (defined in enums.JLinkTraceCommand)enums.JLinkTraceCommandstatic
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    +Static Public Attributes

    +int START = 0x0
     
    +int STOP = 0x1
     
    +int FLUSH = 0x2
     
    +int GET_NUM_SAMPLES = 0x10
     
    +int GET_CONF_CAPACITY = 0x11
     
    +int SET_CAPACITY = 0x12
     
    +int GET_MIN_CAPACITY = 0x13
     
    +int GET_MAX_CAPACITY = 0x14
     
    +int SET_FORMAT = 0x20
     
    +int GET_FORMAT = 0x21
     
    +int GET_NUM_REGIONS = 0x30
     
    +int GET_REGION_PROPS = 0x31
     
    +int GET_REGION_PROPS_EX = 0x32
     
    +

    Detailed Description

    +
    J-Link trace commands.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
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    +Generated by   +doxygen + 1.8.17 +
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    FORMAT_16BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
    FORMAT_1BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
    FORMAT_2BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
    FORMAT_4BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
    FORMAT_8BIT (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
    FORMAT_DEMULTIPLEXED (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
    FORMAT_DOUBLE_EDGE (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
    FORMAT_ETM10 (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
    FORMAT_ETM7_9 (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
    FORMAT_MULTIPLEXED (defined in enums.JLinkTraceFormat)enums.JLinkTraceFormatstatic
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    +Static Public Attributes

    +int FORMAT_4BIT = 0x1
     
    +int FORMAT_8BIT = 0x2
     
    +int FORMAT_16BIT = 0x4
     
    +int FORMAT_MULTIPLEXED = 0x8
     
    +int FORMAT_DEMULTIPLEXED = 0x10
     
    +int FORMAT_DOUBLE_EDGE = 0x20
     
    +int FORMAT_ETM7_9 = 0x40
     
    +int FORMAT_ETM10 = 0x80
     
    +int FORMAT_1BIT = 0x100
     
    +int FORMAT_2BIT = 0x200
     
    +

    Detailed Description

    +
    J-Link trace formats.
+Attributes:
+  FORMAT_4BIT: 4-bit data.
+  FORMAT_8BIT: 8-bit data.
+  FORMAT_16BIT: 16-bit data.
+  FORMAT_MULTIPLEXED: multiplexing on ETM / buffer link.
+  FORMAT_DEMULTIPLEXED: de-multiplexing on ETM / buffer link.
+  FORMAT_DOUBLE_EDGE: clock data on both ETM / buffer link edges.
+  FORMAT_ETM7_9: ETM7/ETM9 protocol.
+  FORMAT_ETM10: ETM10 protocol.
+  FORMAT_1BIT: 1-bit data.
+  FORMAT_2BIT: 2-bit data.
+
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
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    ETB (defined in enums.JLinkTraceSource)enums.JLinkTraceSourcestatic
    ETM (defined in enums.JLinkTraceSource)enums.JLinkTraceSourcestatic
    MTB (defined in enums.JLinkTraceSource)enums.JLinkTraceSourcestatic
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    +Static Public Attributes

    +int ETB = 0
     
    +int ETM = 1
     
    +int MTB = 2
     
    +

    Detailed Description

    +
    Sources for tracing.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
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    BUS_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
    CHECK_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
    COPROCESSOR_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
    CORE_RESET (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
    HARD_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
    INT_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
    MEM_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
    STATE_ERROR (defined in enums.JLinkVectorCatchCortexM3)enums.JLinkVectorCatchCortexM3static
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    +Static Public Attributes

    +tuple CORE_RESET = (1 << 0)
     
    +tuple MEM_ERROR = (1 << 4)
     
    +tuple COPROCESSOR_ERROR = (1 << 5)
     
    +tuple CHECK_ERROR = (1 << 6)
     
    +tuple STATE_ERROR = (1 << 7)
     
    +tuple BUS_ERROR = (1 << 8)
     
    +tuple INT_ERROR = (1 << 9)
     
    +tuple HARD_ERROR = (1 << 10)
     
    +

    Detailed Description

    +
    Vector catch types for the ARM Cortex M3.
+Attributes:
+  CORE_RESET: The CPU core reset.
+  MEM_ERROR: A memory management error occurred.
+  COPROCESSOR_ERROR: Usage fault error accessing the Coprocessor.
+  CHECK_ERROR: Usage fault error on enabled check.
+  STATE_ERROR: Usage fault state error.
+  BUS_ERROR: Normal bus error.
+  INT_ERROR: Interrupt or exception service error.
+  HARD_ERROR: Hard fault error.
+
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
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    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkWriteErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    ZONE_NOT_FOUND_ERROR (defined in enums.JLinkWriteErrors)enums.JLinkWriteErrorsstatic
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    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +Public Member Functions | +Static Public Attributes | +List of all members
    +
    +
    enums.JLinkWriteErrors Class Reference
    +
    +
    + + + + +

    +Public Member Functions

    def to_string (cls, error_code)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Static Public Attributes

    +int ZONE_NOT_FOUND_ERROR = -5
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    Enumeration for the error codes generated during a write.

    Member Function Documentation

    + +

    ◆ to_string()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def enums.JLinkWriteErrors.to_string ( cls,
     error_code 
    )
    +
    +
    Returns the string message for the given ``error_code``.
+Args:
+  cls (JLinkWriteErrors): the ``JLinkWriteErrors`` class
+  error_code (int): error code to convert
+Returns:
+  An error string corresponding to the error code.
+Raises:
+  ValueError: if the error code is invalid.
+
    +

    Reimplemented from enums.JLinkGlobalErrors.

    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/enums.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkDataException-members.html b/site/document_api_iec60730_library/classerrors_1_1JLinkDataException-members.html new file mode 100644 index 00000000..7a34f9b1 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkDataException-members.html @@ -0,0 +1,134 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    Document API IEC60730 Library +
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    +
    errors.JLinkDataException Member List
    +
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    + +

    This is the complete list of members for errors.JLinkDataException, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    __init__(self, code)errors.JLinkException
    code (defined in errors.JLinkException)errors.JLinkException
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    ERROR_INVALID_ACCESS_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_INVALID_ADDR_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_INVALID_DATA_MASK (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_NO_MORE_ADDR_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_NO_MORE_DATA_COMP (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_NO_MORE_EVENTS (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    ERROR_UNKNOWN (defined in enums.JLinkDataErrors)enums.JLinkDataErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    message (defined in errors.JLinkException)errors.JLinkException
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkDataErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkDataException.html b/site/document_api_iec60730_library/classerrors_1_1JLinkDataException.html new file mode 100644 index 00000000..f07e63f2 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkDataException.html @@ -0,0 +1,186 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkDataException Class Reference + + + + + + + + + +
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    +Additional Inherited Members

    - Public Member Functions inherited from enums.JLinkDataErrors
    def to_string (cls, error_code)
     
    - Public Member Functions inherited from errors.JLinkException
    def __init__ (self, code)
     
    - Public Attributes inherited from errors.JLinkException
    + code
     
    + message
     
    - Static Public Attributes inherited from enums.JLinkDataErrors
    +int ERROR_UNKNOWN = 0x80000000
     
    +int ERROR_NO_MORE_EVENTS = 0x80000001
     
    +int ERROR_NO_MORE_ADDR_COMP = 0x80000002
     
    +int ERROR_NO_MORE_DATA_COMP = 0x80000004
     
    +int ERROR_INVALID_ADDR_MASK = 0x80000020
     
    +int ERROR_INVALID_DATA_MASK = 0x80000040
     
    +int ERROR_INVALID_ACCESS_MASK = 0x80000080
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    J-Link data event exception.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/errors.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkEraseException-members.html b/site/document_api_iec60730_library/classerrors_1_1JLinkEraseException-members.html new file mode 100644 index 00000000..7afed6a6 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkEraseException-members.html @@ -0,0 +1,128 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    errors.JLinkEraseException Member List
    +
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    + +

    This is the complete list of members for errors.JLinkEraseException, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    __init__(self, code)errors.JLinkException
    code (defined in errors.JLinkException)errors.JLinkException
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    ILLEGAL_COMMAND (defined in enums.JLinkEraseErrors)enums.JLinkEraseErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    message (defined in errors.JLinkException)errors.JLinkException
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkEraseErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkEraseException.html b/site/document_api_iec60730_library/classerrors_1_1JLinkEraseException.html new file mode 100644 index 00000000..9d5469df --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkEraseException.html @@ -0,0 +1,168 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkEraseException Class Reference + + + + + + + + + +
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    +Additional Inherited Members

    - Public Member Functions inherited from enums.JLinkEraseErrors
    def to_string (cls, error_code)
     
    - Public Member Functions inherited from errors.JLinkException
    def __init__ (self, code)
     
    - Public Attributes inherited from errors.JLinkException
    + code
     
    + message
     
    - Static Public Attributes inherited from enums.JLinkEraseErrors
    +int ILLEGAL_COMMAND = -5
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    J-Link erase exception.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/errors.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkException-members.html b/site/document_api_iec60730_library/classerrors_1_1JLinkException-members.html new file mode 100644 index 00000000..c1c6b430 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkException-members.html @@ -0,0 +1,107 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    errors.JLinkException Member List
    +
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    + +

    This is the complete list of members for errors.JLinkException, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + + + + +
    __init__(self, code)errors.JLinkException
    code (defined in errors.JLinkException)errors.JLinkException
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    message (defined in errors.JLinkException)errors.JLinkException
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkGlobalErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkException.html b/site/document_api_iec60730_library/classerrors_1_1JLinkException.html new file mode 100644 index 00000000..3887c167 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkException.html @@ -0,0 +1,208 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkException Class Reference + + + + + + + + + +
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    +
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    +Public Member Functions

    def __init__ (self, code)
     
    - Public Member Functions inherited from enums.JLinkGlobalErrors
    def to_string (cls, error_code)
     
    + + + + + +

    +Public Attributes

    + code
     
    + message
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Additional Inherited Members

    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    Generic J-Link exception.

    Constructor & Destructor Documentation

    + +

    ◆ __init__()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def errors.JLinkException.__init__ ( self,
     code 
    )
    +
    +
    Generates an exception by coercing the given ``code`` to an error
+string if is a number, otherwise assumes it is the message.
+
+Args:
+  self (JLinkException): the 'JLinkException' instance
+  code (object): message or error code
+
+Returns:
+  ``None``
+
    +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/errors.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkFlashException-members.html b/site/document_api_iec60730_library/classerrors_1_1JLinkFlashException-members.html new file mode 100644 index 00000000..60bada81 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkFlashException-members.html @@ -0,0 +1,130 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
    +
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    Document API IEC60730 Library +
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    + + +
    +
    +
    +
    errors.JLinkFlashException Member List
    +
    +
    + +

    This is the complete list of members for errors.JLinkFlashException, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    __init__(self, code)errors.JLinkException
    code (defined in errors.JLinkException)errors.JLinkException
    COMPARE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    message (defined in errors.JLinkException)errors.JLinkException
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    PROGRAM_ERASE_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkFlashErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VERIFICATION_ERROR (defined in enums.JLinkFlashErrors)enums.JLinkFlashErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkFlashException.html b/site/document_api_iec60730_library/classerrors_1_1JLinkFlashException.html new file mode 100644 index 00000000..6420eb08 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkFlashException.html @@ -0,0 +1,174 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkFlashException Class Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
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    +
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    +Additional Inherited Members

    - Public Member Functions inherited from enums.JLinkFlashErrors
    def to_string (cls, error_code)
     
    - Public Member Functions inherited from errors.JLinkException
    def __init__ (self, code)
     
    - Public Attributes inherited from errors.JLinkException
    + code
     
    + message
     
    - Static Public Attributes inherited from enums.JLinkFlashErrors
    +int COMPARE_ERROR = -2
     
    +int PROGRAM_ERASE_ERROR = -3
     
    +int VERIFICATION_ERROR = -4
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    J-Link flash exception.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/errors.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkRTTException-members.html b/site/document_api_iec60730_library/classerrors_1_1JLinkRTTException-members.html new file mode 100644 index 00000000..1c71d36f --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkRTTException-members.html @@ -0,0 +1,128 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    errors.JLinkRTTException Member List
    +
    +
    + +

    This is the complete list of members for errors.JLinkRTTException, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    __init__(self, code)errors.JLinkException
    code (defined in errors.JLinkException)errors.JLinkException
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    message (defined in errors.JLinkException)errors.JLinkException
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    RTT_ERROR_CONTROL_BLOCK_NOT_FOUND (defined in enums.JLinkRTTErrors)enums.JLinkRTTErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkRTTErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkRTTException.html b/site/document_api_iec60730_library/classerrors_1_1JLinkRTTException.html new file mode 100644 index 00000000..0c0508f9 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkRTTException.html @@ -0,0 +1,168 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkRTTException Class Reference + + + + + + + + + +
    +
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    +
    Document API IEC60730 Library +
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    +Additional Inherited Members

    - Public Member Functions inherited from enums.JLinkRTTErrors
    def to_string (cls, error_code)
     
    - Public Member Functions inherited from errors.JLinkException
    def __init__ (self, code)
     
    - Public Attributes inherited from errors.JLinkException
    + code
     
    + message
     
    - Static Public Attributes inherited from enums.JLinkRTTErrors
    +int RTT_ERROR_CONTROL_BLOCK_NOT_FOUND = -2
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    J-Link RTT exception.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/errors.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkReadException-members.html b/site/document_api_iec60730_library/classerrors_1_1JLinkReadException-members.html new file mode 100644 index 00000000..b5c2ee14 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkReadException-members.html @@ -0,0 +1,128 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    __init__(self, code)errors.JLinkException
    code (defined in errors.JLinkException)errors.JLinkException
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    message (defined in errors.JLinkException)errors.JLinkException
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkReadErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    ZONE_NOT_FOUND_ERROR (defined in enums.JLinkReadErrors)enums.JLinkReadErrorsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classerrors_1_1JLinkReadException.html b/site/document_api_iec60730_library/classerrors_1_1JLinkReadException.html new file mode 100644 index 00000000..e1d9e4b1 --- /dev/null +++ b/site/document_api_iec60730_library/classerrors_1_1JLinkReadException.html @@ -0,0 +1,168 @@ + + + + + + + +Document API IEC60730 Library: errors.JLinkReadException Class Reference + + + + + + + + + +
    +
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    +Additional Inherited Members

    - Public Member Functions inherited from enums.JLinkReadErrors
    def to_string (cls, error_code)
     
    - Public Member Functions inherited from errors.JLinkException
    def __init__ (self, code)
     
    - Public Attributes inherited from errors.JLinkException
    + code
     
    + message
     
    - Static Public Attributes inherited from enums.JLinkReadErrors
    +int ZONE_NOT_FOUND_ERROR = -5
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

    +
    J-Link read exception.
    The documentation for this class was generated from the following file:
      +
    • test/test_script/errors.py
      • +
    +
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    __init__(self, code)errors.JLinkException
    code (defined in errors.JLinkException)errors.JLinkException
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    CPU_IN_LOW_POWER_MODE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DEVICE_FEATURE_NOT_SUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    DLL_NOT_OPEN (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_COMM_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_FEATURE_UNSUPPORTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_CONNECTION (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    EMU_NO_MEMORY (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_COMPARE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_PROGRAM_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    FLASH_PROG_VERIFY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    INVALID_HANDLE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    message (defined in errors.JLinkException)errors.JLinkException
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_CPU_FOUND (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    NO_TARGET_DEVICE_SELECTED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    OPEN_FILE_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    TIF_STATUS_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    to_string(cls, error_code)enums.JLinkWriteErrors
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNKNOWN_FILE_FORMAT (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    UNSPECIFIED_ERROR (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    VCC_FAILURE (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRITE_TARGET_MEMORY_FAILED (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    WRONG_USER_CONFIG (defined in enums.JLinkGlobalErrors)enums.JLinkGlobalErrorsstatic
    ZONE_NOT_FOUND_ERROR (defined in enums.JLinkWriteErrors)enums.JLinkWriteErrorsstatic
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    - Public Member Functions inherited from enums.JLinkWriteErrors
    def to_string (cls, error_code)
     
    - Public Member Functions inherited from errors.JLinkException
    def __init__ (self, code)
     
    - Public Attributes inherited from errors.JLinkException
    + code
     
    + message
     
    - Static Public Attributes inherited from enums.JLinkWriteErrors
    +int ZONE_NOT_FOUND_ERROR = -5
     
    - Static Public Attributes inherited from enums.JLinkGlobalErrors
    +int UNSPECIFIED_ERROR = -1
     
    +int EMU_NO_CONNECTION = -256
     
    +int EMU_COMM_ERROR = -257
     
    +int DLL_NOT_OPEN = -258
     
    +int VCC_FAILURE = -259
     
    +int INVALID_HANDLE = -260
     
    +int NO_CPU_FOUND = -261
     
    +int EMU_FEATURE_UNSUPPORTED = -262
     
    +int EMU_NO_MEMORY = -263
     
    +int TIF_STATUS_ERROR = -264
     
    +int FLASH_PROG_COMPARE_FAILED = -265
     
    +int FLASH_PROG_PROGRAM_FAILED = -266
     
    +int FLASH_PROG_VERIFY_FAILED = -267
     
    +int OPEN_FILE_FAILED = -268
     
    +int UNKNOWN_FILE_FORMAT = -269
     
    +int WRITE_TARGET_MEMORY_FAILED = -270
     
    +int DEVICE_FEATURE_NOT_SUPPORTED = -271
     
    +int WRONG_USER_CONFIG = -272
     
    +int NO_TARGET_DEVICE_SELECTED = -273
     
    +int CPU_IN_LOW_POWER_MODE = -274
     
    +

    Detailed Description

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    J-Link write exception.
    The documentation for this class was generated from the following file:
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    iec60730_watchdog (integration_test_iec60730_watchdog)   JLinkEraseErrors (enums)   JLinkROMTable (enums)   
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    JLinkException (errors)   JLinkRTTErrors (enums)   
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    +    		TelnetDeviceUtil (util)   
    JLinkAccessFlags (enums)   JLinkFlags (enums)   JLinkRTTException (errors)   TelnetHostUtil (util)   
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    adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
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    +def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
     
    +def init_connect_group (self)
     
    +def connect_mcu (self, chip_name)
     
    +def re_connect_mcu (self)
     
    +def adapter_close (self)
     
    +def flash_mcu (self)
     
    +def erase_mcu (self)
     
    +def scan_adapter (self, serial_number, chip_name)
     
    +def pre_exec_test (self)
     
    +def post_exec_test (self)
     
    +def get_variable_address (self, relative_path, var_name)
     
    +def get_label (self, address)
     
    +def set_chip_name (self, chip_name)
     
    + + + + + +

    +Public Attributes

    + logger
     
    + adapter
     
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    init_logger() (defined in iec60730_test_base.iec60730_logger)iec60730_test_base.iec60730_loggerstatic
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    +def remove_handler ()
     
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    +def init_logger ()
     
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    adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    core_register_common_test(self, bkp_label_inject, bkp_testcase_pass, bkp_fail, reg_test, reg_mask, reg_new_value=[0])integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    setUp(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_01_core_register_apsr(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_02_msp_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_03_msp_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_04_psp_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_05_psp_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_06_msplim_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_07_msplim_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_08_psplim_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_09_psplim_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_10_control_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_11_control_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_12_primask_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_13_primask_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_14_basepri_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_15_basepri_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_16_faultmask_ns_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_17_faultmask_s_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_18_fpr_fpscr_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    test_19_fpu_sx_register(self)integration_test_iec60730_cpu_registers.iec60730_cpu_regs
    TEST_SUITE_NAMEintegration_test_iec60730_cpu_registers.iec60730_cpu_regsstatic
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classintegration__test__iec60730__cpu__registers_1_1iec60730__cpu__regs.html b/site/document_api_iec60730_library/classintegration__test__iec60730__cpu__registers_1_1iec60730__cpu__regs.html new file mode 100644 index 00000000..6bab9055 --- /dev/null +++ b/site/document_api_iec60730_library/classintegration__test__iec60730__cpu__registers_1_1iec60730__cpu__regs.html @@ -0,0 +1,699 @@ + + + + + + + +Document API IEC60730 Library: integration_test_iec60730_cpu_registers.iec60730_cpu_regs Class Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +Public Member Functions | +Static Public Attributes | +List of all members
    +
    +
    integration_test_iec60730_cpu_registers.iec60730_cpu_regs Class Reference
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » CPU Register Check Automated Verification Tests
    +
    +
    + +

    IEC60730 CPU Register Check Tests. + More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Member Functions

    +def setUp (self)
     Set up connect device.
     
    +def core_register_common_test (self, bkp_label_inject, bkp_testcase_pass, bkp_fail, reg_test, reg_mask, reg_new_value=[0])
     Supports setting breakpoints and changing test register values.
     
    def test_01_core_register_apsr (self)
     Verify the error detected correctly on the Core Registers APSR, R0-R2, LR. More...
     
    def test_02_msp_ns_register (self)
     Verify the error detected correctly on the Core Registers MSP_NS. More...
     
    def test_03_msp_s_register (self)
     Verify the error detected correctly on the Register MSP_S. More...
     
    def test_04_psp_ns_register (self)
     Verify the error detected correctly on the Register PSP_NS. More...
     
    def test_05_psp_s_register (self)
     Verify the error detected correctly on the Register PSP_S. More...
     
    def test_06_msplim_ns_register (self)
     Verify the error detected correctly on the Register MSPLIM_NS. More...
     
    def test_07_msplim_s_register (self)
     Verify the error detected correctly on the Register MSPLIM_S. More...
     
    def test_08_psplim_ns_register (self)
     Verify the error detected correctly on the Register PSPLIM_NS. More...
     
    def test_09_psplim_s_register (self)
     Verify the error detected correctly on the Register PSPLIM_S. More...
     
    def test_10_control_ns_register (self)
     Verify the error detected correctly on the Register CONTROL_NS. More...
     
    def test_11_control_s_register (self)
     Verify the error detected correctly on the Register CONTROL_S. More...
     
    def test_12_primask_ns_register (self)
     Verify the error detected correctly on the Register PRIMASK_NS. More...
     
    def test_13_primask_s_register (self)
     Verify the error detected correctly on the Register PRIMASK_S. More...
     
    def test_14_basepri_ns_register (self)
     Verify the error detected correctly on the Register BASEPRI_NS. More...
     
    def test_15_basepri_s_register (self)
     Verify the error detected correctly on the Register BASEPRI_S. More...
     
    def test_16_faultmask_ns_register (self)
     Verify the error detected correctly on the Register FAULTMASK_NS. More...
     
    def test_17_faultmask_s_register (self)
     Verify the error detected correctly on the Register FAULTMASK_S. More...
     
    def test_18_fpr_fpscr_register (self)
     Verify the error detected correctly on the Register FPSCR. More...
     
    def test_19_fpu_sx_register (self)
     Verify the error detected correctly on the FPU Registers S0 - S31. More...
     
    - Public Member Functions inherited from iec60730_test_base.iec60730TestBase
    +def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
     
    +def init_connect_group (self)
     
    +def connect_mcu (self, chip_name)
     
    +def re_connect_mcu (self)
     
    +def adapter_close (self)
     
    +def flash_mcu (self)
     
    +def erase_mcu (self)
     
    +def scan_adapter (self, serial_number, chip_name)
     
    +def pre_exec_test (self)
     
    +def post_exec_test (self)
     
    +def get_variable_address (self, relative_path, var_name)
     
    +def get_label (self, address)
     
    +def set_chip_name (self, chip_name)
     
    + + + + +

    +Static Public Attributes

    +string TEST_SUITE_NAME = "CPU_REGS"
     Text name of the test suite, used in XML output.
     
    + + + + + + +

    +Additional Inherited Members

    - Public Attributes inherited from iec60730_test_base.iec60730TestBase
    + logger
     
    + adapter
     
    +

    Detailed Description

    +

    IEC60730 CPU Register Check Tests.

    +

    This class runs IEC60730 CPU Register tests.

    +

    Hardware setup: Connect DUT to PC. No additional hardware setup required.

    +

    Member Function Documentation

    + +

    ◆ test_01_core_register_apsr()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_01_core_register_apsr ( self)
    +
    + +

    Verify the error detected correctly on the Core Registers APSR, R0-R2, LR.

    +

    Order of execution:

      +
    • Verify error detecting on APSR
      • +
    • Verify error detecting on R0-R2
      • +
    • Verify error detecting on R2-R13
      • +
    • Verify error detecting on LR
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_02_msp_ns_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_02_msp_ns_register ( self)
    +
    + +

    Verify the error detected correctly on the Core Registers MSP_NS.

    +

    Order of execution:

      +
    • Verify error detecting on MSP_NS
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_03_msp_s_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_03_msp_s_register ( self)
    +
    + +

    Verify the error detected correctly on the Register MSP_S.

    +

    Order of execution:

      +
    • Verify error detecting on MSP_S
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_04_psp_ns_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_04_psp_ns_register ( self)
    +
    + +

    Verify the error detected correctly on the Register PSP_NS.

    +

    Order of execution:

      +
    • Verify error detecting on PSP_NS
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_05_psp_s_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_05_psp_s_register ( self)
    +
    + +

    Verify the error detected correctly on the Register PSP_S.

    +

    Order of execution:

      +
    • Verify error detecting on PSP_S
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_06_msplim_ns_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_06_msplim_ns_register ( self)
    +
    + +

    Verify the error detected correctly on the Register MSPLIM_NS.

    +

    Order of execution:

      +
    • Verify error detecting on MSPLIM_NS
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_07_msplim_s_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_07_msplim_s_register ( self)
    +
    + +

    Verify the error detected correctly on the Register MSPLIM_S.

    +

    Order of execution:

      +
    • Verify error detecting on MSPLIM_S
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_08_psplim_ns_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_08_psplim_ns_register ( self)
    +
    + +

    Verify the error detected correctly on the Register PSPLIM_NS.

    +

    Order of execution:

      +
    • Verify error detecting on PSPLIM_NS
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_09_psplim_s_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_09_psplim_s_register ( self)
    +
    + +

    Verify the error detected correctly on the Register PSPLIM_S.

    +

    Order of execution:

      +
    • Verify error detecting on PSPLIM_S
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_10_control_ns_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_10_control_ns_register ( self)
    +
    + +

    Verify the error detected correctly on the Register CONTROL_NS.

    +

    Order of execution:

      +
    • Verify error detecting on CONTROL_NS
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_11_control_s_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_11_control_s_register ( self)
    +
    + +

    Verify the error detected correctly on the Register CONTROL_S.

    +

    Order of execution:

      +
    • Verify error detecting on CONTROL_S
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_12_primask_ns_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_12_primask_ns_register ( self)
    +
    + +

    Verify the error detected correctly on the Register PRIMASK_NS.

    +

    Order of execution:

      +
    • Verify error detecting on PRIMASK_NS
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_13_primask_s_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_13_primask_s_register ( self)
    +
    + +

    Verify the error detected correctly on the Register PRIMASK_S.

    +

    Order of execution:

      +
    • Verify error detecting on PRIMASK_S
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_14_basepri_ns_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_14_basepri_ns_register ( self)
    +
    + +

    Verify the error detected correctly on the Register BASEPRI_NS.

    +

    Order of execution:

      +
    • Verify error detecting on BASEPRI_NS
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_15_basepri_s_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_15_basepri_s_register ( self)
    +
    + +

    Verify the error detected correctly on the Register BASEPRI_S.

    +

    Order of execution:

      +
    • Verify error detecting on BASEPRI_S
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_16_faultmask_ns_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_16_faultmask_ns_register ( self)
    +
    + +

    Verify the error detected correctly on the Register FAULTMASK_NS.

    +

    Order of execution:

      +
    • Verify error detecting on FAULTMASK_NS
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_17_faultmask_s_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_17_faultmask_s_register ( self)
    +
    + +

    Verify the error detected correctly on the Register FAULTMASK_S.

    +

    Order of execution:

      +
    • Verify error detecting on FAULTMASK_S
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_18_fpr_fpscr_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_18_fpr_fpscr_register ( self)
    +
    + +

    Verify the error detected correctly on the Register FPSCR.

    +

    Order of execution:

      +
    • Verify error detecting on FPSCR
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_19_fpu_sx_register()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_cpu_registers.iec60730_cpu_regs.test_19_fpu_sx_register ( self)
    +
    + +

    Verify the error detected correctly on the FPU Registers S0 - S31.

    +

    Order of execution:

      +
    • Verify error detecting on S0 - S31
      • +
    • Test passes, return True
      • +
    +
    Returns
    True
    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/integration_test_iec60730_cpu_registers.py
      • +
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    +Generated by   +doxygen + 1.8.17 +
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    adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    reach_to_breakpoint(self, label, setbkp, time)integration_test_iec60730_invariable_memory.iec60730_imc
    scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    set_breakpoint(self, label)integration_test_iec60730_invariable_memory.iec60730_imc
    set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    setUp(self)integration_test_iec60730_invariable_memory.iec60730_imc
    test_cal_crc_block_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
    test_cal_crc_full_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
    test_corrupt_crc_cal_crc_block_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
    test_corrupt_crc_full_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
    test_corrupt_integrity_iec60730_run_crc_block_memory(self)integration_test_iec60730_invariable_memory.iec60730_imc
    TEST_SUITE_NAMEintegration_test_iec60730_invariable_memory.iec60730_imcstatic
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    +Public Member Functions | +Static Public Attributes | +List of all members
    +
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    integration_test_iec60730_invariable_memory.iec60730_imc Class Reference
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » Invariable Memory Automated Verification Tests
    +
    +
    + +

    IEC60730 Invariable Memory Plausibility Verification Tests. + More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Member Functions

    +def setUp (self)
     Set up connect device.
     
    +def set_breakpoint (self, label)
     Set breakpoint.
     
    +def reach_to_breakpoint (self, label, setbkp, time)
     Run to breakpoint.
     
    def test_cal_crc_full_memory (self)
     Verify the DUT calculation of CRC value at POST. More...
     
    def test_corrupt_crc_full_memory (self)
     Verify the DUT jump to sl_iec60730_safe_state when flash faied at POST. More...
     
    def test_cal_crc_block_memory (self)
     Verify the DUT calculation of CRC value at BIST. More...
     
    def test_corrupt_crc_cal_crc_block_memory (self)
     Verify the DUT jump to sl_iec60730_safe_state when flash faied at BIST. More...
     
    def test_corrupt_integrity_iec60730_run_crc_block_memory (self)
     Verify integrity of iec60730_run_crc variable. More...
     
    - Public Member Functions inherited from iec60730_test_base.iec60730TestBase
    +def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
     
    +def init_connect_group (self)
     
    +def connect_mcu (self, chip_name)
     
    +def re_connect_mcu (self)
     
    +def adapter_close (self)
     
    +def flash_mcu (self)
     
    +def erase_mcu (self)
     
    +def scan_adapter (self, serial_number, chip_name)
     
    +def pre_exec_test (self)
     
    +def post_exec_test (self)
     
    +def get_variable_address (self, relative_path, var_name)
     
    +def get_label (self, address)
     
    +def set_chip_name (self, chip_name)
     
    + + + + +

    +Static Public Attributes

    +string TEST_SUITE_NAME = "IMC"
     Text name of the test suite, used in XML output.
     
    + + + + + + +

    +Additional Inherited Members

    - Public Attributes inherited from iec60730_test_base.iec60730TestBase
    + logger
     
    + adapter
     
    +

    Detailed Description

    +

    IEC60730 Invariable Memory Plausibility Verification Tests.

    +

    This class runs IEC60730 verification tests for the invariable memory plausibility test.

    +

    Hardware setup: Connect DUT to PC. No additional hardware setup required.

    +

    Member Function Documentation

    + +

    ◆ test_cal_crc_block_memory()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_invariable_memory.iec60730_imc.test_cal_crc_block_memory ( self)
    +
    + +

    Verify the DUT calculation of CRC value at BIST.

    +

    This TC checks under normal conditions with no exceptions, firmware will calculate the CRC values for each step of BIST and accumulate these values. Finally, the calculated CRC value SHOULD be equal to the value stored in the flash.

    +

    Order of execution

      +
    • Reset device
      • +
    • Verify code reaches breakpoint at IEC60730_IMC_BIST_CRCBLOCK_BKPT
      • +
    • Loop with IEC60730_IMC_BIST_CALCRC_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_IMC_BIST_END_BKPT (success)
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_cal_crc_full_memory()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_invariable_memory.iec60730_imc.test_cal_crc_full_memory ( self)
    +
    + +

    Verify the DUT calculation of CRC value at POST.

    +

    This test case (TC) checks under normal conditions with no exceptions, firmware will calculate the CRC of the entire flash, the calculated value SHOULD be equal to the calculated value stored in the flash.

    +

    Order of execution

      +
    • Reset device
      • +
    • Verify code reaches breakpoint at IEC60730_IMC_POST_START_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_IMC_POST_END_BKPT
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_corrupt_crc_cal_crc_block_memory()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_invariable_memory.iec60730_imc.test_corrupt_crc_cal_crc_block_memory ( self)
    +
    + +

    Verify the DUT jump to sl_iec60730_safe_state when flash faied at BIST.

    +

    This TC simulates an abnormal situation that causes the variable iec60730_cur_crc to be changed, resulting in the calculated CRC value for the entire flash being different from the value stored in the flash. This leads to jump to break point at sl_iec60730_safe_state.

    +

    In the IMC documentation there is a detailed description of the variable iec60730_cur_crc.

    +

    Order of execution

    +
    Returns
    True
    + +
    +
    + +

    ◆ test_corrupt_crc_full_memory()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_invariable_memory.iec60730_imc.test_corrupt_crc_full_memory ( self)
    +
    + +

    Verify the DUT jump to sl_iec60730_safe_state when flash faied at POST.

    +

    This TC simulates an abnormal situation that causes the variable iec60730_ref_crc to be changed, resulting in the calculated CRC value for the entire flash being different from the value stored in the flash. This leads to jump to break point at sl_iec60730_safe_state.

    +

    In the IMC documentation there is a detailed description of the variable iec60730_ref_crc.

    +

    Order of execution

      +
    • Reset device
      • +
    • Verify code reaches breakpoint at IEC60730_IMC_POST_START_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_corrupt_integrity_iec60730_run_crc_block_memory()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_invariable_memory.iec60730_imc.test_corrupt_integrity_iec60730_run_crc_block_memory ( self)
    +
    + +

    Verify integrity of iec60730_run_crc variable.

    +

    This TC simulates an abnormal situation that causes the variable iec60730_run_crc to be changed, resulting in the calculated CRC value for the entire flash being different from the value stored in the flash. This leads to jump to break point at sl_iec60730_safe_state.

    +

    In the IMC documentation there is a detailed description of the variable iec60730_run_crc.

    +

    Order of execution

    +
    Returns
    True
    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/integration_test_iec60730_invariable_memory.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
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    adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    setUp(self)integration_test_iec60730_irq.iec60730_irq
    test_irq_execution(self)integration_test_iec60730_irq.iec60730_irq
    test_irq_out_of_bounds(self)integration_test_iec60730_irq.iec60730_irq
    TEST_SUITE_NAMEintegration_test_iec60730_irq.iec60730_irqstatic
    + +
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    integration_test_iec60730_irq.iec60730_irq Class Reference
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » IRQ Automated Verification Tests
    +
    +
    + +

    IEC60730 IRQ Plausibility Verification Tests. + More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Member Functions

    +def setUp (self)
     Set up connect device.
     
    def test_irq_execution (self)
     Verify the DUT repeatedly executes the IRQ plausibility test, indicating no erroneous entry into safe state. More...
     
    def test_irq_out_of_bounds (self)
     Verifies that the IRQ plausibility test forces entry into safe state when IRQs execute out-of-spec. More...
     
    - Public Member Functions inherited from iec60730_test_base.iec60730TestBase
    +def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
     
    +def init_connect_group (self)
     
    +def connect_mcu (self, chip_name)
     
    +def re_connect_mcu (self)
     
    +def adapter_close (self)
     
    +def flash_mcu (self)
     
    +def erase_mcu (self)
     
    +def scan_adapter (self, serial_number, chip_name)
     
    +def pre_exec_test (self)
     
    +def post_exec_test (self)
     
    +def get_variable_address (self, relative_path, var_name)
     
    +def get_label (self, address)
     
    +def set_chip_name (self, chip_name)
     
    + + + + +

    +Static Public Attributes

    +string TEST_SUITE_NAME = "IRQ"
     Text name of the test suite, used in XML output.
     
    + + + + + + +

    +Additional Inherited Members

    - Public Attributes inherited from iec60730_test_base.iec60730TestBase
    + logger
     
    + adapter
     
    +

    Detailed Description

    +

    IEC60730 IRQ Plausibility Verification Tests.

    +

    This class runs IEC60730 verification tests for the irq plausibility test.

    +

    Hardware setup: Connect DUT to PC. No additional hardware setup required.

    +

    Member Function Documentation

    + +

    ◆ test_irq_execution()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_irq.iec60730_irq.test_irq_execution ( self)
    +
    + +

    Verify the DUT repeatedly executes the IRQ plausibility test, indicating no erroneous entry into safe state.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
        +
      • Test passes, return True
        • +
      +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_irq_out_of_bounds()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_irq.iec60730_irq.test_irq_out_of_bounds ( self)
    +
    + +

    Verifies that the IRQ plausibility test forces entry into safe state when IRQs execute out-of-spec.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
      • +
    • Force value of interrupt count to be less than minimum
      • +
    • Verify safe state entrance
      • +
    • Reset
      • +
    • Verify code reaches breakpoint at IEC60730_IRQ_BKPT
      • +
    • Force value of interrupt count to be higher than maximum
      • +
    • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT +
      • +
    +
    Returns
    True
    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/integration_test_iec60730_irq.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
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    adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    setUp(self)integration_test_iec60730_program_counter.iec60730_programme_counter
    test_program_counter_execution(self)integration_test_iec60730_program_counter.iec60730_programme_counter
    test_program_counter_too_slow(self)integration_test_iec60730_program_counter.iec60730_programme_counter
    TEST_SUITE_NAMEintegration_test_iec60730_program_counter.iec60730_programme_counterstatic
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    integration_test_iec60730_program_counter.iec60730_programme_counter Class Reference
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » Program Counter Verification Tests
    +
    +
    + +

    IEC60730 CPU Program counter Tests. + More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Member Functions

    +def setUp (self)
     Set up connect device.
     
    def test_program_counter_execution (self)
     Verify the DUT repeatedly Program counter test, indicating Program counter correctly running. More...
     
    def test_program_counter_too_slow (self)
     Verify the DUT repeatedly executes Program counter test, indicating Program counter enters safe state. More...
     
    - Public Member Functions inherited from iec60730_test_base.iec60730TestBase
    +def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
     
    +def init_connect_group (self)
     
    +def connect_mcu (self, chip_name)
     
    +def re_connect_mcu (self)
     
    +def adapter_close (self)
     
    +def flash_mcu (self)
     
    +def erase_mcu (self)
     
    +def scan_adapter (self, serial_number, chip_name)
     
    +def pre_exec_test (self)
     
    +def post_exec_test (self)
     
    +def get_variable_address (self, relative_path, var_name)
     
    +def get_label (self, address)
     
    +def set_chip_name (self, chip_name)
     
    + + + + +

    +Static Public Attributes

    +string TEST_SUITE_NAME = "PROGRAM COUNTER"
     Text name of the test suite, used in XML output.
     
    + + + + + + +

    +Additional Inherited Members

    - Public Attributes inherited from iec60730_test_base.iec60730TestBase
    + logger
     
    + adapter
     
    +

    Detailed Description

    +

    IEC60730 CPU Program counter Tests.

    +

    This class runs IEC60730 Program counter tests.

    +

    Hardware setup: Connect DUT to PC. No additional hardware setup required.

    +

    Member Function Documentation

    + +

    ◆ test_program_counter_execution()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_program_counter.iec60730_programme_counter.test_program_counter_execution ( self)
    +
    + +

    Verify the DUT repeatedly Program counter test, indicating Program counter correctly running.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_PC_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_PC_BKPT
        +
      • Test passes, return True
        • +
      +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_program_counter_too_slow()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_program_counter.iec60730_programme_counter.test_program_counter_too_slow ( self)
    +
    + +

    Verify the DUT repeatedly executes Program counter test, indicating Program counter enters safe state.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_PC_BKPT
      • +
    • Inject fault condition into Program counter flags
      • +
    • Verify code reaches breakpoint at iec60730_SafeState
        +
      • Test passes, return True
        • +
      +
      • +
    +
    Returns
    True
    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/integration_test_iec60730_program_counter.py
      • +
    +
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    +Generated by   +doxygen + 1.8.17 +
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    adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    setUp(self)integration_test_iec60730_system_clock.iec60730_system_clock
    TEST_SUITE_NAMEintegration_test_iec60730_system_clock.iec60730_system_clockstatic
    test_system_clock_execution(self)integration_test_iec60730_system_clock.iec60730_system_clock
    test_system_clock_out_of_bound(self)integration_test_iec60730_system_clock.iec60730_system_clock
    + +
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    + + diff --git a/site/document_api_iec60730_library/classintegration__test__iec60730__system__clock_1_1iec60730__system__clock.html b/site/document_api_iec60730_library/classintegration__test__iec60730__system__clock_1_1iec60730__system__clock.html new file mode 100644 index 00000000..7c668e9c --- /dev/null +++ b/site/document_api_iec60730_library/classintegration__test__iec60730__system__clock_1_1iec60730__system__clock.html @@ -0,0 +1,225 @@ + + + + + + + +Document API IEC60730 Library: integration_test_iec60730_system_clock.iec60730_system_clock Class Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
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    +Public Member Functions | +Static Public Attributes | +List of all members
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    +
    integration_test_iec60730_system_clock.iec60730_system_clock Class Reference
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » System Clock Automated Verification Tests
    +
    +
    + +

    IEC60730 System Clock Verification Tests. + More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Member Functions

    +def setUp (self)
     Set up connect device.
     
    def test_system_clock_execution (self)
     Verify the DUT repeatedly executes the system clock test, indicating no erroneous entry into safe state. More...
     
    def test_system_clock_out_of_bound (self)
     Verifies that the BIST system clock test enters safe state when out-of-bounds system clock is enabled. More...
     
    - Public Member Functions inherited from iec60730_test_base.iec60730TestBase
    +def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
     
    +def init_connect_group (self)
     
    +def connect_mcu (self, chip_name)
     
    +def re_connect_mcu (self)
     
    +def adapter_close (self)
     
    +def flash_mcu (self)
     
    +def erase_mcu (self)
     
    +def scan_adapter (self, serial_number, chip_name)
     
    +def pre_exec_test (self)
     
    +def post_exec_test (self)
     
    +def get_variable_address (self, relative_path, var_name)
     
    +def get_label (self, address)
     
    +def set_chip_name (self, chip_name)
     
    + + + + +

    +Static Public Attributes

    +string TEST_SUITE_NAME = "System Clock"
     Text name of the test suite, used in XML output.
     
    + + + + + + +

    +Additional Inherited Members

    - Public Attributes inherited from iec60730_test_base.iec60730TestBase
    + logger
     
    + adapter
     
    +

    Detailed Description

    +

    IEC60730 System Clock Verification Tests.

    +

    This class runs IEC60730 verification tests for the system clock test.

    +

    Hardware setup: Connect DUT to PC. No additional hardware setup required.

    +

    Member Function Documentation

    + +

    ◆ test_system_clock_execution()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_system_clock.iec60730_system_clock.test_system_clock_execution ( self)
    +
    + +

    Verify the DUT repeatedly executes the system clock test, indicating no erroneous entry into safe state.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_SYSTEM_CLOCK_TICK_BKPT (to verify Clock counter is working).
      • +
    • Verify code reaches breakpoint at IEC60730_TEST_CLOCK_TICK_BKPT (To verify Clock counter is checked. Test finishes without stuck in safe state.).
        +
      • Test passes, return True
        • +
      +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_system_clock_out_of_bound()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_system_clock.iec60730_system_clock.test_system_clock_out_of_bound ( self)
    +
    + +

    Verifies that the BIST system clock test enters safe state when out-of-bounds system clock is enabled.

    +

    The system clock test is validated by forcing a system clock frequency that runs low bound checked by the test. Testing validates that the system enters safe state after the system clock is forced low bound.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_SYSTEM_CLOCK_FREQ_ADJUSTMENT_BKPT
      • +
    • Force value of sl_iec60730_sys_clock_count to be out of bound
      • +
    • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT +
      • +
    +
    Returns
    True
    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/integration_test_iec60730_system_clock.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc-members.html b/site/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc-members.html new file mode 100644 index 00000000..0024fa87 --- /dev/null +++ b/site/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc-members.html @@ -0,0 +1,109 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
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    +
    + + + + + + + + +
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    integration_test_iec60730_variable_memory.iec60730_vmc Member List
    +
    +
    + +

    This is the complete list of members for integration_test_iec60730_variable_memory.iec60730_vmc, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    corruption(self, address=0, value=0, time=1, label='', label_pass='sl_iec60730_safe_state')integration_test_iec60730_variable_memory.iec60730_vmc
    env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    reach_to_breakpoint(self, label, setbkp, time)integration_test_iec60730_variable_memory.iec60730_vmc
    scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    set_breakpoint(self, label)integration_test_iec60730_variable_memory.iec60730_vmc
    set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    setUp(self)integration_test_iec60730_variable_memory.iec60730_vmc
    test_correct_background_full_ram(self)integration_test_iec60730_variable_memory.iec60730_vmc
    test_correct_background_step_ram(self)integration_test_iec60730_variable_memory.iec60730_vmc
    test_detect_corruption_full_ram(self)integration_test_iec60730_variable_memory.iec60730_vmc
    test_detect_corruption_step_ram(self)integration_test_iec60730_variable_memory.iec60730_vmc
    test_detect_failed_stack_test(self)integration_test_iec60730_variable_memory.iec60730_vmc
    TEST_SUITE_NAMEintegration_test_iec60730_variable_memory.iec60730_vmcstatic
    test_work_normally_stack_test(self)integration_test_iec60730_variable_memory.iec60730_vmc
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc.html b/site/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc.html new file mode 100644 index 00000000..596b7029 --- /dev/null +++ b/site/document_api_iec60730_library/classintegration__test__iec60730__variable__memory_1_1iec60730__vmc.html @@ -0,0 +1,513 @@ + + + + + + + +Document API IEC60730 Library: integration_test_iec60730_variable_memory.iec60730_vmc Class Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
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    +Public Member Functions | +Static Public Attributes | +List of all members
    +
    +
    integration_test_iec60730_variable_memory.iec60730_vmc Class Reference
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » Variable Memory Automated Verification Tests
    +
    +
    + +

    IEC60730 Variable Memory Plausibility Verification Tests. + More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Member Functions

    +def setUp (self)
     Set up connect device.
     
    +def set_breakpoint (self, label)
     Set breakpoint.
     
    +def reach_to_breakpoint (self, label, setbkp, time)
     Run to breakpoint.
     
    +def corruption (self, address=0, value=0, time=1, label='', label_pass='sl_iec60730_safe_state')
     Corruption changes the value at the breakpoint label.
     
    def test_correct_background_full_ram (self)
     Verify the DUT run step by step when testing full ram at POST. More...
     
    def test_detect_corruption_full_ram (self)
     Verify the DUT jump to sl_iec60730_safe_state when testing ram failed at post. More...
     
    def test_correct_background_step_ram (self)
     Verify the DUT run step by step when testing full ram at BIST. More...
     
    def test_detect_corruption_step_ram (self)
     Verify the DUT jump to sl_iec60730_safe_state when testing ram failed at BIST. More...
     
    def test_work_normally_stack_test (self)
     Verify the DUT run to check RAM and not failed at BIST. More...
     
    def test_detect_failed_stack_test (self)
     Verify the DUT jump to sl_iec60730_safe_state when stack test failed at BIST. More...
     
    - Public Member Functions inherited from iec60730_test_base.iec60730TestBase
    +def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
     
    +def init_connect_group (self)
     
    +def connect_mcu (self, chip_name)
     
    +def re_connect_mcu (self)
     
    +def adapter_close (self)
     
    +def flash_mcu (self)
     
    +def erase_mcu (self)
     
    +def scan_adapter (self, serial_number, chip_name)
     
    +def pre_exec_test (self)
     
    +def post_exec_test (self)
     
    +def get_variable_address (self, relative_path, var_name)
     
    +def get_label (self, address)
     
    +def set_chip_name (self, chip_name)
     
    + + + + +

    +Static Public Attributes

    +string TEST_SUITE_NAME = "VMC"
     Text name of the test suite, used in XML output.
     
    + + + + + + +

    +Additional Inherited Members

    - Public Attributes inherited from iec60730_test_base.iec60730TestBase
    + logger
     
    + adapter
     
    +

    Detailed Description

    +

    IEC60730 Variable Memory Plausibility Verification Tests.

    +

    This class runs IEC60730 verification tests for the variable memory plausibility test.

    +

    Hardware setup: Connect DUT to PC. No additional hardware setup required.

    +

    Member Function Documentation

    + +

    ◆ test_correct_background_full_ram()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_variable_memory.iec60730_vmc.test_correct_background_full_ram ( self)
    +
    + +

    Verify the DUT run step by step when testing full ram at POST.

    +

    This test case (TC) checks under normal conditions with no exceptions, VMC module DOES NOT raise issue.

    +

    Order of execution

      +
    • Reset device
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_SAVE
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP1
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP2
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP3
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP4
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP5
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP6
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_RESTORE
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_MARCH_RET
      • +
    • Verify code reaches breakpoint at IEC60730_VMC_POST_MARCHC_STEP_BKPT
      • +
    +

    This process in loop with coditon iec60730_rt_check < RAMTEST_END. In case this condition is not satisfied, clear all break point and verify

    +
      +
    • Verify code reaches breakpoint at IEC60730_VMC_POST_CHECK_BKBUF_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF1
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF2
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF3
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF4
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF5
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF6
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_MARCH_RET
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_RET
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_correct_background_step_ram()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_variable_memory.iec60730_vmc.test_correct_background_step_ram ( self)
    +
    + +

    Verify the DUT run step by step when testing full ram at BIST.

    +

    This TC checks under normal conditions with no exceptions, vmc module DOES NOT raise issue.

    +

    Order of execution

      +
    • Reset device
      • +
    • Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT
      • +
    +

    The loop with coditon iec60730_rt_check < RAMTEST_END

      +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_SAVE
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP1
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP2
      • +
    • if not enable MatchX
        +
      • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP3
        • +
      • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP4
        • +
      +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP5
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP6
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_RESTORE
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_MARCH_RET
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_RET
      • +
    • Verify code reaches breakpoint at IEC60730_VMC_BIST_MARCHC_STEP_BKPT
      • +
    +

    In case condition is not satisfied, clear all break point and verify

    +
      +
    • Verify code reaches breakpoint at IEC60730_IMC_BIST_CHECK_BKBUF_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF1
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF2
      • +
    • if not enable MatchX
        +
      • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF3
        • +
      • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF4
        • +
      +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF5
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF6
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_MARCH_RET
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_RET
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_detect_corruption_full_ram()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_variable_memory.iec60730_vmc.test_detect_corruption_full_ram ( self)
    +
    + +

    Verify the DUT jump to sl_iec60730_safe_state when testing ram failed at post.

    +

    This TC simulates an abnormal situation that causes the iec60730_rt_check, and iec60730_bk_buf variables to be changed. This leads to jump to break point at sl_iec60730_safe_state.

    +

    In the VMC documentation there is a detailed description of the iec60730_rt_check, and iec60730_bk_buf variables.

    +

    Order of execution

      +
    • Reset device
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP2. We don't reach IEC60730_MARCHC_STEP_STEP1 because this step only write (W1) +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP3 +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP4 +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP5 +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP6 +
      • +
    • Verify code reaches breakpoint at IEC60730_VMC_POST_CHECK_BKBUF_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF2. We don't reach IEC60730_MARCHC_STEP_BUFF1 because this step only write (W1) +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF3 +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF4 +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF5 +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF6 +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_detect_corruption_step_ram()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_variable_memory.iec60730_vmc.test_detect_corruption_step_ram ( self)
    +
    + +

    Verify the DUT jump to sl_iec60730_safe_state when testing ram failed at BIST.

    +

    This TC simulates an abnormal situation that causes the variable iec60730_rt_check, iec60730_bk_buf to be changed. This leads to jump to break point at sl_iec60730_safe_state.

    +

    In the VMC documentation there is a detailed description of the iec60730_rt_check, and iec60730_bk_buf variables.

    +

    Order of execution

      +
    • Reset device
      • +
    • Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP2. We don't reach IEC60730_MARCHXC_STEP_STEP1 because this step only write (W1) +
      • +
    • if not enable MatchX +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP5 +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP6 +
      • +
    • Verify code reaches breakpoint at IEC60730_IMC_BIST_CHECK_BKBUF_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF2. We don't reach IEC60730_MARCHXC_STEP_BUFF1 because this step only write (W1) +
      • +
    • if not enable MatchX +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF6 +
      • +
    • Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF6 +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_detect_failed_stack_test()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_variable_memory.iec60730_vmc.test_detect_failed_stack_test ( self)
    +
    + +

    Verify the DUT jump to sl_iec60730_safe_state when stack test failed at BIST.

    +

    This TC simulates an abnormal situation that causes the variable iec60730_stack_test_over_flow to be changed. This leads to jump to break point at sl_iec60730_safe_state.

    +

    In the VMC documentation there is a detailed description of the variable iec60730_stack_test_over_flow.

    +

    Order of execution

    +
    Returns
    True
    + +
    +
    + +

    ◆ test_work_normally_stack_test()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_variable_memory.iec60730_vmc.test_work_normally_stack_test ( self)
    +
    + +

    Verify the DUT run to check RAM and not failed at BIST.

    +

    This TC checks under normal conditions with no exceptions, vmc module DOES NOT raise issue.

    +

    Order of execution

      +
    • Reset device
      • +
    • Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_VMC_BIST_STACK_TEST_OK_BKPT
      • +
    +
    Returns
    True
    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/integration_test_iec60730_variable_memory.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
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    integration_test_iec60730_watchdog.iec60730_watchdog Member List
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    This is the complete list of members for integration_test_iec60730_watchdog.iec60730_watchdog, including all inherited members.

    + + + + + + + + + + + + + + + + + + + + + + + + + + +
    adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    clear_rst_causes(self)integration_test_iec60730_watchdog.iec60730_watchdog
    connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    setUp(self)integration_test_iec60730_watchdog.iec60730_watchdog
    TEST_SUITE_NAMEintegration_test_iec60730_watchdog.iec60730_watchdogstatic
    test_tc1_watchdog_por_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
    test_tc2_watchdog_counter_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
    test_tc3_watchdog_wrong_rst_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
    test_tc4_watchdog_wrong_testing_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
    test_tc5_restart_watchdog_execution(self)integration_test_iec60730_watchdog.iec60730_watchdog
    wdog_power_cycle(self)integration_test_iec60730_watchdog.iec60730_watchdog
    wdog_test_running_enable(self)integration_test_iec60730_watchdog.iec60730_watchdog
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    integration_test_iec60730_watchdog.iec60730_watchdog Class Reference
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730 » Watchdog Automated Verification Tests
    +
    +
    + +

    IEC60730 Watchdog Verification Tests. + More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Member Functions

    +def setUp (self)
     Set up connect device.
     
    +def clear_rst_causes (self)
     Clear reset cause register.
     
    +def wdog_test_running_enable (self)
     Allows to start running test watchdog.
     
    +def wdog_power_cycle (self)
     Reset watchdog by power on by sending command to hostIP.
     
    def test_tc1_watchdog_por_execution (self)
     Verify the DUT follows the watchdog timer POST test logic correctly. More...
     
    def test_tc2_watchdog_counter_execution (self)
     Verify the DUT follows the watchdog timer POST test logic correctly. More...
     
    def test_tc3_watchdog_wrong_rst_execution (self)
     Verify the DUT follows the watchdog timer POST test logic correctly. More...
     
    def test_tc4_watchdog_wrong_testing_execution (self)
     Verify the DUT follows the watchdog timer POST test logic correctly. More...
     
    def test_tc5_restart_watchdog_execution (self)
     Verify the DUT follows the watchdog timer POST test logic correctly. More...
     
    - Public Member Functions inherited from iec60730_test_base.iec60730TestBase
    +def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
     
    +def init_connect_group (self)
     
    +def connect_mcu (self, chip_name)
     
    +def re_connect_mcu (self)
     
    +def adapter_close (self)
     
    +def flash_mcu (self)
     
    +def erase_mcu (self)
     
    +def scan_adapter (self, serial_number, chip_name)
     
    +def pre_exec_test (self)
     
    +def post_exec_test (self)
     
    +def get_variable_address (self, relative_path, var_name)
     
    +def get_label (self, address)
     
    +def set_chip_name (self, chip_name)
     
    + + + + +

    +Static Public Attributes

    +string TEST_SUITE_NAME = "Watchdog"
     Text name of the test suite, used in XML output.
     
    + + + + + + +

    +Additional Inherited Members

    - Public Attributes inherited from iec60730_test_base.iec60730TestBase
    + logger
     
    + adapter
     
    +

    Detailed Description

    +

    IEC60730 Watchdog Verification Tests.

    +

    This class runs IEC60730 verification tests for the watchdog.

    +

    Hardware setup: Connect DUT to PC. No additional hardware setup required.

    +

    Member Function Documentation

    + +

    ◆ test_tc1_watchdog_por_execution()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc1_watchdog_por_execution ( self)
    +
    + +

    Verify the DUT follows the watchdog timer POST test logic correctly.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_POR_RESET_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TIMEOUT_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_END_BKPT
        +
      • Verify the Watchdog status is SL_IEC60730_WATCHDOG_VALID
        • +
      • Verify the Watchdog status saved to BURAM is SL_IEC60730_WATCHDOG_VALID (On EFR32 series 2 only)
        • +
      • Code correctly tested watchdog timer and watchdog reset trigger, enters main loop
        • +
      • Test passes, return True
        • +
      +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_tc2_watchdog_counter_execution()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc2_watchdog_counter_execution ( self)
    +
    + +

    Verify the DUT follows the watchdog timer POST test logic correctly.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
        +
      • Code correctly enters safe state
        • +
      • Test passes, return True
        • +
      +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_tc3_watchdog_wrong_rst_execution()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc3_watchdog_wrong_rst_execution ( self)
    +
    + +

    Verify the DUT follows the watchdog timer POST test logic correctly.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
        +
      • Code correctly enters safe state
        • +
      • Test passes, return True
        • +
      +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_tc4_watchdog_wrong_testing_execution()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc4_watchdog_wrong_testing_execution ( self)
    +
    + +

    Verify the DUT follows the watchdog timer POST test logic correctly.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_WORKING_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
        +
      • Code correctly enters safe state
        • +
      • Test passes, return True
        • +
      +
      • +
    +
    Returns
    True
    + +
    +
    + +

    ◆ test_tc5_restart_watchdog_execution()

    + +
    +
    + + + + + + + + +
    def integration_test_iec60730_watchdog.iec60730_watchdog.test_tc5_restart_watchdog_execution ( self)
    +
    + +

    Verify the DUT follows the watchdog timer POST test logic correctly.

    +

    Order of execution:

      +
    • Verify code reaches breakpoint at IEC60730_TEST_RESTART_WDOG_BKPT
      • +
    • Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT
        +
      • Code correctly enters safe state
        • +
      • Test passes, return True
        • +
      +
      • +
    +
    Returns
    True
    + +
    +
    +
    The documentation for this class was generated from the following file:
      +
    • test/test_script/integration_test_iec60730_watchdog.py
      • +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/classjlink_1_1JLinkDll-members.html b/site/document_api_iec60730_library/classjlink_1_1JLinkDll-members.html new file mode 100644 index 00000000..eab64e95 --- /dev/null +++ b/site/document_api_iec60730_library/classjlink_1_1JLinkDll-members.html @@ -0,0 +1,135 @@ + + + + + + + +Document API IEC60730 Library: Member List + + + + + + + + + +
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    __init__(self, lib_path) (defined in jlink.JLinkDll)jlink.JLinkDll
    abort(self, errMsg) (defined in jlink.JLinkDll)jlink.JLinkDll
    clear_all_breakpoints(self) (defined in jlink.JLinkDll)jlink.JLinkDll
    clear_breakpoint(self, bp_to_clear)jlink.JLinkDll
    close(self)jlink.JLinkDll
    connect(self, serial_number, chip_name) (defined in jlink.JLinkDll)jlink.JLinkDll
    download(self, image, offset=0) (defined in jlink.JLinkDll)jlink.JLinkDll
    erase_chip(self)jlink.JLinkDll
    ErrorOutHandler(cls, errorMsg)jlink.JLinkDll
    execute_command(self, command_string)jlink.JLinkDll
    get_adapter_list(self)jlink.JLinkDll
    get_device_family(self) (defined in jlink.JLinkDll)jlink.JLinkDll
    get_id(self)jlink.JLinkDll
    get_id_data(self)jlink.JLinkDll
    get_speed(self)jlink.JLinkDll
    get_speed_info(self)jlink.JLinkDll
    get_tcp_ip_adapter_list(self)jlink.JLinkDll
    get_usb_adapter_list(self)jlink.JLinkDll
    go_ex(self)jlink.JLinkDll
    halt(self) (defined in jlink.JLinkDll)jlink.JLinkDll
    halted(self)jlink.JLinkDll
    MAX_BUF_SIZE (defined in jlink.JLinkDll)jlink.JLinkDllstatic
    MAX_NUM_ADAPTERS (defined in jlink.JLinkDll)jlink.JLinkDllstatic
    MAX_NUM_CPU_REGISTERS (defined in jlink.JLinkDll)jlink.JLinkDllstatic
    memory_read(self, addr, num_units, zone=None, nbits=None)jlink.JLinkDll
    memory_read16(self, addr, num_halfwords, zone=None)jlink.JLinkDll
    memory_read32(self, addr, num_words, zone=None)jlink.JLinkDll
    memory_read64(self, addr, num_long_words)jlink.JLinkDll
    memory_read8(self, addr, num_bytes, zone=None)jlink.JLinkDll
    memory_write(self, addr, data, zone=None, nbits=None)jlink.JLinkDll
    memory_write16(self, addr, data, zone=None)jlink.JLinkDll
    memory_write32(self, addr, data, zone=None)jlink.JLinkDll
    memory_write64(self, addr, data, zone=None)jlink.JLinkDll
    memory_write8(self, addr, data, zone=None)jlink.JLinkDll
    num_active_breakpoints(self)jlink.JLinkDll
    read_mem(self, address, num_bytes) (defined in jlink.JLinkDll)jlink.JLinkDll
    read_ram_arm_16(self, address, num_words) (defined in jlink.JLinkDll)jlink.JLinkDll
    read_ram_arm_32(self, address, num_words) (defined in jlink.JLinkDll)jlink.JLinkDll
    read_ram_arm_64(self, address, num_words)jlink.JLinkDll
    read_ram_arm_8(self, address, num_bytes) (defined in jlink.JLinkDll)jlink.JLinkDll
    register_list(self)jlink.JLinkDll
    register_name(self, register_index)jlink.JLinkDll
    register_read(self, register_index)jlink.JLinkDll
    register_write(self, reg_index, value)jlink.JLinkDll
    reset(self, halt=True)jlink.JLinkDll
    run_to_breakpoint(self, timeout) (defined in jlink.JLinkDll)jlink.JLinkDll
    set_breakpoint(self, address, typeflags)jlink.JLinkDll
    set_device(self, device) (defined in jlink.JLinkDll)jlink.JLinkDll
    set_max_speed(self)jlink.JLinkDll
    set_speed(self, speed=4000)jlink.JLinkDll
    step(self) (defined in jlink.JLinkDll)jlink.JLinkDll
    WarnOutHandler(cls, warnMsg)jlink.JLinkDll
    + +
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    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
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    +Public Member Functions | +Static Public Attributes | +List of all members
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    +Public Member Functions

    +def __init__ (self, lib_path)
     
    +def abort (self, errMsg)
     
    def execute_command (self, command_string)
     
    def get_usb_adapter_list (self)
     
    def get_tcp_ip_adapter_list (self)
     
    def get_adapter_list (self)
     
    +def connect (self, serial_number, chip_name)
     
    def close (self)
     
    def get_speed (self)
     
    def set_max_speed (self)
     
    def set_speed (self, speed=4000)
     
    def get_speed_info (self)
     
    def get_id (self)
     
    def get_id_data (self)
     
    def halted (self)
     
    +def run_to_breakpoint (self, timeout)
     
    def go_ex (self)
     
    +def step (self)
     
    +def halt (self)
     
    def reset (self, halt=True)
     
    +def get_device_family (self)
     
    +def set_device (self, device)
     
    +def read_mem (self, address, num_bytes)
     
    +def read_ram_arm_8 (self, address, num_bytes)
     
    +def read_ram_arm_16 (self, address, num_words)
     
    +def read_ram_arm_32 (self, address, num_words)
     
    def read_ram_arm_64 (self, address, num_words)
     
    def clear_breakpoint (self, bp_to_clear)
     
    +def clear_all_breakpoints (self)
     
    def register_name (self, register_index)
     
    def register_list (self)
     
    def register_read (self, register_index)
     
    def register_write (self, reg_index, value)
     
    def num_active_breakpoints (self)
     
    def set_breakpoint (self, address, typeflags)
     
    def memory_read (self, addr, num_units, zone=None, nbits=None)
     
    def memory_read8 (self, addr, num_bytes, zone=None)
     
    def memory_read16 (self, addr, num_halfwords, zone=None)
     
    def memory_read32 (self, addr, num_words, zone=None)
     
    def memory_read64 (self, addr, num_long_words)
     
    def memory_write (self, addr, data, zone=None, nbits=None)
     
    def memory_write8 (self, addr, data, zone=None)
     
    def memory_write16 (self, addr, data, zone=None)
     
    def memory_write32 (self, addr, data, zone=None)
     
    def memory_write64 (self, addr, data, zone=None)
     
    def erase_chip (self)
     
    +def download (self, image, offset=0)
     
    def ErrorOutHandler (cls, errorMsg)
     
    def WarnOutHandler (cls, warnMsg)
     
    + + + + + + + +

    +Static Public Attributes

    +int MAX_BUF_SIZE = 336
     
    +int MAX_NUM_ADAPTERS = 32
     
    +int MAX_NUM_CPU_REGISTERS = 256
     
    +

    Detailed Description

    +
    Object for accessing and controlling a JLink adapter
+

    Member Function Documentation

    + +

    ◆ clear_breakpoint()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.clear_breakpoint ( self,
     bp_to_clear 
    )
    +
    +
    Clears breakpoint on the connected device.
+
+Keyword arguments:
+bp_to_clear - Handle of the breakpoint to clear.
+    Pass JLINKARM_BP_HANDLE_ALL to clear all breakpoints.
+
    +
    +
    + +

    ◆ close()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.close ( self)
    +
    +
    Closes the connection to the JLink adapter.
+
    +
    +
    + +

    ◆ erase_chip()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.erase_chip ( self)
    +
    +
    Erases all user flash on the connected device.
+
    +
    +
    + +

    ◆ ErrorOutHandler()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.ErrorOutHandler ( cls,
     errorMsg 
    )
    +
    +
    Log error from the DLL.
+
+:param errorMsg: The DLL error message.
+
    +
    +
    + +

    ◆ execute_command()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.execute_command ( self,
     command_string 
    )
    +
    +
    Execute a JLink command string.
+
+Keyword arguments:
+command_string -- the string to execute with JLINKARM_ExecCommand()
+
+Returns the return value of the executed command.
+
    +
    +
    + +

    ◆ get_adapter_list()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.get_adapter_list ( self)
    +
    +
    Returns a list of all adapters connected to the host via TCP/IP or USB.
+
    +
    +
    + +

    ◆ get_id()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.get_id ( self)
    +
    +
    Retrieves ID of the core.
+
    +
    +
    + +

    ◆ get_id_data()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.get_id_data ( self)
    +
    +
    Retrieves detailed info of the device on the JTAG bus.
+
    +
    +
    + +

    ◆ get_speed()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.get_speed ( self)
    +
    +
    Returns the current JTAG connection speed.
+
    +
    +
    + +

    ◆ get_speed_info()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.get_speed_info ( self)
    +
    +
    Gets the target interface speed information.
+
+Returns a dictionary containing the speed information.
+
    +
    +
    + +

    ◆ get_tcp_ip_adapter_list()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.get_tcp_ip_adapter_list ( self)
    +
    +
    Returns a list of all adapters connected to the host via TCP/IP.
+
    +
    +
    + +

    ◆ get_usb_adapter_list()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.get_usb_adapter_list ( self)
    +
    +
    Returns a list of all adapters connected to the host via USB.
+
    +
    +
    + +

    ◆ go_ex()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.go_ex ( self)
    +
    +
    Runs the currently connected device, skipping over any breakpoint at the current instruction.
+
    +
    +
    + +

    ◆ halted()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.halted ( self)
    +
    +
    Returns whether the CPU core was halted.
+
+Args:
+  self (JLink): the ``JLink`` instance
+
+Returns:
+  ``True`` if the CPU core is halted, otherwise ``False``.
+
+Raises:
+  JLinkException: on device errors.
+
    +
    +
    + +

    ◆ memory_read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_read ( self,
     addr,
     num_units,
     zone = None,
     nbits = None 
    )
    +
    +
    Reads memory from a target system or specific memory zone.
+
+The optional ``zone`` specifies a memory zone to access to read from,
+e.g. ``IDATA``, ``DDATA``, or ``CODE``.
+
+The given number of bits, if provided, must be either ``8``, ``16``, or
+``32``.  If not provided, always reads ``num_units`` bytes.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_units (int): number of units to read
+  zone (str): optional memory zone name to access
+  nbits (int): number of bits to use for each unit
+
+Returns:
+  List of units read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read.
+  ValueError: if ``nbits`` is not ``None``, and not in ``8``, ``16``,
+    or ``32``.
+
    +
    +
    + +

    ◆ memory_read16()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_read16 ( self,
     addr,
     num_halfwords,
     zone = None 
    )
    +
    +
    Reads memory from the target system in units of 16-bits.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_halfwords (int): number of half words to read
+  zone (str): memory zone to read from
+
+Returns:
+  List of halfwords read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read
+
    +
    +
    + +

    ◆ memory_read32()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_read32 ( self,
     addr,
     num_words,
     zone = None 
    )
    +
    +
    Reads memory from the target system in units of 32-bits.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_words (int): number of words to read
+  zone (str): memory zone to read from
+
+Returns:
+  List of words read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read
+
    +
    +
    + +

    ◆ memory_read64()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_read64 ( self,
     addr,
     num_long_words 
    )
    +
    +
    Reads memory from the target system in units of 64-bits.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_long_words (int): number of long words to read
+
+Returns:
+  List of long words read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read
+
    +
    +
    + +

    ◆ memory_read8()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_read8 ( self,
     addr,
     num_bytes,
     zone = None 
    )
    +
    +
    Reads memory from the target system in units of bytes.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to read from
+  num_bytes (int): number of bytes to read
+  zone (str): memory zone to read from
+
+Returns:
+  List of bytes read from the target system.
+
+Raises:
+  JLinkException: if memory could not be read.
+
    +
    +
    + +

    ◆ memory_write()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_write ( self,
     addr,
     data,
     zone = None,
     nbits = None 
    )
    +
    +
    Writes memory to a target system or specific memory zone.
+
+The optional ``zone`` specifies a memory zone to access to write to,
+e.g. ``IDATA``, ``DDATA``, or ``CODE``.
+
+The given number of bits, if provided, must be either ``8``, ``16``, or
+``32``.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of data units to write
+  zone (str): optional memory zone name to access
+  nbits (int): number of bits to use for each unit
+
+Returns:
+  Number of units written.
+
+Raises:
+  JLinkException: on write hardware failure.
+  ValueError: if ``nbits`` is not ``None``, and not in ``8``, ``16`` or
+    ``32``.
+
    +
    +
    + +

    ◆ memory_write16()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_write16 ( self,
     addr,
     data,
     zone = None 
    )
    +
    +
    Writes half-words to memory of a target system.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of half-words to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of half-words written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
    +
    +
    + +

    ◆ memory_write32()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_write32 ( self,
     addr,
     data,
     zone = None 
    )
    +
    +
    Writes words to memory of a target system.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of words to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of words written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
    +
    +
    + +

    ◆ memory_write64()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_write64 ( self,
     addr,
     data,
     zone = None 
    )
    +
    +
    Writes long words to memory of a target system.
+
+Note:
+  This is little-endian.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of long words to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of long words written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
    +
    +
    + +

    ◆ memory_write8()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.memory_write8 ( self,
     addr,
     data,
     zone = None 
    )
    +
    +
    Writes bytes to memory of a target system.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  addr (int): start address to write to
+  data (list): list of bytes to write
+  zone (str): optional memory zone to access
+
+Returns:
+  Number of bytes written to target.
+
+Raises:
+  JLinkException: on memory access error.
+
    +
    +
    + +

    ◆ num_active_breakpoints()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.num_active_breakpoints ( self)
    +
    +
    Returns the number of currently active breakpoints.
+
+Args:
+  self (JLink): the ``JLink`` instance
+
+Returns:
+  The number of breakpoints that are currently set.
+
    +
    +
    + +

    ◆ read_ram_arm_64()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.read_ram_arm_64 ( self,
     address,
     num_words 
    )
    +
    +
    Reads a block of RAM in 64-bit words.
+
+Keyword arguments:
+address -- starting address to read
+num_words -- number of 64-bit words to read
+
    +
    +
    + +

    ◆ register_list()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.register_list ( self)
    +
    +
    Returns a list of the indices for the CPU registers.
+
+The returned indices can be used to read the register content or grab
+the register name.
+
+Args:
+  self (JLink): the ``JLink`` instance
+
+Returns:
+  List of registers.
+
    +
    +
    + +

    ◆ register_name()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.register_name ( self,
     register_index 
    )
    +
    +
    Retrieves and returns the name of an ARM CPU register.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  register_index (int): index of the register whose name to retrieve
+
+Returns:
+  Name of the register.
+
    +
    +
    + +

    ◆ register_read()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.register_read ( self,
     register_index 
    )
    +
    +
    Reads the value from the given register.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  register_index (int/str): the register to read
+
+Returns:
+  The value stored in the given register.
+
    +
    +
    + +

    ◆ register_write()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.register_write ( self,
     reg_index,
     value 
    )
    +
    +
    Writes into an ARM register.
+
+Note:
+  The data is not immediately written, but is cached before being
+  transferred to the CPU on CPU start.
+
+Args:
+  self (JLink): the ``JLink`` instance
+  reg_index (int/str): the ARM register to write to
+  value (int): the value to write to the register
+
+Returns:
+  The value written to the ARM register.
+
+Raises:
+  JLinkException: on write error.
+
    +
    +
    + +

    ◆ reset()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.reset ( self,
     halt = True 
    )
    +
    +
    Resets the currently connected device.
+
+Keyword arguments:
+halt -- if true, the part will be halted before reset
+if false, the part will not be halted before reset
+
    +
    +
    + +

    ◆ set_breakpoint()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.set_breakpoint ( self,
     address,
     typeflags 
    )
    +
    +
    Set a breakpoint within the CPU.
+
+address - Address for the breakpoint.
+typeflags - Flags for the breakpoint.  Ignored for EFM8 devices.
+
    +
    +
    + +

    ◆ set_max_speed()

    + +
    +
    + + + + + + + + +
    def jlink.JLinkDll.set_max_speed ( self)
    +
    +
    Sets the JTAG connection speed to its maximum value.
+
    +
    +
    + +

    ◆ set_speed()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.set_speed ( self,
     speed = 4000 
    )
    +
    +
    Sets the JTAG connection speed.
+
+Keyword arguments:
+speed -- speed of JTAG connection in kHz.
+
    +
    +
    + +

    ◆ WarnOutHandler()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    def jlink.JLinkDll.WarnOutHandler ( cls,
     warnMsg 
    )
    +
    +
    Log warning from the DLL.
+
+:param warnMsg: The DLL error message.
+
    +
    +
    +
    The documentation for this class was generated from the following file:
      +
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    adapter (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    adapter_close(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    connect_mcu(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    env_setup(self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC") (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    erase_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    flash_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_label(self, address) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    get_unit_test_result(self) (defined in unit_test_iec60730_get_report.iec60730_unit_test_result)unit_test_iec60730_get_report.iec60730_unit_test_result
    get_variable_address(self, relative_path, var_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    init_connect_group(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    logger (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    post_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    pre_exec_test(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    re_connect_mcu(self) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    scan_adapter(self, serial_number, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
    set_chip_name(self, chip_name) (defined in iec60730_test_base.iec60730TestBase)iec60730_test_base.iec60730TestBase
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    +def get_unit_test_result (self)
     
    - Public Member Functions inherited from iec60730_test_base.iec60730TestBase
    +def env_setup (self, adapter_serial_no, chip_name, lst_file_path, library_path, comp="GCC")
     
    +def init_connect_group (self)
     
    +def connect_mcu (self, chip_name)
     
    +def re_connect_mcu (self)
     
    +def adapter_close (self)
     
    +def flash_mcu (self)
     
    +def erase_mcu (self)
     
    +def scan_adapter (self, serial_number, chip_name)
     
    +def pre_exec_test (self)
     
    +def post_exec_test (self)
     
    +def get_variable_address (self, relative_path, var_name)
     
    +def get_label (self, address)
     
    +def set_chip_name (self, chip_name)
     
    + + + + + + +

    +Additional Inherited Members

    - Public Attributes inherited from iec60730_test_base.iec60730TestBase
    + logger
     
    + adapter
     
    +

    Detailed Description

    +

    IEC60730 get unit test result.

    +

    This class runs IEC60730 get unit test results

    +

    Hardware setup: Connect DUT to PC. No additional hardware setup required.

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    __init__(self, xmlDir=None) (defined in util.PyTestSuites)util.PyTestSuites
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    assume(self, statement, level=1) (defined in util.PyTestSuites)util.PyTestSuites
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    insert_test_case(self, testName, testClass, testResult=None, file=None) (defined in util.PyTestSuites)util.PyTestSuites
    log_test(self, msg) (defined in util.PyTestSuites)util.PyTestSuites
    store_log(self, msg) (defined in util.PyTestSuites)util.PyTestSuites
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    +def store_log (self, msg)
     
    +def log_test (self, msg)
     
    +def close_test_suite (self)
     
    +def complete_test_case (self)
     
    +def insert_test_case (self, testName, testClass, testResult=None, file=None)
     
    +def abort_test_suite (self)
     
    +def assume (self, statement, level=1)
     
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    __init__(self, logService=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    clear_binding_table(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    close_device_connection(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    close_host_connection(self, hide=None)util.TelnetHostUtil
    device_read_until(self, expectStr, timeout) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    device_send(self, cmd, timeout=None, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    device_send_expect(self, cmd, expectStr, timeout=None, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    device_send_no_socket_ret(self, cmd, timeout=None, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    host_send(self, cmd, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    host_send_expect(self, cmd, expectStr, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    is_host_connected(self) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    leave_nwk_and_reset_device(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    log(self, msg, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    open_device_connection(self, hostName, hostPort=None, timeout=30, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    open_host_connection(self, hostName=None, hostPort=None, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    reset_device(self, hide=None) (defined in util.TelnetDeviceUtil)util.TelnetDeviceUtil
    write_log(self, msg, hide=None, logAsResult=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
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    +def __init__ (self, logService=None)
     
    +def log (self, msg, hide=None)
     
    +def open_device_connection (self, hostName, hostPort=None, timeout=30, hide=None)
     
    +def close_device_connection (self, hide=None)
     
    +def leave_nwk_and_reset_device (self, hide=None)
     
    +def reset_device (self, hide=None)
     
    +def clear_binding_table (self, hide=None)
     
    +def device_read_until (self, expectStr, timeout)
     
    +def device_send (self, cmd, timeout=None, hide=None)
     
    +def device_send_expect (self, cmd, expectStr, timeout=None, hide=None)
     
    +def device_send_no_socket_ret (self, cmd, timeout=None, hide=None)
     
    - Public Member Functions inherited from util.TelnetHostUtil
    +def open_host_connection (self, hostName=None, hostPort=None, timeout=None, hide=None)
     
    +def host_send_expect (self, cmd, expectStr, timeout=None, hide=None)
     
    +def host_send (self, cmd, timeout=None, hide=None)
     
    +def write_log (self, msg, hide=None, logAsResult=None)
     
    +def close_host_connection (self, hide=None)
     Helper methods.
     
    +def is_host_connected (self)
     
    +
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    • test/test_script/util.py
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    __init__(self, logService=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    close_host_connection(self, hide=None)util.TelnetHostUtil
    host_send(self, cmd, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    host_send_expect(self, cmd, expectStr, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    is_host_connected(self) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    log(self, msg, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    open_host_connection(self, hostName=None, hostPort=None, timeout=None, hide=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
    write_log(self, msg, hide=None, logAsResult=None) (defined in util.TelnetHostUtil)util.TelnetHostUtil
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    +def __init__ (self, logService=None)
     
    +def open_host_connection (self, hostName=None, hostPort=None, timeout=None, hide=None)
     
    +def host_send_expect (self, cmd, expectStr, timeout=None, hide=None)
     
    +def host_send (self, cmd, timeout=None, hide=None)
     
    +def log (self, msg, hide=None)
     
    +def write_log (self, msg, hide=None, logAsResult=None)
     
    +def close_host_connection (self, hide=None)
     Helper methods.
     
    +def is_host_connected (self)
     
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    __init__(self) (defined in util.TimeStampUtil)util.TimeStampUtil
    convert_time_to_readable(self, timeIn) (defined in util.TimeStampUtil)util.TimeStampUtil
    get_absolute_time(self) (defined in util.TimeStampUtil)util.TimeStampUtil
    get_total_running_time(self) (defined in util.TimeStampUtil)util.TimeStampUtil
    update_startUp_time(self) (defined in util.TimeStampUtil)util.TimeStampUtil
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    +def __init__ (self)
     
    +def update_startUp_time (self)
     
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    +def get_total_running_time (self)
     
    +def convert_time_to_readable (self, timeIn)
     
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    file  app.h [code]
     Top level application functions.
     
    file  unit_test_common.h [code]
     common unit test api
     
    file  unit_test_iec60730_bist.h [code]
     Unit test function sl_iec60730_bist().
     
    file  unit_test_iec60730_cpu_registers.h [code]
     Unit tests for functions in cpu registers module.
     
    file  unit_test_iec60730_invariable_memory.h [code]
     Unit tests for functions in invariable memory module.
     
    file  unit_test_iec60730_irq.h [code]
     Unit tests for functions in irq module.
     
    file  unit_test_iec60730_post.h [code]
     Unit test function sl_iec60730_post().
     
    file  unit_test_iec60730_program_counter.h [code]
     Unit test function sl_iec60730_program_counter_test().
     
    file  unit_test_iec60730_safety_check.h [code]
     Unit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().
     
    file  unit_test_iec60730_system_clock.h [code]
     Unit tests for functions in system_clock module.
     
    file  unit_test_iec60730_variable_memory.h [code]
     Unit tests for functions in variable memory module.
     
    file  unit_test_iec60730_watchdog.h [code]
     Unit tests for functions in watchdog module.
     
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    config Directory Reference
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    file  sl_iec60730_config.h [code]
     Library configuration.
     
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    directory  unit_test
     
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    +Files

    file  sl_iec60730.h [code]
     Library definitions.
     
    file  sl_iec60730_comm.h [code]
     Comm check.
     
    file  sl_iec60730_cpu_registers.h [code]
     CPU Registers check.
     
    file  sl_iec60730_internal.h [code]
     Internal definitions.
     
    file  sl_iec60730_invariable_memory.h [code]
     Invariable memory check.
     
    file  sl_iec60730_irq.h [code]
     Interrupt check.
     
    file  sl_iec60730_library_documentation.h [code]
     Library Documentation.
     
    file  sl_iec60730_program_counter.h [code]
     Program Counter check.
     
    file  sl_iec60730_system_clock.h [code]
     Clock check.
     
    file  sl_iec60730_toolchain.h [code]
     Compiler abstraction.
     
    file  sl_iec60730_variable_memory.h [code]
     Variable memory check.
     
    file  sl_iec60730_watchdog.h [code]
     Watchdog check.
     
    +
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    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/doc.png b/site/document_api_iec60730_library/doc.png new file mode 100644 index 00000000..17edabff Binary files /dev/null and b/site/document_api_iec60730_library/doc.png differ diff --git a/site/document_api_iec60730_library/doxygen.css b/site/document_api_iec60730_library/doxygen.css new file mode 100644 index 00000000..73ecbb2c --- /dev/null +++ b/site/document_api_iec60730_library/doxygen.css @@ -0,0 +1,1771 @@ +/* The standard CSS for doxygen 1.8.17 */ + +body, table, div, p, dl { + font: 400 14px/22px Roboto,sans-serif; +} + +p.reference, p.definition { + font: 400 14px/22px Roboto,sans-serif; +} + +/* @group Heading Levels */ + +h1.groupheader { + font-size: 150%; +} + +.title { + font: 400 14px/28px Roboto,sans-serif; + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2.groupheader { + border-bottom: 1px solid #879ECB; + color: #354C7B; + font-size: 150%; + font-weight: normal; + margin-top: 1.75em; + padding-top: 8px; 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+ white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +div.line:after { + content:"\000A"; + white-space: pre; +} + +div.line.glow { + background-color: cyan; + box-shadow: 0 0 10px cyan; +} + + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +.lineno { + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +div.ah, span.ah { + background-color: black; + font-weight: bold; + color: #FFFFFF; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000 110%); +} + +div.classindex ul { + list-style: none; + padding-left: 0; +} + +div.classindex span.ai { + display: inline-block; +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C4CFE5; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C4CFE5; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EEF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl, img.inline { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9CAFD4; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +blockquote.DocNodeRTL { + border-left: 0; + border-right: 2px solid #9CAFD4; + margin: 0 4px 0 24px; + padding: 0 16px 0 12px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; 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+ border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memSeparator { + border-bottom: 1px solid #DEE4F0; + line-height: 1px; + margin: 0px; + padding: 0px; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight, .memTemplItemRight { + width: 100%; +} + +.memTemplParams { + color: #4665A2; + white-space: nowrap; + font-size: 80%; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtitle { + padding: 8px; + border-top: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + border-top-right-radius: 4px; + border-top-left-radius: 4px; + margin-bottom: -1px; + background-image: url('nav_f.png'); + background-repeat: repeat-x; + background-color: #E2E8F2; + line-height: 1.25; + font-weight: 300; + float:left; +} + +.permalink +{ + font-size: 65%; + display: inline-block; + vertical-align: middle; +} + +.memtemplate { + font-size: 80%; + color: #4665A2; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; + display: table !important; + width: 100%; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: 400; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 0px 6px 0px; + color: #253555; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-color: #DFE5F1; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + +} + +.overload { + font-family: "courier new",courier,monospace; + font-size: 65%; +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} +.paramname code { + line-height: 14px; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname, .tparams .paramname, .exception .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype, .tparams .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir, .tparams .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #728DC1; + border-top:1px solid #5373B4; + border-left:1px solid #5373B4; + border-right:1px solid #C4CFE5; + border-bottom:1px solid #C4CFE5; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; + vertical-align: middle; +} + + + +/* @end */ + +/* these are for tree view inside a (index) page */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #9CAFD4; + border-bottom: 1px solid #9CAFD4; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; + padding-top: 3px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.entry a img { + border: none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + padding-top: 3px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3D578C; +} + +.arrow { + color: #9CAFD4; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; + cursor: pointer; + font-size: 80%; + display: inline-block; + width: 16px; + height: 22px; +} + +.icon { + font-family: Arial, Helvetica; + font-weight: bold; + font-size: 12px; + height: 14px; + width: 16px; + display: inline-block; + background-color: #728DC1; + color: white; + text-align: center; + border-radius: 4px; + margin-left: 2px; + margin-right: 2px; +} + +.icona { + width: 24px; + height: 22px; + display: inline-block; +} + +.iconfopen { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('folderopen.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +.iconfclosed { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('folderclosed.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +.icondoc { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('doc.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +table.directory { + font: 400 14px Roboto,sans-serif; +} + +/* @end */ + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #2A3D61; +} + +table.doxtable caption { + caption-side: top; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + /*width: 100%;*/ + margin-bottom: 10px; + border: 1px solid #A8B8D9; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + vertical-align: top; +} + +.fieldtable td.fieldname { + padding-top: 3px; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A8B8D9; + /*width: 100%;*/ +} + +.fieldtable td.fielddoc p:first-child { + margin-top: 0px; +} + +.fieldtable td.fielddoc p:last-child { + margin-bottom: 2px; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + font-size: 90%; + color: #253555; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + font-weight: 400; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A8B8D9; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + background-position: 0 -5px; + height:30px; + line-height:30px; + color:#8AA0CC; + border:solid 1px #C2CDE4; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#364D7C; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #283A5D; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; +} + +.navpath li.navelem a:hover +{ + color:#6884BD; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#364D7C; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +table.classindex +{ + margin: 10px; + white-space: nowrap; + margin-left: 3%; + margin-right: 3%; + width: 94%; + border: 0; + border-spacing: 0; + padding: 0; +} + +div.ingroups +{ + font-size: 8pt; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C4CFE5; +} + +div.headertitle +{ + padding: 5px 5px 5px 10px; +} + +.PageDocRTL-title div.headertitle { + text-align: right; + direction: rtl; +} + +dl { + padding: 0 0 0 0; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug, dl.examples */ +dl.section { + margin-left: 0px; + padding-left: 0px; +} + +dl.section.DocNodeRTL { + margin-right: 0px; + padding-right: 0px; +} + +dl.note { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #D0C000; +} + +dl.note.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #FF0000; +} + +dl.warning.DocNodeRTL, dl.attention.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #00D000; +} + +dl.pre.DocNodeRTL, dl.post.DocNodeRTL, dl.invariant.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #00D000; +} + +dl.deprecated { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #505050; +} + +dl.deprecated.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #505050; +} + +dl.todo { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #00C0E0; +} + +dl.todo.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #00C0E0; +} + +dl.test { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #3030E0; +} + +dl.test.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #3030E0; +} + +dl.bug { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #C08050; +} + +dl.bug.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectalign +{ + vertical-align: middle; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5373B4; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.plantumlgraph +{ + text-align: center; +} + +.diagraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #90A5CE; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#334975; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D8DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 8px 10px 10px; + width: 200px; +} + +.PageDocRTL-title div.toc { + float: left !important; + text-align: right; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +.PageDocRTL-title div.toc li { + background-position-x: right !important; + padding-left: 0 !important; + padding-right: 10px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4665A2; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.PageDocRTL-title div.toc li.level1 { + margin-left: 0 !important; + margin-right: 0; +} + +.PageDocRTL-title div.toc li.level2 { + margin-left: 0 !important; + margin-right: 15px; +} + +.PageDocRTL-title div.toc li.level3 { + margin-left: 0 !important; + margin-right: 30px; +} + +.PageDocRTL-title div.toc li.level4 { + margin-left: 0 !important; + margin-right: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +/* tooltip related style info */ + +.ttc { + position: absolute; + display: none; +} + +#powerTip { + cursor: default; + white-space: nowrap; + background-color: white; + border: 1px solid gray; + border-radius: 4px 4px 4px 4px; + box-shadow: 1px 1px 7px gray; + display: none; + font-size: smaller; + max-width: 80%; + opacity: 0.9; + padding: 1ex 1em 1em; + position: absolute; + z-index: 2147483647; +} + +#powerTip div.ttdoc { + color: grey; + font-style: italic; +} + +#powerTip div.ttname a { + font-weight: bold; +} + +#powerTip div.ttname { + font-weight: bold; +} + +#powerTip div.ttdeci { + color: #006318; +} + +#powerTip div { + margin: 0px; + padding: 0px; + font: 12px/16px Roboto,sans-serif; +} + +#powerTip:before, #powerTip:after { + content: ""; + position: absolute; + margin: 0px; +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.s:after, #powerTip.s:before, +#powerTip.w:after, #powerTip.w:before, +#powerTip.e:after, #powerTip.e:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.nw:after, #powerTip.nw:before, +#powerTip.sw:after, #powerTip.sw:before { + border: solid transparent; + content: " "; + height: 0; + width: 0; + position: absolute; +} + +#powerTip.n:after, #powerTip.s:after, +#powerTip.w:after, #powerTip.e:after, +#powerTip.nw:after, #powerTip.ne:after, +#powerTip.sw:after, #powerTip.se:after { + border-color: rgba(255, 255, 255, 0); +} + +#powerTip.n:before, #powerTip.s:before, +#powerTip.w:before, #powerTip.e:before, +#powerTip.nw:before, #powerTip.ne:before, +#powerTip.sw:before, #powerTip.se:before { + border-color: rgba(128, 128, 128, 0); +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.nw:after, #powerTip.nw:before { + top: 100%; +} + +#powerTip.n:after, #powerTip.ne:after, #powerTip.nw:after { + border-top-color: #FFFFFF; + border-width: 10px; + margin: 0px -10px; +} +#powerTip.n:before { + border-top-color: #808080; + border-width: 11px; + margin: 0px -11px; +} +#powerTip.n:after, #powerTip.n:before { + left: 50%; +} + +#powerTip.nw:after, #powerTip.nw:before { + right: 14px; +} + +#powerTip.ne:after, #powerTip.ne:before { + left: 14px; +} + +#powerTip.s:after, #powerTip.s:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.sw:after, #powerTip.sw:before { + bottom: 100%; +} + +#powerTip.s:after, #powerTip.se:after, #powerTip.sw:after { + border-bottom-color: #FFFFFF; + border-width: 10px; + margin: 0px -10px; +} + +#powerTip.s:before, #powerTip.se:before, #powerTip.sw:before { + border-bottom-color: #808080; + border-width: 11px; + margin: 0px -11px; +} + +#powerTip.s:after, #powerTip.s:before { + left: 50%; +} + +#powerTip.sw:after, #powerTip.sw:before { + right: 14px; +} + +#powerTip.se:after, #powerTip.se:before { + left: 14px; +} + +#powerTip.e:after, #powerTip.e:before { + left: 100%; +} +#powerTip.e:after { + border-left-color: #FFFFFF; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.e:before { + border-left-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +#powerTip.w:after, #powerTip.w:before { + right: 100%; +} +#powerTip.w:after { + border-right-color: #FFFFFF; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.w:before { + border-right-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + +/* @group Markdown */ + +/* +table.markdownTable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.markdownTable td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.markdownTableHead tr { +} + +table.markdownTableBodyLeft td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +th.markdownTableHeadLeft th.markdownTableHeadRight th.markdownTableHeadCenter th.markdownTableHeadNone { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +th.markdownTableHeadLeft { + text-align: left +} + +th.markdownTableHeadRight { + text-align: right +} + +th.markdownTableHeadCenter { + text-align: center +} +*/ + +table.markdownTable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.markdownTable td, table.markdownTable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.markdownTable tr { +} + +th.markdownTableHeadLeft, th.markdownTableHeadRight, th.markdownTableHeadCenter, th.markdownTableHeadNone { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +th.markdownTableHeadLeft, td.markdownTableBodyLeft { + text-align: left +} + +th.markdownTableHeadRight, td.markdownTableBodyRight { + text-align: right +} + +th.markdownTableHeadCenter, td.markdownTableBodyCenter { + text-align: center +} + +.DocNodeRTL { + text-align: right; + direction: rtl; +} + +.DocNodeLTR { + text-align: left; + direction: ltr; +} + +table.DocNodeRTL { + width: auto; + margin-right: 0; + margin-left: auto; +} + +table.DocNodeLTR { + width: auto; + margin-right: auto; + margin-left: 0; +} + +tt, code, kbd, samp +{ + display: inline-block; + direction:ltr; +} +/* @end */ + +u { + text-decoration: underline; +} + diff --git a/site/document_api_iec60730_library/doxygen.png b/site/document_api_iec60730_library/doxygen.png new file mode 100644 index 00000000..3ff17d80 Binary files /dev/null and b/site/document_api_iec60730_library/doxygen.png differ diff --git a/site/document_api_iec60730_library/dynsections.js b/site/document_api_iec60730_library/dynsections.js new file mode 100644 index 00000000..ea0a7b39 --- /dev/null +++ b/site/document_api_iec60730_library/dynsections.js @@ -0,0 +1,120 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function toggleVisibility(linkObj) +{ + var base = $(linkObj).attr('id'); + var summary = $('#'+base+'-summary'); + var content = $('#'+base+'-content'); + var trigger = $('#'+base+'-trigger'); + var src=$(trigger).attr('src'); + if (content.is(':visible')===true) { + content.hide(); + summary.show(); + $(linkObj).addClass('closed').removeClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-8)+'closed.png'); + } else { + content.show(); + summary.hide(); + $(linkObj).removeClass('closed').addClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-10)+'open.png'); + } + return false; +} + +function updateStripes() +{ + $('table.directory tr'). + removeClass('even').filter(':visible:even').addClass('even'); +} + +function toggleLevel(level) +{ + $('table.directory tr').each(function() { + var l = this.id.split('_').length-1; + var i = $('#img'+this.id.substring(3)); + var a = $('#arr'+this.id.substring(3)); + if (l + + + + + + +Document API IEC60730 Library: File List + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    File List
    +
    +
    +
    Here is a list of all documented files with brief descriptions:
    +
    [detail level 1234]
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
     ▼ lib
     ▼ config
     sl_iec60730_config.hLibrary configuration
     ▼ inc
     sl_iec60730.hLibrary definitions
     sl_iec60730_board.h
     sl_iec60730_comm.hComm check
     sl_iec60730_cpu_registers.hCPU Registers check
     sl_iec60730_internal.hInternal definitions
     sl_iec60730_invariable_memory.hInvariable memory check
     sl_iec60730_irq.hInterrupt check
     sl_iec60730_library_documentation.hLibrary Documentation
     sl_iec60730_program_counter.hProgram Counter check
     sl_iec60730_system_clock.hClock check
     sl_iec60730_toolchain.hCompiler abstraction
     sl_iec60730_variable_memory.hVariable memory check
     sl_iec60730_watchdog.hWatchdog check
     ▼ test
     ▼ unit_test
     ▼ inc
     app.hTop level application functions
     unit_test_common.hCommon unit test api
     unit_test_iec60730_bist.hUnit test function sl_iec60730_bist()
     unit_test_iec60730_cpu_registers.hUnit tests for functions in cpu registers module
     unit_test_iec60730_invariable_memory.hUnit tests for functions in invariable memory module
     unit_test_iec60730_irq.hUnit tests for functions in irq module
     unit_test_iec60730_post.hUnit test function sl_iec60730_post()
     unit_test_iec60730_program_counter.hUnit test function sl_iec60730_program_counter_test()
     unit_test_iec60730_safety_check.hUnit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur()
     unit_test_iec60730_system_clock.hUnit tests for functions in system_clock module
     unit_test_iec60730_variable_memory.hUnit tests for functions in variable memory module
     unit_test_iec60730_watchdog.hUnit tests for functions in watchdog module
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    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__BIST__VERIFICATION__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__BIST__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..1cbbb2c5 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__BIST__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,163 @@ + + + + + + + +Document API IEC60730 Library: Bist Verification Unit Tests + + + + + + + + + +
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    +Functions
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    Bist Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate function sl_iec60730_bist(). +More...

    + + + + + + + + +

    +Functions

    void test_sl_iec60730_bist_pass_all_check_condition (void)
     
    void test_sl_iec60730_bist_failed_check_condition (void)
     
    void test_iec60730_safety_check_error_occur (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate function sl_iec60730_bist().

    +

    IEC60730 Bist Unit Tests

    +

    These test cases run unit tests to check the operation of the function sl_iec60730_bist()

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_iec60730_safety_check_error_occur()

    + +
    +
    + + + + + + + + +
    void test_iec60730_safety_check_error_occur (void )
    +
    +

    Public Check sl_iec60730_bist() operate

    +
    Returns
    None.
    +

    If bool local is_function_called variable true, and iec60730_safety_check is not equal SL_IEC60730_NO_FAILURE. It means test result routine of sl_iec60730_bist() is a failure, function sl_iec60730_safe_state() is called.

    + +
    +
    + +

    ◆ test_sl_iec60730_bist_failed_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_bist_failed_check_condition (void )
    +
    +

    Public Check sl_iec60730_bist() operate

    +
    Returns
    None.
    +

    If bool local is_function_called variable true. It means test result routine of sl_iec60730_bist() is a failure, function sl_iec60730_safe_state() is called.

    + +
    +
    + +

    ◆ test_sl_iec60730_bist_pass_all_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_bist_pass_all_check_condition (void )
    +
    +

    Public Check sl_iec60730_bist() operate

    +
    Returns
    None.
    +

    If bool local is_function_called variable equal false. It means test result routine of sl_iec60730_bist() is a pass, function sl_iec60730_safe_state() is not called.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION.html b/site/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION.html new file mode 100644 index 00000000..5e1586ea --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION.html @@ -0,0 +1,129 @@ + + + + + + + +Document API IEC60730 Library: CPU Register Check Automated Verification Tests + + + + + + + + + +
    +
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    Document API IEC60730 Library +
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    + +
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    +
    +Classes | +Functions | +Variables
    +
    +
    CPU Register Check Automated Verification Tests
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730
    +
    +
    + +

    Python script for the IEC60730 CPU Register Check Verification tests. +More...

    + + + + + +

    +Classes

    class  integration_test_iec60730_cpu_registers.iec60730_cpu_regs
     IEC60730 CPU Register Check Tests. More...
     
    + + + +

    +Functions

    +bytes integration_test_iec60730_cpu_registers.int_to_bytes (int number)
     
    + + + + + + + + + + + + + + + + + + + +

    +Variables

    + integration_test_iec60730_cpu_registers.chip_name = os.getenv('CHIP')
     Chip name run test.
     
    + integration_test_iec60730_cpu_registers.lst_file_path = os.getenv('LST_PATH')
     Path to file *.lst.
     
    + integration_test_iec60730_cpu_registers.adapter_serial_no = os.getenv('ADAPTER_SN')
     serialno of device
     
    + integration_test_iec60730_cpu_registers.lib_path = os.getenv('JLINK_PATH')
     Path to jlink library.
     
    + integration_test_iec60730_cpu_registers.line = sys.argv.pop()
     Number of arguments passed into the script file.
     
    + integration_test_iec60730_cpu_registers.compiler = line
     compiler creates the file *.lst
     
    +

    Detailed Description

    +

    Python script for the IEC60730 CPU Register Check Verification tests.

    +

    For details on the tests, see iec60730_cpu_registers.iec60730_cpu_regs.

    +

    +Test Results

    +

    EFR32 Device | Test Results ----------—|----------—

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..8470de1e --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__CPU__REGISTERS__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,232 @@ + + + + + + + +Document API IEC60730 Library: CPU Registers Verification Unit Tests + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
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    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
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    +Functions
    +
    +
    CPU Registers Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate functions in cpu registers module. +More...

    + + + + + + + + + + + + + + +

    +Functions

    void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_failed_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate functions in cpu registers module.

    +

    IEC60730 CPU REGISTERS Unit Tests

    +

    These test cases run unit tests to check the operation of the function in cpu registers module.

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_sl_iec60730_cpu_registers_bist_failed_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_cpu_registers_bist_failed_check_condition (void )
    +
    +

    Public Check sl_iec60730_cpu_registers_bist() operate

    +
    Returns
    None.
    +

    If one of the register checks in the function sl_iec60730_cpu_registers_bist() failed, then sl_iec60730_program_counter_check will be 0.

    + +
    +
    + +

    ◆ test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition (void )
    +
    +

    Public Check sl_iec60730_cpu_registers_bist_ns() operate

    +
    Returns
    None.
    +

    This test case only checks when the chip supports is cortex M33. If one of the register checks in the function sl_iec60730_cpu_registers_bist_ns() failed, then function will be returned SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition (void )
    +
    +

    Public Check sl_iec60730_cpu_registers_bist_ns() operate

    +
    Returns
    None.
    +

    This test case only checks when the chip supports is cortex M33. If the register checks in the function sl_iec60730_cpu_registers_bist_ns() pass, then function will be returned SL_IEC60730_TEST_PASSED.

    + +
    +
    + +

    ◆ test_sl_iec60730_cpu_registers_bist_pass_all_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition (void )
    +
    +

    Public Check sl_iec60730_cpu_registers_bist() operate

    +
    Returns
    None.
    +

    If the register checks in the function sl_iec60730_cpu_registers_bist() pass, then sl_iec60730_program_counter_check will be set IEC60730_CPU_REGS_COMPLETE.

    + +
    +
    + +

    ◆ test_sl_iec60730_cpu_registers_bist_s_failed_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition (void )
    +
    +

    Public Check sl_iec60730_cpu_registers_bist_s() operate

    +
    Returns
    None.
    +

    This test case only checks when the chip supports is cortex M33. If one of the register checks in the function sl_iec60730_cpu_registers_bist_s() failed, then function will be returned SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition (void )
    +
    +

    Public Check sl_iec60730_cpu_registers_bist_s() operate

    +
    Returns
    None.
    +

    This test case only checks when the chip supports is cortex M33. If the register checks in the function sl_iec60730_cpu_registers_bist_s() pass, then function will be returned SL_IEC60730_TEST_PASSED.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__CPU__REG__TEST.html b/site/document_api_iec60730_library/group__IEC60730__CPU__REG__TEST.html new file mode 100644 index 00000000..033ff905 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__CPU__REG__TEST.html @@ -0,0 +1,210 @@ + + + + + + + +Document API IEC60730 Library: CPU Registers Check + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
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    +Functions
    +
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    CPU Registers Check
    EFR32 IEC60730 Library
    +
    +
    + +

    Verifies CPU registers are working correctly. +More...

    + + + + + + + + + + +

    +Functions

    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns (void)
     
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s (void)
     
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist (void)
     
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_post (void)
     
    +

    Detailed Description

    +

    Verifies CPU registers are working correctly.

    +

    +Hardware Architecture

    +

    The CM33 CPU registers include the following registers:

    +

    General-purpose registers: • R0-R12

    +

    Stack pointer registers: • MSP + MSPLIM (secure/non-secure) • PSP + PSPLIM (secure/non-secure)

    +

    Special registers: • APSR • CONTROL (secure/non-secure) • PRIMASK (secure/non-secure) • FAULTMASK (secure/non-secure) • BASEPRI (secure/non-secure)

    +

    Link register: • LR

    +

    FPU registers: • FPSCR • S0 – S31

    +

    There is a set of tests performed once after the MCU reset and also during runtime.

    +

    +Failure Risks

    +

    The primary risks with the CPU registers are stuck bits and shorted bits. The CPU register tests will verify that bits can be set high and low, and adjacent bits are not shorted.

    +

    +Software Architecture

    +

    Because internal CPU registers are being tested, the code must be written using assembly language.

    +

    The identification of safety errors is ensured by the specific FAIL return if some registers have the stuck-at fault. Assess the return value of every function. If the value equals the FAIL return, then a jump into the safety error handling function should occur. The safety error handling function may be specific to the application and it is not a part of the library. The main purpose of this function is to put the application into a safe state.

    +

    In some special cases, the error is not reported by the FAIL return, because it would require the action of a corrupt register. In that case, the function waits for reset in an endless loop. The principle of the stuck-at error test of the CPU registers is to write and compare two test patterns in every register. The content of the register is compared with the constant or with the value written into another register that was tested before. Most of the time, R0, R1, and R2 are used as auxiliary registers. Patterns are defined to check the logical one and logical zero values in all register bits.

    +

    Due to the Arm TrustZone support, some core registers are banked between the security states. The Secure (S) or Non-Secure (NS) sets of the corresponding registers are accessible during execution (depending on the current security state). Both register versions are accessible during the S state, but not during the NS state. This is the reason why the NXP Safety Library must be executed in a secure mode. All of the banked registers are listed above.

    +

    For the EFR32 IEC60730 implementation, Figure 1 shows the logic flow chart of the CPU registers check during BIST and POST.

    +
    + +
    +Figure 1 CPU registers check flowchart
    +

    +

    Function Documentation

    + +

    ◆ sl_iec60730_cpu_registers_bist()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist (void )
    +
    +

    public IEC60730 CPU Registers Built In Self Test

    +
    Returns
    sl_iec60730_test_result_t
    +
    +SL_IEC60730_TEST_FAILED means test failed, SL_IEC60730_TEST_PASSED means test passed.
    +

    This function will do a test of all the CPU core registers in non-secure and secure state.

    + +
    +
    + +

    ◆ sl_iec60730_cpu_registers_bist_ns()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns (void )
    +
    +

    public IEC60730 CPU Registers Built In Self Test

    +
    Returns
    sl_iec60730_test_result_t
    +
    +SL_IEC60730_TEST_FAILED means test failed, SL_IEC60730_TEST_PASSED means test passed.
    +

    This function will do a test of all the CPU core registers in non-secure state

    + +
    +
    + +

    ◆ sl_iec60730_cpu_registers_bist_s()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s (void )
    +
    +

    public IEC60730 CPU Registers Built In Self Test

    +
    Returns
    sl_iec60730_test_result_t
    +
    +SL_IEC60730_TEST_FAILED means test failed, SL_IEC60730_TEST_PASSED means test passed.
    +

    This function will do a test of all the CPU core registers in secure state

    + +
    +
    + +

    ◆ sl_iec60730_cpu_registers_post()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_post (void )
    +
    +

    public IEC60730 CPU Registers Power On Self Test

    +
    Returns
    sl_iec60730_test_result_t
    +

    This function simply calls the sl_iec60730_cpu_registers_bist() function.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__INTEGRATION__TEST.html b/site/document_api_iec60730_library/group__IEC60730__INTEGRATION__TEST.html new file mode 100644 index 00000000..501ac29e --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__INTEGRATION__TEST.html @@ -0,0 +1,108 @@ + + + + + + + +Document API IEC60730 Library: Integration Test Modules In Library IEC60730 + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Modules
    +
    +
    Integration Test Modules In Library IEC60730
    IEC60730 Test Specification
    +
    +
    + +

    Python script supports running test case integration tests for internal modules in library IEC60730. +More...

    + + + + + + + + + + + + + + + + + + + + + + + +

    +Modules

     CPU Register Check Automated Verification Tests
     Python script for the IEC60730 CPU Register Check Verification tests.
     
     IRQ Automated Verification Tests
     Python script for the IEC60730 IRQ plausibility verification tests.
     
     Invariable Memory Automated Verification Tests
     Python script for the IEC60730 Invariable Memory plausibility verification tests.
     
     Program Counter Verification Tests
     Python script for the IEC60730 Program counter Verification tests.
     
     System Clock Automated Verification Tests
     Python script for the IEC60730 system clock Verification tests.
     
     Variable Memory Automated Verification Tests
     Python script for the IEC60730 Variable Memory plausibility verification tests.
     
     Watchdog Automated Verification Tests
     Python script for the IEC60730 Watchdog timer Verification tests.
     
    +

    Detailed Description

    +

    Python script supports running test case integration tests for internal modules in library IEC60730.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__TEST.html b/site/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__TEST.html new file mode 100644 index 00000000..4aa61af4 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__TEST.html @@ -0,0 +1,1032 @@ + + + + + + + +Document API IEC60730 Library: Invariable Memory Check + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Classes | +Macros | +Typedefs | +Enumerations | +Functions | +Variables
    +
    +
    Invariable Memory Check
    EFR32 IEC60730 Library
    +
    +
    + +

    Verifies contents of flash memory. +More...

    + + + + + + + + + + + + +

    +Classes

    struct  sl_iec60730_imc_params_t
     This structure is used as configuration for IMC testing, that holds GPCRC Register. More...
     
    struct  sl_iec60730_update_crc_params_t
     
    struct  sl_iec60730_imc_test_region_t
     This structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check. More...
     
    struct  sl_iec60730_imc_test_multiple_regions_t
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    #define sl_iec60730_crc_t
     
    #define SL_IEC60730_INVAR_BLOCKS_PER_BIST
     
    #define SL_IEC60730_ROM_SIZE   ((uint32_t) SL_IEC60730_ROM_END - (uint32_t) SL_IEC60730_ROM_START)
     
    #define STEPS_NUMBER   ((uint32_t) SL_IEC60730_ROM_SIZE / SL_IEC60730_FLASH_BLOCK)
     
    #define SL_IEC60730_ROM_SIZE_INWORDS   ((uint32_t) SL_IEC60730_ROM_SIZE / 4U)
     
    #define SL_IEC60730_FLASH_BLOCK_WORDS   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS / STEPS_NUMBER))
     
    #define SL_IEC60730_ROM_SIZE_TEST(start, end)   ((uint32_t) end - (uint32_t) start)
     
    #define STEPS_NUMBER_TEST(start, end)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / SL_IEC60730_FLASH_BLOCK)
     
    #define SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / 4U)
     
    #define SL_IEC60730_FLASH_BLOCK_WORDS_TEST(start, end)   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) / STEPS_NUMBER_TEST(start, end)))
     
    #define SL_IEC60730_REF_CRC   (check_sum)
     
    +#define SL_IEC60370_ENTER_ATOMIC()   CORE_ENTER_ATOMIC()
     Enter ATOMIC section.
     
    +#define SL_IEC60370_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
     Exit ATOMIC section.
     
    +#define SL_IEC60370_DECLARE_IRQ_STATE   CORE_DECLARE_IRQ_STATE;
     Declare irq state.
     
    #define SL_IEC60730_IMC_POST_ENTER_ATOMIC()
     Enter ATOMIC section of IMC Post. More...
     
    +#define SL_IEC60730_IMC_POST_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
     Exit ATOMIC section of IMC Post.
     
    #define SL_IEC60730_IMC_BIST_ENTER_ATOMIC()
     Enter ATOMIC section of IMC Bist. More...
     
    +#define SL_IEC60730_IMC_BIST_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
     Exit ATOMIC section of IMC Bist.
     
    +#define SL_IEC60730_CRC_INIT(crc, init)   GPCRC_Init(crc, init)
     Initialize the General Purpose Cyclic Redundancy Check (GPCRC) module.
     
    +#define SL_IEC60730_CRC_RESET(crc)   GPCRC_Reset(crc)
     Reset GPCRC registers to the hardware reset state.
     
    +#define SL_IEC60730_CRC_START(crc)   GPCRC_Start(crc)
     Issues a command to initialize CRC calculation.
     
    +#define SL_IEC60730_CRC_INPUTU32(crc, d)   GPCRC_InputU32(crc, d)
     Writes a 32-bit value to the input data register of the CRC.
     
    +#define SL_IEC60730_CRC_INPUTU16(crc, d)   GPCRC_InputU16(crc, d)
     Writes a 32-bit value to the input data register of the CRC.
     
    +#define SL_IEC60730_CRC_INPUTU8(crc, d)   GPCRC_InputU8(crc, d)
     Writes a 8-bit value to the input data register of the CRC.
     
    +#define SL_IEC60730_CRC_DATA_READ(crc)   GPCRC_DataRead(crc)
     Reads the data register of the CRC.
     
    +#define SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(crc)   GPCRC_DataReadBitReversed(crc)
     Reads the data register of the CRC.
     
    +#define SL_IEC60730_CRC_DATA_READ_BYTE_REVERSED(crc)   GPCRC_DataReadByteReversed(crc)
     Reads the data register of the CRC.
     
    #define SL_IEC60730_DEFAULT_GPRC
     
    #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST   "123456789"
     
    #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE
     
    #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT
     
    #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT
     
    #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT
     
    #define SL_IEC60730_ROM_START   ((uint32_t *) (&flash_start))
     
    #define SL_IEC60730_ROM_END   ((uint32_t *) (&check_sum))
     
    #define SL_IEC60730_IMC_INIT_VALUE
     
    #define SL_IEC60730_IMC_XOROUTPUT
     
    #define SL_IEC60730_IMC_INIT_DEFAULT
     
    +#define SL_IEC60730_CRC_DEBUG_ENABLE   1
     Use this definition for debugging purposes.
     
    +#define SL_IEC60730_INVAR_BLOCKS_PER_BIST   512
     Number of blocks per test bist.
     
    #define SL_IEC60730_FLASH_BLOCK   64
     
    #define SL_IEC60730_CRC_USE_SW_ENABLE   0
     
    #define SL_IEC60730_SW_CRC_TABLE_ENABLE   0
     
    #define SL_IEC60730_USE_CRC_32_ENABLE   0
     
    + + + + + + + + + + +

    +Typedefs

    +typedef GPCRC_TypeDef sl_iec60730_crc_typedef
     the General Purpose Cyclic Redundancy Check (GPCRC) module
     
    +typedef GPCRC_Init_TypeDef sl_iec60730_crc_init_typedef
     CRC initialization structure.
     
    +typedef uint8_t sl_iec60730_read_type_t
     The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer.
     
    + + + + +

    +Enumerations

    enum  { SL_IEC60730_IMC_DATA_READ = 0, +SL_IEC60730_IMC_DATA_READ_BIT_REVERSED, +SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED + }
     The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer. More...
     
    + + + + + + + + + +

    +Functions

    void sl_iec60730_imc_init (sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config)
     
    sl_iec60730_test_result_t sl_iec60730_update_crc_with_data_buffer (sl_iec60730_update_crc_params_t *params, sl_iec60730_crc_t *crc, uint8_t *buffer, uint32_t size)
     
    sl_iec60730_test_result_t sl_iec60730_imc_post (void)
     
    sl_iec60730_test_result_t sl_iec60730_imc_bist (void)
     
    + + + + + + +

    +Variables

    sl_iec60730_crc_t check_sum
     
    +uint32_t flash_start
     Flash start address.
     
    +

    Detailed Description

    +

    Verifies contents of flash memory.

    +

    +Hardware Architecture

    +

    In the current version, the calculation of CRC for Flash is calculated starting from the starting address of the Flash (that value can be changed) to the end address whose value is specified by the address of the check_sum variable. Currently, the check_sum variable is set to the end address of user code that uses IEC60730 Library.

    +

    To test the Flash memory, a Cyclic Redundancy Check (CRC) is computed and compared with a value stored in Flash. Any change in the Flash will cause the CRC not to match the stored value.

    +

    We support multiple calculation modes. These modes are selected by the user. User adds definitions to use these modes. Please reference definitions SL_IEC60730_CRC_DEBUG_ENABLE, SL_IEC60730_CRC_USE_SW_ENABLE, and SL_IEC60730_USE_CRC_32_ENABLE for more detail.

    +

    +Failure Risks

    +

    As electrically eraseable memories, the primary risk with Flash is losing charge. Normal memory concerns such as stuck-at, coupling, and address faults may also occur. All these faults will be detected by a CRC across the region. Another risk is the hardware CRC module operating incorrectly. In this case, the CRC comparison will fail and sl_iec60730_safe_state() will begin.

    +

    +Software Architecture

    +

    The Invariable Memory Check (IMC) validates that the Flash memory storing the firmware and any persistent configuration information has not been corrupted. The IMC calculates a CRC across designated areas to verify their contents.

    +

    We support calculation CRC by using hardware and software. The default CRC is hardware calculation. User CAN use the SL_IEC60730_CRC_USE_SW_ENABLE definition in case using CRC software.

    +

    With case CRC software is chosen, the default is calculate CRC-table in initialization process. User CAN use the SL_IEC60730_SW_CRC_TABLE_ENABLE definition in case using pre-defined table.

    +

    We support both CRC-16 and CRC-32 mode. With CRC-16, the CRC engine is configured to use the CRC-16/XMODEM polynominal 0x1021. With CRC-32, the CRC engine is configured to use the CRC-32 polynominal 0x04C11DB7. The default is CRC-16 mode. In case using CRC-32, user SHOULD enable define the SL_IEC60730_USE_CRC_32_ENABLE definition.

    +

    We also provide scripts named sl_iec60730_call_crc16.sh (for CRC-16 mode) and sl_iec60730_call_crc32.sh (for CRC-32 mode) which is used in Post Build process to calculate CRC value of the Flash and place this CRC value at the end of user code determined by address of check_sum variable. We WILL call these scripts with the common name sl_iec60730_call_crcXY. These scripts work for both GCC and IAR compiler. To use these scripts, user SHOULD install srecord that can be downloaded (.exe) file for Window OS or run command as below for Linux OS.

    +
    $sudo apt install srecord
    +

    Script sl_iec60730_call_crcXY requires the following parameters

    Parameters
    + + + + + + +
    $1Name of your project.
    $2Directory of building. This directory MUST contain *.hex file and *.map file. The *.map file MUST contains check_sum variable.
    $3Path of srecord. With Linux OS, it SHOULD be blank. With Win OS, it SHOULD be the path to install folder of srecord. For example: 'C:\srecord-1.64-win32' in Win OS.
    $4Compiler: GCC or IAR.
    $5Start address of Flash. Or multiple regions address of Flash
    +
    +
    +

    The struct sl_iec60730_imc_params_t is used to manage hardware configuration of CRC. In case using CRC software (define SL_IEC60730_CRC_USE_SW_ENABLE), you can pass NULL pointer to function use this struct.

    +

    We use a pair of variables to check intergrity. Using the following macros in case you want to work with pair of variables need to be checked intergrity. These macros are defined in sl_iec60730.h file.

    + +

    Some detail about implementing of IMC and using variables for testing purpose. These variables are also used in the test cases (TC) of the IMC module.

    +

    +

      +
    • Variable iec60730_cur_crc is variable that stores on (*.classb_ram*) section. This variable is CRC calculated value after each function call sl_iec60730_imc_bist. That means this value will be accumulated for each step of BIST. After checking all Flash regions the user wants to check, the final value of iec60730_cur_crc under normal conditions, no exception SHOULD be equal to the value stored in Flash.
      • +
    +

      +
    • Variable iec60730_run_crc is variable that stores on (*.classb_ram*) section. This pointer points to the start address region of the testing process. In case iec60730_run_crc is less than the end address region, every time function sl_iec60730_imc_bist&nbsp;is invoked, the value of iec60730_run_crc increases by SL_IEC60730_FLASH_BLOCK_WORDS. Otherwise, compare the current number of regions calculated with the number of areas the user wants to check. If smaller, continue to calculate the next region. Otherwise, calculate iec60730_cur_crc compare it with the value of iec60730_ref_crc or the value stored in SL_IEC60730_REF_CRC.
      • +
    +

    To provide complete definitions of IMC modules, in SL_IEC60730_BOARD_HEADER file, user SHOULD pay attention to the SL_IEC60730_ROM_START definition. The STEPS_NUMBER, SL_IEC60730_ROM_SIZE_INWORDS, and SL_IEC60730_FLASH_BLOCK_WORDS definitions SHOULD use our default definitions. The SL_IEC60730_FLASH_BLOCK, SL_IEC60730_ROM_END, and SL_IEC60730_REF_CRC definitions can be redefined by the user but SHOULD not be recommended unless the user has knowledge of linker and Flash configuration.

    +

    Figure 1 describes a Flash with multiple applications on that. These applications are named Application 1, Application 2, ..., Application N, and Application (N+1). Where Application N is a main application that uses the IEC60730 library.

    +

    + +
    +Figure 1 Example of calculating CRC
    +

    The SL_IEC60730_ROM_START definition can be placed anywhere that guarantees the description of SL_IEC60730_ROM_START. As you can see in Figure 1, it is possible that SL_IEC60730_ROM_START is either SL_IEC60730_ROM_START (1) or SL_IEC60730_ROM_START (N).

    +

    The SL_IEC60730_ROM_END definition as described at the address of the variable check_sum. As the linker files is used in our example will be at address the end of Application (N). The CRC calculation will go from address SL_IEC60730_ROM_START to SL_IEC60730_ROM_END.

    +

    With SL_IEC60730_ROM_START (1) we calculate CRC (1) and with SL_IEC60730_ROM_START (N) we calculate CRC (N). The CRC value is calculated and placed at the location of the variable check_sum. Calculating and placing are implemented by script sl_iec60730_call_crcXY.

    +

    In this example you see that Application (N + 1) is an application that does not use the IEC60730 library. Our reference solutions DO NOT support customizing check_sum anywhere in Flash. Therefore, the CRC calculation WILL not cover the Flash area of Application (N + 1).

    +

    In case the user edits their linker to let the check_sum variable go to any location (of course larger than SL_IEC60730_ROM_START), the IMC modules WILL still work normally. For example, the user adjust the address of check_sum to the end address of Flash of Application (N + 1), then the CRC calculation WILL completely cover Application (N + 1).

    +

    Function sl_iec60730_imc_post() checks for all the invariable memory areas have been configured.

    +

    On BIST, partial memory sections are tested to keep overall BIST test time reasonable. Global variables store the current location being tested and other information. Each call to sl_iec60730_imc_bist() it checks SL_IEC60730_INVAR_BLOCKS_PER_BIST. After the calculation is finished, the CRC does not match the expected value, SL_IEC60730_TEST_FAILED is returned. If it does match, the global variables are configured for the next CRC entry. If all areas are complete, SL_IEC60730_TEST_PASSED is returned. If all areas are not complete, SL_IEC60730_TEST_IN_PROGRESS is returned.

    +

    + +
    +Figure 2 Flow chart of Invariable Memory Check BIST&POST
    +

    Macro Definition Documentation

    + +

    ◆ sl_iec60730_crc_t

    + +
    +
    + + + + +
    #define sl_iec60730_crc_t
    +
    +

    Support for cleaner code.

    + +
    +
    + +

    ◆ SL_IEC60730_CRC_USE_SW_ENABLE

    + +
    +
    + + + + +
    #define SL_IEC60730_CRC_USE_SW_ENABLE   0
    +
    +

    The library support both hardware and software CRC. Use this definition in case the user use software CRC. The default hardware is used.

    + +
    +
    + +

    ◆ SL_IEC60730_DEFAULT_GPRC

    + +
    +
    + + + + +
    #define SL_IEC60730_DEFAULT_GPRC
    +
    +

    This macro is the default of GPCRC Register.

    + +
    +
    + +

    ◆ SL_IEC60730_FLASH_BLOCK

    + +
    +
    + + + + +
    #define SL_IEC60730_FLASH_BLOCK   64
    +
    +

    The value of this definition SHOULD be a power of two. The minimal value SHOULD be 4 and maximum value SHOULD be the alignment value that is defined in linker (GCC compiler) or in configuration of IAR. Our example use alignment 64 for check_sum variable. So that in our example the SL_IEC60730_FLASH_BLOCK definition is 64. User can refer to our example linker on how to provide check_sum variable with alignment 64.

    + +
    +
    + +

    ◆ SL_IEC60730_FLASH_BLOCK_WORDS

    + +
    +
    + + + + +
    #define SL_IEC60730_FLASH_BLOCK_WORDS   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS / STEPS_NUMBER))
    +
    +

    The SL_IEC60730_FLASH_BLOCK_WORDS definitionn WILL be defined base on SL_IEC60730_ROM_SIZE_INWORDS and STEPS_NUMBER definitions. User SHOULD not change it.

    + +
    +
    + +

    ◆ SL_IEC60730_FLASH_BLOCK_WORDS_TEST

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define SL_IEC60730_FLASH_BLOCK_WORDS_TEST( start,
     end 
    )   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) / STEPS_NUMBER_TEST(start, end)))
    +
    +

    The SL_IEC60730_FLASH_BLOCK_WORDS_TEST definitionn WILL be defined base on SL_IEC60730_ROM_SIZE_INWORDS_TEST and STEPS_NUMBER_TEST definitions. User SHOULD not change it.

    + +
    +
    + +

    ◆ SL_IEC60730_IMC_BIST_ENTER_ATOMIC

    + +
    +
    + + + + + + + +
    #define SL_IEC60730_IMC_BIST_ENTER_ATOMIC()
    +
    +Value:
    CORE_DECLARE_IRQ_STATE; \
    +
    CORE_ENTER_ATOMIC()
    +
    +

    Enter ATOMIC section of IMC Bist.

    + +
    +
    + +

    ◆ SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE

    + +
    +
    + + + + +
    #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE
    +
    +

    This macro is the initial value used for CRC calculations. User DOES NOT change this value

      +
    • CRC-16: 0x0000 (SW) CRC-32: 0xFFFFFFFFuL (SW)
      • +
    • CRC-16: 0xFFFF (HW) CRC-32: 0xFFFFFFFFuL (HW)
      • +
    + +
    +
    + +

    ◆ SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT

    + +
    +
    + + + + +
    #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT
    +
    +

    This macro is the expected CRC value with input buffer that equal to "123456789" and init value CRC is 0x0000 (CRC16) or 0xFFFFFFFF (CRC32) . These value are only used in development phase. User DOES NOT take care this definition.

      +
    • CRC-16: 0x31C3 CRC-32: 0xCBF43926
      • +
    + +
    +
    + +

    ◆ SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST

    + +
    +
    + + + + +
    #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST   "123456789"
    +
    +

    This macro is the sample test buffer used for testing CRC algorithm. This value is used in development phase. User DOES NOT take care this definition.

    + +
    +
    + +

    ◆ SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT

    + +
    +
    + + + + +
    #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT
    +
    +

    This macro is the default value of struct sl_iec60730_update_crc_params_t. User DOES NOT change this value

    + +
    +
    + +

    ◆ SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT

    + +
    +
    + + + + +
    #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT
    +
    +

    This macro is the value that will XOR with calculated CRC value to get CRC output value. User DOES NOT change this value

      +
    • CRC-16: 0x0000 (SW) CRC-32: 0xFFFFFFFFuL (SW)
      • +
    • CRC-16: 0x0000 (HW) CRC-32: 0xFFFFFFFFuL (HW)
      • +
    + +
    +
    + +

    ◆ SL_IEC60730_IMC_INIT_DEFAULT

    + +
    +
    + + + + +
    #define SL_IEC60730_IMC_INIT_DEFAULT
    +
    +

    This macro is the default value of struct #CRC_INIT_TypeDef. In our library, The #CRC_INIT_TypeDef struct WILL be #GPCRC_Init_TypeDef struct, a struct is defined for CRC by Silicon Labs.

    + +
    +
    + +

    ◆ SL_IEC60730_IMC_INIT_VALUE

    + +
    +
    + + + + +
    #define SL_IEC60730_IMC_INIT_VALUE
    +
    +

    This macro is the initial value used for CRC calculations.

    + +
    +
    + +

    ◆ SL_IEC60730_IMC_POST_ENTER_ATOMIC

    + +
    +
    + + + + + + + +
    #define SL_IEC60730_IMC_POST_ENTER_ATOMIC()
    +
    +Value:
    CORE_DECLARE_IRQ_STATE; \
    +
    CORE_ENTER_ATOMIC()
    +
    +

    Enter ATOMIC section of IMC Post.

    + +
    +
    + +

    ◆ SL_IEC60730_IMC_XOROUTPUT

    + +
    +
    + + + + +
    #define SL_IEC60730_IMC_XOROUTPUT
    +
    +

    This macro is the value that will XOR with calculated CRC value to get CRC output value.

    + +
    +
    + +

    ◆ SL_IEC60730_INVAR_BLOCKS_PER_BIST

    + +
    +
    + + + + +
    #define SL_IEC60730_INVAR_BLOCKS_PER_BIST
    +
    +

    The SL_IEC60730_INVAR_BLOCKS_PER_BIST desribles maximum number of loops that perform the CRC calculation each time the sl_iec60730_imc_bist is invoked. We provide default value for this definition in sl_iec60730.h file.

    + +
    +
    + +

    ◆ SL_IEC60730_REF_CRC

    + +
    +
    + + + + +
    #define SL_IEC60730_REF_CRC   (check_sum)
    +
    +

    The SL_IEC60730_REF_CRC definition describes variable that address of this variable store CRC value that is calculated by sl_iec60730_call_crcXY in Post Build. We use check_sum so in our example SL_IEC60730_REF_CRC definition is check_sum.

    + +
    +
    + +

    ◆ SL_IEC60730_ROM_END

    + +
    +
    + + + + +
    #define SL_IEC60730_ROM_END   ((uint32_t *) (&check_sum))
    +
    +

    The SL_IEC60730_ROM_END definition describes the end address of Flash. It is the address of check_sum variables. In this version, users SHOULD not change this definition. Refer to the example in invariable_memory_check_example_flowchart, to better understand the SL_IEC60730_ROM_START, and SL_IEC60730_ROM_END definitions.

    + +
    +
    + +

    ◆ SL_IEC60730_ROM_SIZE

    + +
    +
    + + + + +
    #define SL_IEC60730_ROM_SIZE   ((uint32_t) SL_IEC60730_ROM_END - (uint32_t) SL_IEC60730_ROM_START)
    +
    +

    The SL_IEC60730_ROM_SIZE definition describes the size of Flash calculated CRC value. This calculation based on SL_IEC60730_ROM_END, and SL_IEC60730_ROM_START definitions.

    + +
    +
    + +

    ◆ SL_IEC60730_ROM_SIZE_INWORDS

    + +
    +
    + + + + +
    #define SL_IEC60730_ROM_SIZE_INWORDS   ((uint32_t) SL_IEC60730_ROM_SIZE / 4U)
    +
    +

    The SL_IEC60730_ROM_SIZE_INWORDS definitionn WILL be defined base on SL_IEC60730_ROM_SIZE definition. User SHOULD not change it.

    + +
    +
    + +

    ◆ SL_IEC60730_ROM_SIZE_INWORDS_TEST

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define SL_IEC60730_ROM_SIZE_INWORDS_TEST( start,
     end 
    )   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / 4U)
    +
    +

    The SL_IEC60730_ROM_SIZE_INWORDS_TEST definitionn WILL be defined base on SL_IEC60730_ROM_SIZE_TEST definition. User SHOULD not change it.

    + +
    +
    + +

    ◆ SL_IEC60730_ROM_SIZE_TEST

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define SL_IEC60730_ROM_SIZE_TEST( start,
     end 
    )   ((uint32_t) end - (uint32_t) start)
    +
    +

    The SL_IEC60730_ROM_SIZE_TEST definition describes the size of region Flash calculated CRC value. This calculation based on #end address, and #start address region is transmitted. definitions.

    + +
    +
    + +

    ◆ SL_IEC60730_ROM_START

    + +
    +
    + + + + +
    #define SL_IEC60730_ROM_START   ((uint32_t *) (&flash_start))
    +
    +

    The SL_IEC60730_ROM_START definition describes the start address of Flash for CRC calculation. This definition MUST be alignment of SL_IEC60730_FLASH_BLOCK and can be changed by user so that the value DOES NOT exceed the end address of Flash (the SL_IEC60730_ROM_END definition). Otherwise, sl_iec60730_imc_post and sl_iec60730_imc_bist return SL_IEC60730_TEST_FAILED. The default value of the SL_IEC60730_ROM_START can be found in sl_iec60730_board.h file.

    +

    In case you change value of this definition then you SHOULD change the 5th parameter of the script sl_iec60730_call_crcXY when running the Post Build.

    +

    In our example, we use the variable flash_start provided by the linker file to simply define the start address of Flash. User can redefine SL_IEC60730_ROM_START as follows.

    #define SL_IEC60730_ROM_START ((uint32_t *)(&flash_start))
    +
    +
    +
    + +

    ◆ SL_IEC60730_SW_CRC_TABLE_ENABLE

    + +
    +
    + + + + +
    #define SL_IEC60730_SW_CRC_TABLE_ENABLE   0
    +
    +

    If using SL_IEC60730_CRC_USE_SW_ENABLE definition then the SL_IEC60730_SW_CRC_TABLE_ENABLE definition is used for using pre-defined table for calculating.

    + +
    +
    + +

    ◆ SL_IEC60730_USE_CRC_32_ENABLE

    + +
    +
    + + + + +
    #define SL_IEC60730_USE_CRC_32_ENABLE   0
    +
    +

    Use this definition in case the user use CRC-32 for calculating the CRC value. The default CRC-16 is used.

    + +
    +
    + +

    ◆ STEPS_NUMBER

    + +
    +
    + + + + +
    #define STEPS_NUMBER   ((uint32_t) SL_IEC60730_ROM_SIZE / SL_IEC60730_FLASH_BLOCK)
    +
    +

    The STEPS_NUMBER definitionn WILL be defined base on SL_IEC60730_ROM_SIZE and SL_IEC60730_FLASH_BLOCK definition. User SHOULD not change it.

    + +
    +
    + +

    ◆ STEPS_NUMBER_TEST

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define STEPS_NUMBER_TEST( start,
     end 
    )   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / SL_IEC60730_FLASH_BLOCK)
    +
    +

    The STEPS_NUMBER_TEST definitionn WILL be defined base on SL_IEC60730_ROM_SIZE_TEST and SL_IEC60730_FLASH_BLOCK definition. User SHOULD not change it.

    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ anonymous enum

    + +
    +
    + + + + +
    anonymous enum
    +
    + +

    The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer.

    + + + + +
    Enumerator
    SL_IEC60730_IMC_DATA_READ 

    use function GPCRC_DataRead to read CRC

    +
    SL_IEC60730_IMC_DATA_READ_BIT_REVERSED 

    use function GPCRC_DataReadBitReversed to read CRC

    +
    SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED 

    use function GPCRC_DataReadByteReversed to read CRC

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ sl_iec60730_imc_bist()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_imc_bist (void )
    +
    +

    public IEC60730 Invariable Memory Check BIST

    +
    Returns
    sl_iec60730_test_result_t. +
    +

    Performs a CRC check across all defined memory areas. For details how sl_iec60730_imc_bist work, please refer to Software Architecture

    +

    Requires sl_iec60730_imc_init to be called first to setup global variables.

    + +
    +
    + +

    ◆ sl_iec60730_imc_init()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void sl_iec60730_imc_init (sl_iec60730_imc_params_t * params,
    sl_iec60730_imc_test_multiple_regions_t * test_config 
    )
    +
    +

    public IEC60730 Invariable Memory Check (IMC) Init

    +
    Parameters
    + + + +
    paramsinput parameter hardware configuration of CRC
    test_configinput parameter of region and number of regions user want to test
    +
    +
    +
    Returns
    None
    +

    Performs a initialization of global variables and hardware configuration in case hardware support.

    + +
    +
    + +

    ◆ sl_iec60730_imc_post()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_imc_post (void )
    +
    +

    public IEC60730 Invariable Memory Check POST

    +
    Returns
    sl_iec60730_test_result_t. +
    +

    Performs a CRC check across all defined memory areas.

    + +
    +
    + +

    ◆ sl_iec60730_update_crc_with_data_buffer()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_update_crc_with_data_buffer (sl_iec60730_update_crc_params_t * params,
    sl_iec60730_crc_t * crc,
    uint8_t * buffer,
    uint32_t size 
    )
    +
    +

    public IEC60730 Update CRC git pull with Data Buffer

    +
    Parameters
    + + + + + +
    paramsinput parameter hardware configuration of CRC
    crcThe CRC to be updated. The initial value of crc is also initial value of CRC calculation.
    bufferA contiguous array of 1-byte values to be used to update the CRC.
    sizeThe number of bytes stored in the buffer.
    +
    +
    +
    Returns
    sl_iec60730_test_result_t. +
    +

    This routine takes a CRC and updates it on a pointer crc using a buffer of one or more bytes of data. For details on the CRC polynomial used, see Hardware Architecture

    + +
    +
    +

    Variable Documentation

    + +

    ◆ check_sum

    + +
    +
    + + + + +
    sl_iec60730_crc_t check_sum
    +
    +

    The end address of Flash is specified by the address of the check_sum variable. This variable is provided by linker in GCC or generated by configurations in IAR.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html b/site/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html new file mode 100644 index 00000000..b0305f73 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION.html @@ -0,0 +1,130 @@ + + + + + + + +Document API IEC60730 Library: Invariable Memory Automated Verification Tests + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Classes | +Variables
    +
    +
    Invariable Memory Automated Verification Tests
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730
    +
    +
    + +

    Python script for the IEC60730 Invariable Memory plausibility verification tests. +More...

    + + + + + +

    +Classes

    class  integration_test_iec60730_invariable_memory.iec60730_imc
     IEC60730 Invariable Memory Plausibility Verification Tests. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    +bool integration_test_iec60730_invariable_memory.is_crc32 = False
     Allows testing with CRC32.
     
    + integration_test_iec60730_invariable_memory.chip_name = os.getenv('CHIP')
     Chip name run test.
     
    + integration_test_iec60730_invariable_memory.lst_file_path = os.getenv('LST_PATH')
     Path to file *.lst.
     
    + integration_test_iec60730_invariable_memory.adapter_serial_no = os.getenv('ADAPTER_SN')
     serialno of device
     
    + integration_test_iec60730_invariable_memory.lib_path = os.getenv('JLINK_PATH')
     Path to jlink library.
     
    + integration_test_iec60730_invariable_memory.cal_crc_32 = os.getenv('INTEGRATION_TEST_ENABLE_CAL_CRC_32')
     Enable test calculation with CRC32.
     
    + integration_test_iec60730_invariable_memory.line = sys.argv.pop()
     Number of arguments passed into the script file.
     
    + integration_test_iec60730_invariable_memory.compiler = line
     compiler creates the file *.lst
     
    +

    Detailed Description

    +

    Python script for the IEC60730 Invariable Memory plausibility verification tests.

    +

    For details on the tests, see iec60730_invariable_memory.iec60730_invariable_memory.

    +

    +Test Results

    +

    EFR32 Device| Test Results ---------—|----------—

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..3baa2d64 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__INVARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,392 @@ + + + + + + + +Document API IEC60730 Library: Invariable Memory Verification Unit Tests + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Functions
    +
    +
    Invariable Memory Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate functions in invariable memory module. +More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    uint32_t * unit_test_iec60730_imc_mock_init_run_crc (void)
     
    sl_iec60730_test_result_t unit_test_mock_check_integrity (void)
     
    bool unit_test_iec60730_imc_mock_enable_gpcrc (void)
     
    bool unit_test_iec60730_imc_mock_sw_enable_cal_crc (void)
     
    void test_sl_iec60730_imc_init_param_null (void)
     
    void test_sl_iec60730_imc_post_pass_check (void)
     
    void test_sl_iec60730_imc_post_fail_check (void)
     
    void test_sl_iec60730_imc_bist_pass_all_check (void)
     
    void test_sl_iec60730_imc_bist_fail_check_integrity (void)
     
    void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address (void)
     
    void test_sl_iec60730_imc_bist_fail_compare_crc (void)
     
    void test_sl_iec60730_update_crc_with_data_buffer_params_null (void)
     
    void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate functions in invariable memory module.

    +

    IEC60730 Invariable Memory Unit Tests

    +

    These test cases run unit tests to check the operation of the functions in invariable memory module.

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_sl_iec60730_imc_bist_fail_check_integrity()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_imc_bist_fail_check_integrity (void )
    +
    +

    Public Check sl_iec60730_imc_bist() operate

    +
    Returns
    None.
    +

    If the check integrity of the pointer fails, the function sl_iec60730_imc_bist() returns SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_imc_bist_fail_compare_crc()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_imc_bist_fail_compare_crc (void )
    +
    +

    Public Check sl_iec60730_imc_bist() operate

    +
    Returns
    None.
    +

    In the case of SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the value crc calculated value is not equal value calculated from sl_iec60730_imc_post(), or in the case of SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is not equal to the value stored in check_sum. The function sl_iec60730_imc_bist() returns SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address (void )
    +
    +

    Public Check sl_iec60730_imc_bist() operate

    +
    Returns
    None.
    +

    If iec60730_run_crc init greater than rom end address before iec60730_cur_crc is calculated. Then the function sl_iec60730_imc_bist() returns SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_imc_bist_pass_all_check()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_imc_bist_pass_all_check (void )
    +
    +

    Public Check sl_iec60730_imc_bist() operate

    +
    Returns
    None.
    +

    In the case of SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the value crc calculated value is equal value calculated from sl_iec60730_imc_post(), or in the case of SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is equal to the value stored in check_sum. The function returns# SL_IEC60730_TEST_PASSED.

    +

    Public Check sl_iec60730_imc_bist() operate

    +
    Returns
    None.
    +

    In the case of SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the value crc calculated value is equal value calculated from sl_iec60730_imc_post(), or in the case of SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is equal to the value stored in check_sum. The function sl_iec60730_imc_bist() returns SL_IEC60730_TEST_PASSED.

    + +
    +
    + +

    ◆ test_sl_iec60730_imc_init_param_null()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_imc_init_param_null (void )
    +
    +

    Public Check sl_iec60730_imc_init() operate

    +
    Returns
    None.
    +

    If the passed parameter value is NULL, the sl_iec60730_imc_init() function will fail. When calling the function sl_iec60730_imc_post(), the value will be returned SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_imc_post_fail_check()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_imc_post_fail_check (void )
    +
    +

    Public Check sl_iec60730_imc_post() operate

    +
    Returns
    None.
    +

    In the case of SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the initial crc calculated value is 0, or in the case of SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is not equal to the value stored in check_sum. The function returns SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_imc_post_pass_check()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_imc_post_pass_check (void )
    +
    +

    Public Check sl_iec60730_imc_post() operate

    +
    Returns
    None.
    +

    If the passed parameter value is valid, the sl_iec60730_imc_init() function will success. When calling the function sl_iec60730_imc_post(), the value will be returned SL_IEC60730_TEST_PASSED.

    + +
    +
    + +

    ◆ test_sl_iec60730_update_crc_with_data_buffer_calculation_crc()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc (void )
    +
    +

    Public Check sl_iec60730_update_crc_with_data_buffer() operate

    +
    Returns
    None.
    +

    Calculate the CRC value of the input string, check whether the returned CRC value is correct or not.

    + +
    +
    + +

    ◆ test_sl_iec60730_update_crc_with_data_buffer_params_null()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_update_crc_with_data_buffer_params_null (void )
    +
    +

    Public Check sl_iec60730_update_crc_with_data_buffer() operate

    +
    Returns
    None.
    +

    If the passed parameter value is NULL, the sl_iec60730_update_crc_with_data_buffer() function will fail. returns SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ unit_test_iec60730_imc_mock_enable_gpcrc()

    + +
    +
    + + + + + + + + +
    bool unit_test_iec60730_imc_mock_enable_gpcrc (void )
    +
    +

    Public Function mock enable gpcrc hardware operate.

    +
    Returns
    boolean.
    + +
    +
    + +

    ◆ unit_test_iec60730_imc_mock_init_run_crc()

    + +
    +
    + + + + + + + + +
    uint32_t* unit_test_iec60730_imc_mock_init_run_crc (void )
    +
    +

    Public Function mock returns the starting address value of the ram test area

    +
    Returns
    pointer uint32_t*.
    + +
    +
    + +

    ◆ unit_test_iec60730_imc_mock_sw_enable_cal_crc()

    + +
    +
    + + + + + + + + +
    bool unit_test_iec60730_imc_mock_sw_enable_cal_crc (void )
    +
    +

    Public Function mock enable calculate crc by software.

    +
    Returns
    boolean.
    + +
    +
    + +

    ◆ unit_test_mock_check_integrity()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t unit_test_mock_check_integrity (void )
    +
    +

    Public Function simulates the result of variable value integrity check.

    +
    Returns
    boolean.
    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__IRQ__TEST.html b/site/document_api_iec60730_library/group__IEC60730__IRQ__TEST.html new file mode 100644 index 00000000..05603271 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__IRQ__TEST.html @@ -0,0 +1,271 @@ + + + + + + + +Document API IEC60730 Library: IRQ Check + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Classes | +Macros | +Functions
    +
    +
    IRQ Check
    EFR32 IEC60730 Library
    +
    +
    + +

    Verifies interrupt frequency is within bounds. +More...

    + + + + + + + + +

    +Classes

    struct  sl_iec60730_irq_execution_bounds_t
     
    struct  sl_iec60730_irq_fail_t
     
    struct  sl_iec60730_irq_cfg_t
     
    + + + + + + + + + +

    +Macros

    #define IEC60730_MAX_IRQ_CHECK   32
     
    +#define SL_IEC60730_IRQ_TYPE_VARIABLE   uint8_t
     Data type for iec60730_IRQExecCount variables.
     
    +#define SL_IEC60730_IRQ_STATUS_ENABLE   0
     Enable using sl_iec60730_get_irq_index_failed() function to get the value of failed irqs.
     
    + + + + + + + + + + + +

    +Functions

    void sl_iec60730_irq_reset_fail_result (void)
     
    sl_iec60730_irq_fail_t * sl_iec60730_get_irq_index_failed (void)
     
    void sl_iec60730_irq_init (sl_iec60730_irq_cfg_t *irq_cfg_ptr)
     
    void sl_iec60730_irq_reset_counter (void)
     
    void sl_iec60730_irq_check (void)
     
    +

    Detailed Description

    +

    Verifies interrupt frequency is within bounds.

    +

    The interrupt plausibility test checks that enabled interrupts are executing at a frequency that is within expected minimum and maximum bounds every test timer period.

    +

    OEM firmware is responsible for setting expected minimum and maximum bounds for each enabled interrupt in the oem_irq_freq_bounds structure. The OEM is also responsible for incrementing the element in the oem_irq_exec_count array inside each enabled interrupt. In sl_iec60730_irq_check(), which executes as part of the test timer-driven tests of the BIST, this counter array is compared with the defined bounds to determine whether each interrupt is operating within safe parameters.

    +

    +Hardware Architecture

    +

    Most hardware-implemented peripherals in Silicon Labs EFR32 devices offer the ability to vector to an interrupt service routine in order to quickly respond peripheral-related events and state updates.

    +

    In order to vector to an interrupt from executing foreground code, hardware pushes the program counter to the stack and vectors to a hardware-defined entry in a vector table stored in non-volatile memory in a region of Flash. The code of the interrupt service routine is either stored directly within this table entry, or stored elsewhere in memory and accessed through a jump instruction placed in the vector table, depending on the size of the interrupt service routine.

    +

    Once the function body of the interrupt service routine has completed executing, the program counter is pop from the stack and returns to foreground code to continue execution.

    +

    Each interrupt has a flag in a register that must be cleared inside the interrupt service routine function to signal that the interrupt has been processed in firmware. Failure to clear this flag inside the function body will result in the hardware immediately vectoring back to the interrupt.

    +

    +Failure Risks

    +

    It is the OEM's responsibility to accurately estimate the frequency of each enabled interrupt in a firmware project. For interrupts that are asynchronous and may not execute at all within a test timer period, the lower bounds for the interrupt should be set to 0.

    +

    It is also the OEM's responsibility to increment values in oem_irq_exec_count once and only once per interrupt execution. Failure to include this incrementing command will result in an interrupt that appears to be executing below minimum defined bounds, which will force safe state entry.

    +

    The OEM should also be mindful of all hardware-related constraints of each interrupt. Failure to clear an interrupt flag inside an interrupt service routine will cause the routine to execute repeatedly, which will increment an oem_irq_exec_count entry beyond upper bounds and cause a safe state entry.

    +

    The OEM must also perform a bounds check on the element in oem_irq_exec_count being incremented to ensure that the counter does not exceed the upper bounds defined by its data type and overflow back to 0. Failure to perform this bounds check could have the effect of creating a passing IRQ plausibility test when the interrupt is actually running outside of defined limits.

    +

    +Software Architecture

    +

    The interrupt plausibility test function relies on an array of counters called oem_irq_exec_count, stored in volatile memory and an array of struct sl_iec60730_irq_execution_bounds_t found in non-volatile memory and called oem_irq_freq_bounds. OEM firmware increments bytes in oem_irq_exec_count during execution of each enabled interrupt service routine. When the test timer interrupt occurs, sl_iec60730_irq_check() executes. Inside this function, firmware compares the count values to the bound values, and sets iec60730_safety_check by called function sl_iec60730_safety_check_error_occur to SL_IEC60730_INTERRUPT_FAIL if a count exceeds either the minimum or maximum bounds. The next execution of the BIST routine will detect the SL_IEC60730_TEST_FAILED state and enter safe state. A flowchart of this functionality is shown in Figure 1 .

    +

    For more information on configuration of the test timer, please see System Clock Check.

    +

    + +
    +Figure 1 Flow chart of interrupt plausibility check
    +

    Macro Definition Documentation

    + +

    ◆ IEC60730_MAX_IRQ_CHECK

    + +
    +
    + + + + +
    #define IEC60730_MAX_IRQ_CHECK   32
    +
    +

    The maximum number of interrupted users that can be used for testing. The param passed to the init function sl_iec60730_irq_init() must have a size value smaller than this value

    + +
    +
    +

    Function Documentation

    + +

    ◆ sl_iec60730_get_irq_index_failed()

    + +
    +
    + + + + + + + + +
    sl_iec60730_irq_fail_t* sl_iec60730_get_irq_index_failed (void )
    +
    +

    public IEC60730 Get The Location Of The Failed IRQ

    +
    Returns
    pointer type sl_iec60730_irq_fail_t point to variable containing the errors that occurred and the number of errors
    +

    This function return a iec60730_irq_fail_result. That variable contains the number of failed irq checks and stores the failed interrupt value in bits.

    + +
    +
    + +

    ◆ sl_iec60730_irq_check()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_irq_check (void )
    +
    +

    public IEC60730 Interrupt Plausibility Check

    +
    Returns
    None.
    +

    This function compares each entry in oem_irq_exec_count with its corresponding bounds defined in oem_irq_freq_bounds. If the entry is found to exceed the defined bounds, iec60730_safety_check is set to SL_IEC60730_INTERRUPT_FAIL. Otherwise no action is taken. The function ends by setting IEC60730_INTERRUPT_COMPLETE.

    + +
    +
    + +

    ◆ sl_iec60730_irq_init()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_irq_init (sl_iec60730_irq_cfg_t * irq_cfg_ptr)
    +
    +

    public IEC60730 Interrupt Init

    +
    Parameters
    + + +
    irq_cfg_ptrinput pointer point to value config by user
    +
    +
    +
    Returns
    None.
    +

    This function set a pointer point to address oem_irq_freq_bounds min and max and oem_irq_exec_count. To initialize test values ​​for the sl_iec60730_irq_check() function.

    + +
    +
    + +

    ◆ sl_iec60730_irq_reset_counter()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_irq_reset_counter (void )
    +
    +

    public IEC60730 Interrupt Reset Counter

    +
    Returns
    None.
    +

    This function reset counter oem_irq_exec_count to 0

    + +
    +
    + +

    ◆ sl_iec60730_irq_reset_fail_result()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_irq_reset_fail_result (void )
    +
    +

    public IEC60730 Reset IRQ Failed Results

    +
    Returns
    None.
    +

    This function reset local counter irq fail iec60730_irq_fail_result to 0

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION.html b/site/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION.html new file mode 100644 index 00000000..12862183 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION.html @@ -0,0 +1,129 @@ + + + + + + + +Document API IEC60730 Library: IRQ Automated Verification Tests + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Classes | +Functions | +Variables
    +
    +
    IRQ Automated Verification Tests
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730
    +
    +
    + +

    Python script for the IEC60730 IRQ plausibility verification tests. +More...

    + + + + + +

    +Classes

    class  integration_test_iec60730_irq.iec60730_irq
     IEC60730 IRQ Plausibility Verification Tests. More...
     
    + + + +

    +Functions

    +bytes integration_test_iec60730_irq.int_to_bytes (int number)
     
    + + + + + + + + + + + + + + + + + + + +

    +Variables

    + integration_test_iec60730_irq.chip_name = os.getenv('CHIP')
     Chip name run test.
     
    + integration_test_iec60730_irq.lst_file_path = os.getenv('LST_PATH')
     Path to file *.lst.
     
    + integration_test_iec60730_irq.adapter_serial_no = os.getenv('ADAPTER_SN')
     serialno of device
     
    + integration_test_iec60730_irq.lib_path = os.getenv('JLINK_PATH')
     Path to jlink library.
     
    + integration_test_iec60730_irq.line = sys.argv.pop()
     Number of arguments passed into the script file.
     
    + integration_test_iec60730_irq.compiler = line
     compiler creates the file *.lst
     
    +

    Detailed Description

    +

    Python script for the IEC60730 IRQ plausibility verification tests.

    +

    For details on the tests, see iec60730_irq.iec60730_irq.

    +

    +Test Results

    +

    EFR32 Device| Test Results ---------—|----------—

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..aefd8abe --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__IRQ__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,255 @@ + + + + + + + +Document API IEC60730 Library: IRQ Verification Unit Tests + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Functions
    +
    +
    IRQ Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate functions in irq module. +More...

    + + + + + + + + + + + + + + + + +

    +Functions

    void test_sl_iec60730_irq_init_param_null (void)
     
    void test_sl_iec60730_irq_init_param_size_greater_than_max_irq (void)
     
    void test_sl_iec60730_irq_check_count_in_bound (void)
     
    void test_sl_iec60730_irq_check_count_out_bound (void)
     
    void test_sl_iec60730_irq_reset_counter (void)
     
    void test_sl_iec60730_irq_fail_occur (void)
     
    void test_sl_iec60730_irq_reset_fail_result (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate functions in irq module.

    +

    IEC60730 IRQ Unit Tests

    +

    These test cases run unit tests to check the operation of the functions in irq module.

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_sl_iec60730_irq_check_count_in_bound()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_irq_check_count_in_bound (void )
    +
    +

    Public Check sl_iec60730_irq_check() operate

    +
    Returns
    None.
    +

    After successful initialization, after calling function. If the test element has an irq_count between the irq_bounds max and min values, function sl_iec60730_safe_state() is not called.

    + +
    +
    + +

    ◆ test_sl_iec60730_irq_check_count_out_bound()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_irq_check_count_out_bound (void )
    +
    +

    Public Check sl_iec60730_irq_check() operate

    +
    Returns
    None.
    +

    After successful initialization, after calling function. If the test element has an irq_count out of range the irq_bounds max and min values, function sl_iec60730_safe_state() is called.

    + +
    +
    + +

    ◆ test_sl_iec60730_irq_fail_occur()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_irq_fail_occur (void )
    +
    +

    Public Check sl_iec60730_irq_fail_occur() operate

    +
    Returns
    None.
    +

    Check if the value of wrong interrupt count and wrong interrupt index passed into the function is equal to the value received from function sl_iec60730_get_irq_index_failed(), then test passes.

    + +
    +
    + +

    ◆ test_sl_iec60730_irq_init_param_null()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_irq_init_param_null (void )
    +
    +

    Public Check sl_iec60730_irq_init() operate

    +
    Returns
    None.
    +

    If the passed param is NULL after call sl_iec60730_irq_check(), function sl_iec60730_safe_state() will be called (variable local is_function_called set true).

    + +
    +
    + +

    ◆ test_sl_iec60730_irq_init_param_size_greater_than_max_irq()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_irq_init_param_size_greater_than_max_irq (void )
    +
    +

    Public Check sl_iec60730_irq_init() operate

    +
    Returns
    None.
    +

    If the param greater than IEC60730_MAX_IRQ_CHECK, function sl_iec60730_safe_state() will be called (variable local is_function_called set true).

    + +
    +
    + +

    ◆ test_sl_iec60730_irq_reset_counter()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_irq_reset_counter (void )
    +
    +

    Public Check sl_iec60730_irq_reset_counter() operate

    +
    Returns
    None.
    +

    After calling this function, check the value of the irq_count element of the config variable passed to function sl_iec60730_irq_init(). If the value is 0, the test case passes.

    + +
    +
    + +

    ◆ test_sl_iec60730_irq_reset_fail_result()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_irq_reset_fail_result (void )
    +
    +

    Public Check sl_iec60730_irq_reset_fail_result() operate

    +
    Returns
    None.
    +

    Check if the value of wrong interrupt count and wrong interrupt position received from function sl_iec60730_get_irq_index_failed() is 0 after calling sl_iec60730_irq_reset_fail_result() then test passes.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__OEM__COMM__TEST.html b/site/document_api_iec60730_library/group__IEC60730__OEM__COMM__TEST.html new file mode 100644 index 00000000..c2fb0594 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__OEM__COMM__TEST.html @@ -0,0 +1,107 @@ + + + + + + + +Document API IEC60730 Library: OEM External Communications Example using UART + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
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    + +
    +
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    + +
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    +
    +
    OEM External Communications Example using UART
    EFR32 IEC60730 Library
    +
    +
    + +

    Verifies communication channel is operating as expected. +More...

    +

    Verifies communication channel is operating as expected.

    +

    +Hardware Architecture

    +

    For communications interfaces to be IEC60730 compliant, they must meet the following conditions:

      +
    1. Provide address redundancy, transmitting the sender's unique address
      2. +
    2. CRC coverage of transmission bytes
      3. +
    3. Scheduled transmission
      4. +
    +

    Each type of hardware-implemented serial interface supported by a device must meet the three above communications requirements using a combination of hardware features and firmware-implemented support.

    +

    For I2C interfaces, the protocol requires that a transaction begin with a slave address identifying the intended recipient of the message, which meets requirement 1. Each message transferred must end with a 2-byte CRC covering all transmitted bytes. Hardware CRC generation is available on some devices and a buffer of bytes can generate a CRC using the sl_iec60730_update_crc_with_data_buffer provided, which meets requirement #2. Requirement #3 can be met by initiating a periodic transaction using the test timer allocated for the system clock plausibility check.

    +

    A SPI interface meets the requirements above in a way that is similar to the I2C interface, except that an address must be included through firmware, because the protocol and the hardware do not support a slave address inherently.

    +

    A UART interface meets requirements similar to a SPI interface, where the address must be transmitted through firmware implemented protocol.

    +

    +Failure Risks

    +

    A disruption of the serial interface signals/clocks could cause a bit of error or a timing-related issue. This will result in a CRC mismatch when the receiver of the message processes the packet and safe state entrance.

    +

    If the device sending status packets to a host gets somehow stuck in such a state where it is unable to transmit status packets, the receiver expecting periodic packets will enter a safe state after a bounded amount of time, likely governed by a bist frequency check that determines no status packets have been received within a frequency check interval. Based on the suggested configuration of the bist frequency check period, the upper limit for the time between the reception of a status packet would be 1 second. Based on the suggested configuration of the test timer, typically the status packet will be transmitted once every 100 ms.

    +

    All serial interfaces require some amount of port configuration to ensure that the correct pins are digital inputs and outputs, open drain, or push-pull. Without these requirements being met, the device will be unable to transmit and receive data packets properly, which will result in a safe state entrance by one or both of the devices communicating across a serial interface.

    +

    +Software Architecture

    +

    The library provides a support function sl_iec60730_update_crc_with_data_buffer() to generate the CRC of a buffer being transmitted. OEM firmware is responsible for interfacing with serial communication hardware to send packets that begin with address information to identify the sender and end with a 2-byte CRC.

    +

    In order to transmit a status packet, the device needs to allocate an on-chip timer, or use the test timer already allocated for the system clock plausibility check.

    +

    Devices receiving status packets rely on a bist frequency check where one requirement for the comm plausibility test to have executed successfully is the reception of a valid status packet.

    +

    Figure 1 shows the main components of both a receiver and a transmitter of a compliant serial interface. Note that received packages are processed by checking for an address and a valid CRC. Additionally, a bist frequency check determines whether status packets are being received at an acceptable rate. For transmission, all data payloads go through firmware that adds required address and CRC information. Additionally, the test timer interrupt service routine initiates a periodic transmission of a status packet.

    +
    + +
    +Figure 1 Comm plausibility check flowchart
    +

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html b/site/document_api_iec60730_library/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html new file mode 100644 index 00000000..173ad018 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__PROGRAMME__COUNTER__VERIFICATION.html @@ -0,0 +1,129 @@ + + + + + + + +Document API IEC60730 Library: Program Counter Verification Tests + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Classes | +Functions | +Variables
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    +
    Program Counter Verification Tests
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730
    +
    +
    + +

    Python script for the IEC60730 Program counter Verification tests. +More...

    + + + + + +

    +Classes

    class  integration_test_iec60730_program_counter.iec60730_programme_counter
     IEC60730 CPU Program counter Tests. More...
     
    + + + +

    +Functions

    +bytes integration_test_iec60730_program_counter.int_to_bytes (int number)
     
    + + + + + + + + + + + + + + + + + + + +

    +Variables

    + integration_test_iec60730_program_counter.chip_name = os.getenv('CHIP')
     Chip name run test.
     
    + integration_test_iec60730_program_counter.lst_file_path = os.getenv('LST_PATH')
     Path to file *.lst.
     
    + integration_test_iec60730_program_counter.adapter_serial_no = os.getenv('ADAPTER_SN')
     serialno of device
     
    + integration_test_iec60730_program_counter.lib_path = os.getenv('JLINK_PATH')
     Path to jlink library.
     
    + integration_test_iec60730_program_counter.line = sys.argv.pop()
     Number of arguments passed into the script file.
     
    + integration_test_iec60730_program_counter.compiler = line
     compiler creates the file *.lst
     
    +

    Detailed Description

    +

    Python script for the IEC60730 Program counter Verification tests.

    +

    For details on the tests, see iec60730_programme_counter.iec60730_programme_counter.

    +

    +Test Results

    +

    EFR32 Device | Test Results ----------—|----------—

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER.html b/site/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER.html new file mode 100644 index 00000000..fae660c8 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER.html @@ -0,0 +1,266 @@ + + + + + + + +Document API IEC60730 Library: Program Counter Check + + + + + + + + + +
    +
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    +
    Document API IEC60730 Library +
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    + +
    +
    +Macros | +Functions | +Variables
    +
    +
    Program Counter Check
    EFR32 IEC60730 Library
    +
    +
    + +

    Verifies all tests have completed on time. +More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    +#define IEC60730_VMC_COMPLETE   (1 << 0)
     Mask bit used for Variable Memory Checks completed.
     
    +#define IEC60730_IMC_COMPLETE   (1 << 1)
     Mask bit used for Invariable Memory Checks completed.
     
    +#define IEC60730_CPU_CLOCKS_COMPLETE   (1 << 2)
     Mask bit used for CPU Clocks Checks completed.
     
    +#define IEC60730_CPU_REGS_COMPLETE   (1 << 3)
     Mask bit used for CPU Register Checks completed.
     
    +#define IEC60730_INTERRUPT_COMPLETE   (1 << 4)
     Mask bit used for Interrupt Checks completed.
     
    +#define IEC60730_GPIO_COMPLETE   (1 << 5)
     Mask bit used for GPIO Plausibility Checks completed.
     
    +#define IEC60730_ANALOG_COMPLETE   (1 << 6)
     Mask bit used for Analog Plausibility Checks completed.
     
    +#define IEC60730_COMMS_COMPLETE   (1 << 7)
     Mask bit used for Communications Plausibility Checks completed.
     
    +#define IEC60730_OEM0_COMPLETE   (1 << 8)
     Mask bit used for OEM Check 0 completed.
     
    +#define IEC60730_OEM1_COMPLETE   (1 << 9)
     Mask bit used for OEM Check 1 completed.
     
    +#define IEC60730_OEM2_COMPLETE   (1 << 10)
     Mask bit used for OEM Check 2 completed.
     
    +#define IEC60730_OEM3_COMPLETE   (1 << 11)
     Mask bit used for OEM Check 3 completed.
     
    +#define IEC60730_OEM4_COMPLETE   (1 << 12)
     Mask bit used for OEM Check 4 completed.
     
    +#define IEC60730_OEM5_COMPLETE   (1 << 13)
     Mask bit used for OEM Check 5 completed.
     
    +#define IEC60730_OEM6_COMPLETE   (1 << 14)
     Mask bit used for OEM Check 6 completed.
     
    +#define IEC60730_OEM7_COMPLETE   (1 << 15)
     Mask bit used for OEM Check 7 completed.
     
    #define IEC60730_ALL_COMPLETE_BITS
     Mask used for checking that all bits are set. More...
     
    + + + +

    +Functions

    void sl_iec60730_program_counter_test (void)
     
    + + + +

    +Variables

    uint16_t sl_iec60730_program_counter_check
     
    +

    Detailed Description

    +

    Verifies all tests have completed on time.

    +

    The frequency of test execution must be checked to ensure that tests are being run in time.

    +

    +Hardware Architecture

    +

    The Program counter check requires that each BIST test set a bit in a bit array whenever an iteration of testing completes. The Program counter check uses the test clock timer configured in the system clock plausibility test to determine when to execute. See System Clock Check for system clock plausibility details. The Program counter test executes at 1/10 the frequency of the system clock plausibility test. Best practice recommendations and example OEM code configure the system clock plausibility test to run at 100 ms intervals, resulting in BIST frequency check intervals of 1s.

    +

    Bits within sl_iec60730_program_counter_check are set as tests pass. OEMs can determine how fast their tests are running by checking this variable. If a bit is still clear, that test has not completed.

    +

    +Suggested OEM Configuration

    +

    OEM configuration of this test is dependent on system clock plausibility configuration. Please see System Clock Check for details.

    +

    +Failure Risks

    +

    The library's BIST execution frequency test will force entry into safe state if a period of time defined by 1/10 test clock test frequency passes without all BIST tests completing their test execution. It is the OEM's responsibility to call the BIST in the main() loop with enough frequency to execute all tests within the required time period.

    +

    If the system clock test's test timer is not configured as expected, so that 1/10 test clock frequency is unexpectedly fast, the system may fall into safe state because tests have not had enough time to execute to completion.

    +

    +Software Architecture

    +

    For the IEC60730 implementation, see Figure 1

    +
    + +
    +Figure 1 Program counter check flowchart
    +

    +

    Macro Definition Documentation

    + +

    ◆ IEC60730_ALL_COMPLETE_BITS

    + +
    +
    + + + + +
    #define IEC60730_ALL_COMPLETE_BITS
    +
    +Value:
    (IEC60730_VMC_COMPLETE | IEC60730_IMC_COMPLETE \
    +
    | IEC60730_CPU_CLOCKS_COMPLETE | IEC60730_CPU_REGS_COMPLETE \
    +
    | IEC60730_INTERRUPT_COMPLETE | IEC60730_GPIO_COMPLETE \
    +
    | IEC60730_ANALOG_COMPLETE | IEC60730_COMMS_COMPLETE \
    +
    | IEC60730_OEM0_COMPLETE | IEC60730_OEM1_COMPLETE | IEC60730_OEM2_COMPLETE \
    +
    | IEC60730_OEM3_COMPLETE | IEC60730_OEM4_COMPLETE | IEC60730_OEM5_COMPLETE \
    +
    | IEC60730_OEM6_COMPLETE | IEC60730_OEM7_COMPLETE)
    +
    +

    Mask used for checking that all bits are set.

    + +
    +
    +

    Function Documentation

    + +

    ◆ sl_iec60730_program_counter_test()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_program_counter_test (void )
    +
    +

    public IEC60730 program counter test

    +

    Checks flags in sl_iec60730_program_counter_check set by each BIST test to determine if BIST is executing within a specified period.

    Returns
    sl_iec60730_test_result_t. If test fails, returns SL_IEC60730_TEST_FAILED;
    +
    +otherwise SL_IEC60730_TEST_PASSED.
    + +
    +
    +

    Variable Documentation

    + +

    ◆ sl_iec60730_program_counter_check

    + +
    +
    + + + + +
    uint16_t sl_iec60730_program_counter_check
    +
    +

    Global variable used by BIST to determine if modules are running frequently enough to meet maximum fault time.

    +

    sl_iec60730_program_counter_check equals 0 before BIST check. Each module then sets its assigned bit once it has completed testing. Before the maximum fault time, sl_iec60730_program_counter_test() verifies that the value is IEC60730_ALL_COMPLETE_BITS.

    + +
    +
    +
    +
    IEC60730_COMMS_COMPLETE
    #define IEC60730_COMMS_COMPLETE
    Mask bit used for Communications Plausibility Checks completed.
    Definition: sl_iec60730.h:346
    +
    IEC60730_CPU_REGS_COMPLETE
    #define IEC60730_CPU_REGS_COMPLETE
    Mask bit used for CPU Register Checks completed.
    Definition: sl_iec60730.h:338
    +
    IEC60730_GPIO_COMPLETE
    #define IEC60730_GPIO_COMPLETE
    Mask bit used for GPIO Plausibility Checks completed.
    Definition: sl_iec60730.h:342
    +
    IEC60730_IMC_COMPLETE
    #define IEC60730_IMC_COMPLETE
    Mask bit used for Invariable Memory Checks completed.
    Definition: sl_iec60730.h:334
    +
    IEC60730_CPU_CLOCKS_COMPLETE
    #define IEC60730_CPU_CLOCKS_COMPLETE
    Mask bit used for CPU Clocks Checks completed.
    Definition: sl_iec60730.h:336
    +
    IEC60730_OEM7_COMPLETE
    #define IEC60730_OEM7_COMPLETE
    Mask bit used for OEM Check 7 completed.
    Definition: sl_iec60730.h:362
    +
    IEC60730_OEM0_COMPLETE
    #define IEC60730_OEM0_COMPLETE
    Mask bit used for OEM Check 0 completed.
    Definition: sl_iec60730.h:348
    +
    IEC60730_OEM6_COMPLETE
    #define IEC60730_OEM6_COMPLETE
    Mask bit used for OEM Check 6 completed.
    Definition: sl_iec60730.h:360
    +
    IEC60730_ANALOG_COMPLETE
    #define IEC60730_ANALOG_COMPLETE
    Mask bit used for Analog Plausibility Checks completed.
    Definition: sl_iec60730.h:344
    +
    IEC60730_VMC_COMPLETE
    #define IEC60730_VMC_COMPLETE
    Mask bit used for Variable Memory Checks completed.
    Definition: sl_iec60730.h:332
    +
    IEC60730_INTERRUPT_COMPLETE
    #define IEC60730_INTERRUPT_COMPLETE
    Mask bit used for Interrupt Checks completed.
    Definition: sl_iec60730.h:340
    +
    IEC60730_OEM2_COMPLETE
    #define IEC60730_OEM2_COMPLETE
    Mask bit used for OEM Check 2 completed.
    Definition: sl_iec60730.h:352
    +
    IEC60730_OEM3_COMPLETE
    #define IEC60730_OEM3_COMPLETE
    Mask bit used for OEM Check 3 completed.
    Definition: sl_iec60730.h:354
    +
    IEC60730_OEM4_COMPLETE
    #define IEC60730_OEM4_COMPLETE
    Mask bit used for OEM Check 4 completed.
    Definition: sl_iec60730.h:356
    +
    IEC60730_OEM1_COMPLETE
    #define IEC60730_OEM1_COMPLETE
    Mask bit used for OEM Check 1 completed.
    Definition: sl_iec60730.h:350
    +
    IEC60730_OEM5_COMPLETE
    #define IEC60730_OEM5_COMPLETE
    Mask bit used for OEM Check 5 completed.
    Definition: sl_iec60730.h:358
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER__VERIFICATION__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..0456ff52 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__PROGRAM__COUNTER__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,140 @@ + + + + + + + +Document API IEC60730 Library: Program Counter Verification Unit Tests + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Functions
    +
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    Program Counter Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate function sl_iec60730_program_counter_test(). +More...

    + + + + + + +

    +Functions

    void test_sl_iec60730_program_counter_complete_all_bit_check (void)
     
    void test_sl_iec60730_program_counter_fail_some_bit_check (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate function sl_iec60730_program_counter_test().

    +

    IEC60730 Program Counter Unit Tests

    +

    These test cases run unit tests to check the operation of the function sl_iec60730_program_counter_test()

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_sl_iec60730_program_counter_complete_all_bit_check()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_program_counter_complete_all_bit_check (void )
    +
    +

    Public Check sl_iec60730_program_counter_test() operate

    +
    Returns
    None.
    +

    If bool local is_function_called variable equal false. It means test result routine of sl_iec60730_program_counter_test() is a pass, function sl_iec60730_safety_check_error_occur() is not called.

    + +
    +
    + +

    ◆ test_sl_iec60730_program_counter_fail_some_bit_check()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_program_counter_fail_some_bit_check (void )
    +
    +

    Public Check sl_iec60730_program_counter_test() operate

    +
    Returns
    None.
    +

    If bool local is_function_called variable true. It means test result routine of sl_iec60730_program_counter_test() is a failure, function sl_iec60730_safety_check_error_occur() is called.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__SAFETY__CHECK__VERIFICATION__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__SAFETY__CHECK__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..793cfbd8 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__SAFETY__CHECK__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,140 @@ + + + + + + + +Document API IEC60730 Library: Safety Check Verification Unit Tests + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Functions
    +
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    Safety Check Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur(). +More...

    + + + + + + +

    +Functions

    void test_sl_iec60730_safety_check_error_occur (void)
     
    void test_sl_iec60730_safety_check_reset_error (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().

    +

    IEC60730 Safety Check Unit Tests

    +

    These test cases run unit tests to check the operation of the function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur()

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_sl_iec60730_safety_check_error_occur()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_safety_check_error_occur (void )
    +
    +

    Public Check sl_iec60730_safety_check_error_occur() operate

    +
    Returns
    None.
    +

    If iec60730_safety_check.error value get from sl_iec60730_safety_check_get_error() equal error passed in via function sl_iec60730_safety_check_error_occur(). Then test case is pass.

    + +
    +
    + +

    ◆ test_sl_iec60730_safety_check_reset_error()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_safety_check_reset_error (void )
    +
    +

    Public Check sl_iec60730_safety_check_reset_error() operate

    +
    Returns
    None.
    +

    If iec60730_safety_check.error and iec60730_safety_check.number_error value get from sl_iec60730_safety_check_get_error() is 0. Then test case is pass.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__SAFE__STATE.html b/site/document_api_iec60730_library/group__IEC60730__SAFE__STATE.html new file mode 100644 index 00000000..f8b2e1ee --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__SAFE__STATE.html @@ -0,0 +1,119 @@ + + + + + + + +Document API IEC60730 Library: Safe State + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Functions
    +
    +
    Safe State
    EFR32 IEC60730 Library
    +
    +
    + +

    When incorrect behavior is detected, this state prevents further execution. +More...

    + + + + +

    +Functions

    void sl_iec60730_safe_state (sl_iec60730_test_failure_t failure)
     
    +

    Detailed Description

    +

    When incorrect behavior is detected, this state prevents further execution.

    +

    The Safe State function must be written by the OEM to configure the system to prevent any potential negative effects from occurring. GPIOs and communications channels must be configured appropriately.

    +

    Once any configuration is complete, the function loops to restart the watchdog. This prevents any resets until the end-user power-cycles the device.

    +

    Function Documentation

    + +

    ◆ sl_iec60730_safe_state()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_safe_state (sl_iec60730_test_failure_t failure)
    +
    +

    public IEC60730 Safe State

    +
    Parameters
    + + +
    failureEnum with the failing test, can be preserved for debug. See sl_iec60730_test_failure_t
    +
    +
    +
    Returns
    Never.
    +

    When a validation failure is detected, the Safe State function is executed to prevent further system failures.

    Note
    This is an example; an OEM must fully implement this according to their system needs.
    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__TEST.html b/site/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__TEST.html new file mode 100644 index 00000000..c9285930 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__TEST.html @@ -0,0 +1,357 @@ + + + + + + + +Document API IEC60730 Library: System Clock Check + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Macros | +Enumerations | +Functions
    +
    +
    System Clock Check
    EFR32 IEC60730 Library
    +
    +
    + +

    Verifies that system clocks are within expected frequencies. +More...

    + + + + + + + + + +

    +Macros

    +#define SL_IEC60730_TEST_CLOCK_MULTIPLIER   10
     Determines how many entrances into sl_iec60730_test_clock_tick() occur before bist frequency test executes.
     
    #define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ   10
     
    #define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE   1
     
    + + + + +

    +Enumerations

    enum  sl_iec60730_timer_test_control_t { SL_IEC60730_TIMER_TEST_DISABLE = 0, +SL_IEC60730_TIMER_TEST_ENABLE = 1 + }
     Enable/disable switch for system timer test. More...
     
    + + + + + + + + + + + + + +

    +Functions

    void sl_iec60730_sys_clock_count_tick (void)
     
    void sl_iec60730_test_clock_tick (void)
     
    void sl_iec60730_sys_clock_count_reset (void)
     
    uint16_t sl_iec60730_get_number_test_timer_tick (void)
     
    void sl_iec60730_sys_clock_test_enable (void)
     
    void sl_iec60730_sys_clock_test_disable (void)
     
    +

    Detailed Description

    +

    Verifies that system clocks are within expected frequencies.

    +

    For IEC60730, a plausibility check must be performed to check that the system clock is running at a frequency with an expected bounds. This check requires that the system clock frequency be compared against a second, independent clock's frequency (test clock).

    +

    +Hardware Architecture

    +

    EFR32 family devices provide a high frequency internal oscillator as well as a low frequency internal oscillator. The devices also provide timers modules that can be configured to use either oscillator as a clock source. These peripherals can be configured to vector code to interrupt service routines when the counter incremented by the peripheral and clocked by one of the clock sources meets certain criteria.

    +

    For timers, the criteria is a counter overflow event. The frequency of this overflow is defined by a reload value configured in firmware that hardware automatically loads into the timer's counter upon overflow.

    +

    Some timers offer a special mode where the timer's clock source is gated by a falling edge of the low frequency oscillator. In these cases, the system clock can be used as the clock source, and the number of timer counter ticks captured during the low frequency oscillator's logic low phase expresses the relationship between the two clocks.

    +

    The define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ holds the ratio value between system clock timer interrupt period and test clock timer interrupt period, this value is used to compare with the system clock counter. The ratio value is divided by slow timer period (test clock timer interrupt period) and fast timer period (system clock timer interrupt period).

    +

    The tolerance of test (OEM set value of the define, config: SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE) is typical (+/-) 10%-49% of the SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ.

    +

    +Suggested OEM Configuration

    +

    Not every EFR32 device offers the same types of timers and clock sources. For this reason, the optimal resource usage on each device family varies. The following chart offers a suggested configuration for each EFR32 family. Firmware examples configure system and test timers as in Table 1

    +
    Table 1 Suggested system and test timer configuration on EFR32 device families

    + + + + + + +
    EFR32 device System timer Test timer
    Series 1
      +
    • +TIMERn clocked by system clock HFCLK which is the master clock of the core and other peripherals.
      • +
    • +Special case: If the ADC module is clocked by AUXHFRCO then OEM could use IRQCheck to measure clock indirectly via sample rate interrupt.
      • +
    +
      +
    • +LETIMER0 clocked by internal fixed clock (LFRCO or ULFRCO) with configurable prescaler.
      • +
    +
    Series 2
      +
    • +TIMERn clocked by one of the HFXO, HFRCODPLL, HFRCOEM23, FSRCO clock sources that could be used to test for CPU, high speed peripherals (SYSCLK), Radio module (HFXO) and IADC module (HFRCOEM23).
      • +
    • +WDOGn clocked by HCLK when system clock (SYSCLK) is selected as CLKIN0
      • +
    +
      +
    • +LETIMERn clocked by internal fixed clock (LFRCO or ULFRCO).
      • +
    +
    +

    +Failure Risks

    +

    The library's system clock plausibility test will force entry into safe state if the frequency relationship between the system clock and the test clock exceeds upper and lower bounds.

    +

    The library examines the relationship between the two clocks using calls that the OEM must place in OEM-defined timer interrupt service routines. Code examples for each EFR32 device provide drop-in firmware solutions for OEMs for timer initialization and ISR source code. OEMs must ensure that timer ISRs are able to be serviced promptly during operation.

    +

    Additionally, the OEM is responsible for leaving the system clock at a constant and defined operating frequency throughout all OEM firmware.

    +

    Finally, the OEM is responsible for setting sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_DISABLE within safety-critical code by calling function sl_iec60730_sys_clock_test_disable(). This value is only used in cases where the system is executing non-safety-critical code, where the BIST routine is also not being called. When returning to normal operation, clear all interrupt counters in iec60730 IRQ execution count, reset the timer clock tick and system clock tick timers, and set sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_ENABLE.

    +

    +Software Architecture

    +

    Table 1

    +

    For the EFR32 IEC60730 implementation, Figure 1 shows the logic flow chart of the system clock frequency check during BIST. The test executes in the test timer interrupt, which runs as foreground calls to OEM functions and the foreground BIST test continuously execute.

    +
    + +
    +Figure 1 System clock frequency check flowchart
    +

    +

    Macro Definition Documentation

    + +

    ◆ SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ

    + +
    +
    + + + + +
    #define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ   10
    +
    +

    This define holds the ratio value between system clock timer interrupt period and test clock timer interrupt period

    + +
    +
    + +

    ◆ SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE

    + +
    +
    + + + + +
    #define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE   1
    +
    +

    (OEM set value of the define) is typical (+/-) 10%-49% of the SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ.

    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ sl_iec60730_timer_test_control_t

    + +
    +
    + + + + +
    enum sl_iec60730_timer_test_control_t
    +
    + +

    Enable/disable switch for system timer test.

    + + + +
    Enumerator
    SL_IEC60730_TIMER_TEST_DISABLE 

    timer tests will not execute

    +
    SL_IEC60730_TIMER_TEST_ENABLE 

    timer tests will execute

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ sl_iec60730_get_number_test_timer_tick()

    + +
    +
    + + + + + + + + +
    uint16_t sl_iec60730_get_number_test_timer_tick (void )
    +
    +

    public IEC60730 Get Timer Tick

    +
    Returns
    sl_iec60730_number_test_timer_tick.
    +

    Function get value sl_iec60730_number_test_timer_tick, used for OEM testing

    + +
    +
    + +

    ◆ sl_iec60730_sys_clock_count_reset()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_sys_clock_count_reset (void )
    +
    +

    public IEC60730 Initialize iec60730 timer tick variables

    +
    Returns
    None.
    +

    This function should be called within the sl_iec60730_test_clock_tick() callback. During the initialization of the test clock timers, this function resets the internal test clock and system clock tick variables to known reset states.

    + +
    +
    + +

    ◆ sl_iec60730_sys_clock_count_tick()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_sys_clock_count_tick (void )
    +
    +

    OEMs use the defines SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ and SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE in the config file to define the expected tolerance and clock frequency of executions for each test clock tick included in a project. OEM code need to disable ISR-based timer test execution when in safe states. This local variable allows OEM code to test when events occur. static uint16_t sl_iec60730_number_test_timer_tick; Provides the expected ratio of system clock to test clock ticks Allows OEM code to run tests using timer tick. Must be defined as system clock (faster clock) / test clock (slower clock). The ratio value cannot exceed 0xFFFF.

    +

    This local variable allows customers to stop ISR-based tests when code enters a safe state where BIST is not being called because the code is not safety critical. Tests whose execution is gated by this value are the system clock test, the interrupt plausibility test, and the BIST execution frequency test. static uint8_t sl_iec60730_timer_test_control

    +

    This local variable allows customers to know the number of times the function sl_iec60730_test_clock_tick is called, used for customers testing static uint16_t sl_iec60730_number_test_timer_tick public IEC60730 System Clock Tick

    +
    Returns
    None.
    +

    This function increments a system clock counter sl_iec60730_sys_clock_count, which is compared to a test clock counter as part of the system clock frequency check. It should be called in the timer interrupt service routine designated as the system clock timer in oem_iec60730_timer.c.

    + +
    +
    + +

    ◆ sl_iec60730_sys_clock_test_disable()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_sys_clock_test_disable (void )
    +
    +

    public IEC60730 Disable Timer Test

    +
    Returns
    None.
    +

    Function set sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_DISABLE.

    + +
    +
    + +

    ◆ sl_iec60730_sys_clock_test_enable()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_sys_clock_test_enable (void )
    +
    +

    public IEC60730 Enable Timer Test

    +
    Returns
    None.
    +

    Function set sl_iec60730_timer_test_control to SL_IEC60730_TIMER_TEST_ENABLE.

    + +
    +
    + +

    ◆ sl_iec60730_test_clock_tick()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_test_clock_tick (void )
    +
    +

    public IEC60730 Test Clock Tick

    +
    Returns
    None.
    +

    This function increments a test clock counter. The function executes all interrupt service routine-based IEC60730 tests, including the system clock frequency check. It should be called in the timer interrupt service routine designated as the test clock timer in oem_iec60730_timer.c.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html b/site/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html new file mode 100644 index 00000000..75b972fe --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION.html @@ -0,0 +1,129 @@ + + + + + + + +Document API IEC60730 Library: System Clock Automated Verification Tests + + + + + + + + + +
    +
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    Document API IEC60730 Library +
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    + +
    + +
    +
    +Classes | +Functions | +Variables
    +
    +
    System Clock Automated Verification Tests
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730
    +
    +
    + +

    Python script for the IEC60730 system clock Verification tests. +More...

    + + + + + +

    +Classes

    class  integration_test_iec60730_system_clock.iec60730_system_clock
     IEC60730 System Clock Verification Tests. More...
     
    + + + +

    +Functions

    +bytes integration_test_iec60730_system_clock.int_to_bytes (int number)
     
    + + + + + + + + + + + + + + + + + + + +

    +Variables

    + integration_test_iec60730_system_clock.chip_name = os.getenv('CHIP')
     Chip name run test.
     
    + integration_test_iec60730_system_clock.lst_file_path = os.getenv('LST_PATH')
     Path to file *.lst.
     
    + integration_test_iec60730_system_clock.adapter_serial_no = os.getenv('ADAPTER_SN')
     serialno of device
     
    + integration_test_iec60730_system_clock.lib_path = os.getenv('JLINK_PATH')
     Path to jlink library.
     
    + integration_test_iec60730_system_clock.line = sys.argv.pop()
     Number of arguments passed into the script file.
     
    + integration_test_iec60730_system_clock.compiler = line
     compiler creates the file *.lst
     
    +

    Detailed Description

    +

    Python script for the IEC60730 system clock Verification tests.

    +

    For details on the tests, see iec60730_system_clock.iec60730_system_clock.

    +

    +Test Results

    +

    EFR32 Device | Test Results ----------—|----------—

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..26f86c09 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__SYSTEM__CLOCK__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,232 @@ + + + + + + + +Document API IEC60730 Library: System Clock Verification Unit Tests + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
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    + + +
    + +
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    +Functions
    +
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    System Clock Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate functions in system_clock module. +More...

    + + + + + + + + + + + + + + +

    +Functions

    void test_sl_iec60730_test_clock_tick_timer_test_disable (void)
     
    void test_sl_iec60730_test_clock_tick_count_in_bound (void)
     
    void test_sl_iec60730_test_clock_tick_count_out_bound (void)
     
    void test_sl_iec60730_sys_clock_count_reset (void)
     
    void test_sl_iec60730_test_clock_tick_test_clock_multiplier (void)
     
    void test_sl_iec60730_get_number_test_timer_tick (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate functions in system_clock module.

    +

    IEC60730 System Clock Unit Tests

    +

    These test cases run unit tests to check the operation of the functions in system_clock module.

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_sl_iec60730_get_number_test_timer_tick()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_get_number_test_timer_tick (void )
    +
    +

    Public Check sl_iec60730_get_number_test_timer_tick() operate

    +
    Returns
    None.
    +

    Check if the number of times the function sl_iec60730_test_clock_tick() has been called is the same as the value received from the function sl_iec60730_get_number_test_timer_tick().

    + +
    +
    + +

    ◆ test_sl_iec60730_sys_clock_count_reset()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_sys_clock_count_reset (void )
    +
    +

    Public Check sl_iec60730_test_clock_tick() operate

    +
    Returns
    None.
    +

    If sl_iec60730_timer_test_control equals SL_IEC60730_TIMER_TEST_ENABLE. Call function sl_iec60730_sys_clock_count_tick() to increase the value of variable sl_iec60730_sys_clock_count. If the sl_iec60730_sys_clock_count value is within the check boundary value. Then call function sl_iec60730_sys_clock_count_reset() to reset variable sl_iec60730_sys_clock_count. Function sl_iec60730_safe_state() will be called.

    + +
    +
    + +

    ◆ test_sl_iec60730_test_clock_tick_count_in_bound()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_test_clock_tick_count_in_bound (void )
    +
    +

    Public Check sl_iec60730_test_clock_tick() operate

    +
    Returns
    None.
    +

    If sl_iec60730_timer_test_control equals SL_IEC60730_TIMER_TEST_ENABLE. Call function sl_iec60730_sys_clock_count_tick() to increase the value of variable sl_iec60730_sys_clock_count. If the sl_iec60730_sys_clock_count value is within the check boundary value. Function sl_iec60730_safe_state() will not be called.

    + +
    +
    + +

    ◆ test_sl_iec60730_test_clock_tick_count_out_bound()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_test_clock_tick_count_out_bound (void )
    +
    +

    Public Check sl_iec60730_test_clock_tick() operate

    +
    Returns
    None.
    +

    If sl_iec60730_timer_test_control equals SL_IEC60730_TIMER_TEST_ENABLE. Call function sl_iec60730_sys_clock_count_tick() to increase the value of variable sl_iec60730_sys_clock_count. If the sl_iec60730_sys_clock_count value is out of range the check boundary value. Function sl_iec60730_safe_state() will be called.

    + +
    +
    + +

    ◆ test_sl_iec60730_test_clock_tick_test_clock_multiplier()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_test_clock_tick_test_clock_multiplier (void )
    +
    +

    Public Check sl_iec60730_test_clock_tick() operate

    +
    Returns
    None.
    +

    The number of function sl_iec60730_test_clock_tick() calls is greater than the default value and variable sl_iec60730_sys_clock_count value is within the check boundary value each time call. Function sl_iec60730_program_counter_test() will be called.

    + +
    +
    + +

    ◆ test_sl_iec60730_test_clock_tick_timer_test_disable()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_test_clock_tick_timer_test_disable (void )
    +
    +

    Public Check sl_iec60730_test_clock_tick() operate

    +
    Returns
    None.
    +

    If sl_iec60730_timer_test_control equals SL_IEC60730_TIMER_TEST_DISABLE. Function sl_iec60730_safe_state() will be called.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__UNIT__TEST.html new file mode 100644 index 00000000..77bc2811 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__UNIT__TEST.html @@ -0,0 +1,117 @@ + + + + + + + +Document API IEC60730 Library: UNIT Test Functions In Modules In Library IEC60730 + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Modules
    +
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    UNIT Test Functions In Modules In Library IEC60730
    IEC60730 Test Specification
    +
    +
    + +

    C file combined with Unity framework. +More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Modules

     Bist Verification Unit Tests
     Header file list of test cases for the verification operate function sl_iec60730_bist().
     
     CPU Registers Verification Unit Tests
     Header file list of test cases for the verification operate functions in cpu registers module.
     
     IRQ Verification Unit Tests
     Header file list of test cases for the verification operate functions in irq module.
     
     Invariable Memory Verification Unit Tests
     Header file list of test cases for the verification operate functions in invariable memory module.
     
     Post Verification Unit Tests
     Header file list of test cases for the verification operate function sl_iec60730_post().
     
     Program Counter Verification Unit Tests
     Header file list of test cases for the verification operate function sl_iec60730_program_counter_test().
     
     Safety Check Verification Unit Tests
     Header file list of test cases for the verification operate function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().
     
     System Clock Verification Unit Tests
     Header file list of test cases for the verification operate functions in system_clock module.
     
     Variable Memory Verification Unit Tests
     Header file list of test cases for the verification operate functions in variable memory module.
     
     Watchdog Verification Unit Tests
     Header file list of test cases for the verification operate functions in watchdog module.
     
    +

    Detailed Description

    +

    C file combined with Unity framework.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__UNIT__TEST__POST.html b/site/document_api_iec60730_library/group__IEC60730__UNIT__TEST__POST.html new file mode 100644 index 00000000..5f11741c --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__UNIT__TEST__POST.html @@ -0,0 +1,140 @@ + + + + + + + +Document API IEC60730 Library: Post Verification Unit Tests + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Functions
    +
    +
    Post Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate function sl_iec60730_post(). +More...

    + + + + + + +

    +Functions

    void test_sl_iec60730_post_pass_all_check_condition (void)
     
    void test_sl_iec60730_post_failed_check_condition (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate function sl_iec60730_post().

    +

    IEC60730 Post Unit Tests

    +

    These test cases run unit tests to check the operation of the function sl_iec60730_post()

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_sl_iec60730_post_failed_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_post_failed_check_condition (void )
    +
    +

    Public Check sl_iec60730_post() operate

    +
    Returns
    None.
    +

    If bool local is_function_called variable true. It means test result routine of sl_iec60730_post() is a failure, function sl_iec60730_safe_state() is called.

    + +
    +
    + +

    ◆ test_sl_iec60730_post_pass_all_check_condition()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_post_pass_all_check_condition (void )
    +
    +

    Public Check sl_iec60730_post() operate

    +
    Returns
    None.
    +

    If bool local is_function_called variable equal false. It means test result routine of sl_iec60730_post() is a pass, function sl_iec60730_safe_state() is not called. So timer support test is enabled.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__TEST.html b/site/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__TEST.html new file mode 100644 index 00000000..c28a99b9 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__TEST.html @@ -0,0 +1,547 @@ + + + + + + + +Document API IEC60730 Library: Variable Memory Check + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
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    +
    + + + + + + + +
    + +
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    + + +
    + +
    + +
    +
    +Classes | +Macros | +Functions | +Variables
    +
    +
    Variable Memory Check
    EFR32 IEC60730 Library
    +
    +
    + +

    Verifies RAM is working correctly. +More...

    + + + + + + + + +

    +Classes

    struct  sl_iec60730_vmc_test_region_t
     This structure is used as configuration for VMC testing. More...
     
    struct  sl_iec60730_vmc_test_multiple_regions_t
     This structure is used as multiple test regions for VMC testing. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    #define BLOCKSIZE   (4)
     
    #define RT_BLOCK_OVERLAP   (1)
     
    #define RT_BLOCKSIZE   (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
     
    #define BACKGROUND   ((uint32_t) 0x00000000uL)
     
    #define SL_IEC60730_VMC_POST_ENTER_CRITICAL()
     Enter ATOMIC section of VMC Post. More...
     
    +#define SL_IEC60730_VMC_POST_EXIT_CRITICAL()   CORE_EXIT_CRITICAL()
     Exit ATOMIC section of VMC Post.
     
    #define SL_IEC60730_VMC_BIST_ENTER_CRITICAL()
     Enter ATOMIC section of VMC Bist. More...
     
    +#define SL_IEC60730_VMC_BIST_EXIT_CRITICAL()   CORE_EXIT_CRITICAL()
     Exit ATOMIC section of VMC Bist.
     
    +#define STACK_CHECK   ((uint32_t *) (&stack_check))
     
    +#define RAM_START   ((uint32_t *) (&ram_start))
     RAM starting address.
     
    +#define RAM_END   ((uint32_t *) ((uint32_t) RAM_BACKUP - 1))
     RAM ending address.
     
    +#define RAM_BACKUP   ((uint32_t *) (&__StackTop))
     RAM backup address.
     
    +#define CLASSB_START   ((uint32_t *) (&classb_start))
     ClassbRAM starting address.
     
    +#define CLASSB_END   ((uint32_t *) ((uint32_t) (&class_b_limit) - 1))
     ClassbRAM ending address.
     
    +#define RAMTEST_START   CLASSB_START
     Example RAM starting address test.
     
    +#define RAMTEST_END   CLASSB_END
     Example RAM ending address test.
     
    +#define SL_IEC60730_USE_MARCHX_ENABLE   1
     Enable used the algorithm used in BIST is March-X.
     
    +#define SL_IEC60730_VAR_BLOCKS_PER_BIST   256
     Number of ram blocks tested per BIST.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0   (0xEEEEEEEEuL)
     Pattern 0 is used for stack overflow.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1   (0xCCCCCCCCuL)
     Pattern 1 is used for stack overflow.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2   (0xBBBBBBBBuL)
     Pattern 2 is used for stack overflow.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3   (0xDDDDDDDDuL)
     Pattern 3 is used for stack overflow.
     
    + + + + + + + + + + + + + +

    +Functions

    void sl_iec60730_vmc_init (sl_iec60730_vmc_test_multiple_regions_t *test_config)
     
    sl_iec60730_test_result_t sl_iec60730_vmc_post (void)
     
    sl_iec60730_test_result_t sl_iec60730_vmc_bist (void)
     
    bool sl_iec60730_vmc_pre_run_marchxc_step (uint32_t *addr, uint32_t size)
     This function is called before performing the RAM check. Depending on the RAM region will be checked to give reasonable actions. More...
     
    void sl_iec60730_vmc_post_run_marchxc_step (uint32_t *addr, uint32_t size)
     After testing the RAM, you can restore the previous work. More...
     
    + + + + + + + + + + + + + +

    +Variables

    +uint32_t classb_start
     
    +uint32_t classb_end
     
    +uint32_t __StackTop
     
    +uint32_t ram_start
     
    +uint32_t class_b_limit
     
    +uint32_t stack_check
     
    +

    Detailed Description

    +

    Verifies RAM is working correctly.

    +

    +Hardware Architecture

    +

    Depending on using the definitation, the testing process takes place through different steps and different region RAM memory.

    +

    +Failure Risks

    +

    There are several potential sources of failure in the variable memory hardware

      +
    • Stuck bits that do not change (either 0 or 1)
      • +
    • Coupled bits that change based on a neighbor
      • +
    • Address lines that couple or disconnect, activating an incorrect location
      • +
    • Single Event Upset (SEU) that toggle a bit or bits without permanent damage to the memory hardware
      • +
    +

    The variable memory check can detect the first three types of errors using the March-X algorithm. The VMC is based on a word-oriented March-X algorithm from http://www.ece.uc.edu/~wjone/Memory.pdf.

    +

    SEU failures are not detected in a class B control, and would require class C level of validation to detect - data duplication, error- detecting-and-correcting memory, etc. A failure of this type will be detected once it causes a secondary failure such as missing a watchdog restart or incorrect clock frequency.

    +

    +Software Architecture

    +

    As show in Software Architecture, there are 3 test processes happen. In the case POST testing, the algorithm used is March-C. In the BIST testing, the algorithm used is March-X by default. If user DOES NOT use the SL_IEC60730_USE_MARCHX_ENABLE definition, the algorithm used is March-C. March-X algorithm is faster than March-C because March-X algorithm is only March-C algorithm that omits some steps (Step 3, 4). The March-C algorithm (van de Goor,1991) is described as below steps

    +
      +
    • STEP 1: Write all zeros to array
      • +
    • STEP 2: Starting at lowest address, read zeros, write ones, increment up array
      • +
    • STEP 3: Starting at lowest address, read ones, write zeros, increment up array.
      • +
    • STEP 4: Starting at highest address, read zeros, write ones, decrement down array.
      • +
    • STEP 5: Starting at highest address, read ones, write zeros, decrement down array.
      • +
    • STEP 6: Read all zeros from array.
      • +
    +

    Some detail about implementing of Variable Memory Check (VMC) and used variables. These variables are also used in the test cases (TC) of the VMC module.

    +

    To make sure the VMC module as well as the IMC module work properly, it is necessary to ensure the location of the ram area for these modules. The sections SHOULD be placed in the correct order: (*.rt_buf*) -> (*.overlap*). DO NOT change this order. Please refer to our example linker for more details.

    +

    User need declare a variable of struct sl_iec60730_vmc_test_region_t. In the initialization step, we need to assign the start address and end address to this variable for executing the VMC. For example, we will call the starting address RAMTEST_START and the ending address RAMTEST_END to make it easier to describe later.

    +

      +
    • Variable iec60730_bk_buf is a buffer used to backup data during testing process and is placed at (*.rt_buf*) section. The size of this variable is defined in file sl_iec60730.h (i.e RT_BLOCKSIZE definition). The RT_BLOCKSIZE definition will be mentioned later.
      • +
    +

    +

    +

    Before performing the RAM test, we provide a callback function named sl_iec60730_vmc_pre_run_marchxc_step. After performing the RAM test, we also provide a callback function named sl_iec60730_vmc_post_run_marchxc_step, and the user decides what to do after the RAM test is over.

    +

    As mentioned about SL_IEC60730_BOARD_HEADER in Invariable Memory Check module, the definition SL_IEC60730_BOARD_HEADER also has the necessary information for VMC module to run. The RAMTEST_START and RAMTEST_END definitions are used to assigned to start, and end member of a variable of type sl_iec60730_vmc_test_region_t. Two definitions are optional because the user can directly assign values to the start and end member of a variable as long as these values satisfy the conditions describled of the RAMTEST_START, and RAMTEST_END definitions. The BACKGROUND, BLOCKSIZE, RT_BLOCK_OVERLAP, and RT_BLOCKSIZE SHOULD use our default definitions.

    +

    Currently we also support stack test to check for stack overflow using pattern (here is an array with 4 elements) placed at the bottom of the stack. You can refer to the (*.stack_bottom*) section in our linker example. The initialization values of this array are initialized when calling the function sl_iec60730_vmc_init. Every time when executing sl_iec60730_vmc_bist will check the value of this array and based on the check results will return SL_IEC60730_TEST_FAILED nor not.

    +

    +

    sl_iec60730_vmc_post()

    +

    + +
    +Figure 1 Flow chart of Variable Memory Check POST
    +

    sl_iec60730_vmc_bist()

    +

    + +
    +Figure 2 Flow chart of Variable Memory Check BIST
    +

    Figure 3 shows two examples of RAM configurations. The figure on the left can be found in our examples. The figure on the right is a possible scenario. We will analyze these cases as below.

    +

    + +
    +Figure 3 Example of RAM memory configuration
    +

    With the figure on the left, as mentioned above (*.rt_buf*) and (*.overlap*) are placed in fixed order, namely Ram Backup and Overlap as shown in the Figure. The RAMTEST_START can start the next Overlap. This figure also describes the algorithm of testing. The RAM area under test is defined starting from RAMTEST_START to RAMTEST_END, and split into multiple BLOCKs. Each block has a size determined by BLOCKSIZE. In the first test step, the BLOCK (1) and Overlap are tested. The Ram Backup is used to back up the data in the BLOCK being tested, and will restore it after the test in BLOCKs competletey. In the second test step, BLOCK (2) is tested and a part of BLOCK (1) is also tested. There is an area in BLOCK (1), also called overlap, which will be tested twice. This makes the test even more secure. Continue like this until the test reaches BLOCK (N), the last block, then return to test the Ram Backup.

    +

    The image on the right is slightly different when, the tested area (from RAMTEST_START to RAMTEST_END) contains Ram Backup and Overlap. In order to ensure the algorithm works properly, in the case like the figure on the right at the starting position (RAMTEST_START) it is necessary to create an overlap area. As mentioned above this overlap is also tested so user DOES NOT need to worry. Next, the test process is the same as said, will test the BLOCKs (from BLOCK (1) to BLOCK (N)). Here is a point to note when testing to Ram Backup, it will be ignored because this Ram Backup WILL be tested after the test of the last block (BLOCK (N)).

    +

    In case the tested area has the address of RAMTEST_START smaller than the address of Ram Backup, the test process is similar to the figure on the right.

    +

    Macro Definition Documentation

    + +

    ◆ BACKGROUND

    + +
    +
    + + + + +
    #define BACKGROUND   ((uint32_t) 0x00000000uL)
    +
    +

    The BACKGROUND definition is background used to testing. In our sample, value 0x00000000uL is used value for background. Of course, we can define another value. We recommend using definition like ours (0x00000000uL) because it accurately describes the steps of the March-X/March-C algorithm described above.

    + +
    +
    + +

    ◆ BLOCKSIZE

    + +
    +
    + + + + +
    #define BLOCKSIZE   (4)
    +
    +

    The BLOCKSIZE definition MUST be 4 as our example for the algorithm to work properly.

    + +
    +
    + +

    ◆ RT_BLOCK_OVERLAP

    + +
    +
    + + + + +
    #define RT_BLOCK_OVERLAP   (1)
    +
    +

    The RT_BLOCK_OVERLAP definition is used to present the size of #iec60730_ram_test_overlap buffer. The variable #iec60730_ram_test_overlap has a size of (2 * RT_BLOCK_OVERLAP). For the algorithm (March-X/March-C) to work properly this definition MUST take the value 1 as in our example.

    + +
    +
    + +

    ◆ RT_BLOCKSIZE

    + +
    +
    + + + + +
    #define RT_BLOCKSIZE   (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
    +
    +

    The definition of RT_BLOCKSIZE is taken from the definition of BLOCKSIZE and RT_BLOCK_OVERLAP.

    + +
    +
    + +

    ◆ SL_IEC60730_VMC_BIST_ENTER_CRITICAL

    + +
    +
    + + + + + + + +
    #define SL_IEC60730_VMC_BIST_ENTER_CRITICAL()
    +
    +Value:
    CORE_DECLARE_IRQ_STATE; \
    +
    CORE_ENTER_CRITICAL()
    +
    +

    Enter ATOMIC section of VMC Bist.

    + +
    +
    + +

    ◆ SL_IEC60730_VMC_POST_ENTER_CRITICAL

    + +
    +
    + + + + + + + +
    #define SL_IEC60730_VMC_POST_ENTER_CRITICAL()
    +
    +Value:
    CORE_DECLARE_IRQ_STATE; \
    +
    CORE_ENTER_CRITICAL()
    +
    +

    Enter ATOMIC section of VMC Post.

    + +
    +
    +

    Function Documentation

    + +

    ◆ sl_iec60730_vmc_bist()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_vmc_bist (void )
    +
    +

    public IEC60730 Variable Memory Check (VMC) BIST

    +
    Parameters
    + + +
    paramsinput parameter of struct sl_iec60730_vmc_test_region_t form
    +
    +
    +
    Returns
    sl_iec60730_test_result_t. +
    +

    Performs a variable memory check in defined area. For details how sl_iec60730_vmc_bist work, please refer to Software Architecture

    +

    Requires sl_iec60730_vmc_init to be called first to setup global variables.

    + +
    +
    + +

    ◆ sl_iec60730_vmc_init()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_vmc_init (sl_iec60730_vmc_test_multiple_regions_t * test_config)
    +
    +

    public IEC60730 Variable Memory Check (VMC) Initialize

    +
    Parameters
    + + +
    paramsinput parameter of struct sl_iec60730_vmc_test_multiple_regions_t form
    +
    +
    +
    Returns
    void
    +

    Performs a initialization of global variables. This function SHOULD call before calling sl_iec60730_vmc_post()

    + +
    +
    + +

    ◆ sl_iec60730_vmc_post()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_vmc_post (void )
    +
    +

    public IEC60730 Variable Memory Check (VMC) POST

    +
    Parameters
    + + +
    paramsinput parameter of struct sl_iec60730_vmc_test_region_t form
    +
    +
    +
    Returns
    sl_iec60730_test_result_t. +
    +

    Performs a variable memory check in defined area. For details how sl_iec60730_vmc_post work, please refer to Software Architecture

    + +
    +
    + +

    ◆ sl_iec60730_vmc_post_run_marchxc_step()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    void sl_iec60730_vmc_post_run_marchxc_step (uint32_t * addr,
    uint32_t size 
    )
    +
    + +

    After testing the RAM, you can restore the previous work.

    +
    Parameters
    + + + +
    addrThe starting address of the ram under test
    sizeThe size of the ram area to be tested. This parameter
    +
    +
    +
    Returns
    void
    + +
    +
    + +

    ◆ sl_iec60730_vmc_pre_run_marchxc_step()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    bool sl_iec60730_vmc_pre_run_marchxc_step (uint32_t * addr,
    uint32_t size 
    )
    +
    + +

    This function is called before performing the RAM check. Depending on the RAM region will be checked to give reasonable actions.

    +
    Parameters
    + + + +
    addrThe starting address of the ram under test
    sizeThe size of the ram area to be tested. This parameter is BLOCKSIZE
    +
    +
    +
    Returns
    bool
      +
    • true - allow running RAM test
      • +
    • false - not allow
      • +
    +
    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html b/site/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html new file mode 100644 index 00000000..f64e6003 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION.html @@ -0,0 +1,130 @@ + + + + + + + +Document API IEC60730 Library: Variable Memory Automated Verification Tests + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Classes | +Variables
    +
    +
    Variable Memory Automated Verification Tests
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730
    +
    +
    + +

    Python script for the IEC60730 Variable Memory plausibility verification tests. +More...

    + + + + + +

    +Classes

    class  integration_test_iec60730_variable_memory.iec60730_vmc
     IEC60730 Variable Memory Plausibility Verification Tests. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    +bool integration_test_iec60730_variable_memory.isEnableMarchXC = True
     Disallowance testing with MARCH-X algorithm.
     
    + integration_test_iec60730_variable_memory.chip_name = os.getenv('CHIP')
     Chip name run test.
     
    + integration_test_iec60730_variable_memory.lst_file_path = os.getenv('LST_PATH')
     Path to file *.lst.
     
    + integration_test_iec60730_variable_memory.adapter_serial_no = os.getenv('ADAPTER_SN')
     serialno of device
     
    + integration_test_iec60730_variable_memory.lib_path = os.getenv('JLINK_PATH')
     Path to jlink library.
     
    + integration_test_iec60730_variable_memory.use_marchx_enable = os.getenv('INTEGRATION_TEST_USE_MARCHX_DISABLE')
     Enable test with MARCH-X algorithm.
     
    + integration_test_iec60730_variable_memory.line = sys.argv.pop()
     Number of arguments passed into the script file.
     
    + integration_test_iec60730_variable_memory.compiler = line
     compiler creates the file *.lst
     
    +

    Detailed Description

    +

    Python script for the IEC60730 Variable Memory plausibility verification tests.

    +

    For details on the tests, see iec60730_variable_memory.iec60730_variable_memory.

    +

    +Test Results

    +

    EFR32 Device| Test Results ---------—|----------—

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..c102b825 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__VARIABLE__MEMORY__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,439 @@ + + + + + + + +Document API IEC60730 Library: Variable Memory Verification Unit Tests + + + + + + + + + +
    +
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    +
    Document API IEC60730 Library +
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    +
    + + + + + + + +
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    +Functions
    +
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    Variable Memory Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate functions in variable memory module. +More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    sl_iec60730_test_result_t unit_test_mock_check_integrity (void)
     
    void test_sl_iec60730_vmc_init_param_null (void)
     
    void test_sl_iec60730_vmc_init_start_address_greater_than_end_address (void)
     
    void test_sl_iec60730_vmc_post_pass_all_check_sections (void)
     
    void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section (void)
     
    void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section (void)
     
    void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section (void)
     
    void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section (void)
     
    void test_sl_iec60730_vmc_bist_pass_all_check_sections (void)
     
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section (void)
     
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section (void)
     
    void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section (void)
     
    void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section (void)
     
    void test_sl_iec60730_vmc_bist_checking_allow_run_test (void)
     
    void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate functions in variable memory module.

    +

    IEC60730 Variable Memory Unit Tests

    +

    These test cases run unit tests to check the operation of the functions in variable memory module.

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_sl_iec60730_vmc_bist_checking_allow_run_test()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_bist_checking_allow_run_test (void )
    +
    +

    Public Check sl_iec60730_vmc_bist() operate

    +
    Returns
    None.
    +

    If sl_iec60730_vmc_pre_run_marchxc_step() returns false, meaning it is not allowed to run test sl_iec60730_vmc_marchxc_step() to check the ram section. Function sl_iec60730_vmc_marchxc_step() will not be called when checking ram section.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section (void )
    +
    +

    Public Check sl_iec60730_vmc_bist() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchxc algorithms to check the backup section pass, but checking the integrity of the variable iec60730_rt_check fail. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section (void )
    +
    +

    Public Check sl_iec60730_vmc_bist() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchxc algorithms to check the ram section pass, but checking the integrity of the variable iec60730_rt_check fail. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section (void )
    +
    +

    Public Check sl_iec60730_vmc_bist() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchxc algorithms to check the backup section fail. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section (void )
    +
    +

    Public Check sl_iec60730_vmc_bist() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchxc algorithms to check the ram and backup section fail. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_bist_fail_stack_test_over_flow()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow (void )
    +
    +

    Public Check sl_iec60730_vmc_bist() operate

    +
    Returns
    None.
    +

    If check that the value of the iec60730_stack_test_over_flow variable located in the ending stack area is different from the initial initial value. The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_bist_pass_all_check_sections()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_bist_pass_all_check_sections (void )
    +
    +

    Public Check sl_iec60730_vmc_bist() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchxc algorithms to check the ram and backup section pass, checking the integrity of the variable iec60730_rt_check pass, check stack over flow pass The function sl_iec60730_vmc_bist() returns the value SL_IEC60730_TEST_PASSED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_init_param_null()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_init_param_null (void )
    +
    +

    Public Check sl_iec60730_vmc_init() operate

    +
    Returns
    None.
    +

    If the input parameter has the value NULL, the components in the initialization value are NULL, the vmc test initialization flag fails. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_init_start_address_greater_than_end_address()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_init_start_address_greater_than_end_address (void )
    +
    +

    Public Check sl_iec60730_vmc_init() operate

    +
    Returns
    None.
    +

    If the input parameter has the value start member greater than value end member, the vmc test initialization flag fails. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_post_fail_check_integrity_backup_section()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section (void )
    +
    +

    Public Check sl_iec60730_vmc_post() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchc algorithms to check the backup section pass, but checking the integrity of the variable iec60730_rt_check fail. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_post_fail_check_integrity_ram_section()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section (void )
    +
    +

    Public Check sl_iec60730_vmc_post() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchc algorithms to check the ram section pass, but checking the integrity of the variable iec60730_rt_check fail. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_post_fail_marchc_check_backup_section()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section (void )
    +
    +

    Public Check sl_iec60730_vmc_post() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchc algorithms to check the backup section fail. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_post_fail_marchc_check_ram_section()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section (void )
    +
    +

    Public Check sl_iec60730_vmc_post() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchc algorithms to check the ram and backup section fail. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_FAILED.

    + +
    +
    + +

    ◆ test_sl_iec60730_vmc_post_pass_all_check_sections()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_vmc_post_pass_all_check_sections (void )
    +
    +

    Public Check sl_iec60730_vmc_post() operate

    +
    Returns
    None.
    +

    If the initialization value is successful, the functions run the marchc algorithms to check the ram and backup section pass, checking the integrity of the variable iec60730_rt_check pass. The function sl_iec60730_vmc_post() returns the value SL_IEC60730_TEST_PASSED.

    + +
    +
    + +

    ◆ unit_test_mock_check_integrity()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t unit_test_mock_check_integrity (void )
    +
    +

    Public Check sl_iec60730_vmc_init() operate

    +
    Returns
    boolean.
    +

    Function simulates the result of iec60730_rt_check variable value integrity check.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__VERIFICATION.html b/site/document_api_iec60730_library/group__IEC60730__VERIFICATION.html new file mode 100644 index 00000000..82b2d081 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__VERIFICATION.html @@ -0,0 +1,93 @@ + + + + + + + +Document API IEC60730 Library: IEC60730 Test Specification + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Modules
    +
    +
    IEC60730 Test Specification
    +
    +
    + +

    Automated tests for validating correct firmware operation. +More...

    + + + + + + + + +

    +Modules

     Integration Test Modules In Library IEC60730
     Python script supports running test case integration tests for internal modules in library IEC60730.
     
     UNIT Test Functions In Modules In Library IEC60730
     C file combined with Unity framework.
     
    +

    Detailed Description

    +

    Automated tests for validating correct firmware operation.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION.html b/site/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION.html new file mode 100644 index 00000000..b4387952 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION.html @@ -0,0 +1,137 @@ + + + + + + + +Document API IEC60730 Library: Watchdog Automated Verification Tests + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Classes | +Functions | +Variables
    +
    +
    Watchdog Automated Verification Tests
    IEC60730 Test Specification » Integration Test Modules In Library IEC60730
    +
    +
    + +

    Python script for the IEC60730 Watchdog timer Verification tests. +More...

    + + + + + +

    +Classes

    class  integration_test_iec60730_watchdog.iec60730_watchdog
     IEC60730 Watchdog Verification Tests. More...
     
    + + + +

    +Functions

    +bytes integration_test_iec60730_watchdog.int_to_bytes (int number)
     
    + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Variables

    + integration_test_iec60730_watchdog.hostIP = os.getenv('HOST_IP')
     IP address of device.
     
    + integration_test_iec60730_watchdog.chip_name = os.getenv('CHIP')
     Chip name run test.
     
    + integration_test_iec60730_watchdog.lst_file_path = os.getenv('LST_PATH')
     Path to file *.lst.
     
    + integration_test_iec60730_watchdog.adapter_serial_no = os.getenv('ADAPTER_SN')
     serialno of device
     
    + integration_test_iec60730_watchdog.lib_path = os.getenv('JLINK_PATH')
     Path to jlink library.
     
    + integration_test_iec60730_watchdog.wdog1_present = os.getenv('INTEGRATION_TEST_WDOG1_ENABLE')
     Enable test watchdog 1.
     
    + integration_test_iec60730_watchdog.line = sys.argv.pop()
     Number of arguments passed into the script file.
     
    + integration_test_iec60730_watchdog.compiler = line
     compiler creates the file *.lst
     
    +

    Detailed Description

    +

    Python script for the IEC60730 Watchdog timer Verification tests.

    +

    For details on the tests, see iec60730_watchdog.iec60730_watchdog.

    +

    +Test Results

    +

    EFR32 Device | Test Results ----------—|----------—

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION__UNIT__TEST.html b/site/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION__UNIT__TEST.html new file mode 100644 index 00000000..06e53b23 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__WATCHDOG__VERIFICATION__UNIT__TEST.html @@ -0,0 +1,408 @@ + + + + + + + +Document API IEC60730 Library: Watchdog Verification Unit Tests + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Functions
    +
    +
    Watchdog Verification Unit Tests
    IEC60730 Test Specification » UNIT Test Functions In Modules In Library IEC60730
    +
    +
    + +

    Header file list of test cases for the verification operate functions in watchdog module. +More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void unit_test_iec60730_watchdog_set_up (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_por (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_em4 (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_wdog0 (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_wdog1 (void)
     
    bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min (void)
     
    void unit_test_iec60730_watchdog_mock_rstcause_clear (void)
     
    uint32_t unit_test_iec60730_watchdog_mock_rstcause (void)
     
    void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog (void)
     
    void test_sl_iec60730_watchdog_post_wachdog_reset_before_por (void)
     
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success (void)
     
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail (void)
     
    void test_sl_iec60730_watchdog_post_reset_resason_no_valid (void)
     
    void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value (void)
     
    +

    Detailed Description

    +

    Header file list of test cases for the verification operate functions in watchdog module.

    +

    IEC60730 Watchdog Unit Tests

    +

    These test cases run unit tests to check the operation of the functions in watchdog module.

    +

    Hardware setup:

    +
      +
    • Connect DUT to PC. No additional hardware setup required.
      • +
    +

    Function Documentation

    + +

    ◆ test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value (void )
    +
    +

    Public Check sl_iec60730_watchdog_post() operate

    +
    Returns
    None.
    +

    Check the function sl_iec60730_watchdog_post() operation when checking condition to prevent unexpected changed value when reset or return from power saving mode. If iec60730_watchdog_count value >= SL_IEC60730_WDOGINST_NUMB after device power on reset, the function sl_iec60730_watchdog_post() return result is SL_IEC60730_TEST_FAILED

    + +
    +
    + +

    ◆ test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog (void )
    +
    +

    Public Check sl_iec60730_watchdog_post() operate

    +
    Returns
    None.
    +

    If reset causes are not POR and not watchdog reset then no action. Value return by function sl_iec60730_watchdog_post() is SL_IEC60730_TEST_PASSED.

    + +
    +
    + +

    ◆ test_sl_iec60730_watchdog_post_reset_resason_no_valid()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_watchdog_post_reset_resason_no_valid (void )
    +
    +

    Public Check sl_iec60730_watchdog_post() operate

    +
    Returns
    None.
    +

    When the device is reset by power on reset first set the variable iec60730_watchdog_state to the value SL_IEC60730_WATCHDOG_TESTING, then check the watchdog reset. If sli_iec60730_set_watchdog_timout_min() is set successfully, and the device does not wake up from EM4, all Watchdogs are tested then finished. The cause of the reset is not by watchdog, the function sl_iec60730_watchdog_post() return result is SL_IEC60730_TEST_PASSED

    + +
    +
    + +

    ◆ test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail (void )
    +
    +

    Public Check sl_iec60730_watchdog_post() operate

    +
    Returns
    None.
    +

    When the device is reset by power on reset first set the variable iec60730_watchdog_state to the value SL_IEC60730_WATCHDOG_TESTING, then check the watchdog reset. If sli_iec60730_set_watchdog_timout_min() is failed, then after call sl_iec60730_watchdog_post() again, return result is SL_IEC60730_TEST_FAILED

    + +
    +
    + +

    ◆ test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success (void )
    +
    +

    Public Check sl_iec60730_watchdog_post() operate

    +
    Returns
    None.
    +

    When the device is reset by power on reset first set the variable iec60730_watchdog_state to the value SL_IEC60730_WATCHDOG_TESTING, then check the watchdog reset. If sli_iec60730_set_watchdog_timout_min() is set successfully, and the device does not wake up from EM4, all Watchdogs are tested then finished. The cause of the reset is by watchdog, the function sl_iec60730_watchdog_post() return result is SL_IEC60730_TEST_PASSED

    + +
    +
    + +

    ◆ test_sl_iec60730_watchdog_post_wachdog_reset_before_por()

    + +
    +
    + + + + + + + + +
    void test_sl_iec60730_watchdog_post_wachdog_reset_before_por (void )
    +
    +

    Public Check sl_iec60730_watchdog_post() operate

    +
    Returns
    None.
    +

    When the device is reset by power on reset after watchdog reset, the variable iec60730_watchdog_state does not set to the value SL_IEC60730_WATCHDOG_TESTING, then check return value is SL_IEC60730_TEST_FAILED

    + +
    +
    + +

    ◆ unit_test_iec60730_watchdog_mock_rst_em4()

    + +
    +
    + + + + + + + + +
    bool unit_test_iec60730_watchdog_mock_rst_em4 (void )
    +
    +

    Public Function replaces the value for the device being reset by EM4 Wakeup. Only used for unit testing.

    +
    Returns
    boolean.
    + +
    +
    + +

    ◆ unit_test_iec60730_watchdog_mock_rst_por()

    + +
    +
    + + + + + + + + +
    bool unit_test_iec60730_watchdog_mock_rst_por (void )
    +
    +

    Public Function replaces the value for the device being reset by Power On Reset. Only used for unit testing.

    +
    Returns
    boolean.
    + +
    +
    + +

    ◆ unit_test_iec60730_watchdog_mock_rst_wdog0()

    + +
    +
    + + + + + + + + +
    bool unit_test_iec60730_watchdog_mock_rst_wdog0 (void )
    +
    +

    Public Function replaces the value for the device being reset by Watchdog 0. Only used for unit testing.

    +
    Returns
    boolean.
    + +
    +
    + +

    ◆ unit_test_iec60730_watchdog_mock_rst_wdog1()

    + +
    +
    + + + + + + + + +
    bool unit_test_iec60730_watchdog_mock_rst_wdog1 (void )
    +
    +

    Public Function replaces the value for the device being reset by Watchdog 1. Only used for unit testing.

    +
    Returns
    boolean.
    + +
    +
    + +

    ◆ unit_test_iec60730_watchdog_mock_rstcause()

    + +
    +
    + + + + + + + + +
    uint32_t unit_test_iec60730_watchdog_mock_rstcause (void )
    +
    +

    Public The function replaces the value of the RSTCAUSE register indicating the cause of the reset. Only used for unit testing

    +
    Returns
    Value RSTCAUSE register.
    + +
    +
    + +

    ◆ unit_test_iec60730_watchdog_mock_rstcause_clear()

    + +
    +
    + + + + + + + + +
    void unit_test_iec60730_watchdog_mock_rstcause_clear (void )
    +
    +

    Public Function replaces watchdog clear register rstcause. Only used for unit testing.

    +
    Returns
    None.
    + +
    +
    + +

    ◆ unit_test_iec60730_watchdog_mock_set_watchdog_timout_min()

    + +
    +
    + + + + + + + + +
    bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min (void )
    +
    +

    Public Function replaces watchdog timeout min set value successfully or not. Only used for unit testing.

    +
    Returns
    boolean.
    + +
    +
    + +

    ◆ unit_test_iec60730_watchdog_set_up()

    + +
    +
    + + + + + + + + +
    void unit_test_iec60730_watchdog_set_up (void )
    +
    +

    Public Function setup condition before running test case. Only used for unit testing.

    +
    Returns
    None.
    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__IEC60730__WDOG__TEST.html b/site/document_api_iec60730_library/group__IEC60730__WDOG__TEST.html new file mode 100644 index 00000000..d7db79d2 --- /dev/null +++ b/site/document_api_iec60730_library/group__IEC60730__WDOG__TEST.html @@ -0,0 +1,318 @@ + + + + + + + +Document API IEC60730 Library: Watchdog Check + + + + + + + + + +
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    Document API IEC60730 Library +
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    +Classes | +Macros | +Enumerations | +Functions | +Variables
    +
    +
    Watchdog Check
    EFR32 IEC60730 Library
    +
    +
    + +

    Monitors CPU execution. +More...

    + + + + + +

    +Classes

    struct  sl_iec60730_watchdog_t
     Watchdog component configuration structure. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    +#define SL_IEC60730_WDOGINST_NUMB   1
     Default configuration number of enabled watchdog.
     
    +#define SL_IEC60730_WDOG_WAIT_TIMEOUT   (uint32_t) 0x0000FFFFUL
     Timeout time to wait for wachdog to reset.
     
    +#define SL_IEC60730_WDOG_INST(n)   WDOG##n
     Define gets the default value of watchdog(n).
     
    +#define SL_IEC60730_RST   RMU
     Hardware manages the reset cause of the device. With series 2 is EMU.
     
    +#define SL_IEC60730_RSTCAUSE_POR   RMU_RSTCAUSE_PORST
     The reset cause of the device is power on reset.
     
    +#define SL_IEC60730_RSTCAUSE_EM4   RMU_RSTCAUSE_EM4RST
     The reset cause of the device is em4 reset.
     
    +#define SL_IEC60730_RSTCAUSE_WDOG0   RMU_RSTCAUSE_WDOGRST
     The reset cause of the device is watchdog reset.
     
    +#define SL_IEC60730_RSTCAUSE_WDOG1   RMU_RSTCAUSE_WDOGRST
     The reset cause of the device is watchdog reset.
     
    +#define SL_IEC60730_RSTCAUSES_CLEAR()
     Function macro clear hardware reset cause bit SL_IEC60730_RST.
     
    +#define SL_IEC60730_RSTCAUSE   (SL_IEC60730_RST->RSTCAUSE)
     Enable bit flag clear causes reset.
     
    +#define SL_IEC60730_RSTCAUSE   (SL_IEC60730_RST->RSTCAUSE)
     Enable bit flag clear causes reset.
     
    +#define SL_IEC60730_RST_POR   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_POR)
     
    +#define SL_IEC60730_RST_EM4   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_EM4)
     
    +#define SL_IEC60730_RST_WDOG0   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG0)
     
    +#define SL_IEC60730_RST_WDOG1   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG1)
     
    +#define SL_IEC60730_RST_WDOGS   (SL_IEC60730_RST_WDOG0 || SL_IEC60730_RST_WDOG1)
     
    +#define SL_IEC60730_BURAM_IDX   0UL
     index buram to store the value
     
    +#define SL_IEC60730_WDOG0_ENABLE   1
     Enable Watchdog 0.
     
    +#define SL_IEC60730_WDOG1_ENABLE   0
     Enable Watchdog 1.
     
    +#define SL_IEC60730_SAVE_STAGE_ENABLE   0
     Enable saving iec60730_watchdog_state to backup RAM on Series 2.
     
    +#define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE   1
     Reset cause flags in the RSTCASUES register.
     
    + + + + +

    +Enumerations

    enum  sl_iec60730_test_watchdog_t { SL_IEC60730_WATCHDOG_INVALID = 0, +SL_IEC60730_WATCHDOG_TESTING = 1, +SL_IEC60730_WATCHDOG_VALID = 2 + }
     State of watchdog testing. More...
     
    + + + + + +

    +Functions

    void sl_iec60730_restart_watchdogs (void)
     
    sl_iec60730_test_result_t sl_iec60730_watchdog_post (void)
     
    + + + +

    +Variables

    volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state
     
    +

    Detailed Description

    +

    Monitors CPU execution.

    +

    For IEC60730, a watchdog timer must be enabled to validate proper operation of the Program Counter. A watchdog timer resets the device if it has not been restarted.

    +

    +Hardware Architecture

    +

    The second implementation has a dedicated watchdog peripheral WDOG0, WDOG1 watchdog timers in the EFR32 family.

    +
    Warning
    - The watchdog timer must be disabled during flash page erase.
    +

    +Failure Risks

    +

    The watchdog timer will force entry into Safe State if the firmware program execution does not return to the BIST quick enough. This will detect a failure that causes the CPU to halt or enter an infinite loop. The watchdog timer POST verifies that a watchdog timer reset is possible.

    +

    OEMs must ensure that their system works reliably in all modes of operation using the watchdog timeout. Insufficient testing may allow for firmware states that inadvertently trigger a watchdog reset.

    +

    +Software Architecture

    +

    For the EFR32 IEC60730 implementation, Figure 1 shows the logic flow chart of the Watchdog Timer during POST. The POST test determines if the reset source was a power-on, and if so, validates that a watchdog reset can occur. If the reset source was a watchdog reset, it determines if the watchdog reset was expected as part of POST testing, or unexpected. An unexpected reset causes immediate sl_iec60730_safe_state() entry. Otherwise normal operation continues.

    +
    + +
    +Figure 1 Flow chart of watchdog timer POST validation
    +

    The main loop must execute sl_iec60730_bist() faster than the nominal timeout, or call sl_iec60730_restart_watchdogs(). After sl_iec60730_bist() has confirmed all modules are operating correctly it restarts the Watchdog Timer with sl_iec60730_restart_watchdogs(). If a module is not operating correctly, sl_iec60730_bist() calls sl_iec60730_safe_state(). sl_iec60730_safe_state() will call sl_iec60730_restart_watchdogs() continuously. The system must be powered down and restarted to resume normal operation.

    +

    The function sl_iec60730_watchdog_post() will set the timeout period (PERSEL) to minimum when check watchdog units to avoid wasting time.

    +

    +Software Configuration

    +

    The number of watchdog units that are tested by lib is defined by config code by defining the macros "#SL_IEC60730_WDOGINST_NUMB" and SL_IEC60730_WDOGx_ENABLE (x = 0, 1). The number of Watchdog unit depends on target EFR32 series. Example for series 1:

    +
      +
    • #define SL_IEC60730_WDOGINST_NUMB 1
      • +
    • #define SL_IEC60730_WDOG0_ENABLE 1
      • +
    +

    User can define macro SL_IEC60730_WDOG_INST(n) to select appropriate watchdog peripheral. User can define macro SL_IEC60730_RST to select appropriate reset peripheral.

    +

    If these macros are not defined then the default configuration will be used.

    +

    To clear reset cause flags in the RSTCASUES register after watchdog testing completed -> Enable the definition of macro SL_IEC60730_RSTCAUSES_CLEAR_ENABLE on file sl_iec60730_config.h. By default this feature is disabled.

    +

    If the Watchdog module is build in secure mode then the macro must not be defined SL_IEC60730_NON_SECURE_ENABLE and defined SL_TRUSTZONE_SECURE to enable the lib using secure address of the watchdog peripheral.

    +
    Warning
      +
    • The static variable iec60730_watchdog_count must be located at memory location that is not cleared when system startup (section ".ram_no_clear").
      • +
    • The global variable iec60730_watchdog_state must be located at memory location that is not cleared when system startup. And it should be located at section ram_no_clear in RAM block that is available on EFR32 Series 1 devices (section ".ram_no_clear"). This will avoid the missing contain of the variable when device returns from the power saving mode EM4.
      • +
    +
    +

    On EFR32 Series 2 devices, they have backup RAM (BURAM) that could be used to save value of the variable. To enable saving iec60730_watchdog_state to backup RAM on Series 2, enable the macro SL_IEC60730_SAVE_STAGE_ENABLE on file sl_iec60730_config.h. By default it will be disabled. Define macro SL_IEC60730_BURAM_IDX to select which register of the BURAM will be used. The default value is 0x0.

    +

    Enumeration Type Documentation

    + +

    ◆ sl_iec60730_test_watchdog_t

    + +
    +
    + + + + +
    enum sl_iec60730_test_watchdog_t
    +
    + +

    State of watchdog testing.

    + + + + +
    Enumerator
    SL_IEC60730_WATCHDOG_INVALID 

    Watchdog POST test not done.

    +
    SL_IEC60730_WATCHDOG_TESTING 

    Watchdog POST testing in progress.

    +
    SL_IEC60730_WATCHDOG_VALID 

    Watchdog POST test complete, watchdog valid.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ sl_iec60730_restart_watchdogs()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_restart_watchdogs (void )
    +
    +

    public IEC60730 Watchdog Restart

    +
    Returns
    None.
    +

    This function abstracts the differences between the EFR32 family watchdog timers. OEMs can call it during long duration executions to restart the watchdog timer.

    + +
    +
    + +

    ◆ sl_iec60730_watchdog_post()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t sl_iec60730_watchdog_post (void )
    +
    +

    public IEC60730 Watchdog Power On Self Test

    +
    Returns
    sl_iec60730_test_result_t If a non-watchdog reset occurred, test watchdog (will not return). Otherwise determine if watchdog reset was planned or unplanned. Unplanned watchdog resets result in failure and entry to Safe State. Planned watchdog resets return SL_IEC60730_TEST_PASSED.
    +

    This function will test the watchdog timer by forcing a watchdog reset on the first power-up. Any subsequent watchdog reset forces entry into sl_iec60730_safe_state().

    +
    Warning
    Remove all accesses to Watchdog Timer hardware from init device. Reset state of pins must be safe for the device. During POST test, device pins will be kept in reset state while validating watchdog reset.
    + +
    +
    +

    Variable Documentation

    + +

    ◆ iec60730_watchdog_state

    + +
    +
    + + + + +
    volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state
    +
    +

    Global variable used to track watchdog testing state.

    +
    Warning
    Must be placed in a memory area not cleared to 0x0 on start!
    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__efr32__iec60730.html b/site/document_api_iec60730_library/group__efr32__iec60730.html new file mode 100644 index 00000000..3f8ec0b4 --- /dev/null +++ b/site/document_api_iec60730_library/group__efr32__iec60730.html @@ -0,0 +1,465 @@ + + + + + + + +Document API IEC60730 Library: EFR32 IEC60730 Library + + + + + + + + + +
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    +
    Document API IEC60730 Library +
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    +Modules
    +
    +
    EFR32 IEC60730 Library
    +
    +
    + +

    Overview and documentation of IEC60730 library APIs. +More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Modules

     BIST
     Built In Self Test - Executed periodically.
     
     CPU Registers Check
     Verifies CPU registers are working correctly.
     
     IRQ Check
     Verifies interrupt frequency is within bounds.
     
     Invariable Memory Check
     Verifies contents of flash memory.
     
     OEM External Communications Example using UART
     Verifies communication channel is operating as expected.
     
     POST
     Power On Self Test - Executed once during power up.
     
     Program Counter Check
     Verifies all tests have completed on time.
     
     Safe State
     When incorrect behavior is detected, this state prevents further execution.
     
     System Clock Check
     Verifies that system clocks are within expected frequencies.
     
     Variable Memory Check
     Verifies RAM is working correctly.
     
     Watchdog Check
     Monitors CPU execution.
     
    +

    Detailed Description

    +

    Overview and documentation of IEC60730 library APIs.

    +

    +Introduction

    +

    The IEC60730 library for EFR32 provides a basic implementation required to Support the requirements found in Table H.1 in the IEC60730 specification. It includes all the Power On Self Test (POST) functions executed when a device is first powered on, as well as Built In Self Test (BIST) functions that are called periodically to ensure correct operation. Certain portions of the requirements require a detailed understanding of The system is under development.  Callback functions must be completed by the developer to guarantee meeting the full specification. These include a Safe State function used when validation detects an anomaly, properly implemented communications channels (redundancy, error detection, periodic communications), and Plausibility functions to validate system state (internal variables and inputs/outputs).

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com Source code in this repo is covered by one of several different licenses. The default license is the Master Software License Agreement (MSLA) MSLA, which applies unless otherwise noted.

    +

    During the unit test build process, some third-party code will be added to this repository and separated into another license. An example can be found in the build/_deps directory, where the Unity library uses the MIT license.

    +

    +IEC60730 Certificate

    +

    The final certificate and detailed report shall be provided for the specific devices.

    +

    +OEM Testing

    +

    Once OEMs have completed integrating their system with the IEC60730 Library, they will need to certify their device with a qualified certification house.

    +

    +Supported Families

    +

    This library supports all EFR32MG devices listed in the Selector Guide.

    +

    +Software Requirements

    +

    The IEC60730 library dependencies:

      +
    1. CMSIS package.
      2. +
    2. Silicon Labs Devices header files.
      3. +
    +

    Users could get dependency source files from the GSDK suite (platform). To get the latest version of GSDK, please refer to Gecko SDK.

    +
    Note
    The IEC60730 library support extension for GSDK 4.4.2 using Simplicity Studio 5.
    +

    Details on the validation test setup used internally by Silicon Labs can be found at IEC60730 Test Specification. Test results can be found inside each module.

    +

    Currently tested on Windows and Linux platforms.

    +

    +Building the IEC60730 Demo

    +

    To use Simplicity Studio to generate and build a demo IEC60730 and OEM Customization, refer to the IEC60730 Safety Library Integration to SDK in the docs folder for more details.

    +

    See OEM Customization for details on customizing the project and adding custom code.

    +
    Warning
    While source code is provided for the IEC60730 library, Silicon Labs recommends using the certified library file. When applying for certification, the certified library file will reduce the certification time.
    +
    Note
    The Simplicity Studio debugger will allow breakpoints and code tracing into the IEC60730 library, except for sl_iec60730_cpu_registers_bist(), since that test requires special compiler commands. To set breakpoints or trace inside sl_iec60730_cpu_registers_bist(), set a breakpoint inside sl_iec60730_bist() at the line with sl_iec60730_cpu_registers_bist(), and single-step into the function.
    +

    +Generate document API

    +

    +Generate document

    +

    Using Doxygen to generate HTML documentation, the documents will be generated in docs/document_api_iec60730_library

    +
    $ sudo apt-get install doxygen
    +
    $ doxygen iec60730.doxygen
    +

    Using MkDocs to support read mark-down files.

    +

    +MkDocs

    +

    MkDocs User Guide:

    + +

    MkDocs markdown fetaures and syntax reference:

    + +

    Search for icons and Emojis:

    + +

    +Install MkDocs

    +

    *Step 1:** Install mkdocs

    +
    pip3 install mkdocs
    +

    *Step 2:** Install mkdocs-material

    +
    pip3 install mkdocs-material
    +

    *Step 3:** Install mkdocs-material-extensions

    +
    pip3 install mkdocs-material-extensions
    +

    +Verify and build your documentaion

    +
      +
    • Ensure you have mkdocs.yml file in place
      • +
    • Preview your documentation locally
      • +
    +
    python3 -m mkdocs serve
    +
      +
    • If you want to use your browser to read your docs locally. Build the pages in the folder ./site, which will be added to your project. It will starting from the site/index.html
      • +
    +
    python3 -m mkdocs build --no-directory-urls
    +
    Note
    To support running Github Pages, you need to run the command above.
    +

    +Coding convention tool

    +

    +Features

    +
      +
    • Automatically fixes end-of-file issues.
      • +
    • Removes trailing whitespace from lines.
      • +
    • Identifies and suggests fixes for common spelling errors using codespell.
      • +
    • Formats code according to specified Uncrustify rules base on Silabs's coding standard.
      • +
    • Checks for identifiers naming style mismatch of function, definition, struct, variable using clang-tidy.
      • +
    • Checks code for potential errors and style issues using cppcheck.
      • +
    +

    +Installation

    +

    Recommended version:

      +
    • Codespell 2.2.4
      • +
    • Uncrustify 0.72.0
      • +
    • Clang tidy 14.0.0
      • +
    • Cppcheck 1.9
      • +
    +
    $ pip install pre-commit
    +
    $ sudo apt install uncrustify clang-tidy cppcheck
    +

    +Run

    +

    Run pre-commit install to install pre-commit into your git hooks. pre-commit will now run on every commit:

    +
    $ pre-commit install
    +

    Staging files need formatting. For example:

    +
    $ git add data_format_sample.c
    +

    Run pre-commit hooks on a repository to check coding convention.

    +
    $ pre-commit run --all-files
    +

    +Compiler specifications

    +

    The C compilers:

    +
      +
    • GNU GCC V12.2
      • +
    • IAR EW for ARM V9.20
      • +
    +

    Tools specification

    +
      +
    • Test frame work tools:
        +
      • Python V3.11
        • +
      +
      • +
    • Simplicity Studio Commander
        +
      • Simplicity Commander version 1v16p8b1613
        • +
      +
      • +
    • Support CMake
        +
      • CMake version >=3.25
        • +
      +
      • +
    • SEGGER JLink
        +
      • JLink version 17.0.11
        • +
      +
      • +
    • SLC-CLI
        +
      • slc version 5.9.1.1
        • +
      +
      • +
    • Source code control:
        +
      • GIT V2.39
        • +
      • JIRA V8.22.2
        • +
      +
      • +
    • SDK support:
        +
      • Gecko SDK Suite v4.4.2
        • +
      +
      • +
    +
    Note
    If you want this extension to match your geck_sdk change the sdk field in the iec60730.slce file. For example, you want to use simplicity sdk version:
    sdk:
    +
    id: simplicity_sdk
    +
    version: 2024.6.1
    +
    +

    +System Architecture

    +

    This library consists of two main components. The POST component operates immediately after the power is turned on, validating the system state before entering the main execution loop.

    +

    The BIST component is executed periodically within the main execution loop.

    +

    Validation for IEC60730 also requires external communications validation. Each OEM application has unique external communication requirements. This library includes an example UART communications library that complies with IEC60730 standards. OEMs must adapt their communications to meet the requirements outlined in IEC60730.

    +

    The file oem_iec60730.c contains functions and variables that OEMs should modify to suit their specific systems.

    +

    This EFR32 IEC60730 library fulfills the requirements for a Class B device. Table 1 outlines the firmware requirements that must be met by controls, as specified in IEC60730, including new entries from Annex H.

    +

    Table 2 details the firmware-specific requirements for software-based controls, derived from Table H.1 in IEC60730.

    +
    Table 1 Requirements that must be met by controls

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Information Clause Method [1] Notes specific to this library [2]
    36 Limits of activating quantity 11.3.2 H.11.4.15 H.17.14 H.18.1.5 H.27.1.1 H.28 X Not Applicable
    52 Minimum parameters of any heat dissipator 14 X Not Applicable
    53 Type of output waveform if other than sinusoidal H.25 X Not Applicable
    54 Details of the leakage current waveform produced after failure of the basic insulation H.27 X Not Applicable
    55 Relevant parameters of electronic devices unlikely to fail H.27 X Not Applicable
    56 Type of output waveform produced after failure of an electronic device H.27 X Not Applicable
    57 The effect on controlled outputs after electronic circuit component failure H.27 X To be provided by OEM
    58b The effect on controlled outputs after a failure to operate as a result of tests H.26.2 H.26.15 X Not Applicable
    66 Software sequence documentation H.11.12.2.9 D Covered by this documentation
    67 Program documentation H.11.12.2.9 H.11.12.2.12 D Covered by this documentation
    68 Software fault analysis H.11.12 H.27.1.1.4 D Covered by this documentation
    69 Software class(es) and structure H.11.12.2 H.11.12.3 H.27.1.2.2.1 H.27.1.2.3.1 D Covered by this documentation
    70 Analytical measure and fault/error control techniques employed H.11.12.1.2 D Covered by this documentation
    71 Software fault/error detection times for controls H.2.17.10 X Provided by OEM timer ticks. Example uses 1 second.
    72 Control responses in case of detected fault/error H.11.12.2.7 X Must be provided by OEM
    73 Controls subjected to a second fault analysis and declared condition as a result of the second fault H.27.1.2.3 X Must be provided by OEM
    74. External load and emission control measures to be used for test purposes H.23.1.1 X Not Applicable
    91 Fault reaction time H.2.23.2 H.27.1.2.2.2 H.27.1.2.2.3 H.27.1.2.3.2 H.27.1.2.3.3 H.27.1.2.4.2 H.27.1.2.4.3 X Provided by OEM timer ticks. Example uses 1 second.
    92 Class or classes of control functions H.6.18 H.27.1.2.2 H.27.1.2.3 D This library is for Class B control functions
    93 Maximum number of reset actions within a time period H.11.12.4.3.6 H.11.12.4.3.4 X Not Applicable
    94 Number of remote reset actions H.17.1.4.3 X Not Applicable
    +
      +
    1. Methods (See IEC60730 documentation for additional details):
        +
      • C - Marking
        • +
      • D - Hard copy
        • +
      • E - Documentation on electronic media, internal or external
        • +
      • X - Declaration on materials provided to the certification body
        • +
      +
      2. +
    2. OEMs are still responsible for providing any documentation for software outside the IEC60730 library.
      3. +
    +
    Table 2 Measures to address software fault/errors

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Component Measure Used Notes
    1.1 Registers Periodic self-test using a Static memory test Provided by library
    1.2 Instruction decoding and execution None Not required for Class B
    1.3 Program counter / Watchdog Logical monitoring of the program sequence. Code execution sets flag that is periodically checked. Watchdog timer prevents runaway program execution. Provided by library, see example for integration sample
    1.4 Addressing None Not required for Class B
    1.5 Data paths Instruction decoding None Not required for Class B
    2 Interrupt handling and execution Time-slot monitoring(upper and lower limit) Provided by library, see example for integration sample
    3 Clock Reciprocal Comparison. Use separate oscillator to monitor SYSCLK - Calculate ratio and determine range based on accuracy Provided by library, see example for integration sample
    4.1 Invariable memory Periodic 16 bit CRC Provided by library, see example for integration sample
    4.2 Variable memory Periodic static memory test using March-C & stack guard. Provided by library, see example for integration sample
    4.3 Addressing (variable and invariable memory) 4.1 and 4.2 provide coverage for this component
    5.1 Internal data path 4.1 and 4.2 provide coverage for this component
    5.2 Internal addressing 4.1 and 4.2 provide coverage for this component
    6 External Communication Provided by OEM, UART example in library
    6.1 External Communications - Data 16 bit CRC CRC check provided by library
    6.2 External Communications - Addressing 16 bit CRC including the address OEM must include in protocol proper address verification - see UART example in library
    6.3 External Communications - Timing (UART example) Scheduled transmission OEM must include in protocol proper timing measures - see UART example in library
    7 Input/output periphery / 7.1 Digital I/O Plausibility check Provided by OEM
    7.2 Analog I/O / 7.2.1 A/D and D/A converter Plausibility check Provided by OEM
    7.2.2 Analog multiplexer Plausibility check Provided by OEM
    8 Monitoring device and comparators None Not needed for class B
    9 Custom chips None Not Applicable
    +

    +Test Specifications

    +

    Test Specifications provide detailed specifications for verification testing.

    +

    +Coding Standard

    +

    The IEC60730 library follows Silicon Labs Coding Standard.

    +

    +Support

    +

    Customers with support questions can begin with the Silicon Labs support page. Customers can also post their questions to the Silicon Labs Community Forums for help from other Silicon Labs customers.

    +

    If a customer needs help with a complex issue, create a Support Request on the support page. The Silicon Labs MCU Applications Engineering team will assist with duplicating the problem and understanding the root cause.

    +

    +Change Control and Update process

    +

    The IEC60730 library is a complex software project that will require ongoing support and updates in the future. This section outlines how Silicon Labs will assist customers with their implementation and release updates for the IEC60730 library.

    +

    Once an issue is confirmed to be a problem with the IEC60730 Library, a JIRA ticket must be filed within the Developer Services Team project (DS), starting with the prefix "IEC60730: ".The team lead will assess each issue and assign a severity level, which can be categorized as follows:

      +
    • Blocker (Customer cannot move forward/is lines-down)
      • +
    • Critical (Customer can proceed, but with major inconvenience/no workaround)
      • +
    • High (Customer can proceed with minor inconvenience/workaround)
      • +
    • Low (Customer can proceed with no inconvenience, no workaround necessary). Each ticket will also include information about the impact of the change on the library and an estimated timeline for implementation.
      • +
    +

    The issue ticket will be assigned to the Developer Services Team manager later. At their discretion, they may convene a meeting with the IEC60730 Change Control Board (comprising the DS team lead) to discuss the open JIRA tickets for the IEC60730 Library. After the meeting, Tickets on JIRA will be created and determine whether the issue ticket will be fixed or not. The status of each ticket JIRA will be updated accordingly, and work will be delegated to the appropriate firmware team members. Work will be conducted in a separate branch from the main branch within the Git Version Control System.

    +

    Once the updated firmware is complete, the developer will check it into the Silicon Labs Git version control system and create a Code Review JIRA ticket. A review developer will then examine the code to ensure compliance with the Coding Standard. If feasible, a Git Pull Request will be created between the two revisions of the source code. Any comments from the review developer will be logged in a Git branch of the IEC60730 project. The Git commit ID will be linked to the Code Review JIRA ticket. The developer is responsible for addressing the comments from the code review and providing explanations for any declined changes.

    +

    Following these steps, the version of the IEC60730 library will be incremented. For any issues resolved, an automated test will be created to replicate the previous issue and demonstrate that it no longer exists in the new library. The developer must also confirm that the Python code functions correctly when the original tests are executed.

    +

    If an issue cannot be validated through automated testing, a special waiver must be obtained from the Change Control Board, with instructions for manual testing included in the documentation for the affected module. A complete automated and manual validation cycle must be completed before the updated library is ready for release. This is done by initiating a Daily Firmware build job in the Jenkins build and test environment, using the Git branch as the source.

    +

    Once the Daily Firmware build job and any required manual tests confirm the correct operation of the firmware, the branch will be merged back into the master branch. A Release Build will then be triggered in Jenkins, using the new release version along with the master branch.

    +

    The MCU FW Team Manager must sign off on the validation results via JIRA. After the library passes validation, the updated library, along with a change list, will be submitted to the certification house for re-certification. Upon completion of re-certification, an Errata document will be created or updated to include a list of all resolved and unresolved issues, along with any available workarounds.

    +

    The new library, along with the Errata document and an updated Readme file containing the new version number, will be uploaded to the Silicon Labs downloads site and made available through Simplicity Studio.

    +

    +OEM Customization and Integration

    +

    An OEM must be aware of these items when integrating the IEC60730 library into their final product.

    +
    Warning
    Any certification image must use the Release source files of the IEC60730 library.
    +

    +Safe state

    +

    OEMs must customize the sl_iec60730_safe_state() function according to their system configuration. Safe State must configure any external signals and communications channels such that the system will not cause damage or unexpected operation. The function may attempt external notification, however it must be done cautiously to prevent further deterioration of the system.

    +

    +POST

    +

    sl_iec60730_post() is normally called after system initialization is complete, but before beginning primary operating mode. It includes a Watchdog test that resets the system to verify Watchdog operation. OEMs must expect initialization code before sl_iec60730_post() to execute twice. Initialization code execution time must be short enough that the watchdog can be refreshed in sl_iec60730_post() before expiration.

    +

    +BIST

    +

    sl_iec60730_bist() is executed as part of the main system loop, typically at the end. Systems with long execution times will require manual watchdog refresh, and adjustment of sl_iec60730_test_clock_tick() frequency to ensure sl_iec60730_program_counter_test() passes, or calling sl_iec60730_bist() at multiple locations in the main system loop.

    +

    When in safety-critical code where POST and BIST are executing, interrupts should remain globally enabled. If interrupts must be disabled for a critical section of firmware, the critical section should follow best practices and be as short as possible. The time in the critical section must be shorter than the fastest clock timer interrupt (usually 10ms), or sl_iec60730_sys_clock_test_disable() must be used to disable the timer tests.

    +

    +Program counter

    +

    IEC60730_GPIO_COMPLETE and IEC60730_ANALOG_COMPLETE must be set by OEM validation code.

    +

    OEMs can use IEC60730_OEM0_COMPLETE - IEC60730_OEM7_COMPLETE or into sl_iec60730_program_counter_check to verify their own test algorithms are executing at least once per every call to sl_iec60730_program_counter_test(). Unused flags must be set to 1.

    +
    Warning
    sl_iec60730_bist() can take several ms to execute, see Execution Time for details. If the execution time is longer than the system can tolerate, customize the sl_iec60730_bist() routine or split it up into individual calls in the main system loop.
    +

    +Watchdog

    +

    User should setup the internal watchdog as user's design expectation.

    +

    When in a long latency loop, use sl_iec60730_restart_watchdogs() to prevent a watchdog reset. Minimize the time in the loop as much as possible.

    +
    Warning
    Call sl_iec60730_restart_watchdogs() to re-enable the watchdog once the flash erase has completed. During the flash erase time, any control signals must remain in a safe configuration. Watchdog Test provides details.
    +

    +IRQ

    +

    OEMs must update oem_irq_freq_bounds for their system use. Interrupt service routines must include code for incrementing oem_irq_exec_count. For an example, see oem_iec60730.c. OEMs must choose and enumerate the index values for oem_irq_exec_count.

    +
    Warning
    Interrupts are disabled during portions of the CPU Registers Check , Invariable Memory Check and Variable Memory Check . Interrupts must be tolerant of the latency times these tests introduce to servicing an interrupt.
    +

    +Clock

    +

    OEMs can modify the default System Clock and Timer Clock configurations in oem_iec60730_timer.c according to their system requirements.

    +

    +Invariable memory

    +

    OEMs must modify the sl_iec60730_imc_test_region_t structure to align with their memory usage. iec60730_cur_crc or similar must be modified to store the CRC values. The number of areas to be tested depends on the OEM

    +

    During the CRC generation for a block of memory, the CPU is halted and unable to respond to interrupt requests.

    +

    For a typical system, the amount of invariable memory checked will determine the fault reaction time.

    +

    +Variable memory

    +

    OEMs must modify the sl_iec60730_vmc_test_region_t structure to align with the RAM they want to check. The number of areas to be tested depends on the OEM.

    +

    During the CRC generation for a block of memory, the CPU is halted and unable to respond to interrupt requests.

    +

    +External communications

    +

    OEMs must write their safety-related communications protocol according to the IEC60730 requirements. The demo provides an example protocol test for UART 0.

    +

    +Additional OEM safety checks

    +

    OEMs can implement additional safety checks and call sl_iec60730_safe_state() with custom define SL_IEC60730_OEM_FAIL_1 - SL_IEC60730_OEM_FAIL_4 settings.

    +

    +Execution Time

    +

    The sizes given below are for the example programs demo provided by extension with the SDK.

    +

    OEM devices that do not use a communications channel(~400 bytes), or have simple plausilbity functions (~200 bytes), will use less space.

    +

    OEMs can use these numbers for planning purposes, but must verify against their implementation.

    +

    +BIST call frequency

    +

    All tests must complete execution before sl_iec60730_program_counter_test() is called. The example code calls sl_iec60730_program_counter_test() once per second.

    +

    The test requiring the most iterations to complete is the Invariable Memory Check and Variable Memory Check . It may require calls to sl_iec60730_bist() to guarantee all the invariable memory areas and variable memory areas are checked before sl_iec60730_program_counter_test() is called. This table assumes the largest invariable memory size for each device, and a check across the whole memory area.

    +

    The number of blocks per BIST call SL_IEC60730_INVAR_BLOCKS_PER_BIST is chosen to get the time between BIST calls close to the watchdog timeout.

    +

    Number of sl_iec60730_bist() calls/second = Size of memory / (Size of CRC block * number of blocks per BIST call)

    +

    Maximum time between BIST calls= 1 / (Number of sl_iec60730_bist calls)

    +

    Checking against smaller areas increase the time between BIST calls.

    +

    +Fault Reaction Time

    +

    The default Fault Reaction Time for the IEC60730 library is 1 second. Because of the BIST call frequency configuration above, a full invariable memory test can take 1 second to run on the largest memory EFR32 devices. The Program counter check runs once per second by default, and all completion bits must be set. OEMs can modify the Clock according to their needs to increase the Fault Reaction Time.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__sl__iec60730__bist.html b/site/document_api_iec60730_library/group__sl__iec60730__bist.html new file mode 100644 index 00000000..4cfd78fc --- /dev/null +++ b/site/document_api_iec60730_library/group__sl__iec60730__bist.html @@ -0,0 +1,200 @@ + + + + + + + +Document API IEC60730 Library: BIST + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Classes | +Functions
    +
    +
    BIST
    EFR32 IEC60730 Library
    +
    +
    + +

    Built In Self Test - Executed periodically. +More...

    + + + + +

    +Classes

    struct  sl_iec60730_safety_check_t
     
    + + + + + + + + + +

    +Functions

    void sl_iec60730_safety_check_error_occur (sl_iec60730_test_failure_t failure)
     
    void sl_iec60730_safety_check_reset_error (void)
     
    sl_iec60730_safety_check_t * sl_iec60730_safety_check_get_error (void)
     
    void sl_iec60730_bist (void)
     
    +

    Detailed Description

    +

    Built In Self Test - Executed periodically.

    +

    sl_iec60730_bist() confirms correct operation of the device during main loop execution. If a module validation fails, sl_iec60730_safe_state() is called.

    +

    OEM code must call sl_iec60730_safety_check_error_occur to set iec60730_safety_check to one of the failure conditions in sl_iec60730_test_failure_t if the code determines a failure has occurred. This can be used for communications channels or to trigger Safe State entry due to a failure within an interrupt.

    +

    The validation time for the full memory varies between devices depending on the size of memory available, and how frequently  sl_iec60730_bist() is called by the main loop. For details see BIST call frequency.

    +

    Periodic BIST execution is shown in Figure 1

    +

    + +
    +Figure 1 Flow chart of periodic BIST execution
    +

    Function Documentation

    + +

    ◆ sl_iec60730_bist()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_bist (void )
    +
    +

    public IEC60730 Built In Self Test

    +
    Returns
    None. If validation fails function never returns. If validation passes, function returns.
    +

    Each module is tested, and if a failure is detected sl_iec60730_safe_state() is called. If a test failure occurs outside this function (such as comms), called function sl_iec60730_safety_check_error_occur set iec60730_safety_check to sl_iec60730_test_failure_t.

    + +
    +
    + +

    ◆ sl_iec60730_safety_check_error_occur()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_safety_check_error_occur (sl_iec60730_test_failure_t failure)
    +
    +

    public IEC60730 save error to variable iec60730_safety_check

    +
    Parameters
    + + +
    failureEnum with the failing test, can be preserved for debug.
    +
    +
    +
    Returns
    None.
    +

    Called by OEM and interrupt check functions to set iec60730_safety_check to sl_iec60730_test_failure_t.

    + +
    +
    + +

    ◆ sl_iec60730_safety_check_get_error()

    + +
    +
    + + + + + + + + +
    sl_iec60730_safety_check_t* sl_iec60730_safety_check_get_error (void )
    +
    +

    public IEC60730 return value variable iec60730_safety_check

    +
    Returns
    pointer type sl_iec60730_safety_check_t point to variable containing the errors that occurred and the number of errors
    +

    Called by OEM in sl_iec60730_safe_state functions to get value iec60730_safety_check, so OEM can get all sl_iec60730_test_failure_t occur

    + +
    +
    + +

    ◆ sl_iec60730_safety_check_reset_error()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_safety_check_reset_error (void )
    +
    +

    public IEC60730 reset value local iec60730_safety_check

    +
    Returns
    None
    +

    Called by OEM when wanting to reset local variable value iec60730_safety_check which containing the errors that occurred and the number of errors

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__sl__iec60730__post.html b/site/document_api_iec60730_library/group__sl__iec60730__post.html new file mode 100644 index 00000000..c45c888f --- /dev/null +++ b/site/document_api_iec60730_library/group__sl__iec60730__post.html @@ -0,0 +1,549 @@ + + + + + + + +Document API IEC60730 Library: POST + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Classes | +Macros | +Enumerations | +Functions | +Variables
    +
    +
    POST
    EFR32 IEC60730 Library
    +
    +
    + +

    Power On Self Test - Executed once during power up. +More...

    + + + + +

    +Classes

    struct  sl_iec60730_library_version_t
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    #define UNUSED_VAR(x)   (void) (x)
     
    +#define __CONCAT(x, y)   x##y
     Macro merge separate words to be joined into a single word.
     
    +#define CONCAT(x, y)   __CONCAT(x, y)
     
    +#define STR(x)   #x
     Macro convert to string.
     
    +#define XSTR(x)   STR(x)
     
    #define LABEL_DEF(NAME)   LB_ASM volatile(LB_XSTR(NAME))
     
    #define __no_init
     
    #define DEC_CLASSB_VARS(vartype, name)
     
    #define EXTERN_DEC_CLASSB_VARS(vartype, name)
     
    #define sl_static_dec_classb_vars(vartype, name)
     
    #define INV_CLASSB_VAR(vartype, name)   CONCAT(name, _inv) = (vartype) (~(vartype) name)
     
    #define INV_CLASSB_PVAR(vartype, name)   CONCAT(name, _inv) = (vartype *) (~(vartype) name)
     
    #define CHECK_INTEGRITY(vartype, x)   ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, _inv)))
     
    + + + + + + + +

    +Enumerations

    enum  sl_iec60730_test_result_t { SL_IEC60730_TEST_FAILED = 0, +SL_IEC60730_TEST_PASSED = 1, +SL_IEC60730_TEST_IN_PROGRESS = 2 + }
     The result of a test. More...
     
    enum  sl_iec60730_test_failure_t {
    +  SL_IEC60730_NO_FAILURE = 0, +SL_IEC60730_TEST_VERIFY = 1, +SL_IEC60730_WATCHDOG_POST_FAIL = 2, +SL_IEC60730_VMC_FAIL = 3, +
    +  SL_IEC60730_IMC_FAIL = 4, +SL_IEC60730_CPU_REGISTERS_FAIL = 5, +SL_IEC60730_CLOCK_FAIL = 6, +SL_IEC60730_INTERRUPT_FAIL = 7, +
    +  SL_IEC60730_PROGRAM_COUNTER_FAIL = 8, +SL_IEC60730_GPIO_FAIL = 9, +SL_IEC60730_ANALOG_FAIL = 10, +SL_IEC60730_CS0_FAIL = 11, +
    +  SL_IEC60730_LESENSE0_FAIL = 12, +SL_IEC60730_RADIO_FAIL = 13, +SL_IEC60730_I2C0_FAIL = 14, +SL_IEC60730_I2C1_FAIL = 15, +
    +  SL_IEC60730_USART0_FAIL = 16, +SL_IEC60730_USART1_FAIL = 17, +SL_IEC60730_USART2_FAIL = 18, +SL_IEC60730_USART3_FAIL = 19, +
    +  SL_IEC60730_LEUART0_FAIL = 20, +SL_IEC60730_EUART0_FAIL = 21, +SL_IEC60730_PDM0_FAIL = 22, +SL_IEC60730_OEM_FAIL_1 = 23, +
    +  SL_IEC60730_OEM_FAIL_2 = 24, +SL_IEC60730_OEM_FAIL_3 = 25, +SL_IEC60730_OEM_FAIL_4 = 26, +SL_IEC60730_SAFETY_CHECK_FAIL = 0XFF +
    + }
     Cause of failure passed to Safe State function. More...
     
    + + + +

    +Functions

    void sl_iec60730_post (void)
     
    + + + + +

    +Variables

    +const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION
     Global variable which holds the IEC60370 library version.
     
    +

    Detailed Description

    +

    Power On Self Test - Executed once during power up.

    +

    sl_iec60730_post() validates system health before starting execution of the main loop. It must be called first in the main() function. If the result of a test routine is a failure, sl_iec60730_safe_state() is called.

    + +
    +Figure 1 Post flowchart
    +

    Macro Definition Documentation

    + +

    ◆ __no_init

    + +
    +
    + + + + +
    #define __no_init
    +
    +

    The __no_init macro is used for compatibility between GCC and IAR compiler.

    + +
    +
    + +

    ◆ CHECK_INTEGRITY

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define CHECK_INTEGRITY( vartype,
     x 
    )   ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, _inv)))
    +
    +

    The CHECK_INTEGRITY definition used for checking integrity of pair of variables stored in *.classb_ram* section.

    + +
    +
    + +

    ◆ DEC_CLASSB_VARS

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define DEC_CLASSB_VARS( vartype,
     name 
    )
    +
    +Value:
    __no_init vartype name __CLASSB_RAM; \
    +
    __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
    +

    The DEC_CLASSB_VARS definition is used for declaring pair of classsb_ram variables.

    + +
    +
    + +

    ◆ EXTERN_DEC_CLASSB_VARS

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define EXTERN_DEC_CLASSB_VARS( vartype,
     name 
    )
    +
    +Value:
    extern __no_init vartype name __CLASSB_RAM; \
    +
    extern __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
    +

    The EXTERN_DEC_CLASSB_VARS definition is extern of pair of DEC_CLASSB_VARS

    + +
    +
    + +

    ◆ INV_CLASSB_PVAR

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define INV_CLASSB_PVAR( vartype,
     name 
    )   CONCAT(name, _inv) = (vartype *) (~(vartype) name)
    +
    +

    The INV_CLASSB_PVAR macro is used to inverse a Inv value of pointer pair DEC_CLASSB_VARS

    + +
    +
    + +

    ◆ INV_CLASSB_VAR

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define INV_CLASSB_VAR( vartype,
     name 
    )   CONCAT(name, _inv) = (vartype) (~(vartype) name)
    +
    +

    The INV_CLASSB_VAR macro is used to inverse a Inv value of pair DEC_CLASSB_VARS

    + +
    +
    + +

    ◆ LABEL_DEF

    + +
    +
    + + + + + + + + +
    #define LABEL_DEF( NAME)   LB_ASM volatile(LB_XSTR(NAME))
    +
    +

    The LABEL_DEF macro is used to generate label for break points. Using this macro avoids label removal by the compiler's optimize levels.

    + +
    +
    + +

    ◆ sl_static_dec_classb_vars

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define sl_static_dec_classb_vars( vartype,
     name 
    )
    +
    +Value:
    static __no_init vartype name __CLASSB_RAM; \
    +
    static __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
    +

    The sl_static_dec_classb_vars definition used for declaring static pair DEC_CLASSB_VARS

    + +
    +
    + +

    ◆ UNUSED_VAR

    + +
    +
    + + + + + + + + +
    #define UNUSED_VAR( x)   (void) (x)
    +
    +

    Useful macro for avoiding compiler warnings related to unused function arguments or unused variables.

    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ sl_iec60730_test_failure_t

    + +
    +
    + + + + +
    enum sl_iec60730_test_failure_t
    +
    + +

    Cause of failure passed to Safe State function.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Enumerator
    SL_IEC60730_NO_FAILURE 

    No failure detected.

    +
    SL_IEC60730_TEST_VERIFY 

    Special case used for automated verification testing.

    +
    SL_IEC60730_WATCHDOG_POST_FAIL 

    Watchdog POST test failed.

    +
    SL_IEC60730_VMC_FAIL 

    Variable Memory Check detected a failure.

    +
    SL_IEC60730_IMC_FAIL 

    Invariable Memory Check detected a failure.

    +
    SL_IEC60730_CPU_REGISTERS_FAIL 

    CPU Registers Check detected a failure.

    +
    SL_IEC60730_CLOCK_FAIL 

    System Clock Check detected a failure.

    +
    SL_IEC60730_INTERRUPT_FAIL 

    Interrupt Plausibility Check detected a failure.

    +
    SL_IEC60730_PROGRAM_COUNTER_FAIL 

    Program Counter Check detected a failure.

    +
    SL_IEC60730_GPIO_FAIL 

    GPIO Plausibility Check detected a failure.

    +
    SL_IEC60730_ANALOG_FAIL 

    Analog Plausibility Check detected a failure.

    +
    SL_IEC60730_CS0_FAIL 

    CSEN0 detected a failureLESENSE.

    +
    SL_IEC60730_LESENSE0_FAIL 

    LESENSE0 detected a failure.

    +
    SL_IEC60730_RADIO_FAIL 

    Radio comms detected a failure.

    +
    SL_IEC60730_I2C0_FAIL 

    I2C0 comms channel detected a failure.

    +
    SL_IEC60730_I2C1_FAIL 

    I2C1 comms channel detected a failure.

    +
    SL_IEC60730_USART0_FAIL 

    USART0 comms channel detected a failure.

    +
    SL_IEC60730_USART1_FAIL 

    USART1 comms channel detected a failure.

    +
    SL_IEC60730_USART2_FAIL 

    USART2 comms channel detected a failure.

    +
    SL_IEC60730_USART3_FAIL 

    USART3 comms channel detected a failure.

    +
    SL_IEC60730_LEUART0_FAIL 

    LEUART comms channel detected a failure.

    +
    SL_IEC60730_EUART0_FAIL 

    EUART comms channel detected a failure.

    +
    SL_IEC60730_PDM0_FAIL 

    PDM comms channel detected a failure.

    +
    SL_IEC60730_OEM_FAIL_1 

    OEM defined failure.

    +
    SL_IEC60730_OEM_FAIL_2 

    OEM defined failure.

    +
    SL_IEC60730_OEM_FAIL_3 

    OEM defined failure.

    +
    SL_IEC60730_OEM_FAIL_4 

    OEM defined failure.

    +
    SL_IEC60730_SAFETY_CHECK_FAIL 

    iec60730_safety_check detected some failure

    +
    + +
    +
    + +

    ◆ sl_iec60730_test_result_t

    + +
    +
    + + + + +
    enum sl_iec60730_test_result_t
    +
    + +

    The result of a test.

    + + + + +
    Enumerator
    SL_IEC60730_TEST_FAILED 

    test result failed

    +
    SL_IEC60730_TEST_PASSED 

    test result passed

    +
    SL_IEC60730_TEST_IN_PROGRESS 

    test is still in progress

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ sl_iec60730_post()

    + +
    +
    + + + + + + + + +
    void sl_iec60730_post (void )
    +
    +

    public IEC60730 Power On Self Test

    +
    Returns
    None.
    +

    Each module is tested to validate system health before starting the execution of the main loop, and if a failure is detected sl_iec60730_safe_state() is called.

    + +
    +
    +
    +
    __CLASSB_RAM
    #define __CLASSB_RAM
    Definition: sl_iec60730_toolchain.h:78
    +
    __no_init
    #define __no_init
    Definition: sl_iec60730.h:136
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/group__toolchain__group.html b/site/document_api_iec60730_library/group__toolchain__group.html new file mode 100644 index 00000000..9f6279ac --- /dev/null +++ b/site/document_api_iec60730_library/group__toolchain__group.html @@ -0,0 +1,208 @@ + + + + + + + +Document API IEC60730 Library: Toolchain Abstraction + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +Macros
    +
    +
    Toolchain Abstraction
    +
    +
    + +

    Macros for toolchain abstraction. +More...

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    +#define NULL   ((void *) 0)
     Make sure there is a NULL defined if the toolchain does not provide it.
     
    #define NOP()   __NOP()
     
    +#define IEC60730_VAR_NO_INIT   __attribute__((section(".noinit")))
     No init at startup.
     
    +#define IEC60730_DATA_NO_CLEAR   __attribute__((section(".ram_no_clear")))
     No clear at startup.
     
    #define __STACK_BOTTOM   __attribute__((section(".stack_bottom")))
     
    #define __CLASSB_RAM   __attribute__((section(".classb_ram")))
     
    #define __RT_BUF   __attribute__((section(".rt_buf")))
     
    #define __OVERLAP   __attribute__((section(".overlap")))
     
    +#define LB_ASM   __asm__
     Add assembly code.
     
    +#define LB_XSTR(x)   XSTR(x:)
     Add label.
     
    +

    Detailed Description

    +

    Macros for toolchain abstraction.

    +

    +Introduction

    +

    This header file contains macros that are used to provide an abstraction for toolchain use in source code. The EFR32 compiler requires C-language extensions in order to fully use features of the EFR32 architecture. All compilers for EFR32 implement a set of extensions but use different names and ways of implementing those extensions. This header file provides macros that are defined for each supported toolchain and can be used in the source code. This allows the source code to use EFR32 extensions and remain independent of which toolchain is used for compilation.

    +

    +Prior Toolchain Abstraction Header File

    +

    Refer file: sl_iec60730_toolchain.h

    +

    +Supported Toolchains

    +
      +
    • GNU GCC
      • +
    • IAR ICCARM
      • +
    +

    Macro Definition Documentation

    + +

    ◆ __CLASSB_RAM

    + +
    +
    + + + + +
    #define __CLASSB_RAM   __attribute__((section(".classb_ram")))
    +
    +

    The __CLASSB_RAM macro is used to define (.classb_ram) section.

    + +
    +
    + +

    ◆ __OVERLAP

    + +
    +
    + + + + +
    #define __OVERLAP   __attribute__((section(".overlap")))
    +
    +

    The __OVERLAP macro is used to define (.overlap) section.

    + +
    +
    + +

    ◆ __RT_BUF

    + +
    +
    + + + + +
    #define __RT_BUF   __attribute__((section(".rt_buf")))
    +
    +

    The __RT_BUF macro is used to define (.rt_buf) section.

    + +
    +
    + +

    ◆ __STACK_BOTTOM

    + +
    +
    + + + + +
    #define __STACK_BOTTOM   __attribute__((section(".stack_bottom")))
    +
    +

    The __STACK_BOTTOM macro is used to define (.stack_bottom) section.

    + +
    +
    + +

    ◆ NOP

    + +
    +
    + + + + + + + +
    #define NOP()   __NOP()
    +
    +

    __NOP should be declared in cmsis header core_cmInstr.h extern void __NOP(void); Macro to insert a no-operation (NOP) instruction.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/hierarchy.html b/site/document_api_iec60730_library/hierarchy.html new file mode 100644 index 00000000..6fb87ea5 --- /dev/null +++ b/site/document_api_iec60730_library/hierarchy.html @@ -0,0 +1,170 @@ + + + + + + + +Document API IEC60730 Library: Class Hierarchy + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    Class Hierarchy
    +
    +
    +
    This inheritance list is sorted roughly, but not completely, alphabetically:
    +
    [detail level 1234]
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
     ▼CException
     ▼Cerrors.JLinkException
     Cerrors.JLinkDataException
     Cerrors.JLinkEraseException
     Cerrors.JLinkFlashException
     Cerrors.JLinkReadException
     Cerrors.JLinkRTTException
     Cerrors.JLinkWriteException
     Ciec60730_test_base.iec60730_logger
     ▼Ciec60730_test_base.iec60730TestBase
     Cintegration_test_iec60730_cpu_registers.iec60730_cpu_regsIEC60730 CPU Register Check Tests
     Cintegration_test_iec60730_invariable_memory.iec60730_imcIEC60730 Invariable Memory Plausibility Verification Tests
     Cintegration_test_iec60730_irq.iec60730_irqIEC60730 IRQ Plausibility Verification Tests
     Cintegration_test_iec60730_program_counter.iec60730_programme_counterIEC60730 CPU Program counter Tests
     Cintegration_test_iec60730_system_clock.iec60730_system_clockIEC60730 System Clock Verification Tests
     Cintegration_test_iec60730_variable_memory.iec60730_vmcIEC60730 Variable Memory Plausibility Verification Tests
     Cintegration_test_iec60730_watchdog.iec60730_watchdogIEC60730 Watchdog Verification Tests
     Cunit_test_iec60730_get_report.iec60730_unit_test_resultIEC60730 get unit test result
     Cjlink.JLinkDll
     ▼Cobject
     Cenums.JLinkAccessFlags
     Cenums.JLinkAccessMaskFlags
     Cenums.JLinkBreakpoint
     Cenums.JLinkBreakpointImplementation
     Cenums.JLinkCore
     Cenums.JLinkCPUCapabilities
     Cenums.JLinkDeviceFamily
     Cenums.JLinkEventTypes
     Cenums.JLinkFlags
     Cenums.JLinkFunctions
     ▼Cenums.JLinkGlobalErrors
     ▼Cenums.JLinkDataErrors
     Cerrors.JLinkDataException
     ▼Cenums.JLinkEraseErrors
     Cerrors.JLinkEraseException
     ▼Cenums.JLinkFlashErrors
     Cerrors.JLinkFlashException
     ▼Cenums.JLinkReadErrors
     Cerrors.JLinkReadException
     ▼Cenums.JLinkRTTErrors
     Cerrors.JLinkRTTException
     ▼Cenums.JLinkWriteErrors
     Cerrors.JLinkWriteException
     Cerrors.JLinkException
     Cenums.JLinkHaltReasons
     Cenums.JLinkHost
     Cenums.JLinkInterfaces
     Cenums.JLinkResetStrategyCortexM3
     Cenums.JLinkROMTable
     Cenums.JLinkRTTCommand
     Cenums.JLinkRTTDirection
     Cenums.JLinkStraceCommand
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     Cenums.JLinkSWOInterfaces
     Cenums.JLinkTraceCommand
     Cenums.JLinkTraceFormat
     Cenums.JLinkTraceSource
     Cenums.JLinkVectorCatchCortexM3
     Cutil.PyTestSuites
     Cutil.TimeStampUtil
     Csl_iec60730_imc_params_tThis structure is used as configuration for IMC testing, that holds GPCRC Register
     Csl_iec60730_imc_test_multiple_regions_t
     Csl_iec60730_imc_test_region_tThis structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check
     Csl_iec60730_irq_cfg_t
     Csl_iec60730_irq_execution_bounds_t
     Csl_iec60730_irq_fail_t
     Csl_iec60730_library_version_t
     Csl_iec60730_safety_check_t
     Csl_iec60730_update_crc_params_t
     Csl_iec60730_vmc_test_multiple_regions_tThis structure is used as multiple test regions for VMC testing
     Csl_iec60730_vmc_test_region_tThis structure is used as configuration for VMC testing
     Csl_iec60730_watchdog_tWatchdog component configuration structure
     ▼CStructure
     Cjlink_constants.JlinkArm_Speed_Info_CStruct
     Cjlink_constants.JLinkArmEmuConnectInfo_CStruct
     Cjlink_constants.JLinkJtagIdData_CStruct
     ▼CTelnet
     ▼Cutil.TelnetHostUtil
     Cutil.TelnetDeviceUtil
     ▼CTestCase
     Cintegration_test_iec60730_cpu_registers.iec60730_cpu_regsIEC60730 CPU Register Check Tests
     Cintegration_test_iec60730_invariable_memory.iec60730_imcIEC60730 Invariable Memory Plausibility Verification Tests
     Cintegration_test_iec60730_irq.iec60730_irqIEC60730 IRQ Plausibility Verification Tests
     Cintegration_test_iec60730_program_counter.iec60730_programme_counterIEC60730 CPU Program counter Tests
     Cintegration_test_iec60730_system_clock.iec60730_system_clockIEC60730 System Clock Verification Tests
     Cintegration_test_iec60730_variable_memory.iec60730_vmcIEC60730 Variable Memory Plausibility Verification Tests
     Cintegration_test_iec60730_watchdog.iec60730_watchdogIEC60730 Watchdog Verification Tests
     Cunit_test_iec60730_get_report.iec60730_unit_test_resultIEC60730 get unit test result
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/index.html b/site/document_api_iec60730_library/index.html new file mode 100644 index 00000000..e1a98e0b --- /dev/null +++ b/site/document_api_iec60730_library/index.html @@ -0,0 +1,76 @@ + + + + + + + +Document API IEC60730 Library: Main Page + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    Document API IEC60730 Library Documentation
    +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
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s=[],n=this;return e=t.extend({element:this.element,classes:this.options.classes||{}},e),this._on(e.element,{remove:"_untrackClassesElement"}),e.keys&&i(e.keys.match(/\S+/g)||[],!0),e.extra&&i(e.extra.match(/\S+/g)||[]),s.join(" ")},_untrackClassesElement:function(e){var i=this;t.each(i.classesElementLookup,function(s,n){-1!==t.inArray(e.target,n)&&(i.classesElementLookup[s]=t(n.not(e.target).get()))})},_removeClass:function(t,e,i){return this._toggleClass(t,e,i,!1)},_addClass:function(t,e,i){return this._toggleClass(t,e,i,!0)},_toggleClass:function(t,e,i,s){s="boolean"==typeof s?s:i;var n="string"==typeof t||null===t,o={extra:n?e:i,keys:n?t:e,element:n?this.element:t,add:s};return o.element.toggleClass(this._classes(o),s),this},_on:function(e,i,s){var n,o=this;"boolean"!=typeof e&&(s=i,i=e,e=!1),s?(i=n=t(i),this.bindings=this.bindings.add(i)):(s=i,i=this.element,n=this.widget()),t.each(s,function(s,a){function r(){return e||o.options.disabled!==!0&&!t(this).hasClass("ui-state-disabled")?("string"==typeof a?o[a]:a).apply(o,arguments):void 0}"string"!=typeof a&&(r.guid=a.guid=a.guid||r.guid||t.guid++);var h=s.match(/^([\w:-]*)\s*(.*)$/),l=h[1]+o.eventNamespace,c=h[2];c?n.on(l,c,r):i.on(l,r)})},_off:function(e,i){i=(i||"").split(" ").join(this.eventNamespace+" ")+this.eventNamespace,e.off(i).off(i),this.bindings=t(this.bindings.not(e).get()),this.focusable=t(this.focusable.not(e).get()),this.hoverable=t(this.hoverable.not(e).get())},_delay:function(t,e){function i(){return("string"==typeof t?s[t]:t).apply(s,arguments)}var s=this;return setTimeout(i,e||0)},_hoverable:function(e){this.hoverable=this.hoverable.add(e),this._on(e,{mouseenter:function(e){this._addClass(t(e.currentTarget),null,"ui-state-hover")},mouseleave:function(e){this._removeClass(t(e.currentTarget),null,"ui-state-hover")}})},_focusable:function(e){this.focusable=this.focusable.add(e),this._on(e,{focusin:function(e){this._addClass(t(e.currentTarget),null,"ui-state-focus")},focusout:function(e){this._removeClass(t(e.currentTarget),null,"ui-state-focus")}})},_trigger:function(e,i,s){var n,o,a=this.options[e];if(s=s||{},i=t.Event(i),i.type=(e===this.widgetEventPrefix?e:this.widgetEventPrefix+e).toLowerCase(),i.target=this.element[0],o=i.originalEvent)for(n in o)n in i||(i[n]=o[n]);return this.element.trigger(i,s),!(t.isFunction(a)&&a.apply(this.element[0],[i].concat(s))===!1||i.isDefaultPrevented())}},t.each({show:"fadeIn",hide:"fadeOut"},function(e,i){t.Widget.prototype["_"+e]=function(s,n,o){"string"==typeof n&&(n={effect:n});var a,r=n?n===!0||"number"==typeof n?i:n.effect||i:e;n=n||{},"number"==typeof n&&(n={duration:n}),a=!t.isEmptyObject(n),n.complete=o,n.delay&&s.delay(n.delay),a&&t.effects&&t.effects.effect[r]?s[e](n):r!==e&&s[r]?s[r](n.duration,n.easing,o):s.queue(function(i){t(this)[e](),o&&o.call(s[0]),i()})}}),t.widget,function(){function e(t,e,i){return[parseFloat(t[0])*(u.test(t[0])?e/100:1),parseFloat(t[1])*(u.test(t[1])?i/100:1)]}function i(e,i){return parseInt(t.css(e,i),10)||0}function s(e){var i=e[0];return 9===i.nodeType?{width:e.width(),height:e.height(),offset:{top:0,left:0}}:t.isWindow(i)?{width:e.width(),height:e.height(),offset:{top:e.scrollTop(),left:e.scrollLeft()}}:i.preventDefault?{width:0,height:0,offset:{top:i.pageY,left:i.pageX}}:{width:e.outerWidth(),height:e.outerHeight(),offset:e.offset()}}var n,o=Math.max,a=Math.abs,r=/left|center|right/,h=/top|center|bottom/,l=/[\+\-]\d+(\.[\d]+)?%?/,c=/^\w+/,u=/%$/,d=t.fn.position;t.position={scrollbarWidth:function(){if(void 0!==n)return n;var e,i,s=t("
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i,s=e.within,n=s.isWindow?s.scrollTop:s.offset.top,a=e.within.height,r=t.top-e.collisionPosition.marginTop,h=n-r,l=r+e.collisionHeight-a-n;e.collisionHeight>a?h>0&&0>=l?(i=t.top+h+e.collisionHeight-a-n,t.top+=h-i):t.top=l>0&&0>=h?n:h>l?n+a-e.collisionHeight:n:h>0?t.top+=h:l>0?t.top-=l:t.top=o(t.top-r,t.top)}},flip:{left:function(t,e){var i,s,n=e.within,o=n.offset.left+n.scrollLeft,r=n.width,h=n.isWindow?n.scrollLeft:n.offset.left,l=t.left-e.collisionPosition.marginLeft,c=l-h,u=l+e.collisionWidth-r-h,d="left"===e.my[0]?-e.elemWidth:"right"===e.my[0]?e.elemWidth:0,p="left"===e.at[0]?e.targetWidth:"right"===e.at[0]?-e.targetWidth:0,f=-2*e.offset[0];0>c?(i=t.left+d+p+f+e.collisionWidth-r-o,(0>i||a(c)>i)&&(t.left+=d+p+f)):u>0&&(s=t.left-e.collisionPosition.marginLeft+d+p+f-h,(s>0||u>a(s))&&(t.left+=d+p+f))},top:function(t,e){var i,s,n=e.within,o=n.offset.top+n.scrollTop,r=n.height,h=n.isWindow?n.scrollTop:n.offset.top,l=t.top-e.collisionPosition.marginTop,c=l-h,u=l+e.collisionHeight-r-h,d="top"===e.my[1],p=d?-e.elemHeight:"bottom"===e.my[1]?e.elemHeight:0,f="top"===e.at[1]?e.targetHeight:"bottom"===e.at[1]?-e.targetHeight:0,m=-2*e.offset[1];0>c?(s=t.top+p+f+m+e.collisionHeight-r-o,(0>s||a(c)>s)&&(t.top+=p+f+m)):u>0&&(i=t.top-e.collisionPosition.marginTop+p+f+m-h,(i>0||u>a(i))&&(t.top+=p+f+m))}},flipfit:{left:function(){t.ui.position.flip.left.apply(this,arguments),t.ui.position.fit.left.apply(this,arguments)},top:function(){t.ui.position.flip.top.apply(this,arguments),t.ui.position.fit.top.apply(this,arguments)}}}}(),t.ui.position,t.extend(t.expr[":"],{data:t.expr.createPseudo?t.expr.createPseudo(function(e){return function(i){return!!t.data(i,e)}}):function(e,i,s){return!!t.data(e,s[3])}}),t.fn.extend({disableSelection:function(){var t="onselectstart"in document.createElement("div")?"selectstart":"mousedown";return function(){return this.on(t+".ui-disableSelection",function(t){t.preventDefault()})}}(),enableSelection:function(){return this.off(".ui-disableSelection")}}),t.ui.focusable=function(i,s){var n,o,a,r,h,l=i.nodeName.toLowerCase();return"area"===l?(n=i.parentNode,o=n.name,i.href&&o&&"map"===n.nodeName.toLowerCase()?(a=t("img[usemap='#"+o+"']"),a.length>0&&a.is(":visible")):!1):(/^(input|select|textarea|button|object)$/.test(l)?(r=!i.disabled,r&&(h=t(i).closest("fieldset")[0],h&&(r=!h.disabled))):r="a"===l?i.href||s:s,r&&t(i).is(":visible")&&e(t(i)))},t.extend(t.expr[":"],{focusable:function(e){return t.ui.focusable(e,null!=t.attr(e,"tabindex"))}}),t.ui.focusable,t.fn.form=function(){return"string"==typeof this[0].form?this.closest("form"):t(this[0].form)},t.ui.formResetMixin={_formResetHandler:function(){var e=t(this);setTimeout(function(){var i=e.data("ui-form-reset-instances");t.each(i,function(){this.refresh()})})},_bindFormResetHandler:function(){if(this.form=this.element.form(),this.form.length){var t=this.form.data("ui-form-reset-instances")||[];t.length||this.form.on("reset.ui-form-reset",this._formResetHandler),t.push(this),this.form.data("ui-form-reset-instances",t)}},_unbindFormResetHandler:function(){if(this.form.length){var e=this.form.data("ui-form-reset-instances");e.splice(t.inArray(this,e),1),e.length?this.form.data("ui-form-reset-instances",e):this.form.removeData("ui-form-reset-instances").off("reset.ui-form-reset")}}},"1.7"===t.fn.jquery.substring(0,3)&&(t.each(["Width","Height"],function(e,i){function s(e,i,s,o){return t.each(n,function(){i-=parseFloat(t.css(e,"padding"+this))||0,s&&(i-=parseFloat(t.css(e,"border"+this+"Width"))||0),o&&(i-=parseFloat(t.css(e,"margin"+this))||0)}),i}var n="Width"===i?["Left","Right"]:["Top","Bottom"],o=i.toLowerCase(),a={innerWidth:t.fn.innerWidth,innerHeight:t.fn.innerHeight,outerWidth:t.fn.outerWidth,outerHeight:t.fn.outerHeight};t.fn["inner"+i]=function(e){return void 0===e?a["inner"+i].call(this):this.each(function(){t(this).css(o,s(this,e)+"px")})},t.fn["outer"+i]=function(e,n){return"number"!=typeof e?a["outer"+i].call(this,e):this.each(function(){t(this).css(o,s(this,e,!0,n)+"px")})}}),t.fn.addBack=function(t){return this.add(null==t?this.prevObject:this.prevObject.filter(t))}),t.ui.keyCode={BACKSPACE:8,COMMA:188,DELETE:46,DOWN:40,END:35,ENTER:13,ESCAPE:27,HOME:36,LEFT:37,PAGE_DOWN:34,PAGE_UP:33,PERIOD:190,RIGHT:39,SPACE:32,TAB:9,UP:38},t.ui.escapeSelector=function(){var t=/([!"#$%&'()*+,./:;<=>?@[\]^`{|}~])/g;return function(e){return e.replace(t,"\\$1")}}(),t.fn.labels=function(){var e,i,s,n,o;return this[0].labels&&this[0].labels.length?this.pushStack(this[0].labels):(n=this.eq(0).parents("label"),s=this.attr("id"),s&&(e=this.eq(0).parents().last(),o=e.add(e.length?e.siblings():this.siblings()),i="label[for='"+t.ui.escapeSelector(s)+"']",n=n.add(o.find(i).addBack(i))),this.pushStack(n))},t.fn.scrollParent=function(e){var i=this.css("position"),s="absolute"===i,n=e?/(auto|scroll|hidden)/:/(auto|scroll)/,o=this.parents().filter(function(){var e=t(this);return s&&"static"===e.css("position")?!1:n.test(e.css("overflow")+e.css("overflow-y")+e.css("overflow-x"))}).eq(0);return"fixed"!==i&&o.length?o:t(this[0].ownerDocument||document)},t.extend(t.expr[":"],{tabbable:function(e){var i=t.attr(e,"tabindex"),s=null!=i;return(!s||i>=0)&&t.ui.focusable(e,s)}}),t.fn.extend({uniqueId:function(){var t=0;return function(){return this.each(function(){this.id||(this.id="ui-id-"+ ++t)})}}(),removeUniqueId:function(){return this.each(function(){/^ui-id-\d+$/.test(this.id)&&t(this).removeAttr("id")})}}),t.ui.ie=!!/msie [\w.]+/.exec(navigator.userAgent.toLowerCase());var n=!1;t(document).on("mouseup",function(){n=!1}),t.widget("ui.mouse",{version:"1.12.1",options:{cancel:"input, textarea, button, select, option",distance:1,delay:0},_mouseInit:function(){var e=this;this.element.on("mousedown."+this.widgetName,function(t){return e._mouseDown(t)}).on("click."+this.widgetName,function(i){return!0===t.data(i.target,e.widgetName+".preventClickEvent")?(t.removeData(i.target,e.widgetName+".preventClickEvent"),i.stopImmediatePropagation(),!1):void 0}),this.started=!1},_mouseDestroy:function(){this.element.off("."+this.widgetName),this._mouseMoveDelegate&&this.document.off("mousemove."+this.widgetName,this._mouseMoveDelegate).off("mouseup."+this.widgetName,this._mouseUpDelegate)},_mouseDown:function(e){if(!n){this._mouseMoved=!1,this._mouseStarted&&this._mouseUp(e),this._mouseDownEvent=e;var i=this,s=1===e.which,o="string"==typeof this.options.cancel&&e.target.nodeName?t(e.target).closest(this.options.cancel).length:!1;return s&&!o&&this._mouseCapture(e)?(this.mouseDelayMet=!this.options.delay,this.mouseDelayMet||(this._mouseDelayTimer=setTimeout(function(){i.mouseDelayMet=!0},this.options.delay)),this._mouseDistanceMet(e)&&this._mouseDelayMet(e)&&(this._mouseStarted=this._mouseStart(e)!==!1,!this._mouseStarted)?(e.preventDefault(),!0):(!0===t.data(e.target,this.widgetName+".preventClickEvent")&&t.removeData(e.target,this.widgetName+".preventClickEvent"),this._mouseMoveDelegate=function(t){return i._mouseMove(t)},this._mouseUpDelegate=function(t){return i._mouseUp(t)},this.document.on("mousemove."+this.widgetName,this._mouseMoveDelegate).on("mouseup."+this.widgetName,this._mouseUpDelegate),e.preventDefault(),n=!0,!0)):!0}},_mouseMove:function(e){if(this._mouseMoved){if(t.ui.ie&&(!document.documentMode||9>document.documentMode)&&!e.button)return this._mouseUp(e);if(!e.which)if(e.originalEvent.altKey||e.originalEvent.ctrlKey||e.originalEvent.metaKey||e.originalEvent.shiftKey)this.ignoreMissingWhich=!0;else if(!this.ignoreMissingWhich)return this._mouseUp(e)}return(e.which||e.button)&&(this._mouseMoved=!0),this._mouseStarted?(this._mouseDrag(e),e.preventDefault()):(this._mouseDistanceMet(e)&&this._mouseDelayMet(e)&&(this._mouseStarted=this._mouseStart(this._mouseDownEvent,e)!==!1,this._mouseStarted?this._mouseDrag(e):this._mouseUp(e)),!this._mouseStarted)},_mouseUp:function(e){this.document.off("mousemove."+this.widgetName,this._mouseMoveDelegate).off("mouseup."+this.widgetName,this._mouseUpDelegate),this._mouseStarted&&(this._mouseStarted=!1,e.target===this._mouseDownEvent.target&&t.data(e.target,this.widgetName+".preventClickEvent",!0),this._mouseStop(e)),this._mouseDelayTimer&&(clearTimeout(this._mouseDelayTimer),delete this._mouseDelayTimer),this.ignoreMissingWhich=!1,n=!1,e.preventDefault()},_mouseDistanceMet:function(t){return Math.max(Math.abs(this._mouseDownEvent.pageX-t.pageX),Math.abs(this._mouseDownEvent.pageY-t.pageY))>=this.options.distance},_mouseDelayMet:function(){return this.mouseDelayMet},_mouseStart:function(){},_mouseDrag:function(){},_mouseStop:function(){},_mouseCapture:function(){return!0}}),t.ui.plugin={add:function(e,i,s){var n,o=t.ui[e].prototype;for(n in s)o.plugins[n]=o.plugins[n]||[],o.plugins[n].push([i,s[n]])},call:function(t,e,i,s){var n,o=t.plugins[e];if(o&&(s||t.element[0].parentNode&&11!==t.element[0].parentNode.nodeType))for(n=0;o.length>n;n++)t.options[o[n][0]]&&o[n][1].apply(t.element,i)}},t.widget("ui.resizable",t.ui.mouse,{version:"1.12.1",widgetEventPrefix:"resize",options:{alsoResize:!1,animate:!1,animateDuration:"slow",animateEasing:"swing",aspectRatio:!1,autoHide:!1,classes:{"ui-resizable-se":"ui-icon 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00000000..433c15b8 --- /dev/null +++ b/site/document_api_iec60730_library/menu.js @@ -0,0 +1,50 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function initMenu(relPath,searchEnabled,serverSide,searchPage,search) { + function makeTree(data,relPath) { + var result=''; + if ('children' in data) { + result+=''; + } + return result; + } + + $('#main-nav').append(makeTree(menudata,relPath)); + $('#main-nav').children(':first').addClass('sm sm-dox').attr('id','main-menu'); + if (searchEnabled) { + if (serverSide) { + $('#main-menu').append('
    • '); + } else { + $('#main-menu').append('
    • '); + } + } + $('#main-menu').smartmenus(); +} +/* @license-end */ diff --git a/site/document_api_iec60730_library/menudata.js b/site/document_api_iec60730_library/menudata.js new file mode 100644 index 00000000..ebc5eac5 --- /dev/null +++ b/site/document_api_iec60730_library/menudata.js @@ -0,0 +1,99 @@ +/* +@licstart The following is the entire license notice for the +JavaScript code in this file. + +Copyright (C) 1997-2019 by Dimitri van Heesch + +This program is free software; you can redistribute it and/or modify +it under the terms of version 2 of the GNU General Public License as published by +the Free Software Foundation + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +@licend The above is the entire license notice +for the JavaScript code in this file +*/ +var menudata={children:[ +{text:"Main Page",url:"index.html"}, +{text:"Modules",url:"modules.html"}, +{text:"Namespaces",url:"namespaces.html",children:[ +{text:"Namespace List",url:"namespaces.html"}]}, +{text:"Classes",url:"annotated.html",children:[ +{text:"Class List",url:"annotated.html"}, +{text:"Class Index",url:"classes.html"}, +{text:"Class Hierarchy",url:"hierarchy.html"}, +{text:"Class Members",url:"functions.html",children:[ +{text:"All",url:"functions.html",children:[ +{text:"_",url:"functions.html#index__5F"}, +{text:"c",url:"functions.html#index_c"}, +{text:"e",url:"functions.html#index_e"}, +{text:"g",url:"functions.html#index_g"}, +{text:"h",url:"functions.html#index_h"}, +{text:"i",url:"functions.html#index_i"}, +{text:"m",url:"functions.html#index_m"}, +{text:"n",url:"functions.html#index_n"}, +{text:"r",url:"functions.html#index_r"}, +{text:"s",url:"functions.html#index_s"}, +{text:"t",url:"functions.html#index_t"}, +{text:"w",url:"functions.html#index_w"}, +{text:"x",url:"functions.html#index_x"}]}, +{text:"Functions",url:"functions_func.html",children:[ +{text:"_",url:"functions_func.html#index__5F"}, +{text:"c",url:"functions_func.html#index_c"}, +{text:"e",url:"functions_func.html#index_e"}, +{text:"g",url:"functions_func.html#index_g"}, +{text:"h",url:"functions_func.html#index_h"}, +{text:"m",url:"functions_func.html#index_m"}, +{text:"n",url:"functions_func.html#index_n"}, +{text:"r",url:"functions_func.html#index_r"}, +{text:"s",url:"functions_func.html#index_s"}, +{text:"t",url:"functions_func.html#index_t"}, +{text:"w",url:"functions_func.html#index_w"}]}, +{text:"Variables",url:"functions_vars.html"}]}]}, +{text:"Files",url:"files.html",children:[ +{text:"File List",url:"files.html"}, +{text:"File Members",url:"globals.html",children:[ +{text:"All",url:"globals.html",children:[ +{text:"_",url:"globals.html#index__5F"}, +{text:"a",url:"globals_a.html#index_a"}, +{text:"b",url:"globals_b.html#index_b"}, +{text:"c",url:"globals_c.html#index_c"}, +{text:"d",url:"globals_d.html#index_d"}, +{text:"e",url:"globals_e.html#index_e"}, +{text:"i",url:"globals_i.html#index_i"}, +{text:"l",url:"globals_l.html#index_l"}, +{text:"n",url:"globals_n.html#index_n"}, +{text:"r",url:"globals_r.html#index_r"}, +{text:"s",url:"globals_s.html#index_s"}, +{text:"t",url:"globals_t.html#index_t"}, +{text:"u",url:"globals_u.html#index_u"}]}, +{text:"Functions",url:"globals_func.html",children:[ +{text:"a",url:"globals_func.html#index_a"}, +{text:"c",url:"globals_func.html#index_c"}, +{text:"s",url:"globals_func.html#index_s"}, +{text:"t",url:"globals_func.html#index_t"}, +{text:"u",url:"globals_func.html#index_u"}]}, +{text:"Variables",url:"globals_vars.html"}, +{text:"Typedefs",url:"globals_type.html"}, +{text:"Enumerations",url:"globals_enum.html"}, +{text:"Enumerator",url:"globals_eval.html",children:[ +{text:"s",url:"globals_eval.html#index_s"}]}, +{text:"Macros",url:"globals_defs.html",children:[ +{text:"_",url:"globals_defs.html#index__5F"}, +{text:"b",url:"globals_defs.html#index_b"}, +{text:"c",url:"globals_defs.html#index_c"}, +{text:"d",url:"globals_defs.html#index_d"}, +{text:"e",url:"globals_defs.html#index_e"}, +{text:"i",url:"globals_defs.html#index_i"}, +{text:"l",url:"globals_defs.html#index_l"}, +{text:"n",url:"globals_defs.html#index_n"}, +{text:"r",url:"globals_defs.html#index_r"}, +{text:"s",url:"globals_defs.html#index_s"}, +{text:"u",url:"globals_defs.html#index_u"}]}]}]}]} diff --git a/site/document_api_iec60730_library/modules.html b/site/document_api_iec60730_library/modules.html new file mode 100644 index 00000000..8a13ed33 --- /dev/null +++ b/site/document_api_iec60730_library/modules.html @@ -0,0 +1,113 @@ + + + + + + + +Document API IEC60730 Library: Modules + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    Modules
    +
    +
    +
    Here is a list of all modules:
    +
    [detail level 123]
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
     ▼EFR32 IEC60730 LibraryOverview and documentation of IEC60730 library APIs
     BISTBuilt In Self Test - Executed periodically
     CPU Registers CheckVerifies CPU registers are working correctly
     IRQ CheckVerifies interrupt frequency is within bounds
     Invariable Memory CheckVerifies contents of flash memory
     OEM External Communications Example using UARTVerifies communication channel is operating as expected
     POSTPower On Self Test - Executed once during power up
     Program Counter CheckVerifies all tests have completed on time
     Safe StateWhen incorrect behavior is detected, this state prevents further execution
     System Clock CheckVerifies that system clocks are within expected frequencies
     Variable Memory CheckVerifies RAM is working correctly
     Watchdog CheckMonitors CPU execution
     ▼IEC60730 Test SpecificationAutomated tests for validating correct firmware operation
     ▼Integration Test Modules In Library IEC60730Python script supports running test case integration tests for internal modules in library IEC60730
     CPU Register Check Automated Verification TestsPython script for the IEC60730 CPU Register Check Verification tests
     IRQ Automated Verification TestsPython script for the IEC60730 IRQ plausibility verification tests
     Invariable Memory Automated Verification TestsPython script for the IEC60730 Invariable Memory plausibility verification tests
     Program Counter Verification TestsPython script for the IEC60730 Program counter Verification tests
     System Clock Automated Verification TestsPython script for the IEC60730 system clock Verification tests
     Variable Memory Automated Verification TestsPython script for the IEC60730 Variable Memory plausibility verification tests
     Watchdog Automated Verification TestsPython script for the IEC60730 Watchdog timer Verification tests
     ▼UNIT Test Functions In Modules In Library IEC60730C file combined with Unity framework
     Bist Verification Unit TestsHeader file list of test cases for the verification operate function sl_iec60730_bist()
     CPU Registers Verification Unit TestsHeader file list of test cases for the verification operate functions in cpu registers module
     IRQ Verification Unit TestsHeader file list of test cases for the verification operate functions in irq module
     Invariable Memory Verification Unit TestsHeader file list of test cases for the verification operate functions in invariable memory module
     Post Verification Unit TestsHeader file list of test cases for the verification operate function sl_iec60730_post()
     Program Counter Verification Unit TestsHeader file list of test cases for the verification operate function sl_iec60730_program_counter_test()
     Safety Check Verification Unit TestsHeader file list of test cases for the verification operate function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur()
     System Clock Verification Unit TestsHeader file list of test cases for the verification operate functions in system_clock module
     Variable Memory Verification Unit TestsHeader file list of test cases for the verification operate functions in variable memory module
     Watchdog Verification Unit TestsHeader file list of test cases for the verification operate functions in watchdog module
     Toolchain AbstractionMacros for toolchain abstraction
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/namespacejlink.html b/site/document_api_iec60730_library/namespacejlink.html new file mode 100644 index 00000000..c60ef14e --- /dev/null +++ b/site/document_api_iec60730_library/namespacejlink.html @@ -0,0 +1,97 @@ + + + + + + + +Document API IEC60730 Library: jlink Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + +
    +
    +
    +Classes | +Variables
    +
    +
    jlink Namespace Reference
    +
    +
    + + + + +

    +Classes

    class  JLinkDll
     
    + + + + + +

    +Variables

    +int JLINKARM_HOSTIF_USB = 0x01
     
    +int JLINKARM_HOSTIF_IP = 0x02
     
    +

    Detailed Description

    +
    jlink.py:  JLinkARM.dll Wrapper - Python Edition
+
+This module provides access to all functions of JLinkARM.dll.
    + +
    +Generated by   +doxygen + 1.8.17 +
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+ color: #909090; + outline: none; + font: 9pt Arial, Verdana, sans-serif; + -webkit-border-radius: 0px; +} + +#FSearchBox #MSearchField { + margin-left:15px; +} + +#MSearchBox .right { + display:block; + position:absolute; + right:10px; + top:8px; + width:20px; + height:19px; + background:url('search_r.png') no-repeat; + background-position:left; +} + +#MSearchClose { + display: none; + position: absolute; + top: 4px; + background : none; + border: none; + margin: 0px 4px 0px 0px; + padding: 0px 0px; + outline: none; +} + +.left #MSearchClose { + left: 6px; +} + +.right #MSearchClose { + right: 2px; +} + +.MSearchBoxActive #MSearchField { + color: #000000; +} + +/*---------------- Search filter selection */ + +#MSearchSelectWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #90A5CE; + background-color: #F9FAFC; + z-index: 10001; + padding-top: 4px; + padding-bottom: 4px; + -moz-border-radius: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +.SelectItem { + font: 8pt Arial, Verdana, sans-serif; + padding-left: 2px; + padding-right: 12px; + border: 0px; +} + +span.SelectionMark { + margin-right: 4px; + font-family: monospace; + outline-style: none; + text-decoration: none; +} + +a.SelectItem { + display: block; + outline-style: none; + color: #000000; + text-decoration: none; + padding-left: 6px; + padding-right: 12px; +} + +a.SelectItem:focus, +a.SelectItem:active { + color: #000000; + outline-style: none; + text-decoration: none; +} + +a.SelectItem:hover { + color: #FFFFFF; + background-color: #3D578C; + outline-style: none; + text-decoration: none; + cursor: pointer; + display: block; +} + +/*---------------- Search results window */ + +iframe#MSearchResults { + width: 60ex; + height: 15em; +} + +#MSearchResultsWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #000; + background-color: #EEF1F7; + z-index:10000; +} + +/* ----------------------------------- */ + + +#SRIndex { + clear:both; + padding-bottom: 15px; +} + +.SREntry { + font-size: 10pt; + padding-left: 1ex; +} + +.SRPage .SREntry { + font-size: 8pt; + padding: 1px 5px; +} + +body.SRPage { + margin: 5px 2px; +} + +.SRChildren { + padding-left: 3ex; padding-bottom: .5em +} + +.SRPage .SRChildren { + display: none; +} + +.SRSymbol { + font-weight: bold; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRScope { + display: block; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRSymbol:focus, a.SRSymbol:active, +a.SRScope:focus, a.SRScope:active { + text-decoration: underline; +} + +span.SRScope { + padding-left: 4px; +} + +.SRPage .SRStatus { + padding: 2px 5px; + font-size: 8pt; + font-style: italic; +} + +.SRResult { + display: none; +} + +DIV.searchresults { + margin-left: 10px; + margin-right: 10px; +} + +/*---------------- External search page results */ + +.searchresult { + background-color: #F0F3F8; +} + +.pages b { + color: white; + padding: 5px 5px 3px 5px; + background-image: url("../tab_a.png"); + background-repeat: repeat-x; + text-shadow: 0 1px 1px #000000; +} + +.pages { + line-height: 17px; + margin-left: 4px; + text-decoration: none; +} + +.hl { + font-weight: bold; +} + +#searchresults { + margin-bottom: 20px; +} + +.searchpages { + margin-top: 10px; +} + diff --git a/site/document_api_iec60730_library/search/search.js b/site/document_api_iec60730_library/search/search.js new file mode 100644 index 00000000..a554ab9c --- /dev/null +++ b/site/document_api_iec60730_library/search/search.js @@ -0,0 +1,814 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function convertToId(search) +{ + var result = ''; + for (i=0;i do a search + { + this.Search(); + } + } + + this.OnSearchSelectKey = function(evt) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==40 && this.searchIndex0) // Up + { + this.searchIndex--; + this.OnSelectItem(this.searchIndex); + } + else if (e.keyCode==13 || e.keyCode==27) + { + this.OnSelectItem(this.searchIndex); + this.CloseSelectionWindow(); + this.DOMSearchField().focus(); + } + return false; + } + + // --------- Actions + + // Closes the results window. + this.CloseResultsWindow = function() + { + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.Activate(false); + } + + this.CloseSelectionWindow = function() + { + this.DOMSearchSelectWindow().style.display = 'none'; + } + + // Performs a search. + this.Search = function() + { + this.keyTimeout = 0; + + // strip leading whitespace + var searchValue = this.DOMSearchField().value.replace(/^ +/, ""); + + var code = searchValue.toLowerCase().charCodeAt(0); + var idxChar = searchValue.substr(0, 1).toLowerCase(); + if ( 0xD800 <= code && code <= 0xDBFF && searchValue > 1) // surrogate pair + { + idxChar = searchValue.substr(0, 2); + } + + var resultsPage; + var resultsPageWithSearch; + var hasResultsPage; + + var idx = indexSectionsWithContent[this.searchIndex].indexOf(idxChar); + if (idx!=-1) + { + var hexCode=idx.toString(16); + resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + '.html'; + resultsPageWithSearch = resultsPage+'?'+escape(searchValue); + hasResultsPage = true; + } + else // nothing available for this search term + { + resultsPage = this.resultsPath + '/nomatches.html'; + resultsPageWithSearch = resultsPage; + hasResultsPage = false; + } + + window.frames.MSearchResults.location = resultsPageWithSearch; + var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow(); + + if (domPopupSearchResultsWindow.style.display!='block') + { + var domSearchBox = this.DOMSearchBox(); + this.DOMSearchClose().style.display = 'inline'; + if (this.insideFrame) + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + domPopupSearchResultsWindow.style.position = 'relative'; + domPopupSearchResultsWindow.style.display = 'block'; + var width = document.body.clientWidth - 8; // the -8 is for IE :-( + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResults.style.width = width + 'px'; + } + else + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; + var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + } + } + + this.lastSearchValue = searchValue; + this.lastResultsPage = resultsPage; + } + + // -------- Activation Functions + + // Activates or deactivates the search panel, resetting things to + // their default values if necessary. + this.Activate = function(isActive) + { + if (isActive || // open it + this.DOMPopupSearchResultsWindow().style.display == 'block' + ) + { + this.DOMSearchBox().className = 'MSearchBoxActive'; + + var searchField = this.DOMSearchField(); + + if (searchField.value == this.searchLabel) // clear "Search" term upon entry + { + searchField.value = ''; + this.searchActive = true; + } + } + else if (!isActive) // directly remove the panel + { + this.DOMSearchBox().className = 'MSearchBoxInactive'; + this.DOMSearchField().value = this.searchLabel; + this.searchActive = false; + this.lastSearchValue = '' + this.lastResultsPage = ''; + } + } +} + +// ----------------------------------------------------------------------- + +// The class that handles everything on the search results page. +function SearchResults(name) +{ + // The number of matches from the last run of . + this.lastMatchCount = 0; + this.lastKey = 0; + this.repeatOn = false; + + // Toggles the visibility of the passed element ID. + this.FindChildElement = function(id) + { + var parentElement = document.getElementById(id); + var element = parentElement.firstChild; + + while (element && element!=parentElement) + { + if (element.nodeName == 'DIV' && element.className == 'SRChildren') + { + return element; + } + + if (element.nodeName == 'DIV' && element.hasChildNodes()) + { + element = element.firstChild; + } + else if (element.nextSibling) + { + element = element.nextSibling; + } + else + { + do + { + element = element.parentNode; + } + while (element && element!=parentElement && !element.nextSibling); + + if (element && element!=parentElement) + { + element = element.nextSibling; + } + } + } + } + + this.Toggle = function(id) + { + var element = this.FindChildElement(id); + if (element) + { + if (element.style.display == 'block') + { + element.style.display = 'none'; + } + else + { + element.style.display = 'block'; + } + } + } + + // Searches for the passed string. If there is no parameter, + // it takes it from the URL query. + // + // Always returns true, since other documents may try to call it + // and that may or may not be possible. + this.Search = function(search) + { + if (!search) // get search word from URL + { + search = window.location.search; + search = search.substring(1); // Remove the leading '?' + search = unescape(search); + } + + search = search.replace(/^ +/, ""); // strip leading spaces + search = search.replace(/ +$/, ""); // strip trailing spaces + search = search.toLowerCase(); + search = convertToId(search); + + var resultRows = document.getElementsByTagName("div"); + var matches = 0; + + var i = 0; + while (i < resultRows.length) + { + var row = resultRows.item(i); + if (row.className == "SRResult") + { + var rowMatchName = row.id.toLowerCase(); + rowMatchName = rowMatchName.replace(/^sr\d*_/, ''); // strip 'sr123_' + + if (search.length<=rowMatchName.length && + rowMatchName.substr(0, search.length)==search) + { + row.style.display = 'block'; + matches++; + } + else + { + row.style.display = 'none'; + } + } + i++; + } + document.getElementById("Searching").style.display='none'; + if (matches == 0) // no results + { + document.getElementById("NoMatches").style.display='block'; + } + else // at least one result + { + document.getElementById("NoMatches").style.display='none'; + } + this.lastMatchCount = matches; + return true; + } + + // return the first item with index index or higher that is visible + this.NavNext = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index++; + } + return focusItem; + } + + this.NavPrev = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index--; + } + return focusItem; + } + + this.ProcessKeys = function(e) + { + if (e.type == "keydown") + { + this.repeatOn = false; + this.lastKey = e.keyCode; + } + else if (e.type == "keypress") + { + if (!this.repeatOn) + { + if (this.lastKey) this.repeatOn = true; + return false; // ignore first keypress after keydown + } + } + else if (e.type == "keyup") + { + this.lastKey = 0; + this.repeatOn = false; + } + return this.lastKey!=0; + } + + this.Nav = function(evt,itemIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + var newIndex = itemIndex-1; + var focusItem = this.NavPrev(newIndex); + if (focusItem) + { + var child = this.FindChildElement(focusItem.parentNode.parentNode.id); + if (child && child.style.display == 'block') // children visible + { + var n=0; + var tmpElem; + while (1) // search for last child + { + tmpElem = document.getElementById('Item'+newIndex+'_c'+n); + if (tmpElem) + { + focusItem = tmpElem; + } + else // found it! + { + break; + } + n++; + } + } + } + if (focusItem) + { + focusItem.focus(); + } + else // return focus to search field + { + parent.document.getElementById("MSearchField").focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = itemIndex+1; + var focusItem; + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem && elem.style.display == 'block') // children visible + { + focusItem = document.getElementById('Item'+itemIndex+'_c0'); + } + if (!focusItem) focusItem = this.NavNext(newIndex); + if (focusItem) focusItem.focus(); + } + else if (this.lastKey==39) // Right + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'block'; + } + else if (this.lastKey==37) // Left + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'none'; + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } + + this.NavChild = function(evt,itemIndex,childIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + if (childIndex>0) + { + var newIndex = childIndex-1; + document.getElementById('Item'+itemIndex+'_c'+newIndex).focus(); + } + else // already at first child, jump to parent + { + document.getElementById('Item'+itemIndex).focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = childIndex+1; + var elem = document.getElementById('Item'+itemIndex+'_c'+newIndex); + if (!elem) // last child, jump to parent next parent + { + elem = this.NavNext(itemIndex+1); + } + if (elem) + { + elem.focus(); + } + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } +} + +function setKeyActions(elem,action) +{ + elem.setAttribute('onkeydown',action); + elem.setAttribute('onkeypress',action); + elem.setAttribute('onkeyup',action); +} + +function setClassAttr(elem,attr) +{ + elem.setAttribute('class',attr); + elem.setAttribute('className',attr); +} + +function createResults() +{ + var results = document.getElementById("SRResults"); + for (var e=0; e + + + + + + + + +
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    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +Classes | +Macros | +Typedefs | +Enumerations | +Functions | +Variables
    +
    +
    sl_iec60730.h File Reference
    +
    +
    + +

    Library definitions. +More...

    +
    #include "sl_iec60730_config.h"
    +#include "sl_iec60730_toolchain.h"
    +#include "em_device.h"
    +#include "em_core.h"
    +#include "em_gpcrc.h"
    +
    +

    Go to the source code of this file.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Classes

    struct  sl_iec60730_library_version_t
     
    struct  sl_iec60730_safety_check_t
     
    struct  sl_iec60730_irq_execution_bounds_t
     
    struct  sl_iec60730_irq_fail_t
     
    struct  sl_iec60730_irq_cfg_t
     
    struct  sl_iec60730_imc_params_t
     This structure is used as configuration for IMC testing, that holds GPCRC Register. More...
     
    struct  sl_iec60730_update_crc_params_t
     
    struct  sl_iec60730_imc_test_region_t
     This structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check. More...
     
    struct  sl_iec60730_imc_test_multiple_regions_t
     
    struct  sl_iec60730_vmc_test_region_t
     This structure is used as configuration for VMC testing. More...
     
    struct  sl_iec60730_vmc_test_multiple_regions_t
     This structure is used as multiple test regions for VMC testing. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    +#define IE60730_LIBRARY_VERSION   { 2, 0, 0 }
     
    #define SL_IEC60730_BOARD_HEADER
     
    #define UNUSED_VAR(x)   (void) (x)
     
    +#define __CONCAT(x, y)   x##y
     Macro merge separate words to be joined into a single word.
     
    +#define CONCAT(x, y)   __CONCAT(x, y)
     
    +#define STR(x)   #x
     Macro convert to string.
     
    +#define XSTR(x)   STR(x)
     
    #define LABEL_DEF(NAME)   LB_ASM volatile(LB_XSTR(NAME))
     
    #define __no_init
     
    #define DEC_CLASSB_VARS(vartype, name)
     
    #define EXTERN_DEC_CLASSB_VARS(vartype, name)
     
    #define sl_static_dec_classb_vars(vartype, name)
     
    #define INV_CLASSB_VAR(vartype, name)   CONCAT(name, _inv) = (vartype) (~(vartype) name)
     
    #define INV_CLASSB_PVAR(vartype, name)   CONCAT(name, _inv) = (vartype *) (~(vartype) name)
     
    #define CHECK_INTEGRITY(vartype, x)   ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, _inv)))
     
    #define sl_iec60730_crc_t
     
    #define SL_IEC60730_INVAR_BLOCKS_PER_BIST
     
    #define SL_IEC60730_ROM_SIZE   ((uint32_t) SL_IEC60730_ROM_END - (uint32_t) SL_IEC60730_ROM_START)
     
    #define STEPS_NUMBER   ((uint32_t) SL_IEC60730_ROM_SIZE / SL_IEC60730_FLASH_BLOCK)
     
    #define SL_IEC60730_ROM_SIZE_INWORDS   ((uint32_t) SL_IEC60730_ROM_SIZE / 4U)
     
    #define SL_IEC60730_FLASH_BLOCK_WORDS   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS / STEPS_NUMBER))
     
    #define SL_IEC60730_ROM_SIZE_TEST(start, end)   ((uint32_t) end - (uint32_t) start)
     
    #define STEPS_NUMBER_TEST(start, end)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / SL_IEC60730_FLASH_BLOCK)
     
    #define SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end)   ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / 4U)
     
    #define SL_IEC60730_FLASH_BLOCK_WORDS_TEST(start, end)   ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) / STEPS_NUMBER_TEST(start, end)))
     
    #define SL_IEC60730_REF_CRC   (check_sum)
     
    #define BLOCKSIZE   (4)
     
    #define RT_BLOCK_OVERLAP   (1)
     
    #define RT_BLOCKSIZE   (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
     
    #define BACKGROUND   ((uint32_t) 0x00000000uL)
     
    +#define IEC60730_VMC_COMPLETE   (1 << 0)
     Mask bit used for Variable Memory Checks completed.
     
    +#define IEC60730_IMC_COMPLETE   (1 << 1)
     Mask bit used for Invariable Memory Checks completed.
     
    +#define IEC60730_CPU_CLOCKS_COMPLETE   (1 << 2)
     Mask bit used for CPU Clocks Checks completed.
     
    +#define IEC60730_CPU_REGS_COMPLETE   (1 << 3)
     Mask bit used for CPU Register Checks completed.
     
    +#define IEC60730_INTERRUPT_COMPLETE   (1 << 4)
     Mask bit used for Interrupt Checks completed.
     
    +#define IEC60730_GPIO_COMPLETE   (1 << 5)
     Mask bit used for GPIO Plausibility Checks completed.
     
    +#define IEC60730_ANALOG_COMPLETE   (1 << 6)
     Mask bit used for Analog Plausibility Checks completed.
     
    +#define IEC60730_COMMS_COMPLETE   (1 << 7)
     Mask bit used for Communications Plausibility Checks completed.
     
    +#define IEC60730_OEM0_COMPLETE   (1 << 8)
     Mask bit used for OEM Check 0 completed.
     
    +#define IEC60730_OEM1_COMPLETE   (1 << 9)
     Mask bit used for OEM Check 1 completed.
     
    +#define IEC60730_OEM2_COMPLETE   (1 << 10)
     Mask bit used for OEM Check 2 completed.
     
    +#define IEC60730_OEM3_COMPLETE   (1 << 11)
     Mask bit used for OEM Check 3 completed.
     
    +#define IEC60730_OEM4_COMPLETE   (1 << 12)
     Mask bit used for OEM Check 4 completed.
     
    +#define IEC60730_OEM5_COMPLETE   (1 << 13)
     Mask bit used for OEM Check 5 completed.
     
    +#define IEC60730_OEM6_COMPLETE   (1 << 14)
     Mask bit used for OEM Check 6 completed.
     
    +#define IEC60730_OEM7_COMPLETE   (1 << 15)
     Mask bit used for OEM Check 7 completed.
     
    #define IEC60730_ALL_COMPLETE_BITS
     Mask used for checking that all bits are set. More...
     
    #define IEC60730_MAX_IRQ_CHECK   32
     
    +#define SL_IEC60370_ENTER_ATOMIC()   CORE_ENTER_ATOMIC()
     Enter ATOMIC section.
     
    +#define SL_IEC60370_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
     Exit ATOMIC section.
     
    +#define SL_IEC60370_DECLARE_IRQ_STATE   CORE_DECLARE_IRQ_STATE;
     Declare irq state.
     
    #define SL_IEC60730_IMC_POST_ENTER_ATOMIC()
     Enter ATOMIC section of IMC Post. More...
     
    +#define SL_IEC60730_IMC_POST_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
     Exit ATOMIC section of IMC Post.
     
    #define SL_IEC60730_IMC_BIST_ENTER_ATOMIC()
     Enter ATOMIC section of IMC Bist. More...
     
    +#define SL_IEC60730_IMC_BIST_EXIT_ATOMIC()   CORE_EXIT_ATOMIC()
     Exit ATOMIC section of IMC Bist.
     
    +#define SL_IEC60730_CRC_INIT(crc, init)   GPCRC_Init(crc, init)
     Initialize the General Purpose Cyclic Redundancy Check (GPCRC) module.
     
    +#define SL_IEC60730_CRC_RESET(crc)   GPCRC_Reset(crc)
     Reset GPCRC registers to the hardware reset state.
     
    +#define SL_IEC60730_CRC_START(crc)   GPCRC_Start(crc)
     Issues a command to initialize CRC calculation.
     
    +#define SL_IEC60730_CRC_INPUTU32(crc, d)   GPCRC_InputU32(crc, d)
     Writes a 32-bit value to the input data register of the CRC.
     
    +#define SL_IEC60730_CRC_INPUTU16(crc, d)   GPCRC_InputU16(crc, d)
     Writes a 32-bit value to the input data register of the CRC.
     
    +#define SL_IEC60730_CRC_INPUTU8(crc, d)   GPCRC_InputU8(crc, d)
     Writes a 8-bit value to the input data register of the CRC.
     
    +#define SL_IEC60730_CRC_DATA_READ(crc)   GPCRC_DataRead(crc)
     Reads the data register of the CRC.
     
    +#define SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(crc)   GPCRC_DataReadBitReversed(crc)
     Reads the data register of the CRC.
     
    +#define SL_IEC60730_CRC_DATA_READ_BYTE_REVERSED(crc)   GPCRC_DataReadByteReversed(crc)
     Reads the data register of the CRC.
     
    #define SL_IEC60730_DEFAULT_GPRC
     
    #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST   "123456789"
     
    #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE
     
    #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT
     
    #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT
     
    #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT
     
    #define SL_IEC60730_VMC_POST_ENTER_CRITICAL()
     Enter ATOMIC section of VMC Post. More...
     
    +#define SL_IEC60730_VMC_POST_EXIT_CRITICAL()   CORE_EXIT_CRITICAL()
     Exit ATOMIC section of VMC Post.
     
    #define SL_IEC60730_VMC_BIST_ENTER_CRITICAL()
     Enter ATOMIC section of VMC Bist. More...
     
    +#define SL_IEC60730_VMC_BIST_EXIT_CRITICAL()   CORE_EXIT_CRITICAL()
     Exit ATOMIC section of VMC Bist.
     
    + + + + + + + + + + +

    +Typedefs

    +typedef GPCRC_TypeDef sl_iec60730_crc_typedef
     the General Purpose Cyclic Redundancy Check (GPCRC) module
     
    +typedef GPCRC_Init_TypeDef sl_iec60730_crc_init_typedef
     CRC initialization structure.
     
    +typedef uint8_t sl_iec60730_read_type_t
     The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer.
     
    + + + + + + + + + + + + + +

    +Enumerations

    enum  sl_iec60730_test_result_t { SL_IEC60730_TEST_FAILED = 0, +SL_IEC60730_TEST_PASSED = 1, +SL_IEC60730_TEST_IN_PROGRESS = 2 + }
     The result of a test. More...
     
    enum  sl_iec60730_test_failure_t {
    +  SL_IEC60730_NO_FAILURE = 0, +SL_IEC60730_TEST_VERIFY = 1, +SL_IEC60730_WATCHDOG_POST_FAIL = 2, +SL_IEC60730_VMC_FAIL = 3, +
    +  SL_IEC60730_IMC_FAIL = 4, +SL_IEC60730_CPU_REGISTERS_FAIL = 5, +SL_IEC60730_CLOCK_FAIL = 6, +SL_IEC60730_INTERRUPT_FAIL = 7, +
    +  SL_IEC60730_PROGRAM_COUNTER_FAIL = 8, +SL_IEC60730_GPIO_FAIL = 9, +SL_IEC60730_ANALOG_FAIL = 10, +SL_IEC60730_CS0_FAIL = 11, +
    +  SL_IEC60730_LESENSE0_FAIL = 12, +SL_IEC60730_RADIO_FAIL = 13, +SL_IEC60730_I2C0_FAIL = 14, +SL_IEC60730_I2C1_FAIL = 15, +
    +  SL_IEC60730_USART0_FAIL = 16, +SL_IEC60730_USART1_FAIL = 17, +SL_IEC60730_USART2_FAIL = 18, +SL_IEC60730_USART3_FAIL = 19, +
    +  SL_IEC60730_LEUART0_FAIL = 20, +SL_IEC60730_EUART0_FAIL = 21, +SL_IEC60730_PDM0_FAIL = 22, +SL_IEC60730_OEM_FAIL_1 = 23, +
    +  SL_IEC60730_OEM_FAIL_2 = 24, +SL_IEC60730_OEM_FAIL_3 = 25, +SL_IEC60730_OEM_FAIL_4 = 26, +SL_IEC60730_SAFETY_CHECK_FAIL = 0XFF +
    + }
     Cause of failure passed to Safe State function. More...
     
    enum  sl_iec60730_timer_test_control_t { SL_IEC60730_TIMER_TEST_DISABLE = 0, +SL_IEC60730_TIMER_TEST_ENABLE = 1 + }
     Enable/disable switch for system timer test. More...
     
    enum  { SL_IEC60730_IMC_DATA_READ = 0, +SL_IEC60730_IMC_DATA_READ_BIT_REVERSED, +SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED + }
     The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    void sl_iec60730_safe_state (sl_iec60730_test_failure_t failure)
     
    void sl_iec60730_post (void)
     
    void sl_iec60730_safety_check_error_occur (sl_iec60730_test_failure_t failure)
     
    void sl_iec60730_safety_check_reset_error (void)
     
    sl_iec60730_safety_check_t * sl_iec60730_safety_check_get_error (void)
     
    void sl_iec60730_bist (void)
     
    void sl_iec60730_restart_watchdogs (void)
     
    void sl_iec60730_sys_clock_count_tick (void)
     
    void sl_iec60730_test_clock_tick (void)
     
    void sl_iec60730_sys_clock_count_reset (void)
     
    void sl_iec60730_imc_init (sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config)
     
    sl_iec60730_test_result_t sl_iec60730_update_crc_with_data_buffer (sl_iec60730_update_crc_params_t *params, sl_iec60730_crc_t *crc, uint8_t *buffer, uint32_t size)
     
    void sl_iec60730_vmc_init (sl_iec60730_vmc_test_multiple_regions_t *test_config)
     
    + + + + + + + + +

    +Variables

    +const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION
     Global variable which holds the IEC60370 library version.
     
    sl_iec60730_crc_t check_sum
     
    uint16_t sl_iec60730_program_counter_check
     
    +

    Detailed Description

    +

    Library definitions.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +

    Macro Definition Documentation

    + +

    ◆ SL_IEC60730_BOARD_HEADER

    + +
    +
    + + + + +
    #define SL_IEC60730_BOARD_HEADER
    +
    +

    User SHOULD define SL_IEC60730_BOARD_HEADER definition for using IMC and VMC modules. This definition SHOULD be a header file. In this header file SHOULD be definitions listed in IMC and VMC modules. In our example we defined the SL_IEC60730_BOARD_HEADER definition is sl_iec60730_board.h. Our definitions in SL_IEC60730_BOARD_HEADER is an example that you can reference. Of course, user CAN redefine the SL_IEC60730_BOARD_HEADER definition to any header file.

    + +
    +
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730_8h_source.html b/site/document_api_iec60730_library/sl__iec60730_8h_source.html new file mode 100644 index 00000000..4f686521 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730_8h_source.html @@ -0,0 +1,647 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_H
    +
    19 #define SL_IEC60730_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730_config.h"
    +
    26 #include "sl_iec60730_toolchain.h"
    +
    27 #include "em_device.h"
    +
    28 #include "em_core.h"
    +
    29 #include "em_gpcrc.h"
    +
    30 #include SL_IEC60730_BOARD_HEADER
    +
    31 
    +
    32 #define IE60730_LIBRARY_VERSION { 2, 0, 0 }
    +
    33 
    +
    34 #ifdef DOXYGEN
    +
    35 #define SL_IEC60730_BOARD_HEADER
    +
    42 
    +
    43 #else
    +
    44 #define IEC60370_CM4 0
    +
    45 #define IEC60370_CM33 1
    +
    46 #if defined(__CM4_REV)
    +
    47 #define IEC60370_CPU IEC60370_CM4
    +
    48 #elif defined(__CM33_REV)
    +
    49 #define IEC60370_CPU IEC60370_CM33
    +
    50 #else
    +
    51 #error "Unknown Core type!"
    +
    52 #endif
    +
    53 
    +
    54 #endif /* DOXYGEN */
    +
    55 
    +
    56 /**************************************************************************/
    +
    62 typedef struct {
    +
    63  uint8_t major;
    +
    64  uint8_t minor;
    +
    65  uint8_t revision;
    +
    66 } sl_iec60730_library_version_t;
    +
    67 
    +
    69 extern const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION;
    +
    70 
    +
    72 typedef enum {
    +
    73  SL_IEC60730_TEST_FAILED = 0,
    +
    74  SL_IEC60730_TEST_PASSED = 1,
    +
    75  SL_IEC60730_TEST_IN_PROGRESS = 2,
    +
    76 } sl_iec60730_test_result_t;
    +
    77 
    +
    79 typedef enum {
    +
    80  SL_IEC60730_NO_FAILURE = 0,
    +
    81  SL_IEC60730_TEST_VERIFY = 1,
    +
    82  SL_IEC60730_WATCHDOG_POST_FAIL = 2,
    +
    83  SL_IEC60730_VMC_FAIL = 3,
    +
    84  SL_IEC60730_IMC_FAIL = 4,
    +
    85  SL_IEC60730_CPU_REGISTERS_FAIL = 5,
    +
    86  SL_IEC60730_CLOCK_FAIL = 6,
    +
    87  SL_IEC60730_INTERRUPT_FAIL = 7,
    +
    88  SL_IEC60730_PROGRAM_COUNTER_FAIL = 8,
    +
    89  SL_IEC60730_GPIO_FAIL = 9,
    +
    90  SL_IEC60730_ANALOG_FAIL = 10,
    +
    91  SL_IEC60730_CS0_FAIL = 11,
    +
    92  SL_IEC60730_LESENSE0_FAIL = 12,
    +
    93  SL_IEC60730_RADIO_FAIL = 13,
    +
    94  SL_IEC60730_I2C0_FAIL = 14,
    +
    95  SL_IEC60730_I2C1_FAIL = 15,
    +
    96  SL_IEC60730_USART0_FAIL = 16,
    +
    97  SL_IEC60730_USART1_FAIL = 17,
    +
    98  SL_IEC60730_USART2_FAIL = 18,
    +
    99  SL_IEC60730_USART3_FAIL = 19,
    +
    100  SL_IEC60730_LEUART0_FAIL = 20,
    +
    101  SL_IEC60730_EUART0_FAIL = 21,
    +
    102  SL_IEC60730_PDM0_FAIL = 22,
    +
    103  SL_IEC60730_OEM_FAIL_1 = 23,
    +
    104  SL_IEC60730_OEM_FAIL_2 = 24,
    +
    105  SL_IEC60730_OEM_FAIL_3 = 25,
    +
    106  SL_IEC60730_OEM_FAIL_4 = 26,
    +
    107  SL_IEC60730_SAFETY_CHECK_FAIL = 0XFF,
    +
    108 } sl_iec60730_test_failure_t;
    +
    109 
    +
    112 #ifndef UNUSED_VAR
    +
    113 #define UNUSED_VAR(x) (void) (x)
    +
    114 #endif /* UNUSED_VAR */
    +
    115 
    +
    117 #ifndef __CONCAT
    +
    118 #define __CONCAT(x, y) x##y
    +
    119 #endif
    +
    120 
    +
    121 #define CONCAT(x, y) __CONCAT(x, y)
    +
    122 
    +
    124 #define STR(x) #x
    +
    125 #define XSTR(x) STR(x)
    +
    126 
    +
    129 #ifndef LABEL_DEF
    +
    130 #define LABEL_DEF(NAME) LB_ASM volatile(LB_XSTR(NAME))
    +
    131 #endif /* LABEL_DEF */
    +
    132 
    +
    133 #ifdef DOXYGEN
    +
    134 #define __no_init
    +
    137 #else // !DOXYGEN
    +
    138 #ifndef __no_init
    +
    139 #define __no_init
    +
    140 #endif /* __no_init */
    +
    141 #endif // DOXYGEN
    +
    142 
    +
    145 #define DEC_CLASSB_VARS(vartype, name) \
    +
    146  __no_init vartype name __CLASSB_RAM; \
    +
    147  __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
    +
    148 
    +
    151 #define EXTERN_DEC_CLASSB_VARS(vartype, name) \
    +
    152  extern __no_init vartype name __CLASSB_RAM; \
    +
    153  extern __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
    +
    154 
    +
    157 #define sl_static_dec_classb_vars(vartype, name) \
    +
    158  static __no_init vartype name __CLASSB_RAM; \
    +
    159  static __no_init vartype CONCAT(name, _inv) __CLASSB_RAM
    +
    160 
    +
    163 #define INV_CLASSB_VAR(vartype, name) \
    +
    164  CONCAT(name, _inv) = (vartype) (~(vartype) name)
    +
    165 
    +
    168 #define INV_CLASSB_PVAR(vartype, name) \
    +
    169  CONCAT(name, _inv) = (vartype *) (~(vartype) name)
    +
    170 
    +
    171 #if ((defined UNIT_TEST_IEC60730_VARIABLE_MEMORY_ENABLE) || defined (UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE))
    +
    172 #define CHECK_INTEGRITY(vartype, x) unit_test_mock_check_integrity()
    +
    173 #else
    +
    174 #define CHECK_INTEGRITY(vartype, x) \
    +
    177  ((vartype) - 1 == ((vartype) x ^ (vartype) CONCAT(x, _inv)))
    +
    178 #endif // (UNIT_TEST_IEC60730_VARIABLE_MEMORY_ENABLE || UNIT_TEST_IEC60730_INVARIABLE_MEMORY_ENABLE)
    +
    179 
    +
    182 /**************************************************************************/
    +
    187 #ifdef DOXYGEN
    +
    188 #define sl_iec60730_crc_t
    +
    192 
    +
    196 #define SL_IEC60730_INVAR_BLOCKS_PER_BIST
    +
    197 
    +
    198 #else // !DOXYGEN
    +
    199 
    +
    200 #if (SL_IEC60730_USE_CRC_32_ENABLE == 1)
    +
    201 typedef uint32_t sl_iec60730_crc_t;
    +
    203 #else /* !SL_IEC60730_USE_CRC_32_ENABLE */
    +
    204 typedef uint16_t sl_iec60730_crc_t;
    +
    206 #endif /* SL_IEC60730_USE_CRC_32_ENABLE */
    +
    207 
    +
    208 #endif // DOXYGEN
    +
    209 
    +
    213 extern sl_iec60730_crc_t check_sum;
    +
    214 
    +
    217 #define SL_IEC60730_ROM_SIZE ((uint32_t) SL_IEC60730_ROM_END - (uint32_t) SL_IEC60730_ROM_START)
    +
    218 
    +
    221 #define STEPS_NUMBER ((uint32_t) SL_IEC60730_ROM_SIZE / SL_IEC60730_FLASH_BLOCK)
    +
    222 
    +
    225 #define SL_IEC60730_ROM_SIZE_INWORDS ((uint32_t) SL_IEC60730_ROM_SIZE / 4U)
    +
    226 
    +
    229 #define SL_IEC60730_FLASH_BLOCK_WORDS ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS / STEPS_NUMBER))
    +
    230 
    +
    234 #define SL_IEC60730_ROM_SIZE_TEST(start, end) \
    +
    235  ((uint32_t) end - (uint32_t) start)
    +
    236 
    +
    239 #define STEPS_NUMBER_TEST(start, end) \
    +
    240  ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / SL_IEC60730_FLASH_BLOCK)
    +
    241 
    +
    244 #define SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) ((uint32_t) SL_IEC60730_ROM_SIZE_TEST(start, end) / 4U)
    +
    245 
    +
    248 #define SL_IEC60730_FLASH_BLOCK_WORDS_TEST(start, end) ((uint32_t) (SL_IEC60730_ROM_SIZE_INWORDS_TEST(start, end) / STEPS_NUMBER_TEST(start, end)))
    +
    249 
    +
    253 #ifndef SL_IEC60730_REF_CRC
    +
    254 #define SL_IEC60730_REF_CRC (check_sum)
    +
    255 #endif
    +
    256 
    +
    259 /**************************************************************************/
    +
    264 #define BLOCKSIZE (4)
    +
    267 
    +
    272 #define RT_BLOCK_OVERLAP (1)
    +
    273 
    +
    276 #define RT_BLOCKSIZE (BLOCKSIZE + (RT_BLOCK_OVERLAP << 1))
    +
    277 
    +
    283 #ifndef BACKGROUND
    +
    284 #define BACKGROUND ((uint32_t) 0x00000000uL)
    +
    285 #endif
    +
    286 
    +
    289 /**************************************************************************/
    +
    301 /**************************************************************************/
    +
    314 void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure);
    +
    317 /**************************************************************************/
    +
    322 extern uint16_t sl_iec60730_program_counter_check;
    +
    330 
    +
    332 #define IEC60730_VMC_COMPLETE (1 << 0)
    +
    333 #define IEC60730_IMC_COMPLETE (1 << 1)
    +
    335 #define IEC60730_CPU_CLOCKS_COMPLETE (1 << 2)
    +
    337 #define IEC60730_CPU_REGS_COMPLETE (1 << 3)
    +
    339 #define IEC60730_INTERRUPT_COMPLETE (1 << 4)
    +
    341 #define IEC60730_GPIO_COMPLETE (1 << 5)
    +
    343 #define IEC60730_ANALOG_COMPLETE (1 << 6)
    +
    345 #define IEC60730_COMMS_COMPLETE (1 << 7)
    +
    347 #define IEC60730_OEM0_COMPLETE (1 << 8)
    +
    349 #define IEC60730_OEM1_COMPLETE (1 << 9)
    +
    351 #define IEC60730_OEM2_COMPLETE (1 << 10)
    +
    353 #define IEC60730_OEM3_COMPLETE (1 << 11)
    +
    355 #define IEC60730_OEM4_COMPLETE (1 << 12)
    +
    357 #define IEC60730_OEM5_COMPLETE (1 << 13)
    +
    359 #define IEC60730_OEM6_COMPLETE (1 << 14)
    +
    361 #define IEC60730_OEM7_COMPLETE (1 << 15)
    +
    363 #define IEC60730_ALL_COMPLETE_BITS \
    +
    365  (IEC60730_VMC_COMPLETE | IEC60730_IMC_COMPLETE \
    +
    366  | IEC60730_CPU_CLOCKS_COMPLETE | IEC60730_CPU_REGS_COMPLETE \
    +
    367  | IEC60730_INTERRUPT_COMPLETE | IEC60730_GPIO_COMPLETE \
    +
    368  | IEC60730_ANALOG_COMPLETE | IEC60730_COMMS_COMPLETE \
    +
    369  | IEC60730_OEM0_COMPLETE | IEC60730_OEM1_COMPLETE | IEC60730_OEM2_COMPLETE \
    +
    370  | IEC60730_OEM3_COMPLETE | IEC60730_OEM4_COMPLETE | IEC60730_OEM5_COMPLETE \
    +
    371  | IEC60730_OEM6_COMPLETE | IEC60730_OEM7_COMPLETE)
    +
    372 
    +
    375 /**************************************************************************/
    +
    386 /**************************************************************************/
    +
    394 void sl_iec60730_post(void);
    +
    397 /**************************************************************************/
    +
    420 typedef struct {
    +
    426  uint32_t error;
    +
    427  uint8_t number_error;
    +
    428 } sl_iec60730_safety_check_t;
    +
    429 
    +
    430 /**************************************************************************/
    +
    440 void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure);
    +
    441 
    +
    442 /**************************************************************************/
    +
    450 void sl_iec60730_safety_check_reset_error(void);
    +
    451 
    +
    452 /**************************************************************************/
    +
    461 sl_iec60730_safety_check_t* sl_iec60730_safety_check_get_error(void);
    +
    462 
    +
    463 /**************************************************************************/
    +
    475 void sl_iec60730_bist(void);
    +
    478 /**************************************************************************/
    +
    483 /**************************************************************************/
    +
    492 void sl_iec60730_restart_watchdogs(void);
    +
    493 
    +
    496 /**************************************************************************/
    +
    501 typedef enum {
    +
    503  SL_IEC60730_TIMER_TEST_DISABLE = 0,
    +
    504  SL_IEC60730_TIMER_TEST_ENABLE = 1,
    +
    505 } sl_iec60730_timer_test_control_t;
    +
    506 
    +
    529 
    +
    530 /**************************************************************************/
    +
    540 void sl_iec60730_sys_clock_count_tick(void);
    +
    541 
    +
    542 /**************************************************************************/
    +
    552 void sl_iec60730_test_clock_tick(void);
    +
    553 
    +
    554 /**************************************************************************/
    +
    564 void sl_iec60730_sys_clock_count_reset(void);
    +
    565 
    +
    568 /**************************************************************************/
    +
    573 #define IEC60730_MAX_IRQ_CHECK 32
    +
    577 
    +
    580 typedef struct {
    +
    581  SL_IEC60730_IRQ_TYPE_VARIABLE
    +
    582  min;
    +
    583  SL_IEC60730_IRQ_TYPE_VARIABLE
    +
    584  max;
    +
    585 } sl_iec60730_irq_execution_bounds_t;
    +
    586 
    +
    589 // registered to check.
    +
    590 typedef struct {
    +
    591  uint32_t irq_fail;
    +
    592  uint8_t num_irq_fail;
    +
    593 } sl_iec60730_irq_fail_t;
    +
    594 
    +
    611 typedef struct {
    +
    612  volatile SL_IEC60730_IRQ_TYPE_VARIABLE* irq_count;
    +
    613  const sl_iec60730_irq_execution_bounds_t* irq_bounds;
    +
    614  uint8_t size;
    +
    615 }sl_iec60730_irq_cfg_t;
    +
    618 /**************************************************************************/
    +
    623 #define SL_IEC60370_ENTER_ATOMIC() CORE_ENTER_ATOMIC()
    +
    625 #define SL_IEC60370_EXIT_ATOMIC() CORE_EXIT_ATOMIC()
    +
    627 #define SL_IEC60370_DECLARE_IRQ_STATE CORE_DECLARE_IRQ_STATE;
    +
    629 
    +
    631 #define SL_IEC60730_IMC_POST_ENTER_ATOMIC() \
    +
    632  CORE_DECLARE_IRQ_STATE; \
    +
    633  CORE_ENTER_ATOMIC()
    +
    634 
    +
    636 #define SL_IEC60730_IMC_POST_EXIT_ATOMIC() CORE_EXIT_ATOMIC()
    +
    637 
    +
    639 #define SL_IEC60730_IMC_BIST_ENTER_ATOMIC() \
    +
    640  CORE_DECLARE_IRQ_STATE; \
    +
    641  CORE_ENTER_ATOMIC()
    +
    642 
    +
    644 #define SL_IEC60730_IMC_BIST_EXIT_ATOMIC() CORE_EXIT_ATOMIC()
    +
    645 
    +
    647 #define SL_IEC60730_CRC_INIT(crc, init) GPCRC_Init(crc, init)
    +
    648 #define SL_IEC60730_CRC_RESET(crc) GPCRC_Reset(crc)
    +
    650 #define SL_IEC60730_CRC_START(crc) GPCRC_Start(crc)
    +
    652 #define SL_IEC60730_CRC_INPUTU32(crc, d) GPCRC_InputU32(crc, d)
    +
    654 #define SL_IEC60730_CRC_INPUTU16(crc, d) GPCRC_InputU16(crc, d)
    +
    656 #define SL_IEC60730_CRC_INPUTU8(crc, d) GPCRC_InputU8(crc, d)
    +
    658 #define SL_IEC60730_CRC_DATA_READ(crc) GPCRC_DataRead(crc)
    +
    660 #define SL_IEC60730_CRC_DATA_READ_BIT_REVERSED(crc) GPCRC_DataReadBitReversed(crc)
    +
    662 #define SL_IEC60730_CRC_DATA_READ_BYTE_REVERSED(crc) GPCRC_DataReadByteReversed(crc)
    +
    664 
    +
    665 // CRC
    +
    667 typedef GPCRC_TypeDef sl_iec60730_crc_typedef;
    +
    669 typedef GPCRC_Init_TypeDef sl_iec60730_crc_init_typedef;
    +
    670 
    +
    672 typedef uint8_t sl_iec60730_read_type_t;
    +
    674 enum {
    +
    675  SL_IEC60730_IMC_DATA_READ = 0,
    +
    676  SL_IEC60730_IMC_DATA_READ_BIT_REVERSED =
    +
    677  1,
    +
    678  SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED =
    +
    679  2,
    +
    680 };
    +
    681 
    +
    683 typedef struct {
    +
    684  sl_iec60730_crc_typedef *gpcrc;
    +
    685 } sl_iec60730_imc_params_t;
    +
    686 
    +
    690 typedef struct {
    +
    691 #if (SL_IEC60730_CRC_USE_SW_ENABLE == 0)
    +
    692  sl_iec60730_imc_params_t hal;
    +
    693  sl_iec60730_crc_init_typedef init;
    +
    694  sl_iec60730_read_type_t readType;
    +
    695 #endif /* SL_IEC60730_CRC_USE_SW_ENABLE */
    +
    696  sl_iec60730_crc_t xorOut;
    +
    697 } sl_iec60730_update_crc_params_t;
    +
    698 
    +
    700 typedef struct {
    +
    701  uint32_t *start;
    +
    702  uint32_t *end;
    +
    703 } sl_iec60730_imc_test_region_t;
    +
    704 
    +
    708 typedef struct {
    +
    709  const sl_iec60730_imc_test_region_t *region;
    +
    710  uint8_t number_of_test_regions;
    +
    711 } sl_iec60730_imc_test_multiple_regions_t;
    +
    712 
    +
    713 #ifdef DOXYGEN
    +
    714 #define SL_IEC60730_DEFAULT_GPRC
    +
    718 #else
    +
    719 #ifndef SL_IEC60730_DEFAULT_GPRC
    +
    720 #if (_SILICON_LABS_32B_SERIES == 2)
    +
    721 #if ((defined SL_IEC60730_NON_SECURE_ENABLE) || (!defined(SL_TRUSTZONE_SECURE)))
    +
    722 #define SL_IEC60730_DEFAULT_GPRC GPCRC_NS
    +
    724 #else
    +
    725 #define SL_IEC60730_DEFAULT_GPRC GPCRC
    +
    727 #endif
    +
    728 #else // (_SILICON_LABS_32B_SERIES == 2)
    +
    729 #define SL_IEC60730_DEFAULT_GPRC GPCRC
    +
    731 #endif // (_SILICON_LABS_32B_SERIES == 2)
    +
    732 #endif // !SL_IEC60730_DEFAULT_GPRC
    +
    733 #endif // DOXYGEN
    +
    734 
    +
    737 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST "123456789"
    +
    738 
    +
    739 #ifdef DOXYGEN
    +
    740 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE
    +
    745 
    +
    750 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT
    +
    751 
    +
    756 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT
    +
    757 
    +
    760 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT
    +
    761 
    +
    762 #else
    +
    763 
    +
    764 #if (SL_IEC60730_CRC_USE_SW_ENABLE == 1)
    +
    765 #if (SL_IEC60730_USE_CRC_32_ENABLE == 1)
    +
    766 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE
    +
    767 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0xFFFFFFFFuL)
    +
    768 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0xCBF43926)
    +
    769 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT { SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT }
    +
    770 #else /* !SL_IEC60730_USE_CRC_32_ENABLE */
    +
    771 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE
    +
    772 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0x0000)
    +
    773 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0x31C3)
    +
    774 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT { SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT }
    +
    775 #endif /* SL_IEC60730_USE_CRC_32_ENABLE */
    +
    776 #else /* !SL_IEC60730_CRC_USE_SW_ENABLE */
    +
    777 #if (SL_IEC60730_USE_CRC_32_ENABLE == 1)
    +
    778 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE
    +
    779 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0xFFFFFFFFuL)
    +
    780 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0xCBF43926)
    +
    781 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT \
    +
    782  { \
    +
    783  0x04C11DB7UL, \
    +
    784  SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE, \
    +
    785  false, \
    +
    786  false, \
    +
    787  false, \
    +
    788  false, \
    +
    789  true, \
    +
    790  }
    +
    791 
    +
    792 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT \
    +
    793  { { SL_IEC60730_DEFAULT_GPRC }, \
    +
    794  SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT, \
    +
    795  SL_IEC60730_IMC_DATA_READ, \
    +
    796  SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT }
    +
    797 #else /* !SL_IEC60730_USE_CRC_32_ENABLE */
    +
    798 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE SL_IEC60730_IMC_INIT_VALUE
    +
    799 #define SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT (0x0000)
    +
    800 #define SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT (0x31C3)
    +
    801 #define SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT \
    +
    802  { \
    +
    803  0x1021UL, \
    +
    804  SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE, \
    +
    805  false, \
    +
    806  true, \
    +
    807  false, \
    +
    808  false, \
    +
    809  true, \
    +
    810  }
    +
    811 #define SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT \
    +
    812  { { SL_IEC60730_DEFAULT_GPRC }, \
    +
    813  SL_IEC60730_IMC_CRC_BUFFER_INIT_DEFAULT, \
    +
    814  SL_IEC60730_IMC_DATA_READ_BIT_REVERSED, \
    +
    815  SL_IEC60730_IMC_CRC_BUFFER_XOR_OUTPUT }
    +
    816 #endif /* SL_IEC60730_USE_CRC_32_ENABLE */
    +
    817 #endif /* SL_IEC60730_CRC_USE_SW_ENABLE */
    +
    818 
    +
    819 #endif // DOXYGEN
    +
    820 
    +
    821 /**************************************************************************/
    +
    832 void sl_iec60730_imc_init(sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config);
    +
    833 
    +
    834 /**************************************************************************/
    +
    851 sl_iec60730_test_result_t
    +
    852 sl_iec60730_update_crc_with_data_buffer(sl_iec60730_update_crc_params_t *params,
    +
    853  sl_iec60730_crc_t *crc,
    +
    854  uint8_t *buffer,
    +
    855  uint32_t size);
    +
    856 
    +
    859 /**************************************************************************/
    +
    864 #define SL_IEC60730_VMC_POST_ENTER_CRITICAL() \
    +
    866  CORE_DECLARE_IRQ_STATE; \
    +
    867  CORE_ENTER_CRITICAL()
    +
    868 
    +
    870 #define SL_IEC60730_VMC_POST_EXIT_CRITICAL() CORE_EXIT_CRITICAL()
    +
    871 
    +
    873 #define SL_IEC60730_VMC_BIST_ENTER_CRITICAL() \
    +
    874  CORE_DECLARE_IRQ_STATE; \
    +
    875  CORE_ENTER_CRITICAL()
    +
    876 
    +
    878 #define SL_IEC60730_VMC_BIST_EXIT_CRITICAL() CORE_EXIT_CRITICAL()
    +
    879 
    +
    881 typedef struct {
    +
    882  uint32_t *start;
    +
    883  uint32_t *end;
    +
    884 } sl_iec60730_vmc_test_region_t;
    +
    885 
    +
    887 typedef struct {
    +
    888  const sl_iec60730_vmc_test_region_t *region;
    +
    889  uint8_t number_of_test_regions;
    +
    890 } sl_iec60730_vmc_test_multiple_regions_t;
    +
    891 
    +
    892 /**************************************************************************/
    +
    902 void sl_iec60730_vmc_init(sl_iec60730_vmc_test_multiple_regions_t *test_config);
    +
    903 
    +
    906 #if (_SILICON_LABS_32B_SERIES == 2)
    +
    907 // Write to backup ram module
    +
    908 // buram_inst: Pointer to BURAM instance
    +
    909 // idx: BURAM Reg index
    +
    910 // val: write value
    +
    911 #define SL_IEC60730_BURAM_WRITE(buram_inst, idx, val) \
    +
    912  do { \
    +
    913  buram_inst->RET[idx].REG = val; \
    +
    914  } while (0)
    +
    915 
    +
    916 // Read from backup ram module
    +
    917 // buram_inst: Pointer to BURAM instance
    +
    918 // idx: BURAM Reg index
    +
    919 #define SL_IEC60730_BURAM_READ(buram_inst, idx) (buram_inst->RET[idx].REG)
    +
    920 #endif
    +
    921 
    +
    924 #ifdef __cplusplus
    +
    925 }
    +
    926 #endif /* __cplusplus */
    +
    927 
    +
    928 #endif /* SL_IEC60730_H */
    +
    +
    SL_IEC60730_NO_FAILURE
    @ SL_IEC60730_NO_FAILURE
    No failure detected.
    Definition: sl_iec60730.h:80
    +
    SL_IEC60730_OEM_FAIL_2
    @ SL_IEC60730_OEM_FAIL_2
    OEM defined failure.
    Definition: sl_iec60730.h:104
    +
    sl_iec60730_imc_params_t::gpcrc
    sl_iec60730_crc_typedef * gpcrc
    GPCRC Register.
    Definition: sl_iec60730.h:684
    +
    SL_IEC60730_INTERRUPT_FAIL
    @ SL_IEC60730_INTERRUPT_FAIL
    Interrupt Plausibility Check detected a failure.
    Definition: sl_iec60730.h:87
    +
    sl_iec60730_test_failure_t
    sl_iec60730_test_failure_t
    Cause of failure passed to Safe State function.
    Definition: sl_iec60730.h:79
    +
    sl_iec60730_restart_watchdogs
    void sl_iec60730_restart_watchdogs(void)
    +
    sl_iec60730_update_crc_params_t::readType
    sl_iec60730_read_type_t readType
    The way to read calculated CRC value.
    Definition: sl_iec60730.h:694
    +
    check_sum
    sl_iec60730_crc_t check_sum
    +
    sl_iec60730_imc_test_multiple_regions_t
    Definition: sl_iec60730.h:708
    +
    sl_iec60730_imc_test_region_t
    This structure is used as configuration for IMC testing. The variable contains information about the ...
    Definition: sl_iec60730.h:700
    +
    SL_IEC60730_USART3_FAIL
    @ SL_IEC60730_USART3_FAIL
    USART3 comms channel detected a failure.
    Definition: sl_iec60730.h:99
    +
    sl_iec60730_program_counter_check
    uint16_t sl_iec60730_program_counter_check
    +
    SL_IEC60730_RADIO_FAIL
    @ SL_IEC60730_RADIO_FAIL
    Radio comms detected a failure.
    Definition: sl_iec60730.h:93
    +
    sl_iec60730_irq_execution_bounds_t::max
    SL_IEC60730_IRQ_TYPE_VARIABLE max
    Maximum executed executions of ISR. Can be 0-255, must be greater than or equal to min.
    Definition: sl_iec60730.h:584
    +
    SL_IEC60730_EUART0_FAIL
    @ SL_IEC60730_EUART0_FAIL
    EUART comms channel detected a failure.
    Definition: sl_iec60730.h:101
    +
    sl_iec60730_update_crc_params_t::init
    sl_iec60730_crc_init_typedef init
    CRC initialization structure.
    Definition: sl_iec60730.h:693
    +
    sl_iec60730_safety_check_t
    Definition: sl_iec60730.h:425
    +
    SL_IEC60730_LESENSE0_FAIL
    @ SL_IEC60730_LESENSE0_FAIL
    LESENSE0 detected a failure.
    Definition: sl_iec60730.h:92
    +
    sl_iec60730_timer_test_control_t
    sl_iec60730_timer_test_control_t
    Enable/disable switch for system timer test.
    Definition: sl_iec60730.h:502
    +
    sl_iec60730_library_version_t::minor
    uint8_t minor
    Minor version.
    Definition: sl_iec60730.h:64
    +
    SL_IEC60730_TIMER_TEST_ENABLE
    @ SL_IEC60730_TIMER_TEST_ENABLE
    timer tests will execute
    Definition: sl_iec60730.h:504
    +
    SL_IEC60730_OEM_FAIL_3
    @ SL_IEC60730_OEM_FAIL_3
    OEM defined failure.
    Definition: sl_iec60730.h:105
    +
    SL_IEC60730_CS0_FAIL
    @ SL_IEC60730_CS0_FAIL
    CSEN0 detected a failureLESENSE.
    Definition: sl_iec60730.h:91
    +
    SL_IEC60730_CLOCK_FAIL
    @ SL_IEC60730_CLOCK_FAIL
    System Clock Check detected a failure.
    Definition: sl_iec60730.h:86
    +
    SL_IEC60730_USART0_FAIL
    @ SL_IEC60730_USART0_FAIL
    USART0 comms channel detected a failure.
    Definition: sl_iec60730.h:96
    +
    sl_iec60730_crc_init_typedef
    GPCRC_Init_TypeDef sl_iec60730_crc_init_typedef
    CRC initialization structure.
    Definition: sl_iec60730.h:669
    +
    sl_iec60730_imc_test_multiple_regions_t::number_of_test_regions
    uint8_t number_of_test_regions
    Number of test regions.
    Definition: sl_iec60730.h:710
    +
    sl_iec60730_safety_check_get_error
    sl_iec60730_safety_check_t * sl_iec60730_safety_check_get_error(void)
    +
    sl_iec60730_vmc_test_multiple_regions_t
    This structure is used as multiple test regions for VMC testing.
    Definition: sl_iec60730.h:887
    +
    SL_IEC60730_TEST_IN_PROGRESS
    @ SL_IEC60730_TEST_IN_PROGRESS
    test is still in progress
    Definition: sl_iec60730.h:75
    +
    sl_iec60730_sys_clock_count_reset
    void sl_iec60730_sys_clock_count_reset(void)
    +
    sl_iec60730_update_crc_params_t
    Definition: sl_iec60730.h:690
    +
    sl_iec60730_crc_typedef
    GPCRC_TypeDef sl_iec60730_crc_typedef
    the General Purpose Cyclic Redundancy Check (GPCRC) module
    Definition: sl_iec60730.h:667
    +
    sl_iec60730_library_version_t
    Definition: sl_iec60730.h:62
    +
    sl_iec60730_vmc_init
    void sl_iec60730_vmc_init(sl_iec60730_vmc_test_multiple_regions_t *test_config)
    +
    sl_iec60730_read_type_t
    uint8_t sl_iec60730_read_type_t
    The way to read CRC value when using function sl_iec60730_update_crc_with_data_buffer.
    Definition: sl_iec60730.h:672
    +
    sl_iec60730_vmc_test_region_t::start
    uint32_t * start
    Start address of RAM to check.
    Definition: sl_iec60730.h:882
    +
    sl_iec60730_vmc_test_region_t::end
    uint32_t * end
    End address of RAM to check.
    Definition: sl_iec60730.h:883
    +
    SL_IEC60730_PDM0_FAIL
    @ SL_IEC60730_PDM0_FAIL
    PDM comms channel detected a failure.
    Definition: sl_iec60730.h:102
    +
    sl_iec60730_crc_t
    #define sl_iec60730_crc_t
    Definition: sl_iec60730.h:191
    +
    sl_iec60730_library_version_t::major
    uint8_t major
    Major version.
    Definition: sl_iec60730.h:63
    +
    SL_IEC60730_I2C1_FAIL
    @ SL_IEC60730_I2C1_FAIL
    I2C1 comms channel detected a failure.
    Definition: sl_iec60730.h:95
    +
    sl_iec60730_test_clock_tick
    void sl_iec60730_test_clock_tick(void)
    +
    SL_IEC60730_IMC_DATA_READ
    @ SL_IEC60730_IMC_DATA_READ
    use function GPCRC_DataRead to read CRC
    Definition: sl_iec60730.h:675
    +
    sl_iec60730_irq_execution_bounds_t
    Definition: sl_iec60730.h:580
    +
    sl_iec60730_sys_clock_count_tick
    void sl_iec60730_sys_clock_count_tick(void)
    +
    SL_IEC60730_WATCHDOG_POST_FAIL
    @ SL_IEC60730_WATCHDOG_POST_FAIL
    Watchdog POST test failed.
    Definition: sl_iec60730.h:82
    +
    sl_iec60730_library_version_t::revision
    uint8_t revision
    Revision.
    Definition: sl_iec60730.h:65
    +
    SL_IEC60730_USART1_FAIL
    @ SL_IEC60730_USART1_FAIL
    USART1 comms channel detected a failure.
    Definition: sl_iec60730.h:97
    +
    sl_iec60730_bist
    void sl_iec60730_bist(void)
    +
    SL_IEC60730_VMC_FAIL
    @ SL_IEC60730_VMC_FAIL
    Variable Memory Check detected a failure.
    Definition: sl_iec60730.h:83
    +
    SL_IEC60730_OEM_FAIL_1
    @ SL_IEC60730_OEM_FAIL_1
    OEM defined failure.
    Definition: sl_iec60730.h:103
    +
    SL_IEC60730_IMC_DATA_READ_BIT_REVERSED
    @ SL_IEC60730_IMC_DATA_READ_BIT_REVERSED
    use function GPCRC_DataReadBitReversed to read CRC
    Definition: sl_iec60730.h:676
    +
    SL_IEC60730_TEST_VERIFY
    @ SL_IEC60730_TEST_VERIFY
    Special case used for automated verification testing.
    Definition: sl_iec60730.h:81
    +
    sl_iec60730_irq_execution_bounds_t::min
    SL_IEC60730_IRQ_TYPE_VARIABLE min
    Minimum expected executions of ISR. Can be 0-255, must be less than or equal to max.
    Definition: sl_iec60730.h:582
    +
    SL_IEC60730_IRQ_TYPE_VARIABLE
    #define SL_IEC60730_IRQ_TYPE_VARIABLE
    Data type for iec60730_IRQExecCount variables.
    Definition: sl_iec60730_config.h:38
    +
    SL_IEC60730_TIMER_TEST_DISABLE
    @ SL_IEC60730_TIMER_TEST_DISABLE
    timer tests will not execute
    Definition: sl_iec60730.h:503
    +
    SL_IEC60730_TEST_FAILED
    @ SL_IEC60730_TEST_FAILED
    test result failed
    Definition: sl_iec60730.h:73
    +
    sl_iec60730_vmc_test_region_t
    This structure is used as configuration for VMC testing.
    Definition: sl_iec60730.h:881
    +
    sl_iec60730_irq_fail_t
    Definition: sl_iec60730.h:590
    +
    sl_iec60730_irq_cfg_t
    Definition: sl_iec60730.h:611
    +
    sl_iec60730_post
    void sl_iec60730_post(void)
    +
    sl_iec60730_vmc_test_multiple_regions_t::number_of_test_regions
    uint8_t number_of_test_regions
    Number of test regions.
    Definition: sl_iec60730.h:889
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    SL_IEC60730_OEM_FAIL_4
    @ SL_IEC60730_OEM_FAIL_4
    OEM defined failure.
    Definition: sl_iec60730.h:106
    +
    sl_iec60730_safety_check_error_occur
    void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure)
    +
    SL_IEC60730_IMC_FAIL
    @ SL_IEC60730_IMC_FAIL
    Invariable Memory Check detected a failure.
    Definition: sl_iec60730.h:84
    +
    SL_IEC60730_CPU_REGISTERS_FAIL
    @ SL_IEC60730_CPU_REGISTERS_FAIL
    CPU Registers Check detected a failure.
    Definition: sl_iec60730.h:85
    +
    sl_iec60730_update_crc_params_t::hal
    sl_iec60730_imc_params_t hal
    struct sl_iec60730_imc_params_t that contain GPCRC Register
    Definition: sl_iec60730.h:692
    +
    sl_iec60730_update_crc_params_t::xorOut
    sl_iec60730_crc_t xorOut
    XOR with calculated CRC value.
    Definition: sl_iec60730.h:696
    +
    SL_IEC60730_LIBRARY_VERSION
    const sl_iec60730_library_version_t SL_IEC60730_LIBRARY_VERSION
    Global variable which holds the IEC60370 library version.
    +
    SL_IEC60730_LEUART0_FAIL
    @ SL_IEC60730_LEUART0_FAIL
    LEUART comms channel detected a failure.
    Definition: sl_iec60730.h:100
    +
    sl_iec60730_safe_state
    void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure)
    +
    SL_IEC60730_TEST_PASSED
    @ SL_IEC60730_TEST_PASSED
    test result passed
    Definition: sl_iec60730.h:74
    +
    SL_IEC60730_GPIO_FAIL
    @ SL_IEC60730_GPIO_FAIL
    GPIO Plausibility Check detected a failure.
    Definition: sl_iec60730.h:89
    +
    sl_iec60730_imc_test_region_t::start
    uint32_t * start
    Start address of FLASH to check.
    Definition: sl_iec60730.h:701
    +
    SL_IEC60730_SAFETY_CHECK_FAIL
    @ SL_IEC60730_SAFETY_CHECK_FAIL
    iec60730_safety_check detected some failure
    Definition: sl_iec60730.h:107
    +
    SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED
    @ SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED
    use function GPCRC_DataReadByteReversed to read CRC
    Definition: sl_iec60730.h:678
    +
    sl_iec60730_imc_test_region_t::end
    uint32_t * end
    End address of FLASH to check.
    Definition: sl_iec60730.h:702
    +
    sl_iec60730_toolchain.h
    Compiler abstraction.
    +
    sl_iec60730_imc_params_t
    This structure is used as configuration for IMC testing, that holds GPCRC Register.
    Definition: sl_iec60730.h:683
    +
    sl_iec60730_imc_init
    void sl_iec60730_imc_init(sl_iec60730_imc_params_t *params, sl_iec60730_imc_test_multiple_regions_t *test_config)
    +
    sl_iec60730_update_crc_with_data_buffer
    sl_iec60730_test_result_t sl_iec60730_update_crc_with_data_buffer(sl_iec60730_update_crc_params_t *params, sl_iec60730_crc_t *crc, uint8_t *buffer, uint32_t size)
    +
    SL_IEC60730_ANALOG_FAIL
    @ SL_IEC60730_ANALOG_FAIL
    Analog Plausibility Check detected a failure.
    Definition: sl_iec60730.h:90
    +
    SL_IEC60730_USART2_FAIL
    @ SL_IEC60730_USART2_FAIL
    USART2 comms channel detected a failure.
    Definition: sl_iec60730.h:98
    +
    sl_iec60730_config.h
    Library configuration.
    +
    SL_IEC60730_PROGRAM_COUNTER_FAIL
    @ SL_IEC60730_PROGRAM_COUNTER_FAIL
    Program Counter Check detected a failure.
    Definition: sl_iec60730.h:88
    +
    sl_iec60730_safety_check_reset_error
    void sl_iec60730_safety_check_reset_error(void)
    +
    SL_IEC60730_I2C0_FAIL
    @ SL_IEC60730_I2C0_FAIL
    I2C0 comms channel detected a failure.
    Definition: sl_iec60730.h:94
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__board_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__board_8h_source.html new file mode 100644 index 00000000..25666203 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__board_8h_source.html @@ -0,0 +1,139 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_board.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730_board.h
    +
    +
    +
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_BOARD_H
    +
    19 #define SL_IEC60730_BOARD_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 // Standard libraries
    +
    26 #include <stdbool.h>
    +
    27 #include <stdint.h>
    +
    28 #include <stddef.h>
    +
    29 
    +
    30 /**************************************************************************/
    +
    37 /* Invariable Memory */
    +
    39 extern uint32_t flash_start;
    +
    40 
    +
    57 #ifndef SL_IEC60730_ROM_END
    +
    58 #define SL_IEC60730_ROM_START ((uint32_t *) (&flash_start))
    +
    59 #endif
    +
    60 
    +
    66 #ifndef SL_IEC60730_ROM_END
    +
    67 #define SL_IEC60730_ROM_END ((uint32_t *) (&check_sum))
    +
    68 #endif
    +
    69 
    +
    72 /**************************************************************************/
    +
    77 /* Variable Memory */
    +
    78 extern uint32_t classb_start;
    +
    79 extern uint32_t classb_end;
    +
    80 extern uint32_t __StackTop;
    +
    81 extern uint32_t ram_start;
    +
    82 extern uint32_t class_b_limit;
    +
    83 
    +
    84 #if defined(__GNUC__)
    +
    85 extern uint32_t stack_check;
    +
    86 #define STACK_CHECK ((uint32_t *) (&stack_check))
    +
    87 #elif defined(__ICCARM__)
    +
    88 #pragma section = ".stack_bottom"
    +
    89 #define STACK_CHECK __section_begin(".stack_bottom")
    +
    90 #else // unknown toolchain
    +
    91 #error Unrecognized toolchain in sl_iec60730_toolchain.h
    +
    92 #endif
    +
    93 
    +
    95 #define RAM_START ((uint32_t *) (&ram_start))
    +
    96 #define RAM_END ((uint32_t *) ((uint32_t) RAM_BACKUP - 1))
    +
    98 #define RAM_BACKUP ((uint32_t *) (&__StackTop))
    +
    100 
    +
    102 #define CLASSB_START ((uint32_t *) (&classb_start))
    +
    103 #define CLASSB_END ((uint32_t *) ((uint32_t) (&class_b_limit) - 1))
    +
    105 
    +
    107 #define RAMTEST_START CLASSB_START
    +
    108 #define RAMTEST_END CLASSB_END
    +
    110 
    +
    114 #ifdef __cplusplus
    +
    115 }
    +
    116 #endif /* __cplusplus */
    +
    117 
    +
    118 #endif /* SL_IEC60730_BOARD_H */
    +
    +
    flash_start
    uint32_t flash_start
    Flash start address.
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__comm_8h.html b/site/document_api_iec60730_library/sl__iec60730__comm_8h.html new file mode 100644 index 00000000..0f3a689f --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__comm_8h.html @@ -0,0 +1,91 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_comm.h File Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730_comm.h File Reference
    +
    +
    + +

    Comm check. +More...

    + +

    Go to the source code of this file.

    +

    Detailed Description

    +

    Comm check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__comm_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__comm_8h_source.html new file mode 100644 index 00000000..37009e69 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__comm_8h_source.html @@ -0,0 +1,94 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_comm.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730_comm.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_COMM_H
    +
    19 #define SL_IEC60730_COMM_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 /**************************************************************************/
    +
    104 #ifdef __cplusplus
    +
    105 }
    +
    106 #endif /* __cplusplus */
    +
    107 
    +
    108 #endif /* SL_IEC60730_COMM_H */
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__config_8h.html b/site/document_api_iec60730_library/sl__iec60730__config_8h.html new file mode 100644 index 00000000..0bc6b01f --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__config_8h.html @@ -0,0 +1,169 @@ + + + + + + + +Document API IEC60730 Library: lib/config/sl_iec60730_config.h File Reference + + + + + + + + + +
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    +Macros

    +#define SL_IEC60730_IRQ_TYPE_VARIABLE   uint8_t
     Data type for iec60730_IRQExecCount variables.
     
    +#define SL_IEC60730_IRQ_STATUS_ENABLE   0
     Enable using sl_iec60730_get_irq_index_failed() function to get the value of failed irqs.
     
    +#define SL_IEC60730_WDOG0_ENABLE   1
     Enable Watchdog 0.
     
    +#define SL_IEC60730_WDOG1_ENABLE   0
     Enable Watchdog 1.
     
    +#define SL_IEC60730_SAVE_STAGE_ENABLE   0
     Enable saving iec60730_watchdog_state to backup RAM on Series 2.
     
    +#define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE   1
     Reset cause flags in the RSTCASUES register.
     
    +#define SL_IEC60730_TEST_CLOCK_MULTIPLIER   10
     Determines how many entrances into sl_iec60730_test_clock_tick() occur before bist frequency test executes.
     
    #define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ   10
     
    #define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE   1
     
    +#define SL_IEC60730_USE_MARCHX_ENABLE   1
     Enable used the algorithm used in BIST is March-X.
     
    +#define SL_IEC60730_VAR_BLOCKS_PER_BIST   256
     Number of ram blocks tested per BIST.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0   (0xEEEEEEEEuL)
     Pattern 0 is used for stack overflow.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1   (0xCCCCCCCCuL)
     Pattern 1 is used for stack overflow.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2   (0xBBBBBBBBuL)
     Pattern 2 is used for stack overflow.
     
    +#define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3   (0xDDDDDDDDuL)
     Pattern 3 is used for stack overflow.
     
    +#define SL_IEC60730_CRC_DEBUG_ENABLE   1
     Use this definition for debugging purposes.
     
    +#define SL_IEC60730_INVAR_BLOCKS_PER_BIST   512
     Number of blocks per test bist.
     
    #define SL_IEC60730_FLASH_BLOCK   64
     
    #define SL_IEC60730_CRC_USE_SW_ENABLE   0
     
    #define SL_IEC60730_SW_CRC_TABLE_ENABLE   0
     
    #define SL_IEC60730_USE_CRC_32_ENABLE   0
     
    +

    Detailed Description

    +

    Library configuration.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__config_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__config_8h_source.html new file mode 100644 index 00000000..c9626ede --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__config_8h_source.html @@ -0,0 +1,213 @@ + + + + + + + +Document API IEC60730 Library: lib/config/sl_iec60730_config.h Source File + + + + + + + + + +
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    sl_iec60730_config.h
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    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_CONFIG_H
    +
    19 #define SL_IEC60730_CONFIG_H
    +
    20 
    +
    21 // <<< Use Configuration Wizard in Context Menu >>>
    +
    22 
    +
    23 /**************************************************************************/
    +
    30 // <h> IEC60730_IRQ
    +
    31 
    +
    32 // <o SL_IEC60730_IRQ_TYPE_VARIABLE> Data type for iec60730_IRQExecCount variables
    +
    34 // <uint8_t=> uint8_t
    +
    35 // <uint16_t=> uint16_t
    +
    36 // <uint32_t=> uint32_t
    +
    37 // <i> Default: uint8_t
    +
    38 #define SL_IEC60730_IRQ_TYPE_VARIABLE uint8_t
    +
    39 // <q SL_IEC60730_IRQ_STATUS_ENABLE> Enable function to get the value of failed irqs
    +
    41 // <i> Default: 0
    +
    42 #define SL_IEC60730_IRQ_STATUS_ENABLE 0
    +
    43 
    +
    44 // </h>
    +
    45 
    +
    48 /**************************************************************************/
    +
    53 // <h> IEC60730_WATCHDOG
    +
    54 
    +
    55 // <q SL_IEC60730_WDOG0_ENABLE> Enable Watchdog 0
    +
    57 // <i> Default: 1
    +
    58 #ifndef SL_IEC60730_WDOG0_ENABLE
    +
    59 #define SL_IEC60730_WDOG0_ENABLE 1
    +
    60 #endif //SL_IEC60730_WDOG0_ENABLE
    +
    61 
    +
    62 // <q SL_IEC60730_WDOG1_ENABLE> Enable Watchdog 1
    +
    64 // <i> Default: 0
    +
    65 #ifndef SL_IEC60730_WDOG1_ENABLE
    +
    66 #define SL_IEC60730_WDOG1_ENABLE 0
    +
    67 #endif //SL_IEC60730_WDOG1_ENABLE
    +
    68 
    +
    69 // <q SL_IEC60730_SAVE_STAGE_ENABLE> Enable saving iec60730_watchdog_state to backup RAM on Series 2.
    +
    71 // <i> Default: 0
    +
    72 #define SL_IEC60730_SAVE_STAGE_ENABLE 0
    +
    73 
    +
    74 // <q SL_IEC60730_RSTCAUSES_CLEAR_ENABLE> Reset cause flags in the RSTCASUES register.
    +
    76 // <i> Default: 1
    +
    77 #define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE 1
    +
    78 
    +
    79 // </h>
    +
    80 
    +
    83 /**************************************************************************/
    +
    88 // <h> IEC60730_SYS_CLOCK
    +
    89 
    +
    90 // <o SL_IEC60730_TEST_CLOCK_MULTIPLIER> Determines how many entrances into sl_iec60730_test_clock_tick() occur before bist frequency test executes
    +
    92 // <i> Default: 10
    +
    93 #define SL_IEC60730_TEST_CLOCK_MULTIPLIER 10
    +
    94 
    +
    95 // <o SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ> This value is used to compare with the system clock counter
    +
    98 // <i> Default: 10
    +
    99 #define SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ 10
    +
    100 
    +
    101 // <o SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE> The tolerance of test
    +
    104 // <i> Default: 1
    +
    105 #define SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE 1
    +
    106 
    +
    107 // </h>
    +
    108 
    +
    111 /**************************************************************************/
    +
    116 // <h> IEC60730_VMC
    +
    117 
    +
    118 // <q SL_IEC60730_USE_MARCHX_ENABLE> Enable used the algorithm used in BIST is March-X.
    +
    120 // <i> Default: 1
    +
    121 #ifndef SL_IEC60730_USE_MARCHX_ENABLE
    +
    122 #define SL_IEC60730_USE_MARCHX_ENABLE 1
    +
    123 #endif // SL_IEC60730_USE_MARCHX_ENABLE
    +
    124 
    +
    125 // <o SL_IEC60730_VAR_BLOCKS_PER_BIST> SL_IEC60730_VAR_BLOCKS_PER_BIST
    +
    127 // <i> Default: 256
    +
    128 #define SL_IEC60730_VAR_BLOCKS_PER_BIST 256
    +
    129 
    +
    130 // <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0> Pattern 0 is used for stack overflow
    +
    132 // <i> Default: (0xEEEEEEEEuL)
    +
    133 #define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_0 (0xEEEEEEEEuL)
    +
    134 
    +
    135 // <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1> Pattern 1 is used for stack overflow
    +
    137 // <i> Default: (0xCCCCCCCCuL)
    +
    138 #define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_1 (0xCCCCCCCCuL)
    +
    139 
    +
    140 // <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2> Pattern 2 is used for stack overflow
    +
    142 // <i> Default: (0xBBBBBBBBuL)
    +
    143 #define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_2 (0xBBBBBBBBuL)
    +
    144 
    +
    145 // <s.14 SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3> Pattern 3 is used for stack overflow
    +
    147 // <i> Default: (0xDDDDDDDDuL)
    +
    148 #define SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3 (0xDDDDDDDDuL)
    +
    149 
    +
    150 // </h>
    +
    151 
    +
    154 /**************************************************************************/
    +
    159 // <h> IEC60730_IMC
    +
    160 
    +
    161 // <q SL_IEC60730_CRC_DEBUG_ENABLE> Enable debug IMC module
    +
    163 // <i> Default: 1
    +
    164 #define SL_IEC60730_CRC_DEBUG_ENABLE 1
    +
    165 
    +
    166 // <o SL_IEC60730_INVAR_BLOCKS_PER_BIST> SL_IEC60730_INVAR_BLOCKS_PER_BIST
    +
    168 // <i> Default: 512
    +
    169 #define SL_IEC60730_INVAR_BLOCKS_PER_BIST 512
    +
    170 
    +
    171 // <o SL_IEC60730_FLASH_BLOCK> Definition is size of block of Flash
    +
    179 // <i> Default: 64
    +
    180 #define SL_IEC60730_FLASH_BLOCK 64
    +
    181 
    +
    182 // <e SL_IEC60730_CRC_USE_SW_ENABLE> Enable CRC calculation using software instead of hardware
    +
    185 // <i> Default: 0
    +
    186 #ifndef SL_IEC60730_CRC_USE_SW_ENABLE
    +
    187 #define SL_IEC60730_CRC_USE_SW_ENABLE 0
    +
    188 #endif // SL_IEC60730_CRC_USE_SW_ENABLE
    +
    189 
    +
    190 // <q SL_IEC60730_SW_CRC_TABLE_ENABLE> Enable pre-defined table for calculating CRC
    +
    193 // <i> Default: 0
    +
    194 #ifndef SL_IEC60730_SW_CRC_TABLE_ENABLE
    +
    195 #define SL_IEC60730_SW_CRC_TABLE_ENABLE 0
    +
    196 #endif // SL_IEC60730_SW_CRC_TABLE_ENABLE
    +
    197 // </e>
    +
    198 
    +
    199 // <q SL_IEC60730_USE_CRC_32_ENABLE> Enable CRC-32 for calculating the CRC value
    +
    202 // <i> Default: 0
    +
    203 #ifndef SL_IEC60730_USE_CRC_32_ENABLE
    +
    204 #define SL_IEC60730_USE_CRC_32_ENABLE 0
    +
    205 #endif // SL_IEC60730_USE_CRC_32_ENABLE
    +
    206 
    +
    207 // </h>
    +
    208 
    +
    212 // <<< end of configuration section >>>
    +
    213 
    +
    214 #endif /* SL_IEC60730_CONFIG_H */
    +
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    #include "sl_iec60730_internal.h"
    +
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    Go to the source code of this file.

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    +Functions

    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns (void)
     
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s (void)
     
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist (void)
     
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_post (void)
     
    +

    Detailed Description

    +

    CPU Registers check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_CPU_REGISTERS_H
    +
    19 #define SL_IEC60730_CPU_REGISTERS_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730_internal.h"
    +
    26 
    +
    27 /**************************************************************************/
    +
    97 /**************************************************************************/
    +
    106 sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns(void);
    +
    107 
    +
    108 /**************************************************************************/
    +
    117 sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s(void);
    +
    118 
    +
    119 /**************************************************************************/
    +
    128 sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist(void);
    +
    129 
    +
    130 /**************************************************************************/
    +
    137 sl_iec60730_test_result_t sl_iec60730_cpu_registers_post(void);
    +
    138 
    +
    142 #ifdef __cplusplus
    +
    143 }
    +
    144 #endif /* __cplusplus */
    +
    145 
    +
    146 #endif /* SL_IEC60730_CPU_REGISTERS_H */
    +
    +
    sl_iec60730_cpu_registers_post
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_post(void)
    +
    sl_iec60730_internal.h
    Internal definitions.
    +
    sl_iec60730_cpu_registers_bist_s
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_s(void)
    +
    sl_iec60730_cpu_registers_bist_ns
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist_ns(void)
    +
    sl_iec60730_cpu_registers_bist
    sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist(void)
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
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    +
    #include <stdbool.h>
    +#include <stdint.h>
    +#include "sl_iec60730.h"
    +#include "sl_iec60730_watchdog.h"
    +#include "sl_iec60730_invariable_memory.h"
    +#include "sl_iec60730_variable_memory.h"
    +#include "sl_iec60730_cpu_registers.h"
    +#include "sl_iec60730_system_clock.h"
    +#include "sl_iec60730_program_counter.h"
    +#include "sl_iec60730_irq.h"
    +
    +

    Go to the source code of this file.

    +

    Detailed Description

    +

    Internal definitions.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_INTERNAL_H
    +
    19 #define SL_IEC60730_INTERNAL_H
    +
    20 
    +
    21 // Standard libraries
    +
    22 #include <stdbool.h>
    +
    23 #include <stdint.h>
    +
    24 
    +
    25 // Header files needed for publics
    +
    26 #include "sl_iec60730.h"
    +
    27 
    +
    28 // Header files needed for privates
    +
    29 #include "sl_iec60730_watchdog.h"
    +
    30 #include "sl_iec60730_invariable_memory.h"
    +
    31 #include "sl_iec60730_variable_memory.h"
    +
    32 #include "sl_iec60730_cpu_registers.h"
    +
    33 #include "sl_iec60730_system_clock.h"
    +
    34 #include "sl_iec60730_program_counter.h"
    +
    35 #include "sl_iec60730_irq.h"
    +
    36 
    +
    37 // Disable warnings on unused labels. Labels are used to set breakpoints for
    +
    38 // automated testing.
    +
    39 #if defined(__GNUC__)
    +
    40 #pragma GCC diagnostic ignored "-Wunused-label"
    +
    41 #endif
    +
    42 
    +
    43 #endif /* SL_IEC60730_INTERNAL_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    sl_iec60730_system_clock.h
    Clock check.
    +
    sl_iec60730_watchdog.h
    Watchdog check.
    +
    sl_iec60730_invariable_memory.h
    Invariable memory check.
    +
    sl_iec60730_irq.h
    Interrupt check.
    +
    sl_iec60730_program_counter.h
    Program Counter check.
    +
    sl_iec60730_variable_memory.h
    Variable memory check.
    +
    sl_iec60730_cpu_registers.h
    CPU Registers check.
    + +
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    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__invariable__memory_8h.html b/site/document_api_iec60730_library/sl__iec60730__invariable__memory_8h.html new file mode 100644 index 00000000..2c2c612d --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__invariable__memory_8h.html @@ -0,0 +1,112 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_invariable_memory.h File Reference + + + + + + + + + +
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    #include "sl_iec60730.h"
    +
    +

    Go to the source code of this file.

    + + + + + + + + +

    +Macros

    #define SL_IEC60730_IMC_INIT_VALUE
     
    #define SL_IEC60730_IMC_XOROUTPUT
     
    #define SL_IEC60730_IMC_INIT_DEFAULT
     
    + + + + + +

    +Functions

    sl_iec60730_test_result_t sl_iec60730_imc_post (void)
     
    sl_iec60730_test_result_t sl_iec60730_imc_bist (void)
     
    +

    Detailed Description

    +

    Invariable memory check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__invariable__memory_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__invariable__memory_8h_source.html new file mode 100644 index 00000000..a8686484 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__invariable__memory_8h_source.html @@ -0,0 +1,146 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_invariable_memory.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730_invariable_memory.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_INVARIABLE_MEMORY_H
    +
    19 #define SL_IEC60730_INVARIABLE_MEMORY_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730.h"
    +
    26 #include SL_IEC60730_BOARD_HEADER
    +
    27 
    +
    28 /**************************************************************************/
    +
    201 #ifdef DOXYGEN
    +
    202 
    +
    207 #define SL_IEC60730_IMC_INIT_VALUE
    +
    208 
    +
    214 #define SL_IEC60730_IMC_XOROUTPUT
    +
    215 
    +
    219 #define SL_IEC60730_IMC_INIT_DEFAULT
    +
    220 
    +
    221 #else
    +
    222 
    +
    223 #if (SL_IEC60730_USE_CRC_32_ENABLE == 1)
    +
    224 #define SL_IEC60730_IMC_INIT_VALUE (0xFFFFFFFFuL)
    +
    225 #define SL_IEC60730_IMC_XOROUTPUT (0xFFFFFFFFuL)
    +
    226 #define SL_IEC60730_IMC_INIT_DEFAULT \
    +
    227  { \
    +
    228  0x04C11DB7UL, /* CRC32 Polynomial value. */ \
    +
    229  SL_IEC60730_IMC_INIT_VALUE, /* Initialization value. */ \
    +
    230  false, /* Byte order is normal. */ \
    +
    231  false, /* Bit order is not reversed on output. */ \
    +
    232  false, /* Disable byte mode. */ \
    +
    233  false, /* Disable automatic initialization on data read. */ \
    +
    234  true, /* Enable GPCRC. */ \
    +
    235  }
    +
    236 #else /* !SL_IEC60730_USE_CRC_32_ENABLE */
    +
    237 #define SL_IEC60730_IMC_INIT_VALUE (0x0000)
    +
    238 #define SL_IEC60730_IMC_XOROUTPUT (0x0000)
    +
    239 #define SL_IEC60730_IMC_INIT_DEFAULT \
    +
    240  { \
    +
    241  0x1021UL, \
    +
    242  SL_IEC60730_IMC_INIT_VALUE, \
    +
    243  false, \
    +
    244  true, \
    +
    245  false, \
    +
    246  false, \
    +
    247  true, \
    +
    248  }
    +
    249 #endif /* SL_IEC60730_USE_CRC_32_ENABLE */
    +
    250 #endif // DOXYGEN
    +
    251 
    +
    252 /**************************************************************************/
    +
    261 sl_iec60730_test_result_t sl_iec60730_imc_post(void);
    +
    262 
    +
    263 /**************************************************************************/
    +
    276 sl_iec60730_test_result_t sl_iec60730_imc_bist(void);
    +
    277 
    +
    280 #ifdef __cplusplus
    +
    281 }
    +
    282 #endif /* __cplusplus */
    +
    283 
    +
    284 #endif /* SL_IEC60730_INVARIABLE_MEMORY_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    sl_iec60730_imc_post
    sl_iec60730_test_result_t sl_iec60730_imc_post(void)
    +
    sl_iec60730_imc_bist
    sl_iec60730_test_result_t sl_iec60730_imc_bist(void)
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__irq_8h.html b/site/document_api_iec60730_library/sl__iec60730__irq_8h.html new file mode 100644 index 00000000..b7e8a029 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__irq_8h.html @@ -0,0 +1,110 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_irq.h File Reference + + + + + + + + + +
    +
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    +
    Document API IEC60730 Library +
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    +
    + + +
    + +
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    +
    +
    +Functions
    +
    +
    sl_iec60730_irq.h File Reference
    +
    +
    + +

    Interrupt check. +More...

    +
    #include "sl_iec60730_toolchain.h"
    +#include <stdint.h>
    +#include "sl_iec60730.h"
    +
    +

    Go to the source code of this file.

    + + + + + + + + + + + + +

    +Functions

    void sl_iec60730_irq_reset_fail_result (void)
     
    sl_iec60730_irq_fail_t * sl_iec60730_get_irq_index_failed (void)
     
    void sl_iec60730_irq_init (sl_iec60730_irq_cfg_t *irq_cfg_ptr)
     
    void sl_iec60730_irq_reset_counter (void)
     
    void sl_iec60730_irq_check (void)
     
    +

    Detailed Description

    +

    Interrupt check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__irq_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__irq_8h_source.html new file mode 100644 index 00000000..6106f2c5 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__irq_8h_source.html @@ -0,0 +1,122 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_irq.h Source File + + + + + + + + + +
    +
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    +
    Document API IEC60730 Library +
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    + +
    + + +
    +
    +
    +
    sl_iec60730_irq.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_IRQ_H
    +
    19 #define SL_IEC60730_IRQ_H
    +
    20 
    +
    21 #include "sl_iec60730_toolchain.h"
    +
    22 #include <stdint.h>
    +
    23 #include "sl_iec60730.h"
    +
    24 
    +
    25 #ifdef __cplusplus
    +
    26 extern "C" {
    +
    27 #endif /* __cplusplus */
    +
    28 
    +
    29 /**************************************************************************/
    +
    112 /**************************************************************************/
    +
    119 void sl_iec60730_irq_reset_fail_result(void);
    +
    120 
    +
    121 /**************************************************************************/
    +
    130 sl_iec60730_irq_fail_t* sl_iec60730_get_irq_index_failed(void);
    +
    131 
    +
    132 /**************************************************************************/
    +
    142 void sl_iec60730_irq_init(sl_iec60730_irq_cfg_t* irq_cfg_ptr);
    +
    143 
    +
    144 /**************************************************************************/
    +
    151 void sl_iec60730_irq_reset_counter(void);
    +
    152 
    +
    153 /**************************************************************************/
    +
    165 void sl_iec60730_irq_check(void);
    +
    166 
    +
    170 #ifdef __cplusplus
    +
    171 }
    +
    172 #endif /* __cplusplus */
    +
    173 
    +
    174 #endif /* SL_IEC60730_IRQ_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    sl_iec60730_irq_init
    void sl_iec60730_irq_init(sl_iec60730_irq_cfg_t *irq_cfg_ptr)
    +
    sl_iec60730_get_irq_index_failed
    sl_iec60730_irq_fail_t * sl_iec60730_get_irq_index_failed(void)
    +
    sl_iec60730_irq_reset_counter
    void sl_iec60730_irq_reset_counter(void)
    +
    sl_iec60730_irq_reset_fail_result
    void sl_iec60730_irq_reset_fail_result(void)
    +
    sl_iec60730_irq_fail_t
    Definition: sl_iec60730.h:590
    +
    sl_iec60730_irq_cfg_t
    Definition: sl_iec60730.h:611
    +
    sl_iec60730_irq_check
    void sl_iec60730_irq_check(void)
    +
    sl_iec60730_toolchain.h
    Compiler abstraction.
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__library__documentation_8h.html b/site/document_api_iec60730_library/sl__iec60730__library__documentation_8h.html new file mode 100644 index 00000000..3530c170 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__library__documentation_8h.html @@ -0,0 +1,91 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_library_documentation.h File Reference + + + + + + + + + +
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    + + + + + + +
    +
    Document API IEC60730 Library +
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    sl_iec60730_library_documentation.h File Reference
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    + +

    Library Documentation. +More...

    + +

    Go to the source code of this file.

    +

    Detailed Description

    +

    Library Documentation.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__library__documentation_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__library__documentation_8h_source.html new file mode 100644 index 00000000..c412ef83 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__library__documentation_8h_source.html @@ -0,0 +1,100 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_library_documentation.h Source File + + + + + + + + + +
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    Document API IEC60730 Library +
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    +
    sl_iec60730_library_documentation.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 // This file is a centralized location for documentation on OEM functions.
    +
    19 // It contains no source.
    +
    20 
    +
    21 /**************************************************************************/
    +
    545 /**************************************************************************/
    +
    550 /**************************************************************************/
    +
    557 /**************************************************************************/
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    564 /**************************************************************************/
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    571 /**************************************************************************/
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    578 /**************************************************************************/
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    585 /**************************************************************************/
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    592 /**************************************************************************/
    +
    599 /**************************************************************************/
    +
    606 /**************************************************************************/
    +
    613 /**************************************************************************/
    +
    620 /**************************************************************************/
    +
    629 /**************************************************************************/
    +
    636 /**************************************************************************/
    +
    646 /**************************************************************************/
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    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__program__counter_8h.html b/site/document_api_iec60730_library/sl__iec60730__program__counter_8h.html new file mode 100644 index 00000000..f5b4fc8e --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__program__counter_8h.html @@ -0,0 +1,100 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_program_counter.h File Reference + + + + + + + + + +
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    +
    sl_iec60730_program_counter.h File Reference
    +
    +
    + +

    Program Counter check. +More...

    +
    #include "sl_iec60730_internal.h"
    +
    +

    Go to the source code of this file.

    + + + + +

    +Functions

    void sl_iec60730_program_counter_test (void)
     
    +

    Detailed Description

    +

    Program Counter check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__program__counter_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__program__counter_8h_source.html new file mode 100644 index 00000000..6665d7c1 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__program__counter_8h_source.html @@ -0,0 +1,100 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_program_counter.h Source File + + + + + + + + + +
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    +
    +
    sl_iec60730_program_counter.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_PROGRAM_COUNTER_H
    +
    19 #define SL_IEC60730_PROGRAM_COUNTER_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730_internal.h"
    +
    26 
    +
    27 /**************************************************************************/
    +
    74 void sl_iec60730_program_counter_test(void);
    +
    81 
    +
    85 #ifdef __cplusplus
    +
    86 }
    +
    87 #endif /* __cplusplus */
    +
    88 
    +
    89 #endif /* SL_IEC60730_PROGRAM_COUNTER_H */
    +
    +
    sl_iec60730_internal.h
    Internal definitions.
    +
    sl_iec60730_program_counter_test
    void sl_iec60730_program_counter_test(void)
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__system__clock_8h.html b/site/document_api_iec60730_library/sl__iec60730__system__clock_8h.html new file mode 100644 index 00000000..edcddcb7 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__system__clock_8h.html @@ -0,0 +1,105 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_system_clock.h File Reference + + + + + + + + + +
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    +
    Document API IEC60730 Library +
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    +Functions
    +
    +
    sl_iec60730_system_clock.h File Reference
    +
    +
    + +

    Clock check. +More...

    +
    #include <stdint.h>
    +#include "sl_iec60730_toolchain.h"
    +
    +

    Go to the source code of this file.

    + + + + + + + + +

    +Functions

    uint16_t sl_iec60730_get_number_test_timer_tick (void)
     
    void sl_iec60730_sys_clock_test_enable (void)
     
    void sl_iec60730_sys_clock_test_disable (void)
     
    +

    Detailed Description

    +

    Clock check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__system__clock_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__system__clock_8h_source.html new file mode 100644 index 00000000..a04851e7 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__system__clock_8h_source.html @@ -0,0 +1,110 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_system_clock.h Source File + + + + + + + + + +
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    Document API IEC60730 Library +
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    sl_iec60730_system_clock.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_SYSTEM_CLOCK_H
    +
    19 #define SL_IEC60730_SYSTEM_CLOCK_H
    +
    20 
    +
    21 #include <stdint.h>
    +
    22 #include "sl_iec60730_toolchain.h"
    +
    23 
    +
    24 #ifdef __cplusplus
    +
    25 extern "C" {
    +
    26 #endif /* __cplusplus */
    +
    27 
    +
    28 /**************************************************************************/
    +
    120 /**************************************************************************/
    +
    127 uint16_t sl_iec60730_get_number_test_timer_tick(void);
    +
    128 
    +
    129 /**************************************************************************/
    +
    136 void sl_iec60730_sys_clock_test_enable(void);
    +
    137 
    +
    138 /**************************************************************************/
    +
    145 void sl_iec60730_sys_clock_test_disable(void);
    +
    146 
    +
    150 #ifdef __cplusplus
    +
    151 }
    +
    152 #endif /* __cplusplus */
    +
    153 
    +
    154 #endif /* SL_IEC60730_SYSTEM_CLOCK_H */
    +
    +
    sl_iec60730_get_number_test_timer_tick
    uint16_t sl_iec60730_get_number_test_timer_tick(void)
    +
    sl_iec60730_toolchain.h
    Compiler abstraction.
    +
    sl_iec60730_sys_clock_test_disable
    void sl_iec60730_sys_clock_test_disable(void)
    +
    sl_iec60730_sys_clock_test_enable
    void sl_iec60730_sys_clock_test_enable(void)
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__toolchain_8h.html b/site/document_api_iec60730_library/sl__iec60730__toolchain_8h.html new file mode 100644 index 00000000..bdc28543 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__toolchain_8h.html @@ -0,0 +1,127 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_toolchain.h File Reference + + + + + + + + + +
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    +
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    Compiler abstraction. +More...

    + +

    Go to the source code of this file.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    +#define NULL   ((void *) 0)
     Make sure there is a NULL defined if the toolchain does not provide it.
     
    #define NOP()   __NOP()
     
    +#define IEC60730_VAR_NO_INIT   __attribute__((section(".noinit")))
     No init at startup.
     
    +#define IEC60730_DATA_NO_CLEAR   __attribute__((section(".ram_no_clear")))
     No clear at startup.
     
    #define __STACK_BOTTOM   __attribute__((section(".stack_bottom")))
     
    #define __CLASSB_RAM   __attribute__((section(".classb_ram")))
     
    #define __RT_BUF   __attribute__((section(".rt_buf")))
     
    #define __OVERLAP   __attribute__((section(".overlap")))
     
    +#define LB_ASM   __asm__
     Add assembly code.
     
    +#define LB_XSTR(x)   XSTR(x:)
     Add label.
     
    +

    Detailed Description

    +

    Compiler abstraction.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__toolchain_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__toolchain_8h_source.html new file mode 100644 index 00000000..62dccc86 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__toolchain_8h_source.html @@ -0,0 +1,155 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_toolchain.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730_toolchain.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_TOOLCHAIN_H
    +
    19 #define SL_IEC60730_TOOLCHAIN_H
    +
    20 
    +
    21 /**************************************************************************/
    +
    49 #ifndef NULL
    +
    51 #define NULL ((void *) 0)
    +
    52 #endif
    +
    53 
    +
    54 // -------------------------------
    +
    55 // GCC for ARM Cortex-M
    +
    56 //
    +
    57 #if defined(__GNUC__)
    +
    58 
    +
    62 #define NOP() __NOP()
    +
    63 
    +
    65 #define IEC60730_VAR_NO_INIT __attribute__((section(".noinit")))
    +
    66 #define IEC60730_DATA_NO_CLEAR __attribute__((section(".ram_no_clear")))
    +
    68 
    +
    71 #ifndef __STACK_BOTTOM
    +
    72 #define __STACK_BOTTOM __attribute__((section(".stack_bottom")))
    +
    73 #endif /* __STACK_BOTTOM */
    +
    74 
    +
    77 #ifndef __CLASSB_RAM
    +
    78 #define __CLASSB_RAM __attribute__((section(".classb_ram")))
    +
    79 #endif /* __CLASSB_RAM */
    +
    80 
    +
    83 #ifndef __RT_BUF
    +
    84 #define __RT_BUF __attribute__((section(".rt_buf")))
    +
    85 #endif /* __RT_BUF */
    +
    86 
    +
    89 #ifndef __OVERLAP
    +
    90 #define __OVERLAP __attribute__((section(".overlap")))
    +
    91 #endif /* __OVERLAP */
    +
    92 
    +
    94 #define LB_ASM __asm__
    +
    95 #define LB_XSTR(x) XSTR(x:)
    +
    97 
    +
    98 // -------------------------------
    +
    99 // IAR for ARM Cortex-M
    +
    100 //
    +
    101 #elif defined(__ICCARM__)
    +
    102 
    +
    103 // __NOP should be declared in cmsis header core_cmInstr.h
    +
    104 // extern void __NOP(void);
    +
    106 #define NOP() __NOP()
    +
    107 
    +
    108 // No init at startup
    +
    109 #define IEC60730_VAR_NO_INIT __attribute__((section(".noinit")))
    +
    110 #define IEC60730_DATA_NO_CLEAR __attribute__((section(".ram_no_clear")))
    +
    112 
    +
    115 #ifndef __STACK_BOTTOM
    +
    116 #define __STACK_BOTTOM __attribute__((section(".stack_bottom")))
    +
    117 #endif /* __STACK_BOTTOM */
    +
    118 
    +
    121 #ifndef __CLASSB_RAM
    +
    122 #define __CLASSB_RAM __attribute__((section(".classb_ram")))
    +
    123 #endif /* __CLASSB_RAM */
    +
    124 
    +
    127 #ifndef __RT_BUF
    +
    128 #define __RT_BUF __attribute__((section(".rt_buf")))
    +
    129 #endif /* __RT_BUF */
    +
    130 
    +
    133 #ifndef __OVERLAP
    +
    134 #define __OVERLAP __attribute__((section(".overlap")))
    +
    135 #endif /* __OVERLAP */
    +
    136 
    +
    137 #define LB_ASM __asm
    +
    138 #define LB_XSTR(x) XSTR(x::)
    +
    139 
    +
    140 #else // unknown toolchain
    +
    141 #error Unrecognized toolchain in sl_iec60730_toolchain.h
    +
    142 #endif
    +
    143 
    +
    146 #endif /* SL_IEC60730_TOOLCHAIN_H */
    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__variable__memory_8h.html b/site/document_api_iec60730_library/sl__iec60730__variable__memory_8h.html new file mode 100644 index 00000000..fd36dda3 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__variable__memory_8h.html @@ -0,0 +1,108 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_variable_memory.h File Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +Functions
    +
    +
    sl_iec60730_variable_memory.h File Reference
    +
    +
    + +

    Variable memory check. +More...

    +
    #include "sl_iec60730.h"
    +
    +

    Go to the source code of this file.

    + + + + + + + + + + + + +

    +Functions

    sl_iec60730_test_result_t sl_iec60730_vmc_post (void)
     
    sl_iec60730_test_result_t sl_iec60730_vmc_bist (void)
     
    bool sl_iec60730_vmc_pre_run_marchxc_step (uint32_t *addr, uint32_t size)
     This function is called before performing the RAM check. Depending on the RAM region will be checked to give reasonable actions. More...
     
    void sl_iec60730_vmc_post_run_marchxc_step (uint32_t *addr, uint32_t size)
     After testing the RAM, you can restore the previous work. More...
     
    +

    Detailed Description

    +

    Variable memory check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__variable__memory_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__variable__memory_8h_source.html new file mode 100644 index 00000000..81a99932 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__variable__memory_8h_source.html @@ -0,0 +1,115 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_variable_memory.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730_variable_memory.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_VARIABLE_MEMORY_H
    +
    19 #define SL_IEC60730_VARIABLE_MEMORY_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include "sl_iec60730.h"
    +
    26 #include SL_IEC60730_BOARD_HEADER
    +
    27 
    +
    28 /**************************************************************************/
    +
    184 /**************************************************************************/
    +
    197 sl_iec60730_test_result_t sl_iec60730_vmc_post(void);
    +
    198 
    +
    199 /**************************************************************************/
    +
    216 sl_iec60730_test_result_t sl_iec60730_vmc_bist(void);
    +
    217 
    +
    218 /**************************************************************************/
    +
    231 bool sl_iec60730_vmc_pre_run_marchxc_step(uint32_t *addr, uint32_t size);
    +
    232 
    +
    233 /**************************************************************************/
    +
    242 void sl_iec60730_vmc_post_run_marchxc_step(uint32_t *addr, uint32_t size);
    +
    243 
    +
    247 #ifdef __cplusplus
    +
    248 }
    +
    249 #endif /* __cplusplus */
    +
    250 
    +
    251 #endif /* SL_IEC60730_VARIABLE_MEMORY_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    sl_iec60730_vmc_post
    sl_iec60730_test_result_t sl_iec60730_vmc_post(void)
    +
    sl_iec60730_vmc_bist
    sl_iec60730_test_result_t sl_iec60730_vmc_bist(void)
    +
    sl_iec60730_vmc_pre_run_marchxc_step
    bool sl_iec60730_vmc_pre_run_marchxc_step(uint32_t *addr, uint32_t size)
    This function is called before performing the RAM check. Depending on the RAM region will be checked ...
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    sl_iec60730_vmc_post_run_marchxc_step
    void sl_iec60730_vmc_post_run_marchxc_step(uint32_t *addr, uint32_t size)
    After testing the RAM, you can restore the previous work.
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__watchdog_8h.html b/site/document_api_iec60730_library/sl__iec60730__watchdog_8h.html new file mode 100644 index 00000000..a3923a7f --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__watchdog_8h.html @@ -0,0 +1,192 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_watchdog.h File Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +Classes | +Macros | +Enumerations | +Functions | +Variables
    +
    +
    sl_iec60730_watchdog.h File Reference
    +
    +
    + +

    Watchdog check. +More...

    +
    #include <stdint.h>
    +#include "em_wdog.h"
    +#include "sl_iec60730.h"
    +
    +

    Go to the source code of this file.

    + + + + + +

    +Classes

    struct  sl_iec60730_watchdog_t
     Watchdog component configuration structure. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    +#define SL_IEC60730_WDOGINST_NUMB   1
     Default configuration number of enabled watchdog.
     
    +#define SL_IEC60730_WDOG_WAIT_TIMEOUT   (uint32_t) 0x0000FFFFUL
     Timeout time to wait for wachdog to reset.
     
    +#define SL_IEC60730_WDOG_INST(n)   WDOG##n
     Define gets the default value of watchdog(n).
     
    +#define SL_IEC60730_RST   RMU
     Hardware manages the reset cause of the device. With series 2 is EMU.
     
    +#define SL_IEC60730_RSTCAUSE_POR   RMU_RSTCAUSE_PORST
     The reset cause of the device is power on reset.
     
    +#define SL_IEC60730_RSTCAUSE_EM4   RMU_RSTCAUSE_EM4RST
     The reset cause of the device is em4 reset.
     
    +#define SL_IEC60730_RSTCAUSE_WDOG0   RMU_RSTCAUSE_WDOGRST
     The reset cause of the device is watchdog reset.
     
    +#define SL_IEC60730_RSTCAUSE_WDOG1   RMU_RSTCAUSE_WDOGRST
     The reset cause of the device is watchdog reset.
     
    +#define SL_IEC60730_RSTCAUSES_CLEAR()
     Function macro clear hardware reset cause bit SL_IEC60730_RST.
     
    +#define SL_IEC60730_RSTCAUSE   (SL_IEC60730_RST->RSTCAUSE)
     Enable bit flag clear causes reset.
     
    +#define SL_IEC60730_RSTCAUSE   (SL_IEC60730_RST->RSTCAUSE)
     Enable bit flag clear causes reset.
     
    +#define SL_IEC60730_RST_POR   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_POR)
     
    +#define SL_IEC60730_RST_EM4   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_EM4)
     
    +#define SL_IEC60730_RST_WDOG0   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG0)
     
    +#define SL_IEC60730_RST_WDOG1   (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG1)
     
    +#define SL_IEC60730_RST_WDOGS   (SL_IEC60730_RST_WDOG0 || SL_IEC60730_RST_WDOG1)
     
    +#define SL_IEC60730_BURAM_IDX   0UL
     index buram to store the value
     
    + + + + +

    +Enumerations

    enum  sl_iec60730_test_watchdog_t { SL_IEC60730_WATCHDOG_INVALID = 0, +SL_IEC60730_WATCHDOG_TESTING = 1, +SL_IEC60730_WATCHDOG_VALID = 2 + }
     State of watchdog testing. More...
     
    + + + +

    +Functions

    sl_iec60730_test_result_t sl_iec60730_watchdog_post (void)
     
    + + + +

    +Variables

    volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state
     
    +

    Detailed Description

    +

    Watchdog check.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/sl__iec60730__watchdog_8h_source.html b/site/document_api_iec60730_library/sl__iec60730__watchdog_8h_source.html new file mode 100644 index 00000000..da35a1b8 --- /dev/null +++ b/site/document_api_iec60730_library/sl__iec60730__watchdog_8h_source.html @@ -0,0 +1,297 @@ + + + + + + + +Document API IEC60730 Library: lib/inc/sl_iec60730_watchdog.h Source File + + + + + + + + + +
    +
    + + + + + + +
    +
    Document API IEC60730 Library +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    sl_iec60730_watchdog.h
    +
    +
    +Go to the documentation of this file.
    1 /***************************************************************************/
    +
    18 #ifndef SL_IEC60730_WATCHDOG_H
    +
    19 #define SL_IEC60730_WATCHDOG_H
    +
    20 
    +
    21 #ifdef __cplusplus
    +
    22 extern "C" {
    +
    23 #endif /* __cplusplus */
    +
    24 
    +
    25 #include <stdint.h>
    +
    26 #include "em_wdog.h"
    +
    27 #include "sl_iec60730.h"
    +
    28 
    +
    29 /**************************************************************************/
    +
    117 typedef struct {
    +
    119  WDOG_TypeDef *const SL_WDOG;
    +
    120  uint32_t rst;
    +
    121 } sl_iec60730_watchdog_t;
    +
    122 
    +
    124 typedef enum {
    +
    125  SL_IEC60730_WATCHDOG_INVALID = 0,
    +
    126  SL_IEC60730_WATCHDOG_TESTING = 1,
    +
    127  SL_IEC60730_WATCHDOG_VALID = 2,
    +
    128 } sl_iec60730_test_watchdog_t;
    +
    129 
    +
    130 #ifdef DOXYGEN
    +
    131 #define SL_IEC60730_WDOGINST_NUMB 1
    +
    133 #else // DOXYGEN
    +
    134 #if ((SL_IEC60730_WDOG0_ENABLE == 1) && (SL_IEC60730_WDOG1_ENABLE == 1))
    +
    135 #define SL_IEC60730_WDOGINST_NUMB 2
    +
    136 #elif ((SL_IEC60730_WDOG0_ENABLE == 0) && (SL_IEC60730_WDOG1_ENABLE == 0))
    +
    137 #warning No watchdogs have been selected for testing!
    +
    138 #define SL_IEC60730_WDOGINST_NUMB 0
    +
    139 #else
    +
    140 #define SL_IEC60730_WDOGINST_NUMB 1
    +
    141 #endif
    +
    142 #endif // DOXYGEN
    +
    143 
    +
    145 #ifndef SL_IEC60730_WDOG_WAIT_TIMEOUT
    +
    146 #define SL_IEC60730_WDOG_WAIT_TIMEOUT (uint32_t) 0x0000FFFFUL
    +
    147 #endif
    +
    148 
    +
    149 #ifdef DOXYGEN
    +
    150 #define SL_IEC60730_WDOG_INST(n) WDOG##n
    +
    152 
    +
    154 #define SL_IEC60730_RST RMU
    +
    155 
    +
    157 #define SL_IEC60730_RSTCAUSE_POR RMU_RSTCAUSE_PORST
    +
    158 
    +
    160 #define SL_IEC60730_RSTCAUSE_EM4 RMU_RSTCAUSE_EM4RST
    +
    161 
    +
    163 #define SL_IEC60730_RSTCAUSE_WDOG0 RMU_RSTCAUSE_WDOGRST
    +
    164 
    +
    166 #define SL_IEC60730_RSTCAUSE_WDOG1 RMU_RSTCAUSE_WDOGRST
    +
    167 
    +
    169 #define SL_IEC60730_RSTCAUSES_CLEAR()
    +
    170 
    +
    172 #define SL_IEC60730_RSTCAUSE (SL_IEC60730_RST->RSTCAUSE)
    +
    173 
    +
    174 #else // DOXYGEN
    +
    175 #ifndef SL_IEC60730_WDOG_INST
    +
    176 #if (_SILICON_LABS_32B_SERIES == 2)
    +
    177 #if ((defined SL_IEC60730_NON_SECURE_ENABLE) && (!defined(SL_TRUSTZONE_SECURE)))
    +
    178 #define SL_IEC60730_WDOG_INST(n) WDOG##n##_NS
    +
    179 #else
    +
    180 #define SL_IEC60730_WDOG_INST(n) WDOG##n
    +
    181 #endif
    +
    182 #else // Series 1 devices
    +
    183 #define SL_IEC60730_WDOG_INST(n) WDOG##n
    +
    184 #endif //(_SILICON_LABS_32B_SERIES == 2)
    +
    185 #endif
    +
    186 
    +
    187 #if (_SILICON_LABS_32B_SERIES < 2)
    +
    188 #ifndef SL_IEC60730_RST
    +
    189 #define SL_IEC60730_RST RMU
    +
    190 #endif
    +
    191 
    +
    192 #define SL_IEC60730_RSTCAUSE_POR RMU_RSTCAUSE_PORST
    +
    193 #define SL_IEC60730_RSTCAUSE_EM4 RMU_RSTCAUSE_EM4RST
    +
    194 #define SL_IEC60730_RSTCAUSE_WDOG0 RMU_RSTCAUSE_WDOGRST
    +
    195 #define SL_IEC60730_RSTCAUSE_WDOG1 RMU_RSTCAUSE_WDOGRST
    +
    196 
    +
    197 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    198 #define SL_IEC60730_RSTCAUSES_CLEAR() \
    +
    199  do { \
    +
    200  SL_IEC60730_RST->CMD |= RMU_CMD_RCCLR; \
    +
    201  } while (0)
    +
    202 #else
    +
    203 #define SL_IEC60730_RSTCAUSES_CLEAR() unit_test_iec60730_watchdog_mock_rstcause_clear()
    +
    204 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    205 #else // Series 2 devices
    +
    206 #ifndef SL_IEC60730_RST
    +
    207 #if ((defined SL_IEC60730_NON_SECURE_ENABLE) && (!defined(SL_TRUSTZONE_SECURE)))
    +
    208 #define SL_IEC60730_RST EMU_NS
    +
    209 #else
    +
    210 #define SL_IEC60730_RST EMU
    +
    211 #endif
    +
    212 #endif
    +
    213 
    +
    214 #define SL_IEC60730_RSTCAUSE_POR EMU_RSTCAUSE_POR
    +
    215 #define SL_IEC60730_RSTCAUSE_EM4 EMU_RSTCAUSE_EM4
    +
    216 #define SL_IEC60730_RSTCAUSE_WDOG0 EMU_RSTCAUSE_WDOG0
    +
    217 #define SL_IEC60730_RSTCAUSE_WDOG1 EMU_RSTCAUSE_WDOG1
    +
    218 
    +
    219 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    220 #ifdef WDOG_HAS_SET_CLEAR
    +
    221 #define SL_IEC60730_RSTCAUSES_CLEAR() \
    +
    222  do { \
    +
    223  SL_IEC60730_RST->CMD_SET = EMU_CMD_RSTCAUSECLR; \
    +
    224  } while (0)
    +
    225 #else
    +
    226 #define SL_IEC60730_RSTCAUSES_CLEAR() \
    +
    227  do { \
    +
    228  SL_IEC60730_RST->CMD |= EMU_CMD_RSTCAUSECLR; \
    +
    229  } while (0)
    +
    230 #endif // WDOG_HAS_SET_CLEAR
    +
    231 #else
    +
    232 #define SL_IEC60730_RSTCAUSES_CLEAR() unit_test_iec60730_watchdog_mock_rstcause_clear()
    +
    233 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    234 #endif // (_SILICON_LABS_32B_SERIES < 2)
    +
    235 #endif // DOXYGEN
    +
    236 
    +
    237 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    238 #define SL_IEC60730_RSTCAUSE (SL_IEC60730_RST->RSTCAUSE)
    +
    239 #else
    +
    240 #define SL_IEC60730_RSTCAUSE unit_test_iec60730_watchdog_mock_rstcause()
    +
    241 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    242 
    +
    243 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    244 #define SL_IEC60730_RST_POR (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_POR)
    +
    245 #define SL_IEC60730_RST_EM4 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_EM4)
    +
    246 #else
    +
    247 #define SL_IEC60730_RST_POR unit_test_iec60730_watchdog_mock_rst_por()
    +
    248 #define SL_IEC60730_RST_EM4 unit_test_iec60730_watchdog_mock_rst_em4()
    +
    249 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    250 
    +
    251 #ifdef DOXYGEN
    +
    252 
    +
    253 #define SL_IEC60730_RST_WDOG0 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG0)
    +
    254 #define SL_IEC60730_RST_WDOG1 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG1)
    +
    255 
    +
    256 #else // DOXYGEN
    +
    257 #ifndef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    258 #if (SL_IEC60730_WDOG0_ENABLE == 1)
    +
    259 #define SL_IEC60730_RST_WDOG0 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG0)
    +
    260 #else
    +
    261 #define SL_IEC60730_RST_WDOG0 0
    +
    262 #endif // (SL_IEC60730_WDOG0_ENABLE == 1)
    +
    263 #if (SL_IEC60730_WDOG1_ENABLE == 1)
    +
    264 #define SL_IEC60730_RST_WDOG1 (SL_IEC60730_RSTCAUSE & SL_IEC60730_RSTCAUSE_WDOG1)
    +
    265 #else
    +
    266 #define SL_IEC60730_RST_WDOG1 0
    +
    267 #endif // (SL_IEC60730_WDOG1_ENABLE == 1)
    +
    268 #else
    +
    269 #if (SL_IEC60730_WDOG0_ENABLE == 1)
    +
    270 #define SL_IEC60730_RST_WDOG0 unit_test_iec60730_watchdog_mock_rst_wdog0()
    +
    271 #else
    +
    272 #define SL_IEC60730_RST_WDOG0 0
    +
    273 #endif // (SL_IEC60730_WDOG0_ENABLE == 1)
    +
    274 #if (SL_IEC60730_WDOG1_ENABLE == 1)
    +
    275 #define SL_IEC60730_RST_WDOG1 unit_test_iec60730_watchdog_mock_rst_wdog1()
    +
    276 #else
    +
    277 #define SL_IEC60730_RST_WDOG1 0
    +
    278 #endif // (SL_IEC60730_WDOG1_ENABLE == 1)
    +
    279 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    280 #endif // DOXYGEN
    +
    281 
    +
    282 #define SL_IEC60730_RST_WDOGS (SL_IEC60730_RST_WDOG0 || SL_IEC60730_RST_WDOG1)
    +
    283 
    +
    284 #ifndef SL_IEC60730_BURAM
    +
    285 #if (_SILICON_LABS_32B_SERIES == 2)
    +
    286 #if ((defined SL_IEC60730_NON_SECURE_ENABLE) && (!defined(SL_TRUSTZONE_SECURE)))
    +
    287 #define SL_IEC60730_BURAM BURAM_NS
    +
    288 #else
    +
    289 #define SL_IEC60730_BURAM BURAM
    +
    290 #endif
    +
    291 #endif // (_SILICON_LABS_32B_SERIES == 2)
    +
    292 #endif
    +
    293 
    +
    295 #ifndef SL_IEC60730_BURAM_IDX
    +
    296 #define SL_IEC60730_BURAM_IDX 0UL
    +
    297 #endif
    +
    298 
    +
    299 #ifdef DOXYGEN
    +
    300 extern volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state;
    +
    304 #else
    +
    305 extern volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state IEC60730_DATA_NO_CLEAR;
    +
    306 #endif // DOXYGEN
    +
    307 
    +
    308 #ifdef UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    309 /**************************************************************************/
    +
    315 void sl_iec60730_watchdog_count_reset(void);
    +
    316 
    +
    317 /**************************************************************************/
    +
    323 void sl_iec60730_watchdog_count_set(uint8_t count);
    +
    324 
    +
    325 #endif // UNIT_TEST_IEC60730_WATCHDOG_ENABLE
    +
    326 
    +
    327 /**************************************************************************/
    +
    344 sl_iec60730_test_result_t sl_iec60730_watchdog_post(void);
    +
    345 
    +
    349 #ifdef __cplusplus
    +
    350 }
    +
    351 #endif /* __cplusplus */
    +
    352 
    +
    353 #endif /* SL_IEC60730_WATCHDOG_H */
    +
    +
    sl_iec60730.h
    Library definitions.
    +
    SL_IEC60730_WATCHDOG_INVALID
    @ SL_IEC60730_WATCHDOG_INVALID
    Watchdog POST test not done.
    Definition: sl_iec60730_watchdog.h:125
    +
    sl_iec60730_test_watchdog_t
    sl_iec60730_test_watchdog_t
    State of watchdog testing.
    Definition: sl_iec60730_watchdog.h:124
    +
    sl_iec60730_watchdog_t
    Watchdog component configuration structure.
    Definition: sl_iec60730_watchdog.h:118
    +
    sl_iec60730_watchdog_t::SL_WDOG
    WDOG_TypeDef *const SL_WDOG
    Pointer to Watchdog instance.
    Definition: sl_iec60730_watchdog.h:119
    +
    SL_IEC60730_WATCHDOG_TESTING
    @ SL_IEC60730_WATCHDOG_TESTING
    Watchdog POST testing in progress.
    Definition: sl_iec60730_watchdog.h:126
    +
    sl_iec60730_watchdog_post
    sl_iec60730_test_result_t sl_iec60730_watchdog_post(void)
    +
    sl_iec60730_watchdog_t::rst
    uint32_t rst
    Watchdog reset cause value.
    Definition: sl_iec60730_watchdog.h:120
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    SL_IEC60730_WATCHDOG_VALID
    @ SL_IEC60730_WATCHDOG_VALID
    Watchdog POST test complete, watchdog valid.
    Definition: sl_iec60730_watchdog.h:127
    +
    iec60730_watchdog_state
    volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state
    +
    IEC60730_DATA_NO_CLEAR
    #define IEC60730_DATA_NO_CLEAR
    No clear at startup.
    Definition: sl_iec60730_toolchain.h:67
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    sl_iec60730_imc_params_t Struct Reference
    EFR32 IEC60730 Library » Invariable Memory Check
    +
    +
    + +

    This structure is used as configuration for IMC testing, that holds GPCRC Register. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + +

    +Public Attributes

    +sl_iec60730_crc_typedef * gpcrc
     GPCRC Register.
     
    +

    Detailed Description

    +

    This structure is used as configuration for IMC testing, that holds GPCRC Register.

    +
    The documentation for this struct was generated from the following file: +
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    number_of_test_regionssl_iec60730_imc_test_multiple_regions_t
    region (defined in sl_iec60730_imc_test_multiple_regions_t)sl_iec60730_imc_test_multiple_regions_t
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    sl_iec60730_imc_test_multiple_regions_t Struct Reference
    EFR32 IEC60730 Library » Invariable Memory Check
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    + +

    #include <sl_iec60730.h>

    + + + + + + + +

    +Public Attributes

    +const sl_iec60730_imc_test_region_t * region
     
    +uint8_t number_of_test_regions
     Number of test regions.
     
    +

    Detailed Description

    +

    This structure is used for multiple test regions for IMC testing with the pointer pointing to the array containing the start and end values ​​of the regions you want to test and the number of regions you want to test.

    +
    The documentation for this struct was generated from the following file: +
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    endsl_iec60730_imc_test_region_t
    startsl_iec60730_imc_test_region_t
    + +
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    EFR32 IEC60730 Library » Invariable Memory Check
    +
    +
    + +

    This structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +uint32_t * start
     Start address of FLASH to check.
     
    +uint32_t * end
     End address of FLASH to check.
     
    +

    Detailed Description

    +

    This structure is used as configuration for IMC testing. The variable contains information about the starting and ending address of the region you want to check.

    +
    The documentation for this struct was generated from the following file: +
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    irq_bounds (defined in sl_iec60730_irq_cfg_t)sl_iec60730_irq_cfg_t
    irq_count (defined in sl_iec60730_irq_cfg_t)sl_iec60730_irq_cfg_t
    size (defined in sl_iec60730_irq_cfg_t)sl_iec60730_irq_cfg_t
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    sl_iec60730_irq_cfg_t Struct Reference
    EFR32 IEC60730 Library » IRQ Check
    +
    +
    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +volatile SL_IEC60730_IRQ_TYPE_VARIABLE * irq_count
     
    +const sl_iec60730_irq_execution_bounds_t * irq_bounds
     
    +uint8_t size
     
    +

    Detailed Description

    +

    Struct contains a pointer variable point to the number of execution interrupts and the boundary of each interrupt count variable. OEMs use this structure to init value. Defines SL_IEC60730_IRQ_TYPE_VARIABLE using for set type variable irq_count. This count is used by the test to step through each entry in irq_bounds to determine if the count for each interrupt exceeds expected min/max bounds. OEM code is responsible for incrementing irq_count of this array corresponding to the IRQ described by the corresponding element in irq_bounds. The incrementing instruction should only be placed inside the IRQ referred to by the element. The element will be reset to 0 by the interrupt plausibility check executing in sl_iec60730_test_clock_tick(). The interrupt plausibility test, which executes at the end of a test clock period, compares the number of ISR executions for each ISR as defined in the irq_count array. A count outside the defined bounds results in a safe state entry.

    +
    The documentation for this struct was generated from the following file: +
    + +
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    maxsl_iec60730_irq_execution_bounds_t
    minsl_iec60730_irq_execution_bounds_t
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    sl_iec60730_irq_execution_bounds_t Struct Reference
    EFR32 IEC60730 Library » IRQ Check
    +
    +
    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +SL_IEC60730_IRQ_TYPE_VARIABLE min
     Minimum expected executions of ISR. Can be 0-255, must be less than or equal to max.
     
    +SL_IEC60730_IRQ_TYPE_VARIABLE max
     Maximum executed executions of ISR. Can be 0-255, must be greater than or equal to min.
     
    +

    Detailed Description

    +

    OEMs use this structure to define the expected min and max number of executions for each interrupt included in a project.

    +
    The documentation for this struct was generated from the following file: +
    + +
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    irq_fail (defined in sl_iec60730_irq_fail_t)sl_iec60730_irq_fail_t
    num_irq_fail (defined in sl_iec60730_irq_fail_t)sl_iec60730_irq_fail_t
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    sl_iec60730_irq_fail_t Struct Reference
    EFR32 IEC60730 Library » IRQ Check
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    +
    + +

    #include <sl_iec60730.h>

    + + + + + + +

    +Public Attributes

    +uint32_t irq_fail
     
    +uint8_t num_irq_fail
     
    +

    Detailed Description

    +

    Struct contains information about the IRQ number and the location of the failed IRQ in the order of the OEM array

    +
    The documentation for this struct was generated from the following file: +
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    +Generated by   +doxygen + 1.8.17 +
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    sl_iec60730_library_version_t Struct Reference
    EFR32 IEC60730 Library » POST
    +
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    +Public Attributes

    +uint8_t major
     Major version.
     
    +uint8_t minor
     Minor version.
     
    +uint8_t revision
     Revision.
     
    +
    The documentation for this struct was generated from the following file: +
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    +Generated by   +doxygen + 1.8.17 +
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    error (defined in sl_iec60730_safety_check_t)sl_iec60730_safety_check_t
    number_error (defined in sl_iec60730_safety_check_t)sl_iec60730_safety_check_t
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    sl_iec60730_safety_check_t Struct Reference
    EFR32 IEC60730 Library » BIST
    +
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    #include <sl_iec60730.h>

    + + + + + + +

    +Public Attributes

    +uint32_t error
     
    +uint8_t number_error
     
    +

    Detailed Description

    +

    typedef struct used to relay and remember status as bit field is type of local variable iec60730_safety_check save IEC60730 safety code error. When a failure is detected, function sl_iec60730_safety_check_error_occur is called by OEM and interrupt check functions to set iec60730_safety_check to type of sl_iec60730_test_failure_t.

    +
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    halsl_iec60730_update_crc_params_t
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    sl_iec60730_update_crc_params_t Struct Reference
    EFR32 IEC60730 Library » Invariable Memory Check
    +
    +
    + +

    #include <sl_iec60730.h>

    + + + + + + + + + + + + + + +

    +Public Attributes

    +sl_iec60730_imc_params_t hal
     struct sl_iec60730_imc_params_t that contain GPCRC Register
     
    +sl_iec60730_crc_init_typedef init
     CRC initialization structure.
     
    +sl_iec60730_read_type_t readType
     The way to read calculated CRC value.
     
    +sl_iec60730_crc_t xorOut
     XOR with calculated CRC value.
     
    +

    Detailed Description

    +

    This structure is used as configuration for CRC Buffer calculation. It used when using function sl_iec60730_update_crc_with_data_buffer

    Note
    Struct sl_iec60730_crc_init_typedef defined in header file "em_gpcrc.h"
    +
    The documentation for this struct was generated from the following file: +
    + +
    +Generated by   +doxygen + 1.8.17 +
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    number_of_test_regionssl_iec60730_vmc_test_multiple_regions_t
    region (defined in sl_iec60730_vmc_test_multiple_regions_t)sl_iec60730_vmc_test_multiple_regions_t
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    sl_iec60730_vmc_test_multiple_regions_t Struct Reference
    EFR32 IEC60730 Library » Variable Memory Check
    +
    +
    + +

    This structure is used as multiple test regions for VMC testing. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + + + +

    +Public Attributes

    +const sl_iec60730_vmc_test_region_t * region
     
    +uint8_t number_of_test_regions
     Number of test regions.
     
    +

    Detailed Description

    +

    This structure is used as multiple test regions for VMC testing.

    +
    The documentation for this struct was generated from the following file: +
    + +
    +Generated by   +doxygen + 1.8.17 +
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    endsl_iec60730_vmc_test_region_t
    startsl_iec60730_vmc_test_region_t
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    sl_iec60730_vmc_test_region_t Struct Reference
    EFR32 IEC60730 Library » Variable Memory Check
    +
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    + +

    This structure is used as configuration for VMC testing. + More...

    + +

    #include <sl_iec60730.h>

    + + + + + + + + +

    +Public Attributes

    +uint32_t * start
     Start address of RAM to check.
     
    +uint32_t * end
     End address of RAM to check.
     
    +

    Detailed Description

    +

    This structure is used as configuration for VMC testing.

    +
    The documentation for this struct was generated from the following file: +
    + +
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    sl_iec60730_watchdog_t Struct Reference
    EFR32 IEC60730 Library » Watchdog Check
    +
    +
    + +

    Watchdog component configuration structure. + More...

    + +

    #include <sl_iec60730_watchdog.h>

    + + + + + + + + +

    +Public Attributes

    +WDOG_TypeDef *const SL_WDOG
     Pointer to Watchdog instance.
     
    +uint32_t rst
     Watchdog reset cause value.
     
    +

    Detailed Description

    +

    Watchdog component configuration structure.

    +
    The documentation for this struct was generated from the following file: +
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span.scroll-down-arrow{position:absolute;top:0;left:50%;margin-left:-6px;width:0;height:0;overflow:hidden;border-width:6px;border-style:dashed dashed solid dashed;border-color:transparent transparent #555 transparent}.sm-dox span.scroll-down-arrow{top:8px;border-style:solid dashed dashed dashed;border-color:#555 transparent transparent transparent}.sm-dox.sm-rtl a.has-submenu{padding-right:12px;padding-left:24px}.sm-dox.sm-rtl a span.sub-arrow{right:auto;left:12px}.sm-dox.sm-rtl.sm-vertical a.has-submenu{padding:10px 20px}.sm-dox.sm-rtl.sm-vertical a span.sub-arrow{right:auto;left:8px;border-style:dashed solid dashed dashed;border-color:transparent #555 transparent transparent}.sm-dox.sm-rtl>li>ul:before{left:auto;right:30px}.sm-dox.sm-rtl>li>ul:after{left:auto;right:31px}.sm-dox.sm-rtl ul a.has-submenu{padding:10px 20px !important}.sm-dox.sm-rtl ul a span.sub-arrow{right:auto;left:8px;border-style:dashed solid dashed dashed;border-color:transparent #555 transparent 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/dev/null +++ b/site/document_api_iec60730_library/unit__test__common_8h.html @@ -0,0 +1,198 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_common.h File Reference + + + + + + + + + +
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    unit_test_common.h File Reference
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    + +

    common unit test api +More...

    +
    #include <stdint.h>
    +#include <string.h>
    +#include <stdbool.h>
    +#include "unity.h"
    +#include "sl_iec60730_internal.h"
    +
    +

    Go to the source code of this file.

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    +Macros

    +#define MAX_NUMBER_OF_TEST_CASE   20
     
    + + + + + + + + + + + + + + + +

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    +void run_test (UnityTestFunction func, const char *name, UNITY_LINE_TYPE line_num)
     
    +void setUp (void)
     
    +void tearDown (void)
     
    +void resetTest (void)
     
    void cmock_set_value (sl_iec60730_test_result_t sl_iec60730_test_result_t)
     
    sl_iec60730_test_result_t cmock_return_value (void)
     
    void unit_test_run_all_test_cases (void)
     
    + + + + + +

    +Variables

    +uint8_t test_case_result [MAX_NUMBER_OF_TEST_CASE]
     
    +uint8_t current_test_numth
     
    +

    Detailed Description

    +

    common unit test api

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

    +

    Function Documentation

    + +

    ◆ cmock_return_value()

    + +
    +
    + + + + + + + + +
    sl_iec60730_test_result_t cmock_return_value (void )
    +
    +

    Public Function get value simulate value function mock return.

    +
    Returns
    None.
    + +
    +
    + +

    ◆ cmock_set_value()

    + +
    +
    + + + + + + + + +
    void cmock_set_value (sl_iec60730_test_result_t sl_iec60730_test_result_t)
    +
    +

    Public Function set value simulate value function mock return.

    +
    Returns
    None.
    + +
    +
    + +

    ◆ unit_test_run_all_test_cases()

    + +
    +
    + + + + + + + + +
    void unit_test_run_all_test_cases (void )
    +
    +

    Public Function runs all unit test cases.

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    Returns
    None.
    + +
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    1 /***************************************************************************/
    +
    18 #ifndef _TEST_COMMON_H
    +
    19 #define _TEST_COMMON_H
    +
    20 
    +
    21 #include <stdint.h>
    +
    22 #include <string.h>
    +
    23 #include <stdbool.h>
    +
    24 #include "unity.h"
    +
    25 #include "sl_iec60730_internal.h"
    +
    26 
    +
    27 /*=======Result test case=====*/
    +
    28 #define MAX_NUMBER_OF_TEST_CASE 20
    +
    29 
    +
    30 extern uint8_t test_case_result[MAX_NUMBER_OF_TEST_CASE];
    +
    31 extern uint8_t current_test_numth;
    +
    32 
    +
    33 /*=======Test Runner Used To Run Each Test=====*/
    +
    34 extern void run_test(UnityTestFunction func, const char* name, UNITY_LINE_TYPE line_num);
    +
    35 /*=======Test Reset Options=====*/
    +
    36 extern void setUp(void);
    +
    37 extern void tearDown(void);
    +
    38 extern void resetTest(void);
    +
    39 /*=======Mock Management=====*/
    +
    40 
    +
    41 /**************************************************************************/
    +
    47 extern void cmock_set_value(sl_iec60730_test_result_t sl_iec60730_test_result_t);
    +
    48 
    +
    49 /**************************************************************************/
    +
    55 extern sl_iec60730_test_result_t cmock_return_value(void);
    +
    56 
    +
    57 /**************************************************************************/
    +
    63 extern void unit_test_run_all_test_cases(void);
    +
    64 
    +
    65 #endif // _TEST_COMMON_H
    +
    +
    cmock_return_value
    sl_iec60730_test_result_t cmock_return_value(void)
    +
    sl_iec60730_internal.h
    Internal definitions.
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    cmock_set_value
    void cmock_set_value(sl_iec60730_test_result_t sl_iec60730_test_result_t)
    +
    unit_test_run_all_test_cases
    void unit_test_run_all_test_cases(void)
    + +
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    + + diff --git a/site/document_api_iec60730_library/unit__test__iec60730__bist_8h.html b/site/document_api_iec60730_library/unit__test__iec60730__bist_8h.html new file mode 100644 index 00000000..18cd4684 --- /dev/null +++ b/site/document_api_iec60730_library/unit__test__iec60730__bist_8h.html @@ -0,0 +1,103 @@ + + + + + + + +Document API IEC60730 Library: test/unit_test/inc/unit_test_iec60730_bist.h File Reference + + + + + + + + + +
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    unit_test_iec60730_bist.h File Reference
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    + +

    Unit test function sl_iec60730_bist(). +More...

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    void test_sl_iec60730_bist_pass_all_check_condition (void)
     
    void test_sl_iec60730_bist_failed_check_condition (void)
     
    void test_iec60730_safety_check_error_occur (void)
     
    +

    Detailed Description

    +

    Unit test function sl_iec60730_bist().

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_BIST_H
    +
    35 #define UNIT_TEST_IEC60730_BIST_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_bist_pass_all_check_condition(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_bist_failed_check_condition(void);
    +
    60 
    +
    61 /**************************************************************************/
    +
    70 void test_iec60730_safety_check_error_occur(void);
    +
    71 
    +
    72 #endif // UNIT_TEST_IEC60730_BIST_H
    +
    73 
    +
    +
    test_sl_iec60730_bist_failed_check_condition
    void test_sl_iec60730_bist_failed_check_condition(void)
    +
    test_sl_iec60730_bist_pass_all_check_condition
    void test_sl_iec60730_bist_pass_all_check_condition(void)
    +
    test_iec60730_safety_check_error_occur
    void test_iec60730_safety_check_error_occur(void)
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    Unit tests for functions in cpu registers module. +More...

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    void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_failed_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition (void)
     
    void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in cpu registers module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    unit_test_iec60730_cpu_registers.h
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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_CPU_REGISTERS_H
    +
    35 #define UNIT_TEST_IEC60730_CPU_REGISTERS_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_cpu_registers_bist_failed_check_condition(void);
    +
    60 
    +
    61 /**************************************************************************/
    +
    71 void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition(void);
    +
    72 
    +
    73 /**************************************************************************/
    +
    83 void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition(void);
    +
    84 
    +
    85 /**************************************************************************/
    +
    95 void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition(void);
    +
    96 
    +
    97 /**************************************************************************/
    +
    107 void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition(void);
    +
    108 
    +
    109 #endif // UNIT_TEST_IEC60730_CPU_REGISTERS_H
    +
    110 
    +
    +
    test_sl_iec60730_cpu_registers_bist_s_failed_check_condition
    void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition
    void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_pass_all_check_condition
    void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_failed_check_condition
    void test_sl_iec60730_cpu_registers_bist_failed_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition
    void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition(void)
    +
    test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition
    void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition(void)
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    Unit tests for functions in invariable memory module. +More...

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    #include <stdint.h>
    +#include <stdbool.h>
    +#include "sl_iec60730_internal.h"
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    uint32_t * unit_test_iec60730_imc_mock_init_run_crc (void)
     
    sl_iec60730_test_result_t unit_test_mock_check_integrity (void)
     
    bool unit_test_iec60730_imc_mock_enable_gpcrc (void)
     
    bool unit_test_iec60730_imc_mock_sw_enable_cal_crc (void)
     
    void test_sl_iec60730_imc_init_param_null (void)
     
    void test_sl_iec60730_imc_post_pass_check (void)
     
    void test_sl_iec60730_imc_post_fail_check (void)
     
    void test_sl_iec60730_imc_bist_pass_all_check (void)
     
    void test_sl_iec60730_imc_bist_fail_check_integrity (void)
     
    void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address (void)
     
    void test_sl_iec60730_imc_bist_fail_compare_crc (void)
     
    void test_sl_iec60730_update_crc_with_data_buffer_params_null (void)
     
    void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in invariable memory module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_INVARIABLE_MEMORY_H
    +
    35 #define UNIT_TEST_IEC60730_INVARIABLE_MEMORY_H
    +
    36 
    +
    37 #include <stdint.h>
    +
    38 #include <stdbool.h>
    +
    39 #include "sl_iec60730_internal.h"
    +
    40 
    +
    41 /*======= External Functions =====*/
    +
    42 
    +
    43 /**************************************************************************/
    +
    49 extern uint32_t* unit_test_iec60730_imc_mock_init_run_crc(void);
    +
    50 
    +
    51 /**************************************************************************/
    +
    57 extern sl_iec60730_test_result_t unit_test_mock_check_integrity(void);
    +
    58 
    +
    59 /**************************************************************************/
    +
    65 extern bool unit_test_iec60730_imc_mock_enable_gpcrc(void);
    +
    66 
    +
    67 /**************************************************************************/
    +
    73 extern bool unit_test_iec60730_imc_mock_sw_enable_cal_crc(void);
    +
    74 
    +
    75 /**************************************************************************/
    +
    84 void test_sl_iec60730_imc_init_param_null(void);
    +
    85 
    +
    86 /**************************************************************************/
    +
    95 void test_sl_iec60730_imc_post_pass_check(void);
    +
    96 
    +
    97 /**************************************************************************/
    +
    108 void test_sl_iec60730_imc_post_fail_check(void);
    +
    109 
    +
    110 /**************************************************************************/
    +
    121 void test_sl_iec60730_imc_bist_pass_all_check(void);
    +
    122 
    +
    123 /**************************************************************************/
    +
    134 void test_sl_iec60730_imc_bist_pass_all_check(void);
    +
    135 
    +
    136 /**************************************************************************/
    +
    144 void test_sl_iec60730_imc_bist_fail_check_integrity(void);
    +
    145 
    +
    146 /**************************************************************************/
    +
    155 void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address(void);
    +
    156 
    +
    157 /**************************************************************************/
    +
    168 void test_sl_iec60730_imc_bist_fail_compare_crc(void);
    +
    169 
    +
    170 /**************************************************************************/
    +
    179 void test_sl_iec60730_update_crc_with_data_buffer_params_null(void);
    +
    180 
    +
    181 /**************************************************************************/
    +
    189 void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc(void);
    +
    190 
    +
    191 #endif // UNIT_TEST_IEC60730_INVARIABLE_MEMORY_H
    +
    192 
    +
    +
    test_sl_iec60730_imc_init_param_null
    void test_sl_iec60730_imc_init_param_null(void)
    +
    unit_test_mock_check_integrity
    sl_iec60730_test_result_t unit_test_mock_check_integrity(void)
    +
    test_sl_iec60730_imc_bist_fail_check_integrity
    void test_sl_iec60730_imc_bist_fail_check_integrity(void)
    +
    test_sl_iec60730_update_crc_with_data_buffer_params_null
    void test_sl_iec60730_update_crc_with_data_buffer_params_null(void)
    +
    sl_iec60730_internal.h
    Internal definitions.
    +
    unit_test_iec60730_imc_mock_sw_enable_cal_crc
    bool unit_test_iec60730_imc_mock_sw_enable_cal_crc(void)
    +
    test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address
    void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address(void)
    +
    unit_test_iec60730_imc_mock_enable_gpcrc
    bool unit_test_iec60730_imc_mock_enable_gpcrc(void)
    +
    test_sl_iec60730_imc_bist_fail_compare_crc
    void test_sl_iec60730_imc_bist_fail_compare_crc(void)
    +
    test_sl_iec60730_imc_bist_pass_all_check
    void test_sl_iec60730_imc_bist_pass_all_check(void)
    +
    test_sl_iec60730_imc_post_pass_check
    void test_sl_iec60730_imc_post_pass_check(void)
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    test_sl_iec60730_update_crc_with_data_buffer_calculation_crc
    void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc(void)
    +
    unit_test_iec60730_imc_mock_init_run_crc
    uint32_t * unit_test_iec60730_imc_mock_init_run_crc(void)
    +
    test_sl_iec60730_imc_post_fail_check
    void test_sl_iec60730_imc_post_fail_check(void)
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    void test_sl_iec60730_irq_init_param_null (void)
     
    void test_sl_iec60730_irq_init_param_size_greater_than_max_irq (void)
     
    void test_sl_iec60730_irq_check_count_in_bound (void)
     
    void test_sl_iec60730_irq_check_count_out_bound (void)
     
    void test_sl_iec60730_irq_reset_counter (void)
     
    void test_sl_iec60730_irq_fail_occur (void)
     
    void test_sl_iec60730_irq_reset_fail_result (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in irq module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_IRQ_H
    +
    35 #define UNIT_TEST_IEC60730_IRQ_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_irq_init_param_null(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_irq_init_param_size_greater_than_max_irq(void);
    +
    60 
    +
    61 /**************************************************************************/
    +
    71 void test_sl_iec60730_irq_check_count_in_bound(void);
    +
    72 
    +
    73 /**************************************************************************/
    +
    83 void test_sl_iec60730_irq_check_count_out_bound(void);
    +
    84 
    +
    85 /**************************************************************************/
    +
    94 void test_sl_iec60730_irq_reset_counter(void);
    +
    95 
    +
    96 /**************************************************************************/
    +
    105 void test_sl_iec60730_irq_fail_occur(void);
    +
    106 
    +
    107 /**************************************************************************/
    +
    117 void test_sl_iec60730_irq_reset_fail_result(void);
    +
    118 
    +
    119 #endif // UNIT_TEST_IEC60730_IRQ_H
    +
    120 
    +
    +
    test_sl_iec60730_irq_reset_counter
    void test_sl_iec60730_irq_reset_counter(void)
    +
    test_sl_iec60730_irq_init_param_size_greater_than_max_irq
    void test_sl_iec60730_irq_init_param_size_greater_than_max_irq(void)
    +
    test_sl_iec60730_irq_init_param_null
    void test_sl_iec60730_irq_init_param_null(void)
    +
    test_sl_iec60730_irq_check_count_out_bound
    void test_sl_iec60730_irq_check_count_out_bound(void)
    +
    test_sl_iec60730_irq_reset_fail_result
    void test_sl_iec60730_irq_reset_fail_result(void)
    +
    test_sl_iec60730_irq_check_count_in_bound
    void test_sl_iec60730_irq_check_count_in_bound(void)
    +
    test_sl_iec60730_irq_fail_occur
    void test_sl_iec60730_irq_fail_occur(void)
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    void test_sl_iec60730_post_pass_all_check_condition (void)
     
    void test_sl_iec60730_post_failed_check_condition (void)
     
    +

    Detailed Description

    +

    Unit test function sl_iec60730_post().

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_POST_H
    +
    35 #define UNIT_TEST_IEC60730_POST_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_post_pass_all_check_condition(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_post_failed_check_condition(void);
    +
    60 
    +
    61 #endif // UNIT_TEST_IEC60730_POST_H
    +
    62 
    +
    +
    test_sl_iec60730_post_failed_check_condition
    void test_sl_iec60730_post_failed_check_condition(void)
    +
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    void test_sl_iec60730_program_counter_complete_all_bit_check (void)
     
    void test_sl_iec60730_program_counter_fail_some_bit_check (void)
     
    +

    Detailed Description

    +

    Unit test function sl_iec60730_program_counter_test().

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_PROGRAM_COUNTER_H
    +
    35 #define UNIT_TEST_IEC60730_PROGRAM_COUNTER_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_program_counter_complete_all_bit_check(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    59 void test_sl_iec60730_program_counter_fail_some_bit_check(void);
    +
    60 
    +
    61 #endif // UNIT_TEST_IEC60730_PROGRAM_COUNTER_H
    +
    62 
    +
    +
    test_sl_iec60730_program_counter_complete_all_bit_check
    void test_sl_iec60730_program_counter_complete_all_bit_check(void)
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    void test_sl_iec60730_safety_check_error_occur (void)
     
    void test_sl_iec60730_safety_check_reset_error (void)
     
    +

    Detailed Description

    +

    Unit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur().

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

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    1 /***************************************************************************/
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    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    35 #define UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    49 void test_sl_iec60730_safety_check_error_occur(void);
    +
    50 
    +
    51 /**************************************************************************/
    +
    60 void test_sl_iec60730_safety_check_reset_error(void);
    +
    61 
    +
    62 #endif // UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    63 
    +
    +
    test_sl_iec60730_safety_check_error_occur
    void test_sl_iec60730_safety_check_error_occur(void)
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    test_sl_iec60730_safety_check_reset_error
    void test_sl_iec60730_safety_check_reset_error(void)
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    void test_sl_iec60730_test_clock_tick_timer_test_disable (void)
     
    void test_sl_iec60730_test_clock_tick_count_in_bound (void)
     
    void test_sl_iec60730_test_clock_tick_count_out_bound (void)
     
    void test_sl_iec60730_sys_clock_count_reset (void)
     
    void test_sl_iec60730_test_clock_tick_test_clock_multiplier (void)
     
    void test_sl_iec60730_get_number_test_timer_tick (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in system_clock module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    35 #define UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    48 void test_sl_iec60730_test_clock_tick_timer_test_disable(void);
    +
    49 
    +
    50 /**************************************************************************/
    +
    61 void test_sl_iec60730_test_clock_tick_count_in_bound(void);
    +
    62 
    +
    63 /**************************************************************************/
    +
    74 void test_sl_iec60730_test_clock_tick_count_out_bound(void);
    +
    75 
    +
    76 /**************************************************************************/
    +
    88 void test_sl_iec60730_sys_clock_count_reset(void);
    +
    89 
    +
    90 /**************************************************************************/
    +
    100 void test_sl_iec60730_test_clock_tick_test_clock_multiplier(void);
    +
    101 
    +
    102 /**************************************************************************/
    +
    111 void test_sl_iec60730_get_number_test_timer_tick(void);
    +
    112 
    +
    113 #endif // UNIT_TEST_IEC60730_SAFETY_CHECK_H
    +
    114 
    +
    +
    test_sl_iec60730_test_clock_tick_count_in_bound
    void test_sl_iec60730_test_clock_tick_count_in_bound(void)
    +
    test_sl_iec60730_get_number_test_timer_tick
    void test_sl_iec60730_get_number_test_timer_tick(void)
    +
    test_sl_iec60730_test_clock_tick_count_out_bound
    void test_sl_iec60730_test_clock_tick_count_out_bound(void)
    +
    test_sl_iec60730_test_clock_tick_timer_test_disable
    void test_sl_iec60730_test_clock_tick_timer_test_disable(void)
    +
    test_sl_iec60730_test_clock_tick_test_clock_multiplier
    void test_sl_iec60730_test_clock_tick_test_clock_multiplier(void)
    +
    test_sl_iec60730_sys_clock_count_reset
    void test_sl_iec60730_sys_clock_count_reset(void)
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    sl_iec60730_test_result_t unit_test_mock_check_integrity (void)
     
    void test_sl_iec60730_vmc_init_param_null (void)
     
    void test_sl_iec60730_vmc_init_start_address_greater_than_end_address (void)
     
    void test_sl_iec60730_vmc_post_pass_all_check_sections (void)
     
    void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section (void)
     
    void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section (void)
     
    void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section (void)
     
    void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section (void)
     
    void test_sl_iec60730_vmc_bist_pass_all_check_sections (void)
     
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section (void)
     
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section (void)
     
    void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section (void)
     
    void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section (void)
     
    void test_sl_iec60730_vmc_bist_checking_allow_run_test (void)
     
    void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in variable memory module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_VARIABLE_MEMORY_H
    +
    35 #define UNIT_TEST_IEC60730_VARIABLE_MEMORY_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    47 extern sl_iec60730_test_result_t unit_test_mock_check_integrity(void);
    +
    48 
    +
    49 /**************************************************************************/
    +
    58 void test_sl_iec60730_vmc_init_param_null(void);
    +
    59 
    +
    60 /**************************************************************************/
    +
    69 void test_sl_iec60730_vmc_init_start_address_greater_than_end_address(void);
    +
    70 
    +
    71 /**************************************************************************/
    +
    81 void test_sl_iec60730_vmc_post_pass_all_check_sections(void);
    +
    82 
    +
    83 /**************************************************************************/
    +
    92 void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section(void);
    +
    93 
    +
    94 /**************************************************************************/
    +
    103 void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section(void);
    +
    104 
    +
    105 /**************************************************************************/
    +
    115 void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section(void);
    +
    116 
    +
    117 /**************************************************************************/
    +
    127 void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section(void);
    +
    128 
    +
    129 /**************************************************************************/
    +
    139 void test_sl_iec60730_vmc_bist_pass_all_check_sections(void);
    +
    140 
    +
    141 /**************************************************************************/
    +
    150 void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section(void);
    +
    151 
    +
    152 /**************************************************************************/
    +
    161 void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section(void);
    +
    162 
    +
    163 /**************************************************************************/
    +
    173 void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section(void);
    +
    174 
    +
    175 /**************************************************************************/
    +
    185 void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section(void);
    +
    186 
    +
    187 /**************************************************************************/
    +
    197 void test_sl_iec60730_vmc_bist_checking_allow_run_test(void);
    +
    198 
    +
    199 /**************************************************************************/
    +
    208 void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow(void);
    +
    209 
    +
    210 #endif // UNIT_TEST_IEC60730_VARIABLE_MEMORY_H
    +
    211 
    +
    +
    test_sl_iec60730_vmc_post_fail_marchc_check_backup_section
    void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section(void)
    +
    test_sl_iec60730_vmc_bist_pass_all_check_sections
    void test_sl_iec60730_vmc_bist_pass_all_check_sections(void)
    +
    test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section
    void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section(void)
    +
    test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section
    void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section(void)
    +
    test_sl_iec60730_vmc_post_fail_check_integrity_ram_section
    void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section(void)
    +
    test_sl_iec60730_vmc_init_start_address_greater_than_end_address
    void test_sl_iec60730_vmc_init_start_address_greater_than_end_address(void)
    +
    test_sl_iec60730_vmc_bist_fail_stack_test_over_flow
    void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow(void)
    +
    test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section(void)
    +
    test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section
    void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section(void)
    +
    test_sl_iec60730_vmc_post_fail_marchc_check_ram_section
    void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section(void)
    +
    sl_iec60730_test_result_t
    sl_iec60730_test_result_t
    The result of a test.
    Definition: sl_iec60730.h:72
    +
    test_sl_iec60730_vmc_post_fail_check_integrity_backup_section
    void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section(void)
    +
    test_sl_iec60730_vmc_post_pass_all_check_sections
    void test_sl_iec60730_vmc_post_pass_all_check_sections(void)
    +
    test_sl_iec60730_vmc_bist_checking_allow_run_test
    void test_sl_iec60730_vmc_bist_checking_allow_run_test(void)
    +
    test_sl_iec60730_vmc_init_param_null
    void test_sl_iec60730_vmc_init_param_null(void)
    +
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    void unit_test_iec60730_watchdog_set_up (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_por (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_em4 (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_wdog0 (void)
     
    bool unit_test_iec60730_watchdog_mock_rst_wdog1 (void)
     
    bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min (void)
     
    void unit_test_iec60730_watchdog_mock_rstcause_clear (void)
     
    uint32_t unit_test_iec60730_watchdog_mock_rstcause (void)
     
    void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog (void)
     
    void test_sl_iec60730_watchdog_post_wachdog_reset_before_por (void)
     
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success (void)
     
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail (void)
     
    void test_sl_iec60730_watchdog_post_reset_resason_no_valid (void)
     
    void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value (void)
     
    +

    Detailed Description

    +

    Unit tests for functions in watchdog module.

    +

    +License

    +

    Copyright 2024 Silicon Laboratories Inc. www.silabs.com

    +

    The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

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    1 /***************************************************************************/
    +
    18 /**************************************************************************/
    +
    34 #ifndef UNIT_TEST_IEC60730_WATCHDOG_H
    +
    35 #define UNIT_TEST_IEC60730_WATCHDOG_H
    +
    36 
    +
    37 /*======= External Functions =====*/
    +
    38 
    +
    39 /**************************************************************************/
    +
    46 void unit_test_iec60730_watchdog_set_up(void);
    +
    47 
    +
    48 /**************************************************************************/
    +
    55 bool unit_test_iec60730_watchdog_mock_rst_por(void);
    +
    56 
    +
    57 /**************************************************************************/
    +
    64 bool unit_test_iec60730_watchdog_mock_rst_em4(void);
    +
    65 
    +
    66 /**************************************************************************/
    +
    73 bool unit_test_iec60730_watchdog_mock_rst_wdog0(void);
    +
    74 
    +
    75 /**************************************************************************/
    +
    82 bool unit_test_iec60730_watchdog_mock_rst_wdog1(void);
    +
    83 
    +
    84 /**************************************************************************/
    +
    91 bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min(void);
    +
    92 
    +
    93 /**************************************************************************/
    +
    100 void unit_test_iec60730_watchdog_mock_rstcause_clear(void);
    +
    101 
    +
    102 /**************************************************************************/
    +
    109 uint32_t unit_test_iec60730_watchdog_mock_rstcause(void);
    +
    110 
    +
    111 /**************************************************************************/
    +
    120 void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog(void);
    +
    121 
    +
    122 /**************************************************************************/
    +
    131 void test_sl_iec60730_watchdog_post_wachdog_reset_before_por(void);
    +
    132 
    +
    133 /**************************************************************************/
    +
    146 void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success(void);
    +
    147 
    +
    148 /**************************************************************************/
    +
    159 void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail(void);
    +
    160 
    +
    161 /**************************************************************************/
    +
    174 void test_sl_iec60730_watchdog_post_reset_resason_no_valid(void);
    +
    175 
    +
    176 /**************************************************************************/
    +
    188 void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value(void);
    +
    189 
    +
    190 #endif // UNIT_TEST_IEC60730_WATCHDOG_H
    +
    191 
    +
    +
    unit_test_iec60730_watchdog_mock_rst_wdog0
    bool unit_test_iec60730_watchdog_mock_rst_wdog0(void)
    +
    unit_test_iec60730_watchdog_mock_rstcause_clear
    void unit_test_iec60730_watchdog_mock_rstcause_clear(void)
    +
    test_sl_iec60730_watchdog_post_wachdog_reset_before_por
    void test_sl_iec60730_watchdog_post_wachdog_reset_before_por(void)
    +
    unit_test_iec60730_watchdog_set_up
    void unit_test_iec60730_watchdog_set_up(void)
    +
    unit_test_iec60730_watchdog_mock_rstcause
    uint32_t unit_test_iec60730_watchdog_mock_rstcause(void)
    +
    unit_test_iec60730_watchdog_mock_rst_em4
    bool unit_test_iec60730_watchdog_mock_rst_em4(void)
    +
    test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value
    void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value(void)
    +
    test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog
    void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog(void)
    +
    test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail(void)
    +
    unit_test_iec60730_watchdog_mock_rst_por
    bool unit_test_iec60730_watchdog_mock_rst_por(void)
    +
    test_sl_iec60730_watchdog_post_reset_resason_no_valid
    void test_sl_iec60730_watchdog_post_reset_resason_no_valid(void)
    +
    test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success
    void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success(void)
    +
    unit_test_iec60730_watchdog_mock_rst_wdog1
    bool unit_test_iec60730_watchdog_mock_rst_wdog1(void)
    +
    unit_test_iec60730_watchdog_mock_set_watchdog_timout_min
    bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min(void)
    + +
    +Generated by   +doxygen + 1.8.17 +
    + + diff --git a/site/document_api_iec60730_library/variable_memory_check_bist_flowchart.png b/site/document_api_iec60730_library/variable_memory_check_bist_flowchart.png new file mode 100644 index 00000000..e1b380c1 Binary files /dev/null and b/site/document_api_iec60730_library/variable_memory_check_bist_flowchart.png differ diff --git a/site/document_api_iec60730_library/variable_memory_check_example_flowchart.png b/site/document_api_iec60730_library/variable_memory_check_example_flowchart.png new file mode 100644 index 00000000..3f951c1c Binary files /dev/null and b/site/document_api_iec60730_library/variable_memory_check_example_flowchart.png differ diff --git a/site/document_api_iec60730_library/variable_memory_check_post_flowchart.png b/site/document_api_iec60730_library/variable_memory_check_post_flowchart.png new file mode 100644 index 00000000..c5826c00 Binary files /dev/null and b/site/document_api_iec60730_library/variable_memory_check_post_flowchart.png differ diff --git a/site/document_api_iec60730_library/watchdog_flowchart.png b/site/document_api_iec60730_library/watchdog_flowchart.png new file mode 100644 index 00000000..5810dcc8 Binary files /dev/null and b/site/document_api_iec60730_library/watchdog_flowchart.png differ diff --git a/site/guideline_for_running_integration_test.html b/site/guideline_for_running_integration_test.html new file mode 100644 index 00000000..4b7d65ed --- /dev/null +++ b/site/guideline_for_running_integration_test.html @@ -0,0 +1,897 @@ + + + + + + + + + + + + + + + + + + + + + + + Guideline for running integration test - IEC60730 Safety Library + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + +
    + + + + + + +
    + + +
    + +
    + + + + + + +
    +
    + + + +
    +
    +
    + + + + + +
    +
    +
    + + + +
    +
    +
    + + + +
    +
    +
    + + + +
    +
    + + + + +

    Guideline for running integration test

    +

    Export Variable

    +
    +

    [!NOTE] +Before running CMake, you need to export some variables first.

    +
    +

    Export SDK_PATH=, TOOL_DIRS=, TOOL_CHAINS, FLASH_REGIONS_TEST (flash start address support calculate CRC for module invariable memory), JLINK_PATH and path to slc-cli tool a before run config CMake.

    +

    If you want to calculate from the start address to the end address of Flash:

    +
    $ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk
+$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin
+$ export TOOL_CHAINS=GCC
+$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so
+$ export PATH=$PATH:/media/slc_cli/slc_cli_linux_check/slc_cli
+$ export FLASH_REGIONS_TEST=0x8000000
+
    +

    Or if you want to calculate multiple regions:

    +
    $ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190"
+
    +

    with FLASH_REGIONS_TEST=0x8000000 is the flash start address of board name brd4187c (chip EFR32MG24)

    +

    To run integration tests manually, for the watchdog module, you need to connect the device to ethernet. Export CHIP, ADAPTER_SN, LST_PATH, JLINK_PATH, and the device's IP address and run the test script, for example:

    +
    $ export CHIP=EFR32MG24BXXXF1536 ADAPTER_SN=440111030
+$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/S
+
    +

    If test secure peripherals or non-secure peripherals:

    +
    $ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/NS
+
    +
    $ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so
+$ export HOST_IP=192.168.1.69
+
    +
    +

    [!NOTE] +Environment variables need to be exported during test execution:

    +
    +

    export TOOL_CHAINS= (IAR or GCC)

    +

    export TOOL_DIRS=

    +

    export FLASH_REGIONS_TEST=

    +

    export HOST_IP=

    +

    export JLINK_PATH=

    +
    +
    +

    Build test for IAR tool

    +

    To build tests for the IAR tool, if you run a manual test, you must run the pre-build command below.

    +
    $ make prepare
+$ cd build
+$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=${BOARD_NAME} $OPTION_PRE_BUILD_IAR_TOOL
+$ cd ..
+$ make prepare
+
    +
    +

    [!NOTE] +Keep $OPTION_PRE_BUILD_IAR_TOOL the same when running the integration test CMake config

    +
    +

    For example, build integration test:

    +
    $ make prepare
+$ cd build
+$ cmake --toolchain ../cmake/toolchain.cmake ..  -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=brd4187c -DINTEGRATION_TEST_WDOG1_ENABLE=ON  -DENABLE_INTEGRATION_TESTING=ON -DINTEGRATION_TEST_USE_MARCHX_DISABLE=ON -DENABLE_CRC_USE_SW=ON -DENABLE_CAL_CRC_32=ON
+$ cd ..
+$ make prepare
+
    +

    or you can run bash script pre_build_iar.sh in path ./../simplicity_sdk/pre_build_iar.sh with:

    +
      +
    • $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48
      • +
    • $2: OPTION_INTEGRATION_TEST: -DENABLE_INTEGRATION_TESTING=ON, etc...
      • +
    +
    $ bash pre_build_iar.sh $BOARD_NAME $OPTION_INTEGRATION_TEST
+
    +

    For example:

    +
    $ bash pre_build_iar.sh brd4187c "-DENABLE_INTEGRATION_TESTING=ON"
+
    +

    Manually run integration tests

    +

    CMake config

    +
    $ make prepare
+$ cd build
+$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DBOARD_NAME=brd4187c
+
    +

    CMake Build

    +
    $ cmake --build . --target integration_test_info -j4
+
    +

    or

    +
    $ make integration_test_info -j4
+
    +

    To support running integration tests for the watchdog module, there are 2 options when running the CMake config:

    +
      +
    • +

      TEST_SECURE_PERIPHERALS_ENABLE: enable test secure peripherals

      +
      • +
    • +

      INTEGRATION_TEST_WDOG1_ENABLE: enable watchdog 1 to test if the device supports

      +
      • +
    +

    To support running integration tests for the variable memory module, there is 1 option when running CMake config:

    +
      +
    • INTEGRATION_TEST_USE_MARCHX_DISABLE: disable using MarchX algorithm
      • +
    +

    By default when testing the variable memory module, enable using the MarchX algorithm. For example:

    +
    $ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DINTEGRATION_TEST_USE_MARCHX_DISABLE=ON -DBOARD_NAME=brd4187c
+
    +

    For devices that have a Trust zone implemented, secure and non-secure peripherals need to be tested. +Default enable checks non-secure peripherals. To check secure peripherals enable this option when running CMake config: TEST_SECURE_PERIPHERALS_ENABLE. For example:

    +
    $ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DTEST_SECURE_PERIPHERALS_ENABLE=ON -DBOARD_NAME=brd4187c
+
    +

    For devices that support 2 watchdogs, if you want to test both watchdogs, enable option INTEGRATION_TEST_WDOG1_ENABLE to ON when running Cmake config:

    +
    $ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON -DBOARD_NAME=brd4187c
+
    +

    To run integration tests for the watchdog module you need to connect the device to ethernet. Export CHIP, ADAPTER_SN, LST_PATH, JLINK_PATH, and the device's IP address and run the test script, for example:

    +
    $ export CHIP=EFR32MG24BXXXF1536 ADAPTER_SN=440111030
+$ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/S
+
    +

    If test secure peripherals or non-secure peripherals:

    +
    $ export LST_PATH=~/devs_safety_lib/build/test/integration_test/build/brd4187c/integration_test_iec60730_watchdog/NS
+
    +
    $ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so
+$ export HOST_IP=192.168.1.69
+
    +
    $ python3 integration_test_iec60730_irq.py GCC
+
    +

    By default, the device enables watchdog 0 and test watchdog 0. If you want to test Watchdog 1 use this command:

    +
    $ INTEGRATION_TEST_WDOG1_ENABLE=enable python3 integration_test_iec60730_watchdog.py GCC
+
    +

    If you want to test the variable memory module with disable using the MarchX algorithm:

    +
    $ INTEGRATION_TEST_USE_MARCHX_DISABLE=disable python3 integration_test_iec60730_variable_memory.py GCC
+
    +

    If you want to test the invariable memory module with calculate crc32:

    +
    $ INTEGRATION_TEST_ENABLE_CAL_CRC_32=enable python3 integration_test_iec60730_variable_memory.py GCC
+
    +

    Automatically run integration tests

    +

    Command run

    +
    bash execute_test.sh $1 $2 $3 $4 $5 $6
+
    +

    With the input arguments, there is the following information.

    +
      +
    • $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48
      • +
    • $2: task: all, gen-only, run-only
      • +
    • $3: components: all, unit_test_iec60730_bist, unit_test_iec60730_post, ...
      • +
    • $4: ADAPTER_SN
      • +
    • $5: compiler: GCC, IAR
      • +
    • $6: OPTION_SUPPORT_INTEGRATION_TEST: "-DENABLE_CAL_CRC_32=ON -DENABLE_CRC_USE_SW=ON -DTEST_SECURE_PERIPHERALS_ENABLE=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON - INTEGRATION_TEST_USE_MARCHX_DISABLE=ON"
      • +
    +

    Which, components list that support testing includes:

    +
      +
    • +

      integration_test_iec60730_program_counter

      +
      • +
    • +

      integration_test_iec60730_irq

      +
      • +
    • +

      integration_test_iec60730_system_clock

      +
      • +
    • +

      integration_test_iec60730_watchdog

      +
      • +
    • +

      integration_test_iec60730_cpu_registers

      +
      • +
    • +

      integration_test_iec60730_variable_memory

      +
      • +
    • +

      integration_test_iec60730_invariable_memory

      +
      • +
    +

    Before running the bash file, you need to install Jlink, Srecord, and slc tool, refer Overview to set up some environment variables as follows: +If the compiler is GCC +- If the compiler is GCC:

    +

    If you want to calculate from the start address to the end address of Flash:

    +
    $ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk
+$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin
+$ export TOOL_CHAINS=GCC
+$ export FLASH_REGIONS_TEST=0x8000000
+$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so
+$ export HOST_IP=192.168.1.69
+
    +

    Or if you want to calculate multiple regions:

    +
    $ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190"
+
    +
    +

    [!NOTE] +In the current integration test file, only enable computation of one region: from the start address of ​​the flash to the end of the flash. Therefore, export the flash's starting address. For example, chip EFR32MG24:

    +
    +

    $ export FLASH_REGIONS_TEST=0x8000000

    +
    +
    +

    Example

    +
      +
    • With GCC toolchain:
      • +
    +
    bash execute_integration_test.sh brd4187c all all 440111030 GCC
+
    +
      +
    • With IAR toolchain:
      • +
    +
    bash execute_integration_test.sh brd4187c all all 440111030 IAR
+
    +

    Note:

    +

    In case you want to build CRC32 run this command. For example:

    +
    bash execute_integration_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON"
+
    +

    Or case you want to use the above integration test support options, run this command. For example:

    +
    bash execute_integration_test.sh brd4187c all all 440111030 GCC "-DTEST_SECURE_PERIPHERALS_ENABLE=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON -DINTEGRATION_TEST_USE_MARCHX_DISABLE=ON -DENABLE_CAL_CRC_32=ON"
+
    +

    CRC calculation options

    +

    When running build CMake to run unit tests and integration tests for invariable memory modules, the CRC calculation image file will have the suffix _crc16 or _crc32, you must flash the image file with this suffix.

    +

    With the commands above, the default value supports the calculation CRC-16. If you want to change to calculate for CRC-32 bits, use the CMake config command below:

    +
      +
    • With integration test:
      • +
    +

    by manually

    +
    $ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DBOARD_NAME=brd4187c -DENABLE_CAL_CRC_32=ON
+
    +

    or by automatically

    +
    bash execute_integration_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON"
+
    +

    Here are some options to support running tests of invariable memory modules:

    +
      +
    • +

      ENABLE_CAL_CRC_32

      +
      • +
    • +

      ENABLE_CRC_USE_SW (if this option is ON, you can enable option: ENABLE_SW_CRC_TABLE for using the pre-defined table for calculating or not)

      +
      • +
    +
    +

    [!NOTE] +Only use the ENABLE_SW_CRC_TABLE option when the ENABLE_CRC_USE_SW option is ON, otherwise, an error will be reported during the build process.

    +
    + + + + + + + + + + + + + +
    +
    + + + +
    + +
    + + + +
    +
    +
    +
    + + + + + + + + + + \ No newline at end of file diff --git a/site/guideline_for_running_unit_test.html b/site/guideline_for_running_unit_test.html new file mode 100644 index 00000000..b039c7e0 --- /dev/null +++ b/site/guideline_for_running_unit_test.html @@ -0,0 +1,815 @@ + + + + + + + + + + + + + + + + + + + + + + + Guideline for running unit test - IEC60730 Safety Library + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + +
    + + + + + + +
    + + +
    + +
    + + + + + + +
    +
    + + + +
    +
    +
    + + + + + +
    +
    +
    + + + +
    +
    +
    + + + +
    +
    +
    + + + +
    +
    + + + + +

    Guideline for running unit test

    +

    Export Variable

    +
    +

    [!NOTE] +Before running CMake, you need to export some variables first.

    +
    +

    Export SDK_PATH=, TOOL_DIRS=, TOOL_CHAINS, FLASH_REGIONS_TEST (flash start address support calculate CRC for module invariable memory), JLINK_PATH and path to slc-cli tool a before run config CMake.

    +

    If you want to calculate from the start address to the end address of Flash:

    +
    $ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk
+$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin
+$ export TOOL_CHAINS=GCC
+$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so
+$ export PATH=$PATH:/media/slc_cli/slc_cli_linux_check/slc_cli
+$ export FLASH_REGIONS_TEST=0x8000000
+
    +

    Or if you want to calculate multiple regions:

    +
    $ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190"
+
    +

    with FLASH_REGIONS_TEST=0x8000000 is the flash start address of board name brd4187c (chip EFR32MG24)

    +

    Build test for IAR tool

    +

    To build tests for the IAR tool, if you run a manual test, you must run the pre-build command below.

    +
    $ make prepare
+$ cd build
+$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=${BOARD_NAME} $OPTION_PRE_BUILD_IAR_TOOL
+$ cd ..
+$ make prepare
+
    +
    +

    [!NOTE] +Keep $OPTION_PRE_BUILD_IAR_TOOL the same when running unit test CMake config

    +
    +

    For example, build unit test:

    +
    $ make prepare
+$ cd build
+$ cmake --toolchain ../cmake/toolchain.cmake .. -DPRE_BUILD_IAR_TOOL=ON -DBOARD_NAME=brd4187c -DENABLE_UNIT_TESTING=ON -DENABLE_CRC_USE_SW=ON -DENABLE_CAL_CRC_32=ON
+$ cd ..
+$ make prepare
+
    +

    or you can run bash script pre_build_iar.sh in path ./../simplicity_sdk/pre_build_iar.sh with:

    +
      +
    • $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48
      • +
    • $2: OPTION_UNIT_TEST: -DENABLE_UNIT_TESTING=ON, etc...
      • +
    +
    $ bash pre_build_iar.sh $BOARD_NAME $OPTION_UNIT_TEST
+
    +

    For example:

    +
    $ bash pre_build_iar.sh brd4187c "-DENABLE_UNIT_TESTING=ON"
+
    +

    Manually run unit tests

    +

    CMake config

    +
    $ make prepare
+$ cd build
+$ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_UNIT_TESTING=ON -DBOARD_NAME=brd4187c
+
    +

    CMake Build

    +
    $ cmake --build . --target unit_test_info -j4
+
    +

    or

    +
    $ make unit_test_info -j4
+
    +

    Automatically run unit tests

    +

    Command run

    +
    bash execute_test.sh $1 $2 $3 $4 $5 $6
+
    +

    With the input arguments, there is the following information.

    +
      +
    • $1: BOARD_NAME: brd4187c or EFR32MG24B220F1536IM48
      • +
    • $2: task: all, gen-only, run-only
      • +
    • $3: components: all, unit_test_iec60730_bist, unit_test_iec60730_post, ...
      • +
    • $4: ADAPTER_SN
      • +
    • $5: compiler: GCC, IAR
      • +
    • $6: OPTION_SUPPORT_UNIT_TEST: "-DENABLE_CAL_CRC_32=ON -DENABLE_CRC_USE_SW"
      • +
    +

    Which, components list that supports unit testing includes:

    +
      +
    • +

      unit_test_iec60730_post

      +
      • +
    • +

      unit_test_iec60730_bist

      +
      • +
    • +

      unit_test_iec60730_program_counter

      +
      • +
    • +

      unit_test_iec60730_safety_check

      +
      • +
    • +

      unit_test_iec60730_irq

      +
      • +
    • +

      unit_test_iec60730_system_clock

      +
      • +
    • +

      unit_test_iec60730_watchdog

      +
      • +
    • +

      unit_test_iec60730_cpu_registers

      +
      • +
    • +

      unit_test_iec60730_variable_memory

      +
      • +
    • +

      unit_test_iec60730_invariable_memory

      +
      • +
    +

    Before running the bash file, you need to install Jlink, Srecord, and slc tool, refer Overview to set up some environment variables as follows: +If the compiler is GCC +- If the compiler is GCC:

    +

    If you want to calculate from the start address to the end address of Flash:

    +
    $ export SDK_PATH=~/SimplicityStudio/SDKs/gecko_sdk
+$ export TOOL_DIRS=~/Downloads/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/bin
+$ export TOOL_CHAINS=GCC
+$ export FLASH_REGIONS_TEST=0x8000000
+$ export JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so
+
    +

    Or if you want to calculate multiple regions:

    +
    $ export FLASH_REGIONS_TEST="0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190"
+
    +
    +

    [!NOTE] +In the current unit test file, only enable computation in one region: from the start address of ​​the flash to the end of the flash. Therefore, just export the flash's starting address. For example, chip EFR32MG24:

    +
    +

    $ export FLASH_REGIONS_TEST=0x8000000

    +
    +
    +

    Example

    +
      +
    • With GCC toolchain:
      • +
    +
    bash execute_unit_test.sh brd4187c all all 440111030 GCC
+
    +
      +
    • With IAR toolchain:
      • +
    +
    bash execute_unit_test.sh brd4187c all all 440111030 IAR
+
    +

    CRC calculation options

    +

    When running build CMake to run unit tests and integration tests for invariable memory modules, the CRC calculation image file will have the suffix _crc16 or _crc32, you must flash the image file with this suffix.

    +

    With the commands above, the default value supports the calculation CRC-16. If you want to change to calculate for CRC-32 bits, use the CMake config command below:

    +
      +
    • With unit test:
      • +
    +

    by manually

    +
    $ cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_UNIT_TESTING=ON -DBOARD_NAME=brd4187c -DENABLE_CAL_CRC_32=ON
+
    +

    or by automatically

    +
    bash execute_unit_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON"
+
    +

    Here are some options to support running tests of invariable memory modules:

    +
      +
    • +

      ENABLE_CAL_CRC_32

      +
      • +
    • +

      ENABLE_CRC_USE_SW (if this option is ON, you can enable option: ENABLE_SW_CRC_TABLE for using the pre-defined table for calculating or not)

      +
      • +
    +
    +

    [!NOTE] +Only use the ENABLE_SW_CRC_TABLE option when the ENABLE_CRC_USE_SW option is ON, otherwise, an error will be reported during the build process.

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    + + + + +

    User Guide: The Library IEC60730 Integration

    +

    This document provides instructions for integrating the Library IEC60730 into a project.

    +

    This will guide the developer to install the required software. Then guide the configuration of a project and integrate the source code into the project.

    +

    Key Features

    +

    Silicon Labs

    +

    SILICON LABS

    +

    Contents

    +

    Contents

    +

    Table of pictures

    +

    1. Background

    +

    2. Install the required software

    +

    3. Add an extension to Simplicity Studio

    +

    4. Generate an example project

    +

    5. Edit the Linker file

    +

    6. Edit the post-build steps

    +

    7. Edit the included path and preprocessor

    +

    8. Add the source code to the project

    +

    9. Integrate code into the project

    +

    10. Revision history

    +

    Table of pictures

    +

    Figure 1 Adding Extension to SDK

    +

    Figure 2 Browse to extension location

    +

    Figure 3 Create new project

    +

    Figure 4 Target, SDK, and Toolchain Selection

    +

    Figure 5 Add toolchains

    +

    Figure 6 IAR toolchain

    +

    Figure 7 Example Project Selection

    +

    Figure 8 Project Configuration

    +

    Figure 9 Project generation in workspace

    +

    Figure 10 Build Project

    +

    Figure 11 Edit the Linker Script Path

    +

    Figure 12 CRC-16 and CRC-32 script

    +

    Figure 13 Add the Command to Post-build steps

    +

    Figure 14 Result after Post-build complete

    +

    Figure 15 Add the included path and preprocessor

    +

    Figure 16 Components support library IEC60730

    +

    Figure 17 Add source code library IEC60730

    +

    Figure 18 Assembly code algorithm MARCHC for GCC compiler

    +

    Figure 19 Flow chart of the library IEC60730

    +

    Figure 20 Demo OEM files integrated with Library IEC60730

    +

    Figure 21 IAR define check_sum variable

    +

    Figure 22 Configuration for watchdog module

    +

    Figure 23 Configuration for system clock module

    +

    1. Background

    +

    The IEC60730 is a safety standard used in household applications. It defines the test and diagnostic method that ensures the safe operation of devices. We provide the test of the following components: CPU registers, variable memory check, invariable memory check, program counter check, clock check, and interrupt check.

    +

    At the time of this writing, the library IEC60730 has been tested on two devices EFR32xG12, and EFR32xG24 on Simplicity Studio 5 (SS5)with toolchain GNU ARM v12.2.1 and SDK version 4.4.2.

    +

    2. Install the required software.

    +

    We use the third-party software SRecord to calculate CRC value. Firstly, you need to install this software. If you're using Windows OS, you can go to the link of this software (link above), download the installation, and run the installer to install. If you're using Ubuntu OS, please follow the installation instructions below.

    +
    $ sudo apt update
+$ sudo apt install srecord
+
    +

    3. Add an extension to Simplicity Studio

    +

    The safety library IEC60730 is supported by adding the IEC60730 extension, which is built using the software environment.:

    +
      +
    • +

      OS-Ubuntu 20.04

      +
      • +
    • +

      Simplicity Studio 5

      +
      • +
    +

    This project is organized as an extension of Simplicity Studio. This project is built upon GSDK version 4.4.2, GNU toolchain V12.2.1. The user can download the same version of GSDK from GitHub GSDK and Simplicity Studio V5 download link Simplicity Studio V5.

    +

    To create and build demo projects, the user must add the IEC60730 extension to Simplicity Studio. The procedure would be Window > Preferences > Simplicity Studio > SDKs > Gecko SDK Suite v4.4.2 > Add Extension.

    +

    Figure 1 Adding Extension to SDK

    +
    Figure 1 Adding Extension to SDK
    +

    Press Browse to find the directory of this extension. Then choose the folder that has the file name iec60730.slce. Simplicity Studio will detect SDK extensions automatically. Click OK then Apply and Close

    +

    Figure 2 Browse to extension location

    +
    Figure 2 Browse to extension location
    +

    4. Generate an example project.

    +

    Before using Simplicity Studio to generate the project, you need to add the IEC60730 extension. Please remember the following text:

    +
    +

    "This extension supports a demo example for EFR32MG families"

    +
    +

    Start a Project. Select Files > New > Project to open the New Project Wizards dialog. Choose Silicon Labs Project Wizard > Finish.

    +

    Figure 3 Create new project

    +
    Figure 3 Create new project
    +

    To create a new Simplicity Studio® 5 (SSv5) project, follow these three dialog steps:

    +
      +
    • +

      Target, SDK, and Toolchain

      +
      • +
    • +

      Examples

      +
      • +
    • +

      Configuration

      +
      • +
    +

    An indicator at the top of the dialog will show you your current position in the process. You can click Back at any time to return to a previous dialog if you need to make changes.

    +

    For the radio board, in the Target, SDK, and Toolchain Selection dialog, if you have connected to or selected a target, all relevant information will be pre-populated. If no target is selected, you can choose the target parts here. For example, you can select EFR32MG12 2.4GHz 10 dBm Radio Board (Rev A02) in the Target Boards section, with the Target Device set to EFR32MG12P332F1024GL125 as shown in the image below.

    +

    Figure 4 Target, SDK, and Toolchain Selection

    +
    Figure 4 Target, SDK, and Toolchain Selection
    +

    Next, choose the SDK you installed, such as Gecko SDK v4.4.2. For the IDE/Toolchain select the toolchain version, such as GNU ARM v12.2.1. Finally, click NEXT.

    +

    If you have installed the IAR toolchain and want to use it to build the demo project. For adding the IAR toolchain in Simplicity Studio: Preferences > Toolchains > Add > Browse go to the folder containing the toolchain then click OK > Apply and Close

    +

    Figure 5 Add toolchains

    +
    Figure 5 Add toolchains
    +

    After you add your IAR toolchains, in the selection IDE/Toolchain choose toolchain IAR ARM vn.n.n.n. For example,Simplicity IDE/IAR ARM v9.20.4.327.

    +

    Figure 6 IAR toolchain

    +
    Figure 6 IAR toolchain
    +

    In Example Project Selection, use the checkboxes or keywords to find the example of interest. To create a radio board example IEC60730 Demo, search the keyword iec60730 in the search box, related examples will show. Choose IEC60730 Example Demo. Click NEXT

    +

    Figure 7 Example Project Selection

    +
    Figure 7 Example Project Selection
    +

    In Project Configuration Selection, rename and location your project if you want. For the three selections under With project files, you can choose any of the selections you want.

    +

    Figure 8 Project Configuration

    +
    Figure 8 Project Configuration
    +

    Once you finish project creation, the Simplicity IDE perspective opens. There may be a slight delay in the initial configuration.

    +

    The project typically opens README tab, which contains an example project description, and OVERVIEW tab.

    +

    Figure 9 Project generation in workspace

    +
    Figure 9 Project generation in workspace
    +

    For the building project, choose the project you want to build and click on the icon hammer to build, or click the right mouse and choose Build Project.

    +

    Figure 10 Build Project

    +
    Figure 10 Build Project
    +

    5. Edit the Linker file.

    +

    We will base on the example extension project above and edit this project to a new linker file that meets the requirements of the library IEC60730.

    +

    Some points for editing the linker file are described in IEC 60730's document. You can refer to the modified linker file in our demo example by checking sections 3 and 4 to create our demo. In our demo, the path to the linker file is automated and set to our linker. You should copy the linker file to another location on your PC and start editing it.

    +

    After editing the linker file, you need to edit the path pointing to this new linker file. Figure 11 Edit the Linker Script Path shows how to edit the Linker Script Path in Simplicity Studio.

    +

    You SHOULD follow these steps: C/C++Build > Settings > Tool Settings > Memory Layout > Browse.

    +

    Figure 11 Edit the Linker Script Path

    +
    Figure 11 Edit the Linker Script Path
    +

    6. Edit the post-build steps.

    +

    By default, after building the project, files in *.bin, *.hex, and *.s37 formats will be created. If you want to create another format, you SHOULD follow these steps: C/C++Build  >  Settings  >  Build Steps  > Post-build steps > Command.

    +

    In this context, we need to modify the command in the Post-build steps to generate new firmware files with a CRC value appended at the end of the FLASH area. Currently, we support two scripts that calculate CRC16 and CRC32, which can be executed on PCs running Windows or Ubuntu OS. You can find these scripts in the lib/crc folder.

    +

    Figure 12 CRC-16 and CRC-32 scripts

    +
    Figure 12 CRC-16 and CRC-32 scripts
    +

    The scripts have suffixes of _crc16 and _crc32 respectively. We will use the suffix _crcNN for both cases.

    +

    Detailed parameters of the sl_iec60730_cal_crcNN script can refer to can refer to the document Support calculate CRC. In our example, two script files supporting CRC-16 and CRC-32 are automatically copied into the project. For a demo example, you can use this command below to calculate the CRC value for file build *.bin, *.hex, and *.s37 and file *.lst with GCC toolchain :

    +
    $ arm-none-eabi-objdump -t -h -d -S '${BuildArtifactFileBaseName}.axf' >'${BuildArtifactFileBaseName}.lst' && bash ${ProjDirPath}/iec60730_1.1.0/lib/crc/sl_iec60730_cal_crc16.sh ${BuildArtifactFileBaseName} "" "C:\srecord\bin" GCC "0x8000000"
+
    +

    Figure 13 Add the Command to Post-build steps

    +
    Figure 13 Add the Command to Post-build steps
    +

    Or with IAR toolchains:

    +
    ielfdumparm --all --source ${BuildArtifactFileBaseName}.out > ${BuildArtifactFileBaseName}.lst && bash ${ProjDirPath}/iec60730_1.1.0/lib/crc/sl_iec60730_cal_crc16.sh ${BuildArtifactFileBaseName} "" "C:\srecord\bin" IAR "0x8000000"
+
    +
    +

    [!NOTE] +In the default configuration, SL_IEC60730_CRC_DEBUG_ENABLE support debugging the CRC test module invariable memory +calculations on demo project is enabled. If you want to disable this configuration, you should copy either sl_iec60730_cal_crc32.sh or +sl_iec60730_cal_crc16.sh in the path: lib/crc/ which helps a CRC-calculated image file for testing. +You must flash the image with the corresponding image file suffixes _crc16 and _crc32.

    +

    If, during the project configuration step, you choose an option in the With Project File section either Link to SDK and Copy Project Structures or Link to Source, +you will need to copy sl_iec60730_cal_crc32.sh or sl_iec60730_cal_crc16.sh to lib/crc folder of your current project directory.

    +

    After the build of a project is complete, it will call the command in the Post-build steps to create _crc16 or _crc32 files with the extension *.bin, *.hex, and *.s37.

    +
    +

    Figure 14 Result after Post-build complete

    +
    Figure 14 Result after Post-build complete
    +

    7. Edit the included path and preprocessor.

    +

    Edit the Include paths (-l) to the location of the source code of the Library IEC60730.

    +

    You SHOULD follow these steps: C/C++Build > Settings > Tool Settings > GNU ARM C Compiler choose Include or Preprocessor for include header files and add definitions to your project.

    +

    Figure 15 Add the included path and preprocessor

    +
    Figure 15 Add the included path and preprocessor
    +

    Edit preprocessor, the user needs definitions as below.

    +
      +
    • SL_IEC60730_BOARD_HEADER="sl_iec60730_board.h"
      • +
    +

    By default, the demo example has the definitions above. You can refer to our demo example of these settings.

    +

    8. Add the source code to the project.

    +

    In our example, after adding the SDK extension, the software component will have a few components that support adding code files (*.c, *. s) of Library IEC60730 to the project:

    +

    Figure 16 Components support library IEC60730

    +
    Figure 16 Components support library IEC60730
    +

    When you install these components, the source code library IEC60730 will be added. For example:

    +

    Figure 17 Add source code library IEC60730

    +
    Figure 17 Add source code library IEC60730
    +

    Component IEC60730 VMC MarchC(see Figure 16) support for adding assembly code algorithm MarchC and MarchXC. If you use the IAR compiler, this component will add to assembly files sl_iec60730_vmc_marchc_iar.S and sl_iec60730_vmc_marchxc_iar.S. If you use the GCC compiler, this component will add sl_iec60730_vmc_marchc.S and sl_iec60730_vmc_marchxc.S for the test VMC module.

    +

    Figure 18 Assembly code algorithm MARCHC for GCC compiler

    +
    Figure 18 Assembly code algorithm MARCHC for GCC compiler
    +

    9. Integrate code into the project.

    +

    The library IEC60730 has been divided into 2 main test phases: Power on Self-Test (POST) and Build In Self-Test (BIST). Figure 19 Flow chart of the library IEC60730 shows the basics of the library IEC60730 integration into a user software solution.

    +

    Figure 19 Flow chart of the library IEC60730

    +
    Figure 19 Flow chart of the library IEC60730
    +

    In our example, we have added a demo oem foler (Original equipment manufacturer) to integrate with the library IEC60730 to test steps such as flow charts fully.

    +

    Figure 20 Demo OEM files integrated with Library IEC60730

    +
    Figure 20 Demo OEM files integrated with Library IEC60730
    +

    If you want to add your OEM code and don't want to use our OEM files demo, you COULD add your OEM code via the following steps below:

    +

    1. Requires declaration and initialize variables for IEC60730 library with constant values. Refer function oem_iec60730_init in file oem_iec60730.c.

    +
    sl_iec60730_vmc_test_multiple_regions_t oem_vmc_test;
+sl_iec60730_imc_test_multiple_regions_t oem_imc_test __CLASSB_RAM;
+sl_iec60730_irq_cfg_t oem_irq_config;
+
    +

    These three variables are used for interrupt, invariable memory check and variable memory check.

    +

    2. To perform an invariable memory check, the library uses CRC (Cyclic Redundancy Check) calculations for Flash memory. If the user calculates using hardware, the user will need to initialize the GPCRC module to support the calculation. Users can also enable #define SL_IEC60730_CRC_USE_SW_ENABLE for software calculation. To calculate the CRC value, It will have two options:

    +
      +
    • +

      Start from the user's specified address and continue to the end of the Flash region.

      +
      • +
    • +

      Calculate multiple regions by providing the starting and ending addresses for each one. For additional details, refer to the file oem_iec60730.c.

      +
      • +
    +

    And then store the calculated CRC value in the designated end-flash variable. Currently, the check_sum variable is set to the end address of the user code that utilizes the IEC Library.

    +

    In the case of the GCC toolchain, the check_sum variable is defined in the linker file. For the IAR toolchain, you can find it in the demo example. Right-click on the project and navigate to Properties > C/C++ Build > Settings > IAR Linker for ARM. In the Extra Options section, you can add the option for CRC_16.

    +
    --keep check_sum --place_holder check_sum,2,.checksum,64
+
    +

    Or for CRC_32:

    +
    --keep check_sum --place_holder check_sum,4,.checksum,64
+
    +

    By default, the demo project uses option CRC_16

    +

    Figure 21 IAR define checksum variable

    +
    Figure 21 IAR define checksum variable
    +

    3. Configure Watchdog Test: this configuration determines which watchdog unit will be checked.The library does not initialize the watchdog units, the user should do the initialization. We support configuration for watchdog module

    +

    Figure 22 Configuration for watchdog module

    +
    Figure 22 Configuration for watchdog module
    +

    The two define used to enable watchdog testing are used in the application:

    +
    #define SL_IEC60730_WDOG0_ENABLE
+#define SL_IEC60730_WDOG1_ENABL
+
    +

    If these macros are not enabled, it will show an error saying watchdog checking is not enabled.

    +
      +
    • +

      To clear reset cause flags in the RSTCASUES register after watchdog testing is completed. Enable configuration of the definition of macro #define SL_IEC60730_RSTCAUSES_CLEAR_ENABLE. In our demo, this feature is enabled.

      +
      • +
    • +

      The static variable iec60730_watchdog_count must be located at a memory location that is not cleared when system startup (section".ram_no_clear").

      +
      • +
    • +

      The global variable iec60730_watchdog_state must be located at a memory location that is not cleared when system startup (section ".ram_no_clear"). To enable saving iec60730_watchdog_state to backup RAM on Series 2, enable the macro #define SL_IEC60730_SAVE_STAGE_ENABLE. By default, it will be disabled.Define macro SL_IEC60730_BURAM_IDX to select which register of the BURAM will be used. The default value is 0x0UL.

      +
      • +
    +

    4. Before calling the sl_iec60730_post function,we need to do the following steps:

    +
      +
    • +

      Configure the clock for the timers. You can refer to these configurations in our demo examples, file oem_iec60730_init_device.c.

      +
      • +
    • +

      Create two timers with 10 milliseconds (ms) and 100 milliseconds (ms) interrupt periods (parameters 10ms and 100ms are recommended values) to test the clock and the clock switch. You can refer our demo example, file oem_iec60730_timer.c for more details. Note that adjusting the 10ms and 100ms values will require adjusting other configuration IEC60730_SYS_CLK:

      +
      • +
    +

    Figure 23 Configuration for system clock module

    +
    Figure 23 Configuration for system clock module
    +

    5. To perform a variable memory check, the library uses MarchC and MarchXC algorithms. It will have two options:

    +

    - Start from the user's specified address in RAM and continue to the end of the RAM region.

    +

    - Calculate multiple RAM regions by providing the starting and ending addresses for each one. For additional details, refer to the file oem_iec60730.c.

    +

    6. Before calling the sl_iec60730_bist function, we SHOULD set the flag for the sl_iec60730_program_counter_check variable. Some of the following flags are set by the Library IEC60730: IEC60730_VMC_COMPLETE,IEC60730_IMC_COMPLETE,IEC60730_CPU_CLOCKS_COM PLETE,and IEC60730_INTERRUPT_COMPLETE.

    +

    Other flags (IEC60730_GPIO_COMPLETE, IEC60730_ANALOG_COMPLETE,etc.) are up to you to develop additional test functions. The sl_iec60730_program_counter_check variable SHOULD set the flags corresponding to the unavailable test to ensure that the Program Counter Check is guaranteed.

    +

    In the demo examples,you will often see the following code.

    +
    sl_iec60730_program_counter_check   |=IEC60730_GPIO_COMPLETE
+                                    | IEC60730_ANALOG_COMPLETE
+                                    | IEC60730_OEM0_COMPLETE
+                                    | IEC60730_OEM1_COMPLETE
+                                    | IEC60730_OEM2_COMPLETE
+                                    | IEC60730_OEM3_COMPLETE
+                                    | IEC60730_OEM4_COMPLETE
+                                    | IEC60730_OEM5_COMPLETE
+                                    | IEC60730_OEM6_COMPLETE
+                                    | IEC60730_OEM7_COMPLETE;
+
    +
      +
    • +

      On demo eample, executes the external communication test that sets the IEC60730_COMMS_COMPLETE flag by itself.

      +
      • +
    • +

      The function sl_iec60730_bist SHOULD be called in periodical task or a supper loop while(1).

      +
      • +
    +

    7. Remember to increment the IRQ counter variable every time the interrupt to test occurs. You can refer to the oem_irq_exec_count_tick function in our demo examples.

    +
    void TIMERO_IRQHandler(void) {
+
+...
+
+oem_irq_exec_count_tick();
+
+}
+
+void oem_irq_exec_count_tick(void){
+
+oem_irq_exec_count[0]++;
+
+}
+
    +

    8. Create the function sl_iec60730_safe_state. The purpose of this function is to handle when an error occurs. An example of handling of this function refer files oem_iec60730_functions.c. After generating our demo example successfully, you also COULD add your code in file app.c and app.h

    +

    10. Revision history

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    RevisionDateDescription
    0.1.0Oct 2021Initial Revision
    0.2.0Nov 2021Section 7: Added description for Watchdog
    0.3.0Mar 2023Remove Section 8.
    0.4.0Apr 2023Update document
    1.0.0Sep 2023Section 1: Added mention aboutEFM32PG22 and EFR32xG22devices.
    1.1.0June 2024Adding Section 3 and Section 4 for support creates a Library ExtensionUpdated other sections for suit withthe released package EFR32xG12and EFR32xG24 devices.
    2.0.0Nov 2024Rewrite the documentation by the re-factory code of the library support device EFR32MG families.
    + + + + + + + + + + + + + +
    +
    + + + +
    + +
    + + + +
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    Guideline using IEC60730 Safety Library

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    Platform codes for EFR32 series chips which complies to IEC60730 safety standard

    +

    Introduction

    +

    The IEC60730 library for EFR32 provides a basic implementation required to support the necessary requirements found in Table H.1 in the IEC60730 specification. It includes all the Power On Self Test (POST) functions executed when a device is first powered on, as well as Built In Self Test (BIST) functions that are called periodically to ensure correct operation. Certain portions of the requirements require a detailed understanding of the system under development. Callback functions must be completed by the developer to guarantee meeting the full specification. These include a Safe State function used when validation detects an anomaly, properly implemented communications channels (redundancy, error detection, periodic communications), and Plausibility functions to validate system state (internal variables and inputs/outputs).

    +

    License

    +

    Please refer License

    +

    Release Notes

    +

    Please refer document in release_note.md

    +

    IEC60730 Certificate

    +

    The Silicon Labs Appliances homepage will contain the final certificate and detailed report when it is completed.

    +

    OEM Testing

    +

    Once OEMs have completed integrating their system with the IEC60730 Library, they will need to certify their device with a qualified certification house.

    +

    Supported Families

    + +

    Software Requirements

    + +

    Building the IEC60730 Demo

    + +

    Generate document API

    + +

    Coding convention tool

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    Compiler specifications

    + +

    System Architecture

    + +

    CMake

    +

    The project has a CMake template that supports running tests. Follow the steps below one by one to build and run tests.

    +

    Add the IEC60730 Library extension to the SDK

    + +

    Install Dependencies

    +

    Install slc-cli

    + +
    How to use slc
    +

    Add the path to the expanded slc-cli to your PATH sh export PATH=$PATH:~/SimplicityStudio/slc_cli_linux/slc_cli/

    +

    Configure SDK. For example sh slc configuration --sdk ~/SimplicityStudio/SDKs/gecko_sdk/

    +

    Run slc signature trust --sdk if you have not yet trusted your SDK.

    +

    For example your SDK locate at ~/SimplicityStudio/SDKs/gecko_sdk/. Run slc signature trust --sdk ~/SimplicityStudio/SDKs/gecko_sdk/

    +

    Set toolchain For example sh slc configuration -gcc=~/SimplicityStudio-5/SimplicityStudio_v5/developer/toolchains/gnu_arm/12.2.rel1_2023.7/

    +

    Generate the project sh slc generate \path\to\example.slcp -np -d -name= --with

    +

    Choose one of the options below to generate the project

    + + + + + + + + + + + + + + + + + + + + + + + + + +
    OperationArgumentsDescription
    generate-cp, --copy-sourcesCopies all files referenced by this project, selected components, and any other running tools (Pin Tool, etc.). By default, no files are copied.
    ^-cpproj, --copy-proj-sourcesCopies all files referenced by the project and links any SDK sources. This can be combined with -cpsdk.
    ^-cpsdk, --copy-sdk-sourcesCopies all files referenced by the selected components and links any project sources. This can be combined with -cpproj.
    +
    +

    [!NOTE]: To be able to use the extension LibIEC60730. You need to add the LibIEC60730 +extension to your SDK in the extension folder and run the command: slc signature trust -extpath <path_to_your_extension_sdk>

    +
    +
    For example
    +
    $ GSDK=~/SimplicityStudio/SDKs/gecko_sdk
+$ slc configuration --sdk=$GSDK --gcc-toolchain=/Applications/ARM
+$ slc generate $GSDK/app/common/example/blink_baremetal -np -d blinky -name=blinky -o makefile
+   --with brd4166a
+$ slc signature trust -extpath $GSDK/extension/IEC60730_Libs
+
    +

    Run unit test

    + +

    Run integration test

    + + + + + + + + + + + + + + +
    +
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    + +
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    +
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    + + + + + + + + + + \ No newline at end of file diff --git a/site/release_note.html b/site/release_note.html new file mode 100644 index 00000000..b47fbcc6 --- /dev/null +++ b/site/release_note.html @@ -0,0 +1,709 @@ + + + + + + + + + + + + + + + + + + + + + Release Notes - IEC60730 Safety Library + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
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    Release Notes

    + +

    This release contains the following components:

    +
    +

    Library (source files)

    +
      +
    • +

      /lib/asm

      +
      • +
    • +

      /lib/config

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      • +
    • +

      /lib/inc

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      • +
    • +

      /lib/src

      +
      • +
    • +

      /lib/toolchain

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      • +
    +
    +

    Library Dependencies (template files)

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      +
    • /simplicity_sdk
      • +
    +
    +

    Test (source files)

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      +
    • +

      /test/unit_test

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      • +
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      /test/integration_test

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      /test/test_script

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      • +
    +
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    Sample

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      +
    • /sample
      • +
    +
    +

    CMake file

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      +
    • +

      /cmake

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      • +
    • +

      CMakeLists.txt

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      • +
    +
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    Documentation

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      +
    • +

      /docs

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      • +
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      mkdocs.yml

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      • +
    • +

      iec60730.doxygen

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      • +
    +
    +

    SDK extension files

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      +
    • +

      /components

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      • +
    • +

      *.slce

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      *.slsdk

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      *.xml

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    Coding Convention

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      /tools

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    • +

      .pre-commit-config.yaml

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      • +
    +
    +

    Revision History

    +
    +

    2.0.0 Release

    +
      +
    • +

      Supported Device: EFR32MG families

      +
      • +
    • +

      Supported Compilers: GCC, IAR

      +
      • +
    • +

      Update project from make file to CMake file

      +
      • +
    • +

      Rewrite the library IEC60730 code

      +
      • +
    • +

      Update GSDK extension for the IEC60730 Library following the changes of the source library

      +
      • +
    • +

      Support unit test, integration test

      +
      • +
    • +

      Support check coding convention

      +
      • +
    • +

      Support mkdocs

      +
      • +
    +
    +

    1.2.0 Release

    +
      +
    • +

      Supported Devices: EFR32xG24, EFM32xG12

      +
      • +
    • +

      Supported Compilers: GCC, IAR

      +
      • +
    • +

      Added GSDK extension for the IEC60730 Library.

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      • +
    • +

      Integrated demo app to the GSDK extension.

      +
      • +
    +
    +

    1.1.0 Release

    +
      +
    • +

      Supported IEC60730 standard

      +
      • +
    • +

      Supported Devices: EFR32xG22, EFM32PG22

      +
      • +
    • +

      Supported Compilers: GCC, IAR

      +
      • +
    +
    +

    1.0.0 Release

    +
      +
    • +

      Supported IEC60730 standard

      +
      • +
    • +

      Supported Devices: EFR32xG21, EFR32xG23

      +
      • +
    • +

      Supported Compilers: GCC, IAR

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    + + + + + + + + + + \ No newline at end of file diff --git a/site/sitemap.xml b/site/sitemap.xml new file mode 100644 index 00000000..0f8724ef --- /dev/null +++ b/site/sitemap.xml @@ -0,0 +1,3 @@ + + + \ No newline at end of file diff --git a/site/sitemap.xml.gz b/site/sitemap.xml.gz new file mode 100644 index 00000000..18c6e921 Binary files /dev/null and b/site/sitemap.xml.gz differ diff --git a/site/support_calculate_crc.html b/site/support_calculate_crc.html new file mode 100644 index 00000000..c991e0ca --- /dev/null +++ b/site/support_calculate_crc.html @@ -0,0 +1,593 @@ + + + + + + + + + + + + + + + + + + + + + + + Support calculate CRC - IEC60730 Safety Library + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    + +
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    Support calculate CRC by Srecord

    +

    Install

    +

    On Linux

    +
    sudo apt install srecord
+
    +

    On Window: Download Srecord to install

    +

    Arguments to bash script

    +
    PROJ_NAME=$1
+BUILD_DIR=$2
+SREC_PATH=$3
+TOOL_CHAINS=$4
+START_ADDR=$6
+
    +

    For example:

    +
    $ bash sl_iec60730_cal_crc16.sh "${PROJ_NAME}" "${BUILD_DIR}" "C:\srecord\bin" GCC "0x8000000"
+
    +

    Or if you want to calculate multiple regions:

    +
    $ bash sl_iec60730_cal_crc16.sh "${PROJ_NAME}" "${BUILD_DIR}" "C:\srecord\bin" GCC "0x8000000 0x8000050 0x80000a0 0x80000f0 0x8000140 0x8000190"
+
    +
    +

    [!NOTE] +If you calculate multiple regions CRC, you need to enter the start and end addresses of each zone. For example, in the above command, srec will calculate a three-range CRC: 0x8000000 - 0x8000050; 0x80000a0 - 0x80000f0; 0x8000140 - 0x8000190.

    +

    Path ${BUILD_DIR} have the files *.bin, *.hex, and *.s37. A *.map file is also needed in this directory, so that bash can check to find the address of the check_sum variable to store the calculated CRC value.

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    +
    + + + + + + + + + + \ No newline at end of file diff --git a/sitemap.xml b/sitemap.xml new file mode 100644 index 00000000..7962ef42 --- /dev/null +++ b/sitemap.xml @@ -0,0 +1,3 @@ + + + diff --git a/sitemap.xml.gz b/sitemap.xml.gz new file mode 100644 index 00000000..4da30c31 Binary files /dev/null and b/sitemap.xml.gz differ diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt new file mode 100644 index 00000000..7641afad --- /dev/null +++ b/test/CMakeLists.txt @@ -0,0 +1,7 @@ +if(ENABLE_UNIT_TESTING) + add_subdirectory(unit_test) +endif() + +if(ENABLE_INTEGRATION_TESTING) + add_subdirectory(integration_test) +endif() diff --git a/test/execute_integration_test.sh b/test/execute_integration_test.sh new file mode 100644 index 00000000..ac5173df --- /dev/null +++ b/test/execute_integration_test.sh @@ -0,0 +1,290 @@ +#!/bin/bash + +#./execute_test.sh $1 $2 $3 $4 $5 +# $1: BOARD_NAME: brd4187c +# $2: task: all, gen-only, run-only +# $3: components: all, unit_test_iec60730_bist, unit_test_iec60730_post, ... +# $4: ADAPTER_SN +# $5: compiler: GCC, IAR +# $6: some option as "-DENABLE_CAL_CRC_32=ON -DENABLE_CRC_USE_SW=ON -DTEST_SECURE_PERIPHERALS_ENABLE=ON -DINTEGRATION_TEST_WDOG1_ENABLE=ON" + +# Example +# bash execute_unit_test.sh brd4187c all all 440111030 GCC + +# Note: +# In case you want to build CRC32 run this command. For example +# bash execute_unit_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON" + +BASH_DIRECTION=$(pwd) +BASH_PRE_IAR_BUILD=$(pwd)/../simplicity_sdk +BOARD_NAME=$1 +TASK=$2 +COMPONENT=$3 +ADAPTER_SN=$4 +COMPILER=$5 +OPTION_INTEGRATION_TEST=${6//"%20"/" "} +JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +TEST_PATH=$(pwd)/test_script +LOG_PATH=$(pwd)/../log +LOG_FILE_TEMP=$(pwd)/../log/temp.log +LOG_BUILD=$LOG_PATH/build_integration_test_components.log +LOG_FILE=$LOG_PATH/build_integration_test_components.log +IMAGE_PATH=$(pwd)/../build/test/integration_test/build/$BOARD_NAME/$COMPILER +DEVICE_NAME= + +if [ -d "$LOG_PATH" ];then + mkdir -p $LOG_PATH +fi + +#echo "OPTION_INTEGRATION_TEST: $OPTION_INTEGRATION_TEST" + +if [[ "$OPTION_INTEGRATION_TEST" == *"-DTEST_SECURE_PERIPHERALS_ENABLE"* ]];then + printf "\n===== Enable integration testing check secure peripherals =====\n" +else + printf "\n===== Enable integration testing check non-secure peripherals =====\n" +fi + +function get_device_name +{ + serialno=$1 + commander device info --serialno $serialno > temp.txt + device_name=$(head -n 1 temp.txt) + device_name=${device_name//"Part Number : "/} + #printf "$device_name\n" + rm -rf temp.txt + echo "${device_name}" +} + +DEVICE_NAME=$(get_device_name $ADAPTER_SN) +#printf "$DEVICE_NAME\n" + +#if [[ "$DEVICE_NAME" == *"EFR32MG24B"* ]]; then +# DEVICE_NAME=EFR32MG24BXXXF1536 +#fi +#printf "===== $DEVICE_NAME\n" +cd $BASH_DIRECTION/.. +if [ ! -e "log" ];then + mkdir -p log +fi + +function gen_image +{ + if [[ "$COMPILER" == "IAR" ]] ;then + echo "-- [I] Start run pre_build_iar!" + cd $BASH_PRE_IAR_BUILD + bash pre_build_iar.sh $BOARD_NAME "-DENABLE_INTEGRATION_TESTING=ON $OPTION_INTEGRATION_TEST" &> /dev/null + echo "-- [I] Run pre_build_iar done!" + fi + cd $BASH_DIRECTION/.. + make prepare &> /dev/null + cd $BASH_DIRECTION/../build + cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_INTEGRATION_TESTING=ON -DBOARD_NAME=${BOARD_NAME} $OPTION_INTEGRATION_TEST + sleep 1s + if [[ "$1" = "all" ]]; then + printf "Generate all components!\n" + printf "Clean component\n" + make integration_test_clean &> /dev/null + components=$(make integration_test_info) &> /dev/null + components=${components//"Components list: "/} + components=${components//"Built target integration_test_info"/} + list_components=${components} + else + printf "Generate only components: $1\n" + printf "Clean component: $1\n" + make integration_test_clean &> /dev/null + list_components="$1" + fi + printf "Components list: ${list_components}\n" + + # Get compiler and Arguments + compiler=$2 + + resultBuild=("\n===== Summariez the build results of all component =====\n") + sumResultBuild="" + touch $LOG_BUILD + for component in ${list_components}; do + printf "\n===== Start build component: $component compiler: $compiler =====\\n" + log=$(make $component -j4) + echo "$log" | tee -a $LOG_BUILD + result=$(tail -n 1 $LOG_BUILD) + + if [ "$result" = "[100%] Built target $component" ]; then + printf "Build successfully component: $component\n" + resultBuild+=("Success to build component: $component\n") + else + printf "ERROR!!! Build component: $component fail\n" + resultBuild+=("Fail to build component: $component\n") + fi + done + + # Print summariez the build results + for restBuild in "${resultBuild[@]}" + do + sumResultBuild="$sumResultBuild$restBuild\n" + done + printf "$sumResultBuild" + rm -rf $LOG_BUILD +} + +function flash_image +{ + component="$1" + + # Get compiler and Arguments + compiler=$2 + string=$3 + + #echo "string: $string" + + if [[ "$string" == *"ENABLE_CAL_CRC_32=ON"* ]]; then + crc="_crc32" + else + crc="_crc16" + fi + + printf "= Flash components: $component - Flash with compiler: $compiler\n" + + # Export PATH to commander directory + COMMANDER="commander" + if [ "$component" == "integration_test_iec60730_invariable_memory" ]; then + file_out=$IMAGE_PATH/$component$crc.s37 + else + file_out=$IMAGE_PATH/$component.s37 + fi + printf "= Erase chip\n" + result=$($COMMANDER device masserase --serialno $ADAPTER_SN) + #printf "Result: $result" + printf "= Flash file: $file_out\n" + result=$($COMMANDER flash --serialno $ADAPTER_SN $file_out) + if [ "" = "$result" ]; then + return 1 + else + return 0 + fi +} + +function run +{ + cd $BASH_DIRECTION/../build + + if [[ "$1" = "all" ]]; then + printf "Run integration test all components!\n" + components=$(make integration_test_info) &> /dev/null + components=${components//"Components list: "/} + components=${components//"Built target integration_test_info"/} + list_components=${components} + else + printf "Run integration test only components: $1\n" + list_components="$1" + fi + printf "Components list: ${list_components}\n" + + # Get compiler and Arguments + compiler=$2 + arg=$3 + printf "\n===== Argument: $arg\n" + resultBuild=("\n===== Summariez the test results of all component =====\n") + sumResultBuild="" + printf "= Run with compiler: $compiler\n" + + for component in ${list_components}; do + if [[ -f $LOG_FILE_TEMP ]]; then + rm -rf $LOG_FILE_TEMP + fi + + if [[ "$OPTION_INTEGRATION_TEST" == *"TEST_SECURE_PERIPHERALS_ENABLE=ON"* ]];then + IMAGE_PATH=$(pwd)/../build/test/integration_test/build/$BOARD_NAME/$compiler/$component/S + else + IMAGE_PATH=$(pwd)/../build/test/integration_test/build/$BOARD_NAME/$compiler/$component/NS + fi + #echo "OPTION_INTEGRATION_TEST: $OPTION_INTEGRATION_TEST" + flash_image $component $compiler "$arg" + local flashResult=$? + LST_PATH=$IMAGE_PATH/ + #printf "LST_PATH: $LST_PATH\n" + LOG_FILE=$LOG_PATH/$component.log + if [[ -f $LOG_FILE ]]; then + rm -rf $LOG_FILE + fi + + if [ "0" = "$flashResult" ];then + echo "Flash result $component successful!" + $COMMANDER device reset --serialno $ADAPTER_SN + if [ -f "$TEST_PATH/$component.py" ] && [ -d "$LST_PATH" ];then + #echo $(pwd) + local successCount=0 + local totalTestcase=0 + TEST_SCRIPT=$TEST_PATH/$component.py + + if [[ "$component" == "integration_test_iec60730_watchdog" ]] && [[ "$arg" == *"INTEGRATION_TEST_WDOG1_ENABLE=ON"* ]];then + printf "\n= Start run integration test: $component with INTEGRATION_TEST_WDOG1_ENABLE=enable\n" + log=$(CHIP=$DEVICE_NAME ADAPTER_SN=$ADAPTER_SN LST_PATH=$LST_PATH JLINK_PATH=$JLINK_PATH INTEGRATION_TEST_WDOG1_ENABLE=enable python3 $TEST_SCRIPT $compiler $arg) + elif [[ "$component" == "integration_test_iec60730_variable_memory" ]] && [[ "$arg" == *"INTEGRATION_TEST_USE_MARCHX_DISABLE=ON"* ]]; then + printf "\n= Start run integration test: $component with INTEGRATION_TEST_USE_MARCHX_DISABLE=disable\n" + log=$(CHIP=$DEVICE_NAME ADAPTER_SN=$ADAPTER_SN LST_PATH=$LST_PATH JLINK_PATH=$JLINK_PATH INTEGRATION_TEST_USE_MARCHX_DISABLE=disable python3 $TEST_SCRIPT $compiler $arg) + elif [[ "$component" == "integration_test_iec60730_invariable_memory" ]] && [[ "$arg" == *"ENABLE_CAL_CRC_32=ON"* ]]; then + printf "\n= Start run integration test: $component with INTEGRATION_TEST_ENABLE_CAL_CRC_32=enable\n" + log=$(CHIP=$DEVICE_NAME ADAPTER_SN=$ADAPTER_SN LST_PATH=$LST_PATH JLINK_PATH=$JLINK_PATH INTEGRATION_TEST_ENABLE_CAL_CRC_32=enable python3 $TEST_SCRIPT $compiler $arg) + else + printf "\n= Start run integration test: $component\n" + log=$(CHIP=$DEVICE_NAME ADAPTER_SN=$ADAPTER_SN LST_PATH=$LST_PATH JLINK_PATH=$JLINK_PATH python3 $TEST_SCRIPT $compiler $arg) + fi + #echo "============================" + #echo $log + #echo "============================" + $(mv $LOG_FILE_TEMP $LOG_FILE) + # Save output to log file + for line in echo $log; do + if [ "True" == "$line" ]; then + let successCount+=1 + fi + if [ "TC:" == "$line" ]; then + let totalTestcase+=1 + fi + done + + if [[ "$successCount" == "$totalTestcase" ]] && [ 0 != $totalTestcase ]; then + echo "= Finish run integration test: $component - Success $successCount/$totalTestcase - PASS" >> $LOG_FILE + resultBuild+=("\n= Finish run integration test: $component - Success $successCount/$totalTestcase - PASS\n") + else + echo "= Finish run integration test: $component - Success $successCount/$totalTestcase - FAIL" $LOG_FILE + resultBuild+=("\n= Finish run integration test: $component - Success $successCount/$totalTestcase - FAIL\n") + fi + + else + if [ ! -f "$TEST_PATH/$component.py" ]; then + printf "File $TEST_PATH/$component.py is not found in path $TEST_PATH!\n" + resultBuild+=("File $TEST_PATH/$component.py is not found in path $TEST_PATH!\n") + elif [ ! -d "$LST_PATH" ]; then + printf "File ${component}.lst is not found in path $LST_PATH!\n" + resultBuild+=("File ${component}.lst is not found in path $LST_PATH!") + fi + fi + else + echo "Flash result ${component} failed!" + resultBuild+=("Flash Result ${component} failed!") + fi + done + + # Print summariez the build results + for restBuild in "${resultBuild[@]}" + do + sumResultBuild="$sumResultBuild$restBuild\n" + done + printf "$sumResultBuild" +} + +case $TASK in + gen-only) + gen_image "$COMPONENT" "$COMPILER" + ;; + run-only) + run "$COMPONENT" "$COMPILER" "$OPTION_INTEGRATION_TEST" + ;; + all) + gen_image "$COMPONENT" "$COMPILER" + run "$COMPONENT" "$COMPILER" "$OPTION_INTEGRATION_TEST" + ;; + *) + echo "Please choose one of those options: gen-only ; run-only; all" +esac diff --git a/test/execute_unit_test.sh b/test/execute_unit_test.sh new file mode 100644 index 00000000..d573aecf --- /dev/null +++ b/test/execute_unit_test.sh @@ -0,0 +1,271 @@ +#!/bin/bash + +#./execute_test.sh $1 $2 $3 $4 $5 +# $1: BOARD_NAME: brd4187c +# $2: task: all, gen-only, run-only +# $3: components: all, unit_test_iec60730_bist, unit_test_iec60730_post, ... +# $4: ADAPTER_SN +# $5: compiler: GCC, IAR +# $6: "-DENABLE_CAL_CRC_32=ON -DENABLE_CRC_USE_SW=ON" + +# Example +# bash execute_unit_test.sh brd4187c all all 440111030 GCC + +# Note: +# In case you want to build CRC32 run this command. For example +# bash execute_unit_test.sh brd4187c all all 440111030 GCC "-DENABLE_CAL_CRC_32=ON" + +BASH_DIRECTION=$(pwd) +BASH_PRE_IAR_BUILD=$(pwd)/../simplicity_sdk +BOARD_NAME=$1 +TASK=$2 +COMPONENT=$3 +ADAPTER_SN=$4 +COMPILER=$5 +OPTION_UNIT_TEST=${6//"%20"/" "} +JLINK_PATH=/opt/SEGGER/JLink/libjlinkarm.so +TEST_PATH=$(pwd)/test_script +TEST_SCRIPT=$TEST_PATH/unit_test_iec60730_get_report.py +LOG_PATH=$(pwd)/../log +LOG_FILE=$LOG_PATH/build_unit_test_components.log +IMAGE_PATH=$(pwd)/../build/test/unit_test/build/$BOARD_NAME/$COMPILER +DEVICE_NAME= + +function get_device_name +{ + serialno=$1 + commander device info --serialno $serialno > temp.txt + device_name=$(head -n 1 temp.txt) + device_name=${device_name//"Part Number : "/} + #printf "$device_name\n" + rm -rf temp.txt + echo "${device_name}" +} + +DEVICE_NAME=$(get_device_name $ADAPTER_SN) +#printf "$DEVICE_NAME\n" + +#if [[ "$DEVICE_NAME" == *"EFR32MG24B"* ]]; then +# DEVICE_NAME=EFR32MG24BXXXF1536 +#fi +#printf "===== $DEVICE_NAME\n" +cd $BASH_DIRECTION/.. +if [ ! -e "log" ];then + mkdir -p log +fi + +function gen_image +{ + if [[ "$COMPILER" == "IAR" ]] ;then + echo "-- [I] Start run pre_build_iar!" + cd $BASH_PRE_IAR_BUILD + bash pre_build_iar.sh $BOARD_NAME "-DENABLE_UNIT_TESTING=ON $OPTION_UNIT_TEST" &> /dev/null + echo "-- [I] Run pre_build_iar done!" + fi + cd $BASH_DIRECTION/.. + make prepare &> /dev/null + cd $BASH_DIRECTION/../build + cmake --toolchain ../cmake/toolchain.cmake .. -DENABLE_UNIT_TESTING=ON -DBOARD_NAME=${BOARD_NAME} $OPTION_UNIT_TEST + sleep 1s + if [[ "$1" = "all" ]]; then + printf "Generate all components!\n" + printf "Clean component\n" + make unit_test_clean &> /dev/null + components=$(make unit_test_info) &> /dev/null + components=${components//"Components list: "/} + components=${components//"Built target unit_test_info"/} + list_components=${components} + else + printf "Generate only components: $1\n" + printf "Clean component: $1\n" + make unit_test_clean &> /dev/null + list_components="$1" + fi + printf "Components list: ${list_components}\n" + + # Get compiler and Arguments + compiler=$2 + + resultBuild=("\n======== Summariez the build results of all component ========\n") + sumResultBuild="" + touch $LOG_FILE + for component in ${list_components}; do + printf "\n======== Start build component: $component compiler: $compiler ========\\n" + log=$(make $component -j4) + echo "$log" | tee -a $LOG_FILE + result=$(tail -n 1 $LOG_FILE) + + if [ "$result" = "[100%] Built target $component" ]; then + printf "Build successfully component: $component\n" + resultBuild+=("Success to build component: $component\n") + else + printf "ERROR!!! Build component: $component fail\n" + resultBuild+=("Fail to build component: $component\n") + fi + done + + # Print summariez the build results + for restBuild in "${resultBuild[@]}" + do + sumResultBuild="$sumResultBuild$restBuild\n" + done + printf "$sumResultBuild" + rm -rf $LOG_FILE +} + +function flash_image +{ + component="$1" + + # Get compiler and Arguments + compiler=$2 + string=$3 + + if [[ "$string" == *"ENABLE_CAL_CRC_32=ON"* ]]; then + crc="_crc32" + else + crc="_crc16" + fi + + printf "Flash components: $component - Flash with compiler: $compiler\n" + + # Export PATH to commander directory + COMMANDER="commander" + if [ "$component" == "unit_test_iec60730_invariable_memory" ]; then + file_out=$IMAGE_PATH/$component/$component$crc.s37 + else + file_out=$IMAGE_PATH/$component/$component.s37 + fi + printf "Erase chip\n" + result=$($COMMANDER device masserase --serialno $ADAPTER_SN) + #printf "Result: $result" + printf "Flash file: $file_out\n" + result=$($COMMANDER flash --serialno $ADAPTER_SN $file_out) + if [ "" = "$result" ]; then + return 1 + else + return 0 + fi +} + +function number_test_cases +{ + local numberTestCases + log_file=$1 + tail -n 2 $log_file > $LOG_PATH/temp.txt + result_test_cases=$(head -n 1 $LOG_PATH/temp.txt) + numberTestCases=${result_test_cases:24:2} + return $numberTestCases +} + +function number_failure_test_cases +{ + local numberFailureTestCases + testString="Tests " + failureString=" Failures" + log_file=$1 + tail -n 2 $log_file > $LOG_PATH/temp.txt + result_test_cases=$(head -n 1 $LOG_PATH/temp.txt) + positionFailureValue=${result_test_cases#*$testString} + #printf "positionFailureValue:$positionFailureValue\n" + numberFailureTestCases=${positionFailureValue%"$failureString"} + #printf "numberFailureTestCases:$numberFailureTestCases\n" + return $numberFailureTestCases +} + +function run +{ + cd $BASH_DIRECTION/../build + local numberTestCases + local numberFailureTestCases + + if [[ "$1" = "all" ]]; then + printf "Run unit test all components!\n" + components=$(make unit_test_info) &> /dev/null + components=${components//"Components list: "/} + components=${components//"Built target unit_test_info"/} + list_components=${components} + else + printf "Run unit test only components: $1\n" + list_components="$1" + fi + printf "Components list: ${list_components}\n" + + # Get compiler and Arguments + compiler=$2 + arg=$3 + printf "\n======= Argument: $arg\n" + resultBuild=("\n======== Summariez the test results of all component ========\n") + sumResultBuild="" + printf "Run with compiler: $compiler\n" + + for component in ${list_components}; do + if [[ -f $LOG_PATH/${component}.log ]]; then + rm -rf $LOG_PATH/${component}.log + fi + flash_image $component $compiler "$arg" + local flashResult=$? + local LST_PATH=$IMAGE_PATH/$component/ + # echo "$LST_PATH" + if [ "0" = "$flashResult" ];then + echo "Flash result $component successful!" + $COMMANDER device reset --serialno $ADAPTER_SN + if [ -f "$TEST_SCRIPT" ] && [ -d "$LST_PATH" ];then + printf "\n= Start run unit test: $component\n" + echo $(pwd) + log=$(CHIP=$DEVICE_NAME FILE_NAME=$component ADAPTER_SN=$ADAPTER_SN LST_PATH=$LST_PATH JLINK_PATH=$JLINK_PATH python3 $TEST_SCRIPT $compiler) + if [ -f $LOG_PATH/${component}.log ]; then + echo "File ${component}.log is found in path $LOG_PATH\n!" + number_test_cases $LOG_PATH/${component}.log + numberTestCases=$? + number_failure_test_cases $LOG_PATH/${component}.log + numberFailureTestCases=$? + if [[ "$numberFailureTestCases" == 0 ]]; then + printf "\n= Finish run unit test $component - Success $numberTestCases/$numberTestCases - PASS\n" + resultBuild+=("Finish run unit test $component - Success $numberTestCases/$numberTestCases - PASS\n") + else + printf "\n= Finish run unit test $component - Failures $numberFailureTestCases/$numberTestCases - FAIL\n" + resultBuild+=("Finish run unit test $component - Failures $numberFailureTestCases/$numberTestCases - FAIL\n") + fi + else + echo "File ${component}.log is not found in path $LOG_PATH!" + resultBuild+=("File ${component}.log is not found in path $LOG_PATH!") + fi + else + if [ ! -f "$TEST_SCRIPT" ]; then + printf "File $$TEST_SCRIPT is not found in path $TEST_PATH!\n" + resultBuild+=(File $$TEST_SCRIPT is not found in path $TEST_PATH!\n) + elif [ ! -d "$LST_PATH" ]; then + printf "File ${component}.lst is not found in path $LST_PATH!\n" + resultBuild+=("File ${component}.lst is not found in path $LST_PATH!") + fi + fi + else + echo "Flash result ${component} failed!" + resultBuild+=("Flash Result ${component} failed!") + fi + done + + # Print summariez the build results + for restBuild in "${resultBuild[@]}" + do + sumResultBuild="$sumResultBuild$restBuild\n" + done + printf "$sumResultBuild" + rm -rf $LOG_PATH/temp.* +} + +case $TASK in + gen-only) + gen_image "$COMPONENT" "$COMPILER" + ;; + run-only) + run "$COMPONENT" "$COMPILER" "$OPTION_UNIT_TEST" + ;; + all) + gen_image "$COMPONENT" "$COMPILER" + run "$COMPONENT" "$COMPILER" "$OPTION_UNIT_TEST" + ;; + *) + echo "Please choose one of those options: gen-only ; run-only; all" +esac diff --git a/test/integration_test/CMakeLists.txt b/test/integration_test/CMakeLists.txt new file mode 100644 index 00000000..a82e2049 --- /dev/null +++ b/test/integration_test/CMakeLists.txt @@ -0,0 +1,30 @@ +# unit test info +set(INTEGRATION_TEST_INFO "integration_test_info") +#unit test clean +set(INTEGRATION_TEST_CLEAN "integration_test_clean") + +add_custom_target(${INTEGRATION_TEST_INFO} + COMMAND echo "Components list: integration_test_iec60730_program_counter" + " integration_test_iec60730_irq " + " integration_test_iec60730_system_clock " + " integration_test_iec60730_watchdog " + " integration_test_iec60730_cpu_registers " + " integration_test_iec60730_variable_memory " + " integration_test_iec60730_invariable_memory\ " + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/ +) + +add_custom_target(${INTEGRATION_TEST_CLEAN} + COMMAND rm -rf ${CMAKE_BINARY_DIR}/test/integration_test/build/${BOARD_NAME} + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/ +) + +include(integration_test) + +generate_integration_test(test/integration_test integration_test_iec60730_program_counter) +generate_integration_test(test/integration_test integration_test_iec60730_irq) +generate_integration_test(test/integration_test integration_test_iec60730_system_clock) +generate_integration_test(test/integration_test integration_test_iec60730_watchdog) +generate_integration_test(test/integration_test integration_test_iec60730_cpu_registers) +generate_integration_test(test/integration_test integration_test_iec60730_variable_memory) +generate_integration_test(test/integration_test integration_test_iec60730_invariable_memory) diff --git a/test/integration_test/inc/app.h b/test/integration_test/inc/app.h new file mode 100644 index 00000000..efa2fd7a --- /dev/null +++ b/test/integration_test/inc/app.h @@ -0,0 +1,31 @@ +/***************************************************************************//** + * @file + * @brief Top level application functions + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef APP_H +#define APP_H + +/***************************************************************************//** + * Initialize application. + ******************************************************************************/ +void app_init(void); + +/***************************************************************************//** + * App ticking function. + ******************************************************************************/ +void app_process_action(void); + +#endif // APP_H diff --git a/test/integration_test/inc/integration_test_common.h b/test/integration_test/inc/integration_test_common.h new file mode 100644 index 00000000..12718461 --- /dev/null +++ b/test/integration_test/inc/integration_test_common.h @@ -0,0 +1,227 @@ +/***************************************************************************/ /** + * @file integration_test_common.h + * @brief Integration test init header + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ +#ifndef INTEGRATION_TEST_COMMON_H +#define INTEGRATION_TEST_COMMON_H + +#include "stdio.h" +#include "em_core.h" +#include "em_rmu.h" +#include "em_wdog.h" +#include "em_gpcrc.h" +#include "em_cmu.h" +#include "em_timer.h" +#include "em_letimer.h" +#include "sl_iec60730_internal.h" + +/* Test Timer instance */ +#if (_SILICON_LABS_32B_SERIES == 2) +#if ((defined SL_IEC60730_NON_SECURE_ENABLE) && (!defined(SL_TRUSTZONE_SECURE))) +#define TIMER_10MS TIMER0_NS +#define TIMER_100MS LETIMER0_NS +#else +#define TIMER_10MS TIMER0 +#define TIMER_100MS LETIMER0 +#endif +#else // Series 1 devices +#define TIMER_10MS TIMER0 +#define TIMER_100MS LETIMER0 +#endif // (_SILICON_LABS_32B_SERIES == 2) + +/* Init structure for timers */ +#if defined(_TIMER_CTRL_MODE_MASK) +#if defined(TIMER_CTRL_X2CNT) \ + && (defined(TIMER_CTRL_ATI) || defined(TIMER_CFG_ATI)) +#define TIMER_INIT_TEST_10MS \ + { false, /* Enable timer when initialization completes. */ \ + false, /* Stop counter during debug halt. */ \ + timerPrescale4, /* DIV 16. */ \ + timerClkSelHFPerClk, /* Select HFPER / HFPERB clock. */ \ + false, /* Not 2x count mode. */ \ + false, /* No ATI. */ \ + timerInputActionNone, /* No action on falling input edge. */ \ + timerInputActionNone, /* No action on rising input edge. */ \ + _TIMER_CTRL_MODE_UP, /* Up-counting. */ \ + false, /* Do not clear DMA requests when DMA channel is active. */ \ + false, /* Select X2 quadrature decode mode (if used). */ \ + false, /* Disable one shot. */ \ + false, /* Not started/stopped/reloaded by other timers. */ \ + true } +#else +#define TIMER_INIT_TEST_10MS \ + { \ + false, /* Enable timer when initialization completes. */ \ + false, /* Stop counter during debug halt. */ \ + timerPrescale4, /* DIV 16. */ \ + timerClkSelHFPerClk, /* Select HFPER / HFPERB clock. */ \ + timerInputActionNone, /* No action on falling input edge. */ \ + timerInputActionNone, /* No action on rising input edge. */ \ + _TIMER_CTRL_MODE_UP, /* Up-counting. */ \ + false, /* Do not clear DMA requests when DMA channel is active. */ \ + false, /* Select X2 quadrature decode mode (if used). */ \ + false, /* Disable one shot. */ \ + false /* Not started/stopped/reloaded by other timers. */ \ + } +#endif +#endif + +#if defined(_TIMER_CFG_MODE_MASK) +#if defined(TIMER_CTRL_X2CNT) \ + && (defined(TIMER_CTRL_ATI) || defined(TIMER_CFG_ATI)) +#if (defined(TIMER_CTRL_DISSYNCOUT) || defined(TIMER_CFG_DISSYNCOUT)) +#define TIMER_INIT_TEST_10MS \ + { \ + true, /* Enable timer when initialization completes. */ \ + false, /* Stop counter during debug halt. */ \ + timerPrescale4, /* DIV 16. */ \ + timerClkSelHFPerClk, /* Select HFPER / HFPERB clock. */ \ + false, /* Not 2x count mode. */ \ + false, /* No ATI. */ \ + false, /* No RSSCOIST. */ \ + timerInputActionNone, /* No action on falling input edge. */ \ + timerInputActionNone, /* No action on rising input edge. */ \ + timerModeUp, /* Up-counting. */ \ + false, /* Do not clear DMA requests when DMA channel is active. */ \ + false, /* Select X2 quadrature decode mode (if used). */ \ + false, /* Disable one shot. */ \ + false, /* Not started/stopped/reloaded by other timers. */ \ + false /* Disable ability to start/stop/reload other timers. */ \ + }; +#else +#define TIMER_INIT_TEST_10MS \ + { false, /* Enable timer when initialization completes. */ \ + false, /* Stop counter during debug halt. */ \ + timerPrescale4, /* DIV 16. */ \ + timerClkSelHFPerClk, /* Select HFPER / HFPERB clock. */ \ + false, /* Not 2x count mode. */ \ + false, /* No ATI. */ \ + timerInputActionNone, /* No action on falling input edge. */ \ + timerInputActionNone, /* No action on rising input edge. */ \ + timerModeUp, /* Up-counting. */ \ + false, /* Do not clear DMA requests when DMA channel is active. */ \ + false, /* Select X2 quadrature decode mode (if used). */ \ + false, /* Disable one shot. */ \ + false, /* Not started/stopped/reloaded by other timers. */ \ + true } +#endif +#else +#define TIMER_INIT_TEST_10MS \ + { \ + false, /* Enable timer when initialization completes. */ \ + false, /* Stop counter during debug halt. */ \ + timerPrescale4, /* DIV 16. */ \ + timerClkSelHFPerClk, /* Select HFPER / HFPERB clock. */ \ + timerInputActionNone, /* No action on falling input edge. */ \ + timerInputActionNone, /* No action on rising input edge. */ \ + timerModeUp, /* Up-counting. */ \ + false, /* Do not clear DMA requests when DMA channel is active. */ \ + false, /* Select X2 quadrature decode mode (if used). */ \ + false, /* Disable one shot. */ \ + false /* Not started/stopped/reloaded by other timers. */ \ + } +#endif +#endif + +#if defined(LETIMER_CTRL_RTCC0TEN) +#define TIMER_INIT_TEST_100MS \ + { \ + false, /* Enable timer when initialization completes. */ \ + false, /* Stop counter during debug halt. */ \ + false, /* Do not start counting on RTC COMP0 match. */ \ + false, /* Do not start counting on RTC COMP1 match. */ \ + true, /* Load COMP0 into CNT on underflow. */ \ + false, /* Do not load COMP1 into COMP0 when REP0 reaches 0. */ \ + 0, /* Idle value 0 for output 0. */ \ + 0, /* Idle value 0 for output 1. */ \ + letimerUFOANone, /* No action on underflow on output 0. */ \ + letimerUFOANone, /* No action on underflow on output 1. */ \ + letimerRepeatFree, /* Count until stopped by SW. */ \ + 0 /* Use default top Value. */ \ + } +#else +#define TIMER_INIT_TEST_100MS \ + { \ + false, /* Enable timer when initialization completes. */ \ + false, /* Stop counter during debug halt. */ \ + true, /* Load COMP0 into CNT on underflow. */ \ + false, /* Do not load COMP1 into COMP0 when REP0 reaches 0. */ \ + 0, /* Idle value 0 for output 0. */ \ + 0, /* Idle value 0 for output 1. */ \ + letimerUFOANone, /* No action on underflow on output 0. */ \ + letimerUFOANone, /* No action on underflow on output 1. */ \ + letimerRepeatFree, /* Count until stopped by SW. */ \ + 0 /* Use default top Value. */ \ + } +#endif + +/* Value of the timer counter */ +#define TEST_TIMER_RESET_VAL 0 +#define TEST_TIMER_PRESET_VAL 3276 + +/* Timers is clocked by FSRCO 20Mhz */ +/* Timer prescaler is 2 so counter clock is 5Mhz () */ +/* Counter value for 10ms timing */ +#define TEST_TIMER_10MS_VAL 50000 +/* Counter value for 100ms timing */ +#define TEST_TIMER_100MS_VAL 3276 + +#if defined(SL_IEC60730_NON_SECURE_ENABLE) +#define T_NVIC_SetPriorityGrouping TZ_NVIC_SetPriorityGrouping_NS +#define T_NVIC_SetPriority TZ_NVIC_SetPriority_NS +#define T_NVIC_EnableIRQ TZ_NVIC_EnableIRQ_NS +#else +#define T_NVIC_SetPriorityGrouping NVIC_SetPriorityGrouping +#define T_NVIC_SetPriority NVIC_SetPriority +#define T_NVIC_EnableIRQ NVIC_EnableIRQ +#endif + +/* Function Prototype */ +/* SMU configuration */ +void smu_config(void); +/* NVIC configuration */ +void nvic_init(void); +/* SCB non-secure configuration */ +void system_init_ns(void); +/* Integration test config support */ +void integration_test_clock_config(void); +/* Init timer test */ +void integration_test_timers_init(void); +/* Enable timer to test interrupt */ +void integration_test_timers_enable(void); +/* Disable timer to test interrupt */ +void integration_test_timers_disable(void); +/* Setup irq before run test */ +void integration_test_init(void); +/* Disable irq after run test */ +void integration_test_deinit(void); +/* Run test */ +void integration_test_run_init(void); +void integration_test_run_process_action(void); + +#endif // INTEGRATION_TEST_COMMON_H diff --git a/test/integration_test/src/app.c b/test/integration_test/src/app.c new file mode 100644 index 00000000..8aa18e31 --- /dev/null +++ b/test/integration_test/src/app.c @@ -0,0 +1,41 @@ +/***************************************************************************//** + * @file + * @brief Top level application functions + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "app.h" +#include "integration_test_common.h" +#include "sl_iec60730_internal.h" + +void app_init(void) +{ +#if (_SILICON_LABS_32B_SERIES == 2) +#if ((defined SL_IEC60730_NON_SECURE_ENABLE) && (!defined(SL_TRUSTZONE_SECURE))) + printf("Test non-secure peripherals\n"); +#else + printf("Test secure peripherals\n"); +#endif +#else // Series 1 devices + printf("Test secure peripherals\n"); +#endif // (_SILICON_LABS_32B_SERIES == 2) + + integration_test_run_init(); +} + +void app_process_action(void) +{ + integration_test_run_process_action(); + printf("Pass-Test\n"); +} diff --git a/test/integration_test/src/integration_test_common.c b/test/integration_test/src/integration_test_common.c new file mode 100644 index 00000000..4c6f4557 --- /dev/null +++ b/test/integration_test/src/integration_test_common.c @@ -0,0 +1,213 @@ +/***************************************************************************/ /** + * @file integration_test_common.c + * @brief Integration test init + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#include "integration_test_common.h" + +// Watchdog config +const WDOG_Init_TypeDef integration_test_wdog0_init = WDOG_INIT_DEFAULT; +const WDOG_Init_TypeDef integration_test_wdog1_init = WDOG_INIT_DEFAULT; +// Timer config +const TIMER_Init_TypeDef integration_test_timer_10ms_config = TIMER_INIT_TEST_10MS; +const LETIMER_Init_TypeDef integration_test_timer_100ms_config = TIMER_INIT_TEST_100MS; + +void nvic_init(void) +{ + // One Group Priority + NVIC_SetPriorityGrouping(7); + /* Timer 0 */ + NVIC_SetPriority(TIMER0_IRQn, 1); + NVIC_EnableIRQ(TIMER0_IRQn); + /* LETIMER 0 */ + NVIC_SetPriority(LETIMER0_IRQn, 1); + NVIC_EnableIRQ(LETIMER0_IRQn); +} + +/* Function Definition */ +void integration_test_init(void) +{ + integration_test_clock_config(); + nvic_init(); +#if defined(_RMU_CTRL_PINRMODE_MASK) + RMU_ResetControl(rmuResetWdog, rmuResetModeExtended); +#endif // defined(_RMU_CTRL_PINRMODE_MASK) +#if (defined(WDOG0) && (SL_IEC60730_WDOG0_ENABLE == 1)) + WDOGn_Init(SL_IEC60730_WDOG_INST(0), &integration_test_wdog0_init); +#endif +#if (defined(WDOG1) && (SL_IEC60730_WDOG1_ENABLE == 1)) + WDOGn_Init(SL_IEC60730_WDOG_INST(1), &integration_test_wdog1_init); +#endif + CORE_ATOMIC_IRQ_ENABLE(); +} + +void integration_test_deinit(void) +{ + /* Disable watchdog timer */ +#if (defined(WDOG0) && (SL_IEC60730_WDOG0_ENABLE == 1)) + WDOGn_Enable(SL_IEC60730_WDOG_INST(0), false); +#endif +#if (defined(WDOG1) && (SL_IEC60730_WDOG1_ENABLE == 1)) + WDOGn_Enable(SL_IEC60730_WDOG_INST(1), false); +#endif +} + +/* Clock configuration */ +void integration_test_clock_config(void) +{ +#if (_SILICON_LABS_32B_SERIES_2_CONFIG >= 1) + /* System clock is default FSRCO - 20Mhz */ + /* Watchdog and LETIMER clock is default LFRCO - 32Khz */ + /* FSRCO clocks for timers at fixed 20Mhz */ + CMU_ClockSelectSet(cmuClock_TIMER0, cmuSelect_FSRCO); + + CMU_ClockSelectSet(cmuClock_LETIMER0, cmuSelect_LFRCO); + +#if (_SILICON_LABS_32B_SERIES_2_CONFIG > 1) + CMU_ClockEnable(cmuClock_TIMER0, true); + CMU_ClockEnable(cmuClock_LETIMER0, true); +#if (defined(WDOG0) && (SL_IEC60730_WDOG0_ENABLE == 1)) + CMU_ClockEnable(cmuClock_WDOG0, true); +#endif +#if (defined(WDOG1) && (SL_IEC60730_WDOG1_ENABLE == 1)) + CMU_ClockEnable(cmuClock_WDOG1, true); +#endif + CMU_ClockEnable(cmuClock_GPCRC, true); + CMU_ClockEnable(cmuClock_BURAM, true); + CMU_ClockEnable(cmuClock_FSRCO, true); + CMU_ClockEnable(cmuClock_LFRCO, true); +#endif +#else + /* System clock is default HFRCO - 19Mhz */ + /* Watchdog clock is default LFRCO - 32Khz */ + /* FSRCO clocks for timers at 19Mhz */ + CMU_ClockEnable(cmuClock_HFPER, true); + CMU_ClockEnable(cmuClock_TIMER0, true); +/* Enable Low energy Peripherals clock */ +#if defined(CMU_HFCORECLKEN0_LE) + CMU_ClockEnable(cmuClock_HFLE, true); +#else + CMU->HFBUSCLKEN0 |= (CMU_HFBUSCLKEN0_LE & _CMU_HFBUSCLKEN0_MASK); +#endif + + /* LFACLK clock is selected as LFRCO */ + CMU_ClockSelectSet(cmuClock_LFA, cmuSelect_LFRCO); + /* Enable clock for LETIMER0 as LFRCO - 32.768 kHz*/ + CMU_ClockEnable(cmuClock_LETIMER0, true); + /* Enable clock of CRC */ + CMU_ClockEnable(cmuClock_GPCRC, true); +#endif +} + +/* Init timer test */ +void integration_test_timers_init(void) +{ + /* Initialize 10ms timer */ + TIMER_Init(TIMER_10MS, &integration_test_timer_10ms_config); + /* Initialize 10ms timer */ + LETIMER_Init(TIMER_100MS, &integration_test_timer_100ms_config); + + /* Reset counter */ + TIMER_CounterSet(TIMER_10MS, TEST_TIMER_RESET_VAL); + LETIMER_CounterSet(TIMER_100MS, TEST_TIMER_PRESET_VAL); + + /* Set reload value */ + TIMER_TopSet(TIMER_10MS, TEST_TIMER_10MS_VAL); + LETIMER_TopSet(TIMER_100MS, TEST_TIMER_100MS_VAL); + + /* Clear pending interrupt */ + TIMER_IntClear(TIMER_10MS, TIMER_IF_OF); + LETIMER_IntClear(TIMER_100MS, LETIMER_IF_UF); + + /* Enable overflow interrupt */ + TIMER_IntEnable(TIMER_10MS, TIMER_IF_OF); + LETIMER_IntEnable(TIMER_100MS, LETIMER_IEN_UF); +} + +/* Enable timer to test interrupt */ +void integration_test_timers_enable(void) +{ + // Start timer + TIMER_Enable(TIMER_10MS, true); + LETIMER_Enable(TIMER_100MS, true); +} + +/* Disable timer to test interrupt */ +void integration_test_timers_disable(void) +{ + // Start timer + TIMER_Enable(TIMER_10MS, false); + LETIMER_Enable(TIMER_100MS, false); +} + +// Dump functions +__WEAK sl_iec60730_test_result_t sl_iec60730_vmc_bist() +{ + return SL_IEC60730_TEST_PASSED; +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_imc_bist() +{ + return SL_IEC60730_TEST_PASSED; +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist(void) +{ + return SL_IEC60730_TEST_PASSED; +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_vmc_post() +{ + return SL_IEC60730_TEST_PASSED; +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_imc_post() +{ + return SL_IEC60730_TEST_PASSED; +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_watchdog_post(void) +{ + return SL_IEC60730_TEST_PASSED; +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_cpu_registers_post(void) +{ + return SL_IEC60730_TEST_PASSED; +} + +/* IEC60730 safe state */ +void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure) +{ + printf("Fail-Test. Error status: %d\n", failure); + LABEL_DEF(IEC60730_SAFE_STATE_BKPT); + SL_IEC60730_RSTCAUSES_CLEAR(); + while (1) { + sl_iec60730_restart_watchdogs(); + } +} diff --git a/test/integration_test/src/integration_test_iec60730_cpu_registers.c b/test/integration_test/src/integration_test_iec60730_cpu_registers.c new file mode 100644 index 00000000..7890dde6 --- /dev/null +++ b/test/integration_test/src/integration_test_iec60730_cpu_registers.c @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file integration_test_iec60730_cpu_registers.c + * @brief setup integration test cpu register + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#include "integration_test_common.h" +#include "sl_iec60730_internal.h" + +void integration_test_run_init(void) +{ + integration_test_init(); + sl_iec60730_post(); +} + +void integration_test_run_process_action(void) +{ + sl_iec60730_bist(); +} diff --git a/test/integration_test/src/integration_test_iec60730_invariable_memory.c b/test/integration_test/src/integration_test_iec60730_invariable_memory.c new file mode 100644 index 00000000..286b4044 --- /dev/null +++ b/test/integration_test/src/integration_test_iec60730_invariable_memory.c @@ -0,0 +1,82 @@ +/***************************************************************************/ /** + * @file integration_test_iec60730_invariable_memory.c + * @brief setup integration test invariable memory + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#include "integration_test_common.h" +#include "sl_iec60730_internal.h" + +#define INTEGRATION_TEST_NUM_FLASH_REGIONS_CHECK 3 + +#if defined(__GNUC__) +#define INTEGRATION_TEST_FLASH_OFFSET 20 +#elif defined(__ICCARM__) +#define INTEGRATION_TEST_FLASH_OFFSET 80 +#else +#endif + +__no_init sl_iec60730_imc_params_t integration_test_imc; +__no_init sl_iec60730_imc_test_multiple_regions_t integration_test_imc_test __CLASSB_RAM; + +uint32_t num_flash_regions_check; + +#if defined(__GNUC__) + +sl_iec60730_imc_test_region_t integration_test_imc_region_test[INTEGRATION_TEST_NUM_FLASH_REGIONS_CHECK] = +{ { .start = SL_IEC60730_ROM_START, .end = SL_IEC60730_ROM_END }, + { .start = SL_IEC60730_ROM_START + 2 * INTEGRATION_TEST_FLASH_OFFSET, .end = SL_IEC60730_ROM_START + 3 * INTEGRATION_TEST_FLASH_OFFSET }, + { .start = SL_IEC60730_ROM_START + 4 * INTEGRATION_TEST_FLASH_OFFSET, .end = SL_IEC60730_ROM_START + 5 * INTEGRATION_TEST_FLASH_OFFSET } }; + +#elif defined(__ICCARM__) + +sl_iec60730_imc_test_region_t integration_test_imc_region_test[INTEGRATION_TEST_NUM_FLASH_REGIONS_CHECK] = +{ { .start = SL_IEC60730_ROM_START, .end = SL_IEC60730_ROM_END }, + { .start = (uint32_t *)((uint32_t)SL_IEC60730_ROM_START + 2 * INTEGRATION_TEST_FLASH_OFFSET), .end = (uint32_t *)((uint32_t)SL_IEC60730_ROM_START + 3 * INTEGRATION_TEST_FLASH_OFFSET) }, + { .start = (uint32_t *)((uint32_t)SL_IEC60730_ROM_START + 4 * INTEGRATION_TEST_FLASH_OFFSET), .end = (uint32_t *)((uint32_t)SL_IEC60730_ROM_START + 5 * INTEGRATION_TEST_FLASH_OFFSET) } }; + +#else +#endif + +void integration_test_run_init(void) +{ + integration_test_init(); + + integration_test_imc.gpcrc = SL_IEC60730_DEFAULT_GPRC; + integration_test_imc_test.region = integration_test_imc_region_test; + integration_test_imc_test.number_of_test_regions = 1; + num_flash_regions_check = 1; + + // Init regions vmc test + sl_iec60730_imc_init(&integration_test_imc, &integration_test_imc_test); + sl_iec60730_post(); +} + +void integration_test_run_process_action(void) +{ + sl_iec60730_bist(); +} diff --git a/test/integration_test/src/integration_test_iec60730_irq.c b/test/integration_test/src/integration_test_iec60730_irq.c new file mode 100644 index 00000000..7512a32a --- /dev/null +++ b/test/integration_test/src/integration_test_iec60730_irq.c @@ -0,0 +1,88 @@ +/***************************************************************************/ /** + * @file integration_test_iec60730_irq.c + * @brief setup integration test irq + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#include "integration_test_common.h" + +/* Setup variable */ +#define IEC60730_IRQ_SIZE 8 +#define INTEGRATION_TEST_NUM_IRQ_CHECK 1 + +volatile SL_IEC60730_IRQ_TYPE_VARIABLE integration_test_irq_exec_count[IEC60730_IRQ_SIZE] = { 0 }; +const sl_iec60730_irq_execution_bounds_t integration_test_irq_freq_bounds[IEC60730_IRQ_SIZE] = { { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 } }; + +sl_iec60730_irq_cfg_t integration_test_irq_config = { &integration_test_irq_exec_count[0], + &integration_test_irq_freq_bounds[0], + INTEGRATION_TEST_NUM_IRQ_CHECK }; + +/* count which irq is executed */ +void integration_test_irq_tick(void) +{ + for (uint8_t i = 0; i < INTEGRATION_TEST_NUM_IRQ_CHECK; i++) { + integration_test_irq_exec_count[i]++; + } +} + +/* 10ms timer interrupt handler */ +void TIMER0_IRQHandler(void) +{ + TIMER_IntClear(TIMER_10MS, TIMER_IF_OF); + // Increase IRQ counter + integration_test_irq_tick(); +} + +/* 100ms timer interrupt handler */ +void LETIMER0_IRQHandler(void) +{ + LETIMER_IntClear(TIMER_100MS, LETIMER_IF_UF); + sl_iec60730_irq_check(); +} + +void integration_test_run_init(void) +{ + integration_test_init(); + integration_test_timers_init(); + integration_test_timers_enable(); + sl_iec60730_irq_init(&integration_test_irq_config); + sl_iec60730_post(); +} + +void integration_test_run_process_action(void) +{ + sl_iec60730_bist(); + sl_iec60730_program_counter_check = IEC60730_ALL_COMPLETE_BITS; + sl_iec60730_program_counter_test(); +} diff --git a/test/integration_test/src/integration_test_iec60730_program_counter.c b/test/integration_test/src/integration_test_iec60730_program_counter.c new file mode 100644 index 00000000..920891ee --- /dev/null +++ b/test/integration_test/src/integration_test_iec60730_program_counter.c @@ -0,0 +1,43 @@ +/***************************************************************************/ /** + * @file integration_test_iec60730_program_counter.c + * @brief setup integration test program counter + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ +#include "integration_test_common.h" + +void integration_test_run_init(void) +{ + integration_test_init(); + sl_iec60730_post(); +} + +void integration_test_run_process_action(void) +{ + sl_iec60730_bist(); + sl_iec60730_program_counter_check = IEC60730_ALL_COMPLETE_BITS; + sl_iec60730_program_counter_test(); +} diff --git a/test/integration_test/src/integration_test_iec60730_system_clock.c b/test/integration_test/src/integration_test_iec60730_system_clock.c new file mode 100644 index 00000000..6416ccbc --- /dev/null +++ b/test/integration_test/src/integration_test_iec60730_system_clock.c @@ -0,0 +1,66 @@ +/***************************************************************************/ /** + * @file integration_test_iec60730_system_clock.c + * @brief setup integration test system clock + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#include "integration_test_common.h" + +__WEAK void sl_iec60730_irq_check(void) +{ +} + +/* 10ms timer interrupt handler */ +void TIMER0_IRQHandler(void) +{ + TIMER_IntClear(TIMER_10MS, TIMER_IF_OF); + // Increase clock tick counter + sl_iec60730_sys_clock_count_tick(); +} + +/* 100ms timer interrupt handler */ +void LETIMER0_IRQHandler(void) +{ + LETIMER_IntClear(TIMER_100MS, LETIMER_IF_UF); + sl_iec60730_test_clock_tick(); +} + +void integration_test_run_init(void) +{ + integration_test_init(); + integration_test_timers_init(); + integration_test_timers_enable(); + // Reset clock tick counter + sl_iec60730_sys_clock_count_reset(); + sl_iec60730_post(); +} + +void integration_test_run_process_action(void) +{ + sl_iec60730_program_counter_check = IEC60730_ALL_COMPLETE_BITS; + sl_iec60730_bist(); +} diff --git a/test/integration_test/src/integration_test_iec60730_variable_memory.c b/test/integration_test/src/integration_test_iec60730_variable_memory.c new file mode 100644 index 00000000..ebacfab0 --- /dev/null +++ b/test/integration_test/src/integration_test_iec60730_variable_memory.c @@ -0,0 +1,81 @@ +/***************************************************************************/ /** + * @file integration_test_iec60730_variable_memory.c + * @brief setup integration test variable memory + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ + +#include "integration_test_common.h" +#include "sl_iec60730_internal.h" + +#define INTEGRATION_TEST_NUM_RAM_REGIONS_CHECK 3 + +#if defined(__GNUC__) +#define INTEGRATION_TEST_RAM_OFFSET 20 +#elif defined(__ICCARM__) +#define INTEGRATION_TEST_RAM_OFFSET 80 +#else +#endif + +__no_init sl_iec60730_vmc_test_multiple_regions_t integration_test_vmc_test; +//uint32_t ram_test_end; +uint32_t num_ram_regions_check; + +#if defined(__GNUC__) + +sl_iec60730_vmc_test_region_t integration_test_vmc_region_test[INTEGRATION_TEST_NUM_RAM_REGIONS_CHECK] = +{ { .start = RAMTEST_START, .end = RAMTEST_END }, + { .start = RAM_START, .end = RAM_START + INTEGRATION_TEST_RAM_OFFSET }, + { .start = RAM_START + 2 * INTEGRATION_TEST_RAM_OFFSET, .end = RAM_START + 3 * INTEGRATION_TEST_RAM_OFFSET } }; + +#elif defined(__ICCARM__) + +sl_iec60730_vmc_test_region_t integration_test_vmc_region_test[INTEGRATION_TEST_NUM_RAM_REGIONS_CHECK] = +{ { .start = RAMTEST_START, .end = RAMTEST_END }, + { .start = RAM_START, .end = (uint32_t *)((uint32_t)RAM_START + INTEGRATION_TEST_RAM_OFFSET) }, + { .start = (uint32_t *)((uint32_t)RAM_START + 2 * INTEGRATION_TEST_RAM_OFFSET), .end = (uint32_t *)((uint32_t)RAM_START + 3 * INTEGRATION_TEST_RAM_OFFSET) } }; + +#else +#endif + +void integration_test_run_init(void) +{ + integration_test_init(); + + integration_test_vmc_test.region = integration_test_vmc_region_test; + integration_test_vmc_test.number_of_test_regions = INTEGRATION_TEST_NUM_RAM_REGIONS_CHECK; + //ram_test_end = (uint32_t)RAMTEST_END; + num_ram_regions_check = INTEGRATION_TEST_NUM_RAM_REGIONS_CHECK; + + // Init regions vmc test + sl_iec60730_vmc_init(&integration_test_vmc_test); + sl_iec60730_post(); +} + +void integration_test_run_process_action(void) +{ + sl_iec60730_bist(); +} diff --git a/test/integration_test/src/integration_test_iec60730_watchdog.c b/test/integration_test/src/integration_test_iec60730_watchdog.c new file mode 100644 index 00000000..2adf4747 --- /dev/null +++ b/test/integration_test/src/integration_test_iec60730_watchdog.c @@ -0,0 +1,95 @@ +/***************************************************************************/ /** + * @file integration_test_iec60730_watchdog.c + * @brief setup integration test watchdog + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * SPDX-License-Identifier: Zlib + * + * The licensor of this software is Silicon Laboratories Inc. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event will the authors be held liable for any damages + * arising from the use of this software. + * + * Permission is granted to anyone to use this software for any purpose, + * including commercial applications, and to alter it and redistribute it + * freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software + * in a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * 3. This notice may not be removed or altered from any source distribution. + * + ******************************************************************************/ +#include "integration_test_common.h" +#include "sl_iec60730_internal.h" + +uint8_t wdog_restart_enable = 1; +volatile uint32_t wdog_por_wait = 0; +#if (_SILICON_LABS_32B_SERIES == 2) +uint32_t buram_addr; +#endif // (_SILICON_LABS_32B_SERIES == 2) +uint32_t rst_addr = (uint32_t)SL_IEC60730_RST; +uint32_t rstcauses_register; +uint32_t rstcauses_clear; +uint32_t offset_rst_cmd; + +// Dump functions +__WEAK sl_iec60730_test_result_t sl_iec60730_vmc_bist() +{ + return SL_IEC60730_TEST_PASSED; +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_imc_bist() +{ + return SL_IEC60730_TEST_PASSED; +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist(void) +{ + return SL_IEC60730_TEST_PASSED; +} + +void integration_test_run_init(void) +{ + // Get address buram, rst and rst_cmd register +#if (_SILICON_LABS_32B_SERIES < 2) + offset_rst_cmd = offsetof(RMU_TypeDef, CMD); + rstcauses_clear = _RMU_CMD_RCCLR_MASK; +#else // Series 2 devices + offset_rst_cmd = offsetof(EMU_TypeDef, CMD); + rstcauses_clear = _EMU_CMD_RSTCAUSECLR_MASK; + buram_addr = (uint32_t)BURAM; +#endif + rstcauses_register = rst_addr + offset_rst_cmd; + // Program is waiting for debugger take control after power on reset + // Debugger must set this flag to true + LABEL_DEF(IEC60730_TEST_WDOG_POR_BKPT); + while (wdog_por_wait == 0); + + integration_test_init(); + sl_iec60730_test_result_t result = sl_iec60730_watchdog_post(); + if (result == SL_IEC60730_TEST_FAILED) { + sl_iec60730_safety_check_error_occur(SL_IEC60730_WATCHDOG_POST_FAIL); + sl_iec60730_safe_state(SL_IEC60730_WATCHDOG_POST_FAIL); + } + + LABEL_DEF(IEC60730_TEST_RESTART_WDOG_BKPT); + __NOP(); + while (1) { + if (wdog_restart_enable) { + sl_iec60730_restart_watchdogs(); + } + } +} + +void integration_test_run_process_action(void) +{ + sl_iec60730_bist(); +} diff --git a/test/integration_test/src/main.c b/test/integration_test/src/main.c new file mode 100644 index 00000000..6004d754 --- /dev/null +++ b/test/integration_test/src/main.c @@ -0,0 +1,58 @@ +/***************************************************************************//** + * @file + * @brief main() function. + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ +#include "sl_component_catalog.h" +#include "sl_system_init.h" +#include "app.h" +#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) +#include "sl_power_manager.h" +#endif +#if defined(SL_CATALOG_KERNEL_PRESENT) +#include "sl_system_kernel.h" +#else // SL_CATALOG_KERNEL_PRESENT +#include "sl_system_process_action.h" +#endif // SL_CATALOG_KERNEL_PRESENT + +int main(void) +{ + // Initialize Silicon Labs device, system, service(s) and protocol stack(s). + // Note that if the kernel is present, processing task(s) will be created by + // this call. + sl_system_init(); + + // Initialize the application. For example, create periodic timer(s) or + // task(s) if the kernel is present. + app_init(); + +#if defined(SL_CATALOG_KERNEL_PRESENT) + // Start the kernel. Task(s) created in app_init() will start running. + sl_system_kernel_start(); +#else // SL_CATALOG_KERNEL_PRESENT + while (1) { + // Do not remove this call: Silicon Labs components process action routine + // must be called from the super loop. + sl_system_process_action(); + + // Application process. + app_process_action(); + +#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) + // Let the CPU go to sleep if the system allows it. + sl_power_manager_sleep(); +#endif + } +#endif // SL_CATALOG_KERNEL_PRESENT +} diff --git a/test/test_script/enums.py b/test/test_script/enums.py new file mode 100644 index 00000000..2c1864d7 --- /dev/null +++ b/test/test_script/enums.py @@ -0,0 +1,690 @@ +# Copyright 2017 Square, Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import ctypes + + +class JLinkGlobalErrors(object): + """Enumeration for the error codes which any J-Link SDK DLL API-function + can have as a return value.""" + UNSPECIFIED_ERROR = -1 + EMU_NO_CONNECTION = -256 + EMU_COMM_ERROR = -257 + DLL_NOT_OPEN = -258 + VCC_FAILURE = -259 + INVALID_HANDLE = -260 + NO_CPU_FOUND = -261 + EMU_FEATURE_UNSUPPORTED = -262 + EMU_NO_MEMORY = -263 + TIF_STATUS_ERROR = -264 + FLASH_PROG_COMPARE_FAILED = -265 + FLASH_PROG_PROGRAM_FAILED = -266 + FLASH_PROG_VERIFY_FAILED = -267 + OPEN_FILE_FAILED = -268 + UNKNOWN_FILE_FORMAT = -269 + WRITE_TARGET_MEMORY_FAILED = -270 + DEVICE_FEATURE_NOT_SUPPORTED = -271 + WRONG_USER_CONFIG = -272 + NO_TARGET_DEVICE_SELECTED = -273 + CPU_IN_LOW_POWER_MODE = -274 + + @classmethod + def to_string(cls, error_code): + """Returns the string message for the given ``error_code``. + Args: + cls (JlinkGlobalErrors): the ``JLinkGlobalErrors`` class + error_code (int): error code to convert + Returns: + An error string corresponding to the error code. + Raises: + ValueError: if the error code is invalid. + """ + if error_code == cls.EMU_NO_CONNECTION: + return 'No connection to emulator.' + elif error_code == cls.EMU_COMM_ERROR: + return 'Emulator connection error.' + elif error_code == cls.DLL_NOT_OPEN: + return 'DLL has not been opened. Did you call \'.connect()\'?' + elif error_code == cls.VCC_FAILURE: + return 'Target system has no power.' + elif error_code == cls.INVALID_HANDLE: + return 'Given file / memory handle is invalid.' + elif error_code == cls.NO_CPU_FOUND: + return 'Could not find supported CPU.' + elif error_code == cls.EMU_FEATURE_UNSUPPORTED: + return 'Emulator does not support the selected feature.' + elif error_code == cls.EMU_NO_MEMORY: + return 'Emulator out of memory.' + elif error_code == cls.TIF_STATUS_ERROR: + return 'Target interface error.' + elif error_code == cls.FLASH_PROG_COMPARE_FAILED: + return 'Programmed data differs from source data.' + elif error_code == cls.FLASH_PROG_PROGRAM_FAILED: + return 'Programming error occurred.' + elif error_code == cls.FLASH_PROG_VERIFY_FAILED: + return 'Error while verifying programmed data.' + elif error_code == cls.OPEN_FILE_FAILED: + return 'Specified file could not be opened.' + elif error_code == cls.UNKNOWN_FILE_FORMAT: + return 'File format of selected file is not supported.' + elif error_code == cls.WRITE_TARGET_MEMORY_FAILED: + return 'Could not write target memory.' + elif error_code == cls.DEVICE_FEATURE_NOT_SUPPORTED: + return 'Feature not supported by connected device.' + elif error_code == cls.WRONG_USER_CONFIG: + return 'User configured DLL parameters incorrectly.' + elif error_code == cls.NO_TARGET_DEVICE_SELECTED: + return 'User did not specify core to connect to.' + elif error_code == cls.CPU_IN_LOW_POWER_MODE: + return 'Target CPU is in low power mode.' + elif error_code == cls.UNSPECIFIED_ERROR: + return 'Unspecified error.' + raise ValueError('Invalid error code: %d' % error_code) + + +class JLinkEraseErrors(JLinkGlobalErrors): + """Enumeration for the error codes generated during an erase operation.""" + + ILLEGAL_COMMAND = -5 + + @classmethod + def to_string(cls, error_code): + """Returns the string message for the given ``error_code``. + Args: + cls (JLinkEraseErrors): the ``JLinkEraseErrors`` class + error_code (int): error code to convert + Returns: + An error string corresponding to the error code. + Raises: + ValueError: if the error code is invalid. + """ + if error_code == cls.ILLEGAL_COMMAND: + return 'Failed to erase sector.' + return super(JLinkEraseErrors, cls).to_string(error_code) + + +class JLinkFlashErrors(JLinkGlobalErrors): + """Enumeration for the error codes generated during a flash operation.""" + + COMPARE_ERROR = -2 + PROGRAM_ERASE_ERROR = -3 + VERIFICATION_ERROR = -4 + + @classmethod + def to_string(cls, error_code): + """Returns the string message for the given ``error_code``. + Args: + cls (JLinkFlashErrors): the ``JLinkFlashErrors`` class + error_code (int): error code to convert + Returns: + An error string corresponding to the error code. + Raises: + ValueError: if the error code is invalid. + """ + if error_code == cls.COMPARE_ERROR: + return 'Error comparing flash content to programming data.' + elif error_code == cls.PROGRAM_ERASE_ERROR: + return 'Error during program/erase phase.' + elif error_code == cls.VERIFICATION_ERROR: + return 'Error verifying programmed data.' + return super(JLinkFlashErrors, cls).to_string(error_code) + + +class JLinkWriteErrors(JLinkGlobalErrors): + """Enumeration for the error codes generated during a write.""" + + ZONE_NOT_FOUND_ERROR = -5 + + @classmethod + def to_string(cls, error_code): + """Returns the string message for the given ``error_code``. + Args: + cls (JLinkWriteErrors): the ``JLinkWriteErrors`` class + error_code (int): error code to convert + Returns: + An error string corresponding to the error code. + Raises: + ValueError: if the error code is invalid. + """ + if error_code == cls.ZONE_NOT_FOUND_ERROR: + return 'Zone not found' + return super(JLinkWriteErrors, cls).to_string(error_code) + + +class JLinkReadErrors(JLinkGlobalErrors): + """Enumeration for the error codes generated during a read.""" + + ZONE_NOT_FOUND_ERROR = -5 + + @classmethod + def to_string(cls, error_code): + """Returns the string message for the given ``error_code``. + Args: + cls (JLinkReadErrors): the ``JLinkReadErrors`` class + error_code (int): error code to convert + Returns: + An error string corresponding to the error code. + Raises: + ValueError: if the error code is invalid. + """ + if error_code == cls.ZONE_NOT_FOUND_ERROR: + return 'Zone not found' + return super(JLinkReadErrors, cls).to_string(error_code) + + +class JLinkDataErrors(JLinkGlobalErrors): + """Enumeration for the error codes generated when setting a data event.""" + + ERROR_UNKNOWN = 0x80000000 + ERROR_NO_MORE_EVENTS = 0x80000001 + ERROR_NO_MORE_ADDR_COMP = 0x80000002 + ERROR_NO_MORE_DATA_COMP = 0x80000004 + ERROR_INVALID_ADDR_MASK = 0x80000020 + ERROR_INVALID_DATA_MASK = 0x80000040 + ERROR_INVALID_ACCESS_MASK = 0x80000080 + + @classmethod + def to_string(cls, error_code): + """Returns the string message for the given error code. + Args: + cls (JLinkDataErrors): the ``JLinkDataErrors`` class + error_code (int): error code to convert + Returns: + An error string corresponding to the error code. + Raises: + ValueError: if the error code is invalid. + """ + if error_code == cls.ERROR_UNKNOWN: + return 'Unknown error.' + elif error_code == cls.ERROR_NO_MORE_EVENTS: + return 'There are no more available watchpoint units.' + elif error_code == cls.ERROR_NO_MORE_ADDR_COMP: + return 'No more address comparisons can be set.' + elif error_code == cls.ERROR_NO_MORE_DATA_COMP: + return 'No more data comparisons can be set.' + elif error_code == cls.ERROR_INVALID_ADDR_MASK: + return 'Invalid flags passed for the address mask.' + elif error_code == cls.ERROR_INVALID_DATA_MASK: + return 'Invalid flags passed for the data mask.' + elif error_code == cls.ERROR_INVALID_ACCESS_MASK: + return 'Invalid flags passed for the access mask.' + return super(JLinkDataErrors, cls).to_string(error_code) + + +class JLinkRTTErrors(JLinkGlobalErrors): + """Enumeration for error codes from RTT.""" + + RTT_ERROR_CONTROL_BLOCK_NOT_FOUND = -2 + + @classmethod + def to_string(cls, error_code): + """Returns the string message for the given error code. + Args: + cls (JLinkRTTErrors): the ``JLinkRTTErrors`` class + error_code (int): error code to convert + Returns: + An error string corresponding to the error code. + Raises: + ValueError: if the error code is invalid. + """ + if error_code == cls.RTT_ERROR_CONTROL_BLOCK_NOT_FOUND: + return 'The RTT Control Block has not yet been found (wait?)' + return super(JLinkRTTErrors, cls).to_string(error_code) + + +class JLinkHost(object): + """Enumeration for the different JLink hosts: currently only IP and USB.""" + USB = (1 << 0) + IP = (1 << 1) + USB_OR_IP = USB | IP + + +class JLinkInterfaces(object): + """Target interfaces for the J-Link.""" + JTAG = 0 + SWD = 1 + FINE = 3 + ICSP = 4 + SPI = 5 + C2 = 6 + + +class JLinkResetStrategyCortexM3(object): + """Target reset strategies for the J-Link. + Attributes: + NORMAL: default reset strategy, does whatever is best to reset. + CORE: only the core is reset via the ``VECTRESET`` bit. + RESETPIN: pulls the reset pin low to reset the core and peripherals. + CONNECT_UNDER_RESET: J-Link connects to target while keeping reset + active. This is recommended for STM32 devices. + HALT_AFTER_BTL: halt the core after the bootloader is executed. + HALT_BEFORE_BTL: halt the core before the bootloader is executed. + KINETIS: performs a normal reset, but also disables the watchdog. + ADI_HALT_AFTER_KERNEL: sets the ``SYSRESETREQ`` bit in the ``AIRCR`` in + order to reset the device. + CORE_AND_PERIPHERALS: sets the ``SYSRESETREQ`` bit in the ``AIRCR``, and + the ``VC_CORERESET`` bit in the ``DEMCR`` to make sure that the CPU is + halted immediately after reset. + LPC1200: reset for LPC1200 devices. + S3FN60D: reset for Samsung S3FN60D devices. + Note: + Please see the J-Link SEGGER Documentation, UM8001, for full information + about the different reset strategies. + """ + NORMAL = 0 + CORE = 1 + RESETPIN = 2 + CONNECT_UNDER_RESET = 3 + HALT_AFTER_BTL = 4 + HALT_BEFORE_BTL = 5 + KINETIS = 6 + ADI_HALT_AFTER_KERNEL = 7 + CORE_AND_PERIPHERALS = 8 + LPC1200 = 9 + S3FN60D = 10 + + +class JLinkFunctions(object): + """Collection of function prototype and type builders for the J-Link SDK + API calls.""" + LOG_PROTOTYPE = ctypes.CFUNCTYPE(None, ctypes.c_char_p) + UNSECURE_HOOK_PROTOTYPE = ctypes.CFUNCTYPE(ctypes.c_int, + ctypes.c_char_p, + ctypes.c_char_p, + ctypes.c_uint32) + FLASH_PROGRESS_PROTOTYPE = ctypes.CFUNCTYPE(None, + ctypes.c_char_p, + ctypes.c_char_p, + ctypes.c_int) + + +class JLinkCore(object): + """Enumeration for the different CPU core identifiers. + These are the possible cores for targets the J-Link is connected to. + Note that these are bitfields.""" + NONE = 0x00000000 + ANY = 0xFFFFFFFF + CORTEX_M1 = 0x010000FF + COLDFIRE = 0x02FFFFFF + CORTEX_M3 = 0x030000FF + CORTEX_M3_R1P0 = 0x03000010 + CORTEX_M3_R1P1 = 0x03000011 + CORTEX_M3_R2P0 = 0x03000020 + SIM = 0x04FFFFFF + XSCALE = 0x05FFFFFF + CORTEX_M0 = 0x060000FF + CORTEX_M_V8BASEL = 0x060100FF + ARM7 = 0x07FFFFFF + ARM7TDMI = 0x070000FF + ARM7TDMI_R3 = 0x0700003F + ARM7TDMI_R4 = 0x0700004F + ARM7TDMI_S = 0x070001FF + ARM7TDMI_S_R3 = 0x0700013F + ARM7TDMI_S_R4 = 0x0700014F + CORTEX_A8 = 0x080000FF + CORTEX_A7 = 0x080800FF + CORTEX_A9 = 0x080900FF + CORTEX_A12 = 0x080A00FF + CORTEX_A15 = 0x080B00FF + CORTEX_A17 = 0x080C00FF + ARM9 = 0x09FFFFFF + ARM9TDMI_S = 0x090001FF + ARM920T = 0x092000FF + ARM922T = 0x092200FF + ARM926EJ_S = 0x092601FF + ARM946E_S = 0x094601FF + ARM966E_S = 0x096601FF + ARM968E_S = 0x096801FF + ARM11 = 0x0BFFFFFF + ARM1136 = 0x0B36FFFF + ARM1136J = 0x0B3602FF + ARM1136J_S = 0x0B3603FF + ARM1136JF = 0x0B3606FF + ARM1136JF_S = 0x0B3607FF + ARM1156 = 0x0B56FFFF + ARM1176 = 0x0B76FFFF + ARM1176J = 0x0B7602FF + ARM1176J_S = 0x0B7603FF + ARM1176JF = 0x0B7606FF + ARM1176JF_S = 0x0B7607FF + CORTEX_R4 = 0x0C0000FF + CORTEX_R5 = 0x0C0100FF + RX = 0x0DFFFFFF + RX610 = 0x0D00FFFF + RX62N = 0x0D01FFFF + RX62T = 0x0D02FFFF + RX63N = 0x0D03FFFF + RX630 = 0x0D04FFFF + RX63T = 0x0D05FFFF + RX621 = 0x0D06FFFF + RX62G = 0x0D07FFFF + RX631 = 0x0D08FFFF + RX210 = 0x0D10FFFF + RX21A = 0x0D11FFFF + RX220 = 0x0D12FFFF + RX230 = 0x0D13FFFF + RX231 = 0x0D14FFFF + RX23T = 0x0D15FFFF + RX111 = 0x0D20FFFF + RX110 = 0x0D21FFFF + RX113 = 0x0D22FFFF + RX64M = 0x0D30FFFF + RX71M = 0x0D31FFFF + CORTEX_M4 = 0x0E0000FF + CORTEX_M7 = 0x0E0100FF + CORTEX_M_V8MAINL = 0x0E0200FF + CORTEX_A5 = 0x0F0000FF + POWER_PC = 0x10FFFFFF + POWER_PC_N1 = 0x10FF00FF + POWER_PC_N2 = 0x10FF01FF + MIPS = 0x11FFFFFF + MIPS_M4K = 0x1100FFFF + MIPS_MICROAPTIV = 0x1101FFFF + EFM8_UNSPEC = 0x12FFFFFF + CIP51 = 0x1200FFFF + + +class JLinkDeviceFamily(object): + """Enumeration for the difference device families. + These are the possible device families for targets that the J-Link is + connected to.""" + AUTO = 0 + CORTEX_M1 = 1 + COLDFIRE = 2 + CORTEX_M3 = 3 + SIMULATOR = 4 + XSCALE = 5 + CORTEX_M0 = 6 + ARM7 = 7 + CORTEX_A8 = 8 + CORTEX_A9 = 8 + ARM9 = 9 + ARM10 = 10 + ARM11 = 11 + CORTEX_R4 = 12 + RX = 13 + CORTEX_M4 = 14 + CORTEX_A5 = 15 + POWERPC = 16 + MIPS = 17 + EFM8 = 18 + ANY = 255 + + +class JLinkFlags(object): + """Enumeration for the different flags that are passed to the J-Link C SDK + API methods.""" + GO_OVERSTEP_BP = (1 << 0) + + DLG_BUTTON_YES = (1 << 0) + DLG_BUTTON_NO = (1 << 1) + DLG_BUTTON_OK = (1 << 2) + DLG_BUTTON_CANCEL = (1 << 3) + + HW_PIN_STATUS_LOW = 0 + HW_PIN_STATUS_HIGH = 1 + HW_PIN_STATUS_UNKNOWN = 255 + + +class JLinkSWOInterfaces(object): + """Serial Wire Output (SWO) interfaces.""" + UART = 0 + MANCHESTER = 1 # DO NOT USE + + +class JLinkSWOCommands(object): + """Serial Wire Output (SWO) commands.""" + START = 0 + STOP = 1 + FLUSH = 2 + GET_SPEED_INFO = 3 + GET_NUM_BYTES = 10 + SET_BUFFERSIZE_HOST = 20 + SET_BUFFERSIZE_EMU = 21 + + +class JLinkCPUCapabilities(object): + """Target CPU Cabilities.""" + READ_MEMORY = (1 << 1) + WRITE_MEMORY = (1 << 2) + READ_REGISTERS = (1 << 3) + WRITE_REGISTERS = (1 << 4) + GO = (1 << 5) + STEP = (1 << 6) + HALT = (1 << 7) + IS_HALTED = (1 << 8) + RESET = (1 << 9) + RUN_STOP = (1 << 10) + TERMINAL = (1 << 11) + DCC = (1 << 14) + HSS = (1 << 15) + + +class JLinkHaltReasons(object): + """Halt reasons for the CPU. + Attributes: + DBGRQ: CPU has been halted because DBGRQ signal asserted. + CODE_BREAKPOINT: CPU has been halted because of code breakpoint match. + DATA_BREAKPOINT: CPU has been halted because of data breakpoint match. + VECTOR_CATCH: CPU has been halted because of vector catch. + """ + DBGRQ = 0 + CODE_BREAKPOINT = 1 + DATA_BREAKPOINT = 2 + VECTOR_CATCH = 3 + + +class JLinkVectorCatchCortexM3(object): + """Vector catch types for the ARM Cortex M3. + Attributes: + CORE_RESET: The CPU core reset. + MEM_ERROR: A memory management error occurred. + COPROCESSOR_ERROR: Usage fault error accessing the Coprocessor. + CHECK_ERROR: Usage fault error on enabled check. + STATE_ERROR: Usage fault state error. + BUS_ERROR: Normal bus error. + INT_ERROR: Interrupt or exception service error. + HARD_ERROR: Hard fault error. + """ + CORE_RESET = (1 << 0) + MEM_ERROR = (1 << 4) + COPROCESSOR_ERROR = (1 << 5) + CHECK_ERROR = (1 << 6) + STATE_ERROR = (1 << 7) + BUS_ERROR = (1 << 8) + INT_ERROR = (1 << 9) + HARD_ERROR = (1 << 10) + + +class JLinkBreakpoint(object): + """J-Link breakpoint types. + Attributes: + SW_RAM: Software breakpont located in RAM. + SW_FLASH: Software breakpoint located in flash. + SW: Software breakpoint located in RAM or flash. + HW: Hardware breakpoint. + ANY: Allows specifying any time of breakpoint. + ARM: Breakpoint in ARM mode (only available on ARM 7/9 cores). + THUMB: Breakpoint in THUMB mode (only available on ARM 7/9 cores). + """ + SW_RAM = (1 << 4) + SW_FLASH = (1 << 5) + SW = (0x000000F0) + HW = (0xFFFFFF00) + ANY = (0xFFFFFFF0) + ARM = (1 << 0) + THUMB = (2 << 0) + + +class JLinkBreakpointImplementation(object): + """J-Link breakpoint implementation types. + Attributes: + HARD: Hardware breakpoint using a breakpoint unit. + SOFT: Software breakpoint using a breakpoint instruction. + PENDING: Breakpoint has not been set yet. + FLASH: Breakpoint set in flash. + """ + HARD = (1 << 0) + SOFT = (1 << 1) + PENDING = (1 << 2) + FLASH = (1 << 4) + + +class JLinkEventTypes(object): + """J-Link data event types. + Attributes: + BREAKPOINT: breakpoint data event. + """ + BREAKPOINT = (1 << 0) + + +class JLinkAccessFlags(object): + """J-Link access types for data events. + These access types allow specifying the different types of access events + that should be monitored. + Attributes: + READ: specifies to monitor read accesses. + WRITE: specifies to monitor write accesses. + PRIVILEGED: specifies to monitor privileged accesses. + SIZE_8BIT: specifies to monitor an 8-bit access width. + SIZE_16BIT: specifies to monitor an 16-bit access width. + SIZE_32BIT: specifies to monitor an 32-bit access width. + """ + READ = (0 << 0) + WRITE = (1 << 0) + PRIV = (1 << 4) + SIZE_8BIT = (0 << 1) + SIZE_16BIT = (1 << 1) + SIZE_32BIT = (2 << 1) + + +class JLinkAccessMaskFlags(object): + """J-Link access mask flags. + Attributes: + SIZE: specifies to not care about the access size of the event. + DIR: specifies to not care about the access direction of the event. + PRIV: specifies to not care about the access privilege of the event. + """ + SIZE = (3 << 1) + DIR = (1 << 0) + PRIV = (1 << 4) + + +class JLinkStraceCommand(object): + """STRACE commands.""" + TRACE_EVENT_SET = 0 + TRACE_EVENT_CLR = 1 + TRACE_EVENT_CLR_ALL = 2 + SET_BUFFER_SIZE = 3 + + +class JLinkStraceEvent(object): + """STRACE events.""" + CODE_FETCH = 0 + DATA_ACCESS = 1 + DATA_LOAD = 2 + DATA_STORE = 3 + + +class JLinkStraceOperation(object): + """STRACE operation specifiers.""" + TRACE_START = 0 + TRACE_STOP = 1 + TRACE_INCLUDE_RANGE = 2 + TRACE_EXCLUDE_RANGE = 3 + + +class JLinkTraceSource(object): + """Sources for tracing.""" + ETB = 0 + ETM = 1 + MTB = 2 + + +class JLinkTraceCommand(object): + """J-Link trace commands.""" + START = 0x0 + STOP = 0x1 + FLUSH = 0x2 + GET_NUM_SAMPLES = 0x10 + GET_CONF_CAPACITY = 0x11 + SET_CAPACITY = 0x12 + GET_MIN_CAPACITY = 0x13 + GET_MAX_CAPACITY = 0x14 + SET_FORMAT = 0x20 + GET_FORMAT = 0x21 + GET_NUM_REGIONS = 0x30 + GET_REGION_PROPS = 0x31 + GET_REGION_PROPS_EX = 0x32 + + +class JLinkTraceFormat(object): + """J-Link trace formats. + Attributes: + FORMAT_4BIT: 4-bit data. + FORMAT_8BIT: 8-bit data. + FORMAT_16BIT: 16-bit data. + FORMAT_MULTIPLEXED: multiplexing on ETM / buffer link. + FORMAT_DEMULTIPLEXED: de-multiplexing on ETM / buffer link. + FORMAT_DOUBLE_EDGE: clock data on both ETM / buffer link edges. + FORMAT_ETM7_9: ETM7/ETM9 protocol. + FORMAT_ETM10: ETM10 protocol. + FORMAT_1BIT: 1-bit data. + FORMAT_2BIT: 2-bit data. + """ + FORMAT_4BIT = 0x1 + FORMAT_8BIT = 0x2 + FORMAT_16BIT = 0x4 + FORMAT_MULTIPLEXED = 0x8 + FORMAT_DEMULTIPLEXED = 0x10 + FORMAT_DOUBLE_EDGE = 0x20 + FORMAT_ETM7_9 = 0x40 + FORMAT_ETM10 = 0x80 + FORMAT_1BIT = 0x100 + FORMAT_2BIT = 0x200 + + +class JLinkROMTable(object): + """The J-Link ROM tables.""" + NONE = 0x100 + ETM = 0x101 + MTB = 0x102 + TPIU = 0x103 + ITM = 0x104 + DWT = 0x105 + FPB = 0x106 + NVIC = 0x107 + TMC = 0x108 + TF = 0x109 + PTM = 0x10A + ETB = 0x10B + DBG = 0x10C + APBAP = 0x10D + AHBAP = 0x10E + SECURE = 0x10F + + +class JLinkRTTCommand(object): + """RTT commands.""" + START = 0 + STOP = 1 + GETDESC = 2 + GETNUMBUF = 3 + GETSTAT = 4 + + +class JLinkRTTDirection(object): + """RTT Direction.""" + UP = 0 + DOWN = 1 diff --git a/test/test_script/errors.py b/test/test_script/errors.py new file mode 100644 index 00000000..da0961b6 --- /dev/null +++ b/test/test_script/errors.py @@ -0,0 +1,73 @@ +# Copyright 2017 Square, Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import enums +import util + + +class JLinkException(enums.JLinkGlobalErrors, Exception): + """Generic J-Link exception.""" + + def __init__(self, code): + """Generates an exception by coercing the given ``code`` to an error + string if is a number, otherwise assumes it is the message. + + Args: + self (JLinkException): the 'JLinkException' instance + code (object): message or error code + + Returns: + ``None`` + """ + message = code + + self.code = None + + if util.is_integer(code): + message = self.to_string(code) + self.code = code + + super(JLinkException, self).__init__(message) + self.message = message + + +class JLinkEraseException(enums.JLinkEraseErrors, JLinkException): + """J-Link erase exception.""" + pass + + +class JLinkFlashException(enums.JLinkFlashErrors, JLinkException): + """J-Link flash exception.""" + pass + + +class JLinkWriteException(enums.JLinkWriteErrors, JLinkException): + """J-Link write exception.""" + pass + + +class JLinkReadException(enums.JLinkReadErrors, JLinkException): + """J-Link read exception.""" + pass + + +class JLinkDataException(enums.JLinkDataErrors, JLinkException): + """J-Link data event exception.""" + pass + + +class JLinkRTTException(enums.JLinkRTTErrors, JLinkException): + """J-Link RTT exception.""" + pass +{"mode":"full","isActive":False} diff --git a/test/test_script/iec60730_test_base.py b/test/test_script/iec60730_test_base.py new file mode 100644 index 00000000..fbf582b2 --- /dev/null +++ b/test/test_script/iec60730_test_base.py @@ -0,0 +1,322 @@ +#!/usr/bin/env python +# License +# Copyright 2024 Silicon Laboratories Inc. www.silabs.com +# ******************************************************************************* +# +# The licensor of this software is Silicon Laboratories Inc. Your use of this +# software is governed by the terms of Silicon Labs Master Software License +# Agreement (MSLA) available at +# www.silabs.com/about-us/legal/master-software-license-agreement. This +# software is distributed to you in Source Code format and is governed by the +# sections of the MSLA applicable to Source Code. +# ******************************************************************************* + +import sys +import os +import jlink +import logging +import re + +from os import listdir + +variables = {} +asm_labels = {} +chip_name = "" +adapter_serial_no = "" +lst_file_path = "" +lib_path = "" +compiler = "" + +class iec60730_logger: + @staticmethod + def init_logger(): + logging.basicConfig(level=logging.INFO, + format='%(asctime)s - %(levelname)s: %(message)s') + logger = logging.getLogger() + # Create file handler which logs even debug messages + full_path = os.path.realpath(__file__) + dir_path = os.path.dirname(full_path) + log_report = dir_path + "/../../log/" + "temp.log" + file_handler = logging.FileHandler(filename=log_report) + file_handler.setLevel(logging.INFO) + formatter = logging.Formatter('%(asctime)s - %(levelname)s - %(message)s') + file_handler.setFormatter(formatter) + logger.addHandler(file_handler) + logger.propagate = False + return logger + def remove_handler(): + # Remove all handlers associated with the root logger object. + for handler in logging.root.handlers[:]: + handler.close() + logging.root.removeHandler(handler) + + +class iec60730TestBase(): + + def env_setup(self, + adapter_serial_no, + chip_name, + lst_file_path, + library_path, + comp = "GCC"): + self._chip_name = chip_name + self._adapter_serial_no = adapter_serial_no + self._output_path = lst_file_path + self._library_path = library_path + self._compiler = comp + iec60730_logger.remove_handler() + self.logger = iec60730_logger.init_logger() + + def _initialize(self): + self._adapter_list = self._jlink._adapter_list + return None + + def init_connect_group(self): + self._is_connected = False + self._adapter_serial_number = "0" + + def connect_mcu(self, chip_name): + if self._is_connected: + self.init_connect_group() + self._jlink.close() + msg = "Disconnected" + else: + result = self._jlink.connect(int(self._adapter_serial_number), chip_name) + if not result: + msg = "Connect failed." + else: + msg = "Connected to " + self._jlink._part_number + self._is_connected = True + logging.info(msg) + return False + + def re_connect_mcu(self): + logging.info("Re-connecting to MCU...") + if self._is_connected: + self._is_connected = False + #logging.info("Adapter is being used. Closing it...") + #self._jlink.close() + #logging.info("Closed") + result = self._jlink.connect(int(self._adapter_serial_number), self._chip_name) + if not result: + msg = "Connect failed." + else: + msg = "Connected to " + self._jlink._part_number + self._is_connected = True + logging.info(msg) + return False + + def adapter_close(self): + self._is_connected = False + self._jlink.close() + logging.info("Adapter Closed.") + + def flash_mcu(self): + if self._is_connected: + file_name = self.pathLineEdit.text() + if os.path.isfile(file_name): + offset = int("0x" + self.startAddrLineEdit.text(), 16) + result = self._jlink.erase_chip() + if not result: + self.init_connect_group() + self._jlink.close() + msg = "Erase failed." + self.statusBar().showMessage(msg) + return + self._jlink.download(file_name, offset) + if self.resetMCUCheckBox.checkState(): + self._jlink.reset(False) + msg = "Program done." + else: + msg = "Please select a file to download." + else: + msg = "Please connect to device." + logging.debug(msg) + return + + def erase_mcu(self): + if self._is_connected: + result = self._jlink.erase_chip() + if not result: + self.init_connect_group() + self._jlink.close() + msg = "Erase failed." + else: + msg = "Erase done." + else: + msg = "Please connect to device." + logging.debug(msg) + return + + def scan_adapter(self, serial_number, chip_name): + num_adapters, adapter_list = self._jlink.get_usb_adapter_list() + + if (num_adapters == 0): + return + + logging.info("Adapter list: ") + for i in range(num_adapters): + adapter = adapter_list[i] + logging.info(str(i) + ". " + str(adapter.SerialNumber)) + if serial_number == str(adapter.SerialNumber): + index = i + + if index < 0 or index >= num_adapters: + logging.info("No adapter with serial number %s " % serial_number) + return + + logging.info("Select adapter " + str(serial_number)) + + adapter = adapter_list[index] + self._adapter_serial_number = str(serial_number) + return self.connect_mcu(chip_name) + + def pre_exec_test(self): + files = os.listdir(self._output_path) + + lst_path = '' + + for file in files: + if (".lst" in file): + lst_path = self._output_path + '/' + file + break + + symbol_table = False + + # Check Compiler GCC/IAR + if self._compiler == "GCC" : + with open(lst_path, encoding = 'utf-8') as lst_file: + for line in lst_file : + if "SYMBOL TABLE:" in line : + symbol_table = True + + if (symbol_table == True) and line.isspace() : + break + + if symbol_table == True : + if ((".IEC60730" in line) or ("IEC60730" in line) or ("iec60730" in line)) \ + and (".text" in line) : + address_string = re.search("^\S*", line).group(0) + label = re.search("\S*$", line).group(0) + asm_labels[label] = int(address_string, 16) + # print("Text[{}] = 0x{}".format(label, address_string)) + + if (".bss" in line) or (".data" in line) or (".user_classb" in line) \ + or (".crc" in line) or (".ram_no_clear" in line) or ("ram_ret_no_clear" in line) \ + or (".stack_check" in line): + address_string = re.search("^\S*", line).group(0) + label = re.search("\S*$", line).group(0) + variables[label] = int(address_string, 16) + # print("Data[{}] = 0x{}".format(label, address_string)) + elif self._compiler == "IAR": + count_space = 0 + with open(lst_path, encoding = 'utf-8') as lst_file: + for line in lst_file : + if ".symtab:" in line : + symbol_table = True + + if (symbol_table == True) and line.isspace() : + count_space = count_space + 1 + if count_space == 3: + break + + if symbol_table == True : + str_line = re.split(r'\s+', line) + # print(str_line) + if len(str_line) <= 2: + continue + label = str_line[2] + line_addr = "" + if len(str_line) <= 4: + line_addr = next(lst_file) + str_line_addr = re.split(r'\s+', line_addr) + address_string = str_line_addr[1].replace("'", "") + # print(str_line_addr) + else: + address_string = str_line[3].replace("'", "") + + if ("Code" in line) or ("Code" in line_addr): + if ("??IEC60730" in line) or ("IEC60730" in line) or ("iec60730" in line): + asm_labels[label] = int(address_string, 16) - 1 + #print("Code[{}] = {}".format(label, address_string)) + elif ("Data" in line) or ("Data" in line_addr): + variables[label] = int(address_string, 16) + # print("Data[{}] = {}".format(label, address_string)) + + self._jlink = jlink.JLinkDll(self._library_path) + self.adapter = self._jlink + self._is_connected = False + self._adapter_serial_number = "0" + self._initialize() + self.scan_adapter(self._adapter_serial_no, self._chip_name) + #self.logger = LogGen.loggen() + + def post_exec_test(self): + self.init_connect_group() + self._jlink.close() + logging.info("Disconnected") + + def get_variable_address(self, relative_path, var_name): + files = os.listdir(self._output_path + relative_path) + + map_path = '' + for file in files: + if (".map" in file): + map_path = self._output_path + relative_path + file + break + + is_search_addr = False + address_string = '0' + with open(map_path, encoding = 'utf-8') as map_file: + if self._compiler == "GCC" : + for line in map_file: + if (('.'+var_name) in line): + is_search_addr = True + continue + + #print(line) + + if is_search_addr == True \ + and var_name in line: + address_string = re.search("0x(.*?) ", line).group(1) + break + elif self._compiler == "IAR": + for line in map_file: + if (var_name in line): + address_string = re.search("0x(.*?) ", line.replace("'", "")).group(1) + break + + return int(address_string, 16) + + def get_label(self, address): + if address in asm_labels.values(): + return list(asm_labels.keys())[list(asm_labels.values()).index(address)] + return hex(address) + + def set_chip_name(self, chip_name): + self._chip_name = chip_name + +def iec60730_test_case(testcase): + def _iec60730_test_case(f): + def wrapper(self,*args): + self.pre_exec_test() + logging.info("----------------- Start testcase: " + testcase) + print("{}: ".format(testcase)) + result = f(self, *args) + # try: + # result = f(self, *args) + # except Exception as e: + # print ("Exception msg: {}".format(e)) + # result = False + # print result of test case 0: pass 1:fail + print (result) + logging.info("Result testcase {}: {}".format(testcase, result)) + logging.info("----------------- End testcase: ") + self.post_exec_test() + return result + return wrapper + return _iec60730_test_case + +# Main Function +if __name__ == '__main__': + print("iec60730TestBase") diff --git a/test/test_script/integration_test_iec60730_cpu_registers.py b/test/test_script/integration_test_iec60730_cpu_registers.py new file mode 100644 index 00000000..97871569 --- /dev/null +++ b/test/test_script/integration_test_iec60730_cpu_registers.py @@ -0,0 +1,606 @@ +#!/usr/bin/env python +# License +# Copyright 2024 Silicon Laboratories Inc. www.silabs.com +# ******************************************************************************* +# +# The licensor of this software is Silicon Laboratories Inc. Your use of this +# software is governed by the terms of Silicon Labs Master Software License +# Agreement (MSLA) available at +# www.silabs.com/about-us/legal/master-software-license-agreement. This +# software is distributed to you in Source Code format and is governed by the +# sections of the MSLA applicable to Source Code. +# ******************************************************************************* + +## @addtogroup IEC60730_INTEGRATION_TEST +# @{ +# @defgroup IEC60730_CPU_REGISTERS_VERIFICATION CPU Register Check Automated Verification Tests +# @{ +# Python script for the IEC60730 CPU Register Check Verification tests. +# +# For details on the tests, see iec60730_cpu_registers.iec60730_cpu_regs. +# +#@section cpu_registers_test_results Test Results +# +#EFR32 Device | Test Results +#-------------|------------- + +from binascii import hexlify +import random +import os +import sys +from time import sleep + +from iec60730_test_base import * +import jlink, jlink_constants +import unittest +import enums + +def int_to_bytes(number: int) -> bytes: + return number.to_bytes(length=(8 + (number + (number < 0)).bit_length()) // 8, byteorder='big', signed=True) + + +## IEC60730 CPU Register Check Tests +# +# @details This class runs IEC60730 CPU Register tests. +# +# Hardware setup: +# Connect DUT to PC. No additional hardware setup required. + +class iec60730_cpu_regs(unittest.TestCase, iec60730TestBase): + ## Text name of the test suite, used in XML output. + TEST_SUITE_NAME = "CPU_REGS" + + ## Set up connect device. + def setUp(self): + self.env_setup(adapter_serial_no, chip_name, lst_file_path, lib_path, compiler) + + ## Supports setting breakpoints and changing test register values + def core_register_common_test(self, + bkp_label_inject, + bkp_testcase_pass, + bkp_fail, + reg_test, + reg_mask, + reg_new_value = [0]): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + + # if compiler == "IAR" and ("IEC60730" in bkp_label_inject) : + # bkp_label_inject = "??" + bkp_label_inject + + # if compiler == "IAR" and ("IEC60730" in bkp_fail) : + # bkp_fail = "??" + bkp_fail + + # if compiler == "IAR" and ("IEC60730" in bkp_testcase_pass) : + # bkp_testcase_pass = "??" + bkp_testcase_pass + + self.adapter.set_breakpoint(address = asm_labels[bkp_label_inject], + typeflags=enums.JLinkBreakpoint.ANY) + + self.adapter.set_breakpoint(address = asm_labels[bkp_fail], + typeflags=enums.JLinkBreakpoint.ANY) + + self.adapter.set_breakpoint(address = asm_labels[bkp_testcase_pass], + typeflags=enums.JLinkBreakpoint.ANY) + + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(0.5) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels[bkp_label_inject],\ + "DUT failed to stop at " + bkp_label_inject + ", " + hex(asm_labels[bkp_label_inject]) +\ + " , pc = " + hex(pc)) + + reg_value = self.adapter.register_read(reg_test) + logging.info("Old value of " + reg_test + ": " + str(int_to_bytes(reg_value))) + + if reg_mask != 0: + self.adapter.register_write(reg_test, reg_mask & reg_value) + else: + for i in reg_new_value: + self.adapter.register_write(reg_test, i) + + reg_value = self.adapter.register_read(reg_test) + logging.info("New value of " + reg_test + ": " + str(int_to_bytes(reg_value))) + + pc = self.adapter.run_to_breakpoint(0.1) + logging.info("Halted at label: " + self.get_label(pc) + " " + hex(pc)) + + self.assertEqual(pc, asm_labels[bkp_testcase_pass], \ + "DUT failed to stop at " + bkp_testcase_pass + \ + ", pc = " + hex(pc)) + + logging.info("DUT successfully detected register " + reg_test + " stuck-at") + + return True + + + + @iec60730_test_case('TC: Verify Core Registers APSR, R0-R2, LR') + ## Verify the error detected correctly on the Core Registers APSR, R0-R2, LR. + # @details Order of execution: + # - Verify error detecting on APSR + # - Verify error detecting on R0-R2 + # - Verify error detecting on R2-R13 + # - Verify error detecting on LR + # - Test passes, return True + # + # @return True + # + def test_01_core_register_apsr(self): + self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_CORE_Z_FLAG_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_CORE_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT', + reg_test = 'APSR', + reg_mask = 0xBFFFFFFF) + + + self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_CORE_N_FLAG_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_CORE_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT', + reg_test = 'APSR', + reg_mask = 0x7FFFFFFF) + + self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_CORE_C_FLAG_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_CORE_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT', + reg_test = 'APSR', + reg_mask = 0xDFFFFFFF) + + self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_CORE_V_FLAG_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_CORE_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT', + reg_test = 'APSR', + reg_mask = 0xEFFFFFFF) + + + write_value = [0xAAAAAAAB] + + for i in range(2): + logging.info("Testing register R" + str(i)) + fp_reg = 'R' + str(i) + bkp__inject = 'IEC60730_CPU_REGS_CORE_R' + str(i) + '_ASM_BKPT' + + self.core_register_common_test(bkp_label_inject = bkp__inject, + bkp_testcase_pass = 'IEC60730_CPU_REGS_CORE_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT', + reg_test = fp_reg, + reg_mask = 0, + reg_new_value = write_value) + + for i in range(2,13): + logging.info("Testing register R" + str(i)) + fp_reg = 'R' + str(i) + bkp__inject = 'IEC60730_CPU_REGS_CORE_R' + str(i) + '_ASM_BKPT' + + result = self.core_register_common_test(bkp_label_inject = bkp__inject, + bkp_testcase_pass = 'IEC60730_CPU_REGS_CORE_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT', + reg_test = fp_reg, + reg_mask = 0, + reg_new_value = write_value) + if result != True: + return result + + self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_CORE_LR_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_CORE_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CORE_PASS_ASM_BKPT', + reg_test = 'R14', + reg_mask = 0, + reg_new_value = write_value) + + return True + + @iec60730_test_case('TC: Verify MSP_NS') + ## Verify the error detected correctly on the Core Registers MSP_NS. + # @details Order of execution: + # - Verify error detecting on MSP_NS + # - Test passes, return True + # + # @return True + # + def test_02_msp_ns_register(self): + if -1 != chip_name.find("G2"): + + write_value = [0xAAAAAAA9, 0xAAAAAAAA, 0xAAAAAAAB, 0xAAAAAAAC, 0xAAAAAAAD] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_MSP_NS_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_FAIL_ENDLESS_LOOP_MSP_NS', + bkp_fail = 'IEC60730_CPU_REGS_MSP_NS_PASS_ASM_BKPT', + reg_test = 'MSP_NS', + reg_mask = 0, + reg_new_value = write_value) + else: + logging.info("Device does not support secure extension. Test case is passed by default.") + return True + + + @iec60730_test_case('TC: Verify MSP_S') + ## Verify the error detected correctly on the Register MSP_S. + # @details Order of execution: + # - Verify error detecting on MSP_S + # - Test passes, return True + # + # @return True + # + def test_03_msp_s_register(self): + + write_value = [0xAAAAAAA9, 0xAAAAAAAA, 0xAAAAAAAB, 0xAAAAAAAC, 0xAAAAAAAD] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_MSP_S_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_FAIL_ENDLESS_LOOP_MSP_S', + bkp_fail = 'IEC60730_CPU_REGS_MSP_S_PASS_ASM_BKPT', + reg_test = 'MSP', + reg_mask = 0, + reg_new_value = write_value) + + + @iec60730_test_case('TC: Verify PSP_NS') + ## Verify the error detected correctly on the Register PSP_NS. + # @details Order of execution: + # - Verify error detecting on PSP_NS + # - Test passes, return True + # + # @return True + # + def test_04_psp_ns_register(self): + if -1 != chip_name.find("G2"): + + write_value = [0xAAAAAAA9, 0xAAAAAAAA, 0xAAAAAAAB, 0xAAAAAAAC, 0xAAAAAAAD] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_PSP_NS_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_FAIL_ENDLESS_LOOP_PSP_NS', + bkp_fail = 'IEC60730_CPU_REGS_PSP_NS_PASS_ASM_BKPT', + reg_test = 'PSP_NS', + reg_mask = 0, + reg_new_value = write_value) + else: + logging.info("Device does not support secure extension. Test case is passed by default.") + return True + + @iec60730_test_case('TC: Verify PSP_S') + ## Verify the error detected correctly on the Register PSP_S. + # @details Order of execution: + # - Verify error detecting on PSP_S + # - Test passes, return True + # + # @return True + # + def test_05_psp_s_register(self): + + write_value = [0xAAAAAAA9, 0xAAAAAAAA, 0xAAAAAAAB, 0xAAAAAAAC, 0xAAAAAAAD] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_PSP_S_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_FAIL_ENDLESS_LOOP_PSP_S', + bkp_fail = 'IEC60730_CPU_REGS_PSP_S_PASS_ASM_BKPT', + reg_test = 'PSP', + reg_mask = 0, + reg_new_value = write_value) + + + @iec60730_test_case('TC: Verify MSPLIM_NS') + ## Verify the error detected correctly on the Register MSPLIM_NS. + # @details Order of execution: + # - Verify error detecting on MSPLIM_NS + # - Test passes, return True + # + # @return True + # + def test_06_msplim_ns_register(self): + if -1 != chip_name.find("G2"): + + write_value = [0xAAAAAAA9, 0xAAAAAAAA, 0xAAAAAAAB, 0xAAAAAAAC, 0xAAAAAAAD, \ + 0xAAAAAAAE, 0xAAAAAAAF, 0xAAAAAAB0, 0xAAAAAAB1, 0xAAAAAAB2] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_MSPLIM_NS_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_NS', + bkp_fail = 'IEC60730_CPU_REGS_MSPLIM_NS_PASS_ASM_BKPT', + reg_test = 'MSPLIM_NS', + reg_mask = 0, + reg_new_value = write_value) + else: + logging.info("Device does not support secure extension. Test case is passed by default.") + return True + + @iec60730_test_case('TC: Verify MSPLIM_S') + ## Verify the error detected correctly on the Register MSPLIM_S. + # @details Order of execution: + # - Verify error detecting on MSPLIM_S + # - Test passes, return True + # + # @return True + # + def test_07_msplim_s_register(self): + if -1 != chip_name.find("G2"): + + write_value = [0xAAAAAAA9, 0xAAAAAAAA, 0xAAAAAAAB, 0xAAAAAAAC, 0xAAAAAAAD, \ + 0xAAAAAAAE, 0xAAAAAAAF, 0xAAAAAAB0, 0xAAAAAAB1, 0xAAAAAAB2] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_MSPLIM_S_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_FAIL_ENDLESS_LOOP_MSPLIM_S', + bkp_fail = 'IEC60730_CPU_REGS_MSPLIM_S_PASS_ASM_BKPT', + reg_test = 'MSPLIM', + reg_mask = 0, + reg_new_value = write_value) + else: + logging.info("Device does not support MSPLIM. Test case is passed by default.") + return True + + @iec60730_test_case('TC: Verify PSPLIM_NS') + ## Verify the error detected correctly on the Register PSPLIM_NS. + # @details Order of execution: + # - Verify error detecting on PSPLIM_NS + # - Test passes, return True + # + # @return True + # + def test_08_psplim_ns_register(self): + if -1 != chip_name.find("G2"): + + write_value = [0xAAAAAAA9, 0xAAAAAAAA, 0xAAAAAAAB, 0xAAAAAAAC, 0xAAAAAAAD, \ + 0xAAAAAAAE, 0xAAAAAAAF, 0xAAAAAAB0, 0xAAAAAAB1, 0xAAAAAAB2] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_PSPLIM_NS_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_NS', + bkp_fail = 'IEC60730_CPU_REGS_PSPLIM_NS_PASS_ASM_BKPT', + reg_test = 'PSPLIM_NS', + reg_mask = 0, + reg_new_value = write_value) + else: + logging.info("Device does not support secure extension. Test case is passed by default.") + return True + + @iec60730_test_case('TC: Verify PSPLIM_S') + ## Verify the error detected correctly on the Register PSPLIM_S. + # @details Order of execution: + # - Verify error detecting on PSPLIM_S + # - Test passes, return True + # + # @return True + # + def test_09_psplim_s_register(self): + if -1 != chip_name.find("G2"): + + write_value = [0xAAAAAAA9, 0xAAAAAAAA, 0xAAAAAAAB, 0xAAAAAAAC, 0xAAAAAAAD, \ + 0xAAAAAAAE, 0xAAAAAAAF, 0xAAAAAAB0, 0xAAAAAAB1, 0xAAAAAAB2] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_PSPLIM_S_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_FAIL_ENDLESS_LOOP_PSPLIM_S', + bkp_fail = 'IEC60730_CPU_REGS_PSPLIM_S_PASS_ASM_BKPT', + reg_test = 'PSPLIM', + reg_mask = 0, + reg_new_value = write_value) + else: + logging.info("Device does not support PSPLIM. Test case is passed by default.") + return True + + @iec60730_test_case('TC: Verify CONTROL_NS') + ## Verify the error detected correctly on the Register CONTROL_NS. + # @details Order of execution: + # - Verify error detecting on CONTROL_NS + # - Test passes, return True + # + # @return True + # + def test_10_control_ns_register(self): + if -1 != chip_name.find("G2"): + + self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_CONTROL_NS_SPSEL_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_CONTROL_NS_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CONTROL_NS_PASS_ASM_BKPT', + reg_test = 'CONTROL_NS', + reg_mask = 0) + + self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_CONTROL_NS_FPCA_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_CONTROL_NS_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CONTROL_NS_PASS_ASM_BKPT', + reg_test = 'CONTROL_NS', + reg_mask = 0) + else: + logging.info("Device does not support secure extension. Test case is passed by default.") + return True + + + @iec60730_test_case('TC: Verify CONTROL_S') + ## Verify the error detected correctly on the Register CONTROL_S. + # @details Order of execution: + # - Verify error detecting on CONTROL_S + # - Test passes, return True + # + # @return True + # + def test_11_control_s_register(self): + + self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_CONTROL_S_SPSEL_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_CONTROL_S_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CONTROL_S_PASS_ASM_BKPT', + reg_test = 'CONTROL', + reg_mask = 0) + + self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_CONTROL_S_FPCA_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_CONTROL_S_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_CONTROL_S_PASS_ASM_BKPT', + reg_test = 'CONTROL', + reg_mask = 0) + + return True + + + @iec60730_test_case('TC: Verify PRIMASK_NS') + ## Verify the error detected correctly on the Register PRIMASK_NS. + # @details Order of execution: + # - Verify error detecting on PRIMASK_NS + # - Test passes, return True + # + # @return True + # + def test_12_primask_ns_register(self): + if -1 != chip_name.find("G2"): + + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_PRIMASK_NS_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_PRIMASK_NS_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_PRIMASK_NS_PASS_ASM_BKPT', + reg_test = 'PRIMASK_NS', + reg_mask = 0) + else: + logging.info("Device does not support secure extension. Test case is passed by default.") + return True + + @iec60730_test_case('TC: Verify PRIMASK_S') + ## Verify the error detected correctly on the Register PRIMASK_S. + # @details Order of execution: + # - Verify error detecting on PRIMASK_S + # - Test passes, return True + # + # @return True + # + def test_13_primask_s_register(self): + + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_PRIMASK_S_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_PRIMASK_S_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_PRIMASK_S_PASS_ASM_BKPT', + reg_test = 'PRIMASK', + reg_mask = 0) + + + @iec60730_test_case('TC: Verify BASEPRI_NS') + ## Verify the error detected correctly on the Register BASEPRI_NS. + # @details Order of execution: + # - Verify error detecting on BASEPRI_NS + # - Test passes, return True + # + # @return True + # + def test_14_basepri_ns_register(self): + if -1 != chip_name.find("G2"): + + write_value = [0x9000] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_BASEPRI_NS_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_BASEPRI_NS_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_BASEPRI_NS_PASS_ASM_BKPT', + reg_test = 'BASEPRI_NS', + reg_mask = 0, + reg_new_value = write_value) + else: + logging.info("Device does not support secure extension. Test case is passed by default.") + return True + + @iec60730_test_case('TC: Verify BASEPRI_S') + ## Verify the error detected correctly on the Register BASEPRI_S. + # @details Order of execution: + # - Verify error detecting on BASEPRI_S + # - Test passes, return True + # + # @return True + # + def test_15_basepri_s_register(self): + + write_value = [0x9000] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_BASEPRI_S_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_BASEPRI_S_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_BASEPRI_S_PASS_ASM_BKPT', + reg_test = 'BASEPRI', + reg_mask = 0, + reg_new_value = write_value) + + + @iec60730_test_case('TC: Verify FAULTMASK_NS') + ## Verify the error detected correctly on the Register FAULTMASK_NS. + # @details Order of execution: + # - Verify error detecting on FAULTMASK_NS + # - Test passes, return True + # + # @return True + # + def test_16_faultmask_ns_register(self): + if -1 != chip_name.find("G2"): + + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_FAULTMASK_NS_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_FAULTMASK_NS_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_FAULTMASK_NS_PASS_ASM_BKPT', + reg_test = 'FAULTMASK_NS', + reg_mask = 0) + else: + logging.info("Device does not support secure extension. Test case is passed by default.") + return True + + @iec60730_test_case('TC: Verify FAULTMASK_S') + ## Verify the error detected correctly on the Register FAULTMASK_S. + # @details Order of execution: + # - Verify error detecting on FAULTMASK_S + # - Test passes, return True + # + # @return True + # + def test_17_faultmask_s_register(self): + + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_FAULTMASK_S_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_FAULTMASK_S_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_FAULTMASK_S_PASS_ASM_BKPT', + reg_test = 'FAULTMASK', + reg_mask = 0) + + + @iec60730_test_case('TC: Verify FPU FPSCR') + ## Verify the error detected correctly on the Register FPSCR. + # @details Order of execution: + # - Verify error detecting on FPSCR + # - Test passes, return True + # + # @return True + # + def test_18_fpr_fpscr_register(self): + + write_value = [0x0000] + return self.core_register_common_test(bkp_label_inject = 'IEC60730_CPU_REGS_FPU_FPSCR_ASM_BKPT', + bkp_testcase_pass = 'IEC60730_CPU_REGS_FPU_FPSCR_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_FPU_FPSCR_PASS_ASM_BKPT', + reg_test = 'FPSCR', + reg_mask = 0, + reg_new_value = write_value) + + + @iec60730_test_case('TC: Verify FPU S0 - S31') + ## Verify the error detected correctly on the FPU Registers S0 - S31. + # @details Order of execution: + # - Verify error detecting on S0 - S31 + # - Test passes, return True + # + # @return True + # + def test_19_fpu_sx_register(self): + + write_value = [0x55555556] + + for i in range(32): + fp_reg = 'FPS' + str(i) + bkp__inject = 'IEC60730_CPU_REGS_FPU_S' + str(i) + '_ASM_BKPT' + result = self.core_register_common_test(bkp_label_inject = bkp__inject, + bkp_testcase_pass = 'IEC60730_CPU_REGS_FPU_Sx_FAIL', + bkp_fail = 'IEC60730_CPU_REGS_FPU_Sx_PASS_ASM_BKPT', + reg_test = fp_reg, + reg_mask = 0, + reg_new_value = write_value) + + if result != True: + return result + return True + +if __name__ == "__main__": + + ## Chip name run test + chip_name = os.getenv('CHIP') + + ## Path to file *.lst + lst_file_path = os.getenv('LST_PATH') + + ## serialno of device + adapter_serial_no = os.getenv('ADAPTER_SN') + + ## Path to jlink library + lib_path = os.getenv('JLINK_PATH') + + while len(sys.argv) > 1: + ## Number of arguments passed into the script file + line = sys.argv.pop() + if len(sys.argv) == 1: + ## compiler creates the file *.lst + compiler = line + + print("Compiler: "+compiler) + + unittest.main() + +## @} +# @} diff --git a/test/test_script/integration_test_iec60730_invariable_memory.py b/test/test_script/integration_test_iec60730_invariable_memory.py new file mode 100644 index 00000000..2e5a69d4 --- /dev/null +++ b/test/test_script/integration_test_iec60730_invariable_memory.py @@ -0,0 +1,368 @@ +#!/usr/bin/env python +# License +# Copyright 2024 Silicon Laboratories Inc. www.silabs.com +# ******************************************************************************* +# +# The licensor of this software is Silicon Laboratories Inc. Your use of this +# software is governed by the terms of Silicon Labs Master Software License +# Agreement (MSLA) available at +# www.silabs.com/about-us/legal/master-software-license-agreement. This +# software is distributed to you in Source Code format and is governed by the +# sections of the MSLA applicable to Source Code. +# ******************************************************************************* + +## @addtogroup IEC60730_INTEGRATION_TEST +# @{ +# @defgroup IEC60730_INVARIABLE_MEMORY_VERIFICATION Invariable Memory Automated Verification Tests +# @{ +# Python script for the IEC60730 Invariable Memory plausibility verification tests. +# +# For details on the tests, see iec60730_invariable_memory.iec60730_invariable_memory. +# +#@section irq_test_results Test Results +# +#EFR32 Device| Test Results +#------------|------------- + +from binascii import hexlify +import random +import os +import sys +from time import sleep + +from iec60730_test_base import * +import jlink, jlink_constants +import unittest +import enums + +is_crc32 = False + +## IEC60730 Invariable Memory Plausibility Verification Tests +# +# @details This class runs IEC60730 verification tests for the invariable memory plausibility test. +# +# Hardware setup: +# Connect DUT to PC. No additional hardware setup required. +class iec60730_imc(unittest.TestCase, iec60730TestBase): + ## Text name of the test suite, used in XML output. + TEST_SUITE_NAME = "IMC" + + ## Set up connect device. + def setUp(self): + self.env_setup(adapter_serial_no, chip_name, lst_file_path, lib_path, compiler) + + ## Set breakpoint. + def set_breakpoint(self, label) : + self.adapter.set_breakpoint(address = asm_labels[label], + typeflags=enums.JLinkBreakpoint.ANY) + + ## Run to breakpoint. + def reach_to_breakpoint(self, label, setbkp, time) : + if setbkp : + self.set_breakpoint(label) + + pc = self.adapter.run_to_breakpoint(time) + self.assertEqual(pc, asm_labels[label], \ + "DUT failed to stop at " + label + \ + ", pc = " + hex(pc) + \ + ", setbkp = " + str(setbkp)) + + @iec60730_test_case('TC: Calculate CRC for the entire flash memory') + ## Verify the DUT calculation of CRC value at POST. This test case (TC) checks + # under normal conditions with no exceptions, firmware will calculate the CRC + # of the entire flash, the calculated value SHOULD be equal to the calculated + # value stored in the flash. + # + # @details Order of execution + # - Reset device + # - Verify code reaches breakpoint at IEC60730_IMC_POST_START_BKPT + # - Verify code reaches breakpoint at IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT + # - Verify code reaches breakpoint at IEC60730_IMC_POST_END_BKPT + # + # @return True + # + def test_cal_crc_full_memory(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + + # Reset device & run to break point + self.adapter.reset() + + # reach to break point IEC60730_IMC_POST_START_BKPT + self.reach_to_breakpoint('IEC60730_IMC_POST_START_BKPT', True, 1) + + # Verify initial value of iec60730_ref_crc + iec60730_ref_crc_location = variables['iec60730_ref_crc'] + if is_crc32 : + iec60730_ref_crc = self.adapter.memory_read32(iec60730_ref_crc_location, 1) + else : + iec60730_ref_crc = self.adapter.memory_read16(iec60730_ref_crc_location, 1) + + # Debug + logging.info("DUT iec60730_ref_crc=" + hex(iec60730_ref_crc[0]) + " at " + hex(iec60730_ref_crc_location)) + + if 0 != iec60730_ref_crc[0] : + logging.info("DUT value of iec60730_ref_crc not equal 0") + return False + + # reach to break point IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT + self.reach_to_breakpoint('IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT', True, 1) + + # print value of iec60730_ref_crc + if is_crc32 : + iec60730_ref_crc = self.adapter.memory_read32(iec60730_ref_crc_location, 1) + else : + iec60730_ref_crc = self.adapter.memory_read16(iec60730_ref_crc_location, 1) + + # Debug + logging.info("DUT iec60730_ref_crc=" + hex(iec60730_ref_crc[0])) + + # clear all break point + self.adapter.clear_all_breakpoints() + + # reach to break point IEC60730_IMC_POST_END_BKPT + self.reach_to_breakpoint('IEC60730_IMC_POST_END_BKPT', True, 1) + + return True + + @iec60730_test_case('TC: Corrupt CRC for the entire flash memory') + ## Verify the DUT jump to #sl_iec60730_safe_state when flash faied at POST. + # This TC simulates an abnormal situation that causes the variable \ref iec60730_ref_crc + # to be changed, resulting in the calculated CRC value for the entire flash + # being different from the value stored in the flash. This leads to jump to + # break point at #sl_iec60730_safe_state. + # + # In the IMC documentation there is a detailed description of the variable + # \ref iec60730_ref_crc. + # + # @details Order of execution + # - Reset device + # - Verify code reaches breakpoint at IEC60730_IMC_POST_START_BKPT + # - Verify code reaches breakpoint at IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT + # - Edit value of \ref iec60730_ref_crc variable + # - Verify execution breaks at #sl_iec60730_safe_state() + # + # @return True + # + def test_corrupt_crc_full_memory(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + + # Reset device & jump to break point + self.adapter.reset() + + # reach to break point IEC60730_IMC_POST_START_BKPT + self.reach_to_breakpoint('IEC60730_IMC_POST_START_BKPT', True, 1) + + # reach to break point IEC60730_IMC_POST_START_BKPT + self.reach_to_breakpoint('IEC60730_IMC_POST_IEC60730_REF_CRC_BKPT', True, 1) + + # Set iec60730_ref_crc to {0x0000} + iec60730_ref_crc_location = variables['iec60730_ref_crc'] + if is_crc32 : + self.adapter.memory_write32(iec60730_ref_crc_location, data = {0x00000000}) + else : + self.adapter.memory_write16(iec60730_ref_crc_location, data = {0x0000}) + + # Debug + logging.info("DUT iec60730_ref_crc at " + hex(iec60730_ref_crc_location)) + + # Set break point at sl_iec60730_safe_state + self.adapter.clear_all_breakpoints() + + # reach to break point sl_iec60730_safe_state + self.reach_to_breakpoint('sl_iec60730_safe_state', True, 1) + + return True + + @iec60730_test_case('TC: Calculate CRC for the Block flash memory') + ## Verify the DUT calculation of CRC value at BIST. This TC checks under normal + # conditions with no exceptions, firmware will calculate the CRC values for each + # step of BIST and accumulate these values. Finally, the calculated CRC value + # SHOULD be equal to the value stored in the flash. + # + # @details Order of execution + # - Reset device + # - Verify code reaches breakpoint at IEC60730_IMC_BIST_CRCBLOCK_BKPT + # - Loop with IEC60730_IMC_BIST_CALCRC_BKPT + # - Verify code reaches breakpoint at IEC60730_IMC_BIST_END_BKPT (success) + # + # @return True + # + def test_cal_crc_block_memory(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.reset() + + firstTime = True + + # Reset device & jump to break point + self.reach_to_breakpoint('IEC60730_IMC_BIST_START_BKPT', True, 1) + self.adapter.clear_all_breakpoints() + + iec60730_run_crc_location = variables['iec60730_run_crc'] + iec60730_run_crc = self.adapter.memory_read32(iec60730_run_crc_location, 1) + + rom_end_location = variables['check_sum'] + + # Debug + logging.info("DUT iec60730_run_crc at " + hex(iec60730_run_crc_location) + " check_sum at " + hex(rom_end_location)) + + while iec60730_run_crc[0] < rom_end_location : + # logging.info("TC: iec60730_run_crc: " + hex(iec60730_run_crc[0]) + " < ROM_END: " + hex(rom_end_location)) + self.reach_to_breakpoint('IEC60730_IMC_BIST_CRCBLOCK_BKPT', firstTime, 1) + iec60730_run_crc = self.adapter.memory_read32(iec60730_run_crc_location, 1) + firstTime = False + + self.adapter.clear_all_breakpoints() + + self.reach_to_breakpoint('IEC60730_IMC_BIST_CALCRC_BKPT', True, 1) + + # Verify initial value of crcCrc + iec60730_cur_crc_location = variables['iec60730_cur_crc'] + if is_crc32 : + iec60730_cur_crc = self.adapter.memory_read32(iec60730_cur_crc_location, 1) + else : + iec60730_cur_crc = self.adapter.memory_read16(iec60730_cur_crc_location, 1) + + # Debug + logging.info("DUT iec60730_cur_crc=" + hex(iec60730_cur_crc[0]) + " at " + hex(iec60730_cur_crc_location)) + + if 0 == iec60730_cur_crc[0] : + logging.info("DUT value of iec60730_cur_crc equal 0") + return False + + self.adapter.clear_all_breakpoints() + self.reach_to_breakpoint('IEC60730_IMC_BIST_END_BKPT', True, 1) + + return True + + @iec60730_test_case('TC: Corrupt CRC at step calculate CRC for the Block flash memory') + ## Verify the DUT jump to #sl_iec60730_safe_state when flash faied at BIST. + # This TC simulates an abnormal situation that causes the variable \ref iec60730_cur_crc + # to be changed, resulting in the calculated CRC value for the entire flash + # being different from the value stored in the flash. This leads to jump to + # break point at #sl_iec60730_safe_state. + # + # In the IMC documentation there is a detailed description of the variable + # \ref iec60730_cur_crc. + # + # @details Order of execution + # - Reset device + # - Verify code reaches breakpoint at IEC60730_IMC_BIST_CALCRC_BKPT + # - Edit value of \ref iec60730_cur_crc + # - Verify execution breaks at #sl_iec60730_safe_state() + # + # @return True + # + def test_corrupt_crc_cal_crc_block_memory(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + + # Reset device & jump to break point + self.adapter.reset() + + # reach to break point IEC60730_IMC_BIST_CALCRC_BKPT + self.reach_to_breakpoint('IEC60730_IMC_BIST_CALCRC_BKPT', True, 1) + + # Verify initial value of crcCrc + iec60730_cur_crc_location = variables['iec60730_cur_crc'] + if is_crc32 : + iec60730_cur_crc = self.adapter.memory_read32(iec60730_cur_crc_location, 1) + else : + iec60730_cur_crc = self.adapter.memory_read16(iec60730_cur_crc_location, 1) + logging.info("DUT iec60730_cur_crc=" + hex(iec60730_cur_crc[0]) + " at " + hex(iec60730_cur_crc_location)) + + # Set iec60730_ref_crc to {0x0000} + iec60730_ref_crc_location = variables['iec60730_ref_crc'] + logging.info("DUT iec60730_ref_crc at " + hex(iec60730_ref_crc_location)) + + if is_crc32 : + self.adapter.memory_write16(iec60730_ref_crc_location, data = {0x00000000}) + else : + self.adapter.memory_write16(iec60730_ref_crc_location, data = {0x0000}) + + # Set break point at sl_iec60730_safe_state + self.adapter.clear_all_breakpoints() + + # reach to break point sl_iec60730_safe_state + self.reach_to_breakpoint('sl_iec60730_safe_state', True, 1) + + return True + + @iec60730_test_case('TC: Corrupt integrity of iec60730_run_crc variable for the Block flash memory') + ## Verify integrity of \ref iec60730_run_crc variable. This TC simulates an abnormal + # situation that causes the variable iec60730_run_crc to be changed, resulting in the + # calculated CRC value for the entire flash being different from the value stored + # in the flash. This leads to jump to break point at #sl_iec60730_safe_state. + # + # In the IMC documentation there is a detailed description of the variable + # \ref iec60730_run_crc. + # + # @details Order of execution + # - Reset device + # - Verify code reaches breakpoint at IEC60730_IMC_BIST_CRCBLOCK_BKPT + # - Edit value of \ref iec60730_run_crc variable + # - Verify execution breaks at #sl_iec60730_safe_state() + # + # @return True + # + def test_corrupt_integrity_iec60730_run_crc_block_memory(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + + # Reset device & jump to break point + self.adapter.reset() + + # reach to break point IEC60730_IMC_BIST_CRCBLOCK_BKPT + self.reach_to_breakpoint('IEC60730_IMC_BIST_CRCBLOCK_BKPT', True, 1) + + iec60730_run_crc_location = variables['iec60730_run_crc'] + logging.info("DUT iec60730_run_crc at " + hex(iec60730_run_crc_location)) + + if is_crc32 : + self.adapter.memory_write16(iec60730_run_crc_location, data = {0x00000000}) + else : + self.adapter.memory_write16(iec60730_run_crc_location, data = {0x0000}) + + # reach to break point sl_iec60730_safe_state + self.reach_to_breakpoint('sl_iec60730_safe_state', True, 1) + + return True + + +if __name__ == "__main__": + + ## Chip name run test + chip_name = os.getenv('CHIP') + + ## Path to file *.lst + lst_file_path = os.getenv('LST_PATH') + + ## serialno of device + adapter_serial_no = os.getenv('ADAPTER_SN') + + ## Path to jlink library + lib_path = os.getenv('JLINK_PATH') + + ## Enable test calculation with CRC32 + cal_crc_32 = os.getenv('INTEGRATION_TEST_ENABLE_CAL_CRC_32') + if not cal_crc_32: + cal_crc_32 = "disable" + else: + if cal_crc_32 == "enable": + ## Allows testing with CRC32 + is_crc32 = True + print("Enable calculate crc32: "+cal_crc_32) + + while len(sys.argv) > 1: + ## Number of arguments passed into the script file + line = sys.argv.pop() + if len(sys.argv) == 1: + ## compiler creates the file *.lst + compiler = line + + unittest.main() + +## @} +# @} diff --git a/test/test_script/integration_test_iec60730_irq.py b/test/test_script/integration_test_iec60730_irq.py new file mode 100644 index 00000000..8e33fcfe --- /dev/null +++ b/test/test_script/integration_test_iec60730_irq.py @@ -0,0 +1,178 @@ +#!/usr/bin/env python +# License +# Copyright 2024 Silicon Laboratories Inc. www.silabs.com +# ******************************************************************************* +# +# The licensor of this software is Silicon Laboratories Inc. Your use of this +# software is governed by the terms of Silicon Labs Master Software License +# Agreement (MSLA) available at +# www.silabs.com/about-us/legal/master-software-license-agreement. This +# software is distributed to you in Source Code format and is governed by the +# sections of the MSLA applicable to Source Code. +# ******************************************************************************* + +## @addtogroup IEC60730_INTEGRATION_TEST +# @{ +# @defgroup IEC60730_IRQ_VERIFICATION IRQ Automated Verification Tests +# @{ +# Python script for the IEC60730 IRQ plausibility verification tests. +# +# For details on the tests, see iec60730_irq.iec60730_irq. +# +#@section irq_test_results Test Results +# +#EFR32 Device| Test Results +#------------|------------- + +from binascii import hexlify +import random +import os +import sys +from time import sleep + +from iec60730_test_base import * +import jlink, jlink_constants +import unittest +import enums + +def int_to_bytes(number: int) -> bytes: + return number.to_bytes(length=(8 + (number + (number < 0)).bit_length()) // 8, byteorder='big', signed=True) + +## IEC60730 IRQ Plausibility Verification Tests +# +# @details This class runs IEC60730 verification tests for the irq plausibility test. +# +# Hardware setup: +# Connect DUT to PC. No additional hardware setup required. +class iec60730_irq(unittest.TestCase, iec60730TestBase): + ## Text name of the test suite, used in XML output. + TEST_SUITE_NAME = "IRQ" + + ## Set up connect device. + def setUp(self): + self.env_setup(adapter_serial_no, chip_name, lst_file_path, lib_path, compiler) + + @iec60730_test_case('TC: IRQ execution test') + ## Verify the DUT repeatedly executes the IRQ plausibility test, indicating no erroneous entry into safe state. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_IRQ_BKPT + # - Verify code reaches breakpoint at IEC60730_IRQ_BKPT + # - Test passes, return True + # + # @return True + # + def test_irq_execution(self): + # Set breakpoints in system clock test-related ISRs. + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.set_breakpoint(address = asm_labels['IEC60730_IRQ_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + self.adapter.set_breakpoint(address = asm_labels['IEC60730_SAFE_STATE_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + # Reset device + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_IRQ_BKPT'],\ + "DUT failed enter IRQ test" \ + " , pc = " + hex(pc)) + + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_IRQ_BKPT'],\ + "DUT did not enter IRQ a second time" \ + " , pc = " + hex(pc)) + + logging.info("DUT correctly running IRQ plausibility test") + return True + + @iec60730_test_case('TC: Enter SafeState when IRQ is found to be executing outside of OEM-specified bounds') + ## Verifies that the IRQ plausibility test forces entry into safe state when IRQs execute out-of-spec. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_IRQ_BKPT + # - Force value of interrupt count to be less than minimum + # - Verify safe state entrance + # - Reset + # - Verify code reaches breakpoint at IEC60730_IRQ_BKPT + # - Force value of interrupt count to be higher than maximum + # - Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT + # - Code correctly tested entered sl_iec60730_safe_state() due to out of bounds clock + # - Test passes, return True + # + # @return True + + def test_irq_out_of_bounds(self): + irq_exec_count_location = variables['integration_test_irq_exec_count'] + self.assertNotEqual(0, irq_exec_count_location,\ + "Can not read integration_test_irq_exec_count address") + logging.info("Set integration_test_irq_exec_count flag at address: " + hex(irq_exec_count_location)) + + # Set breakpoint to force IRQs to to appear as though they've not executed to frequently/infrequently, and breakpoint for safe state entry + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.set_breakpoint(address = asm_labels['IEC60730_IRQ_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + self.adapter.set_breakpoint(address = asm_labels['IEC60730_SAFE_STATE_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + # Reset device + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_IRQ_BKPT'],\ + "DUT failed to reach IRQ plausibility test" \ + " , pc = " + hex(pc)) + + # Set count of IRQ to be 0, when minimum in code is 1 (interrupt index 0, timer clock) + self.adapter.memory_write8(addr = irq_exec_count_location, data = {0x00}, zone=None) + + pc = self.adapter.run_to_breakpoint(2) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SAFE_STATE_BKPT'],\ + "DUT did not enter safe state after IRQ plausibility fail" \ + " , pc = " + hex(pc)) + + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_IRQ_BKPT'],\ + "DUT failed to reach IRQ plausibility test" \ + " , pc = " + hex(pc)) + + # Set count of IRQ to be 13, when maximum in code is 11 (interrupt index 0, system clock) + self.adapter.memory_write8(addr = irq_exec_count_location, data = {13}, zone=None) + + pc = self.adapter.run_to_breakpoint(2) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SAFE_STATE_BKPT'],\ + "DUT did not enter safe state after IRQ plausibility fail" \ + " , pc = " + hex(pc)) + logging.info("DUT correctly entered safe state after IRQ plausibility check failure") + return True + +if __name__ == "__main__": + + ## Chip name run test + chip_name = os.getenv('CHIP') + + ## Path to file *.lst + lst_file_path = os.getenv('LST_PATH') + + ## serialno of device + adapter_serial_no = os.getenv('ADAPTER_SN') + + ## Path to jlink library + lib_path = os.getenv('JLINK_PATH') + + while len(sys.argv) > 1: + ## Number of arguments passed into the script file + line = sys.argv.pop() + if len(sys.argv) == 1: + ## compiler creates the file *.lst + compiler = line + + print("Compiler: "+compiler) + unittest.main() + +## @} +# @} diff --git a/test/test_script/integration_test_iec60730_program_counter.py b/test/test_script/integration_test_iec60730_program_counter.py new file mode 100644 index 00000000..ad5489b0 --- /dev/null +++ b/test/test_script/integration_test_iec60730_program_counter.py @@ -0,0 +1,176 @@ +#!/usr/bin/env python +# License +# Copyright 2024 Silicon Laboratories Inc. www.silabs.com +# ******************************************************************************* +# +# The licensor of this software is Silicon Laboratories Inc. Your use of this +# software is governed by the terms of Silicon Labs Master Software License +# Agreement (MSLA) available at +# www.silabs.com/about-us/legal/master-software-license-agreement. This +# software is distributed to you in Source Code format and is governed by the +# sections of the MSLA applicable to Source Code. +# ******************************************************************************* + +## @addtogroup IEC60730_INTEGRATION_TEST +# @{ +# @defgroup IEC60730_PROGRAMME_COUNTER_VERIFICATION Program Counter Verification Tests +# @{ +# Python script for the IEC60730 Program counter Verification tests. +# +# For details on the tests, see iec60730_programme_counter.iec60730_programme_counter. +# +#@section programme_counter_test_results Test Results +# +#EFR32 Device | Test Results +#-------------|------------- + +from binascii import hexlify +import random +import os +import sys +from time import sleep + +from iec60730_test_base import * +import jlink, jlink_constants +import unittest +import enums + +def int_to_bytes(number: int) -> bytes: + return number.to_bytes(length=(8 + (number + (number < 0)).bit_length()) // 8, byteorder='big', signed=True) + + +## IEC60730 CPU Program counter Tests +# +# @details This class runs IEC60730 Program counter tests. +# +# Hardware setup: +# Connect DUT to PC. No additional hardware setup required. + +class iec60730_programme_counter(unittest.TestCase, iec60730TestBase): + ## Text name of the test suite, used in XML output. + TEST_SUITE_NAME = "PROGRAM COUNTER" + + ## Set up connect device. + def setUp(self): + self.env_setup(adapter_serial_no, chip_name, lst_file_path, lib_path, compiler) + + + @iec60730_test_case('TC: Verify Program counter execution') + ## Verify the DUT repeatedly Program counter test, indicating Program counter correctly running. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_PC_BKPT + # - Verify code reaches breakpoint at IEC60730_PC_BKPT + # - Test passes, return True + # + # @return True + # + def test_program_counter_execution(self): + # Set breakpoints in system clock test-related ISRs. + self.adapter.halt() + self.adapter.clear_all_breakpoints() + + self.adapter.set_breakpoint(address = asm_labels['IEC60730_PC_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + self.adapter.set_breakpoint(address = asm_labels['sl_iec60730_safe_state'], + typeflags=enums.JLinkBreakpoint.ANY) + + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(2) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_PC_BKPT'],\ + "DUT failed to stop at IEC60730_PC_BKPT" \ + " , pc = " + hex(pc)) + + pc = self.adapter.run_to_breakpoint(2) + self.assertEqual(pc, asm_labels['IEC60730_PC_BKPT'], \ + "DUT failed to stop at IEC60730_PC_BKPT a second time" + \ + ", pc = " + hex(pc)) + + logging.info("DUT correctly running Program counter test") + + return True + + + @iec60730_test_case('TC: Enter SafeState when Program counter tests are not executing within period') + ## Verify the DUT repeatedly executes Program counter test, indicating Program counter enters safe state. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_PC_BKPT + # - Inject fault condition into Program counter flags + # - Verify code reaches breakpoint at iec60730_SafeState + # - Test passes, return True + # + # @return True + # + def test_program_counter_too_slow(self): + programmeCounterCheckLocation = variables['sl_iec60730_program_counter_check'] + + self.assertNotEqual(0, programmeCounterCheckLocation,\ + "Can not read sl_iec60730_program_counter_check address") + + # Set breakpoints in system clock test-related ISRs. + self.adapter.halt() + self.adapter.clear_all_breakpoints() + + self.adapter.set_breakpoint(address = asm_labels['IEC60730_PC_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + + + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(2) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_PC_BKPT'],\ + "DUT failed to stop at IEC60730_PC_BKPT" \ + " , pc = " + hex(pc)) + + self.adapter.clear_all_breakpoints() + + self.adapter.set_breakpoint(address = asm_labels['sl_iec60730_safe_state'], + typeflags=enums.JLinkBreakpoint.ANY) + + # Clear bist execution completion flag bits + self.adapter.memory_write16(addr = programmeCounterCheckLocation, data = {0x0000}) + + read_value = self.adapter.memory_read16(addr = programmeCounterCheckLocation,num_halfwords=1) + + # Verify written data + self.assertEqual(0, read_value[0], \ + "Cannot clear BIST execution flag" + \ + ", read value = " + str(read_value[0])) + + pc = self.adapter.run_to_breakpoint(2) + self.assertEqual(pc, asm_labels['sl_iec60730_safe_state'], \ + "DUT did not enter safe state after bist frequency fail" + \ + ", pc = " + hex(pc)) + + logging.info("DUT correctly entered safe state after Program counter check failure") + + return True + +if __name__ == "__main__": + + ## Chip name run test + chip_name = os.getenv('CHIP') + + ## Path to file *.lst + lst_file_path = os.getenv('LST_PATH') + + ## serialno of device + adapter_serial_no = os.getenv('ADAPTER_SN') + ## Path to jlink library + lib_path = os.getenv('JLINK_PATH') + + while len(sys.argv) > 1: + ## Number of arguments passed into the script file + line = sys.argv.pop() + if len(sys.argv) == 1: + ## compiler creates the file *.lst + compiler = line + + print("Compiler: "+compiler) + + unittest.main() + +## @} +# @} diff --git a/test/test_script/integration_test_iec60730_system_clock.py b/test/test_script/integration_test_iec60730_system_clock.py new file mode 100644 index 00000000..1da151af --- /dev/null +++ b/test/test_script/integration_test_iec60730_system_clock.py @@ -0,0 +1,194 @@ +#!/usr/bin/env python +# License +# Copyright 2024 Silicon Laboratories Inc. www.silabs.com +# ******************************************************************************* +# +# The licensor of this software is Silicon Laboratories Inc. Your use of this +# software is governed by the terms of Silicon Labs Master Software License +# Agreement (MSLA) available at +# www.silabs.com/about-us/legal/master-software-license-agreement. This +# software is distributed to you in Source Code format and is governed by the +# sections of the MSLA applicable to Source Code. +# ******************************************************************************* + +## @addtogroup IEC60730_INTEGRATION_TEST +# @{ +# @defgroup IEC60730_SYSTEM_CLOCK_VERIFICATION System Clock Automated Verification Tests +# @{ +# Python script for the IEC60730 system clock Verification tests. +# +# For details on the tests, see iec60730_system_clock.iec60730_system_clock. +# +#@section system_clock_test_results Test Results +# +#EFR32 Device | Test Results +#-------------|------------- + + +from binascii import hexlify +import random +import os +import sys +from time import sleep + +from iec60730_test_base import * +import jlink, jlink_constants +import unittest +import enums + +def int_to_bytes(number: int) -> bytes: + return number.to_bytes(length=(8 + (number + (number < 0)).bit_length()) // 8, byteorder='big', signed=True) + +## IEC60730 System Clock Verification Tests +# +# @details This class runs IEC60730 verification tests for the system clock test. +# +# Hardware setup: +# Connect DUT to PC. No additional hardware setup required. + +class iec60730_system_clock(unittest.TestCase, iec60730TestBase): + ## Text name of the test suite, used in XML output. + TEST_SUITE_NAME = "System Clock" + + ## Set up connect device. + def setUp(self): + self.env_setup(adapter_serial_no, chip_name, lst_file_path, lib_path, compiler) + + + @iec60730_test_case('TC: System Clock execution test') + ## Verify the DUT repeatedly executes the system clock test, indicating no erroneous entry into safe state. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_SYSTEM_CLOCK_TICK_BKPT (to verify Clock counter is working). + # - Verify code reaches breakpoint at IEC60730_TEST_CLOCK_TICK_BKPT (To verify Clock counter is checked. Test finishes without stuck in safe state.). + # - Test passes, return True + # + # @return True + # + def test_system_clock_execution(self): + # Set breakpoints in system clock test-related ISRs. + self.adapter.halt() + self.adapter.clear_all_breakpoints() + bp1 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_SYSTEM_CLOCK_TICK_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + # Reset device + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SYSTEM_CLOCK_TICK_BKPT'],\ + "DUT failed to enter system clock tick" \ + " , pc = " + hex(pc)) + + self.adapter.clear_all_breakpoints() + bp2 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_TEST_CLOCK_TICK_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_TEST_CLOCK_TICK_BKPT'],\ + "DUT did not run system clock test" \ + " , pc = " + hex(pc)) + + self.adapter.clear_all_breakpoints() + bp1 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_SYSTEM_CLOCK_TICK_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SYSTEM_CLOCK_TICK_BKPT'],\ + "DUT did not run system clock test a second time, indicating safe state entry" \ + " , pc = " + hex(pc)) + + logging.info("DUT correctly running system clock test") + return True + + @iec60730_test_case('TC: Enter SafeState when system clock out of bound') + ## Verifies that the BIST system clock test enters safe state when out-of-bounds system clock is enabled + # @details The system clock test is validated by forcing a system clock frequency that runs low + # bound checked by the test. Testing validates that the system enters safe state + # after the system clock is forced low bound. + # + # Order of execution: + # - Verify code reaches breakpoint at IEC60730_SYSTEM_CLOCK_FREQ_ADJUSTMENT_BKPT + # - Force value of sl_iec60730_sys_clock_count to be out of bound + # - Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT + # - Code correctly tested entered sl_iec60730_safe_state() due to out of bounds clock + # - Test passes, return True + # + # @return True + + def test_system_clock_out_of_bound(self): + sys_clock_count_location = variables['sl_iec60730_sys_clock_count'] + self.assertNotEqual(0, sys_clock_count_location,\ + "Can not read sl_iec60730_sys_clock_count address") + logging.info("Set sl_iec60730_sys_clock_count flag at address: " + hex(sys_clock_count_location)) + + # Set breakpoint to force system clocks to to appear as though they've not executed to frequently/infrequently, and breakpoint for safe state entry + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.set_breakpoint(address = asm_labels['IEC60730_TEST_CLOCK_TICK_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + self.adapter.set_breakpoint(address = asm_labels['IEC60730_SAFE_STATE_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + # Reset device + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_TEST_CLOCK_TICK_BKPT'],\ + "DUT failed to reach system clock plausibility test" \ + " , pc = " + hex(pc)) + + # Set count of system clock to be 0, when minimum in code is 9 + self.adapter.memory_write8(addr = sys_clock_count_location, data = {0x01}, zone=None) + + pc = self.adapter.run_to_breakpoint(2) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SAFE_STATE_BKPT'],\ + "DUT did not enter safe state after system clock plausibility fail" \ + " , pc = " + hex(pc)) + + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_TEST_CLOCK_TICK_BKPT'],\ + "DUT failed to reach system clock plausibility test" \ + " , pc = " + hex(pc)) + + # Set count of system clock to be 13, when maximum in code is 10 + self.adapter.memory_write8(addr = sys_clock_count_location, data = {0x0D}, zone=None) + + pc = self.adapter.run_to_breakpoint(2) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SAFE_STATE_BKPT'],\ + "DUT did not enter safe state after system clock plausibility fail" \ + " , pc = " + hex(pc)) + logging.info("DUT correctly entered safe state after system clock plausibility check failure") + return True + +if __name__ == "__main__": + + ## Chip name run test + chip_name = os.getenv('CHIP') + + ## Path to file *.lst + lst_file_path = os.getenv('LST_PATH') + + ## serialno of device + adapter_serial_no = os.getenv('ADAPTER_SN') + + ## Path to jlink library + lib_path = os.getenv('JLINK_PATH') + + while len(sys.argv) > 1: + ## Number of arguments passed into the script file + line = sys.argv.pop() + if len(sys.argv) == 1: + ## compiler creates the file *.lst + compiler = line + + print("Compiler: "+compiler) + + unittest.main() + +## @} +# @} diff --git a/test/test_script/integration_test_iec60730_variable_memory.py b/test/test_script/integration_test_iec60730_variable_memory.py new file mode 100644 index 00000000..cf3e2f5c --- /dev/null +++ b/test/test_script/integration_test_iec60730_variable_memory.py @@ -0,0 +1,652 @@ +#!/usr/bin/env python +# License +# Copyright 2024 Silicon Laboratories Inc. www.silabs.com +# ******************************************************************************* +# +# The licensor of this software is Silicon Laboratories Inc. Your use of this +# software is governed by the terms of Silicon Labs Master Software License +# Agreement (MSLA) available at +# www.silabs.com/about-us/legal/master-software-license-agreement. This +# software is distributed to you in Source Code format and is governed by the +# sections of the MSLA applicable to Source Code. +# ******************************************************************************* + +## @addtogroup IEC60730_INTEGRATION_TEST +# @{ +# @defgroup IEC60730_VARIABLE_MEMORY_VERIFICATION Variable Memory Automated Verification Tests +# @{ +# Python script for the IEC60730 Variable Memory plausibility verification tests. +# +# For details on the tests, see iec60730_variable_memory.iec60730_variable_memory. +# +#@section irq_test_results Test Results +# +#EFR32 Device| Test Results +#------------|------------- + +from binascii import hexlify +from logging import debug, log +import random +import os +import sys +from time import sleep + +from iec60730_test_base import * +import jlink, jlink_constants +import unittest +import enums + +isEnableMarchXC = True + +## IEC60730 Variable Memory Plausibility Verification Tests +# +# @details This class runs IEC60730 verification tests for the variable memory plausibility test. +# +# Hardware setup: +# Connect DUT to PC. No additional hardware setup required. + +class iec60730_vmc(unittest.TestCase, iec60730TestBase): + ## Text name of the test suite, used in XML output. + TEST_SUITE_NAME = "VMC" + + ## Set up connect device. + def setUp(self): + self.env_setup(adapter_serial_no, chip_name, lst_file_path, lib_path, compiler) + + ## Set breakpoint. + def set_breakpoint(self, label) : + self.adapter.set_breakpoint(address = asm_labels[label], + typeflags=enums.JLinkBreakpoint.ANY) + + ## Run to breakpoint. + def reach_to_breakpoint(self, label, setbkp, time) : + if setbkp : + self.set_breakpoint(label) + + logging.info("Run to bkp: " + label) + pc = self.adapter.run_to_breakpoint(time) + + self.assertEqual(pc, asm_labels[label], \ + "DUT failed to stop at " + label + \ + ", pc = " + hex(pc) + \ + ", setbkp = " + str(setbkp)) + ## Corruption changes the value at the breakpoint label + def corruption(self, + address = 0, + value = 0, + time = 1, + label = '', + label_pass = 'sl_iec60730_safe_state') : + self.reach_to_breakpoint(label, True, time) + # write data to address + self.adapter.memory_write32(address, data = {value}) + logging.info("Write to location: " + hex(address) + ", bkp: " + label) + temp = self.adapter.memory_read32(address, 1) + logging.info("Read from location: " + hex(address) + ", val = " + hex(temp[0])) + self.reach_to_breakpoint(label_pass, True, time) + self.adapter.clear_all_breakpoints() + self.adapter.reset() + # self.reach_to_breakpoint(label, True, time) + + @iec60730_test_case('TC: Run step by step when testing Full Ram regions want to check') + ## Verify the DUT run step by step when testing full ram at POST. This test + # case (TC) checks under normal conditions with no exceptions, VMC module + # DOES NOT raise issue. + # + # @details Order of execution + # - Reset device + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_SAVE + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP1 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP2 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP3 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP4 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP5 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP6 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_RESTORE + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_MARCH_RET + # - Verify code reaches breakpoint at IEC60730_VMC_POST_MARCHC_STEP_BKPT + # + # This process in loop with coditon \ref iec60730_rt_check < #RAMTEST_END. In case this + # condition is not satisfied, clear all break point and verify + # + # - Verify code reaches breakpoint at IEC60730_VMC_POST_CHECK_BKBUF_BKPT + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF1 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF2 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF3 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF4 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF5 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF6 + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_MARCH_RET + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_RET + # + # @return True + # + def test_correct_background_full_ram(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.reset() + + firstTime = True + + self.reach_to_breakpoint('IEC60730_VMC_POST_START_BKPT', True, 1) + self.adapter.clear_all_breakpoints() + + iec60730_rt_check_location = variables['iec60730_rt_check'] + iec60730_rt_check = self.adapter.memory_read32(iec60730_rt_check_location, 1) + + phaseSteps = ['IEC60730_MARCHC_STEP_SAVE', + 'IEC60730_MARCHC_STEP_STEP1', + 'IEC60730_MARCHC_STEP_STEP2', + 'IEC60730_MARCHC_STEP_STEP3', + 'IEC60730_MARCHC_STEP_STEP4', + 'IEC60730_MARCHC_STEP_STEP5', + 'IEC60730_MARCHC_STEP_STEP6', + 'IEC60730_MARCHC_STEP_RESTORE', + 'IEC60730_MARCHC_STEP_MARCH_RET', + 'IEC60730_VMC_POST_MARCHC_STEP_BKPT'] + + num_ram_regions_check = self.adapter.memory_read32(variables['num_ram_regions_check'], 1) + self.assertNotEqual(0, num_ram_regions_check[0],\ + "Can not read num_ram_regions_check value") + logging.info("Number regions test: " + str(num_ram_regions_check[0])) + integration_test_vmc_region_test = variables['integration_test_vmc_region_test'] + self.assertNotEqual(0, integration_test_vmc_region_test,\ + "Can not read integration_test_vmc_region_test address") + #logging.info("Read integration_test_vmc_region_test value: " + hex(integration_test_vmc_region_test)) + region_test = self.adapter.memory_read32(integration_test_vmc_region_test, num_ram_regions_check[0]*2) + self.assertNotEqual(0, region_test[0],\ + "Can not read integration_test_vmc_region_test address") + current_test_region = 0 + while current_test_region < num_ram_regions_check[0]: + logging.info("Region " + str(current_test_region) + " -- start: " + hex(region_test[2*current_test_region])+ + " end: " + hex(region_test[2*current_test_region+1])) + current_test_region = current_test_region + 1 + + # ram_test_end = self.adapter.memory_read32(variables['ram_test_end'], 1) + # self.assertNotEqual(0, ram_test_end[0],\ + # "Can not read ram_test_end value") + # logging.info("Read ram test end value: " + hex(ram_test_end[0])) + + current_test_region = 0 + while current_test_region < num_ram_regions_check[0]: + iec60730_rt_check[0] = region_test[2*current_test_region] + while iec60730_rt_check[0] < region_test[2*current_test_region+1]: + logging.info(" iec60730_rt_check: " + hex(iec60730_rt_check[0])) + for phase in phaseSteps : + self.reach_to_breakpoint(phase, firstTime, 1) + iec60730_rt_check = self.adapter.memory_read32(iec60730_rt_check_location, 1) + firstTime = False + self.adapter.clear_all_breakpoints() + current_test_region = current_test_region + 1 + firstTime = True + + # self.adapter.clear_all_breakpoints() + + phaseBuffs = ['IEC60730_VMC_POST_CHECK_BKBUF_BKPT', + 'IEC60730_MARCHC_STEP_BUFF1', + 'IEC60730_MARCHC_STEP_BUFF2', + 'IEC60730_MARCHC_STEP_BUFF3', + 'IEC60730_MARCHC_STEP_BUFF4', + 'IEC60730_MARCHC_STEP_BUFF5', + 'IEC60730_MARCHC_STEP_BUFF6', + 'IEC60730_MARCHC_STEP_MARCH_RET', + 'IEC60730_MARCHC_STEP_RET'] + for phase in phaseBuffs : + self.reach_to_breakpoint(phase, True, 1) + + return True + + @iec60730_test_case('TC: Detect corruption when testing Full Ram regions want to check') + ## Verify the DUT jump to #sl_iec60730_safe_state when testing ram failed at + # post. This TC simulates an abnormal situation that causes the \ref iec60730_rt_check, + # and \ref iec60730_bk_buf variables to be changed. This leads to jump to break point at + # #sl_iec60730_safe_state. + # + # In the VMC documentation there is a detailed description of the \ref iec60730_rt_check, + # and \ref iec60730_bk_buf variables. + # + # @details Order of execution + # - Reset device + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP2. We don't reach + # IEC60730_MARCHC_STEP_STEP1 because this step only write (W1) + # - Edit value at address of \ref iec60730_rt_check + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP3 + # - Edit value at address of \ref iec60730_rt_check + # + Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP4 + # - Edit value at address of \ref iec60730_rt_check + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP5 + # - Edit value at address of \ref iec60730_rt_check + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_STEP6 + # - Edit value at address of \ref iec60730_rt_check + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # + # - Verify code reaches breakpoint at IEC60730_VMC_POST_CHECK_BKBUF_BKPT + # + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF2. We don't reach + # IEC60730_MARCHC_STEP_BUFF1 because this step only write (W1) + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF3 + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF4 + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF5 + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHC_STEP_BUFF6 + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # + # @return True + # + def test_detect_corruption_full_ram(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.reset() + + self.reach_to_breakpoint('IEC60730_VMC_POST_START_BKPT', True, 1) + self.adapter.clear_all_breakpoints() + + iec60730_rt_check_location = variables['iec60730_rt_check'] + + phaseSteps = ['IEC60730_MARCHC_STEP_STEP2', + 'IEC60730_MARCHC_STEP_STEP3', + 'IEC60730_MARCHC_STEP_STEP4', + 'IEC60730_MARCHC_STEP_STEP5', + 'IEC60730_MARCHC_STEP_STEP6'] + + for phase in phaseSteps : + self.corruption(address = iec60730_rt_check_location, + value = 0xA5A5A5A5, + time = 1, + label = phase, + label_pass = 'sl_iec60730_safe_state') + + self.adapter.clear_all_breakpoints() + self.adapter.reset() + + # TODO: Check test case again + self.reach_to_breakpoint('IEC60730_VMC_POST_CHECK_BKBUF_BKPT', True, 1) + self.adapter.clear_all_breakpoints() + + iec60730_bk_buf_location = 0 + iec60730_bk_buf_location = variables['iec60730_bk_buf'] + + phaseBuffs = ['IEC60730_MARCHC_STEP_BUFF2', + 'IEC60730_MARCHC_STEP_BUFF3', + 'IEC60730_MARCHC_STEP_BUFF4', + 'IEC60730_MARCHC_STEP_BUFF5', + 'IEC60730_MARCHC_STEP_BUFF6'] + + for phase in phaseBuffs : + self.corruption(address = iec60730_bk_buf_location, + value = 0xA5A5A5A5, + time = 1, + label = phase, + label_pass = 'sl_iec60730_safe_state') + + return True + + @iec60730_test_case('TC: Run step by step when testing Step Ram first region') + ## Verify the DUT run step by step when testing full ram at BIST. This TC + # checks under normal conditions with no exceptions, vmc module DOES NOT raise + # issue. + # + # @details Order of execution + # - Reset device + # + # - Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT + # + # The loop with coditon \ref iec60730_rt_check < #RAMTEST_END + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_SAVE + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP1 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP2 + # - if not enable MatchX + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP3 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP4 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP5 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP6 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_RESTORE + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_MARCH_RET + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_RET + # - Verify code reaches breakpoint at IEC60730_VMC_BIST_MARCHC_STEP_BKPT + # + # In case condition is not satisfied, clear all break point and verify + # + # - Verify code reaches breakpoint at IEC60730_IMC_BIST_CHECK_BKBUF_BKPT + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF1 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF2 + # - if not enable MatchX + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF3 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF4 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF5 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF6 + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_MARCH_RET + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_RET + # + # @return True + # + def test_correct_background_step_ram(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.reset() + + firstTime = True + + self.reach_to_breakpoint('IEC60730_VMC_BIST_START_BKPT', True, 1) + self.adapter.clear_all_breakpoints() + + iec60730_rt_check_location = variables['iec60730_rt_check'] + iec60730_rt_check = self.adapter.memory_read32(iec60730_rt_check_location, 1) + + phaseSteps = [] + if isEnableMarchXC : + phaseSteps = ['IEC60730_MARCHXC_STEP_SAVE', + 'IEC60730_MARCHXC_STEP_STEP1', + 'IEC60730_MARCHXC_STEP_STEP2', + 'IEC60730_MARCHXC_STEP_STEP5', + 'IEC60730_MARCHXC_STEP_STEP6', + 'IEC60730_VMC_BIST_MARCHC_STEP_BKPT'] + else : + phaseSteps = ['IEC60730_MARCHXC_STEP_SAVE', + 'IEC60730_MARCHXC_STEP_STEP1', + 'IEC60730_MARCHXC_STEP_STEP2', + 'IEC60730_MARCHXC_STEP_STEP3', + 'IEC60730_MARCHXC_STEP_STEP4', + 'IEC60730_MARCHXC_STEP_STEP5', + 'IEC60730_MARCHXC_STEP_STEP6', + 'IEC60730_VMC_BIST_MARCHC_STEP_BKPT'] + + num_ram_regions_check = self.adapter.memory_read32(variables['num_ram_regions_check'], 1) + self.assertNotEqual(0, num_ram_regions_check[0],\ + "Can not read num_ram_regions_check value") + logging.info("Number regions test: " + str(num_ram_regions_check[0])) + integration_test_vmc_region_test = variables['integration_test_vmc_region_test'] + self.assertNotEqual(0, integration_test_vmc_region_test,\ + "Can not read integration_test_vmc_region_test address") + #logging.info("Read integration_test_vmc_region_test value: " + hex(integration_test_vmc_region_test)) + region_test = self.adapter.memory_read32(integration_test_vmc_region_test, num_ram_regions_check[0]*2) + self.assertNotEqual(0, region_test[0],\ + "Can not read integration_test_vmc_region_test address") + current_test_region = 0 + while current_test_region < num_ram_regions_check[0]: + logging.info("Region " + str(current_test_region) + " -- start: " + hex(region_test[2*current_test_region])+ + " end: " + hex(region_test[2*current_test_region+1])) + current_test_region = current_test_region + 1 + + # ram_test_end = self.adapter.memory_read32(variables['ram_test_end'], 1) + # self.assertNotEqual(0, ram_test_end[0],\ + # "Can not read ram_test_end value") + # logging.info("Read ram test end value: " + hex(ram_test_end[0])) + + # logging.info("Read ram test end value: " + hex(ram_test_end[0])) + # while iec60730_rt_check[0] < ram_test_end[0] : + # logging.info("TC: iec60730_rt_check: " + hex(iec60730_rt_check[0])) + # for phase in phaseSteps : + # self.reach_to_breakpoint(phase, firstTime, 1) + # iec60730_rt_check = self.adapter.memory_read32(iec60730_rt_check_location, 1) + # firstTime = False + + current_test_region = 0 + while current_test_region < num_ram_regions_check[0]: + iec60730_rt_check[0] = region_test[2*current_test_region] + while iec60730_rt_check[0] < region_test[2*current_test_region+1]: + logging.info(" iec60730_rt_check: " + hex(iec60730_rt_check[0])) + for phase in phaseSteps : + self.reach_to_breakpoint(phase, firstTime, 1) + #iec60730_rt_check[0] = iec60730_rt_check[0]+8 + iec60730_rt_check = self.adapter.memory_read32(iec60730_rt_check_location, 1) + firstTime = False + self.adapter.clear_all_breakpoints() + current_test_region = current_test_region + 1 + firstTime = True + + self.adapter.clear_all_breakpoints() + + logging.info("Testing VMC the backup Buffer") + phaseBuffs = [] + if isEnableMarchXC : + phaseBuffs = ['IEC60730_IMC_BIST_CHECK_BKBUF_BKPT', + 'IEC60730_MARCHXC_STEP_BUFF1', + 'IEC60730_MARCHXC_STEP_BUFF2', + 'IEC60730_MARCHXC_STEP_BUFF5', + 'IEC60730_MARCHXC_STEP_BUFF6', + 'IEC60730_MARCHXC_STEP_MARCH_RET', + 'IEC60730_MARCHXC_STEP_RET'] + else : + phaseBuffs = ['IEC60730_IMC_BIST_CHECK_BKBUF_BKPT', + 'IEC60730_MARCHXC_STEP_BUFF1', + 'IEC60730_MARCHXC_STEP_BUFF2', + 'IEC60730_MARCHXC_STEP_BUFF3', + 'IEC60730_MARCHXC_STEP_BUFF4', + 'IEC60730_MARCHXC_STEP_BUFF5', + 'IEC60730_MARCHXC_STEP_BUFF6', + 'IEC60730_MARCHXC_STEP_MARCH_RET', + 'IEC60730_MARCHXC_STEP_RET'] + for phase in phaseBuffs : + self.reach_to_breakpoint(phase, True, 1) + + return True + + @iec60730_test_case('TC: Detect corruption when testing Step Ram first region') + ## Verify the DUT jump to #sl_iec60730_safe_state when testing ram failed at + # BIST. This TC simulates an abnormal situation that causes the variable iec60730_rt_check, + # iec60730_bk_buf to be changed. This leads to jump to break point at #sl_iec60730_safe_state. + # + # In the VMC documentation there is a detailed description of the \ref iec60730_rt_check, + # and \ref iec60730_bk_buf variables. + # + # @details Order of execution + # - Reset device + # + # - Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT + # + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP2. We don't reach + # IEC60730_MARCHXC_STEP_STEP1 because this step only write (W1) + # - Edit value at address of \ref iec60730_rt_check + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - if not enable MatchX + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP3 + # - Edit value at address of \ref iec60730_rt_check + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP4 + # - Edit value at address of \ref iec60730_rt_check + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP5 + # - Edit value at address of \ref iec60730_rt_check + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_STEP6 + # - Edit value at address of \ref iec60730_rt_check + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # + # - Verify code reaches breakpoint at IEC60730_IMC_BIST_CHECK_BKBUF_BKPT + # + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF2. We don't reach + # IEC60730_MARCHXC_STEP_BUFF1 because this step only write (W1) + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - if not enable MatchX + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF3 + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF4 + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF6 + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # - Verify code reaches breakpoint at IEC60730_MARCHXC_STEP_BUFF6 + # - Edit value at address of \ref iec60730_bk_buf + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # + # @return True + # + def test_detect_corruption_step_ram(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.reset() + + self.reach_to_breakpoint('IEC60730_VMC_BIST_START_BKPT', True, 1) + self.adapter.clear_all_breakpoints() + + iec60730_rt_check_location = variables['iec60730_rt_check'] + + phaseSteps = [] + if isEnableMarchXC : + phaseSteps = ['IEC60730_MARCHXC_STEP_STEP2', + 'IEC60730_MARCHXC_STEP_STEP5', + 'IEC60730_MARCHXC_STEP_STEP6'] + else : + phaseSteps = ['IEC60730_MARCHXC_STEP_STEP2', + 'IEC60730_MARCHXC_STEP_STEP3', + 'IEC60730_MARCHXC_STEP_STEP4', + 'IEC60730_MARCHXC_STEP_STEP5', + 'IEC60730_MARCHXC_STEP_STEP6'] + + for phase in phaseSteps : + self.corruption(address = iec60730_rt_check_location, + value = 0xA5A5A5A5, + time = 1, + label = phase, + label_pass = 'sl_iec60730_safe_state') + + self.adapter.clear_all_breakpoints() + self.adapter.reset() + + self.reach_to_breakpoint('IEC60730_IMC_BIST_CHECK_BKBUF_BKPT', True, 1) + self.adapter.clear_all_breakpoints() + + iec60730_bk_buf_location = 0 + iec60730_bk_buf_location = variables['iec60730_bk_buf'] + + phaseBuffs = [] + if isEnableMarchXC : + phaseBuffs = ['IEC60730_MARCHXC_STEP_BUFF2', + 'IEC60730_MARCHXC_STEP_BUFF5', + 'IEC60730_MARCHXC_STEP_BUFF6'] + else : + phaseBuffs = ['IEC60730_MARCHXC_STEP_BUFF2', + 'IEC60730_MARCHXC_STEP_BUFF3', + 'IEC60730_MARCHXC_STEP_BUFF4', + 'IEC60730_MARCHXC_STEP_BUFF5', + 'IEC60730_MARCHXC_STEP_BUFF6'] + + for phase in phaseBuffs : + self.corruption(address = iec60730_bk_buf_location, + value = 0xA5A5A5A5, + time = 1, + label = phase, + label_pass = 'sl_iec60730_safe_state') + + return True + + @iec60730_test_case('TC: Stack Test work normally') + ## Verify the DUT run to check RAM and not failed at BIST. This TC checks + # under normal conditions with no exceptions, vmc module DOES NOT raise issue. + # + # @details Order of execution + # - Reset device + # + # - Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT + # - Verify code reaches breakpoint at IEC60730_VMC_BIST_STACK_TEST_OK_BKPT + # + # @return True + # + def test_work_normally_stack_test(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.reset() + + self.reach_to_breakpoint('IEC60730_VMC_BIST_START_BKPT', True, 1) + self.adapter.clear_all_breakpoints() + + phaseBuffs = ['IEC60730_VMC_BIST_STACK_TEST_BKPT', + 'IEC60730_VMC_BIST_STACK_TEST_OK_BKPT' ] + + for phase in phaseBuffs : + self.reach_to_breakpoint(phase, True, 1) + + return True + + @iec60730_test_case('TC: Stack Test failed') + ## Verify the DUT jump to #sl_iec60730_safe_state when stack test failed at + # BIST. This TC simulates an abnormal situation that causes the variable + # \ref iec60730_stack_test_over_flow to be changed. This leads to jump to break point at + # #sl_iec60730_safe_state. + # + # In the VMC documentation there is a detailed description of the variable + # \ref iec60730_stack_test_over_flow. + # + # @details Order of execution + # - Reset device + # + # - Verify code reaches breakpoint at IEC60730_VMC_BIST_START_BKPT + # - Edit value at address of \ref iec60730_stack_test_over_flow + # - Verify code reaches breakpoint at #sl_iec60730_safe_state + # + # @return True + # + def test_detect_failed_stack_test(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + self.adapter.reset() + + self.reach_to_breakpoint('IEC60730_VMC_BIST_START_BKPT', True, 1) + self.adapter.clear_all_breakpoints() + + # Edit variable iec60730_stack_test_over_flow + iec60730_stack_test_over_flow_location = 0 + iec60730_stack_test_over_flow_location = variables['iec60730_stack_test_over_flow'] + + for i in range(4): + iec60730_stack_test_over_flow = self.adapter.memory_read32(iec60730_stack_test_over_flow_location + 4 * i, 1) + logging.info("DUT iec60730_stack_test_over_flow[" + str(i) + "]=" + hex(iec60730_stack_test_over_flow[0])) + self.corruption(address = iec60730_stack_test_over_flow_location + 4 * i, + value = 0x00000000, + time = 1, + label = 'IEC60730_VMC_BIST_STACK_TEST_BKPT', + label_pass = 'sl_iec60730_safe_state') + + return True + +if __name__ == "__main__": + + ## Chip name run test + chip_name = os.getenv('CHIP') + + ## Path to file *.lst + lst_file_path = os.getenv('LST_PATH') + + ## serialno of device + adapter_serial_no = os.getenv('ADAPTER_SN') + + ## Path to jlink library + lib_path = os.getenv('JLINK_PATH') + + ## Enable test with MARCH-X algorithm + use_marchx_enable = os.getenv('INTEGRATION_TEST_USE_MARCHX_DISABLE') + if not use_marchx_enable: + use_marchx_enable = "enable" + else: + if use_marchx_enable == "disable": + ## Disallowance testing with MARCH-X algorithm + isEnableMarchXC = False + print("Using MarchXC algorithm: "+use_marchx_enable) + + while len(sys.argv) > 1: + ## Number of arguments passed into the script file + line = sys.argv.pop() + if len(sys.argv) == 1: + ## compiler creates the file *.lst + compiler = line + + unittest.main() + +## @} +# @} diff --git a/test/test_script/integration_test_iec60730_watchdog.py b/test/test_script/integration_test_iec60730_watchdog.py new file mode 100644 index 00000000..919ae64b --- /dev/null +++ b/test/test_script/integration_test_iec60730_watchdog.py @@ -0,0 +1,424 @@ +#!/usr/bin/env python +# License +# Copyright 2024 Silicon Laboratories Inc. www.silabs.com +# ******************************************************************************* +# +# The licensor of this software is Silicon Laboratories Inc. Your use of this +# software is governed by the terms of Silicon Labs Master Software License +# Agreement (MSLA) available at +# www.silabs.com/about-us/legal/master-software-license-agreement. This +# software is distributed to you in Source Code format and is governed by the +# sections of the MSLA applicable to Source Code. +# ******************************************************************************* + +## @addtogroup IEC60730_INTEGRATION_TEST +# @{ +# @defgroup IEC60730_WATCHDOG_VERIFICATION Watchdog Automated Verification Tests +# @{ +# Python script for the IEC60730 Watchdog timer Verification tests. +# +# For details on the tests, see iec60730_watchdog.iec60730_watchdog. +# +#@section watchdog_test_results Test Results +# +#EFR32 Device | Test Results +#-------------|------------- + + +from binascii import hexlify +import random +import os +import sys +from time import sleep +from util import device_target_power_on_off + +from iec60730_test_base import * +import jlink, jlink_constants +import unittest +import enums + +def int_to_bytes(number: int) -> bytes: + return number.to_bytes(length=(8 + (number + (number < 0)).bit_length()) // 8, byteorder='big', signed=True) + +## IP address of device +hostIP = os.getenv('HOST_IP') + +## IEC60730 Watchdog Verification Tests +# +# @details This class runs IEC60730 verification tests for the watchdog. +# +# Hardware setup: +# Connect DUT to PC. No additional hardware setup required. + +class iec60730_watchdog(unittest.TestCase, iec60730TestBase): + ## Text name of the test suite, used in XML output. + TEST_SUITE_NAME = "Watchdog" + + ## Set up connect device. + def setUp(self): + self.env_setup(adapter_serial_no, chip_name, lst_file_path, lib_path, compiler) + + ## Clear reset cause register. + def clear_rst_causes(self): + logging.info("Clear RSTCAUSES register.") + rstcauses_register = self.adapter.memory_read32(variables['rstcauses_register'], 1) + self.assertNotEqual(0, rstcauses_register[0],\ + "Can not read rstcauses_register value") + logging.info("Read RSTCAUSES Register at address: " + hex(rstcauses_register[0])) + rstcauses_clear = self.adapter.memory_read32(variables['rstcauses_clear'], 1) + self.assertNotEqual(0, rstcauses_clear[0],\ + "Can not read rstcauses_clear value") + logging.info("Read bit mask value uses to clear reset cause: " + hex(rstcauses_clear[0])) + reg = self.adapter.memory_write32(rstcauses_register[0], data = [rstcauses_clear[0]], zone=None) + + ## Allows to start running test watchdog. + def wdog_test_running_enable(self): + pc = self.adapter.run_to_breakpoint(20) + logging.info("Halted at label: " + self.get_label(pc)) + + watchdogStateLocation = variables['wdog_por_wait'] + self.assertNotEqual(0, watchdogStateLocation,\ + "Can not read wdog_por_wait address") + logging.info("Set wdog_por_wait flag at address: " + hex(watchdogStateLocation)) + reg = self.adapter.memory_write32(watchdogStateLocation, data = [1], zone=None) + + ## Reset watchdog by power on by sending command to hostIP. + def wdog_power_cycle(self): + self.adapter_close() + + device_target_power_on_off(hostIP, "off") + print("Target power off.") + print("Waiting...") + sleep(2) + device_target_power_on_off(hostIP, "on") + print("Target power on.") + sleep(1) + + self.re_connect_mcu() + + @iec60730_test_case('TC: Watchdog Power On Self Test') + ## Verify the DUT follows the watchdog timer POST test logic correctly. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_POR_RESET_BKPT + # - Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TIMEOUT_BKPT + # - Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT + # - Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_END_BKPT + # - Verify the Watchdog status is SL_IEC60730_WATCHDOG_VALID + # - Verify the Watchdog status saved to BURAM is SL_IEC60730_WATCHDOG_VALID (On EFR32 series 2 only) + # - Code correctly tested watchdog timer and watchdog reset trigger, + # enters main loop + # - Test passes, return True + # + # @return True + # + def test_tc1_watchdog_por_execution(self): + self.wdog_power_cycle() + self.adapter.halt() + self.adapter.clear_all_breakpoints() + bp1 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_WATCHDOG_POST_POR_RESET_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp2 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_WATCHDOG_POST_TIMEOUT_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp3 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_WATCHDOG_POST_TESTING_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp4 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_WATCHDOG_POST_END_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp5 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_TEST_WDOG_POR_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + # Reset device + self.adapter.reset() + self.wdog_test_running_enable() + + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_WATCHDOG_POST_POR_RESET_BKPT'],\ + "DUT failed to enter testing state" \ + " , pc = " + hex(pc)) + + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_WATCHDOG_POST_TIMEOUT_BKPT'],\ + "DUT failed to trigger watchdog 0 timeout" \ + " , pc = " + hex(pc)) + + self.wdog_test_running_enable() + pc = self.adapter.run_to_breakpoint(3) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_WATCHDOG_POST_TESTING_BKPT'],\ + "DUT failed to enter pass result status" \ + " , pc = " + hex(pc)) + + # Second Watchdog + if wdog1_present == "enable": + pc = self.adapter.run_to_breakpoint(3) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_WATCHDOG_POST_TIMEOUT_BKPT'],\ + "DUT failed to trigger watchdog 1 timeout" \ + " , pc = " + hex(pc)) + self.wdog_test_running_enable() + pc = self.adapter.run_to_breakpoint(3) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_WATCHDOG_POST_TESTING_BKPT'],\ + "DUT failed to enter pass result status" \ + " , pc = " + hex(pc)) + + pc = self.adapter.run_to_breakpoint(7) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_WATCHDOG_POST_END_BKPT'],\ + "DUT failed to finish POR test" \ + " , pc = " + hex(pc)) + + watchdogStateLocation = variables['iec60730_watchdog_state'] + self.assertNotEqual(0, watchdogStateLocation,\ + "Can not read iec60730_watchdog_state address") + logging.info("Read mem at address: " + hex(watchdogStateLocation)) + reg = self.adapter.memory_read8(watchdogStateLocation, 1, zone=None) + + # State must be SL_IEC60730_WATCHDOG_VALID (2) + self.assertEqual(reg[0], 2, "DUT failed in POR completed state") + + if -1 != chip_name.find("G2"): + # Check BURAM + buram_addr = self.adapter.memory_read32(variables['buram_addr'], 1) + logging.info("Read BURAM Register at address: " + hex(buram_addr[0])) + reg = self.adapter.read_ram_arm_32(buram_addr[0], num_words = 1) + # State must be SL_IEC60730_WATCHDOG_VALID (2) + self.assertEqual(reg[0], 0x2, "DUT failed to save state") + + logging.info("DUT correctly running the watchdog POR test.") + return True + + @iec60730_test_case('TC: Watchdog internal counter failed') + ## Verify the DUT follows the watchdog timer POST test logic correctly. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT + # - Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT + # - Code correctly enters safe state + # - Test passes, return True + # + # @return True + # + def test_tc2_watchdog_counter_execution(self): + self.wdog_power_cycle() + self.adapter.halt() + self.adapter.clear_all_breakpoints() + bp1 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_WATCHDOG_POST_TESTING_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp2 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_SAFE_STATE_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp3 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_TEST_WDOG_POR_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + # Reset device + self.adapter.reset() + self.wdog_test_running_enable() + + # Enable again after first wdog reset + self.wdog_test_running_enable() + + pc = self.adapter.run_to_breakpoint(4) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_WATCHDOG_POST_TESTING_BKPT'],\ + "DUT failed to enter pass result status" \ + " , pc = " + hex(pc)) + + WatchdogCount_loc = variables['iec60730_watchdog_count'] + self.assertNotEqual(0, WatchdogCount_loc,\ + "Can not read iec60730_watchdog_count address") + logging.info("Read mem at address: " + hex(WatchdogCount_loc)) + reg = self.adapter.memory_read8(WatchdogCount_loc, 1, zone=None) + reg[0] += 5 + reg = self.adapter.memory_write8(WatchdogCount_loc, data = (reg), zone=None) + + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SAFE_STATE_BKPT'],\ + "DUT failed to safe state" \ + " , pc = " + hex(pc)) + + logging.info("DUT correctly enter safe state when internal counter failed.") + return True + + @iec60730_test_case('TC: Watchdog wrong reset cause') + ## Verify the DUT follows the watchdog timer POST test logic correctly. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_TESTING_BKPT + # - Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT + # - Code correctly enters safe state + # - Test passes, return True + # + # @return True + # + def test_tc3_watchdog_wrong_rst_execution(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + bp1 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_WATCHDOG_POST_TESTING_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp2 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_SAFE_STATE_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp5 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_TEST_WDOG_POR_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + # Reset device + self.adapter.reset() + self.wdog_test_running_enable() + + pc = self.adapter.run_to_breakpoint(4) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_WATCHDOG_POST_TESTING_BKPT'],\ + "DUT failed to enter pass result status" \ + " , pc = " + hex(pc)) + + # Clear Watchdog reset flag + self.clear_rst_causes() + + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SAFE_STATE_BKPT'],\ + "DUT failed to safe state" \ + " , pc = " + hex(pc)) + + + logging.info("DUT correctly enter safe state when wrong reset cause detected.") + return True + + @iec60730_test_case('TC: Watchdog wrong testing state') + ## Verify the DUT follows the watchdog timer POST test logic correctly. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_WATCHDOG_POST_WORKING_BKPT + # - Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT + # - Code correctly enters safe state + # - Test passes, return True + # + # @return True + # + def test_tc4_watchdog_wrong_testing_execution(self): + self.wdog_power_cycle() + self.adapter.halt() + self.adapter.clear_all_breakpoints() + bp1 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_WATCHDOG_POST_WORKING_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp2 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_SAFE_STATE_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp3 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_TEST_WDOG_POR_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + # Reset device + self.adapter.reset() + self.wdog_test_running_enable() + + # Enable again after first wdog reset + self.wdog_test_running_enable() + + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_WATCHDOG_POST_WORKING_BKPT'],\ + "DUT failed to enter pass result status" \ + " , pc = " + hex(pc)) + + watchdogStateLocation = variables['iec60730_watchdog_state'] + self.assertNotEqual(0, watchdogStateLocation,\ + "Can not read iec60730_watchdog_state address") + logging.info("Read mem at address: " + hex(watchdogStateLocation)) + reg = self.adapter.memory_read8(watchdogStateLocation, 1, zone=None) + # Reset state value + reg[0] = 0 + reg = self.adapter.memory_write8(watchdogStateLocation, data = (reg), zone=None) + + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SAFE_STATE_BKPT'],\ + "DUT failed to safe state" \ + " , pc = " + hex(pc)) + + + logging.info("DUT correctly enter safe state when wrong testing state detected.") + return True + + @iec60730_test_case('TC: Watchdog reset when not restarted') + ## Verify the DUT follows the watchdog timer POST test logic correctly. + # @details Order of execution: + # - Verify code reaches breakpoint at IEC60730_TEST_RESTART_WDOG_BKPT + # - Verify code reaches breakpoint at IEC60730_SAFE_STATE_BKPT + # - Code correctly enters safe state + # - Test passes, return True + # + # @return True + # + def test_tc5_restart_watchdog_execution(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + bp1 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_TEST_RESTART_WDOG_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp2 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_SAFE_STATE_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + bp3 = self.adapter.set_breakpoint(address = asm_labels['IEC60730_TEST_WDOG_POR_BKPT'], + typeflags=enums.JLinkBreakpoint.ANY) + + # Reset device + self.adapter.reset() + # Clear Watchdog reset flags + self.clear_rst_causes() + + self.wdog_test_running_enable() + + pc = self.adapter.run_to_breakpoint(4) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_TEST_RESTART_WDOG_BKPT'],\ + "DUT failed to enter watchdog restart" \ + " , pc = " + hex(pc)) + + wdog_restart_loc = variables['wdog_restart_enable'] + self.assertNotEqual(0, wdog_restart_loc,\ + "Can not read wdog_restart_enable address") + logging.info("Read mem at address: " + hex(wdog_restart_loc)) + # Disable watchdog restart + reg = self.adapter.memory_write8(wdog_restart_loc, data = [0], zone=None) + + self.wdog_test_running_enable() + pc = self.adapter.run_to_breakpoint(1) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_SAFE_STATE_BKPT'],\ + "DUT failed to safe state" \ + " , pc = " + hex(pc)) + + # Clear Watchdog reset flags + self.clear_rst_causes() + + logging.info("DUT correctly enter safe state after watchdog reset when not restarted.") + return True + +if __name__ == "__main__": + + ## Chip name run test + chip_name = os.getenv('CHIP') + + ## Path to file *.lst + lst_file_path = os.getenv('LST_PATH') + + ## serialno of device + adapter_serial_no = os.getenv('ADAPTER_SN') + + ## Path to jlink library + lib_path = os.getenv('JLINK_PATH') + + ## Enable test watchdog 1 + wdog1_present = os.getenv('INTEGRATION_TEST_WDOG1_ENABLE') + if not wdog1_present: + wdog1_present = "disable" + print("Watchdog 1 testing: "+wdog1_present) + + while len(sys.argv) > 1: + ## Number of arguments passed into the script file + line = sys.argv.pop() + if len(sys.argv) == 1: + ## compiler creates the file *.lst + compiler = line + + print("Compiler: "+compiler) + + unittest.main() + +## @} +# @} diff --git a/test/test_script/jlink.py b/test/test_script/jlink.py new file mode 100644 index 00000000..199fa4a4 --- /dev/null +++ b/test/test_script/jlink.py @@ -0,0 +1,912 @@ +""" +jlink.py: JLinkARM.dll Wrapper - Python Edition + +This module provides access to all functions of JLinkARM.dll. + +""" +import ctypes +import ctypes as ct +import os +import sys +import logging +import six +import time +from enum import Enum, unique +import enums +import errors +from jlink_constants import * + +# Adapter Interfaces +JLINKARM_HOSTIF_USB = 0x01 +JLINKARM_HOSTIF_IP = 0x02 + + +class JLinkDll: + """ + Object for accessing and controlling a JLink adapter + """ + MAX_BUF_SIZE = 336 + + # Maximum number of adapters this wrapper can find. + MAX_NUM_ADAPTERS = 32 + + # Maximum number of CPU registers. + MAX_NUM_CPU_REGISTERS = 256 + + #logger = None + + def __init__(self, lib_path): + try: + # Load JLinkARM.dll + self._dll = ct.cdll.LoadLibrary(lib_path) + #self._dll = ct.cdll.LoadLibrary("/opt/SEGGER/ozone/3.22.1/Lib/libjlinkarm.so") + except: + print("Unable to load JLinkDll class") + + # Keep a list of all adapters + self._num_adapters, self._adapter_list = self.get_usb_adapter_list() + + # Initialize all properties of the connected MCU + self._initialize_mcu_properties() + + #self._init_logger() + + # Suppress dialog from the DLL + self._suppress_usb_dialog() + + # def _init_logger(self): + # logging.basicConfig(level=logging.INFO, + # format='%(asctime)s - %(levelname)s: %(message)s') + # self.logger = logging.getLogger() + + def abort(self, errMsg): + self.logger.error(errMsg) + self._dll.JLINKARM_Close() + self._initialize_mcu_properties() + + def execute_command(self, command_string): + """ + Execute a JLink command string. + + Keyword arguments: + command_string -- the string to execute with JLINKARM_ExecCommand() + + Returns the return value of the executed command. + """ + logging.debug(" >>>>>>>> Execute command: [" + command_string + "]") + err_buf = (ctypes.c_char * self.MAX_BUF_SIZE)() + buffer_size = ct.c_int(self.MAX_BUF_SIZE) + res = self._dll.JLINKARM_ExecCommand(command_string.encode(), err_buf, buffer_size) + err_buf = ctypes.string_at(err_buf).decode() + + if len(err_buf) > 0: + raise errors.JLinkException(err_buf.strip()) + + return res + + def _initialize_mcu_properties(self): + """ + Resest all internal variables tracking the properties of the + attached MCU. + """ + self._mcu_interface_type = None + self._mcu_core = None + self._id_code = None + self._part_family = None + self._part_number = None + self._part_number_id = None + self._flash_size = None + + def _suppress_usb_dialog(self): + """ + Suppresses dialog message from JLinkARM.dll. + """ + result = self.execute_command("SuppressEmuUSBDialog") + if result != 0: + raise errors.JLinkException('_suppress_usb_dialog') + + def _locked_part_callback(self, sTitle, sMessage, Flags): + """ + Callback function called if attached part is locked. + This prevents pop-up dialog from JLINK DLL. + """ + JLINK_DLG_BUTTON_NO = (1 << 1) + + return JLINK_DLG_BUTTON_NO + + def get_usb_adapter_list(self): + """ + Returns a list of all adapters connected to the host via USB. + """ + host_ifs = ct.c_int(JLINKARM_HOSTIF_USB) + connect_info = \ + (JLinkArmEmuConnectInfo_CStruct * self.MAX_NUM_ADAPTERS)() + max_info = ct.c_int(self.MAX_NUM_ADAPTERS) + + num_adapters = self._dll.JLINKARM_EMU_GetList(host_ifs, + ct.byref(connect_info), + max_info) + # Create a list of information for each adapter + adapter_list = [] + for i in range(num_adapters): + adapter_list.append(connect_info[i]) + self._num_adapters = num_adapters + self._adapter_list = adapter_list + return num_adapters, adapter_list + + def get_tcp_ip_adapter_list(self): + """ + Returns a list of all adapters connected to the host via TCP/IP. + """ + host_ifs = ct.c_int(JLINKARM_HOSTIF_IP) + connect_info = \ + (JLinkArmEmuConnectInfo_CStruct * self.MAX_NUM_ADAPTERS)() + max_info = ct.c_int(self.MAX_NUM_ADAPTERS) + + num_adapters = self._dll.JLINKARM_EMU_GetList(host_ifs, + ct.byref(connect_info), + max_info) + # Create a list of information for each adapter + adapter_list = [] + for i in range(num_adapters): + adapter_list.append(connect_info[i]) + + return num_adapters, adapter_list + + def get_adapter_list(self): + """ + Returns a list of all adapters connected to the host via TCP/IP or USB. + """ + host_ifs = ct.c_int(JLINKARM_HOSTIF_USB | JLINKARM_HOSTIF_IP) + connect_info = \ + (JLinkArmEmuConnectInfo_CStruct * self.MAX_NUM_ADAPTERS)() + max_info = ct.c_int(self.MAX_NUM_ADAPTERS) + + num_adapters = self._dll.JLINKARM_EMU_GetList(host_ifs, + ct.byref(connect_info), + max_info) + # Create a list of information for each adapter + adapter_list = [] + for i in range(num_adapters): + adapter_list.append(connect_info[i]) + + return num_adapters, adapter_list + + def connect(self, + serial_number, + chip_name): + # First, look for the adapter in the adapter list + # num_adapters, adapter_list = self.get_usb_adapter_list() + found_adapter = False + for adapter in self._adapter_list: + if adapter.SerialNumber == serial_number: + found_adapter = True + break + + if not found_adapter: + raise errors.JLinkException('No emulator with serial number %s found.' % serial_number) + + self._suppress_usb_dialog() + # serial_number = ct.c_uint32(serial_number) + + # USB Adapter + if adapter.Connection == JLINKARM_HOSTIF_USB: + error = self._dll.JLINKARM_EMU_SelectByUSBSN(serial_number) + if error < 0: + raise errors.JLinkException('No emulator with serial number %s found.' % serial_number) + else: + print("TCP/IP support currently not implemented in jlink.py.") + return False + + self._initialize_mcu_properties() + + self._dll.JLINKARM_Open.restype = ctypes.POINTER(ctypes.c_char) + result = self._dll.JLINKARM_Open() + result = ctypes.cast(result, ctypes.c_char_p).value + if result is not None: + raise errors.JLinkException(result.decode()) + + error = self._dll.JLINKARM_HasError() + if error != 0: + raise errors.JLinkException("JLINKARM_HasError = True") + + self._dll.JLINKARM_TIF_Select(enums.JLinkInterfaces.SWD) + #self.set_device("EFR32MG21AXXXF1024") + + # Set device + self.set_device(chip_name) + + # Set to maximum speed + speed_info = self.get_speed_info() + maxSpeed = int(speed_info["BaseFreq"] / speed_info["MinDiv"] / 1000) + speedSet = int(maxSpeed / 2) + logging.info("JLINKARM_SetSpeed: " + str(speedSet)) + self._dll.JLINKARM_SetSpeed(speedSet) + + # Connect, halt, and get the Part ID + result = self._dll.JLINKARM_Connect() + + if result < 0: + raise errors.JLinkException(result) + + self._dll.JLINKARM_Halt() + + id_data = self.get_id_data() + + self._part_number = chip_name + self._part_family = self._dll.JLINKARM_GetDeviceFamily() + + return True + + def close(self): + """ + Closes the connection to the JLink adapter. + """ + self._dll.JLINKARM_Close() + self._initialize_mcu_properties() + + def get_speed(self): + """ + Returns the current JTAG connection speed. + """ + speed = self._dll.JLINKARM_GetSpeed() + return speed + + def set_max_speed(self): + """ + Sets the JTAG connection speed to its maximum value. + """ + self._dll.JLINKARM_SetMaxSpeed() + + def set_speed(self, speed=4000): + """ + Sets the JTAG connection speed. + + Keyword arguments: + speed -- speed of JTAG connection in kHz. + """ + self._dll.JLINKARM_SetSpeed(ct.c_uint32(speed)) + + def get_speed_info(self): + """ + Gets the target interface speed information. + + Returns a dictionary containing the speed information. + """ + speed_info = JlinkArm_Speed_Info_CStruct() + speed_info.SizeOfStruct = ct.c_uint32(ct.sizeof(speed_info)) + self._dll.JLINKARM_GetSpeedInfo(ct.pointer(speed_info)) + + return {"BaseFreq": speed_info.BaseFreq, + "MinDiv": speed_info.MinDiv, + "SupportAdaptive": bool(speed_info.SupportAdaptive)} + + def get_id(self): + """ + Retrieves ID of the core. + """ + id = self._dll.JLINKARM_GetId() + return id + + def get_id_data(self): + """ + Retrieves detailed info of the device on the JTAG bus. + """ + id_data = JLinkJtagIdData_CStruct() + self._dll.JLINKARM_GetIdData(ct.pointer(id_data)) + return id_data + + def halted(self): + """Returns whether the CPU core was halted. + + Args: + self (JLink): the ``JLink`` instance + + Returns: + ``True`` if the CPU core is halted, otherwise ``False``. + + Raises: + JLinkException: on device errors. + """ + result = int(self._dll.JLINKARM_IsHalted()) + if result < 0: + raise errors.JLinkException(result) + + return (result > 0) + + def run_to_breakpoint(self, timeout): + + self._dll.JLINKARM_Step() + self._dll.JLINKARM_Go() + isHalted = False + startTime = time.perf_counter() + while isHalted == False and \ + (time.perf_counter() - startTime) < timeout: + isHalted = self.halted() + + pc_halt = self.register_read("R15 (PC)") + + logging.debug("Halted at: " + hex(pc_halt)) + + return pc_halt + + def go_ex(self): + """ + Runs the currently connected device, skipping over any breakpoint at the current instruction. + """ + self._dll.JLINKARM_GoEx(ct.c_uint32(JLINKARM_GO_MAX_EMUL_INSTS_DEFAULT), + ct.c_uint32(JLINKARM_GO_FLAG_OVERSTEP_BP)) + + def step(self): + self._dll.JLINKARM_Step() + + def halt(self): + self._dll.JLINKARM_Halt() + + def reset(self, halt=True): + """ + Resets the currently connected device. + + Keyword arguments: + halt -- if true, the part will be halted before reset + if false, the part will not be halted before reset + """ + if halt: + self._dll.JLINKARM_Reset() + else: + self._dll.JLINKARM_ResetNoHalt() + + def get_device_family(self): + return self._dll.JLINKARM_GetDeviceFamily() + + def set_device(self, device): + result = self.execute_command("device = %s" % device) + return result + + + def read_mem(self, address, num_bytes): + data = ct.create_string_buffer(num_bytes) + status = ct.create_string_buffer(256) + result = self._dll.JLINKARM_ReadMem(ct.c_uint32(address), + ct.c_uint32(num_bytes), + ct.pointer(data), + ct.pointer(status)) + if result: + errMsg = "ReadMem: Failure result {} reading {} bytes at '{:#010x}'".format(result, num_bytes, address) + self.abort(errMsg) + # Convert to a list of integers + ret_buffer = [] + for byte in data.raw: + ret_buffer.append(ord(byte)) + + return ret_buffer + + def read_ram_arm_8(self, address, num_bytes): + data = ct.create_string_buffer(num_bytes) + status = ct.create_string_buffer(256) + self._dll.JLINKARM_ReadMemU8(ct.c_uint32(address), + ct.c_uint32(num_bytes), + ct.pointer(data), + ct.pointer(status)) + # Convert to a list of 8-bit integers + ret_buffer = [] + for i in range(num_bytes): + ret_buffer.append(ord(data[i])) + + return ret_buffer + + def read_ram_arm_16(self, address, num_words): + data = ct.create_string_buffer(num_words * 2) + status = ct.create_string_buffer(256) + self._dll.JLINKARM_ReadMemU16(ct.c_uint32(address), + ct.c_uint32(num_words), + ct.pointer(data), + ct.pointer(status)) + # Convert to a list of 16-bit integers + ret_buffer = [] + for i in range(num_words): + ret_buffer.append( + (ord(data[(i * 2) + 1]) * 256) + ord(data[i * 2])) + + return ret_buffer + + def read_ram_arm_32(self, address, num_words): + data = ct.create_string_buffer(num_words * 4) + status = ct.create_string_buffer(256) + self._dll.JLINKARM_ReadMemU32(ct.c_uint32(address), + ct.c_uint32(num_words), + ct.pointer(data), + ct.pointer(status)) + # Convert to a list of 32-bit integers + ret_buffer = [] + for i in range(num_words): + ret_buffer.append((ord(data[(i * 2) + 3]) * 0x1000000) + + (ord(data[(i * 2) + 2]) * 0x10000) + + (ord(data[(i * 2) + 1]) * 0x100) + + ord(data[i * 2])) + + return ret_buffer + + def read_ram_arm_64(self, address, num_words): + """ + Reads a block of RAM in 64-bit words. + + Keyword arguments: + address -- starting address to read + num_words -- number of 64-bit words to read + """ + data = ct.create_string_buffer(num_words * 8) + status = ct.create_string_buffer(256) + self._dll.JLINKARM_ReadMemU64(ct.c_uint32(address), + ct.c_uint32(num_words), + ct.pointer(data), + ct.pointer(status)) + # Convert to a list of 64-bit integers + ret_buffer = [] + for i in range(num_words): + ret_buffer.append((ord(data[(i * 2) + 7]) * 0x100000000000000) + + (ord(data[(i * 2) + 6]) * 0x1000000000000) + + (ord(data[(i * 2) + 5]) * 0x10000000000) + + (ord(data[(i * 2) + 4]) * 0x100000000) + + (ord(data[(i * 2) + 3]) * 0x1000000) + + (ord(data[(i * 2) + 2]) * 0x10000) + + (ord(data[(i * 2) + 1]) * 0x100) + + ord(data[i * 2])) + + return ret_buffer + + def clear_breakpoint(self, bp_to_clear): + ''' + Clears breakpoint on the connected device. + + Keyword arguments: + bp_to_clear - Handle of the breakpoint to clear. + Pass JLINKARM_BP_HANDLE_ALL to clear all breakpoints. + ''' + result = self._dll.JLINKARM_ClrBPEx(ct.c_int32(bp_to_clear)) + if result: + raise errors.JLinkException("JLINKARM_ClrBPEx error") + + def clear_all_breakpoints(self): + result = self._dll.JLINKARM_ClrBPEx(0xFFFFFFFF) + if result: + raise errors.JLinkException("JLINKARM_ClrBPEx clear all breakpoints error") + + def register_name(self, register_index): + """Retrieves and returns the name of an ARM CPU register. + + Args: + self (JLink): the ``JLink`` instance + register_index (int): index of the register whose name to retrieve + + Returns: + Name of the register. + """ + self._dll.JLINKARM_GetRegisterName.restype = ctypes.POINTER(ctypes.c_char) + + result = self._dll.JLINKARM_GetRegisterName(register_index) + return ctypes.cast(result, ctypes.c_char_p).value.decode() + + def register_list(self): + """Returns a list of the indices for the CPU registers. + + The returned indices can be used to read the register content or grab + the register name. + + Args: + self (JLink): the ``JLink`` instance + + Returns: + List of registers. + """ + num_items = self.MAX_NUM_CPU_REGISTERS + buf = (ctypes.c_uint32 * num_items)() + num_regs = self._dll.JLINKARM_GetRegisterList(buf, num_items) + return buf[:num_regs] + + def _get_register_index_from_name(self, register): + """ + Converts a register name to a register index + + Args: + self (JLink): the ``JLink`` instance + register (str): the register name + + Returns: + ``int`` + """ + index = 0xFF + for idx in self.register_list(): + if register == self.register_name(idx): + index = idx + + if index == 0xFF: + error_message = "No register found matching name: {}. (available registers: {})" + regs = list(self.register_name(idx) for idx in self.register_list()) + raise errors.JLinkException(error_message.format(register, ', '.join(regs))) + + return index + + def register_read(self, register_index): + """Reads the value from the given register. + + Args: + self (JLink): the ``JLink`` instance + register_index (int/str): the register to read + + Returns: + The value stored in the given register. + """ + # TODO: rename 'register_index' to 'register' + if isinstance(register_index, six.string_types): + register_index = self._get_register_index_from_name(register_index) + return self._dll.JLINKARM_ReadReg(register_index) + + def register_write(self, reg_index, value): + """Writes into an ARM register. + + Note: + The data is not immediately written, but is cached before being + transferred to the CPU on CPU start. + + Args: + self (JLink): the ``JLink`` instance + reg_index (int/str): the ARM register to write to + value (int): the value to write to the register + + Returns: + The value written to the ARM register. + + Raises: + JLinkException: on write error. + """ + # TODO: rename 'reg_index' to 'register' + if isinstance(reg_index, six.string_types): + reg_index = self._get_register_index_from_name(reg_index) + res = self._dll.JLINKARM_WriteReg(reg_index, value) + if res != 0: + raise errors.JLinkException('Error writing' + hex(value) + ' to register %d' % reg_index) + return value + + + def num_active_breakpoints(self): + """Returns the number of currently active breakpoints. + + Args: + self (JLink): the ``JLink`` instance + + Returns: + The number of breakpoints that are currently set. + """ + return self._dll.JLINKARM_GetNumBPs() + + def set_breakpoint(self, address, typeflags): + ''' + Set a breakpoint within the CPU. + + address - Address for the breakpoint. + typeflags - Flags for the breakpoint. Ignored for EFM8 devices. + ''' + bp_addr = hex(address) + logging.debug("Set BP: " + str(bp_addr)) + flags = enums.JLinkBreakpoint.ANY + handle = self._dll.JLINKARM_SetBPEx(int(address), flags) + if handle <= 0: + raise errors.JLinkException('Breakpoint could not be set.') + + return handle + + def memory_read(self, addr, num_units, zone=None, nbits=None): + """Reads memory from a target system or specific memory zone. + + The optional ``zone`` specifies a memory zone to access to read from, + e.g. ``IDATA``, ``DDATA``, or ``CODE``. + + The given number of bits, if provided, must be either ``8``, ``16``, or + ``32``. If not provided, always reads ``num_units`` bytes. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to read from + num_units (int): number of units to read + zone (str): optional memory zone name to access + nbits (int): number of bits to use for each unit + + Returns: + List of units read from the target system. + + Raises: + JLinkException: if memory could not be read. + ValueError: if ``nbits`` is not ``None``, and not in ``8``, ``16``, + or ``32``. + """ + buf_size = num_units + buf = None + access = 0 + + if nbits is None: + buf = (ctypes.c_uint8 * buf_size)() + access = 0 + elif nbits == 8: + buf = (ctypes.c_uint8 * buf_size)() + access = 1 + elif nbits == 16: + buf = (ctypes.c_uint16 * buf_size)() + access = 2 + buf_size = buf_size * access + elif nbits == 32: + buf = (ctypes.c_uint32 * buf_size)() + access = 4 + buf_size = buf_size * access + else: + raise ValueError('Given bit size is invalid: %s' % nbits) + + args = [addr, buf_size, buf, access] + + method = self._dll.JLINKARM_ReadMemEx + if zone is not None: + method = self._dll.JLINKARM_ReadMemZonedEx + args.append(zone.encode()) + + units_read = method(*args) + if units_read < 0: + raise errors.JLinkReadException(units_read) + + return buf[:units_read] + + def memory_read8(self, addr, num_bytes, zone=None): + """Reads memory from the target system in units of bytes. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to read from + num_bytes (int): number of bytes to read + zone (str): memory zone to read from + + Returns: + List of bytes read from the target system. + + Raises: + JLinkException: if memory could not be read. + """ + return self.memory_read(addr, num_bytes, zone=zone, nbits=8) + + def memory_read16(self, addr, num_halfwords, zone=None): + """Reads memory from the target system in units of 16-bits. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to read from + num_halfwords (int): number of half words to read + zone (str): memory zone to read from + + Returns: + List of halfwords read from the target system. + + Raises: + JLinkException: if memory could not be read + """ + return self.memory_read(addr, num_halfwords, zone=zone, nbits=16) + + def memory_read32(self, addr, num_words, zone=None): + """Reads memory from the target system in units of 32-bits. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to read from + num_words (int): number of words to read + zone (str): memory zone to read from + + Returns: + List of words read from the target system. + + Raises: + JLinkException: if memory could not be read + """ + return self.memory_read(addr, num_words, zone=zone, nbits=32) + + def memory_read64(self, addr, num_long_words): + """Reads memory from the target system in units of 64-bits. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to read from + num_long_words (int): number of long words to read + + Returns: + List of long words read from the target system. + + Raises: + JLinkException: if memory could not be read + """ + buf_size = num_long_words + buf = (ctypes.c_ulonglong * buf_size)() + units_read = self._dll.JLINKARM_ReadMemU64(addr, buf_size, buf, 0) + if units_read < 0: + raise errors.JLinkException(units_read) + + return buf[:units_read] + + def memory_write(self, addr, data, zone=None, nbits=None): + """Writes memory to a target system or specific memory zone. + + The optional ``zone`` specifies a memory zone to access to write to, + e.g. ``IDATA``, ``DDATA``, or ``CODE``. + + The given number of bits, if provided, must be either ``8``, ``16``, or + ``32``. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to write to + data (list): list of data units to write + zone (str): optional memory zone name to access + nbits (int): number of bits to use for each unit + + Returns: + Number of units written. + + Raises: + JLinkException: on write hardware failure. + ValueError: if ``nbits`` is not ``None``, and not in ``8``, ``16`` or + ``32``. + """ + buf_size = len(data) + buf = None + access = 0 + + if nbits is None: + # Pack the given data into an array of 8-bit unsigned integers in + # order to write it successfully + packed_data = map(lambda d: reversed(binpacker.pack(d)), data) + packed_data = list(itertools.chain(*packed_data)) + + buf_size = len(packed_data) + buf = (ctypes.c_uint8 * buf_size)(*packed_data) + + # Allow the access width to be chosen for us. + access = 0 + elif nbits == 8: + buf = (ctypes.c_uint8 * buf_size)(*data) + access = 1 + elif nbits == 16: + buf = (ctypes.c_uint16 * buf_size)(*data) + access = 2 + buf_size = buf_size * access + elif nbits == 32: + buf = (ctypes.c_uint32 * buf_size)(*data) + access = 4 + buf_size = buf_size * access + else: + raise ValueError('Given bit size is invalid: %s' % nbits) + + args = [addr, buf_size, buf, access] + + method = self._dll.JLINKARM_WriteMemEx + if zone is not None: + method = self._dll.JLINKARM_WriteMemZonedEx + args.append(zone.encode()) + + units_written = method(*args) + if units_written < 0: + raise errors.JLinkWriteException(units_written) + + return units_written + + def memory_write8(self, addr, data, zone=None): + """Writes bytes to memory of a target system. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to write to + data (list): list of bytes to write + zone (str): optional memory zone to access + + Returns: + Number of bytes written to target. + + Raises: + JLinkException: on memory access error. + """ + return self.memory_write(addr, data, zone, 8) + + def memory_write16(self, addr, data, zone=None): + """Writes half-words to memory of a target system. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to write to + data (list): list of half-words to write + zone (str): optional memory zone to access + + Returns: + Number of half-words written to target. + + Raises: + JLinkException: on memory access error. + """ + return self.memory_write(addr, data, zone, 16) + + def memory_write32(self, addr, data, zone=None): + """Writes words to memory of a target system. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to write to + data (list): list of words to write + zone (str): optional memory zone to access + + Returns: + Number of words written to target. + + Raises: + JLinkException: on memory access error. + """ + return self.memory_write(addr, data, zone, 32) + + def memory_write64(self, addr, data, zone=None): + """Writes long words to memory of a target system. + + Note: + This is little-endian. + + Args: + self (JLink): the ``JLink`` instance + addr (int): start address to write to + data (list): list of long words to write + zone (str): optional memory zone to access + + Returns: + Number of long words written to target. + + Raises: + JLinkException: on memory access error. + """ + words = [] + bitmask = 0xFFFFFFFF + for long_word in data: + words.append(long_word & bitmask) # Last 32-bits + words.append((long_word >> 32) & bitmask) # First 32-bits + return self.memory_write32(addr, words, zone=zone) + + def erase_chip(self): + """ + Erases all user flash on the connected device. + """ + result = self._windll.JLINK_EraseChip() + if result < 0: + errMsg = "Erase Chip Failed with Error code {}".format(result) + self.abort(errMsg) + return False + return True + + def download(self, image, offset=0): + if not os.path.isfile(image): + print('Could not find image file %s' % image) + + file_name = ct.c_char_p(image) + retval = self._windll.JLINK_DownloadFile( + file_name, ct.c_uint32(offset)) + self.reset() + + @classmethod + def ErrorOutHandler(cls, errorMsg): + """ + Log error from the DLL. + + :param errorMsg: The DLL error message. + """ + if cls.logger: + cls.logger.error(errorMsg.data) + + cls.library_error_list.append(errorMsg.data) + + @classmethod + def WarnOutHandler(cls, warnMsg): + """ + Log warning from the DLL. + + :param warnMsg: The DLL error message. + """ + if cls.logger: + cls.logger.warn(warnMsg.data) diff --git a/test/test_script/jlink.pyc b/test/test_script/jlink.pyc new file mode 100644 index 00000000..84318504 Binary files /dev/null and b/test/test_script/jlink.pyc differ diff --git a/test/test_script/jlink_constants.py b/test/test_script/jlink_constants.py new file mode 100644 index 00000000..3044cca3 --- /dev/null +++ b/test/test_script/jlink_constants.py @@ -0,0 +1,46 @@ +""" +jlink_constants.py: Constants for JLinkARM.dll Wrapper - Python Edition + +This module provides constants used by the JLinkARM.dll wrapper jlink.py. +""" +import ctypes as ct + +class JLinkArmEmuConnectInfo_CStruct(ct.Structure): + """ JLINKARM_EMU_CONNECT_INFO struct """ + _pack_ = 1 + _fields_ = [("SerialNumber", ct.c_uint32), + ("Connection", ct.c_uint), + ("USBAddr", ct.c_uint32), + ("aIPAddr", ct.c_uint8 * 16), + ("Time", ct.c_int), + ("Time_us", ct.c_uint64), + ("HWVersion", ct.c_uint32), + ("abMACAddr", ct.c_uint8 * 6), + ("acProduct", ct.c_char * 32), + ("acNickName", ct.c_char * 32), + ("acFWString", ct.c_char * 112), + ("IsDHCPAssignedIP", ct.c_char), + ("IsDHCPAssignedIPIsValid", ct.c_char), + ("NumIPConnections", ct.c_char), + ("NumIPConnectionsIsValid", ct.c_char), + ("aPadding", ct.c_uint8 * 34)] + + +class JLinkJtagIdData_CStruct(ct.Structure): + """ JLINKARM_EMU_CONNECT_INFO struct """ + _pack_ = 1 + _fields_ = [("NumDevices", ct.c_int), + ("ScanLen", ct.c_uint16), + ("aId", ct.c_uint32 * 3), + ("aScanLen", ct.c_uint8 * 3), + ("aIrRead", ct.c_uint8 * 3), + ("aScanRead", ct.c_uint8 * 3)] + + +class JlinkArm_Speed_Info_CStruct(ct.Structure): + """ JLINKARM_SPEED_INFO struct """ + _pack_ = 1 + _fields_ = [("SizeOfStruct", ct.c_uint32), + ("BaseFreq", ct.c_uint32), + ("MinDiv", ct.c_uint16), + ("SupportAdaptive", ct.c_uint16)] diff --git a/test/test_script/unit_test_iec60730_get_report.py b/test/test_script/unit_test_iec60730_get_report.py new file mode 100644 index 00000000..400cb3a6 --- /dev/null +++ b/test/test_script/unit_test_iec60730_get_report.py @@ -0,0 +1,198 @@ +#!/usr/bin/env python +# License +# Copyright 2024 Silicon Laboratories Inc. www.silabs.com +# ******************************************************************************* +# +# The licensor of this software is Silicon Laboratories Inc. Your use of this +# software is governed by the terms of Silicon Labs Master Software License +# Agreement (MSLA) available at +# www.silabs.com/about-us/legal/master-software-license-agreement. This +# software is distributed to you in Source Code format and is governed by the +# sections of the MSLA applicable to Source Code. +# ******************************************************************************* + +from binascii import hexlify +import random +import os +import sys +from time import sleep +import glob + +from iec60730_test_base import * +import jlink, jlink_constants +import unittest +import enums +import re +import logging + +list_test_case = [] +unity_begin_row = 0 +unity_end_row = 0 + +def get_unity_begin_file(files,logger): + with open(files, 'r') as fp: + # read all lines using readline() + lines = fp.readlines() + for row in lines: + # check if string present on a current line + word = 'UnityBegin' + if row.find(word) != -1: + res = re.findall(r'\(.*?\)', row) + file_test = str(res[0]) + file_test =file_test.replace('(','').replace(')','').replace('"','') + # printing result + logger.info("File test case: " + file_test) + return file_test, lines.index(row) + +def get_unity_end_file(files): + with open(files, 'r') as fp: + # read all lines using readline() + lines = fp.readlines() + for row in lines: + # check if string present on a current line + word = 'UnityEnd' + if row.find(word) != -1: + return lines.index(row) + +def get_test_case(files,logger,start,end): + with open(files, 'r') as fp: + # read all lines using readline() + lines = fp.readlines() + + for row in lines: + # check if string present on a current line + word = 'run_test' + if (row.find(word) != -1) and (start < lines.index(row)) \ + and (end > lines.index(row)): + res = re.findall(r'\(.*?\)', row) + test_case = str(res[0]) + test_case = test_case.replace('(','').replace(')','').replace('"','') + # printing result + list_test_case.append(test_case) + return list_test_case + +def get_report_unit_test(result,file_test_case,log_report): + test_fail = 0 + + # Remove all handlers associated with the root logger object. + for handler in logging.root.handlers[:]: + logging.root.removeHandler(handler) + logging.basicConfig(filename=log_report, + format='%(asctime)s %(message)s', + filemode='w') + logger = logging.getLogger(log_report) + logger.setLevel(logging.DEBUG) + + file_test, unity_begin_row = get_unity_begin_file(file_test_case,logger) + unity_end_row = get_unity_end_file(file_test_case) + list_test_case = get_test_case(file_test_case,logger,unity_begin_row,unity_end_row) + + if len(list_test_case) != len(result): + raise ValueError("The list of test cases " + str(len(list_test_case)) + " in the file" + + file_test + " is not equal " + str(len(result)) + " test cases" + " results received from device") + + for test_case in list_test_case: + index = list_test_case.index(test_case) + test_case = test_case.split(',',3) + if result[index] == 0: + logger.info(file_test + ":" + test_case[2] + ":" + test_case[0] + ":PASS") + else: + test_fail +=1 + logger.info(file_test + ":" + test_case[2] + ":" + test_case[0] + ":FAIL") + logger.info("\n----------------------------------------------------------------------") + logger.info(str(len(list_test_case)) + " Tests " + str(test_fail) + " Failures") + if test_fail != 0: + logger.info("FAIL") + else: + logger.info("PASS") + +def int_to_bytes(number: int) -> bytes: + return number.to_bytes(length=(8 + (number + (number < 0)).bit_length()) // 8, byteorder='big', signed=True) + + +## IEC60730 get unit test result +# +# @details This class runs IEC60730 get unit test results +# +# Hardware setup: +# Connect DUT to PC. No additional hardware setup required. + +class iec60730_unit_test_result(unittest.TestCase, iec60730TestBase): + + def get_unit_test_result(self): + def get_result(self): + self.adapter.halt() + self.adapter.clear_all_breakpoints() + + self.adapter.set_breakpoint(address = asm_labels['IEC60730_UNIT_TEST_END'], + typeflags=enums.JLinkBreakpoint.ANY) + + self.adapter.reset() + pc = self.adapter.run_to_breakpoint(3) + logging.info("Halted at label: " + self.get_label(pc)) + self.assertEqual(pc, asm_labels['IEC60730_UNIT_TEST_END'],\ + "DUT failed to stop at IEC60730_UNIT_TEST_END" \ + " , pc = " + hex(pc)) + #logging.info("Halted at label: " + self.get_label(pc)) + current_test_numth = variables['current_test_numth'] + self.assertNotEqual(0, current_test_numth,\ + "Can not read current_test_numth address") + reg = self.adapter.memory_read8(current_test_numth, 1, zone=None) + + current_test_numth = variables['current_test_numth'] + self.assertNotEqual(0, current_test_numth,\ + "Can not read current_test_numth address") + current_test_numth = self.adapter.memory_read8(current_test_numth, 1, zone=None) + + test_case_result = variables['test_case_result'] + self.assertNotEqual(0, test_case_result,\ + "Can not read test_case_result address") + result = self.adapter.memory_read(test_case_result,current_test_numth[0]) + return result + def connect_device(self): + self.pre_exec_test() + full_path = os.path.realpath(__file__) + dir_path = os.path.dirname(full_path) + file_test_case = dir_path + "/../unit_test/src/" + file_name + ".c" + logging.info("File name test: " + file_test_case) + log_report = dir_path + "/../../log/" + file_name + ".log" + logging.info("----------------- Start get unit test result") + result = get_result(self) + logging.info("Get unit test result: Done. See " + log_report) + logging.info("----------------- End get unit test result") + self.post_exec_test() + get_report_unit_test(result,file_test_case,log_report) + return connect_device(self) + +if __name__ == "__main__": + + file_name= os.getenv('FILE_NAME') + + chip_name = os.getenv('CHIP') + + + lst_file_path = os.getenv('LST_PATH') + + adapter_serial_no = os.getenv('ADAPTER_SN') + + lib_path = os.getenv('JLINK_PATH') + + while len(sys.argv) > 1: + line = sys.argv.pop() + if len(sys.argv) == 1: + compiler = line + + print("Compiler: "+compiler) + + if lst_file_path.find(file_name) != -1: + iec60730_unit_test_result = iec60730_unit_test_result() + iec60730_unit_test_result.env_setup(adapter_serial_no, + chip_name, + lst_file_path, + lib_path, + compiler) + iec60730_unit_test_result.get_unit_test_result() + else: + print("The FILE_NAME environment variable is not the same as the *.lst file prefix name" + " in the path " + lst_file_path) diff --git a/test/test_script/util.py b/test/test_script/util.py new file mode 100644 index 00000000..a4f1db87 --- /dev/null +++ b/test/test_script/util.py @@ -0,0 +1,469 @@ +# -*- coding: utf-8 -*- +# Copyright 2017 Square, Inc. +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + +import enums + +import platform +import sys +import os +from datetime import * +import logging +import traceback +import telnetlib + +from junit_xml import TestSuite as JunitTestSuite +from junit_xml import TestCase as JunitTestCase + + +def is_integer(val): + """Returns whether the given value is an integer. + Args: + val (object): value to check + Returns: + ``True`` if the given value is an integer, otherwise ``False``. + """ + try: + val += 1 + except TypeError: + return False + return True + + +def is_natural(val): + """Returns whether the given value is a natural number. + Args: + val (object): value to check + Returns: + ``True`` if the given value is a natural number, otherwise ``False``. + """ + return is_integer(val) and (val >= 0) + + +def is_os_64bit(): + """Returns whether the current running platform is 64bit. + Returns: + ``True`` if the platform is 64bit, otherwise ``False``. + """ + return platform.machine().endswith('64') + + +def noop(*args, **kwargs): + """No-op. Does nothing. + Args: + args: list of arguments + kwargs: keyword arguments dictionary + Returns: + ``None`` + """ + pass + + +def unsecure_hook_dialog(title, msg, flags): + """No-op that ignores the dialog. + Args: + title (str): title of the insecure dialog + msg (str): text of the insecure dialog + flags (int): flags specifying which values can be returned + Returns: + ``enums.JLinkFlags.DLG_BUTTON_NO`` + """ + return enums.JLinkFlags.DLG_BUTTON_NO + + +def progress_bar(iteration, + total, + prefix=None, + suffix=None, + decs=1, + length=100): + """Creates a console progress bar. + This should be called in a loop to create a progress bar. + See `StackOverflow `__. + Args: + iteration (int): current iteration + total (int): total iterations + prefix (str): prefix string + suffix (str): suffix string + decs (int): positive number of decimals in percent complete + length (int): character length of the bar + Returns: + ``None`` + Note: + This function assumes that nothing else is printed to the console in the + interim. + """ + if prefix is None: + prefix = '' + + if suffix is None: + suffix = '' + + format_str = '{0:.' + str(decs) + 'f}' + percents = format_str.format(100 * (iteration / float(total))) + filled_length = int(round(length * iteration / float(total))) + bar = '█' * filled_length + '-' * (length - filled_length) + + prefix, suffix = prefix.strip(), suffix.strip() + + sys.stdout.write('\r%s |%s| %s%s %s' % (prefix, bar, percents, '%', suffix)) + sys.stdout.flush() + + if iteration == total: + sys.stdout.write('\n') + sys.stdout.flush() + + return None + + +def flash_progress_callback(action, progress_string, percentage): + """Callback that can be used with ``JLink.flash()``. + This callback generates a progress bar in the console to show the progress + of each of the steps of the flash. + Args: + action (str): the current action being invoked + progress_string (str): the current step in the progress + percentage (int): the percent to which the current step has been done + Returns: + ``None`` + Note: + This function ignores the compare action. + """ + if action.lower() != 'compare': + return progress_bar(min(100, percentage), 100, prefix=action) + + return None + + +def calculate_parity(n): + """Calculates and returns the parity of a number. + The parity of a number is ``1`` if the number has an odd number of ones + in its binary representation, otherwise ``0``. + Args: + n (int): the number whose parity to calculate + Returns: + ``1`` if the number has an odd number of ones, otherwise ``0``. + Raises: + ValueError: if ``n`` is less than ``0``. + """ + if not is_natural(n): + raise ValueError('Expected n to be a positive integer.') + + y = 0 + n = abs(n) + while n: + y += n & 1 + n = n >> 1 + return y & 1 + + +def device_target_power_on_off(hostIp, cmd): + telnetNodeAdmin = TelnetDeviceUtil() + if not telnetNodeAdmin.open_device_connection(hostName=hostIp, + hostPort=4902, + hide=True): + return False + telnetNodeAdmin.device_send('target power {}'.format(cmd), 0.5) + telnetNodeAdmin.close_device_connection(hide=True) + return True + + +class TimeStampUtil(object): + def __init__(self): + self._startUpTime = None + + def update_startUp_time(self): + self._startUpTime = datetime.now().time() + + # @brief: return the current time by datetime. + def get_absolute_time(self): + return datetime.now().time() + + def get_total_running_time(self): + return datetime.now().time() - self._startUpTime + + # @brief: convert the *timeIn* into a human-readable string. + def convert_time_to_readable(self, timeIn): + return datetime.now().isoformat() + + +""" +" @brief +" PyTestSuites class serves as the key role to assert a statement and detects +" whether a Junit test case should be logged. +""" + + +class PyTestSuites(object): + def __init__(self, xmlDir=None): + self._timeStampSetter = TimeStampUtil() + self._testElements = [] + self._curTestElement = None + # Local flags or constants. + self._LOG_OUT = 1 # Enable/disable store the log in a file. + if xmlDir: + self._xmlDir = xmlDir + else: + self._xmlDir = os.path.dirname(os.path.realpath(__file__)) + \ + '/../../result/report_' + datetime.now().strftime("%Y-%m-%d-%H-%M-%S") + '.xml' + + def store_log(self, msg): + if self._LOG_OUT: logging.info(msg) + + def log_test(self, msg): + t = self._timeStampSetter.get_absolute_time() + logMsg = "IEC60730(" + \ + self._timeStampSetter.convert_time_to_readable(t) + \ + "): " + msg + print(logMsg) + self.store_log(logMsg) + + """ + " The methods, close_test_suite, complete_test_case and handle_test_suite_abortion + " are called within this class. + """ + + # @brief + # This function is called when all the cases is done. + def close_test_suite(self): + xmlTestCases = [] + for testElement in self._testElements: + tc = testElement['test_case'] + xmlTestCases.append(tc) + + if not len(xmlTestCases): + self.log_test('No test cases were found.') + return + ts = JunitTestSuite("IEC Testsuite", xmlTestCases) + with open(self._xmlDir, 'w') as f: + ts.to_file(f, [ts], prettyprint=True, encoding="utf-8") + + # @brief + # This function is called when each test script ends without abortion. + def complete_test_case(self): + failure_info = self._curTestElement['failure_info'] + if len(failure_info): + tc = self._curTestElement['test_case'] + tc.add_failure_info(message='Detected assumption failure', + output=failure_info) + + """ + " Structure of _testElements:1 + " + " [ + " { 'test_case':xxx, 'failure_info':xxx, 'file':xxx }, + " { 'test_case':xxx, 'failure_info':xxx, 'file':xxx } + " ] + """ + + def insert_test_case(self, testName, testClass, testResult=None, file=None): + testElement = {} + tc = JunitTestCase(name=testName, classname=testClass) + testElement['test_case'] = tc + testElement['result'] = testResult + testElement['failure_info'] = '' + if file: + testElement['file'] = file + else: + testElement['file'] = '' + self._testElements.append(testElement) + self._curTestElement = testElement + + # @brief + # This function is called when each test script aborts. + def abort_test_suite(self): + raise AbortTestSuite + + # @brief + # A test case may contain multiple assumption. Once an assumption fails, + # the user needs to decide whether to complete the test case or to abort + # the whole test suite. + def assume(self, statement, level=1): + try: + assert statement + self.log_test( + '\033[1;32m [*] Passed assumption - ' + '{} at line {} \033[0m'.format( + str(traceback.extract_stack()[level][0]), + str(traceback.extract_stack()[level][1]) + ) + ) + return True + except AssertionError: + self._curTestElement['failure_info'] += str(traceback.extract_stack()) + self.log_test( + '\033[1;31m [*] Failed assumption - ' + '{} at line {} \033[0m'.format( + str(traceback.extract_stack()[level][0]), + str(traceback.extract_stack()[level][1]) + ) + ) + return False + + +class TelnetHostUtil(telnetlib.Telnet): + def __init__(self, logService=None): + telnetlib.Telnet.__init__(self) + # Disable telnetlib debug printing. + self.set_debuglevel(0) + self._logService = logService + self._timeStampUtil = TimeStampUtil() + self._hostName = None + self._hostPort = None + self._hostPasswd = None + self._hostLoginName = None + + # @brief: open a telnet connection to a host processor. + def open_host_connection(self, hostName=None, hostPort=None, timeout=None, hide=None): + if hostName and hostPort: + self._hostName = hostName + self._hostPort = hostPort + self.open(self._hostName, self._hostPort, timeout) + if not self.sock: + raise ValueError('Host connection open failed!') + else: + self.log('Host connection open succeeded!', hide) + + # @brief: send commands to the host application with expected results. + # Returns 'success' if match is found, otherwise return original + # printouts. + def host_send_expect(self, cmd, expectStr, timeout=None, hide=None): + try: + self.log("Sending cmd [" + cmd + "]...", hide) + self.write(cmd + "\r\n") + buf = self.read_until(expectStr, timeout) + if expectStr in buf: + return 'success' + else: + msg = "Expected string [" + \ + expectStr + \ + "] not found. Original prints:" + # self.log(buf) + return msg + "\n" + buf + except EOFError: + self.log('Socket disconnected.') + return 'conn_failure' + + # @brief: send commands to the host application and return results. No + # check on the expected pattern. + def host_send(self, cmd, timeout=None, hide=None): + try: + self.log("Sending cmd [" + cmd + "]...", hide) + cmd = cmd.encode("utf-8") + self.write(cmd + "\r\n".encode("utf-8")) + buf = self.read_until('Nonsense'.encode("utf-8"), timeout) + return buf + except EOFError: + self.log('Socket disconnected.') + return '' + + # @brief: logs in this context. + def log(self, msg, hide=None): + logMsg = "Telnet2Host(" + str(self.host) + \ + ":" + str(self.port) + ")-(" + \ + self._timeStampUtil.convert_time_to_readable( + self._timeStampUtil.get_absolute_time()) + \ + "): " + msg + if hide is not True: + print(logMsg) + return logMsg + + def write_log(self, msg, hide=None, logAsResult=None): + if hide and hide == True: + pass + else: + if self._logService: + self._logService.write_log(msg, hide, logAsResult) + else: + print(msg) + + ## Helper methods. + def close_host_connection(self, hide=None): + self.log('Host connection closing...', hide) + self.close() + + def is_host_connected(self): + if self.sock: + return True + else: + return False + + +class TelnetDeviceUtil(TelnetHostUtil): + def __init__(self, logService=None): + self._logService = logService + TelnetHostUtil.__init__(self, self._logService) + + # @brief: logs in this context. + def log(self, msg, hide=None): + logMsg = "Telnet2Device(" + str(self.host) + \ + ":" + str(self.port) + ")-(" + \ + self._timeStampUtil.convert_time_to_readable( + self._timeStampUtil.get_absolute_time()) + \ + "): " + msg + if hide and hide == True: + pass + else: + print(logMsg) + return logMsg + + def open_device_connection(self, hostName, hostPort=None, timeout=30, hide=None): + ret = True + try: + self.open_host_connection(hostName, hostPort, timeout, hide) + except ValueError: + ret = False + except IOError: + ret = False + return ret + + # Ensure the connection is closed for next telnet connection. + def close_device_connection(self, hide=None): + self.close_host_connection(hide) + + def leave_nwk_and_reset_device(self, hide=None): + ret = self.host_send('reset', 0.5, hide) \ + + self.host_send_expect('network leave', "leave", 0.5, hide) + return ret + + def reset_device(self, hide=None): + ret = self.host_send('reset', 0.5, hide) + return ret + + def clear_binding_table(self, hide=None): + ret = self.host_send('option binding-table clear', 0.5, hide) + return ret + + def device_read_until(self, expectStr, timeout): + try: + buf = self.read_until(expectStr, timeout) + if expectStr in buf: + return 'success' + else: + msg = "Expected string [" + \ + expectStr + \ + "] not found. Original prints:" + return msg + "\n" + buf + except EOFError: + self.log('Socket disconnected.') + return 'conn_failure' + + def device_send(self, cmd, timeout=None, hide=None): + return self.host_send(cmd, timeout, hide) + + def device_send_expect(self, cmd, expectStr, timeout=None, hide=None): + return self.host_send_expect(cmd, expectStr, timeout, hide) + + def device_send_no_socket_ret(self, cmd, timeout=None, hide=None): + return self.host_send_no_socket_ret(cmd, timeout, hide) diff --git a/test/unit_test/CMakeLists.txt b/test/unit_test/CMakeLists.txt new file mode 100644 index 00000000..e11742a5 --- /dev/null +++ b/test/unit_test/CMakeLists.txt @@ -0,0 +1,36 @@ +# unit test info +set(UNIT_TEST_INFO "unit_test_info") +#unit test clean +set(UNIT_TEST_CLEAN "unit_test_clean") + +add_custom_target(${UNIT_TEST_INFO} + COMMAND echo "Components list: unit_test_iec60730_post " + " unit_test_iec60730_bist " + " unit_test_iec60730_program_counter " + " unit_test_iec60730_safety_check " + " unit_test_iec60730_irq " + " unit_test_iec60730_system_clock " + " unit_test_iec60730_watchdog " + " unit_test_iec60730_cpu_registers " + " unit_test_iec60730_variable_memory " + " unit_test_iec60730_invariable_memory\ " + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/ +) + +add_custom_target(${UNIT_TEST_CLEAN} + COMMAND rm -rf ${CMAKE_BINARY_DIR}/test/unit_test/build/${BOARD_NAME} + WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/ +) + +include(unit_test) + +generate_unit_test(test/unit_test unit_test_iec60730_post sl_iec60730_post.c) +generate_unit_test(test/unit_test unit_test_iec60730_bist sl_iec60730_bist.c) +generate_unit_test(test/unit_test unit_test_iec60730_program_counter sl_iec60730_program_counter.c) +generate_unit_test(test/unit_test unit_test_iec60730_safety_check sl_iec60730_bist.c) +generate_unit_test(test/unit_test unit_test_iec60730_irq sl_iec60730_irq.c) +generate_unit_test(test/unit_test unit_test_iec60730_system_clock sl_iec60730_system_clock.c) +generate_unit_test(test/unit_test unit_test_iec60730_watchdog sl_iec60730_watchdog.c) +generate_unit_test(test/unit_test unit_test_iec60730_cpu_registers sl_iec60730_cpu_registers) +generate_unit_test(test/unit_test unit_test_iec60730_variable_memory sl_iec60730_variable_memory.c) +generate_unit_test(test/unit_test unit_test_iec60730_invariable_memory sl_iec60730_invariable_memory.c) diff --git a/test/unit_test/inc/app.h b/test/unit_test/inc/app.h new file mode 100644 index 00000000..6e5451f3 --- /dev/null +++ b/test/unit_test/inc/app.h @@ -0,0 +1,43 @@ +/***************************************************************************//** + * @file + * @brief Top level application functions + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef APP_H +#define APP_H + +#include "unit_test_common.h" +#include "unit_test_iec60730_post.h" +#include "unit_test_iec60730_bist.h" +#include "unit_test_iec60730_program_counter.h" +#include "unit_test_iec60730_safety_check.h" +#include "unit_test_iec60730_irq.h" +#include "unit_test_iec60730_system_clock.h" +#include "unit_test_iec60730_watchdog.h" +#include "unit_test_iec60730_cpu_registers.h" +#include "unit_test_iec60730_variable_memory.h" +#include "unit_test_iec60730_invariable_memory.h" + +/***************************************************************************//** + * Initialize application. + ******************************************************************************/ +void app_init(void); + +/***************************************************************************//** + * App ticking function. + ******************************************************************************/ +void app_process_action(void); + +#endif // APP_H diff --git a/test/unit_test/inc/unit_test_common.h b/test/unit_test/inc/unit_test_common.h new file mode 100644 index 00000000..5ddf231a --- /dev/null +++ b/test/unit_test/inc/unit_test_common.h @@ -0,0 +1,65 @@ +/***************************************************************************//** + * @file + * @brief common unit test api + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#ifndef _TEST_COMMON_H +#define _TEST_COMMON_H + +#include +#include +#include +#include "unity.h" +#include "sl_iec60730_internal.h" + +/*=======Result test case=====*/ +#define MAX_NUMBER_OF_TEST_CASE 20 + +extern uint8_t test_case_result[MAX_NUMBER_OF_TEST_CASE]; +extern uint8_t current_test_numth; + +/*=======Test Runner Used To Run Each Test=====*/ +extern void run_test(UnityTestFunction func, const char* name, UNITY_LINE_TYPE line_num); +/*=======Test Reset Options=====*/ +extern void setUp(void); +extern void tearDown(void); +extern void resetTest(void); +/*=======Mock Management=====*/ + +/**************************************************************************/ /** + * Public Function set value simulate value function mock return. + * + * @returns None. + * + *****************************************************************************/ +extern void cmock_set_value(sl_iec60730_test_result_t sl_iec60730_test_result_t); + +/**************************************************************************/ /** + * Public Function get value simulate value function mock return. + * + * @returns None. + * + *****************************************************************************/ +extern sl_iec60730_test_result_t cmock_return_value(void); + +/**************************************************************************/ /** + * Public Function runs all unit test cases. + * + * @returns None. + * + *****************************************************************************/ +extern void unit_test_run_all_test_cases(void); + +#endif // _TEST_COMMON_H diff --git a/test/unit_test/inc/unit_test_iec60730_bist.h b/test/unit_test/inc/unit_test_iec60730_bist.h new file mode 100644 index 00000000..be930718 --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_bist.h @@ -0,0 +1,75 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_bist.h + * @brief Unit test function sl_iec60730_bist(). + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_BIST_VERIFICATION_UNIT_TEST Bist Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate function sl_iec60730_bist(). + * + * IEC60730 Bist Unit Tests + * + * @details These test cases run unit tests to check the operation of the function sl_iec60730_bist() + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_BIST_H +#define UNIT_TEST_IEC60730_BIST_H + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Check sl_iec60730_bist() operate + * + * @returns None. + * + * If bool local **is_function_called** variable equal false. + * It means test result routine of sl_iec60730_bist() is a pass, function sl_iec60730_safe_state() is not called. + * + *****************************************************************************/ +void test_sl_iec60730_bist_pass_all_check_condition(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_bist() operate + * + * @returns None. + * + * If bool local **is_function_called** variable true. It means test result routine + * of sl_iec60730_bist() is a failure, function sl_iec60730_safe_state() is called. + * + *****************************************************************************/ +void test_sl_iec60730_bist_failed_check_condition(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_bist() operate + * + * @returns None. + * + * If bool local **is_function_called** variable true, and **iec60730_safety_check** is not equal #SL_IEC60730_NO_FAILURE. + * It means test result routine of #sl_iec60730_bist() is a failure, function sl_iec60730_safe_state() is called. + * + *****************************************************************************/ +void test_iec60730_safety_check_error_occur(void); + +#endif // UNIT_TEST_IEC60730_BIST_H + +/** @} (end defgroup IEC60730_BIST_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/inc/unit_test_iec60730_cpu_registers.h b/test/unit_test/inc/unit_test_iec60730_cpu_registers.h new file mode 100644 index 00000000..3b96e828 --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_cpu_registers.h @@ -0,0 +1,112 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_cpu_registers.h + * @brief Unit tests for functions in cpu registers module. + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_CPU_REGISTERS_VERIFICATION_UNIT_TEST CPU Registers Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate functions in cpu registers module. + * + * IEC60730 CPU REGISTERS Unit Tests + * + * @details These test cases run unit tests to check the operation of the function in cpu registers module. + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_CPU_REGISTERS_H +#define UNIT_TEST_IEC60730_CPU_REGISTERS_H + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Check sl_iec60730_cpu_registers_bist() operate + * + * @returns None. + * + * If the register checks in the function sl_iec60730_cpu_registers_bist() pass, + * then #sl_iec60730_program_counter_check will be set #IEC60730_CPU_REGS_COMPLETE. + * + *****************************************************************************/ +void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_cpu_registers_bist() operate + * + * @returns None. + * + * If one of the register checks in the function sl_iec60730_cpu_registers_bist() failed, + * then #sl_iec60730_program_counter_check will be 0. + * + *****************************************************************************/ +void test_sl_iec60730_cpu_registers_bist_failed_check_condition(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_cpu_registers_bist_ns() operate + * + * @returns None. + * + * This test case only checks when the chip supports is cortex M33. + * If the register checks in the function sl_iec60730_cpu_registers_bist_ns() pass, + * then function will be returned #SL_IEC60730_TEST_PASSED. + * + *****************************************************************************/ +void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_cpu_registers_bist_ns() operate + * + * @returns None. + * + * This test case only checks when the chip supports is cortex M33. + * If one of the register checks in the function sl_iec60730_cpu_registers_bist_ns() failed, + * then function will be returned #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_cpu_registers_bist_s() operate + * + * @returns None. + * + * This test case only checks when the chip supports is cortex M33. + * If the register checks in the function sl_iec60730_cpu_registers_bist_s() pass, + * then function will be returned #SL_IEC60730_TEST_PASSED. + * + *****************************************************************************/ +void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_cpu_registers_bist_s() operate + * + * @returns None. + * + * This test case only checks when the chip supports is cortex M33. + * If one of the register checks in the function sl_iec60730_cpu_registers_bist_s() failed, + * then function will be returned #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition(void); + +#endif // UNIT_TEST_IEC60730_CPU_REGISTERS_H + +/** @} (end defgroup IEC60730_CPU_REGISTERS_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/inc/unit_test_iec60730_invariable_memory.h b/test/unit_test/inc/unit_test_iec60730_invariable_memory.h new file mode 100644 index 00000000..53099eb1 --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_invariable_memory.h @@ -0,0 +1,194 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_invariable_memory.h + * @brief Unit tests for functions in invariable memory module + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_INVARIABLE_MEMORY_VERIFICATION_UNIT_TEST Invariable Memory Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate functions in invariable memory module. + * + * IEC60730 Invariable Memory Unit Tests + * + * @details These test cases run unit tests to check the operation of the functions in invariable memory module. + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_INVARIABLE_MEMORY_H +#define UNIT_TEST_IEC60730_INVARIABLE_MEMORY_H + +#include +#include +#include "sl_iec60730_internal.h" + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Function mock returns the starting address value of the ram test area + * + * @returns pointer uint32_t*. + * + *****************************************************************************/ +extern uint32_t* unit_test_iec60730_imc_mock_init_run_crc(void); + +/**************************************************************************/ /** + * Public Function simulates the result of variable value integrity check. + * + * @returns boolean. + * + *****************************************************************************/ +extern sl_iec60730_test_result_t unit_test_mock_check_integrity(void); + +/**************************************************************************/ /** + * Public Function mock enable gpcrc hardware operate. + * + * @returns boolean. + * + *****************************************************************************/ +extern bool unit_test_iec60730_imc_mock_enable_gpcrc(void); + +/**************************************************************************/ /** + * Public Function mock enable calculate crc by software. + * + * @returns boolean. + * + *****************************************************************************/ +extern bool unit_test_iec60730_imc_mock_sw_enable_cal_crc(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_imc_init() operate + * + * @returns None. + * + * If the passed parameter value is NULL, the sl_iec60730_imc_init() function will fail. + * When calling the function sl_iec60730_imc_post(), the value will be returned #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_imc_init_param_null(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_imc_post() operate + * + * @returns None. + * + * If the passed parameter value is valid, the sl_iec60730_imc_init() function will success. + * When calling the function sl_iec60730_imc_post(), the value will be returned #SL_IEC60730_TEST_PASSED. + * + *****************************************************************************/ +void test_sl_iec60730_imc_post_pass_check(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_imc_post() operate + * + * @returns None. + * + * In the case of #SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the initial crc calculated + * value is 0, or in the case of #SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc + * calculated value is not equal to the value stored in #check_sum. The function + * returns #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_imc_post_fail_check(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_imc_bist() operate + * + * @returns None. + * + * In the case of #SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the value crc calculated + * value is equal value calculated from sl_iec60730_imc_post(), or in the case of + * #SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is equal to + * the value stored in #check_sum. The function returns# SL_IEC60730_TEST_PASSED. + * + *****************************************************************************/ +void test_sl_iec60730_imc_bist_pass_all_check(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_imc_bist() operate + * + * @returns None. + * + * In the case of #SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the value crc calculated + * value is equal value calculated from sl_iec60730_imc_post(), or in the case of + * #SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is equal to + * the value stored in #check_sum. The function sl_iec60730_imc_bist() returns #SL_IEC60730_TEST_PASSED. + * + *****************************************************************************/ +void test_sl_iec60730_imc_bist_pass_all_check(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_imc_bist() operate + * + * @returns None. + * + * If the check integrity of the pointer fails, the function sl_iec60730_imc_bist() returns #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_imc_bist_fail_check_integrity(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_imc_bist() operate + * + * @returns None. + * + * If **iec60730_run_crc** init greater than rom end address before **iec60730_cur_crc** is calculated. + * Then the function sl_iec60730_imc_bist() returns #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_imc_bist() operate + * + * @returns None. + * + * In the case of #SL_IEC60730_CRC_DEBUG_ENABLE == 1, if the value crc calculated + * value is not equal value calculated from sl_iec60730_imc_post(), or in the case of + * #SL_IEC60730_CRC_DEBUG_ENABLE == 0, the initial crc calculated value is not equal to + * the value stored in #check_sum. The function sl_iec60730_imc_bist() returns #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_imc_bist_fail_compare_crc(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_update_crc_with_data_buffer() operate + * + * @returns None. + * + * If the passed parameter value is NULL, the sl_iec60730_update_crc_with_data_buffer() function will fail. + * returns #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_update_crc_with_data_buffer_params_null(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_update_crc_with_data_buffer() operate + * + * @returns None. + * + * Calculate the CRC value of the input string, check whether the returned CRC value is correct or not. + * + *****************************************************************************/ +void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc(void); + +#endif // UNIT_TEST_IEC60730_INVARIABLE_MEMORY_H + +/** @} (end defgroup IEC60730_INVARIABLE_MEMORY_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/inc/unit_test_iec60730_irq.h b/test/unit_test/inc/unit_test_iec60730_irq.h new file mode 100644 index 00000000..2827a2ea --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_irq.h @@ -0,0 +1,122 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_irq.h + * @brief Unit tests for functions in irq module + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_IRQ_VERIFICATION_UNIT_TEST IRQ Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate functions in irq module. + * + * IEC60730 IRQ Unit Tests + * + * @details These test cases run unit tests to check the operation of the functions in irq module. + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_IRQ_H +#define UNIT_TEST_IEC60730_IRQ_H + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Check sl_iec60730_irq_init() operate + * + * @returns None. + * + * If the passed param is NULL after call sl_iec60730_irq_check(), + * function sl_iec60730_safe_state() will be called (variable local **is_function_called** set true). + * + *****************************************************************************/ +void test_sl_iec60730_irq_init_param_null(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_irq_init() operate + * + * @returns None. + * + * If the param greater than #IEC60730_MAX_IRQ_CHECK, function sl_iec60730_safe_state() will be called + * (variable local **is_function_called** set true). + * + *****************************************************************************/ +void test_sl_iec60730_irq_init_param_size_greater_than_max_irq(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_irq_check() operate + * + * @returns None. + * + * After successful initialization, after calling function. + * If the test element has an irq_count between the **irq_bounds** max and min values, + * function sl_iec60730_safe_state() is not called. + * + *****************************************************************************/ +void test_sl_iec60730_irq_check_count_in_bound(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_irq_check() operate + * + * @returns None. + * + * After successful initialization, after calling function. + * If the test element has an irq_count out of range the **irq_bounds** max and min values, + * function sl_iec60730_safe_state() is called. + * + *****************************************************************************/ +void test_sl_iec60730_irq_check_count_out_bound(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_irq_reset_counter() operate + * + * @returns None. + * + * After calling this function, check the value of the **irq_count** element of the config variable + * passed to function sl_iec60730_irq_init(). If the value is 0, the test case passes. + * + *****************************************************************************/ +void test_sl_iec60730_irq_reset_counter(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_irq_fail_occur() operate + * + * @returns None. + * + * Check if the value of wrong interrupt count and wrong interrupt index passed into the function + * is equal to the value received from function sl_iec60730_get_irq_index_failed(), then test passes. + * + *****************************************************************************/ +void test_sl_iec60730_irq_fail_occur(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_irq_reset_fail_result() operate + * + * @returns None. + * + * Check if the value of wrong interrupt count and wrong interrupt position received from + * function sl_iec60730_get_irq_index_failed() is 0 after calling sl_iec60730_irq_reset_fail_result() + * then test passes. + * + *****************************************************************************/ +void test_sl_iec60730_irq_reset_fail_result(void); + +#endif // UNIT_TEST_IEC60730_IRQ_H + +/** @} (end defgroup IEC60730_IRQ_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/inc/unit_test_iec60730_post.h b/test/unit_test/inc/unit_test_iec60730_post.h new file mode 100644 index 00000000..da9d9e8c --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_post.h @@ -0,0 +1,64 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_post.h + * @brief Unit test function sl_iec60730_post(). + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_UNIT_TEST_POST Post Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate function sl_iec60730_post(). + * + * IEC60730 Post Unit Tests + * + * @details These test cases run unit tests to check the operation of the function sl_iec60730_post() + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_POST_H +#define UNIT_TEST_IEC60730_POST_H + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Check sl_iec60730_post() operate + * + * @returns None. + * + * If bool local **is_function_called** variable equal false. It means test result routine of sl_iec60730_post() + * is a pass, function sl_iec60730_safe_state() is not called. So timer support test is enabled. + * + *****************************************************************************/ +void test_sl_iec60730_post_pass_all_check_condition(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_post() operate + * + * @returns None. + * + * If bool local **is_function_called** variable true. It means test result routine of sl_iec60730_post() + * is a failure, function sl_iec60730_safe_state() is called. + * + *****************************************************************************/ +void test_sl_iec60730_post_failed_check_condition(void); + +#endif // UNIT_TEST_IEC60730_POST_H + +/** @} (end defgroup IEC60730_POST_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/inc/unit_test_iec60730_program_counter.h b/test/unit_test/inc/unit_test_iec60730_program_counter.h new file mode 100644 index 00000000..68c4d4e4 --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_program_counter.h @@ -0,0 +1,64 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_program_counter.h + * @brief Unit test function sl_iec60730_program_counter_test(). + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_PROGRAM_COUNTER_VERIFICATION_UNIT_TEST Program Counter Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate function sl_iec60730_program_counter_test(). + * + * IEC60730 Program Counter Unit Tests + * + * @details These test cases run unit tests to check the operation of the function sl_iec60730_program_counter_test() + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_PROGRAM_COUNTER_H +#define UNIT_TEST_IEC60730_PROGRAM_COUNTER_H + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Check sl_iec60730_program_counter_test() operate + * + * @returns None. + * + * If bool local **is_function_called** variable equal false. It means test result routine of sl_iec60730_program_counter_test() + * is a pass, function sl_iec60730_safety_check_error_occur() is not called. + * + *****************************************************************************/ +void test_sl_iec60730_program_counter_complete_all_bit_check(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_program_counter_test() operate + * + * @returns None. + * + * If bool local **is_function_called** variable true. It means test result routine of sl_iec60730_program_counter_test() + * is a failure, function sl_iec60730_safety_check_error_occur() is called. + * + *****************************************************************************/ +void test_sl_iec60730_program_counter_fail_some_bit_check(void); + +#endif // UNIT_TEST_IEC60730_PROGRAM_COUNTER_H + +/** @} (end defgroup IEC60730_PROGRAM_COUNTER_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/inc/unit_test_iec60730_safety_check.h b/test/unit_test/inc/unit_test_iec60730_safety_check.h new file mode 100644 index 00000000..566344c4 --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_safety_check.h @@ -0,0 +1,65 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_safety_check.h + * @brief Unit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur(). + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_SAFETY_CHECK_VERIFICATION_UNIT_TEST Safety Check Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur(). + * + * IEC60730 Safety Check Unit Tests + * + * @details These test cases run unit tests to check the operation of the function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur() + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_SAFETY_CHECK_H +#define UNIT_TEST_IEC60730_SAFETY_CHECK_H + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Check sl_iec60730_safety_check_error_occur() operate + * + * @returns None. + * + * If **iec60730_safety_check.error** value get from sl_iec60730_safety_check_get_error() + * equal error passed in via function sl_iec60730_safety_check_error_occur(). Then test case + * is pass. + * + *****************************************************************************/ +void test_sl_iec60730_safety_check_error_occur(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_safety_check_reset_error() operate + * + * @returns None. + * + * If **iec60730_safety_check.error** and **iec60730_safety_check.number_error** value + * get from sl_iec60730_safety_check_get_error() is 0. Then test case is pass. + * + *****************************************************************************/ +void test_sl_iec60730_safety_check_reset_error(void); + +#endif // UNIT_TEST_IEC60730_SAFETY_CHECK_H + +/** @} (end defgroup IEC60730_SAFETY_CHECK_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/inc/unit_test_iec60730_system_clock.h b/test/unit_test/inc/unit_test_iec60730_system_clock.h new file mode 100644 index 00000000..b9269abe --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_system_clock.h @@ -0,0 +1,116 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_system_clock.h + * @brief Unit tests for functions in system_clock module. + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_SYSTEM_CLOCK_VERIFICATION_UNIT_TEST System Clock Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate functions in system_clock module. + * + * IEC60730 System Clock Unit Tests + * + * @details These test cases run unit tests to check the operation of the functions in system_clock module. + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_SAFETY_CHECK_H +#define UNIT_TEST_IEC60730_SAFETY_CHECK_H + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Check sl_iec60730_test_clock_tick() operate + * + * @returns None. + * + * If sl_iec60730_timer_test_control equals #SL_IEC60730_TIMER_TEST_DISABLE. + * Function sl_iec60730_safe_state() will be called. + * + *****************************************************************************/ +void test_sl_iec60730_test_clock_tick_timer_test_disable(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_test_clock_tick() operate + * + * @returns None. + * + * If sl_iec60730_timer_test_control equals #SL_IEC60730_TIMER_TEST_ENABLE. + * Call function sl_iec60730_sys_clock_count_tick() to increase the value of + * variable **sl_iec60730_sys_clock_count**. If the **sl_iec60730_sys_clock_count** value is + * within the check boundary value. Function sl_iec60730_safe_state() will not be called. + * + *****************************************************************************/ +void test_sl_iec60730_test_clock_tick_count_in_bound(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_test_clock_tick() operate + * + * @returns None. + * + * If **sl_iec60730_timer_test_control** equals #SL_IEC60730_TIMER_TEST_ENABLE. + * Call function sl_iec60730_sys_clock_count_tick() to increase the value of + * variable **sl_iec60730_sys_clock_count**. If the **sl_iec60730_sys_clock_count** value is + * out of range the check boundary value. Function sl_iec60730_safe_state() will be called. + * + *****************************************************************************/ +void test_sl_iec60730_test_clock_tick_count_out_bound(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_test_clock_tick() operate + * + * @returns None. + * + * If **sl_iec60730_timer_test_control** equals #SL_IEC60730_TIMER_TEST_ENABLE. + * Call function sl_iec60730_sys_clock_count_tick() to increase the value of + * variable **sl_iec60730_sys_clock_count**. If the **sl_iec60730_sys_clock_count** value is + * within the check boundary value. Then call function sl_iec60730_sys_clock_count_reset() + * to reset variable **sl_iec60730_sys_clock_count**. Function sl_iec60730_safe_state() will be called. + * + *****************************************************************************/ +void test_sl_iec60730_sys_clock_count_reset(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_test_clock_tick() operate + * + * @returns None. + * + * The number of function sl_iec60730_test_clock_tick() calls is greater than the default value and + * variable **sl_iec60730_sys_clock_count value** is within the check boundary value each time call. + * Function sl_iec60730_program_counter_test() will be called. + * + *****************************************************************************/ +void test_sl_iec60730_test_clock_tick_test_clock_multiplier(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_get_number_test_timer_tick() operate + * + * @returns None. + * + * Check if the number of times the function sl_iec60730_test_clock_tick() has been called is + * the same as the value received from the function sl_iec60730_get_number_test_timer_tick(). + * + *****************************************************************************/ +void test_sl_iec60730_get_number_test_timer_tick(void); + +#endif // UNIT_TEST_IEC60730_SAFETY_CHECK_H + +/** @} (end defgroup IEC60730_SYSTEM_CLOCK_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/inc/unit_test_iec60730_variable_memory.h b/test/unit_test/inc/unit_test_iec60730_variable_memory.h new file mode 100644 index 00000000..a6ec10aa --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_variable_memory.h @@ -0,0 +1,213 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_variable_memory.h + * @brief Unit tests for functions in variable memory module + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_VARIABLE_MEMORY_VERIFICATION_UNIT_TEST Variable Memory Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate functions in variable memory module. + * + * IEC60730 Variable Memory Unit Tests + * + * @details These test cases run unit tests to check the operation of the functions in variable memory module. + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_VARIABLE_MEMORY_H +#define UNIT_TEST_IEC60730_VARIABLE_MEMORY_H + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_init() operate + * + * @returns boolean. + * + * Function simulates the result of **iec60730_rt_check** variable value integrity check. + * + *****************************************************************************/ +extern sl_iec60730_test_result_t unit_test_mock_check_integrity(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_init() operate + * + * @returns None. + * + * If the input parameter has the value NULL, the components in the initialization value are NULL, + * the vmc test initialization flag fails. The function sl_iec60730_vmc_post() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_init_param_null(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_init() operate + * + * @returns None. + * + * If the input parameter has the value start member greater than value end member, + * the vmc test initialization flag fails. The function sl_iec60730_vmc_post() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_init_start_address_greater_than_end_address(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_post() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchc algorithms to check the ram and + * backup section pass, checking the integrity of the variable **iec60730_rt_check** pass. The function sl_iec60730_vmc_post() + * returns the value #SL_IEC60730_TEST_PASSED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_post_pass_all_check_sections(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_post() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchc algorithms to check + * the ram and backup section fail. The function sl_iec60730_vmc_post() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_post() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchc algorithms to check the backup + * section fail. The function sl_iec60730_vmc_post() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_post() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchc algorithms to check the ram + * section pass, but checking the integrity of the variable **iec60730_rt_check** fail. + * The function sl_iec60730_vmc_post() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_post() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchc algorithms to check the backup + * section pass, but checking the integrity of the variable **iec60730_rt_check** fail. + * The function sl_iec60730_vmc_post() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_bist() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchxc algorithms to check the ram and + * backup section pass, checking the integrity of the variable **iec60730_rt_check** pass, check stack over flow pass + * The function sl_iec60730_vmc_bist() returns the value #SL_IEC60730_TEST_PASSED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_bist_pass_all_check_sections(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_bist() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchxc algorithms to check + * the ram and backup section fail. The function sl_iec60730_vmc_bist() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_bist() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchxc algorithms to check the backup + * section fail. The function sl_iec60730_vmc_bist() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_bist() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchxc algorithms to check the ram + * section pass, but checking the integrity of the variable **iec60730_rt_check** fail. + * The function sl_iec60730_vmc_bist() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_bist() operate + * + * @returns None. + * + * If the initialization value is successful, the functions run the marchxc algorithms to check the backup + * section pass, but checking the integrity of the variable **iec60730_rt_check** fail. + * The function sl_iec60730_vmc_bist() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_bist() operate + * + * @returns None. + * + * If sl_iec60730_vmc_pre_run_marchxc_step() returns false, meaning it is not allowed to run test + * sl_iec60730_vmc_marchxc_step() to check the ram section. Function sl_iec60730_vmc_marchxc_step() + * will not be called when checking ram section. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_bist_checking_allow_run_test(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_vmc_bist() operate + * + * @returns None. + * + * If check that the value of the **iec60730_stack_test_over_flow** variable located in the ending stack area is + * different from the initial initial value. The function sl_iec60730_vmc_bist() returns the value #SL_IEC60730_TEST_FAILED. + * + *****************************************************************************/ +void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow(void); + +#endif // UNIT_TEST_IEC60730_VARIABLE_MEMORY_H + +/** @} (end defgroup IEC60730_VARIABLE_MEMORY_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/inc/unit_test_iec60730_watchdog.h b/test/unit_test/inc/unit_test_iec60730_watchdog.h new file mode 100644 index 00000000..ec3cadfb --- /dev/null +++ b/test/unit_test/inc/unit_test_iec60730_watchdog.h @@ -0,0 +1,193 @@ +/***************************************************************************/ /** + * @file unit_test_iec60730_watchdog.h + * @brief Unit tests for functions in watchdog module. + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +/**************************************************************************/ /** + * @addtogroup IEC60730_UNIT_TEST + * @{ + * @defgroup IEC60730_WATCHDOG_VERIFICATION_UNIT_TEST Watchdog Verification Unit Tests + * @{ + * Header file list of test cases for the verification operate functions in watchdog module. + * + * IEC60730 Watchdog Unit Tests + * + * @details These test cases run unit tests to check the operation of the functions in watchdog module. + * + * Hardware setup: + * + * - Connect DUT to PC. No additional hardware setup required. + ******************************************************************************/ + +#ifndef UNIT_TEST_IEC60730_WATCHDOG_H +#define UNIT_TEST_IEC60730_WATCHDOG_H + +/*======= External Functions =====*/ + +/**************************************************************************/ /** + * Public Function setup condition before running test case. + * Only used for unit testing. + * + * @returns None. + * + *****************************************************************************/ +void unit_test_iec60730_watchdog_set_up(void); + +/**************************************************************************/ /** + * Public Function replaces the value for the device being reset by Power On Reset. + * Only used for unit testing. + * + * @returns boolean. + * + *****************************************************************************/ +bool unit_test_iec60730_watchdog_mock_rst_por(void); + +/**************************************************************************/ /** + * Public Function replaces the value for the device being reset by EM4 Wakeup. + * Only used for unit testing. + * + * @returns boolean. + * + *****************************************************************************/ +bool unit_test_iec60730_watchdog_mock_rst_em4(void); + +/**************************************************************************/ /** + * Public Function replaces the value for the device being reset by Watchdog 0. + * Only used for unit testing. + * + * @returns boolean. + * + *****************************************************************************/ +bool unit_test_iec60730_watchdog_mock_rst_wdog0(void); + +/**************************************************************************/ /** + * Public Function replaces the value for the device being reset by Watchdog 1. + * Only used for unit testing. + * + * @returns boolean. + * + *****************************************************************************/ +bool unit_test_iec60730_watchdog_mock_rst_wdog1(void); + +/**************************************************************************/ /** + * Public Function replaces watchdog timeout min set value successfully or not. + * Only used for unit testing. + * + * @returns boolean. + * + *****************************************************************************/ +bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min(void); + +/**************************************************************************/ /** + * Public Function replaces watchdog clear register rstcause. + * Only used for unit testing. + * + * @returns None. + * + *****************************************************************************/ +void unit_test_iec60730_watchdog_mock_rstcause_clear(void); + +/**************************************************************************/ /** + * Public The function replaces the value of the RSTCAUSE register indicating the cause of the reset. + * Only used for unit testing + * + * @returns Value RSTCAUSE register. + * + *****************************************************************************/ +uint32_t unit_test_iec60730_watchdog_mock_rstcause(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_watchdog_post() operate + * + * @returns None. + * + * If reset causes are not POR and not watchdog reset then no action. Value return by + * function sl_iec60730_watchdog_post() is #SL_IEC60730_TEST_PASSED. + * + *****************************************************************************/ +void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_watchdog_post() operate + * + * @returns None. + * + * When the device is reset by power on reset after watchdog reset, the variable #iec60730_watchdog_state does not + * set to the value #SL_IEC60730_WATCHDOG_TESTING, then check return value is #SL_IEC60730_TEST_FAILED + * + *****************************************************************************/ +void test_sl_iec60730_watchdog_post_wachdog_reset_before_por(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_watchdog_post() operate + * + * @returns None. + * + * When the device is reset by power on reset first set the variable #iec60730_watchdog_state + * to the value #SL_IEC60730_WATCHDOG_TESTING, then check the watchdog reset. + * If sli_iec60730_set_watchdog_timout_min() is set successfully, + * and the device does not wake up from EM4, all Watchdogs are tested then finished. + * The cause of the reset is by watchdog, the function sl_iec60730_watchdog_post() + * return result is #SL_IEC60730_TEST_PASSED + * + *****************************************************************************/ +void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_watchdog_post() operate + * + * @returns None. + * + * When the device is reset by power on reset first set the variable #iec60730_watchdog_state + * to the value #SL_IEC60730_WATCHDOG_TESTING, then check the watchdog reset. + * If sli_iec60730_set_watchdog_timout_min() is failed, then after call sl_iec60730_watchdog_post() + * again, return result is #SL_IEC60730_TEST_FAILED + * + *****************************************************************************/ +void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_watchdog_post() operate + * + * @returns None. + * + * When the device is reset by power on reset first set the variable #iec60730_watchdog_state + * to the value #SL_IEC60730_WATCHDOG_TESTING, then check the watchdog reset. + * If sli_iec60730_set_watchdog_timout_min() is set successfully, + * and the device does not wake up from EM4, all Watchdogs are tested then finished. + * The cause of the reset is not by watchdog, the function sl_iec60730_watchdog_post() + * return result is #SL_IEC60730_TEST_PASSED + * + *****************************************************************************/ +void test_sl_iec60730_watchdog_post_reset_resason_no_valid(void); + +/**************************************************************************/ /** + * Public Check sl_iec60730_watchdog_post() operate + * + * @returns None. + * + * Check the function sl_iec60730_watchdog_post() operation when checking condition to + * prevent unexpected changed value when reset or return from power saving mode. + * If **iec60730_watchdog_count** value >= #SL_IEC60730_WDOGINST_NUMB after device + * power on reset, the function sl_iec60730_watchdog_post() return result is + * #SL_IEC60730_TEST_FAILED + * + *****************************************************************************/ +void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value(void); + +#endif // UNIT_TEST_IEC60730_WATCHDOG_H + +/** @} (end defgroup IEC60730_WATCHDOG_VERIFICATION_UNIT_TEST) */ +/** @} (end addtogroup IEC60730_UNIT_TEST) */ diff --git a/test/unit_test/src/app.c b/test/unit_test/src/app.c new file mode 100644 index 00000000..8300eb64 --- /dev/null +++ b/test/unit_test/src/app.c @@ -0,0 +1,27 @@ +/***************************************************************************//** + * @file + * @brief Top level application functions + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "app.h" + +void app_init(void) +{ + unit_test_run_all_test_cases(); +} + +void app_process_action(void) +{ +} diff --git a/test/unit_test/src/main.c b/test/unit_test/src/main.c new file mode 100644 index 00000000..6004d754 --- /dev/null +++ b/test/unit_test/src/main.c @@ -0,0 +1,58 @@ +/***************************************************************************//** + * @file + * @brief main() function. + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ +#include "sl_component_catalog.h" +#include "sl_system_init.h" +#include "app.h" +#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) +#include "sl_power_manager.h" +#endif +#if defined(SL_CATALOG_KERNEL_PRESENT) +#include "sl_system_kernel.h" +#else // SL_CATALOG_KERNEL_PRESENT +#include "sl_system_process_action.h" +#endif // SL_CATALOG_KERNEL_PRESENT + +int main(void) +{ + // Initialize Silicon Labs device, system, service(s) and protocol stack(s). + // Note that if the kernel is present, processing task(s) will be created by + // this call. + sl_system_init(); + + // Initialize the application. For example, create periodic timer(s) or + // task(s) if the kernel is present. + app_init(); + +#if defined(SL_CATALOG_KERNEL_PRESENT) + // Start the kernel. Task(s) created in app_init() will start running. + sl_system_kernel_start(); +#else // SL_CATALOG_KERNEL_PRESENT + while (1) { + // Do not remove this call: Silicon Labs components process action routine + // must be called from the super loop. + sl_system_process_action(); + + // Application process. + app_process_action(); + +#if defined(SL_CATALOG_POWER_MANAGER_PRESENT) + // Let the CPU go to sleep if the system allows it. + sl_power_manager_sleep(); +#endif + } +#endif // SL_CATALOG_KERNEL_PRESENT +} diff --git a/test/unit_test/src/unit_test_common.c b/test/unit_test/src/unit_test_common.c new file mode 100644 index 00000000..084360ec --- /dev/null +++ b/test/unit_test/src/unit_test_common.c @@ -0,0 +1,96 @@ +/***************************************************************************//** + * @file + * @brief common unit test api + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" + +/*=======Result test case=====*/ + +uint8_t test_case_result[MAX_NUMBER_OF_TEST_CASE]; +uint8_t current_test_numth; +static sl_iec60730_test_result_t cmock_value_return; + +/*=======Mock Management=====*/ +static void cmock_init(void) +{ +} +static void cmock_verify(void) +{ +} +static void cmock_destroy(void) +{ +} + +void cmock_set_value(sl_iec60730_test_result_t value) +{ + cmock_value_return = value; +} + +sl_iec60730_test_result_t cmock_return_value(void) +{ + return cmock_value_return; +} +/*=======Test Reset Options=====*/ +void setUp(void) +{ +} + +void tearDown(void) +{ +} + +void resetTest(void) +{ + tearDown(); + cmock_verify(); + cmock_destroy(); + cmock_init(); + setUp(); +} +void verifyTest(void); +void verifyTest(void) +{ + cmock_verify(); +} +/*=======Test Runner Used To Run Each Test=====*/ +void run_test(UnityTestFunction func, const char* name, UNITY_LINE_TYPE line_num) +{ + Unity.CurrentTestName = name; + Unity.CurrentTestLineNumber = line_num; +#ifdef UNITY_USE_COMMAND_LINE_ARGS + if (!UnityTestMatches()) { + return; + } +#endif + Unity.NumberOfTests++; + UNITY_CLR_DETAILS(); + UNITY_EXEC_TIME_START(); + cmock_init(); + if (TEST_PROTECT()) { + setUp(); + func(); + } + if (TEST_PROTECT()) { + tearDown(); + cmock_verify(); + } + cmock_destroy(); + UNITY_EXEC_TIME_STOP(); + + test_case_result[current_test_numth++] = Unity.CurrentTestFailed; + + UnityConcludeTest(); +} diff --git a/test/unit_test/src/unit_test_iec60730_bist.c b/test/unit_test/src/unit_test_iec60730_bist.c new file mode 100644 index 00000000..cde88530 --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_bist.c @@ -0,0 +1,106 @@ +/***************************************************************************//** + * @file unit_test_iec60730_bist.c + * @brief Unit test function sl_iec60730_bist(). + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" +#include "unit_test_iec60730_bist.h" + +/*=======Mock Code=====*/ +static bool is_function_called = false; + +__WEAK void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure) +{ + (void)failure; + is_function_called = true; +} + +// Dump functions + +__WEAK sl_iec60730_test_result_t sl_iec60730_vmc_bist(void) +{ + return cmock_return_value(); +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_imc_bist(void) +{ + return cmock_return_value(); +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_cpu_registers_bist(void) +{ + return cmock_return_value(); +} + +__WEAK void sl_iec60730_restart_watchdogs(void) +{ +} + +/*=======Test Case=====*/ +void test_sl_iec60730_bist_pass_all_check_condition(void) +{ + /*Setup*/ + is_function_called = false; + cmock_set_value(SL_IEC60730_TEST_PASSED); + /*Execute test*/ + sl_iec60730_bist(); + TEST_ASSERT_EQUAL(false, is_function_called); +} + +void test_sl_iec60730_bist_failed_check_condition(void) +{ + /*Setup*/ + is_function_called = false; + cmock_set_value(SL_IEC60730_TEST_FAILED); + /*Execute test*/ + sl_iec60730_bist(); + TEST_ASSERT_EQUAL(true, is_function_called); +} + +void test_iec60730_safety_check_error_occur(void) +{ + /*Setup*/ + is_function_called = false; + sl_iec60730_safety_check_error_occur(SL_IEC60730_CLOCK_FAIL); + cmock_set_value(SL_IEC60730_TEST_PASSED); + /*Execute test*/ + sl_iec60730_bist(); + TEST_ASSERT_EQUAL(true, is_function_called); +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_bist.c"); + run_test(test_sl_iec60730_bist_pass_all_check_condition, "test_sl_iec60730_bist_pass_all_check_condition", 54); + run_test(test_sl_iec60730_bist_failed_check_condition, "test_sl_iec60730_bist_failed_check_condition", 64); + run_test(test_iec60730_safety_check_error_occur, "test_iec60730_safety_check_error_occur", 74); + UnityEnd(); + #ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + while (1) { + // Do nothing + } +} diff --git a/test/unit_test/src/unit_test_iec60730_cpu_registers.c b/test/unit_test/src/unit_test_iec60730_cpu_registers.c new file mode 100644 index 00000000..d3ca82eb --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_cpu_registers.c @@ -0,0 +1,176 @@ +/***************************************************************************//** + * @file unit_test_iec60730_cpu_registers.c + * @brief Unit tests for functions in cpu registers module. + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" +#include "unit_test_iec60730_cpu_registers.h" + +/*=======Mock Code=====*/ +uint16_t sl_iec60730_program_counter_check = 0; + +sl_iec60730_test_result_t unit_test_iec60730_cpu_registers_bist_mock(void) +{ + return cmock_return_value(); +} + +sl_iec60730_test_result_t unit_test_iec60730_cpu_registers_bist_s_mock(void) +{ + return cmock_return_value(); +} + +sl_iec60730_test_result_t unit_test_iec60730_cpu_registers_bist_ns_mock(void) +{ + return cmock_return_value(); +} + +/*=======Test Case=====*/ +void test_sl_iec60730_cpu_registers_bist_pass_all_check_condition(void) +{ + /*Setup*/ + sl_iec60730_program_counter_check = 0; + cmock_set_value(SL_IEC60730_TEST_PASSED); + /*Execute test*/ + sl_iec60730_cpu_registers_bist(); + TEST_ASSERT_EQUAL(IEC60730_CPU_REGS_COMPLETE, sl_iec60730_program_counter_check); +} + +void test_sl_iec60730_cpu_registers_bist_failed_check_condition(void) +{ + /*Setup*/ + sl_iec60730_program_counter_check = 0; + cmock_set_value(SL_IEC60730_TEST_FAILED); + /*Execute test*/ + sl_iec60730_cpu_registers_bist(); + TEST_ASSERT_EQUAL(0, sl_iec60730_program_counter_check); +} + +void test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition(void) +{ + #if (IEC60370_CPU == IEC60370_CM33) + #if defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + #if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + cmock_set_value(SL_IEC60730_TEST_PASSED); + /*Execute test*/ + result = sl_iec60730_cpu_registers_bist_ns(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_PASSED, result); + #endif + #else + #error the CM33 without TZ is not supported + #endif // defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + #endif // (IEC60370_CPU == IEC60370_CM33) + + #if (IEC60370_CPU == IEC60370_CM4) + TEST_ASSERT(true); + #endif // IEC60370_CPU == IEC60370_CM4) +} + +void test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition(void) +{ + #if (IEC60370_CPU == IEC60370_CM33) + #if defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + #if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + cmock_set_value(SL_IEC60730_TEST_FAILED); + /*Execute test*/ + result = sl_iec60730_cpu_registers_bist_ns(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); + #endif + #else + #error the CM33 without TZ is not supported + #endif // defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + #endif // (IEC60370_CPU == IEC60370_CM33) + + #if (IEC60370_CPU == IEC60370_CM4) + TEST_ASSERT(true); + #endif // IEC60370_CPU == IEC60370_CM4) +} + +void test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition(void) +{ + #if (IEC60370_CPU == IEC60370_CM33) + #if defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + #if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + cmock_set_value(SL_IEC60730_TEST_PASSED); + /*Execute test*/ + result = sl_iec60730_cpu_registers_bist_s(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_PASSED, result); + #endif + #else + #error the CM33 without TZ is not supported + #endif // defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + #endif // (IEC60370_CPU == IEC60370_CM33) + + #if (IEC60370_CPU == IEC60370_CM4) + TEST_ASSERT(true); + #endif // IEC60370_CPU == IEC60370_CM4) +} + +void test_sl_iec60730_cpu_registers_bist_s_failed_check_condition(void) +{ + #if (IEC60370_CPU == IEC60370_CM33) + #if defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + #if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + cmock_set_value(SL_IEC60730_TEST_FAILED); + /*Execute test*/ + result = sl_iec60730_cpu_registers_bist_s(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); + #endif + #else + #error the CM33 without TZ is not supported + #endif // defined(__TZ_PRESENT) && (__TZ_PRESENT == 1) + #endif // (IEC60370_CPU == IEC60370_CM33) + + #if (IEC60370_CPU == IEC60370_CM4) + TEST_ASSERT(true); + #endif // IEC60370_CPU == IEC60370_CM4) +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_cpu_registers.c"); + run_test(test_sl_iec60730_cpu_registers_bist_pass_all_check_condition, "test_sl_iec60730_cpu_registers_bist_pass_all_check_condition", 38); + run_test(test_sl_iec60730_cpu_registers_bist_failed_check_condition, "test_sl_iec60730_cpu_registers_bist_failed_check_condition", 48); + run_test(test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition, "test_sl_iec60730_cpu_registers_bist_ns_pass_all_check_condition", 58); + run_test(test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition, "test_sl_iec60730_cpu_registers_bist_ns_failed_check_condition", 80); + run_test(test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition, "test_sl_iec60730_cpu_registers_bist_s_pass_all_check_condition", 102); + run_test(test_sl_iec60730_cpu_registers_bist_s_failed_check_condition, "test_sl_iec60730_cpu_registers_bist_s_failed_check_condition", 124); + + UnityEnd(); + #ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + + while (1) { + // Do nothing + } +} diff --git a/test/unit_test/src/unit_test_iec60730_invariable_memory.c b/test/unit_test/src/unit_test_iec60730_invariable_memory.c new file mode 100644 index 00000000..06941012 --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_invariable_memory.c @@ -0,0 +1,278 @@ +/***************************************************************************//** + * @file unit_test_iec60730_irq.c + * @brief Unit tests for functions in invariable memory module + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include +#include "em_core.h" +#include "em_gpcrc.h" +#include "em_cmu.h" +#include "unit_test_common.h" +#include "unit_test_iec60730_invariable_memory.h" + +/*=======Mock Code=====*/ +uint16_t sl_iec60730_program_counter_check; +__no_init sl_iec60730_imc_params_t unit_test_imc; +__no_init sl_iec60730_imc_test_multiple_regions_t unit_test_imc_test __CLASSB_RAM; + +#define UNIT_TEST_NUM_FLASH_REGIONS_CHECK 3 + +#if defined(__GNUC__) +#define UNIT_TEST_FLASH_OFFSET 20 +#elif defined(__ICCARM__) +#define UNIT_TEST_FLASH_OFFSET 80 +#else +#endif + +#if defined(__GNUC__) +const sl_iec60730_imc_test_region_t unit_test_imc_region_test[UNIT_TEST_NUM_FLASH_REGIONS_CHECK] = +{ { .start = SL_IEC60730_ROM_START, .end = SL_IEC60730_ROM_END }, + { .start = SL_IEC60730_ROM_START + 2 * UNIT_TEST_FLASH_OFFSET, .end = SL_IEC60730_ROM_START + 3 * UNIT_TEST_FLASH_OFFSET }, + { .start = SL_IEC60730_ROM_START + 4 * UNIT_TEST_FLASH_OFFSET, .end = SL_IEC60730_ROM_START + 5 * UNIT_TEST_FLASH_OFFSET } }; + +#elif defined(__ICCARM__) +const sl_iec60730_imc_test_region_t unit_test_imc_region_test[UNIT_TEST_NUM_FLASH_REGIONS_CHECK] = +{ { .start = SL_IEC60730_ROM_START, .end = SL_IEC60730_ROM_END }, + { .start = (uint32_t *)((uint32_t)SL_IEC60730_ROM_START + 2 * UNIT_TEST_FLASH_OFFSET), .end = (uint32_t *)((uint32_t)SL_IEC60730_ROM_START + 3 * UNIT_TEST_FLASH_OFFSET) }, + { .start = (uint32_t *)((uint32_t)SL_IEC60730_ROM_START + 4 * UNIT_TEST_FLASH_OFFSET), .end = (uint32_t *)((uint32_t)SL_IEC60730_ROM_START + 5 * UNIT_TEST_FLASH_OFFSET) } }; +#else +#endif + +#if (SL_IEC60730_CRC_USE_SW_ENABLE == 0) +bool unit_test_gpcrc_enable; +#else +bool unit_test_sw_cal_crc_enable; +#endif // (SL_IEC60730_CRC_USE_SW_ENABLE == 0) +sl_iec60730_test_result_t check_integrity_result; +uint32_t* unit_test_init_run_crc; + +uint32_t* unit_test_iec60730_imc_mock_init_run_crc(void) +{ + return unit_test_init_run_crc; +} + +sl_iec60730_test_result_t unit_test_mock_check_integrity(void) +{ + return check_integrity_result; +} + +void set_up_test_vmc_post_and_bist(void) +{ + CMU_ClockEnable(cmuClock_GPCRC, true); + unit_test_imc.gpcrc = SL_IEC60730_DEFAULT_GPRC; + unit_test_imc_test.region = unit_test_imc_region_test; + unit_test_imc_test.number_of_test_regions = 1; + check_integrity_result = SL_IEC60730_TEST_PASSED; + unit_test_init_run_crc = SL_IEC60730_ROM_START; + #if (SL_IEC60730_CRC_USE_SW_ENABLE == 0) + unit_test_gpcrc_enable = true; + #else + unit_test_sw_cal_crc_enable = true; + #endif // (SL_IEC60730_CRC_USE_SW_ENABLE == 0) + sl_iec60730_imc_init(&unit_test_imc, &unit_test_imc_test); +} + +#if (SL_IEC60730_CRC_USE_SW_ENABLE == 0) +bool unit_test_iec60730_imc_mock_enable_gpcrc(void) +{ + return unit_test_gpcrc_enable; +} +#else +bool unit_test_iec60730_imc_mock_sw_enable_cal_crc(void) +{ + return unit_test_sw_cal_crc_enable; +} +#endif // (SL_IEC60730_CRC_USE_SW_ENABLE == 0) + +/*=======Test Case=====*/ +void test_sl_iec60730_imc_init_param_null(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + unit_test_imc.gpcrc = NULL; + /*Execute test*/ + sl_iec60730_imc_init(NULL, NULL); + result = sl_iec60730_imc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_imc_post_pass_check(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + /*Execute test*/ + result = sl_iec60730_imc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_PASSED, result); +} + +void test_sl_iec60730_imc_post_fail_check(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + #if (SL_IEC60730_CRC_USE_SW_ENABLE == 0) + unit_test_gpcrc_enable = false; + #else + unit_test_sw_cal_crc_enable = false; + #endif // (SL_IEC60730_CRC_USE_SW_ENABLE == 0) + /*Execute test*/ + sl_iec60730_imc_init(&unit_test_imc, &unit_test_imc_test); + result = sl_iec60730_imc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_imc_bist_pass_all_check(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + sl_iec60730_imc_post(); + /*Execute test*/ + result = sl_iec60730_imc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_PASSED, result); +} + +void test_sl_iec60730_imc_bist_fail_check_integrity(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + check_integrity_result = SL_IEC60730_TEST_FAILED; + /*Execute test*/ + result = sl_iec60730_imc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + unit_test_init_run_crc = SL_IEC60730_ROM_END; + sl_iec60730_imc_init(&unit_test_imc, &unit_test_imc_test); + /*Execute test*/ + result = sl_iec60730_imc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_imc_bist_fail_compare_crc(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + sl_iec60730_imc_post(); + set_up_test_vmc_post_and_bist(); + #if (SL_IEC60730_CRC_USE_SW_ENABLE == 0) + unit_test_gpcrc_enable = false; + sl_iec60730_imc_init(&unit_test_imc, &unit_test_imc_test); + #else + sl_iec60730_imc_init(&unit_test_imc, &unit_test_imc_test); + unit_test_sw_cal_crc_enable = false; + #endif // (SL_IEC60730_CRC_USE_SW_ENABLE == 0) + /*Execute test*/ + result = sl_iec60730_imc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_update_crc_with_data_buffer_params_null(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + sl_iec60730_crc_t crc_value = (sl_iec60730_crc_t) SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE; + /*Execute test*/ + result = sl_iec60730_update_crc_with_data_buffer(NULL, + &crc_value, + (uint8_t *)SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST, + strlen(SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST)); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_update_crc_with_data_buffer_calculation_crc(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + sl_iec60730_crc_t crc_value = (sl_iec60730_crc_t) SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE; + sl_iec60730_update_crc_params_t update = SL_IEC60730_IMC_CRC_BUFFER_UPDATE_DEFAULT; + /*Execute test*/ + result = sl_iec60730_update_crc_with_data_buffer(&update, + &crc_value, + (uint8_t *)SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST, + (uint32_t)strlen(SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_TEST)); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_PASSED, result); + + #if (SL_IEC60730_CRC_USE_SW_ENABLE == 1) + #if (SL_IEC60730_USE_CRC_32_ENABLE == 1) + TEST_ASSERT_EQUAL(SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT, crc_value); + #else // (SL_IEC60730_USE_CRC_32_ENABLE != 1) + TEST_ASSERT_EQUAL(SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT, crc_value); + #endif // (SL_IEC60730_USE_CRC_32_ENABLE == 1) + #else // (SL_IEC60730_CRC_USE_SW_ENABLE != 1) + #if (SL_IEC60730_USE_CRC_32_ENABLE == 1) + if (SL_IEC60730_IMC_DATA_READ == update.readType) { + TEST_ASSERT_EQUAL(SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT, crc_value); + } else if (SL_IEC60730_IMC_DATA_READ_BIT_REVERSED == update.readType) { + TEST_ASSERT_EQUAL(0x649C2FD3, crc_value); + } else if (SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED == update.readType) { + TEST_ASSERT_EQUAL(0x2639F4CB, crc_value); + } else { + TEST_ASSERT_EQUAL(SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE, crc_value); + } + #else // (SL_IEC60730_USE_CRC_32_ENABLE != 1) + if (SL_IEC60730_IMC_DATA_READ == update.readType) { + TEST_ASSERT_EQUAL(0x8D94, crc_value); + } else if (SL_IEC60730_IMC_DATA_READ_BIT_REVERSED == update.readType) { + TEST_ASSERT_EQUAL(SL_IEC60730_IMC_CRC_BUFFER_SAMPLE_RESULT, crc_value); + } else if (SL_IEC60730_IMC_DATA_READ_BYTE_REVERSED == update.readType) { + TEST_ASSERT_EQUAL(0x948D, crc_value); + } else { + TEST_ASSERT_EQUAL(SL_IEC60730_IMC_CRC_BUFFER_INIT_VALUE, crc_value); + } + #endif // (SL_IEC60730_USE_CRC_32_ENABLE == 1) + #endif // (SL_IEC60730_CRC_USE_SW_ENABLE == 1) +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_invariable_memory.c"); + run_test(test_sl_iec60730_imc_init_param_null, "test_sl_iec60730_imc_init_param_null", 95); + run_test(test_sl_iec60730_imc_post_pass_check, "test_sl_iec60730_imc_post_pass_check", 105); + run_test(test_sl_iec60730_imc_post_fail_check, "test_sl_iec60730_imc_post_fail_check", 114); + run_test(test_sl_iec60730_imc_bist_pass_all_check, "test_sl_iec60730_imc_bist_pass_all_check", 129); + run_test(test_sl_iec60730_imc_bist_fail_check_integrity, "test_sl_iec60730_imc_bist_fail_check_integrity", 139); + run_test(test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address, "test_sl_iec60730_imc_bist_iec60730_run_crc_greater_than_rom_end_address", 149); + run_test(test_sl_iec60730_imc_bist_fail_compare_crc, "test_sl_iec60730_imc_bist_fail_compare_crc", 160); + run_test(test_sl_iec60730_update_crc_with_data_buffer_params_null, "test_sl_iec60730_update_crc_with_data_buffer_params_null", 178); + run_test(test_sl_iec60730_update_crc_with_data_buffer_calculation_crc, "test_sl_iec60730_update_crc_with_data_buffer_calculation_crc", 191); + UnityEnd(); +#ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + while (1) { + // Do nothing + } +} diff --git a/test/unit_test/src/unit_test_iec60730_irq.c b/test/unit_test/src/unit_test_iec60730_irq.c new file mode 100644 index 00000000..56b79325 --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_irq.c @@ -0,0 +1,171 @@ +/***************************************************************************//** + * @file unit_test_iec60730_irq.c + * @brief Unit tests for functions in irq module + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" +#include "unit_test_iec60730_irq.h" + +/*=======Set up=====*/ +#define IEC60730_IRQ_SIZE 8 +#define UNIT_TEST_NUM_IRQ_CHECK 1 + +static bool is_function_called = false; +uint16_t sl_iec60730_program_counter_check = 0; +sl_iec60730_irq_fail_t unit_test_irq = { 0, 0 }; +sl_iec60730_irq_fail_t* get_result_irq_fail = NULL; + +volatile SL_IEC60730_IRQ_TYPE_VARIABLE unit_test_irq_exec_count[IEC60730_IRQ_SIZE] = { 0 }; +const sl_iec60730_irq_execution_bounds_t unit_test_irq_freq_bounds[IEC60730_IRQ_SIZE] = { { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 }, + { .min = 9, .max = 11 } }; + +sl_iec60730_irq_cfg_t unit_test_irq_config = { &unit_test_irq_exec_count[0], + &unit_test_irq_freq_bounds[0], + UNIT_TEST_NUM_IRQ_CHECK }; + +/*=======Mock Code=====*/ + +__WEAK void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure) +{ + (void)failure; + is_function_called = true; +} + +__WEAK void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure) +{ + (void) failure; +} + +/*=======Test Case=====*/ + +void test_sl_iec60730_irq_init_param_null(void) +{ + /*Setup*/ + is_function_called = false; + /*Execute test*/ + sl_iec60730_irq_init(NULL); + // check config is not init when param NULL + sl_iec60730_irq_check(); + TEST_ASSERT_EQUAL(true, is_function_called); +} +void test_sl_iec60730_irq_init_param_size_greater_than_max_irq(void) +{ + /*Setup*/ + is_function_called = false; + unit_test_irq_config.size = IEC60730_MAX_IRQ_CHECK; + /*Execute test*/ + sl_iec60730_irq_init(&unit_test_irq_config); + TEST_ASSERT_EQUAL(true, is_function_called); +} + +void test_sl_iec60730_irq_check_count_in_bound(void) +{ + /*Setup*/ + is_function_called = false; + unit_test_irq_config.size = UNIT_TEST_NUM_IRQ_CHECK; + unit_test_irq_config.irq_count[0] = 10; + sl_iec60730_irq_init(&unit_test_irq_config); + /*Execute test*/ + sl_iec60730_irq_check(); + TEST_ASSERT_EQUAL(false, is_function_called); +} + +void test_sl_iec60730_irq_check_count_out_bound(void) +{ + /*Setup*/ + is_function_called = false; + unit_test_irq_config.size = UNIT_TEST_NUM_IRQ_CHECK; + unit_test_irq_config.irq_count[0] = 12; + sl_iec60730_irq_init(&unit_test_irq_config); + /*Execute test*/ + sl_iec60730_irq_check(); + TEST_ASSERT_EQUAL(true, is_function_called); +} + +void test_sl_iec60730_irq_reset_counter(void) +{ + /*Setup*/ + unit_test_irq_config.irq_count[0] = 12; + sl_iec60730_irq_init(&unit_test_irq_config); + /*Execute test*/ + sl_iec60730_irq_reset_counter(); + TEST_ASSERT_EQUAL(0, unit_test_irq_config.irq_count[0]); +} + +void test_sl_iec60730_irq_fail_occur(void) +{ + /*Setup*/ + unit_test_irq.irq_fail |= (1 << 0); + unit_test_irq.num_irq_fail = 1; + unit_test_irq_config.size = UNIT_TEST_NUM_IRQ_CHECK; + unit_test_irq_config.irq_count[0] = 12; + sl_iec60730_irq_init(&unit_test_irq_config); + sl_iec60730_irq_reset_fail_result(); + /*Execute test*/ + sl_iec60730_irq_check(); + get_result_irq_fail = sl_iec60730_get_irq_index_failed(); + TEST_ASSERT_EQUAL(unit_test_irq.irq_fail, get_result_irq_fail->irq_fail); + TEST_ASSERT_EQUAL(unit_test_irq.num_irq_fail, get_result_irq_fail->num_irq_fail); +} + +void test_sl_iec60730_irq_reset_fail_result(void) +{ + /*Setup*/ + unit_test_irq_config.size = UNIT_TEST_NUM_IRQ_CHECK; + unit_test_irq_config.irq_count[0] = 12; + sl_iec60730_irq_init(&unit_test_irq_config); + sl_iec60730_irq_check(); + /*Execute test*/ + sl_iec60730_irq_reset_fail_result(); + get_result_irq_fail = sl_iec60730_get_irq_index_failed(); + TEST_ASSERT_EQUAL(0, get_result_irq_fail->irq_fail); + TEST_ASSERT_EQUAL(0, get_result_irq_fail->num_irq_fail); +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_irq.c"); + run_test(test_sl_iec60730_irq_init_param_null, "test_sl_iec60730_irq_init_param_null", 53); + run_test(test_sl_iec60730_irq_init_param_size_greater_than_max_irq, "test_sl_iec60730_irq_init_param_size_greater_than_max_irq", 62); + run_test(test_sl_iec60730_irq_check_count_in_bound, "test_sl_iec60730_irq_check_count_in_bound", 72); + run_test(test_sl_iec60730_irq_check_count_out_bound, "test_sl_iec60730_irq_check_count_out_bound", 85); + run_test(test_sl_iec60730_irq_reset_counter, "test_sl_iec60730_irq_reset_counter", 98); + run_test(test_sl_iec60730_irq_fail_occur, "test_sl_iec60730_irq_fail_occur", 108); + run_test(test_sl_iec60730_irq_reset_fail_result, "test_sl_iec60730_irq_reset_fail_result", 120); + UnityEnd(); + #ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + + while (1) { + // Do nothing + } +} diff --git a/test/unit_test/src/unit_test_iec60730_post.c b/test/unit_test/src/unit_test_iec60730_post.c new file mode 100644 index 00000000..076956ac --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_post.c @@ -0,0 +1,110 @@ +/***************************************************************************//** + * @file unit_test_iec60730_post.c + * @brief Unit test function sl_iec60730_post(). + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" +#include "unit_test_iec60730_post.h" + +/*=======Mock Code=====*/ +uint8_t iec60730_timer_test_control = SL_IEC60730_TIMER_TEST_ENABLE; +static bool is_function_called = false; + +__WEAK void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure) +{ + (void)failure; + is_function_called = true; +} + +// Dump functions + +__WEAK sl_iec60730_test_result_t sl_iec60730_vmc_post(void) +{ + return cmock_return_value(); +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_imc_post(void) +{ + return cmock_return_value(); +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_cpu_registers_post(void) +{ + return cmock_return_value(); +} + +__WEAK sl_iec60730_test_result_t sl_iec60730_watchdog_post(void) +{ + return cmock_return_value(); +} + +__WEAK void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure) +{ + (void) failure; +} + +__WEAK void sl_iec60730_restart_watchdogs(void) +{ +} + +__WEAK void sl_iec60730_sys_clock_test_enable(void) +{ +} + +/*=======Test Case=====*/ +void test_sl_iec60730_post_pass_all_check_condition(void) +{ + /*Setup*/ + is_function_called = false; + cmock_set_value(SL_IEC60730_TEST_PASSED); + /*Execute test*/ + sl_iec60730_post(); + TEST_ASSERT_EQUAL(false, is_function_called); +} + +void test_sl_iec60730_post_failed_check_condition(void) +{ + /*Setup*/ + is_function_called = false; + cmock_set_value(SL_IEC60730_TEST_FAILED); + /*Execute test*/ + sl_iec60730_post(); + TEST_ASSERT_EQUAL(true, is_function_called); +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_post.c"); + run_test(test_sl_iec60730_post_pass_all_check_condition, "test_sl_iec60730_post_pass_all_check_condition", 68); + run_test(test_sl_iec60730_post_failed_check_condition, "test_sl_iec60730_post_failed_check_condition", 78); + UnityEnd(); + #ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + + while (1) { + // Do nothing + } +} diff --git a/test/unit_test/src/unit_test_iec60730_program_counter.c b/test/unit_test/src/unit_test_iec60730_program_counter.c new file mode 100644 index 00000000..963f9b16 --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_program_counter.c @@ -0,0 +1,83 @@ +/***************************************************************************//** + * @file unit_test_iec60730_program_counter.c + * @brief Unit test function sl_iec60730_program_counter_test(). + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" +#include "unit_test_iec60730_program_counter.h" + +/*=======Mock Code=====*/ + +extern uint16_t sl_iec60730_program_counter_check; +static bool is_function_called = false; + +// Dump functions + +__WEAK void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure) +{ + (void)failure; + is_function_called = true; +} + +__WEAK void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure) +{ + (void)failure; +} + +/*=======Test Case=====*/ +void test_sl_iec60730_program_counter_complete_all_bit_check(void) +{ + /*Setup*/ + is_function_called = false; + sl_iec60730_program_counter_check = IEC60730_ALL_COMPLETE_BITS; + /*Execute test*/ + sl_iec60730_program_counter_test(); + TEST_ASSERT_EQUAL(false, is_function_called); +} + +void test_sl_iec60730_program_counter_fail_some_bit_check(void) +{ + /*Setup*/ + is_function_called = false; + sl_iec60730_program_counter_check = (IEC60730_ALL_COMPLETE_BITS && (~(IEC60730_INTERRUPT_COMPLETE))); + /*Execute test*/ + sl_iec60730_program_counter_test(); + TEST_ASSERT_EQUAL(true, is_function_called); +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_program_counter.c"); + run_test(test_sl_iec60730_program_counter_complete_all_bit_check, "test_sl_iec60730_program_counter_complete_all_bit_check", 40); + run_test(test_sl_iec60730_program_counter_fail_some_bit_check, "test_sl_iec60730_program_counter_fail_some_bit_check", 50); + UnityEnd(); + #ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + + while (1) { + // Do nothing + } +} diff --git a/test/unit_test/src/unit_test_iec60730_safety_check.c b/test/unit_test/src/unit_test_iec60730_safety_check.c new file mode 100644 index 00000000..1a1dec3b --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_safety_check.c @@ -0,0 +1,75 @@ +/***************************************************************************//** + * @file unit_test_iec60730_safety_check.c + * @brief Unit test function sl_iec60730_safety_check_reset_error() and sl_iec60730_safety_check_error_occur(). + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" +#include "unit_test_iec60730_safety_check.h" + +/*=======Set up=====*/ +sl_iec60730_safety_check_t unit_test_safety_check = { SL_IEC60730_NO_FAILURE, 0 }; +sl_iec60730_safety_check_t* get_result_safety_check = NULL; + +/*=======Mock Code=====*/ + +/*=======Test Case=====*/ +void test_sl_iec60730_safety_check_error_occur(void) +{ + /*Setup*/ + + /*Execute test*/ + sl_iec60730_safety_check_error_occur(SL_IEC60730_INTERRUPT_FAIL); + unit_test_safety_check.number_error++; + unit_test_safety_check.error |= (1 << SL_IEC60730_INTERRUPT_FAIL); + get_result_safety_check = sl_iec60730_safety_check_get_error(); + TEST_ASSERT_EQUAL(unit_test_safety_check.number_error, get_result_safety_check->number_error); + TEST_ASSERT_EQUAL(unit_test_safety_check.error, get_result_safety_check->error); +} + +void test_sl_iec60730_safety_check_reset_error(void) +{ + /*Setup*/ + + /*Execute test*/ + sl_iec60730_safety_check_reset_error(); + get_result_safety_check = sl_iec60730_safety_check_get_error(); + TEST_ASSERT_EQUAL(0, get_result_safety_check->number_error); + TEST_ASSERT_EQUAL(0, get_result_safety_check->error); +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_safety_check.c"); + run_test(test_sl_iec60730_safety_check_error_occur, "test_sl_iec60730_safety_check_error_occur", 29); + run_test(test_sl_iec60730_safety_check_reset_error, "test_sl_iec60730_safety_check_reset_error", 42); + UnityEnd(); + #ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + + while (1) { + // Do nothing + } +} diff --git a/test/unit_test/src/unit_test_iec60730_system_clock.c b/test/unit_test/src/unit_test_iec60730_system_clock.c new file mode 100644 index 00000000..01d9a974 --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_system_clock.c @@ -0,0 +1,159 @@ +/***************************************************************************//** + * @file unit_test_iec60730_system_clock.c + * @brief Unit tests for functions in system_clock module. + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" +#include "unit_test_iec60730_system_clock.h" + +/*=======Set up=====*/ +uint16_t sl_iec60730_program_counter_check = 0; +static bool is_function_called = false; +uint16_t count_sl_iec60730_test_clock_tick_called = 0; + +/*=======Mock Code=====*/ + +__WEAK void sl_iec60730_safe_state(sl_iec60730_test_failure_t failure) +{ + (void)failure; + is_function_called = true; +} + +__WEAK void sl_iec60730_safety_check_error_occur(sl_iec60730_test_failure_t failure) +{ + (void) failure; +} + +__WEAK void sl_iec60730_irq_check(void) +{ +} + +__WEAK void sl_iec60730_program_counter_test(void) +{ + is_function_called = true; +} + +/*=======Test Case=====*/ +void test_sl_iec60730_test_clock_tick_timer_test_disable(void) +{ + /*Setup*/ + is_function_called = false; + sl_iec60730_sys_clock_test_disable(); + /*Execute test*/ + sl_iec60730_test_clock_tick(); + count_sl_iec60730_test_clock_tick_called++; + TEST_ASSERT_EQUAL(true, is_function_called); +} + +void test_sl_iec60730_test_clock_tick_count_in_bound(void) +{ + /*Setup*/ + uint8_t index; + is_function_called = false; + sl_iec60730_sys_clock_test_enable(); + for (index = 0; index < (SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ + SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE); index++) { + sl_iec60730_sys_clock_count_tick(); + } + /*Execute test*/ + sl_iec60730_test_clock_tick(); + count_sl_iec60730_test_clock_tick_called++; + TEST_ASSERT_EQUAL(false, is_function_called); +} + +void test_sl_iec60730_test_clock_tick_count_out_bound(void) +{ + /*Setup*/ + uint8_t index; + is_function_called = false; + sl_iec60730_sys_clock_test_enable(); + for (index = 0; index <= (SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ + SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE + 1); index++) { + sl_iec60730_sys_clock_count_tick(); + } + /*Execute test*/ + sl_iec60730_test_clock_tick(); + count_sl_iec60730_test_clock_tick_called++; + TEST_ASSERT_EQUAL(true, is_function_called); +} + +void test_sl_iec60730_sys_clock_count_reset(void) +{ + /*Setup*/ + uint8_t index; + is_function_called = false; + sl_iec60730_sys_clock_test_enable(); + for (index = 0; index < (SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ + SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE); index++) { + sl_iec60730_sys_clock_count_tick(); + } + /*Execute test*/ + sl_iec60730_sys_clock_count_reset(); + sl_iec60730_test_clock_tick(); + count_sl_iec60730_test_clock_tick_called++; + TEST_ASSERT_EQUAL(true, is_function_called); +} + +void test_sl_iec60730_test_clock_tick_test_clock_multiplier(void) +{ + /*Setup*/ + uint8_t index; + is_function_called = false; + sl_iec60730_sys_clock_test_enable(); + /*Execute test*/ + while (count_sl_iec60730_test_clock_tick_called <= SL_IEC60730_TEST_CLOCK_MULTIPLIER + 1) { + for (index = 0; index < (SL_IEC60730_SYS_CLOCK_TEST_CLK_FREQ + SL_IEC60730_SYS_CLOCK_TEST_TOLERANCE); index++) { + sl_iec60730_sys_clock_count_tick(); + } + sl_iec60730_test_clock_tick(); + count_sl_iec60730_test_clock_tick_called++; + } + TEST_ASSERT_EQUAL(true, is_function_called); +} + +void test_sl_iec60730_get_number_test_timer_tick(void) +{ + /*Setup*/ + uint16_t unit_test_get_number_test_timer_tick; + /*Execute test*/ + unit_test_get_number_test_timer_tick = sl_iec60730_get_number_test_timer_tick(); + TEST_ASSERT_EQUAL(count_sl_iec60730_test_clock_tick_called, unit_test_get_number_test_timer_tick); +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_system_clock.c"); + run_test(test_sl_iec60730_test_clock_tick_timer_test_disable, "test_sl_iec60730_test_clock_tick_timer_test_disable", 46); + run_test(test_sl_iec60730_test_clock_tick_count_in_bound, "test_sl_iec60730_test_clock_tick_count_in_bound", 57); + run_test(test_sl_iec60730_test_clock_tick_count_out_bound, "test_sl_iec60730_test_clock_tick_count_out_bound", 72); + run_test(test_sl_iec60730_sys_clock_count_reset, "test_sl_iec60730_sys_clock_count_reset", 87); + run_test(test_sl_iec60730_test_clock_tick_test_clock_multiplier, "test_sl_iec60730_test_clock_tick_test_clock_multiplier", 103); + run_test(test_sl_iec60730_get_number_test_timer_tick, "test_sl_iec60730_get_number_test_timer_tick", 120); + UnityEnd(); + #ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + + while (1) { + // Do nothing + } +} diff --git a/test/unit_test/src/unit_test_iec60730_variable_memory.c b/test/unit_test/src/unit_test_iec60730_variable_memory.c new file mode 100644 index 00000000..e54445fe --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_variable_memory.c @@ -0,0 +1,317 @@ +/***************************************************************************//** + * @file unit_test_iec60730_variable_memory.c + * @brief Unit tests for functions in variable memory module + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" +#include "unit_test_iec60730_variable_memory.h" + +/*=======Mock Code=====*/ + +#define UNIT_TEST_NUM_RAM_REGIONS_CHECK 3 + +uint16_t sl_iec60730_program_counter_check; +__no_init sl_iec60730_vmc_test_multiple_regions_t unit_test_vmc_test; + +const sl_iec60730_vmc_test_region_t unit_test_vmc_region_test_failed[1] = +{ { .start = RAMTEST_END, .end = RAMTEST_START } }; + +#if defined(__GNUC__) +#define UNIT_TEST_RAM_OFFSET 20 +#elif defined(__ICCARM__) +#define UNIT_TEST_RAM_OFFSET 80 +#else +#endif + +#if defined(__GNUC__) + +const sl_iec60730_vmc_test_region_t unit_test_vmc_region_test[UNIT_TEST_NUM_RAM_REGIONS_CHECK] = +{ { .start = RAMTEST_START, .end = RAMTEST_END }, + { .start = RAM_START, .end = RAM_START + UNIT_TEST_RAM_OFFSET }, + { .start = RAM_START + 2 * UNIT_TEST_RAM_OFFSET, .end = RAM_START + 3 * UNIT_TEST_RAM_OFFSET } }; + +#elif defined(__ICCARM__) + +const sl_iec60730_vmc_test_region_t unit_test_vmc_region_test[UNIT_TEST_NUM_RAM_REGIONS_CHECK] = +{ { .start = RAMTEST_START, .end = RAMTEST_END }, + { .start = RAM_START, .end = (uint32_t *)((uint32_t)RAM_START + UNIT_TEST_RAM_OFFSET) }, + { .start = (uint32_t *)((uint32_t)RAM_START + 2 * UNIT_TEST_RAM_OFFSET), .end = (uint32_t *)((uint32_t)RAM_START + 3 * UNIT_TEST_RAM_OFFSET) } }; + +#else +#endif +sl_iec60730_test_result_t vmc_marchc_step_check_ram_section; +sl_iec60730_test_result_t vmc_marchc_step_check_backup_section; +sl_iec60730_test_result_t check_integrity_result; +bool iec60730_vmc_pre_run_marchxc_step_flag; +bool run_test_sl_iec60730_vmc_bist_allow; + +sl_iec60730_test_result_t unit_test_mock_check_integrity(void) +{ + return check_integrity_result; +} + +__WEAK bool sl_iec60730_vmc_marchc_step(uint32_t *start, + uint32_t *end, + uint32_t background, + uint32_t *backup) +{ + (void)background; + (void)end; + if (start == backup) { + cmock_set_value(vmc_marchc_step_check_backup_section); + if (!check_integrity_result) { + cmock_set_value(unit_test_mock_check_integrity()); + } + } else { + cmock_set_value(vmc_marchc_step_check_ram_section); + if (!check_integrity_result) { + cmock_set_value(unit_test_mock_check_integrity()); + } + } + return cmock_return_value(); +} + +__WEAK bool sl_iec60730_vmc_marchxc_step(uint32_t *start, + uint32_t *end, + uint32_t background, + uint32_t *backup) +{ + (void)background; + (void)end; + if (start == backup) { + cmock_set_value(vmc_marchc_step_check_backup_section); + if (!check_integrity_result) { + cmock_set_value(unit_test_mock_check_integrity()); + } + } else { + run_test_sl_iec60730_vmc_bist_allow = true; + cmock_set_value(vmc_marchc_step_check_ram_section); + if (!check_integrity_result) { + cmock_set_value(unit_test_mock_check_integrity()); + } + } + return cmock_return_value(); +} + +bool sl_iec60730_vmc_pre_run_marchxc_step(uint32_t *addr, uint32_t size) +{ + UNUSED_VAR(addr); + UNUSED_VAR(size); + return iec60730_vmc_pre_run_marchxc_step_flag; +} + +void set_up_test_vmc_post_and_bist(void) +{ + // VMC test config + unit_test_vmc_test.region = unit_test_vmc_region_test; + unit_test_vmc_test.number_of_test_regions = UNIT_TEST_NUM_RAM_REGIONS_CHECK; + vmc_marchc_step_check_ram_section = SL_IEC60730_TEST_PASSED; + vmc_marchc_step_check_backup_section = SL_IEC60730_TEST_PASSED; + check_integrity_result = SL_IEC60730_TEST_PASSED; + iec60730_vmc_pre_run_marchxc_step_flag = true; + run_test_sl_iec60730_vmc_bist_allow = false; + sl_iec60730_vmc_init(&unit_test_vmc_test); +} + +/*=======Test Case=====*/ +void test_sl_iec60730_vmc_init_param_null(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + unit_test_vmc_test.region = NULL; + /*Execute test*/ + sl_iec60730_vmc_init(&unit_test_vmc_test); + result = sl_iec60730_vmc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_init_start_address_greater_than_end_address(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + unit_test_vmc_test.region = unit_test_vmc_region_test_failed; + unit_test_vmc_test.number_of_test_regions = 1; + /*Execute test*/ + sl_iec60730_vmc_init(&unit_test_vmc_test); + result = sl_iec60730_vmc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_post_pass_all_check_sections(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + /*Execute test*/ + result = sl_iec60730_vmc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_PASSED, result); +} + +void test_sl_iec60730_vmc_post_fail_marchc_check_ram_section(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + vmc_marchc_step_check_ram_section = SL_IEC60730_TEST_FAILED; + /*Execute test*/ + result = sl_iec60730_vmc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_post_fail_marchc_check_backup_section(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + vmc_marchc_step_check_backup_section = SL_IEC60730_TEST_FAILED; + /*Execute test*/ + result = sl_iec60730_vmc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_post_fail_check_integrity_ram_section(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + check_integrity_result = SL_IEC60730_TEST_FAILED; + /*Execute test*/ + result = sl_iec60730_vmc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_post_fail_check_integrity_backup_section(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + check_integrity_result = SL_IEC60730_TEST_FAILED; + /*Execute test*/ + result = sl_iec60730_vmc_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_bist_pass_all_check_sections(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + /*Execute test*/ + result = sl_iec60730_vmc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_PASSED, result); +} + +void test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + vmc_marchc_step_check_ram_section = SL_IEC60730_TEST_FAILED; + /*Execute test*/ + result = sl_iec60730_vmc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + vmc_marchc_step_check_backup_section = SL_IEC60730_TEST_FAILED; + /*Execute test*/ + result = sl_iec60730_vmc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + check_integrity_result = SL_IEC60730_TEST_FAILED; + /*Execute test*/ + result = sl_iec60730_vmc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + check_integrity_result = SL_IEC60730_TEST_FAILED; + /*Execute test*/ + result = sl_iec60730_vmc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +void test_sl_iec60730_vmc_bist_checking_allow_run_test(void) +{ + /*Setup*/ + set_up_test_vmc_post_and_bist(); + iec60730_vmc_pre_run_marchxc_step_flag = false; + /*Execute test*/ + sl_iec60730_vmc_bist(); + TEST_ASSERT_EQUAL(false, run_test_sl_iec60730_vmc_bist_allow); +} + +void test_sl_iec60730_vmc_bist_fail_stack_test_over_flow(void) +{ + /*Setup*/ + sl_iec60730_test_result_t result = SL_IEC60730_TEST_FAILED; + set_up_test_vmc_post_and_bist(); + uint32_t *stack_start = STACK_CHECK; + /*Execute test*/ + *stack_start = SL_STACK_OVERFLOW_CONST_GUARD_VALUE_3; + result = sl_iec60730_vmc_bist(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, result); +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_variable_memory.c"); + run_test(test_sl_iec60730_vmc_init_param_null, "test_sl_iec60730_vmc_init_param_null", 126); + run_test(test_sl_iec60730_vmc_init_start_address_greater_than_end_address, "test_sl_iec60730_vmc_init_start_address_greater_than_end_address", 136); + run_test(test_sl_iec60730_vmc_post_pass_all_check_sections, "test_sl_iec60730_vmc_post_pass_all_check_sections", 147); + run_test(test_sl_iec60730_vmc_post_fail_marchc_check_ram_section, "test_sl_iec60730_vmc_post_fail_marchc_check_ram_section", 156); + run_test(test_sl_iec60730_vmc_post_fail_marchc_check_backup_section, "test_sl_iec60730_vmc_post_fail_marchc_check_backup_section", 166); + run_test(test_sl_iec60730_vmc_post_fail_check_integrity_ram_section, "test_sl_iec60730_vmc_post_fail_check_integrity_ram_section", 176); + run_test(test_sl_iec60730_vmc_post_fail_check_integrity_backup_section, "test_sl_iec60730_vmc_post_fail_check_integrity_backup_section", 186); + run_test(test_sl_iec60730_vmc_bist_pass_all_check_sections, "test_sl_iec60730_vmc_bist_pass_all_check_sections", 196); + run_test(test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section, "test_sl_iec60730_vmc_bist_fail_marchxc_check_ram_section", 205); + run_test(test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section, "test_sl_iec60730_vmc_bist_fail_marchxc_check_backup_section", 215); + run_test(test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section, "test_sl_iec60730_vmc_bist_fail_check_integrity_ram_section", 225); + run_test(test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section, "test_sl_iec60730_vmc_bist_fail_check_integrity_backup_section", 235); + run_test(test_sl_iec60730_vmc_bist_checking_allow_run_test, "test_sl_iec60730_vmc_bist_checking_allow_run_test", 245); + run_test(test_sl_iec60730_vmc_bist_fail_stack_test_over_flow, "test_sl_iec60730_vmc_bist_fail_stack_test_over_flow", 254); + UnityEnd(); + #ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + + while (1) { + // Do nothing + } +} diff --git a/test/unit_test/src/unit_test_iec60730_watchdog.c b/test/unit_test/src/unit_test_iec60730_watchdog.c new file mode 100644 index 00000000..2aa447bd --- /dev/null +++ b/test/unit_test/src/unit_test_iec60730_watchdog.c @@ -0,0 +1,267 @@ +/***************************************************************************//** + * @file unit_test_iec60730_watchdog.c + * @brief Unit tests for functions in watchdog module. + ******************************************************************************* + * # License + * Copyright 2024 Silicon Laboratories Inc. www.silabs.com + ******************************************************************************* + * + * The licensor of this software is Silicon Laboratories Inc. Your use of this + * software is governed by the terms of Silicon Labs Master Software License + * Agreement (MSLA) available at + * www.silabs.com/about-us/legal/master-software-license-agreement. This + * software is distributed to you in Source Code format and is governed by the + * sections of the MSLA applicable to Source Code. + * + ******************************************************************************/ + +#include "unit_test_common.h" +#include "unit_test_iec60730_watchdog.h" + +/*=======Mock Code=====*/ +extern volatile sl_iec60730_test_watchdog_t iec60730_watchdog_state; +sl_iec60730_test_result_t unit_test_result = SL_IEC60730_TEST_FAILED; +bool iec60730_watchdog_mock_rst_por = false; +bool iec60730_watchdog_mock_rst_em4 = false; +bool iec60730_watchdog_mock_set_watchdog_timout_min = false; +bool iec60730_watchdog_mock_rstcause_flag_valid = false; +uint32_t iec60730_watchdog_mock_rstcause = 0; + +#if (SL_IEC60730_WDOG0_ENABLE == 1) +bool iec60730_watchdog_mock_rst_wdog0 = false; +#endif // (SL_IEC60730_WDOG0_ENABLE == 1) + +#if (SL_IEC60730_WDOG1_ENABLE == 1) +bool iec60730_watchdog_mock_rst_wdog1 = false; +#endif // (SL_IEC60730_WDOG1_ENABLE == 1) + +void unit_test_iec60730_watchdog_set_up(void) +{ + unit_test_result = SL_IEC60730_TEST_FAILED; + iec60730_watchdog_state = SL_IEC60730_WATCHDOG_INVALID; + iec60730_watchdog_mock_rst_por = false; + iec60730_watchdog_mock_set_watchdog_timout_min = false; + iec60730_watchdog_mock_rstcause_flag_valid = false; +#if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog0 = false; +#endif // (SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog1 = false; +#endif // (SL_IEC60730_WDOG1_ENABLE == 1) + sl_iec60730_watchdog_count_reset(); +} + +bool unit_test_iec60730_watchdog_mock_rst_por(void) +{ + return iec60730_watchdog_mock_rst_por; +} + +bool unit_test_iec60730_watchdog_mock_rst_em4(void) +{ + return iec60730_watchdog_mock_rst_em4; +} + +#if (SL_IEC60730_WDOG0_ENABLE == 1) +bool unit_test_iec60730_watchdog_mock_rst_wdog0(void) +{ + return iec60730_watchdog_mock_rst_wdog0; +} +#endif // (SL_IEC60730_WDOG0_ENABLE == 1) + +#if (SL_IEC60730_WDOG1_ENABLE == 1) +bool unit_test_iec60730_watchdog_mock_rst_wdog1(void) +{ + return iec60730_watchdog_mock_rst_wdog1; +} +#endif // (SL_IEC60730_WDOG1_ENABLE == 1) + +bool unit_test_iec60730_watchdog_mock_set_watchdog_timout_min(void) +{ + return iec60730_watchdog_mock_set_watchdog_timout_min; +} + +#ifdef SL_IEC60730_RSTCAUSES_CLEAR_ENABLE +void unit_test_iec60730_watchdog_mock_rstcause_clear(void) +{ + iec60730_watchdog_mock_rst_por = false; + iec60730_watchdog_mock_rst_em4 = false; + iec60730_watchdog_mock_rstcause = 0; +#if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog0 = false; +#endif // (SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog1 = false; +#endif // (SL_IEC60730_WDOG1_ENABLE == 1) +} +#endif // SL_IEC60730_RSTCAUSES_CLEAR_ENABLE + +uint32_t unit_test_iec60730_watchdog_mock_rstcause(void) +{ + if (iec60730_watchdog_mock_rstcause_flag_valid) { +#if (_SILICON_LABS_32B_SERIES < 2) +#if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rstcause = RMU_RSTCAUSE_WDOGRST; +#endif //(SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rstcause = RMU_RSTCAUSE_WDOGRST; +#endif //(SL_IEC60730_WDOG1_ENABLE == 1) +#else +#if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rstcause = EMU_RSTCAUSE_WDOG0; +#endif //(SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rstcause = EMU_RSTCAUSE_WDOG0; +#endif //(SL_IEC60730_WDOG1_ENABLE == 1) +#endif // (_SILICON_LABS_32B_SERIES < 2) + } else { +#if (_SILICON_LABS_32B_SERIES < 2) +#if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rstcause = RMU_RSTCAUSE_SYSREQRST; +#endif //(SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rstcause = RMU_RSTCAUSE_SYSREQRST; +#endif //(SL_IEC60730_WDOG1_ENABLE == 1) +#else +#if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rstcause = EMU_RSTCAUSE_SYSREQ; +#endif //(SL_IEC60730_WDOG0_ENABLE == 1) +#if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rstcause = EMU_RSTCAUSE_SYSREQ; +#endif //(SL_IEC60730_WDOG1_ENABLE == 1) +#endif // (_SILICON_LABS_32B_SERIES < 2) + } + + return iec60730_watchdog_mock_rstcause; +} + +/*=======Test Case=====*/ + +void test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog(void) +{ + /*Setup*/ + unit_test_iec60730_watchdog_set_up(); + /*Execute test*/ + unit_test_result = sl_iec60730_watchdog_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_PASSED, unit_test_result); +} + +void test_sl_iec60730_watchdog_post_wachdog_reset_before_por(void) +{ + /*Setup*/ + unit_test_iec60730_watchdog_set_up(); + #if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog0 = true; + #endif // (SL_IEC60730_WDOG0_ENABLE == 1) + #if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog1 = true; + #endif // (SL_IEC60730_WDOG1_ENABLE == 1) + /*Execute test*/ + unit_test_result = sl_iec60730_watchdog_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, unit_test_result); +} + +void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success(void) +{ + /*Setup*/ + unit_test_iec60730_watchdog_set_up(); + iec60730_watchdog_mock_rst_por = true; + iec60730_watchdog_mock_set_watchdog_timout_min = true; + iec60730_watchdog_mock_rstcause_flag_valid = true; + /*Execute test*/ + unit_test_result = sl_iec60730_watchdog_post(); + if (unit_test_iec60730_watchdog_mock_set_watchdog_timout_min()) { + #if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog0 = true; + unit_test_result = sl_iec60730_watchdog_post(); + #endif // (SL_IEC60730_WDOG0_ENABLE == 1) + #if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog1 = true; + unit_test_result = sl_iec60730_watchdog_post(); + #endif // (SL_IEC60730_WDOG1_ENABLE == 1) + } + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_PASSED, unit_test_result); +} + +void test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail(void) +{ + /*Setup*/ + unit_test_iec60730_watchdog_set_up(); + iec60730_watchdog_mock_rst_por = true; + /*Execute test*/ + unit_test_result = sl_iec60730_watchdog_post(); + if (!unit_test_iec60730_watchdog_mock_set_watchdog_timout_min()) { + #if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog0 = false; + unit_test_result = sl_iec60730_watchdog_post(); + #endif // (SL_IEC60730_WDOG0_ENABLE == 1) + #if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog1 = false; + unit_test_result = sl_iec60730_watchdog_post(); + #endif // (SL_IEC60730_WDOG1_ENABLE == 1) + } + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, unit_test_result); +} + +void test_sl_iec60730_watchdog_post_reset_resason_no_valid(void) +{ + /*Setup*/ + unit_test_iec60730_watchdog_set_up(); + iec60730_watchdog_mock_rst_por = true; + iec60730_watchdog_mock_set_watchdog_timout_min = true; + sl_iec60730_watchdog_post(); + /*Execute test*/ + unit_test_result = sl_iec60730_watchdog_post(); + if (unit_test_iec60730_watchdog_mock_set_watchdog_timout_min()) { + #if (SL_IEC60730_WDOG0_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog0 = true; + unit_test_result = sl_iec60730_watchdog_post(); + #endif // (SL_IEC60730_WDOG0_ENABLE == 1) + #if (SL_IEC60730_WDOG1_ENABLE == 1) + iec60730_watchdog_mock_rst_wdog1 = true; + unit_test_result = sl_iec60730_watchdog_post(); + #endif // (SL_IEC60730_WDOG1_ENABLE == 1) + } + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, unit_test_result); +} + +void test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value(void) +{ + /*Setup*/ + unit_test_iec60730_watchdog_set_up(); + iec60730_watchdog_mock_rst_por = true; + iec60730_watchdog_mock_set_watchdog_timout_min = true; + iec60730_watchdog_mock_rstcause_flag_valid = true; + sl_iec60730_watchdog_count_set(SL_IEC60730_WDOGINST_NUMB); + /*Execute test*/ + unit_test_result = sl_iec60730_watchdog_post(); + TEST_ASSERT_EQUAL(SL_IEC60730_TEST_FAILED, unit_test_result); +} + +/*=======Run Test Case=====*/ + +void unit_test_run_all_test_cases(void) +{ + // Initialize + memset((void *)test_case_result, 0xff, sizeof(test_case_result)); + current_test_numth = 0; + + // Start run test + printf("--- BEGIN UNIT TEST ---\n"); + UnityBegin("/unit_test/src/unit_test_iec60730_watchdog.c"); + run_test(test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog, "test_sl_iec60730_watchdog_post_reset_causes_not_por_and_watchdog", 132); + run_test(test_sl_iec60730_watchdog_post_wachdog_reset_before_por, "test_sl_iec60730_watchdog_post_wachdog_reset_before_por", 140); + run_test(test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success, "test_sl_iec60730_watchdog_post_set_watchdog_timout_min_success", 154); + run_test(test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail, "test_sl_iec60730_watchdog_post_set_watchdog_timout_min_fail", 175); + run_test(test_sl_iec60730_watchdog_post_reset_resason_no_valid, "test_sl_iec60730_watchdog_post_reset_resason_no_valid", 194); + run_test(test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value, "test_sl_iec60730_watchdog_post_prevent_unexpected_changed_value", 215); + UnityEnd(); + #ifndef IAR_TESTING /* GCC */ + __asm volatile("IEC60730_UNIT_TEST_END:"); +#else + __asm volatile("IEC60730_UNIT_TEST_END::"); +#endif + + while (1) { + // Do nothing + } +} diff --git a/tools/.clang-tidy b/tools/.clang-tidy new file mode 100644 index 00000000..a764bc0a --- /dev/null +++ b/tools/.clang-tidy @@ -0,0 +1,50 @@ +Checks: > + -*, + readability-identifier-naming, + readability-magic-numbers, + readability-braces-around-statements + +WarningsAsErrors: > + readability-identifier-naming, + readability-magic-numbers, + readability-braces-around-statements + +HeaderFilterRegex: '' +FormatStyle: none +InheritParentConfig: true +User: user +CheckOptions: + - key: readability-identifier-naming.VariableCase + value: lower_case + - key: readability-identifier-naming.GlobalConstantCase + value: UPPER_CASE + - key: readability-identifier-naming.GlobalConstantPrefix + value: SL_ + - key: readability-identifier-naming.ConstantCase + value: UPPER_CASE + - key: readability-identifier-naming.ConstantPrefix + value: SL_ + - key: readability-identifier-naming.EnumConstantCase + value: UPPER_CASE + - key: readability-identifier-naming.EnumConstantPrefix + value: SL_ + - key: readability-identifier-naming.EnumCase + value: lower_case + - key: readability-identifier-naming.EnumPrefix + value: sl_ + - key: readability-identifier-naming.FunctionIgnoredRegexp + value: 'sli_.*' + - key: readability-identifier-naming.FunctionCase + value: lower_case + - key: readability-identifier-naming.FunctionPrefix + value: 'sl_' + - key: readability-identifier-naming.StructCase + value: lower_case + - key: readability-identifier-naming.StructPrefix + value: 'sl_' + - key: readability-identifier-naming.StructMemberCase + value: lower_case + - key: readability-identifier-naming.TypedefCase + value: lower_case + - key: readability-identifier-naming.TypedefPrefix + value: 'sl_' diff --git a/tools/.codespell/.codespellrc b/tools/.codespell/.codespellrc new file mode 100644 index 00000000..55409600 --- /dev/null +++ b/tools/.codespell/.codespellrc @@ -0,0 +1,10 @@ +# See: https://github.com/codespell-project/codespell#using-a-config-file +[codespell] +# In the event of a false positive, add the problematic word, in all lowercase, to 'ignore-words.txt' (one word per line). +# Or copy & paste the whole problematic line to 'exclude-file.txt' +ignore-words = ./tools/.codespell/ignore-words.txt +exclude-file = ./tools/.codespell/exclude-file.txt +check-filenames = +check-hidden = +count = +skip = .git,*.a, diff --git a/tools/.codespell/exclude-file.txt b/tools/.codespell/exclude-file.txt new file mode 100644 index 00000000..e69de29b diff --git a/tools/.codespell/ignore-words.txt b/tools/.codespell/ignore-words.txt new file mode 100644 index 00000000..62fde747 --- /dev/null +++ b/tools/.codespell/ignore-words.txt @@ -0,0 +1,2 @@ +teh +foobar diff --git a/tools/uncrustify.cfg b/tools/uncrustify.cfg new file mode 100644 index 00000000..2b1548d1 --- /dev/null +++ b/tools/uncrustify.cfg @@ -0,0 +1,182 @@ +# uncrustify.cfg version 1.0.0 + +tok_split_gte=false +utf8_byte=false +utf8_force=true +indent_cmt_with_tabs=false +indent_align_string=true +indent_braces=false +indent_braces_no_func=false +indent_braces_no_class=false +indent_braces_no_struct=false +indent_brace_parent=false +indent_namespace=false +indent_extern=false +indent_class=true +indent_class_colon=false +indent_else_if=false +indent_var_def_cont=false +indent_func_call_param=false +indent_func_def_param=false +indent_func_proto_param=false +indent_func_class_param=false +indent_func_ctor_var_param=false +indent_template_param=false +indent_func_param_double=false +indent_relative_single_line_comments=false +indent_col1_comment=false +indent_access_spec_body=false +indent_paren_nl=false +indent_comma_paren=false +indent_bool_paren=false +indent_first_bool_expr=false +indent_square_nl=false +indent_preserve_sql=false +indent_align_assign=true +sp_balance_nested_parens=false +align_keep_tabs=false +align_with_tabs=false +align_on_tabstop=false +#align_number_left=false +align_func_params=false +align_same_func_call_params=false +align_var_def_colon=false +align_var_def_attribute=false +align_var_def_inline=false +align_right_cmt_mix=false +align_on_operator=false +align_mix_var_proto=false +align_single_line_func=false +align_single_line_brace=false +align_nl_cont=true +align_left_shift=true +align_oc_decl_colon=false +nl_collapse_empty_body=false +nl_assign_leave_one_liners=false +nl_class_leave_one_liners=false +nl_enum_leave_one_liners=false +nl_getset_leave_one_liners=false +nl_func_leave_one_liners=false +nl_if_leave_one_liners=false +nl_multi_line_cond=false +nl_multi_line_define=false +nl_before_case=false +nl_after_case=false +nl_after_return=false +nl_after_semicolon=false +nl_after_brace_open=false +nl_after_brace_open_cmt=false +nl_after_vbrace_open=false +nl_after_vbrace_open_empty=false +nl_after_brace_close=false +nl_after_vbrace_close=false +nl_define_macro=false +nl_squeeze_ifdef=false +nl_ds_struct_enum_cmt=false +nl_ds_struct_enum_close_brace=false +nl_create_if_one_liner=false +nl_create_for_one_liner=false +nl_create_while_one_liner=false +ls_for_split_full=false +ls_func_split_full=true +nl_after_multiline_comment=false +eat_blanks_after_open_brace=true +eat_blanks_before_close_brace=true +mod_full_brace_if_chain=false +mod_pawn_semicolon=false +mod_full_paren_if_bool=false +mod_remove_extra_semicolon=false +mod_sort_import=false +mod_sort_using=false +mod_sort_include=false +mod_move_case_break=false +mod_remove_empty_return=false +cmt_indent_multi=true +cmt_c_group=false +cmt_c_nl_start=false +cmt_c_nl_end=false +cmt_cpp_group=false +cmt_cpp_nl_start=false +cmt_cpp_nl_end=false +cmt_cpp_to_c=false +cmt_star_cont=false +cmt_multi_check_last=true +cmt_insert_before_preproc=false +pp_indent=ignore +pp_if_indent_code=false +input_tab_size=2 +indent_columns=2 +indent_label=0 +align_pp_define_span=0 +nl_start_of_file=remove +nl_end_of_file_min=1 +code_width=0 +nl_max=2 +nl_comment_func_def=1 +cmt_width=0 +utf8_bom=remove +indent_with_tabs=0 +sp_before_assign=add +sp_after_assign=add +sp_bool=add +sp_compare=add +sp_inside_paren=remove +sp_before_sparen=force +sp_paren_paren=ignore +sp_inside_sparen=ignore +sp_after_sparen=force +sp_before_square=remove +sp_before_squares=remove +sp_inside_square=remove +sp_after_comma=force +sp_before_comma=remove +sp_paren_comma=remove +sp_inside_braces=add +sp_inside_braces_empty=remove +sp_func_def_paren=remove +sp_inside_fparen=remove +sp_func_call_paren=remove +sp_func_call_paren_empty=remove +sp_else_brace=force +sp_brace_else=force +sp_sign=remove +sp_incdec=remove +sp_cmt_cpp_start=ignore +sp_endif_cmt=force +nl_end_of_file=add +nl_enum_brace=remove +nl_struct_brace=remove +nl_union_brace=remove +nl_for_brace=remove +nl_brace_finally=remove +nl_while_brace=remove +nl_do_brace=remove +nl_brace_while=remove +nl_switch_brace=remove +nl_if_brace=remove +nl_brace_else=remove +nl_elseif_brace=remove +nl_else_brace=remove +nl_fdef_brace=add +mod_full_brace_do=force +mod_full_brace_if=force +mod_full_brace_while=ignore +mod_full_brace_for=force +mod_full_brace_function=force +sp_cmt_cpp_doxygen=true +cmt_sp_after_star_cont=3 +align_keep_extra_space=True +align_var_def_star_style=1 +align_var_def_amp_style=1 +sp_after_type=ignore +pos_arith=lead +pos_bool=lead +pos_compare=lead +pos_conditional=lead +pos_comma=trail +sp_arith=add +sp_assign=add +sp_pp_concat=ignore +# Indent the 'case' label from the 'switch' header (coding standard §4.4.3) +# Note: Must come *after* the declaration of 'indent_columns'! +indent_switch_case=indent_columns
    +Generated by   +doxygen + 1.8.17 +