From 42a76463eaac9735673e0ef5be1990164e818d10 Mon Sep 17 00:00:00 2001 From: Akash Levy Date: Wed, 18 Dec 2024 13:04:00 -0800 Subject: [PATCH] Latchfix --- liberty/LibertyReader.cc | 11 +- test/latch_3port.lib | 695 +++++++++++++++++++++++++++++++++++++++ test/latch_3port.ok | 0 test/latch_3port.tcl | 1 + test/regression_vars.tcl | 1 + 5 files changed, 706 insertions(+), 2 deletions(-) create mode 100644 test/latch_3port.lib create mode 100644 test/latch_3port.ok create mode 100644 test/latch_3port.tcl diff --git a/liberty/LibertyReader.cc b/liberty/LibertyReader.cc index 418d9160..bb32032b 100644 --- a/liberty/LibertyReader.cc +++ b/liberty/LibertyReader.cc @@ -3974,8 +3974,15 @@ LibertyReader::seqPortNames(LibertyGroup *group, else if (i == 1) out_inv_name = value->stringValue(); else if (i == 2) { - size = static_cast(value->floatValue()); - has_size = true; + if (value->isFloat()) { + size = static_cast(value->floatValue()); + has_size = true; + } + else { + // Shift values + out_name = out_inv_name; + out_inv_name = value->stringValue(); + } } i++; } diff --git a/test/latch_3port.lib b/test/latch_3port.lib new file mode 100644 index 00000000..414b2c33 --- /dev/null +++ b/test/latch_3port.lib @@ -0,0 +1,695 @@ +/* +BSD 3-Clause License + +Copyright 2020 Lawrence T. Clark, Vinay Vashishtha, or Arizona State +University + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + +1. Redistributions of source code must retain the above copyright notice, +this list of conditions and the following disclaimer. + +2. Redistributions in binary form must reproduce the above copyright +notice, this list of conditions and the following disclaimer in the +documentation and/or other materials provided with the distribution. + +3. Neither the name of the copyright holder nor the names of its +contributors may be used to endorse or promote products derived from this +software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +POSSIBILITY OF SUCH DAMAGE. +*/ + +library (asap7sc7p5t_lvt_ff) { + /* Models written by Liberate 18.1.0.293 from Cadence Design Systems, Inc. on Wed Dec 2 15:24:06 MST 2020 */ + comment : ""; + date : "$Date: Wed Dec 2 11:09:27 2020 $"; + revision : "1.0"; + delay_model : table_lookup; + capacitive_load_unit (1,ff); + current_unit : "1mA"; + leakage_power_unit : "1pW"; + pulling_resistance_unit : "1kohm"; + time_unit : "1ps"; + voltage_unit : "1V"; + voltage_map (VDD, 0.77); + voltage_map (VSS, 0); + voltage_map (GND, 0); + default_cell_leakage_power : 0; + default_fanout_load : 1; + default_max_transition : 320; + default_output_pin_cap : 0; + in_place_swap_mode : match_footprint; + input_threshold_pct_fall : 50; + input_threshold_pct_rise : 50; + nom_process : 1; + nom_temperature : 0; + nom_voltage : 0.77; + output_threshold_pct_fall : 50; + output_threshold_pct_rise : 50; + slew_derate_from_library : 1; + slew_lower_threshold_pct_fall : 10; + slew_lower_threshold_pct_rise : 10; + slew_upper_threshold_pct_fall : 90; + slew_upper_threshold_pct_rise : 90; + operating_conditions (PVT_0P77V_0C) { + process : 1; + temperature : 0; + voltage : 0.77; + } + default_operating_conditions : PVT_0P77V_0C; + lu_table_template (constraint_template_7x7) { + variable_1 : constrained_pin_transition; + variable_2 : related_pin_transition; + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("5, 10, 20, 40, 80, 160, 320"); + } + lu_table_template (delay_template_7x7) { + variable_1 : input_net_transition; + variable_2 : total_output_net_capacitance; + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + } + lu_table_template (mpw_constraint_template_7x7) { + variable_1 : constrained_pin_transition; + index_1 ("5, 10, 20, 40, 80, 160, 320"); + } + power_lut_template (passive_power_template_7x1) { + variable_1 : input_transition_time; + index_1 ("5, 10, 20, 40, 80, 160, 320"); + } + power_lut_template (power_template_7x7) { + variable_1 : input_transition_time; + variable_2 : total_output_net_capacitance; + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + } + lu_table_template (waveform_template_name) { + variable_1 : input_net_transition; + variable_2 : normalized_voltage; + index_1 ("0, 1000, 2000, 3000, 4000, 5000, 6000"); + index_2 ("0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16"); + } + input_voltage (default_VDD_VSS_input) { + vil : 0; + vih : 0.77; + vimin : 0; + vimax : 0.77; + } + output_voltage (default_VDD_VSS_output) { + vol : 0; + voh : 0.77; + vomin : 0; + vomax : 0.77; + } + normalized_driver_waveform (waveform_template_name) { + driver_waveform_name : "PreDriver20.5:rise"; + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0, 0.03, 0.1, 0.158744, 0.221271, 0.279374, 0.333513, 0.3841, 0.437223, 0.533203, 0.58153, 0.626864, 0.717883, 0.806555, 0.9, 0.958983, 1"); + values ( \ + "0, 0.375, 0.625, 0.84375, 1.09375, 1.34375, 1.59375, 1.84375, 2.125, 2.6875, 3, 3.3125, 4, 4.75, 5.625, 6.21875, 6.65625", \ + "0, 0.75, 1.25, 1.6875, 2.1875, 2.6875, 3.1875, 3.6875, 4.25, 5.375, 6, 6.625, 8, 9.5, 11.25, 12.4375, 13.3125", \ + "0, 1.5, 2.5, 3.375, 4.375, 5.375, 6.375, 7.375, 8.5, 10.75, 12, 13.25, 16, 19, 22.5, 24.875, 26.625", \ + "0, 3, 5, 6.75, 8.75, 10.75, 12.75, 14.75, 17, 21.5, 24, 26.5, 32, 38, 45, 49.75, 53.25", \ + "0, 6, 10, 13.5, 17.5, 21.5, 25.5, 29.5, 34, 43, 48, 53, 64, 76, 90, 99.5, 106.5", \ + "0, 12, 20, 27, 35, 43, 51, 59, 68, 86, 96, 106, 128, 152, 180, 199, 213", \ + "0, 24, 40, 54, 70, 86, 102, 118, 136, 172, 192, 212, 256, 304, 360, 398, 426" \ + ); + } + normalized_driver_waveform (waveform_template_name) { + driver_waveform_name : "PreDriver20.5:fall"; + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0, 0.03, 0.1, 0.158744, 0.221271, 0.279374, 0.333513, 0.3841, 0.437223, 0.533203, 0.58153, 0.626864, 0.717883, 0.806555, 0.9, 0.958983, 1"); + values ( \ + "0, 0.375, 0.625, 0.84375, 1.09375, 1.34375, 1.59375, 1.84375, 2.125, 2.6875, 3, 3.3125, 4, 4.75, 5.625, 6.21875, 6.65625", \ + "0, 0.75, 1.25, 1.6875, 2.1875, 2.6875, 3.1875, 3.6875, 4.25, 5.375, 6, 6.625, 8, 9.5, 11.25, 12.4375, 13.3125", \ + "0, 1.5, 2.5, 3.375, 4.375, 5.375, 6.375, 7.375, 8.5, 10.75, 12, 13.25, 16, 19, 22.5, 24.875, 26.625", \ + "0, 3, 5, 6.75, 8.75, 10.75, 12.75, 14.75, 17, 21.5, 24, 26.5, 32, 38, 45, 49.75, 53.25", \ + "0, 6, 10, 13.5, 17.5, 21.5, 25.5, 29.5, 34, 43, 48, 53, 64, 76, 90, 99.5, 106.5", \ + "0, 12, 20, 27, 35, 43, 51, 59, 68, 86, 96, 106, 128, 152, 180, 199, 213", \ + "0, 24, 40, 54, 70, 86, 102, 118, 136, 172, 192, 212, 256, 304, 360, 398, 426" \ + ); + } + normalized_driver_waveform (waveform_template_name) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0, 0.03, 0.1, 0.158744, 0.221271, 0.279374, 0.333513, 0.3841, 0.437223, 0.533203, 0.58153, 0.626864, 0.717883, 0.806555, 0.9, 0.958983, 1"); + values ( \ + "0, 0.375, 0.625, 0.84375, 1.09375, 1.34375, 1.59375, 1.84375, 2.125, 2.6875, 3, 3.3125, 4, 4.75, 5.625, 6.21875, 6.65625", \ + "0, 0.75, 1.25, 1.6875, 2.1875, 2.6875, 3.1875, 3.6875, 4.25, 5.375, 6, 6.625, 8, 9.5, 11.25, 12.4375, 13.3125", \ + "0, 1.5, 2.5, 3.375, 4.375, 5.375, 6.375, 7.375, 8.5, 10.75, 12, 13.25, 16, 19, 22.5, 24.875, 26.625", \ + "0, 3, 5, 6.75, 8.75, 10.75, 12.75, 14.75, 17, 21.5, 24, 26.5, 32, 38, 45, 49.75, 53.25", \ + "0, 6, 10, 13.5, 17.5, 21.5, 25.5, 29.5, 34, 43, 48, 53, 64, 76, 90, 99.5, 106.5", \ + "0, 12, 20, 27, 35, 43, 51, 59, 68, 86, 96, 106, 128, 152, 180, 199, 213", \ + "0, 24, 40, 54, 70, 86, 102, 118, 136, 172, 192, 212, 256, 304, 360, 398, 426" \ + ); + } + cell (DHLx1_ASAP7_75t_L) { + area : 0.2187; + pg_pin (VDD) { + pg_type : primary_power; + voltage_name : "VDD"; + } + pg_pin (VSS) { + pg_type : primary_ground; + voltage_name : "VSS"; + } + leakage_power () { + value : 1031.33; + when : "(CLK * D * Q)"; + related_pg_pin : VDD; + } + leakage_power () { + value : 0; + when : "(CLK * D * Q)"; + related_pg_pin : VSS; + } + leakage_power () { + value : 1017.31; + when : "(CLK * !D * !Q)"; + related_pg_pin : VDD; + } + leakage_power () { + value : 0; + when : "(CLK * !D * !Q)"; + related_pg_pin : VSS; + } + leakage_power () { + value : 925.49; + when : "(!CLK * D * Q)"; + related_pg_pin : VDD; + } + leakage_power () { + value : 0; + when : "(!CLK * D * Q)"; + related_pg_pin : VSS; + } + leakage_power () { + value : 1096.56; + when : "(!CLK * D * !Q)"; + related_pg_pin : VDD; + } + leakage_power () { + value : 0; + when : "(!CLK * D * !Q)"; + related_pg_pin : VSS; + } + leakage_power () { + value : 1092.29; + when : "(!CLK * !D * Q)"; + related_pg_pin : VDD; + } + leakage_power () { + value : 0; + when : "(!CLK * !D * Q)"; + related_pg_pin : VSS; + } + leakage_power () { + value : 885.023; + when : "(!CLK * !D * !Q)"; + related_pg_pin : VDD; + } + leakage_power () { + value : 0; + when : "(!CLK * !D * !Q)"; + related_pg_pin : VSS; + } + leakage_power () { + value : 1008; + related_pg_pin : VDD; + } + leakage_power () { + value : 0; + related_pg_pin : VSS; + } + pin (Q) { + direction : output; + function : "IQ"; + power_down_function : "(!VDD) + (VSS)"; + related_ground_pin : VSS; + related_power_pin : VDD; + max_capacitance : 46.08; + output_voltage : default_VDD_VSS_output; + timing () { + related_pin : "CLK"; + timing_sense : non_unate; + timing_type : rising_edge; + cell_rise (delay_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "21.1614, 23.2981, 27.0988, 34.0405, 47.3581, 73.7725, 126.523", \ + "22.3511, 24.4872, 28.2888, 35.2281, 48.5477, 74.9598, 127.712", \ + "23.9037, 26.0392, 29.8406, 36.7801, 50.0973, 76.5092, 129.257", \ + "25.9511, 28.082, 31.883, 38.8236, 52.1375, 78.5463, 131.299", \ + "28.4362, 30.5682, 34.3672, 41.3168, 54.6827, 81.0632, 133.774", \ + "31.0428, 33.1711, 36.963, 43.8923, 57.1961, 83.6099, 136.463", \ + "32.686, 34.8008, 38.5938, 45.5238, 58.8681, 85.2399, 138.087" \ + ); + } + rise_transition (delay_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "7.79414, 11.5368, 18.8099, 33.4824, 63.3579, 123.731, 245.205", \ + "7.79154, 11.5361, 18.8108, 33.4875, 63.3577, 123.732, 245.205", \ + "7.78371, 11.5305, 18.8064, 33.4819, 63.3573, 123.727, 245.203", \ + "7.81739, 11.5513, 18.7957, 33.484, 63.3557, 123.744, 245.209", \ + "7.76026, 11.5284, 18.7893, 33.788, 63.4404, 123.764, 245.206", \ + "7.7172, 11.4809, 18.7629, 33.5017, 63.3555, 124.925, 245.291", \ + "7.6747, 11.4316, 18.7229, 33.4319, 63.5063, 124.325, 246.41" \ + ); + } + cell_fall (delay_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "19.2917, 21.4734, 25.1301, 31.5476, 43.4978, 66.9883, 113.878", \ + "20.405, 22.5842, 26.2424, 32.6594, 44.6112, 68.1023, 114.985", \ + "22.0696, 24.2459, 27.9059, 34.327, 46.2791, 69.7709, 116.661", \ + "24.1533, 26.3402, 30.0076, 36.4381, 48.3961, 71.8967, 118.791", \ + "26.8017, 28.997, 32.689, 39.1409, 51.1122, 74.6251, 121.512", \ + "29.6897, 31.918, 35.6586, 42.146, 54.139, 77.6484, 124.538", \ + "31.6237, 33.9307, 37.7467, 44.3197, 56.3913, 79.8808, 126.8" \ + ); + } + fall_transition (delay_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "7.5992, 10.738, 16.7849, 28.8078, 53.3304, 103.254, 204.112", \ + "7.60649, 10.7381, 16.7879, 28.8078, 53.3308, 103.252, 204.114", \ + "7.65929, 10.788, 16.8235, 28.8253, 53.3388, 103.263, 204.113", \ + "7.75423, 10.8792, 16.8944, 28.8873, 53.383, 103.276, 204.122", \ + "7.97139, 11.0657, 17.0653, 29.0032, 53.6124, 103.329, 204.137", \ + "8.4066, 11.5057, 17.4152, 29.2575, 53.6898, 103.694, 204.176", \ + "9.2738, 12.3052, 18.1273, 29.9595, 54.0074, 103.843, 205.394" \ + ); + } + } + timing () { + related_pin : "D"; + timing_sense : positive_unate; + timing_type : combinational; + cell_rise (delay_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "13.0805, 15.2373, 19.0634, 26.0004, 39.3102, 65.7145, 118.459", \ + "13.6094, 15.7536, 19.5646, 26.4962, 39.8027, 66.2071, 118.937", \ + "14.47, 16.6406, 20.4889, 27.4374, 40.747, 67.1471, 119.893", \ + "15.6199, 17.8513, 21.7354, 28.7155, 42.0934, 68.5213, 121.256", \ + "17.1638, 19.462, 23.4316, 30.4716, 43.8797, 70.4827, 123.182", \ + "18.6062, 21.0546, 25.2719, 32.6, 46.1541, 72.7053, 125.573", \ + "18.7828, 21.5173, 26.1115, 33.8529, 47.9358, 75.0976, 128.217" \ + ); + } + rise_transition (delay_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "7.83278, 11.5576, 18.8116, 33.4858, 63.3484, 123.722, 245.184", \ + "7.87592, 11.5929, 18.8433, 33.5, 63.3568, 123.732, 245.199", \ + "8.12202, 11.8139, 19.0161, 33.6163, 63.4113, 123.747, 245.187", \ + "8.47385, 12.165, 19.3565, 33.946, 63.59, 123.853, 245.244", \ + "9.33921, 13.0301, 20.0752, 34.5193, 64.3371, 124.172, 245.422", \ + "10.9973, 14.7228, 21.7216, 35.9278, 65.1203, 125.053, 245.796", \ + "13.7433, 17.5871, 24.6877, 38.8749, 67.8104, 127.878, 249.248" \ + ); + } + cell_fall (delay_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "14.4902, 16.6726, 20.3596, 26.753, 38.6907, 62.1895, 109.08", \ + "15.2678, 17.4289, 21.1145, 27.5065, 39.4421, 62.942, 109.835", \ + "16.771, 18.9591, 22.6487, 29.0671, 40.9947, 64.4924, 111.382", \ + "19.3014, 21.5359, 25.3291, 31.801, 43.7872, 67.288, 114.178", \ + "23.7807, 26.1218, 30.0544, 36.6397, 48.6928, 72.2703, 119.191", \ + "31.2324, 33.8095, 38.0345, 44.9265, 57.1922, 80.8379, 127.784", \ + "43.4742, 46.3871, 51.1215, 58.6543, 71.5239, 95.7484, 142.984" \ + ); + } + fall_transition (delay_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "7.6312, 10.7998, 16.8166, 28.8144, 53.316, 103.224, 204.097", \ + "7.64623, 10.8132, 16.8296, 28.8256, 53.3201, 103.225, 204.099", \ + "7.91922, 11.05, 17.0303, 28.9311, 53.3711, 103.24, 204.101", \ + "8.39805, 11.5495, 17.5097, 29.352, 53.6431, 103.388, 204.146", \ + "9.35239, 12.4863, 18.3299, 30.2475, 54.1693, 103.618, 204.311", \ + "11.1644, 14.3558, 20.1693, 31.5851, 55.4, 104.531, 204.621", \ + "14.2488, 17.5918, 23.4309, 34.7782, 58.5932, 106.96, 208.593" \ + ); + } + } + internal_power () { + related_pin : "CLK"; + related_pg_pin : VDD; + rise_power (power_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "0.578788, 0.57942, 0.581732, 0.584543, 0.588114, 0.590559, 0.592046", \ + "0.57882, 0.579166, 0.581755, 0.584608, 0.58796, 0.59042, 0.591955", \ + "0.586975, 0.587723, 0.589885, 0.592977, 0.596353, 0.598771, 0.600331", \ + "0.615104, 0.615243, 0.617064, 0.620391, 0.623449, 0.625478, 0.626966", \ + "0.683734, 0.685593, 0.686595, 0.69796, 0.697604, 0.697512, 0.696506", \ + "0.836576, 0.837734, 0.839903, 0.847748, 0.856263, 0.890643, 0.856754", \ + "1.16065, 1.16126, 1.16401, 1.16979, 1.17857, 1.19042, 1.21555" \ + ); + } + fall_power (power_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "0.639863, 0.639925, 0.641473, 0.643613, 0.644662, 0.645462, 0.645554", \ + "0.63914, 0.638897, 0.640432, 0.6424, 0.64365, 0.644319, 0.64462", \ + "0.64715, 0.646396, 0.647927, 0.649884, 0.651195, 0.651958, 0.652203", \ + "0.673937, 0.672444, 0.673547, 0.67558, 0.677106, 0.677968, 0.678376", \ + "0.745676, 0.743536, 0.743869, 0.745129, 0.746644, 0.747919, 0.748522", \ + "0.912701, 0.907547, 0.905917, 0.906592, 0.90789, 0.908756, 0.909274", \ + "1.2764, 1.26755, 1.26309, 1.26148, 1.26171, 1.26187, 1.26293" \ + ); + } + } + internal_power () { + related_pin : "CLK"; + related_pg_pin : VSS; + rise_power (power_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "0.751901, 0.752522, 0.754812, 0.757538, 0.761059, 0.763475, 0.765012", \ + "0.752102, 0.752432, 0.755073, 0.757919, 0.761216, 0.763706, 0.765239", \ + "0.759948, 0.76073, 0.76289, 0.765942, 0.769233, 0.771638, 0.773213", \ + "0.787275, 0.787465, 0.789673, 0.793189, 0.796495, 0.798533, 0.800108", \ + "0.85727, 0.858365, 0.859292, 0.863811, 0.866123, 0.867989, 0.869071", \ + "1.00985, 1.01181, 1.01431, 1.01715, 1.01924, 1.02162, 1.02262", \ + "1.33379, 1.3346, 1.33736, 1.3399, 1.34252, 1.34456, 1.34679" \ + ); + } + fall_power (power_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "0.780412, 0.780417, 0.781942, 0.784013, 0.785067, 0.785785, 0.785952", \ + "0.779691, 0.779472, 0.781023, 0.783, 0.784266, 0.784911, 0.785204", \ + "0.786502, 0.785637, 0.787094, 0.788993, 0.790287, 0.791025, 0.791228", \ + "0.813647, 0.811719, 0.812081, 0.814379, 0.815751, 0.816546, 0.816902", \ + "0.885505, 0.883031, 0.883766, 0.885544, 0.894934, 0.888152, 0.88737", \ + "1.0527, 1.04748, 1.04583, 1.04751, 1.05386, 1.05646, 1.05261", \ + "1.41702, 1.40814, 1.40479, 1.40924, 1.40901, 1.42282, 1.43401" \ + ); + } + } + internal_power () { + related_pin : "D"; + related_pg_pin : VDD; + rise_power (power_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "0.340604, 0.342144, 0.345282, 0.349072, 0.351857, 0.353603, 0.3545", \ + "0.33928, 0.339758, 0.342172, 0.345222, 0.347782, 0.349387, 0.35028", \ + "0.347422, 0.34526, 0.347506, 0.350398, 0.352578, 0.353949, 0.355076", \ + "0.37198, 0.371453, 0.372159, 0.376085, 0.374868, 0.377249, 0.377875", \ + "0.455181, 0.452029, 0.449999, 0.446395, 0.466058, 0.456956, 0.45484", \ + "0.663305, 0.652269, 0.641248, 0.636488, 0.634141, 0.637032, 0.63845", \ + "1.11351, 1.09258, 1.07466, 1.06295, 1.04961, 1.07328, 1.09299" \ + ); + } + fall_power (power_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "0.512588, 0.511827, 0.513046, 0.514539, 0.516051, 0.516882, 0.517322", \ + "0.511356, 0.510022, 0.510964, 0.512737, 0.514143, 0.514909, 0.515587", \ + "0.519653, 0.517543, 0.518142, 0.518794, 0.520526, 0.521599, 0.52233", \ + "0.55558, 0.550232, 0.548113, 0.54897, 0.550118, 0.551448, 0.551978", \ + "0.650955, 0.642207, 0.637436, 0.63479, 0.63452, 0.636494, 0.63755", \ + "0.875889, 0.861922, 0.849879, 0.841621, 0.837306, 0.835961, 0.835724", \ + "1.34508, 1.32013, 1.29802, 1.28001, 1.26814, 1.26115, 1.25828" \ + ); + } + } + internal_power () { + related_pin : "D"; + related_pg_pin : VSS; + rise_power (power_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "0.535823, 0.537345, 0.540452, 0.544199, 0.546907, 0.548704, 0.549491", \ + "0.535989, 0.537126, 0.540088, 0.543488, 0.546201, 0.54791, 0.548866", \ + "0.541746, 0.541136, 0.54326, 0.547444, 0.549643, 0.551945, 0.552443", \ + "0.567238, 0.565072, 0.565115, 0.568158, 0.570997, 0.573725, 0.57516", \ + "0.651683, 0.647209, 0.642535, 0.641334, 0.643201, 0.644801, 0.646903", \ + "0.85895, 0.848177, 0.836791, 0.830028, 0.827457, 0.827283, 0.828263", \ + "1.30852, 1.28748, 1.26868, 1.25579, 1.2412, 1.23464, 1.23044" \ + ); + } + fall_power (power_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("0.72, 1.44, 2.88, 5.76, 11.52, 23.04, 46.08"); + values ( \ + "0.317699, 0.31696, 0.31823, 0.319788, 0.321364, 0.322222, 0.322691", \ + "0.316541, 0.315002, 0.31584, 0.317611, 0.318989, 0.319777, 0.320545", \ + "0.326067, 0.32281, 0.321602, 0.32475, 0.324398, 0.324543, 0.324946", \ + "0.36164, 0.355317, 0.353927, 0.354813, 0.354849, 0.354666, 0.354358", \ + "0.457044, 0.447502, 0.443701, 0.446478, 0.445304, 0.440467, 0.440408", \ + "0.680425, 0.667646, 0.654159, 0.645821, 0.652126, 0.646507, 0.643844", \ + "1.15082, 1.12762, 1.10333, 1.08712, 1.08636, 1.08704, 1.13991" \ + ); + } + } + } + pin (CLK) { + driver_waveform_fall : "PreDriver20.5:fall"; + driver_waveform_rise : "PreDriver20.5:rise"; + clock : true; + direction : input; + input_signal_level : VDD; + related_ground_pin : VSS; + related_power_pin : VDD; + max_transition : 320; + capacitance : 0.536816; + rise_capacitance : 0.536816; + rise_capacitance_range (0.44002, 0.536816); + fall_capacitance : 0.536716; + fall_capacitance_range (0.4323, 0.536716); + input_voltage : default_VDD_VSS_input; + timing () { + related_pin : "CLK"; + sdf_cond : "D"; + timing_type : min_pulse_width; + when : "D"; + rise_constraint (mpw_constraint_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "13.4277, 13.4277, 20.752, 40.2832, 80.5664, 161.133, 321.045" \ + ); + } + } + timing () { + related_pin : "CLK"; + sdf_cond : "~D"; + timing_type : min_pulse_width; + when : "!D"; + rise_constraint (mpw_constraint_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "13.4277, 15.8691, 20.752, 40.2832, 80.5664, 161.133, 321.045" \ + ); + } + } + internal_power () { + when : "(D * Q)"; + related_pg_pin : VDD; + rise_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.225261, 0.225169, 0.233039, 0.257545, 0.32299, 0.472231, 0.791592" \ + ); + } + fall_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.387303, 0.38607, 0.395977, 0.427343, 0.499634, 0.66167, 1.00104" \ + ); + } + } + internal_power () { + when : "(D * Q)"; + related_pg_pin : VSS; + rise_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.39248, 0.392277, 0.399956, 0.423881, 0.489922, 0.639662, 0.958902" \ + ); + } + fall_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.219796, 0.219348, 0.229369, 0.26039, 0.332204, 0.494297, 0.834116" \ + ); + } + } + internal_power () { + when : "(!D * !Q)"; + related_pg_pin : VDD; + rise_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.242325, 0.241434, 0.249807, 0.274778, 0.3412, 0.492285, 0.814514" \ + ); + } + fall_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.373311, 0.372586, 0.381887, 0.412922, 0.485723, 0.647358, 0.98763" \ + ); + } + } + internal_power () { + when : "(!D * !Q)"; + related_pg_pin : VSS; + rise_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.402001, 0.401299, 0.408964, 0.434029, 0.500575, 0.651956, 0.974197" \ + ); + } + fall_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.213136, 0.212637, 0.222604, 0.253057, 0.326356, 0.487469, 0.827705" \ + ); + } + } + } + pin (D) { + driver_waveform_fall : "PreDriver20.5:fall"; + driver_waveform_rise : "PreDriver20.5:rise"; + direction : input; + input_signal_level : VDD; + related_ground_pin : VSS; + related_power_pin : VDD; + max_transition : 320; + capacitance : 0.654168; + rise_capacitance : 0.654168; + rise_capacitance_range (0.527218, 0.654168); + fall_capacitance : 0.650172; + fall_capacitance_range (0.529507, 0.650172); + input_voltage : default_VDD_VSS_input; + timing () { + related_pin : "CLK"; + timing_type : hold_falling; + rise_constraint (constraint_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "1.94092, 7.12938, 9.44704, 10.8789, 17.5566, 24.9045, 35.1453", \ + "1.62363, 2.81459, 5.13226, 9.5106, 17.2393, 24.5873, 34.828", \ + "1.01565, 2.20661, 4.52427, 8.90261, 16.6313, 23.9793, 34.22", \ + "0.937499, 1.09696, 3.41463, 8.90625, 15.5217, 22.8696, 34.2285", \ + "-0.186769, 1.00419, 3.32186, 7.70019, 15.4289, 22.7769, 37.0151", \ + "-0.372317, 0.81864, 3.13631, 7.51465, 15.2433, 22.5913, 36.8295", \ + "3.25409, 4.44504, 6.76271, 8.26171, 14.8722, 26.2177, 40.4559" \ + ); + } + fall_constraint (constraint_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "-0.653379, -0.148157, 0.835406, -0.231933, 1.98663, 6.84453, 13.6765", \ + "-1.02394, -0.51872, 0.464843, -1.67305, 1.61607, 6.47397, 13.3059", \ + "-1.76089, -1.25567, -0.272104, -2.41, 0.879123, 5.73702, 12.569", \ + "-6.16455, -2.71286, -1.72929, -2.73438, -0.578065, 4.27984, 8.24219", \ + "-10.0631, -9.5579, -8.57434, -6.71473, -3.42561, 1.43229, 8.26422", \ + "-15.4909, -14.9857, -14.0021, -12.1425, -8.85337, -3.99547, -1.16104", \ + "-25.2771, -20.7744, -23.7883, -20.8106, -18.6396, -17.7792, -10.9473" \ + ); + } + } + timing () { + related_pin : "CLK"; + timing_type : setup_falling; + rise_constraint (constraint_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "2.06055, 0.576188, -2.30622, -6.67481, -9.18917, -18.5849, -31.2723", \ + "2.39349, 0.909133, -1.97328, -3.39539, -8.85623, -18.2519, -30.9393", \ + "3.03493, 1.55057, -1.33185, -2.75395, -8.21479, -17.6105, -30.2979", \ + "5.25147, 2.73561, -0.1468, -4.45312, -7.02975, -16.4254, -31.9922", \ + "6.19877, 4.71441, 1.832, 0.409896, -9.04844, -14.4466, -31.1316", \ + "9.45841, 7.97405, 5.09163, -0.327972, -5.78881, -15.1845, -27.8719", \ + "7.11548, 5.63113, 2.74871, -1.55273, -4.13423, -13.5299, -30.2148" \ + ); + } + fall_constraint (constraint_template_7x7) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + index_2 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "10.4623, 9.99238, 9.09082, 4.51416, 7.20987, 6.74739, 9.81994", \ + "11.1994, 10.7294, 9.82784, 8.17813, 7.94689, 7.48441, 10.557", \ + "12.6442, 12.1743, 11.2727, 9.62298, 5.39424, 8.92927, 8.00432", \ + "12.4707, 10.9497, 10.0482, 9.53125, 8.1672, 7.70473, 7.97948", \ + "16.4986, 16.0286, 15.127, 13.4773, 13.2461, 8.78612, 7.86117", \ + "24.7883, 24.3183, 23.4167, 21.767, 17.5383, 17.0758, 12.1534", \ + "37.8928, 37.4228, 36.5212, 31.9922, 30.6428, 26.1828, 25.2579" \ + ); + } + } + internal_power () { + when : "!CLK"; + related_pg_pin : VDD; + rise_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "-0.0567798, -0.0577731, -0.0586042, -0.0591243, -0.0593412, -0.0596455, -0.0599353" \ + ); + } + fall_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.0642583, 0.064148, 0.0643755, 0.0640553, 0.0644328, 0.0638341, 0.0633937" \ + ); + } + } + internal_power () { + when : "!CLK"; + related_pg_pin : VSS; + rise_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "0.103555, 0.102645, 0.102255, 0.101774, 0.100733, 0.0999289, 0.0993267" \ + ); + } + fall_power (passive_power_template_7x1) { + index_1 ("5, 10, 20, 40, 80, 160, 320"); + values ( \ + "-0.0949566, -0.0949741, -0.0955851, -0.0960081, -0.0970478, -0.0965245, -0.0960774" \ + ); + } + } + } + latch ("D",IQ,IQN) { + data_in : "D"; + enable : "CLK"; + power_down_function : "(!VDD) + (VSS)"; + } + } +} \ No newline at end of file diff --git a/test/latch_3port.ok b/test/latch_3port.ok new file mode 100644 index 00000000..e69de29b diff --git a/test/latch_3port.tcl b/test/latch_3port.tcl new file mode 100644 index 00000000..13a22608 --- /dev/null +++ b/test/latch_3port.tcl @@ -0,0 +1 @@ +read_liberty latch_3port.lib diff --git a/test/regression_vars.tcl b/test/regression_vars.tcl index ef0d4c84..3025d1a9 100644 --- a/test/regression_vars.tcl +++ b/test/regression_vars.tcl @@ -136,6 +136,7 @@ record_sta_tests { get_lib_pins_of_objects report_checks_src_attr write_timing_model_scalar + latch_3port } define_test_group fast [group_tests all]