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tt06.json
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{
"version": 3,
"id": "tt06",
"name": "Tiny Tapeout 6",
"repo": "https://github.com/TinyTapeout/tinytapeout-06",
"commit": "e6f171679987f632a94a54b74747fd9039e0047a",
"updated": "2024-12-24T14:49:40Z",
"projects": [
{
"macro": "tt_um_3515_sequenceDetector",
"address": 610,
"title": "Sequence detector using 7-segment",
"author": "Atharv Sharma & Lipika Gupta",
"description": "Detects sequence '1001' and displays '8.' on 7-segment led display, otherwise displays '-' only",
"clock_hz": 1,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/atharv-004/tt06-sequence-counter",
"commit": "648ff51e78ae0229fa6bb982f12603cb680041dc",
"pinout": {
"ui[0]": "x",
"ui[1]": "condition[0]",
"ui[2]": "condition[1]",
"ui[3]": "condition[2]",
"ui[4]": "condition[3]",
"ui[5]": "condition[4]",
"ui[6]": "condition[5]",
"ui[7]": "condition[6]",
"uo[0]": "seg[0]",
"uo[1]": "seg[1]",
"uo[2]": "seg[2]",
"uo[3]": "seg[3]",
"uo[4]": "seg[4]",
"uo[5]": "seg[5]",
"uo[6]": "seg[6]",
"uo[7]": "seg[7]",
"uio[0]": "seg_test[0]",
"uio[1]": "seg_test[1]",
"uio[2]": "seg_test[2]",
"uio[3]": "seg_test[3]",
"uio[4]": "seg_test[4]",
"uio[5]": "seg_test[5]",
"uio[6]": "seg_test[6]",
"uio[7]": "seg_test[7]"
}
},
{
"macro": "tt_um_4bit_cpu_with_fsm",
"address": 47,
"title": "4-Bit CPU mit FSM",
"author": "Jacqueline Gislai",
"description": "Mini CPU, that can do simple calculations and logic operations as well as storing and loading values and execute shifting operations",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/jacquygis/jku-tt06-MiniCPU",
"commit": "f3db638f1a38b5bdcc06c1757d550b40f76bb27b",
"pinout": {
"ui[0]": "storage address Bit 0",
"ui[1]": "storage address Bit 1",
"ui[2]": "storage address Bit 2",
"ui[3]": "storage address Bit 3",
"ui[4]": "value of input data Bit 0",
"ui[5]": "value of input data Bit 1",
"ui[6]": "value of input data Bit 2",
"ui[7]": "value of input data Bit 3",
"uo[0]": "output data Bit 0",
"uo[1]": "output data Bit 1",
"uo[2]": "output data Bit 2",
"uo[3]": "output data Bit 3",
"uo[4]": "output data Bit 4",
"uo[5]": "output data Bit 5",
"uo[6]": "output data Bit 6",
"uo[7]": "output data Bit 7",
"uio[0]": "input write-access in storage",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "input Operation Code Bit 0",
"uio[5]": "input Operation Code Bit 1",
"uio[6]": "input Operation Code Bit 2",
"uio[7]": "input Operation Code Bit 3"
}
},
{
"macro": "tt_um_7seg_animated",
"address": 164,
"title": "Animated 7-segment character display",
"author": "Aron Dennen",
"description": "Displays 7-segment characters with animation",
"clock_hz": 12500000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/adennen/tt06-arond-project",
"commit": "61634a0851094493b6f77a0b4e780abdecf41292",
"pinout": {
"ui[0]": "input0",
"ui[1]": "input1",
"ui[2]": "input2",
"ui[3]": "input3",
"ui[4]": "input4",
"ui[5]": "input5",
"ui[6]": "input6",
"ui[7]": "enable display",
"uo[0]": "seg0",
"uo[1]": "seg1",
"uo[2]": "seg2",
"uo[3]": "seg3",
"uo[4]": "seg4",
"uo[5]": "seg5",
"uo[6]": "seg6",
"uo[7]": "seg7",
"uio[0]": "pwm_bit1",
"uio[1]": "pwm_bit2",
"uio[2]": "pwm_bit3",
"uio[3]": "pwm_bit4",
"uio[4]": "pwm_bit5",
"uio[5]": "pwm_bit6",
"uio[6]": "pwm_bit7",
"uio[7]": "usePwm"
}
},
{
"macro": "tt_um_8bitALU",
"address": 679,
"title": "8bit ALU",
"author": "David Parent,Chih-Kaun Ho, Edric Ong",
"description": "Building a simple 8-bit unsigned Arithmetic logic unit (ALU)",
"clock_hz": 1000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/EdricOngKhaiJieh/8bitALU_verilog",
"commit": "f9bcfd7d3cb6da2972d1678d9ec5e9402ae9eecb",
"pinout": {
"ui[0]": "ui_in",
"ui[1]": "",
"ui[2]": "",
"ui[3]": "",
"ui[4]": "",
"ui[5]": "",
"ui[6]": "",
"ui[7]": "",
"uo[0]": "uo_out",
"uo[1]": "",
"uo[2]": "",
"uo[3]": "",
"uo[4]": "",
"uo[5]": "",
"uo[6]": "",
"uo[7]": "",
"uio[0]": "",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_8bit_cpu",
"address": 169,
"title": "8-Bit CPU In a Week",
"author": "Ramyad Hadidi",
"description": "8-bit Single-Cycle CPU",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/ramyadhadidi/tt06-8bit-cpu",
"commit": "885b5b338e37e554a2cdce4324f3a225b923d3c0",
"pinout": {
"ui[0]": "Register 1 (R1) Address bit 0",
"ui[1]": "Register 1 (R1) Address bit 1",
"ui[2]": "Register 1 (R1) Address bit 2",
"ui[3]": "Register 1 (R1) Address bit 3",
"ui[4]": "Instruction ISA Opcode bit 0",
"ui[5]": "Instruction ISA Opcode bit 1",
"ui[6]": "Instruction ISA Opcode bit 2",
"ui[7]": "Instruction ISA Opcode bit 3",
"uo[0]": "Data out bit 0 (either register data / Processor stat)",
"uo[1]": "Data out bit 1 (either register data / 0)",
"uo[2]": "Data out bit 2 (either register data / 0)",
"uo[3]": "Data out bit 3 (either register data / 0)",
"uo[4]": "Data out bit 4 (either register data / 0)",
"uo[5]": "Data out bit 5 (either register data / 0)",
"uo[6]": "Data out bit 6 (either register data / 0)",
"uo[7]": "Data out bit 7 (either register data / 0)",
"uio[0]": "Data in bit 0 / Register 3 (R3) Address bit 0",
"uio[1]": "Data in bit 1 / Register 3 (R3) Address bit 1",
"uio[2]": "Data in bit 2 / Register 3 (R3) Address bit 2",
"uio[3]": "Data in bit 3 / Register 3 (R3) Address bit 3",
"uio[4]": "Data in bit 4 / Register 2 (R2) Address bit 0",
"uio[5]": "Data in bit 5 / Register 2 (R2) Address bit 1",
"uio[6]": "Data in bit 6 / Register 2 (R2) Address bit 2",
"uio[7]": "Data in bit 7 / Register 2 (R2) Address bit 3"
}
},
{
"macro": "tt_um_ADPCM_COMPRESSOR",
"address": 136,
"title": "ADPCM Encoder Audio Compressor",
"author": "Charlie Hess, Emil Ivanov",
"description": "Accepts a microphone PDM input and returns an ADPCM encoded/compressed ouput",
"clock_hz": 0,
"tiles": "2x2",
"analog_pins": [],
"repo": "https://github.com/hesscharlie/tt06-ADPCM-Compressor",
"commit": "0d6f738b1b678284285b3109dd56587bb0ebbfda",
"pinout": {
"ui[0]": "clk",
"ui[1]": "slow_clk",
"ui[2]": "block_enable",
"ui[3]": "pdm_in",
"ui[4]": "",
"ui[5]": "",
"ui[6]": "",
"ui[7]": "",
"uo[0]": "outValid",
"uo[1]": "",
"uo[2]": "",
"uo[3]": "",
"uo[4]": "encPcm[0]",
"uo[5]": "encPcm[1]",
"uo[6]": "encPcm[2]",
"uo[7]": "encPcm[3]",
"uio[0]": "",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_ALU",
"address": 547,
"title": "3-bit ALU",
"author": "Jos\u00e9 Ra\u00f1a G\u00e1mez",
"description": "This device is a 3-bit ALU that generates 5 operations in parallel. The operations that the ALU performs are: addition, subtraction, multiplication, division and modulo operation. The device has 2 inputs; A[3-bit] and B[3-bit] along with a 3-bit selector (Selector[3-bit]). It also has a single 6-bit output (OutPut[6-bit]). In the end, the design entails 15 pins in total; 9 input and 6 output pins. The operation of this ALU is simple: At input A and B, the values \u200b\u200bare set using switches, for example, A= 111 and B=101. To obtain the 5 different results through the different 5 operations that the ALU performs, the 3-bit selector (Selector[3-bits]) is used, therefore, using 3 switches we will place the result that we want to observe at the output.",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/JoseKaisen/ALU_3bits",
"commit": "aef5319d47e2f6644e4df935d932ae1136e0cc20",
"pinout": {
"ui[0]": "First bit for input 'A'(input of 3-bits)",
"ui[1]": "Second bit for input 'A'(input of 3-bits)",
"ui[2]": "Third bit for input 'A'(input of 3-bits)",
"ui[3]": "First bit for input 'B'(input of 3-bits)",
"ui[4]": "Second bit for input 'B'(input of 3-bits)",
"ui[5]": "Third bit for input 'B'(input of 3-bits)",
"ui[6]": "Unused input bit",
"ui[7]": "Unused input bit",
"uo[0]": "First bit for output 'Leds'(output of 6-bits)",
"uo[1]": "Second bit for output 'Leds'(output of 6-bits)",
"uo[2]": "Third bit for output 'Leds'(output of 6-bits)",
"uo[3]": "Fourth bit for output 'Leds'(output of 6-bits)",
"uo[4]": "Fifth bit for output 'Leds'(output of 6-bits)",
"uo[5]": "Sixth bit for output 'Leds'(output of 6-bits)",
"uo[6]": "Unused output bit",
"uo[7]": "Unused output bit",
"uio[0]": "First bit for input 'ctrl'(input of 3-bits)",
"uio[1]": "Second bit for input 'ctrl'(input of 3-bits)",
"uio[2]": "Third bit for input 'ctrl'(input of 3-bits)",
"uio[3]": "Unused bidirectional I/O bit",
"uio[4]": "Unused bidirectional I/O bit",
"uio[5]": "Unused bidirectional I/O bit",
"uio[6]": "Unused bidirectional I/O bit",
"uio[7]": "Unused bidirectional I/O bit"
}
},
{
"macro": "tt_um_ALU_DECODERS",
"address": 680,
"title": "ALU with a Gray and Octal decoders",
"author": "Luis Antonio Quezada Santos, Santiago Robledo Acosta, Jos\u00e9 Miguel Rocha P\u00e9rez",
"description": "This is a simple 3 bit ALU with 4 operations: Substraction, Addition, XOR and AND which its output is conected to an Octal and Gray Decoders.",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/luisquezada93/-tt06-ALU-Decoders-Luis",
"commit": "c38b4b759d4850d8f1b0eb04eee6b5446128615c",
"pinout": {
"ui[0]": "Sel_A_in [0]",
"ui[1]": "Sel_A_in [1]",
"ui[2]": "Num_B_in [0]",
"ui[3]": "Num_B_in [1]",
"ui[4]": "Num_B_in [2]",
"ui[5]": "Num_A_in [0]",
"ui[6]": "Num_A_in [1]",
"ui[7]": "Num_A_in [2]",
"uo[0]": "Disp_out[6]",
"uo[1]": "Disp_out[7]",
"uo[2]": "Disp_out[8]",
"uo[3]": "Disp_out[9]",
"uo[4]": "Disp_out[10]",
"uo[5]": "Disp_out[11]",
"uo[6]": "Disp_out[12]",
"uo[7]": "Disp_out[13]",
"uio[0]": "",
"uio[1]": "Disp_out[0]",
"uio[2]": "Disp_out[1]",
"uio[3]": "Disp_out[2]",
"uio[4]": "Disp_out[3]",
"uio[5]": "Disp_out[4]",
"uio[6]": "Disp_out[5]",
"uio[7]": "Sel_M_in"
}
},
{
"macro": "tt_um_BoothMulti_hhrb98",
"address": 736,
"title": "UACJ-MIE-Booth 4",
"author": "UACJ Group A",
"description": "Booth 4 multiplier",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/HHRB98/UACJ-MIE-booth4",
"commit": "3bcd282f0393ee190bb0816c095b64208e07edb8",
"pinout": {
"ui[0]": "X[0]",
"ui[1]": "X[1]",
"ui[2]": "X[2]",
"ui[3]": "X[3]",
"ui[4]": "",
"ui[5]": "",
"ui[6]": "",
"ui[7]": "",
"uo[0]": "Z[0]",
"uo[1]": "Z[1]",
"uo[2]": "Z[2]",
"uo[3]": "Z[3]",
"uo[4]": "Z[4]",
"uo[5]": "Z[5]",
"uo[6]": "Z[6]",
"uo[7]": "Z[7]",
"uio[0]": "Y[0]",
"uio[1]": "Y[1]",
"uio[2]": "Y[2]",
"uio[3]": "Y[3]",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_CDMA_Santiago",
"address": 611,
"title": "CDMA_2024",
"author": "Santiago Robledo Acosta, J\u00f3se Miguel Rocha P\u00e9rez",
"description": "This is a CDMA circuit for lab testing in order to see the properties of Gold Codes in an Osciloscope",
"clock_hz": 1000000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/Santiago-Robledo/tt06-CDMA-2024",
"commit": "b2b684ab80bc665b7727627697380ec67fb67a1c",
"pinout": {
"ui[0]": "signal_i",
"ui[1]": "seed_i[0]",
"ui[2]": "seed_i[1]",
"ui[3]": "seed_i[2]",
"ui[4]": "seed_i[3]",
"ui[5]": "seed_i[4]",
"ui[6]": "seed_i[5]",
"ui[7]": "load_i",
"uo[0]": "",
"uo[1]": "",
"uo[2]": "",
"uo[3]": "",
"uo[4]": "",
"uo[5]": "",
"uo[6]": "",
"uo[7]": "",
"uio[0]": "cdma_o",
"uio[1]": "gold_o",
"uio[2]": "receptor_o",
"uio[3]": "led_o",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_CKPope_top",
"address": 416,
"title": "X/Y Controller",
"author": "Charles Pope",
"description": "Two-Axis position Controller (4 bits of range per axis)",
"clock_hz": 50000000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/CKPope/tt06-verilog-template",
"commit": "c93539faf09c864f1e4ed1ac31a8b16fcb5d7b73",
"pinout": {
"ui[0]": "y_target0",
"ui[1]": "y_target1",
"ui[2]": "y_target2",
"ui[3]": "y_target3",
"ui[4]": "x_target0",
"ui[5]": "x_target1",
"ui[6]": "x_target2",
"ui[7]": "x_target3",
"uo[0]": "y_pos0",
"uo[1]": "y_pos1",
"uo[2]": "y_pos2",
"uo[3]": "y_pos3",
"uo[4]": "x_pos0",
"uo[5]": "x_pos1",
"uo[6]": "x_pos2",
"uo[7]": "x_pos3",
"uio[0]": "motion_inp",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_CodHex7seg",
"address": 619,
"title": "Decodificador binario a display 7 segmentos hexadecimal",
"author": "Victor Manuel Cante Saloma",
"description": "Muestra un n\u00famero binario de 4 bits en un diplay de 7 segmentos (\u00e1nodo com\u00fan) en hexadecimal",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/vicmcantes/decodificador-binario-a-7-segmentos-hexadecimal",
"commit": "64611ec92d3583bea9dfec71bc99bc6fdc0eb196",
"pinout": {
"ui[0]": "Bit 0",
"ui[1]": "Bit 1",
"ui[2]": "Bit 2",
"ui[3]": "Bit 3",
"ui[4]": "no use",
"ui[5]": "no use",
"ui[6]": "no use",
"ui[7]": "no use",
"uo[0]": "Segmento g",
"uo[1]": "Segmento f",
"uo[2]": "Segmento e",
"uo[3]": "Segmento d",
"uo[4]": "Segmento c",
"uo[5]": "Segmento b",
"uo[6]": "Segmento a",
"uo[7]": "no use",
"uio[0]": "no use",
"uio[1]": "no use",
"uio[2]": "no use",
"uio[3]": "no use",
"uio[4]": "no use",
"uio[5]": "no use",
"uio[6]": "no use",
"uio[7]": "no use"
}
},
{
"macro": "tt_um_Counter_1_shivam",
"address": 548,
"title": "8-bit Binary Counter",
"author": "Aryan kannaujiya, Shivam Bhardwaj and Ambika Prasad Shah",
"description": " This Verilog module defines a synchronous 8-bit counter, where the count increments on each rising edge of the clock input (clk). Additionally, it features an asynchronous reset input (rst_n), which,0 when activated, sets the counter output (out) to zero regardless of the clock signal.",
"clock_hz": 50000000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/aryan-kannaujiya/tt06-verilog-template",
"commit": "37c022dd46623c403b3b856480e505754e5bc4d2",
"pinout": {
"ui[0]": "clk",
"ui[1]": "rst_n",
"ui[2]": "ui_in[2]",
"ui[3]": "ui_in[3]",
"ui[4]": "ui_in[4]",
"ui[5]": "",
"ui[6]": "",
"ui[7]": "",
"uo[0]": "out",
"uo[1]": "hex",
"uo[2]": "dec",
"uo[3]": "",
"uo[4]": "",
"uo[5]": "",
"uo[6]": "",
"uo[7]": "",
"uio[0]": "",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_DigitalClockTop",
"address": 555,
"title": "TDM Digital Clock",
"author": "Hassan & Huzaifa tariq",
"description": "a digital clock that uses time division multiplexing, using 8 outputs to drive six seen segmetns displas",
"clock_hz": 50000000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/HUZAIFA-TARIQ/GIKI-TapeOut-2",
"commit": "cdf32ed9e79148d984ef89d0fa0bbafb439eb805",
"pinout": {
"ui[0]": "ui_in[0]",
"ui[1]": "ui_in[1]",
"ui[2]": "ui_in[2]",
"ui[3]": "ui_in[3]",
"ui[4]": "ui_in[4]",
"ui[5]": "ui_in[5]",
"ui[6]": "ui_in[6]",
"ui[7]": "ui_in[7]",
"uo[0]": "uo_out[0]",
"uo[1]": "uo_out[1]",
"uo[2]": "uo_out[2]",
"uo[3]": "uo_out[3]",
"uo[4]": "uo_out[4]",
"uo[5]": "uo_out[5]",
"uo[6]": "uo_out[6]",
"uo[7]": "uo_out[7]",
"uio[0]": "uio_out[0]",
"uio[1]": "uio_out[1]",
"uio[2]": "uio_out[2]",
"uio[3]": "uio_out[3]",
"uio[4]": "uio_out[4]",
"uio[5]": "uio_out[5]",
"uio[6]": "uio_in[6]",
"uio[7]": "uio_in[7]"
}
},
{
"macro": "tt_um_FanCTRL_DomnikBrandstetter",
"address": 969,
"title": "PI-Based Fan Controller",
"author": "Dominik Brandstetter",
"description": "Temperature Based Fan Speed Controller",
"clock_hz": 1000000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/DomnikBrandstetter/jku-tt06-PID_FanCTRL",
"commit": "7b47de56ddd43f927b377330f080a43381f62bc4",
"pinout": {
"ui[0]": "ADC_BIT_0",
"ui[1]": "ADC_BIT_1",
"ui[2]": "ADC_BIT_2",
"ui[3]": "ADC_BIT_3",
"ui[4]": "SET_BIT_0",
"ui[5]": "SET_BIT_1",
"ui[6]": "SET_BIT_2",
"ui[7]": "SET_BIT_3",
"uo[0]": "segment_a",
"uo[1]": "segment_b",
"uo[2]": "segment_c",
"uo[3]": "segment_d",
"uo[4]": "segment_e",
"uo[5]": "segment_f",
"uo[6]": "segment_g",
"uo[7]": "PWM Output",
"uio[0]": "Controller_SET_BIT_0",
"uio[1]": "Controller_SET_BIT_1",
"uio[2]": "Controller_SET_BIT_2",
"uio[3]": "Controller_SET_BIT_3",
"uio[4]": "Controller_SIGN_BIT_4",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_I2C_to_SPI",
"address": 685,
"title": "TinyTapeout SPI Master",
"author": "Samit & Fahim",
"description": "SPI Msster ",
"clock_hz": 400000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/ReinstatedSamit/tt_um_I2C_to_SPI",
"commit": "bbb595f4dae6e6f939e843ea13636fa2a7192956",
"pinout": {
"ui[0]": "i2c_data_in",
"ui[1]": "i2c_clk_in",
"ui[2]": "miso_i",
"ui[3]": "",
"ui[4]": "",
"ui[5]": "i2c_wb_err_i",
"ui[6]": "i2c_wb_rty_i",
"ui[7]": "",
"uo[0]": "sck_o",
"uo[1]": "mosi_o",
"uo[2]": "i2c_data_out",
"uo[3]": "i2c_clk_out",
"uo[4]": "i2c_data_oe",
"uo[5]": "i2c_clk_oe",
"uo[6]": "",
"uo[7]": "",
"uio[0]": "",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_JamesTimothyMeech_inverter",
"address": 235,
"title": "Programmable Thing",
"author": "James Meech",
"description": "One inverter and a programmable resistor with one terminal connected to ground",
"clock_hz": 0,
"tiles": "1x2",
"analog_pins": [
5,
0,
4,
1,
3,
2
],
"repo": "https://github.com/JamesTimothyMeech/tt06-programmable-thing",
"commit": "0f6eaea4cc37f3142418e4cbd9a57fdda0808455",
"pinout": {
"ui[0]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"ui[1]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"ui[2]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"ui[3]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"ui[4]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"ui[5]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"ui[6]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"ui[7]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"uo[0]": "Not used, grounded internally",
"uo[1]": "Not used, grounded internally",
"uo[2]": "Not used, grounded internally",
"uo[3]": "Not used, grounded internally",
"uo[4]": "Not used, grounded internally",
"uo[5]": "Not used, grounded internally",
"uo[6]": "Not used, grounded internally",
"uo[7]": "Not used, grounded internally",
"uio[0]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"uio[1]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"uio[2]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"uio[3]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"uio[4]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"uio[5]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"uio[6]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"uio[7]": "Control pin to connect one of the 16 resistors between ua[0] and ground using an analog switch",
"ua[0]": "Internal programmable resistor connected to this pin",
"ua[1]": "Analog pin not used",
"ua[2]": "Analog pin not used",
"ua[3]": "Analog pin not used",
"ua[4]": "Analog inverter output",
"ua[5]": "Analog inverter input"
}
},
{
"macro": "tt_um_LFSR_shivam",
"address": 228,
"title": "10-bit Linear feedback shift register",
"author": "Shivam Bhardwaj, Sachin Sharma, Pankaj Lodhi and Ambika Prasad Shah",
"description": "This Verilog module implements a 10-bit Linear Feedback Shift Register (LFSR) for generating pseudo-random sequences with clock and reset inputs.",
"clock_hz": 50000000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/beaprog/tt06-LFSR",
"commit": "6bffe5f606707446700dc5dc43db8fa4d6a74394",
"pinout": {
"ui[0]": "clk",
"ui[1]": "rst",
"ui[2]": "",
"ui[3]": "",
"ui[4]": "",
"ui[5]": "",
"ui[6]": "",
"ui[7]": "",
"uo[0]": "out",
"uo[1]": "",
"uo[2]": "",
"uo[3]": "",
"uo[4]": "",
"uo[5]": "",
"uo[6]": "",
"uo[7]": "",
"uio[0]": "",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_MATTHIAS_M_PAL_TOP_WRAPPER",
"address": 236,
"title": "easy PAL",
"author": "Matthias Musch",
"description": "This is a simple PAL device with shift-register based (re)configuration",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/matztron/tt06-PAL",
"commit": "f0a64eb707d595e4dfc36c524a60de3403d0d7da",
"pinout": {
"ui[0]": "Combinatorial input 0",
"ui[1]": "Combinatorial input 1",
"ui[2]": "Combinatorial input 2",
"ui[3]": "Combinatorial input 3",
"ui[4]": "Combinatorial input 4",
"ui[5]": "Combinatorial input 5",
"ui[6]": "Combinatorial input 6",
"ui[7]": "Combinatorial input 7",
"uo[0]": "Combinatorial output 0",
"uo[1]": "Combinatorial output 1",
"uo[2]": "Combinatorial output 2",
"uo[3]": "Combinatorial output 3",
"uo[4]": "Combinatorial output 3",
"uo[5]": "unused - tied to 0",
"uo[6]": "unused - tied to 0",
"uo[7]": "unused - tied to 0",
"uio[0]": "Config pin: This pin is used to apply the config bit that will be shifted in on a rising clock edge.",
"uio[1]": "Enable pin: If HIGH (1) the result of the logic function is applied to all outputs.",
"uio[2]": "Clock pin: Used for the shift register to sample in the [config pin] data (see uio[0]).",
"uio[3]": "unused",
"uio[4]": "unused",
"uio[5]": "unused",
"uio[6]": "unused",
"uio[7]": "unused"
}
},
{
"macro": "tt_um_MNSLab_BLDC",
"address": 582,
"title": "Universal Motor and Actuator Controller",
"author": "Assoc. Prof. Din\u00e7er G\u00f6kcen, Ethem Bu\u011fra Arslan, Batu Cem \u00d6zyurt",
"description": "bldc motor controller and autotuner for controller by MNS lab",
"clock_hz": 50000000,
"tiles": "4x2",
"analog_pins": [],
"repo": "https://github.com/BatuCem/tt06-mnslab-bldc-0",
"commit": "0d6ce2c0a5b0b1780600dd711800506df73fdf3e",
"pinout": {
"ui[0]": "encoder_a",
"ui[1]": "encoder_b",
"ui[2]": "",
"ui[3]": "",
"ui[4]": "",
"ui[5]": "",
"ui[6]": "",
"ui[7]": "scl",
"uo[0]": "motor_positive",
"uo[1]": "motor_negative",
"uo[2]": "",
"uo[3]": "",
"uo[4]": "",
"uo[5]": "",
"uo[6]": "",
"uo[7]": "",
"uio[0]": "sda",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_MichaelBell_latch_mem",
"address": 620,
"title": "Latch RAM (64 bytes)",
"author": "Mike Bell",
"description": "64 byte RAM built out of latches",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/MichaelBell/tt06-memory",
"commit": "9ba7c7d578af66f720422faec75cd3a53f291473",
"pinout": {
"ui[0]": "addr[0]",
"ui[1]": "addr[1]",
"ui[2]": "addr[2]",
"ui[3]": "addr[3]",
"ui[4]": "addr[4]",
"ui[5]": "addr[5]",
"ui[6]": "",
"ui[7]": "wr_en",
"uo[0]": "data_out[0]",
"uo[1]": "data_out[1]",
"uo[2]": "data_out[2]",
"uo[3]": "data_out[3]",
"uo[4]": "data_out[4]",
"uo[5]": "data_out[5]",
"uo[6]": "data_out[6]",
"uo[7]": "data_out[7]",
"uio[0]": "data_in[0]",
"uio[1]": "data_in[1]",
"uio[2]": "data_in[2]",
"uio[3]": "data_in[3]",
"uio[4]": "data_in[4]",
"uio[5]": "data_in[5]",
"uio[6]": "data_in[6]",
"uio[7]": "data_in[7]"
},
"danger_level": "medium",
"danger_reason": "There is a potential internal driver conflict after project selection until the first clock."
},
{
"macro": "tt_um_MichaelBell_tinyQV",
"address": 227,
"title": "TinyQV Risc-V SoC",
"author": "Michael Bell",
"description": "A Risc-V SoC for Tiny Tapeout",
"clock_hz": 64000000,
"tiles": "2x2",
"analog_pins": [],
"repo": "https://github.com/MichaelBell/tt06-tinyQV",
"commit": "0d835e1b6d6b50d286636be224f873f3d8d38220",
"pinout": {
"ui[0]": "Interrupt 0",
"ui[1]": "Interrupt 1",
"ui[2]": "SPI MISO",
"ui[3]": "GP in3",
"ui[4]": "GP in4",
"ui[5]": "GP in5",
"ui[6]": "GP in6",
"ui[7]": "UART RX",
"uo[0]": "UART TX",
"uo[1]": "UART RTS",
"uo[2]": "SPI DC",
"uo[3]": "SPI MOSI",
"uo[4]": "SPI CS",
"uo[5]": "SPI SCK",
"uo[6]": "Debug UART TX",
"uo[7]": "Debug signal",
"uio[0]": "Flash CS",
"uio[1]": "SD0",
"uio[2]": "SD1",
"uio[3]": "SCK",
"uio[4]": "SD2",
"uio[5]": "SD3",
"uio[6]": "RAM A CS",
"uio[7]": "RAM B CS"
}
},
{
"macro": "tt_um_PWM",
"address": 623,
"title": "PWM",
"author": "NoeReyes",
"description": "This project involves Pulse Width Modulation, enabling the duty cycle to be adjusted between 10% and 90% using switches.",
"clock_hz": 50000000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/Noe-Reyes/PWM",
"commit": "a019723e883c810ba2bd27dd6776eeefe4427ce9",
"pinout": {
"ui[0]": "load 0",
"ui[1]": "load 1",
"ui[2]": "load 2",
"ui[3]": "",
"ui[4]": "",
"ui[5]": "",
"ui[6]": "",
"ui[7]": "",
"uo[0]": "",
"uo[1]": "",
"uo[2]": "",
"uo[3]": "",
"uo[4]": "",
"uo[5]": "",
"uo[6]": "",
"uo[7]": "PWM",
"uio[0]": "",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_PWM_Controller",
"address": 677,
"title": "PWM Controller",
"author": "Ziyi Zhao, Yuchen Ma",
"description": " A Low-Cost Pulse Width Modulation (PWM) Controller",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/Yuchen1203/tt06-PWM-Controller",
"commit": "ef53d50f282b8eaf019ed4e0460e72bfcf8a58f3",
"pinout": {
"ui[0]": "increase_duty",
"ui[1]": "decrease_duty",
"ui[2]": "",
"ui[3]": "",
"ui[4]": "",
"ui[5]": "",
"ui[6]": "",
"ui[7]": "",
"uo[0]": "",
"uo[1]": "",
"uo[2]": "",
"uo[3]": "",
"uo[4]": "",
"uo[5]": "",
"uo[6]": "",
"uo[7]": "",
"uio[0]": "PWM_OUT",
"uio[1]": "",
"uio[2]": "",
"uio[3]": "",
"uio[4]": "",
"uio[5]": "",
"uio[6]": "",
"uio[7]": ""
}
},
{
"macro": "tt_um_PWM_Sine_UART",
"address": 741,
"title": "PWM_Sinewave_UART",
"author": "Luis Gerardo Avila",
"description": "This project is a PWM signal generator that creates a sine wave, with frequency variation between 100 Hz and 700 Hz with steps of 100 in 100 Hz, which is manipulated through a UART interface",
"clock_hz": 25000000,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/JerryAvila06/PWM_Sinewave",
"commit": "742058e4706912992813d3a16d64aa516a10038d",
"pinout": {
"ui[0]": "uart_rx",
"ui[1]": "no use",
"ui[2]": "no use",
"ui[3]": "no use",
"ui[4]": "sw_11",
"ui[5]": "sw_01",
"ui[6]": "rst1",
"ui[7]": "no use",
"uo[0]": "uart_tx",
"uo[1]": "no use",
"uo[2]": "pwm_outx",
"uo[3]": "no use",
"uo[4]": "no use",
"uo[5]": "no use",
"uo[6]": "no use",
"uo[7]": "no use",
"uio[0]": "no use",
"uio[1]": "no use",
"uio[2]": "no use",
"uio[3]": "no use",
"uio[4]": "no use",
"uio[5]": "no use",
"uio[6]": "no use",
"uio[7]": "no use"
}
},
{
"macro": "tt_um_QIF_8bit",
"address": 234,
"title": "8 Bit Digital QIF",
"author": "David Parent",
"description": "The circuit will spike when the input is positive. It will reset when the signal exceeds a predetermined value",
"clock_hz": 0,
"tiles": "1x1",
"analog_pins": [],
"repo": "https://github.com/davidparent/tt_um_tt6_verilog_davidparent",
"commit": "eff2594172b32b92132bb055c77b180a601208a4",
"pinout": {
"ui[0]": "B0",
"ui[1]": "B1",
"ui[2]": "B2",
"ui[3]": "B3",
"ui[4]": "B4",
"ui[5]": "B5",
"ui[6]": "B6",
"ui[7]": "B7",
"uo[0]": "AS0",
"uo[1]": "S1",
"uo[2]": "S2",
"uo[3]": "S3",
"uo[4]": "S4",
"uo[5]": "S5",
"uo[6]": "S6",