From 519023fb2b644e1455da3b0d9da29c222c3470c6 Mon Sep 17 00:00:00 2001 From: Udit Subramanya Date: Mon, 21 Oct 2024 15:39:10 -0400 Subject: [PATCH] add citation for MICRO 21 paper --- README.md | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/README.md b/README.md index ed4c89d88..97686c641 100644 --- a/README.md +++ b/README.md @@ -5,6 +5,27 @@ Vortex is a full-stack open-source RISC-V GPGPU. Vortex supports multiple *backe ## Website Vortex news can be found on its [website](https://vortex.cc.gatech.edu/) +## Citation +``` +@inproceedings{10.1145/3466752.3480128, + author = {Tine, Blaise and Yalamarthy, Krishna Praveen and Elsabbagh, Fares and Hyesoon, Kim}, + title = {Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics}, + year = {2021}, + isbn = {9781450385572}, + publisher = {Association for Computing Machinery}, + address = {New York, NY, USA}, + url = {https://doi.org/10.1145/3466752.3480128}, + doi = {10.1145/3466752.3480128}, + abstract = {The importance of open-source hardware and software has been increasing. However, despite GPUs being one of the more popular accelerators across various applications, there is very little open-source GPU infrastructure in the public domain. We argue that one of the reasons for the lack of open-source infrastructure for GPUs is rooted in the complexity of their ISA and software stacks. In this work, we first propose an ISA extension to RISC-V that supports GPGPUs and graphics. The main goal of the ISA extension proposal is to minimize the ISA changes so that the corresponding changes to the open-source ecosystem are also minimal, which makes for a sustainable development ecosystem. To demonstrate the feasibility of the minimally extended RISC-V ISA, we implemented the complete software and hardware stacks of Vortex on FPGA. Vortex is a PCIe-based soft GPU that supports OpenCL and OpenGL. Vortex can be used in a variety of applications, including machine learning, graph analytics, and graphics rendering. Vortex can scale up to 32 cores on an Altera Stratix 10 FPGA, delivering a peak performance of 25.6 GFlops at 200 Mhz.}, + booktitle = {MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture}, + pages = {754–766}, + numpages = {13}, + keywords = {reconfigurable computing, memory systems., computer graphics}, + location = {Virtual Event, Greece}, + series = {MICRO '21} +} +``` + ## Specifications - Support RISC-V RV32IMAF and RV64IMAFD