diff --git a/src/aro/target.zig b/src/aro/target.zig index beb6d994..81ba4881 100644 --- a/src/aro/target.zig +++ b/src/aro/target.zig @@ -17,8 +17,6 @@ pub fn intMaxType(target: std.Target) Type { .riscv64, .powerpc64, .powerpc64le, - .tce, - .tcele, .ve, => return .{ .specifier = .long }, @@ -37,11 +35,7 @@ pub fn intMaxType(target: std.Target) Type { /// intptr_t for this target pub fn intPtrType(target: std.Target) Type { - switch (target.os.tag) { - .haiku => return .{ .specifier = .long }, - .nacl => return .{ .specifier = .int }, - else => {}, - } + if (target.os.tag == .haiku) return .{ .specifier = .long }; switch (target.cpu.arch) { .aarch64, .aarch64_be => switch (target.os.tag) { @@ -55,8 +49,6 @@ pub fn intPtrType(target: std.Target) Type { .riscv32, .xcore, .hexagon, - .tce, - .tcele, .m68k, .spir, .spirv32, @@ -162,7 +154,7 @@ pub fn isTlsSupported(target: std.Target) bool { return supported; } return switch (target.cpu.arch) { - .tce, .tcele, .bpfel, .bpfeb, .msp430, .nvptx, .nvptx64, .x86, .arm, .armeb, .thumb, .thumbeb => false, + .bpfel, .bpfeb, .msp430, .nvptx, .nvptx64, .x86, .arm, .armeb, .thumb, .thumbeb => false, else => true, }; } @@ -475,30 +467,22 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target { .csky, .hexagon, .m68k, - .le32, .mips, .mipsel, .powerpc, .powerpcle, - .r600, .riscv32, .sparc, .sparcel, - .tce, - .tcele, .thumb, .thumbeb, .x86, .xcore, .nvptx, - .amdil, - .hsail, .spir, .kalimba, - .shave, .lanai, .wasm32, - .renderscript32, .aarch64_32, .spirv, .spirv32, @@ -509,14 +493,10 @@ pub fn get32BitArchVariant(target: std.Target) ?std.Target { .aarch64 => copy.cpu.arch = .arm, .aarch64_be => copy.cpu.arch = .armeb, - .le64 => copy.cpu.arch = .le32, - .amdil64 => copy.cpu.arch = .amdil, .nvptx64 => copy.cpu.arch = .nvptx, .wasm64 => copy.cpu.arch = .wasm32, - .hsail64 => copy.cpu.arch = .hsail, .spir64 => copy.cpu.arch = .spir, .spirv64 => copy.cpu.arch = .spirv32, - .renderscript64 => copy.cpu.arch = .renderscript32, .loongarch64 => copy.cpu.arch = .loongarch32, .mips64 => copy.cpu.arch = .mips, .mips64el => copy.cpu.arch = .mipsel, @@ -541,12 +521,8 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target { .lanai, .m68k, .msp430, - .r600, - .shave, .sparcel, .spu_2, - .tce, - .tcele, .xcore, .xtensa, => return null, @@ -556,14 +532,10 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target { .amdgcn, .bpfeb, .bpfel, - .le64, - .amdil64, .nvptx64, .wasm64, - .hsail64, .spir64, .spirv64, - .renderscript64, .loongarch64, .mips64, .mips64el, @@ -577,18 +549,14 @@ pub fn get64BitArchVariant(target: std.Target) ?std.Target { => {}, // Already 64 bit .aarch64_32 => copy.cpu.arch = .aarch64, - .amdil => copy.cpu.arch = .amdil64, .arm => copy.cpu.arch = .aarch64, .armeb => copy.cpu.arch = .aarch64_be, - .hsail => copy.cpu.arch = .hsail64, - .le32 => copy.cpu.arch = .le64, .loongarch32 => copy.cpu.arch = .loongarch64, .mips => copy.cpu.arch = .mips64, .mipsel => copy.cpu.arch = .mips64el, .nvptx => copy.cpu.arch = .nvptx64, .powerpc => copy.cpu.arch = .powerpc64, .powerpcle => copy.cpu.arch = .powerpc64le, - .renderscript32 => copy.cpu.arch = .renderscript64, .riscv32 => copy.cpu.arch = .riscv64, .sparc => copy.cpu.arch = .sparc64, .spir => copy.cpu.arch = .spir64, @@ -635,7 +603,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { .powerpcle => "powerpcle", .powerpc64 => "powerpc64", .powerpc64le => "powerpc64le", - .r600 => "r600", .amdgcn => "amdgcn", .riscv32 => "riscv32", .riscv64 => "riscv64", @@ -643,8 +610,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { .sparc64 => "sparc64", .sparcel => "sparcel", .s390x => "s390x", - .tce => "tce", - .tcele => "tcele", .thumb => "thumb", .thumbeb => "thumbeb", .x86 => "i386", @@ -653,24 +618,15 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { .xtensa => "xtensa", .nvptx => "nvptx", .nvptx64 => "nvptx64", - .le32 => "le32", - .le64 => "le64", - .amdil => "amdil", - .amdil64 => "amdil64", - .hsail => "hsail", - .hsail64 => "hsail64", .spir => "spir", .spir64 => "spir64", .spirv => "spirv", .spirv32 => "spirv32", .spirv64 => "spirv64", .kalimba => "kalimba", - .shave => "shave", .lanai => "lanai", .wasm32 => "wasm32", .wasm64 => "wasm64", - .renderscript32 => "renderscript32", - .renderscript64 => "renderscript64", .ve => "ve", // Note: spu_2 is not supported in LLVM; this is the Zig arch name .spu_2 => "spu_2", @@ -685,9 +641,8 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { .dragonfly => "dragonfly", .freebsd => "freebsd", .fuchsia => "fuchsia", - .kfreebsd => "kfreebsd", .linux => "linux", - .lv2 => "lv2", + .ps3 => "lv2", .netbsd => "netbsd", .openbsd => "openbsd", .solaris => "solaris", @@ -697,7 +652,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { .haiku => "haiku", .minix => "minix", .rtems => "rtems", - .nacl => "nacl", .aix => "aix", .cuda => "cuda", .nvcl => "nvcl", @@ -749,7 +703,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { .gnueabi => "gnueabi", .gnueabihf => "gnueabihf", .gnuf32 => "gnuf32", - .gnuf64 => "gnuf64", .gnusf => "gnusf", .gnux32 => "gnux32", .gnuilp32 => "gnuilp32", @@ -764,7 +717,6 @@ pub fn toLLVMTriple(target: std.Target, buf: []u8) []const u8 { .msvc => "msvc", .itanium => "itanium", .cygnus => "cygnus", - .coreclr => "coreclr", .simulator => "simulator", .macabi => "macabi", .pixel => "pixel",