add support for ultra96 (#1)

* updated repo to include Ultra96 support
* updated README to include U96 instructions

.gitignore

@@ -3,6 +3,9 @@ sds_trace_data.dat
 boards/ZCU111/dsp_pynq/
 boards/ZCU111/bitstreams/
 
+boards/Ultra96/dsp_pynq/
+boards/Ultra96/bitstreams/
+
 boards/ZCU111/notebooks/assets/hpf.wav
 boards/ZCU111/notebooks/assets/hpf_hw.wav
 boards/ZCU111/notebooks/assets/hpf_coeffs.npy

Makefile

@@ -3,8 +3,14 @@ all: wheel
 wheel:
 	python3 setup.py bdist_wheel
 
-bitstream:
+zcu111:
 	cd boards/ZCU111 && $(MAKE)
+
+ultra96:
+	cd boards/Ultra96 && $(MAKE)
 
-clean_bistream:
+clean_zcu111:
 	cd boards/ZCU111 && $(MAKE) clean
+
+clean_ultra96:
+	cd boards/Ultra96 && $(MAKE) clean

README.md

@@ -1,34 +1,46 @@
 # DSP-PYNQ
-These notebooks act as a tutorial on how to develop a DSP application using Python and PYNQ. The first notebook is a primer on both DSP and Python packages centered around DSP functionality.  The second notebook takes the knowledge learned from the first and uses it to perform similar functions but using hardware IP on the programmable logic.
+These notebooks act as a tutorial on how to develop a DSP application using Python and PYNQ. The first notebook is a primer on both DSP and Python packages centered around DSP functionality.  The second notebook takes the knowledge learned from the first and uses it to perform similar functions, but using hardware IP on the programmable logic.
+
+# Support
+This repo supports the following boards:
+   - ZCU111
+   - Ultra96 v1
+   - Ultra96 v2
+
+> The Ultra96 version of the design only supports Jupyter Notebooks.
 
 ## Getting started
-All the material in this repo is available on the v2.4.1 PYNQ image for the ZCU111 - as part of the [PYNQ RFSoC Workshop](https://github.com/Xilinx/PYNQ_RFSOC_Workshop). The image can be downloaded from the [PYNQ website](http://www.pynq.io/board.html) and burned to a micro SD card with at least 16GB capacity.
+All the material in this repo is available on the v2.4.1 PYNQ image for the ZCU111 - as part of the [PYNQ RFSoC Workshop](https://github.com/Xilinx/PYNQ_RFSOC_Workshop). This is not the case for the Ultra96, meaning this repo has to be installed separately if using that board.
 
-If for some reason you would prefer to install this repo separately, then follow the instructions below:
+The SD card images for both boards can be downloaded from the [PYNQ website](http://www.pynq.io/board.html) and burned to a micro SD card with at least 8GB capacity.
 
-### Requirements
-- RFSoC ZCU111
-- Pynq 2.4.1 image
+To install this repo separately, follow the instructions below.
 
 ### Overlay installation
-We supply a pre-built wheel containing the bitstream for that tagged release. This can be installed directly with Pip.
+We supply a pre-built wheel containing the bitstream for that tagged release. This can be installed directly with Pip using the Terminal built in to JupyterLab.
 ```sh
 # pip3 install https://github.com/Xilinx/DSP-PYNQ/releases/download/v1.0_$BOARD/dsp_pynq-1.0-py3-none-any.whl
 # python3 -c 'import dsp_pynq; dsp_pynq.install_notebooks()'
 ```
-The notebooks should then be available from the JupyterLab file browser inside the `dsp_pynq` directory.
+The notebooks should then be available from the Jupyter file browser inside the `dsp_pynq` directory.
 
 ## Building the wheel
 > NOTE: This must be built on an x86 Linux PC, with Vivado and Python 3 installed and available on $PATH. This cannot be built on the board.
 
-You can rebuild the entire wheel by running the following commands
+You can rebuild the entire wheel by running the following commands.
 ```sh
 $ git clone https://github.com/Xilinx/DSP-PYNQ
 $ cd DSP-PYNQ
+# to build for ZCU111
 $ BOARD=ZCU111 make wheel
+# to build build for Ultra96
+$ BOARD=Ultra96 make wheel
 ```
 
 To build only the Vivado project you can run the following command.
 ```sh
-$ make bitstream
+# to build for ZCU111
+$ make zcu111
+# to build for Ultra96
+$ make ultra96
 ```

boards/Ultra96/Makefile

@@ -0,0 +1,10 @@
+design_name := dsp_pynq
+bitfile := bitstreams/$(design_name).bit
+
+all: $(bitfile)
+
+$(bitfile):
+	vivado -mode batch -notrace -nojournal -nolog -source create_project.tcl
+
+clean:
+	rm -rf $(design_name) bitstreams *.jou *.log NA