diff --git a/MAINTAINERS.md b/MAINTAINERS.md new file mode 100644 index 000000000..d14b73e5e --- /dev/null +++ b/MAINTAINERS.md @@ -0,0 +1,34 @@ +# Maintainers, Mailing list, Patches + +Please send any patches, pull requests, comments or questions for this layer to +the [meta-xilinx mailing list](https://lists.yoctoproject.org/g/meta-xilinx): + + meta-xilinx@lists.yoctoproject.org + +When sending patches, please make sure the email subject line includes +"[meta-xilinx][PATCH]" and cc'ing the maintainers. + +For more details follow the OE community patch submission guidelines, as described in: + +https://www.openembedded.org/wiki/Commit_Patch_Message_Guidelines +https://www.openembedded.org/wiki/How_to_submit_a_patch_to_OpenEmbedded + +`git send-email --subject-prefix 'meta-xilinx][PATCH' --to meta-xilinx@yoctoproject.org` + +**Maintainers:** + + Mark Hatle + Sandeep Gundlupet Raju + John Toomey + +> **Note:** + +* meta-xilinx-contrib layer: + * We don't have any maintainers when user submit a patch to this layer + email meta-xilinx@yoctoproject.org and cc'ing below reviewers. + +**Reviewers:** + + Mark Hatle + Sandeep Gundlupet Raju + John Toomey diff --git a/meta-xilinx-bsp/README.booting.md b/README.booting.md similarity index 100% rename from meta-xilinx-bsp/README.booting.md rename to README.booting.md diff --git a/meta-microblaze/README.md b/meta-microblaze/README.md index 9e7ea2c61..acf6c2534 100644 --- a/meta-microblaze/README.md +++ b/meta-microblaze/README.md @@ -1,24 +1,8 @@ -meta-microblaze -=============== +# meta-microblaze This layer provides support specific to the MicroBlaze architecture - -Maintainers, Mailing list, Patches -================================== - -Please send any patches, pull requests, comments or questions for this layer to -the [meta-xilinx mailing list](https://lists.yoctoproject.org/listinfo/meta-xilinx): - - meta-xilinx@lists.yoctoproject.org - -Maintainers: - - Sai Hari Chandana Kalluri - Mark Hatle - -Dependencies -============ +## Dependencies This layer depends on: @@ -26,3 +10,8 @@ This layer depends on: URI: git://git.openembedded.org/openembedded-core layers: meta + branch: master or xilinx current release version (e.g. hosister) + + URI: git://git.yoctoproject.org/meta-xilinx.git + layers: meta-xilinx-core + branch: master or xilinx current release version (e.g. hosister) diff --git a/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc b/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc index dddbaf822..da91a1b7a 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc +++ b/meta-microblaze/recipes-devtools/gdb/gdb-microblaze.inc @@ -5,14 +5,14 @@ LTTNGUST:microblaze = "" FILESEXTRAPATHS:append := ":${THISDIR}/gdb" SRC_URI:append:microblaze = " \ - file://0001-Add-initial-port-of-linux-gdbserver.patch \ + file://0001-Patch-MicroBlaze.patch \ file://0002-Initial-port-of-core-reading-support.patch \ file://0003-Fix-debug-message-when-register-is-unavailable.patch \ file://0004-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch \ - file://0005-Initial-support-for-native-gdb.patch \ - file://0006-Fixing-the-issues-related-to-GDB-7.12.patch \ + file://0005-Fixing-the-issues-related-to-GDB-7.12.patch \ + file://0006-Patch-MicroBlaze-MicroBlaze-native-gdb-port.patch \ file://0007-Patch-microblaze-Adding-64-bit-MB-support.patch \ - file://0008-gdb-Fix-microblaze-target-compilation-3.patch \ - file://0009-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch \ - file://0010-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch \ + file://0008-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch \ + file://0009-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch \ + file://0010-Patch-MicroBlaze-Code-changes-for-gdbserver.patch \ " diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-initial-port-of-linux-gdbserver.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0001-Patch-MicroBlaze.patch similarity index 97% rename from meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-initial-port-of-linux-gdbserver.patch rename to meta-microblaze/recipes-devtools/gdb/gdb/0001-Patch-MicroBlaze.patch index bc1c1a934..b5a2726b0 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0001-Add-initial-port-of-linux-gdbserver.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0001-Patch-MicroBlaze.patch @@ -1,8 +1,8 @@ -From 699248a2fc4b9334f5042e1657116ac6b67b7321 Mon Sep 17 00:00:00 2001 +From b7b3c1eb19b770b2d700dd3c9fa23a7ae225a72b Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati -Date: Mon, 23 Jan 2017 19:07:44 +0530 -Subject: [PATCH 01/10] Add initial port of linux gdbserver add - gdb_proc_service_h to gdbserver microblaze-linux +Date: Thu, 16 Jun 2022 09:50:14 +0530 +Subject: [PATCH 01/10] [Patch,MicroBlaze] : Add initial port of linux + gdbserver add gdb_proc_service_h to gdbserver microblaze-linux gdbserver needs to initialise the microblaze registers @@ -451,7 +451,7 @@ index 00000000000..bd8a4384424 +32:slr +32:shr diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in -index 2bd3a578932..7bee1f1894e 100644 +index 2bd3a578932..46b5a0c7c60 100644 --- a/gdbserver/Makefile.in +++ b/gdbserver/Makefile.in @@ -184,7 +184,8 @@ SFILES = \ @@ -468,7 +468,7 @@ index 2bd3a578932..7bee1f1894e 100644 $(srcdir)/../gdb/nat/linux-namespaces.c \ $(srcdir)/../gdb/nat/linux-osdata.c \ $(srcdir)/../gdb/nat/linux-personality.c \ -+ $(srcdir)/../gdb/nat/microblaze-linux.c \ ++ $(srcdir)/../gdb/nat/microblaze-linux.c \ $(srcdir)/../gdb/nat/mips-linux-watch.c \ $(srcdir)/../gdb/nat/ppc-linux.c \ $(srcdir)/../gdb/nat/riscv-linux-tdesc.c \ diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0002-Initial-port-of-core-reading-support.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0002-Initial-port-of-core-reading-support.patch index d49a7fe61..352ed92e6 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0002-Initial-port-of-core-reading-support.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0002-Initial-port-of-core-reading-support.patch @@ -1,4 +1,4 @@ -From eae6f2fc7324729056f4bd3bfa66c0c5887d7b94 Mon Sep 17 00:00:00 2001 +From da36639f95d23083088a27c27f631d304ae316f1 Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 24 Jan 2017 14:55:56 +0530 Subject: [PATCH 02/10] Initial port of core reading support Added support for diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0003-Fix-debug-message-when-register-is-unavailable.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0003-Fix-debug-message-when-register-is-unavailable.patch index 68d90f277..255bb9b5a 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0003-Fix-debug-message-when-register-is-unavailable.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0003-Fix-debug-message-when-register-is-unavailable.patch @@ -1,4 +1,4 @@ -From 80c56ef8463c23f51759f5c64ce0165e259a4071 Mon Sep 17 00:00:00 2001 +From da93f5715ff333ac4807b73fe678dde21fb3bd6c Mon Sep 17 00:00:00 2001 From: Nathan Rossi Date: Tue, 8 May 2012 18:11:17 +1000 Subject: [PATCH 03/10] Fix debug message when register is unavailable diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0004-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0004-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch index e63a696d9..f1555b8a8 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0004-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0004-microblaze-Add-build_gdbserver-yes-to-top-level-conf.patch @@ -1,4 +1,4 @@ -From 7d970a0c616063a5095ce3725efed0feb40ceb30 Mon Sep 17 00:00:00 2001 +From 82ee589db2c1191fb274f4a76e217df318f8d6b2 Mon Sep 17 00:00:00 2001 From: David Holsgrove Date: Mon, 16 Dec 2013 16:37:32 +1000 Subject: [PATCH 04/10] microblaze: Add build_gdbserver=yes to top level diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0006-Fixing-the-issues-related-to-GDB-7.12.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0005-Fixing-the-issues-related-to-GDB-7.12.patch similarity index 85% rename from meta-microblaze/recipes-devtools/gdb/gdb/0006-Fixing-the-issues-related-to-GDB-7.12.patch rename to meta-microblaze/recipes-devtools/gdb/gdb/0005-Fixing-the-issues-related-to-GDB-7.12.patch index eb1efa71b..48e203a9a 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0006-Fixing-the-issues-related-to-GDB-7.12.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0005-Fixing-the-issues-related-to-GDB-7.12.patch @@ -1,34 +1,19 @@ -From 41b0d54fa00ce765e9a2ce09136938b72b2b96d7 Mon Sep 17 00:00:00 2001 +From ca1158d19ab9879167ca9fbe2fdf8d19094cc53f Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Fri, 17 Feb 2017 14:09:40 +0530 -Subject: [PATCH 06/10] Fixing the issues related to GDB-7.12 +Subject: [PATCH 05/10] Fixing the issues related to GDB-7.12 added all the required function which are new in 7.12 and removed few deprecated functions from 7.6 + +Conflicts: + gdb/config/microblaze/linux.mh --- - gdb/config/microblaze/linux.mh | 4 +- gdb/gdbserver/linux-microblaze-low.c | 97 ++++++++++++++++++++++++---- gdb/microblaze-tdep.h | 1 + gdbserver/configure.srv | 3 +- - 4 files changed, 89 insertions(+), 16 deletions(-) + 3 files changed, 86 insertions(+), 15 deletions(-) -diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh -index a4eaf540e1d..74a53b854a4 100644 ---- a/gdb/config/microblaze/linux.mh -+++ b/gdb/config/microblaze/linux.mh -@@ -1,9 +1,11 @@ - # Host: Microblaze, running Linux - -+#linux-nat.o linux-waitpid.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o - NAT_FILE= config/nm-linux.h - NATDEPFILES= inf-ptrace.o fork-child.o \ - microblaze-linux-nat.o proc-service.o linux-thread-db.o \ -- linux-nat.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o -+ linux-nat.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o \ -+ linux-waitpid.o linux-personality.o linux-namespaces.o - NAT_CDEPS = $(srcdir)/proc-service.list - - LOADLIBES = -ldl $(RDYNAMIC) diff --git a/gdb/gdbserver/linux-microblaze-low.c b/gdb/gdbserver/linux-microblaze-low.c index cba5d6fc585..a2733f3c21c 100644 --- a/gdb/gdbserver/linux-microblaze-low.c diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0005-Initial-support-for-native-gdb.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0005-Initial-support-for-native-gdb.patch deleted file mode 100644 index 3482bcd8f..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0005-Initial-support-for-native-gdb.patch +++ /dev/null @@ -1,492 +0,0 @@ -From bac086097dfa813fcc0b978dc32eb9ae469bf4a8 Mon Sep 17 00:00:00 2001 -From: David Holsgrove -Date: Fri, 20 Jul 2012 15:18:35 +1000 -Subject: [PATCH 05/10] Initial support for native gdb - -microblaze: Follow PPC method of getting setting registers -using PTRACE PEEK/POKE - -Signed-off-by: David Holsgrove ---- - gdb/Makefile.in | 2 + - gdb/config/microblaze/linux.mh | 9 + - gdb/microblaze-linux-nat.c | 431 +++++++++++++++++++++++++++++++++ - 3 files changed, 442 insertions(+) - create mode 100644 gdb/config/microblaze/linux.mh - create mode 100644 gdb/microblaze-linux-nat.c - -diff --git a/gdb/Makefile.in b/gdb/Makefile.in -index ec371fc7e52..2e8d4cfe82e 100644 ---- a/gdb/Makefile.in -+++ b/gdb/Makefile.in -@@ -1336,6 +1336,7 @@ HFILES_NO_SRCDIR = \ - memory-map.h \ - memrange.h \ - microblaze-tdep.h \ -+ microblaze-linux-tdep.h \ - mips-linux-tdep.h \ - mips-nbsd-tdep.h \ - mips-tdep.h \ -@@ -2216,6 +2217,7 @@ ALLDEPFILES = \ - m68k-tdep.c \ - microblaze-linux-tdep.c \ - microblaze-tdep.c \ -+ microblaze-linux-nat.c \ - mingw-hdep.c \ - mips-fbsd-nat.c \ - mips-fbsd-tdep.c \ -diff --git a/gdb/config/microblaze/linux.mh b/gdb/config/microblaze/linux.mh -new file mode 100644 -index 00000000000..a4eaf540e1d ---- /dev/null -+++ b/gdb/config/microblaze/linux.mh -@@ -0,0 +1,9 @@ -+# Host: Microblaze, running Linux -+ -+NAT_FILE= config/nm-linux.h -+NATDEPFILES= inf-ptrace.o fork-child.o \ -+ microblaze-linux-nat.o proc-service.o linux-thread-db.o \ -+ linux-nat.o linux-osdata.o linux-fork.o linux-procfs.o linux-ptrace.o -+NAT_CDEPS = $(srcdir)/proc-service.list -+ -+LOADLIBES = -ldl $(RDYNAMIC) -diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c -new file mode 100644 -index 00000000000..e9b8c9c5221 ---- /dev/null -+++ b/gdb/microblaze-linux-nat.c -@@ -0,0 +1,431 @@ -+/* Microblaze GNU/Linux native support. -+ -+ Copyright (C) 1988-1989, 1991-1992, 1994, 1996, 2000-2012 Free -+ Software Foundation, Inc. -+ -+ This file is part of GDB. -+ -+ This program is free software; you can redistribute it and/or modify -+ it under the terms of the GNU General Public License as published by -+ the Free Software Foundation; either version 3 of the License, or -+ (at your option) any later version. -+ -+ This program is distributed in the hope that it will be useful, -+ but WITHOUT ANY WARRANTY; without even the implied warranty of -+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ GNU General Public License for more details. -+ -+ You should have received a copy of the GNU General Public License -+ along with this program. If not, see . */ -+ -+#include "defs.h" -+#include "arch-utils.h" -+#include "dis-asm.h" -+#include "frame.h" -+#include "trad-frame.h" -+#include "symtab.h" -+#include "value.h" -+#include "gdbcmd.h" -+#include "breakpoint.h" -+#include "inferior.h" -+#include "regcache.h" -+#include "target.h" -+#include "frame.h" -+#include "frame-base.h" -+#include "frame-unwind.h" -+#include "dwarf2-frame.h" -+#include "osabi.h" -+ -+#include "gdb_assert.h" -+#include "gdb_string.h" -+#include "target-descriptions.h" -+#include "opcodes/microblaze-opcm.h" -+#include "opcodes/microblaze-dis.h" -+ -+#include "linux-nat.h" -+#include "target-descriptions.h" -+ -+#include -+#include -+#include -+#include -+ -+/* Prototypes for supply_gregset etc. */ -+#include "gregset.h" -+ -+#include "microblaze-tdep.h" -+ -+#include -+#include "auxv.h" -+ -+/* Defines ps_err_e, struct ps_prochandle. */ -+#include "gdb_proc_service.h" -+ -+/* On GNU/Linux, threads are implemented as pseudo-processes, in which -+ case we may be tracing more than one process at a time. In that -+ case, inferior_ptid will contain the main process ID and the -+ individual thread (process) ID. get_thread_id () is used to get -+ the thread id if it's available, and the process id otherwise. */ -+ -+int -+get_thread_id (ptid_t ptid) -+{ -+ int tid = TIDGET (ptid); -+ if (0 == tid) -+ tid = PIDGET (ptid); -+ return tid; -+} -+ -+#define GET_THREAD_ID(PTID) get_thread_id (PTID) -+ -+/* Non-zero if our kernel may support the PTRACE_GETREGS and -+ PTRACE_SETREGS requests, for reading and writing the -+ general-purpose registers. Zero if we've tried one of -+ them and gotten an error. */ -+int have_ptrace_getsetregs = 1; -+ -+static int -+microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) -+{ -+ int u_addr = -1; -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace -+ interface, and not the wordsize of the program's ABI. */ -+ int wordsize = sizeof (long); -+ -+ /* General purpose registers occupy 1 slot each in the buffer. */ -+ if (regno >= MICROBLAZE_R0_REGNUM -+ && regno <= MICROBLAZE_FSR_REGNUM) -+ u_addr = (regno * wordsize); -+ -+ return u_addr; -+} -+ -+ -+static void -+fetch_register (struct regcache *regcache, int tid, int regno) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ /* This isn't really an address. But ptrace thinks of it as one. */ -+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); -+ int bytes_transferred; -+ unsigned int offset; /* Offset of registers within the u area. */ -+ char buf[MAX_REGISTER_SIZE]; -+ -+ if (regaddr == -1) -+ { -+ memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */ -+ regcache_raw_supply (regcache, regno, buf); -+ return; -+ } -+ -+ /* Read the raw register using sizeof(long) sized chunks. On a -+ 32-bit platform, 64-bit floating-point registers will require two -+ transfers. */ -+ for (bytes_transferred = 0; -+ bytes_transferred < register_size (gdbarch, regno); -+ bytes_transferred += sizeof (long)) -+ { -+ long l; -+ -+ errno = 0; -+ l = ptrace (PTRACE_PEEKUSER, tid, (PTRACE_TYPE_ARG3) regaddr, 0); -+ regaddr += sizeof (long); -+ if (errno != 0) -+ { -+ char message[128]; -+ sprintf (message, "reading register %s (#%d)", -+ gdbarch_register_name (gdbarch, regno), regno); -+ perror_with_name (message); -+ } -+ memcpy (&buf[bytes_transferred], &l, sizeof (l)); -+ } -+ -+ /* Now supply the register. Keep in mind that the regcache's idea -+ of the register's size may not be a multiple of sizeof -+ (long). */ -+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) -+ { -+ /* Little-endian values are always found at the left end of the -+ bytes transferred. */ -+ regcache_raw_supply (regcache, regno, buf); -+ } -+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) -+ { -+ /* Big-endian values are found at the right end of the bytes -+ transferred. */ -+ size_t padding = (bytes_transferred - register_size (gdbarch, regno)); -+ regcache_raw_supply (regcache, regno, buf + padding); -+ } -+ else -+ internal_error (__FILE__, __LINE__, -+ _("fetch_register: unexpected byte order: %d"), -+ gdbarch_byte_order (gdbarch)); -+} -+ -+/* This function actually issues the request to ptrace, telling -+ it to get all general-purpose registers and put them into the -+ specified regset. -+ -+ If the ptrace request does not exist, this function returns 0 -+ and properly sets the have_ptrace_* flag. If the request fails, -+ this function calls perror_with_name. Otherwise, if the request -+ succeeds, then the regcache gets filled and 1 is returned. */ -+static int -+fetch_all_gp_regs (struct regcache *regcache, int tid) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ gdb_gregset_t gregset; -+ -+ if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) -+ { -+ if (errno == EIO) -+ { -+ have_ptrace_getsetregs = 0; -+ return 0; -+ } -+ perror_with_name (_("Couldn't get general-purpose registers.")); -+ } -+ -+ supply_gregset (regcache, (const gdb_gregset_t *) &gregset); -+ -+ return 1; -+} -+ -+ -+/* This is a wrapper for the fetch_all_gp_regs function. It is -+ responsible for verifying if this target has the ptrace request -+ that can be used to fetch all general-purpose registers at one -+ shot. If it doesn't, then we should fetch them using the -+ old-fashioned way, which is to iterate over the registers and -+ request them one by one. */ -+static void -+fetch_gp_regs (struct regcache *regcache, int tid) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ int i; -+ -+ if (have_ptrace_getsetregs) -+ if (fetch_all_gp_regs (regcache, tid)) -+ return; -+ -+ /* If we've hit this point, it doesn't really matter which -+ architecture we are using. We just need to read the -+ registers in the "old-fashioned way". */ -+ for (i = MICROBLAZE_R0_REGNUM; i <= MICROBLAZE_FSR_REGNUM; i++) -+ fetch_register (regcache, tid, i); -+} -+ -+ -+static void -+store_register (const struct regcache *regcache, int tid, int regno) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ /* This isn't really an address. But ptrace thinks of it as one. */ -+ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); -+ int i; -+ size_t bytes_to_transfer; -+ char buf[MAX_REGISTER_SIZE]; -+ -+ if (regaddr == -1) -+ return; -+ -+ /* First collect the register. Keep in mind that the regcache's -+ idea of the register's size may not be a multiple of sizeof -+ (long). */ -+ memset (buf, 0, sizeof buf); -+ bytes_to_transfer = align_up (register_size (gdbarch, regno), sizeof (long)); -+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) -+ { -+ /* Little-endian values always sit at the left end of the buffer. */ -+ regcache_raw_collect (regcache, regno, buf); -+ } -+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) -+ { -+ /* Big-endian values sit at the right end of the buffer. */ -+ size_t padding = (bytes_to_transfer - register_size (gdbarch, regno)); -+ regcache_raw_collect (regcache, regno, buf + padding); -+ } -+ -+ for (i = 0; i < bytes_to_transfer; i += sizeof (long)) -+ { -+ long l; -+ -+ memcpy (&l, &buf[i], sizeof (l)); -+ errno = 0; -+ ptrace (PTRACE_POKEUSER, tid, (PTRACE_TYPE_ARG3) regaddr, l); -+ regaddr += sizeof (long); -+ -+ if (errno != 0) -+ { -+ char message[128]; -+ sprintf (message, "writing register %s (#%d)", -+ gdbarch_register_name (gdbarch, regno), regno); -+ perror_with_name (message); -+ } -+ } -+} -+ -+/* This function actually issues the request to ptrace, telling -+ it to store all general-purpose registers present in the specified -+ regset. -+ -+ If the ptrace request does not exist, this function returns 0 -+ and properly sets the have_ptrace_* flag. If the request fails, -+ this function calls perror_with_name. Otherwise, if the request -+ succeeds, then the regcache is stored and 1 is returned. */ -+static int -+store_all_gp_regs (const struct regcache *regcache, int tid, int regno) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ gdb_gregset_t gregset; -+ -+ if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) -+ { -+ if (errno == EIO) -+ { -+ have_ptrace_getsetregs = 0; -+ return 0; -+ } -+ perror_with_name (_("Couldn't get general-purpose registers.")); -+ } -+ -+ fill_gregset (regcache, &gregset, regno); -+ -+ if (ptrace (PTRACE_SETREGS, tid, 0, (void *) &gregset) < 0) -+ { -+ if (errno == EIO) -+ { -+ have_ptrace_getsetregs = 0; -+ return 0; -+ } -+ perror_with_name (_("Couldn't set general-purpose registers.")); -+ } -+ -+ return 1; -+} -+ -+/* This is a wrapper for the store_all_gp_regs function. It is -+ responsible for verifying if this target has the ptrace request -+ that can be used to store all general-purpose registers at one -+ shot. If it doesn't, then we should store them using the -+ old-fashioned way, which is to iterate over the registers and -+ store them one by one. */ -+static void -+store_gp_regs (const struct regcache *regcache, int tid, int regno) -+{ -+ struct gdbarch *gdbarch = get_regcache_arch (regcache); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ int i; -+ -+ if (have_ptrace_getsetregs) -+ if (store_all_gp_regs (regcache, tid, regno)) -+ return; -+ -+ /* If we hit this point, it doesn't really matter which -+ architecture we are using. We just need to store the -+ registers in the "old-fashioned way". */ -+ for (i = MICROBLAZE_R0_REGNUM; i <= MICROBLAZE_FSR_REGNUM; i++) -+ store_register (regcache, tid, i); -+} -+ -+ -+/* Fetch registers from the child process. Fetch all registers if -+ regno == -1, otherwise fetch all general registers or all floating -+ point registers depending upon the value of regno. */ -+ -+static void -+microblaze_linux_fetch_inferior_registers (struct target_ops *ops, -+ struct regcache *regcache, int regno) -+{ -+ /* Get the thread id for the ptrace call. */ -+ int tid = GET_THREAD_ID (inferior_ptid); -+ -+ if (regno == -1) -+ fetch_gp_regs (regcache, tid); -+ else -+ fetch_register (regcache, tid, regno); -+} -+ -+/* Store registers back into the inferior. Store all registers if -+ regno == -1, otherwise store all general registers or all floating -+ point registers depending upon the value of regno. */ -+ -+static void -+microblaze_linux_store_inferior_registers (struct target_ops *ops, -+ struct regcache *regcache, int regno) -+{ -+ /* Get the thread id for the ptrace call. */ -+ int tid = GET_THREAD_ID (inferior_ptid); -+ -+ if (regno >= 0) -+ store_register (regcache, tid, regno); -+ else -+ store_gp_regs (regcache, tid, -1); -+} -+ -+/* Wrapper functions for the standard regset handling, used by -+ thread debugging. */ -+ -+void -+fill_gregset (const struct regcache *regcache, -+ gdb_gregset_t *gregsetp, int regno) -+{ -+ microblaze_collect_gregset (NULL, regcache, regno, gregsetp); -+} -+ -+void -+supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp) -+{ -+ microblaze_supply_gregset (NULL, regcache, -1, gregsetp); -+} -+ -+void -+fill_fpregset (const struct regcache *regcache, -+ gdb_fpregset_t *fpregsetp, int regno) -+{ -+ /* FIXME. */ -+} -+ -+void -+supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) -+{ -+ /* FIXME. */ -+} -+ -+static const struct target_desc * -+microblaze_linux_read_description (struct target_ops *ops) -+{ -+ CORE_ADDR microblaze_hwcap = 0; -+ -+ if (target_auxv_search (ops, AT_HWCAP, µblaze_hwcap) != 1) -+ return NULL; -+ -+ return NULL; -+} -+ -+ -+void _initialize_microblaze_linux_nat (void); -+ -+void -+_initialize_microblaze_linux_nat (void) -+{ -+ struct target_ops *t; -+ -+ /* Fill in the generic GNU/Linux methods. */ -+ t = linux_target (); -+ -+ /* Add our register access methods. */ -+ t->to_fetch_registers = microblaze_linux_fetch_inferior_registers; -+ t->to_store_registers = microblaze_linux_store_inferior_registers; -+ -+ t->to_read_description = microblaze_linux_read_description; -+ -+ /* Register the target. */ -+ linux_nat_add_target (t); -+} --- -2.17.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0006-Patch-MicroBlaze-MicroBlaze-native-gdb-port.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0006-Patch-MicroBlaze-MicroBlaze-native-gdb-port.patch new file mode 100644 index 000000000..9498e8f76 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0006-Patch-MicroBlaze-MicroBlaze-native-gdb-port.patch @@ -0,0 +1,831 @@ +From b37df6ced77898e8cb7e1c343af005d5bfe1272f Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Wed, 15 Jun 2022 10:29:09 +0530 +Subject: [PATCH 06/10] [Patch,MicroBlaze] : MicroBlaze native gdb port. + +--- + gdb/Makefile.in | 2 + + gdb/configure.nat | 4 + + gdb/features/microblaze-linux.c | 79 +++++++ + gdb/microblaze-linux-nat.c | 366 ++++++++++++++++++++++++++++++++ + gdb/microblaze-linux-tdep.c | 2 + + gdb/microblaze-linux-tdep.h | 24 +++ + gdb/microblaze-tdep.c | 151 ++++++++++++- + gdb/microblaze-tdep.h | 15 +- + 8 files changed, 629 insertions(+), 14 deletions(-) + create mode 100755 gdb/features/microblaze-linux.c + create mode 100755 gdb/microblaze-linux-nat.c + create mode 100644 gdb/microblaze-linux-tdep.h + +diff --git a/gdb/Makefile.in b/gdb/Makefile.in +index ec371fc7e52..0449b8e4c2b 100644 +--- a/gdb/Makefile.in ++++ b/gdb/Makefile.in +@@ -1336,6 +1336,7 @@ HFILES_NO_SRCDIR = \ + memory-map.h \ + memrange.h \ + microblaze-tdep.h \ ++ microblaze-linux-tdep.h \ + mips-linux-tdep.h \ + mips-nbsd-tdep.h \ + mips-tdep.h \ +@@ -2214,6 +2215,7 @@ ALLDEPFILES = \ + m68k-linux-nat.c \ + m68k-linux-tdep.c \ + m68k-tdep.c \ ++ microblaze-linux-nat.c \ + microblaze-linux-tdep.c \ + microblaze-tdep.c \ + mingw-hdep.c \ +diff --git a/gdb/configure.nat b/gdb/configure.nat +index bb70e303384..53f19a3d263 100644 +--- a/gdb/configure.nat ++++ b/gdb/configure.nat +@@ -261,6 +261,10 @@ case ${gdb_host} in + # Host: Motorola m68k running GNU/Linux. + NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o" + ;; ++ microblaze) ++ # Host: Microblaze running GNU/Linux. ++ NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o" ++ ;; + mips) + # Host: Linux/MIPS + NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \ +diff --git a/gdb/features/microblaze-linux.c b/gdb/features/microblaze-linux.c +new file mode 100755 +index 00000000000..29f681bf2ac +--- /dev/null ++++ b/gdb/features/microblaze-linux.c +@@ -0,0 +1,79 @@ ++/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: ++ Original: microblaze.xml */ ++ ++#include "defs.h" ++#include "osabi.h" ++#include "target-descriptions.h" ++ ++struct target_desc *tdesc_microblaze_linux; ++static void ++initialize_tdesc_microblaze_linux (void) ++{ ++ struct target_desc *result = allocate_target_description (); ++ struct tdesc_feature *feature; ++ set_tdesc_architecture (result, bfd_scan_arch ("microblaze")); ++ set_tdesc_osabi (result, osabi_from_tdesc_string ("GNU/Linux")); ++ ++ feature = tdesc_create_feature (result, "org.gnu.gdb.microblaze.core"); ++ tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r16", 16, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r17", 17, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r18", 18, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r19", 19, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r20", 20, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r21", 21, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r22", 22, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r23", 23, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r24", 24, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r25", 25, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r26", 26, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r27", 27, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r28", 28, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r29", 29, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r30", 30, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "r31", 31, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpc", 32, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rmsr", 33, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rear", 34, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "resr", 35, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rfsr", 36, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rbtr", 37, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr0", 38, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr1", 39, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr2", 40, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr3", 41, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr4", 42, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr5", 43, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr6", 44, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr7", 45, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr8", 46, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr9", 47, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr10", 48, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpvr11", 49, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "redr", 50, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rpid", 51, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rzpr", 52, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbx", 53, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbsx", 54, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlblo", 55, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "rtlbhi", 56, 1, NULL, 32, "int"); ++ tdesc_create_reg (feature, "slr", 57, 1, NULL, 64, "uint64"); ++ tdesc_create_reg (feature, "shr", 58, 1, NULL, 64, "uint64"); ++ ++ tdesc_microblaze_linux = result; ++} +diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c +new file mode 100755 +index 00000000000..6b9daa23120 +--- /dev/null ++++ b/gdb/microblaze-linux-nat.c +@@ -0,0 +1,366 @@ ++/* Native-dependent code for GNU/Linux MicroBlaze. ++ Copyright (C) 2021 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program. If not, see . */ ++ ++#include "defs.h" ++#include "arch-utils.h" ++#include "dis-asm.h" ++#include "frame.h" ++#include "trad-frame.h" ++#include "symtab.h" ++#include "value.h" ++#include "gdbcmd.h" ++#include "breakpoint.h" ++#include "inferior.h" ++#include "gdbthread.h" ++#include "gdbcore.h" ++#include "regcache.h" ++#include "regset.h" ++#include "target.h" ++#include "frame.h" ++#include "frame-base.h" ++#include "frame-unwind.h" ++#include "osabi.h" ++#include "gdbsupport/gdb_assert.h" ++#include ++#include "target-descriptions.h" ++#include "opcodes/microblaze-opcm.h" ++#include "opcodes/microblaze-dis.h" ++#include "gregset.h" ++ ++#include "linux-nat.h" ++#include "linux-tdep.h" ++#include "target-descriptions.h" ++ ++#include ++#include ++#include ++#include "gdbsupport/gdb_wait.h" ++#include ++#include ++#include "nat/gdb_ptrace.h" ++#include "nat/linux-ptrace.h" ++#include "inf-ptrace.h" ++#include ++#include ++#include ++#include ++ ++/* Prototypes for supply_gregset etc. */ ++#include "gregset.h" ++ ++#include "microblaze-tdep.h" ++#include "microblaze-linux-tdep.h" ++#include "inferior.h" ++ ++#include "elf/common.h" ++ ++#include "auxv.h" ++#include "linux-tdep.h" ++ ++#include ++ ++ ++//int have_ptrace_getsetregs=1; ++ ++/* MicroBlaze Linux native additions to the default linux support. */ ++ ++class microblaze_linux_nat_target final : public linux_nat_target ++{ ++public: ++ /* Add our register access methods. */ ++ void fetch_registers (struct regcache *regcache, int regnum) override; ++ void store_registers (struct regcache *regcache, int regnum) override; ++ ++ /* Read suitable target description. */ ++ const struct target_desc *read_description () override; ++}; ++ ++static microblaze_linux_nat_target the_microblaze_linux_nat_target; ++ ++static int ++microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) ++{ ++ int u_addr = -1; ++ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace ++ * interface, and not the wordsize of the program's ABI. */ ++ int wordsize = sizeof (long); ++ ++ /* General purpose registers occupy 1 slot each in the buffer. */ ++ if (regno >= MICROBLAZE_R0_REGNUM ++ && regno <= MICROBLAZE_FSR_REGNUM) ++ u_addr = ((regno - MICROBLAZE_R0_REGNUM)* wordsize); ++ ++ return u_addr; ++} ++ ++/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1) ++ from regset GREGS into REGCACHE. */ ++ ++static void ++supply_gregset_regnum (struct regcache *regcache, const prgregset_t *gregs, ++ int regnum) ++{ ++ int i; ++ const elf_greg_t *regp = *gregs; ++ /* Access all registers */ ++ if (regnum == -1) ++ { ++ /* We fill the general purpose registers. */ ++ for (i = MICROBLAZE_R0_REGNUM + 1; i < MICROBLAZE_FSR_REGNUM; i++) ++ regcache->raw_supply (i, regp + i); ++ ++ /* Supply MICROBLAZE_PC_REGNUM from index 32. */ ++ regcache->raw_supply (MICROBLAZE_PC_REGNUM, regp + 32); ++ ++ /* Fill the inaccessible zero register with zero. */ ++ regcache->raw_supply_zeroed (0); ++ } ++ else if (regnum == MICROBLAZE_R0_REGNUM) ++ regcache->raw_supply_zeroed (0); ++ else if (regnum == MICROBLAZE_PC_REGNUM) ++ regcache->raw_supply (MICROBLAZE_PC_REGNUM, regp + 32); ++ else if (regnum > MICROBLAZE_R0_REGNUM && regnum < MICROBLAZE_FSR_REGNUM) ++ regcache->raw_supply (regnum, regp + regnum); ++} ++ ++/* Copy all general purpose registers from regset GREGS into REGCACHE. */ ++ ++void ++supply_gregset (struct regcache *regcache, const prgregset_t *gregs) ++{ ++ supply_gregset_regnum (regcache, gregs, -1); ++} ++ ++/* Copy general purpose register REGNUM (or all gp regs if REGNUM == -1) ++ from REGCACHE into regset GREGS. */ ++ ++void ++fill_gregset (const struct regcache *regcache, prgregset_t *gregs, int regnum) ++{ ++ elf_greg_t *regp = *gregs; ++ if (regnum == -1) ++ { ++ /* We fill the general purpose registers. */ ++ for (int i = MICROBLAZE_R0_REGNUM + 1; i < MICROBLAZE_FSR_REGNUM; i++) ++ regcache->raw_collect (i, regp + i); ++ ++ regcache->raw_collect (MICROBLAZE_PC_REGNUM, regp + 32); ++ } ++ else if (regnum == MICROBLAZE_R0_REGNUM) ++ /* Nothing to do here. */ ++ ; ++ else if (regnum > MICROBLAZE_R0_REGNUM && regnum < MICROBLAZE_FSR_REGNUM) ++ regcache->raw_collect (regnum, regp + regnum); ++ else if (regnum == MICROBLAZE_PC_REGNUM) ++ regcache->raw_collect (MICROBLAZE_PC_REGNUM, regp + 32); ++} ++ ++/* Transfering floating-point registers between GDB, inferiors and cores. ++ Since MicroBlaze floating-point registers are the same as GPRs these do ++ nothing. */ ++ ++void ++supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregs) ++{ ++} ++ ++void ++fill_fpregset (const struct regcache *regcache, ++ gdb_fpregset_t *fpregs, int regno) ++{ ++} ++ ++ ++static void ++fetch_register (struct regcache *regcache, int tid, int regno) ++{ ++ struct gdbarch *gdbarch = regcache->arch (); ++ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); ++ /* This isn't really an address. But ptrace thinks of it as one. */ ++ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); ++ int bytes_transferred; ++ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; ++ ++ if (regaddr == -1) ++ { ++ memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */ ++ regcache->raw_supply (regno, buf); ++ return; ++ } ++ ++ /* Read the raw register using sizeof(long) sized chunks. On a ++ * 32-bit platform, 64-bit floating-point registers will require two ++ * transfers. */ ++ for (bytes_transferred = 0; ++ bytes_transferred < register_size (gdbarch, regno); ++ bytes_transferred += sizeof (long)) ++ { ++ long l; ++ ++ errno = 0; ++ l = ptrace (PTRACE_PEEKUSER, tid, (PTRACE_TYPE_ARG3) regaddr, 0); ++ if (errno == EIO) ++ { ++ printf("ptrace io error\n"); ++ } ++ regaddr += sizeof (long); ++ if (errno != 0) ++ { ++ char message[128]; ++ sprintf (message, "reading register %s (#%d)", ++ gdbarch_register_name (gdbarch, regno), regno); ++ perror_with_name (message); ++ } ++ memcpy (&buf[bytes_transferred], &l, sizeof (l)); ++ } ++ ++ /* Now supply the register. Keep in mind that the regcache's idea ++ * of the register's size may not be a multiple of sizeof ++ * (long). */ ++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) ++ { ++ /* Little-endian values are always found at the left end of the ++ * bytes transferred. */ ++ regcache->raw_supply (regno, buf); ++ } ++ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) ++ { ++ /* Big-endian values are found at the right end of the bytes ++ * transferred. */ ++ size_t padding = (bytes_transferred - register_size (gdbarch, regno)); ++ regcache->raw_supply (regno, buf + padding); ++ } ++ else ++ internal_error (__FILE__, __LINE__, ++ _("fetch_register: unexpected byte order: %d"), ++ gdbarch_byte_order (gdbarch)); ++} ++ ++ ++/* This is a wrapper for the fetch_all_gp_regs function. It is ++ * responsible for verifying if this target has the ptrace request ++ * that can be used to fetch all general-purpose registers at one ++ * shot. If it doesn't, then we should fetch them using the ++ * old-fashioned way, which is to iterate over the registers and ++ * request them one by one. */ ++static void ++fetch_gp_regs (struct regcache *regcache, int tid) ++{ ++ int i; ++/* If we've hit this point, it doesn't really matter which ++ architecture we are using. We just need to read the ++ registers in the "old-fashioned way". */ ++ for (i = MICROBLAZE_R0_REGNUM; i <= MICROBLAZE_FSR_REGNUM; i++) ++ fetch_register (regcache, tid, i); ++} ++ ++/* Return a target description for the current target. */ ++ ++const struct target_desc * ++microblaze_linux_nat_target::read_description () ++{ ++ return tdesc_microblaze_linux; ++} ++ ++/* Fetch REGNUM (or all registers if REGNUM == -1) from the target ++ into REGCACHE using PTRACE_GETREGSET. */ ++ ++void ++microblaze_linux_nat_target::fetch_registers (struct regcache * regcache, ++ int regno) ++{ ++ /* Get the thread id for the ptrace call. */ ++ int tid = regcache->ptid ().lwp (); ++//int tid = get_ptrace_pid (regcache->ptid()); ++#if 1 ++ if (regno == -1) ++#endif ++ fetch_gp_regs (regcache, tid); ++#if 1 ++ else ++ fetch_register (regcache, tid, regno); ++#endif ++} ++ ++ ++/* Store REGNUM (or all registers if REGNUM == -1) to the target ++ from REGCACHE using PTRACE_SETREGSET. */ ++ ++void ++microblaze_linux_nat_target::store_registers (struct regcache *regcache, int regno) ++{ ++ int tid; ++ ++ tid = get_ptrace_pid (regcache->ptid ()); ++ ++ struct gdbarch *gdbarch = regcache->arch (); ++ /* This isn't really an address. But ptrace thinks of it as one. */ ++ CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); ++ int i; ++ size_t bytes_to_transfer; ++ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; ++ ++ if (regaddr == -1) ++ return; ++ ++ /* First collect the register. Keep in mind that the regcache's ++ * idea of the register's size may not be a multiple of sizeof ++ * (long). */ ++ memset (buf, 0, sizeof buf); ++ bytes_to_transfer = align_up (register_size (gdbarch, regno), sizeof (long)); ++ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) ++ { ++ /* Little-endian values always sit at the left end of the buffer. */ ++ regcache->raw_collect (regno, buf); ++ } ++ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) ++ { ++ /* Big-endian values sit at the right end of the buffer. */ ++ size_t padding = (bytes_to_transfer - register_size (gdbarch, regno)); ++ regcache->raw_collect (regno, buf + padding); ++ } ++ ++ for (i = 0; i < bytes_to_transfer; i += sizeof (long)) ++ { ++ long l; ++ ++ memcpy (&l, &buf[i], sizeof (l)); ++ errno = 0; ++ ptrace (PTRACE_POKEUSER, tid, (PTRACE_TYPE_ARG3) regaddr, l); ++ regaddr += sizeof (long); ++ ++ if (errno != 0) ++ { ++ char message[128]; ++ sprintf (message, "writing register %s (#%d)", ++ gdbarch_register_name (gdbarch, regno), regno); ++ perror_with_name (message); ++ } ++ } ++} ++ ++void _initialize_microblaze_linux_nat (void); ++ ++void ++_initialize_microblaze_linux_nat (void) ++{ ++ /* Register the target. */ ++ linux_target = &the_microblaze_linux_nat_target; ++ add_inf_child_target (linux_target); ++} +diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c +index b8277dfd735..b77acc9dc61 100644 +--- a/gdb/microblaze-linux-tdep.c ++++ b/gdb/microblaze-linux-tdep.c +@@ -37,6 +37,7 @@ + #include "tramp-frame.h" + #include "linux-tdep.h" + #include "glibc-tdep.h" ++#include "features/microblaze-linux.c" + + static int microblaze_debug_flag = 0; + +@@ -179,4 +180,5 @@ _initialize_microblaze_linux_tdep () + { + gdbarch_register_osabi (bfd_arch_microblaze, 0, GDB_OSABI_LINUX, + microblaze_linux_init_abi); ++ initialize_tdesc_microblaze_linux (); + } +diff --git a/gdb/microblaze-linux-tdep.h b/gdb/microblaze-linux-tdep.h +new file mode 100644 +index 00000000000..a2c744e2961 +--- /dev/null ++++ b/gdb/microblaze-linux-tdep.h +@@ -0,0 +1,24 @@ ++/* Target-dependent code for GNU/Linux on OpenRISC. ++ ++ Copyright (C) 2021 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 3 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program. If not, see . */ ++#ifndef MICROBLAZE_LINUX_TDEP_H ++#define MICROBLAZE_LINUX_TDEP_H ++ /* Target descriptions. */ ++ extern struct target_desc *tdesc_microblaze_linux; ++ ++#endif /* MICROBLAZE_LINUX_TDEP_H */ +diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c +index 399fa0e3dca..0a5b5ab59cc 100644 +--- a/gdb/microblaze-tdep.c ++++ b/gdb/microblaze-tdep.c +@@ -295,6 +295,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, + cache->frameless_p = 0; /* Frame found. */ + save_hidden_pointer_found = 0; + non_stack_instruction_found = 0; ++ cache->register_offsets[rd] = -imm; + continue; + } + else if (IS_SPILL_SP(op, rd, ra)) +@@ -443,15 +444,17 @@ microblaze_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc) + if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end)) + { + sal = find_pc_line (func_start, 0); +- +- if (sal.end < func_end +- && start_pc <= sal.end) ++ ++ if (sal.line !=0 && sal.end <= func_end && start_pc <= sal.end) { + start_pc = sal.end; ++ microblaze_debug("start_pc is %d\t sal.end is %d\t func_end is %d\t",start_pc,sal.end,func_end); ++ } + } + + ostart_pc = microblaze_analyze_prologue (gdbarch, func_start, 0xffffffffUL, + &cache); + ++ + if (ostart_pc > start_pc) + return ostart_pc; + return start_pc; +@@ -465,6 +468,7 @@ microblaze_frame_cache (struct frame_info *next_frame, void **this_cache) + struct microblaze_frame_cache *cache; + struct gdbarch *gdbarch = get_frame_arch (next_frame); + int rn; ++ CORE_ADDR current_pc; + + if (*this_cache) + return (struct microblaze_frame_cache *) *this_cache; +@@ -478,10 +482,17 @@ microblaze_frame_cache (struct frame_info *next_frame, void **this_cache) + cache->register_offsets[rn] = -1; + + /* Call for side effects. */ +- get_frame_func (next_frame); +- +- cache->pc = get_frame_address_in_block (next_frame); +- ++ cache->pc = get_frame_func (next_frame); ++ ++// cache->pc = get_frame_address_in_block (next_frame); ++ current_pc = get_frame_pc (next_frame); ++ if (cache->pc) ++ microblaze_analyze_prologue (gdbarch, cache->pc, current_pc, cache); ++ ++ cache->saved_sp = cache->base + cache->framesize; ++ cache->register_offsets[MICROBLAZE_PREV_PC_REGNUM] = cache->base; ++ cache->register_offsets[MICROBLAZE_SP_REGNUM] = cache->saved_sp; ++ + return cache; + } + +@@ -506,6 +517,25 @@ microblaze_frame_prev_register (struct frame_info *this_frame, + struct microblaze_frame_cache *cache = + microblaze_frame_cache (this_frame, this_cache); + ++if ((regnum == MICROBLAZE_SP_REGNUM && ++ cache->register_offsets[MICROBLAZE_SP_REGNUM]) ++ || (regnum == MICROBLAZE_FP_REGNUM && ++ cache->register_offsets[MICROBLAZE_SP_REGNUM])) ++ ++ return frame_unwind_got_constant (this_frame, regnum, ++ cache->register_offsets[MICROBLAZE_SP_REGNUM]); ++ ++if (regnum == MICROBLAZE_PC_REGNUM) ++{ ++ regnum = 15; ++ return frame_unwind_got_memory (this_frame, regnum, ++ cache->register_offsets[MICROBLAZE_PREV_PC_REGNUM]); ++ ++} ++if (regnum == MICROBLAZE_SP_REGNUM) ++ regnum = 1; ++#if 0 ++ + if (cache->frameless_p) + { + if (regnum == MICROBLAZE_PC_REGNUM) +@@ -518,7 +548,9 @@ microblaze_frame_prev_register (struct frame_info *this_frame, + else + return trad_frame_get_prev_register (this_frame, cache->saved_regs, + regnum); +- ++#endif ++ return trad_frame_get_prev_register (this_frame, cache->saved_regs, ++ regnum); + } + + static const struct frame_unwind microblaze_frame_unwind = +@@ -633,7 +665,106 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) + return (TYPE_LENGTH (type) == 16); + } + +- ++#if 1 ++static std::vector ++microblaze_software_single_step (struct regcache *regcache) ++{ ++ struct gdbarch *arch = regcache->arch (); ++ //struct gdbarch_tdep *tdep = gdbarch_tdep (arch); ++ static int le_breakp[] = MICROBLAZE_BREAKPOINT_LE; ++ static int be_breakp[] = MICROBLAZE_BREAKPOINT; ++ enum bfd_endian byte_order = gdbarch_byte_order (arch); ++ int *breakp = byte_order == BFD_ENDIAN_BIG ? be_breakp : le_breakp; ++// std::vector ret = NULL; ++ ++ /* Save the address and the values of the next_pc and the target */ ++ static struct sstep_breaks ++ { ++ CORE_ADDR address; ++ bfd_boolean valid; ++ /* Shadow contents. */ ++ char data[INST_WORD_SIZE]; ++ } stepbreaks[2]; ++ int ii; ++ ++ CORE_ADDR pc; ++ std::vector next_pcs; ++ long insn; ++ enum microblaze_instr minstr; ++ bfd_boolean isunsignednum; ++ enum microblaze_instr_type insn_type; ++ short delay_slots; ++ int imm; ++ bfd_boolean immfound = FALSE; ++ ++ /* Set a breakpoint at the next instruction */ ++ /* If the current instruction is an imm, set it at the inst after */ ++ /* If the instruction has a delay slot, skip the delay slot */ ++ pc = regcache_read_pc (regcache); ++ insn = microblaze_fetch_instruction (pc); ++ minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); ++ if (insn_type == immediate_inst) ++ { ++ int rd, ra, rb; ++ immfound = TRUE; ++ minstr = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm); ++ pc = pc + INST_WORD_SIZE; ++ insn = microblaze_fetch_instruction (pc); ++ minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); ++ } ++ stepbreaks[0].address = pc + (delay_slots * INST_WORD_SIZE) + INST_WORD_SIZE; ++ if (insn_type != return_inst) { ++ stepbreaks[0].valid = TRUE; ++ } else { ++ stepbreaks[0].valid = FALSE; ++ } ++ ++ microblaze_debug ("single-step insn_type=%x insn=%x\n", insn_type, insn); ++ /* Now check for branch or return instructions */ ++ if (insn_type == branch_inst || insn_type == return_inst) { ++ int limm; ++ int lrd, lra, lrb; ++ int ra, rb; ++ bfd_boolean targetvalid; ++ bfd_boolean unconditionalbranch; ++ microblaze_decode_insn(insn, &lrd, &lra, &lrb, &limm); ++ if (lra >= 0 && lra < MICROBLAZE_NUM_REGS) ++ ra = regcache_raw_get_unsigned(regcache, lra); ++ else ++ ra = 0; ++ if (lrb >= 0 && lrb < MICROBLAZE_NUM_REGS) ++ rb = regcache_raw_get_unsigned(regcache, lrb); ++ else ++ rb = 0; ++ stepbreaks[1].address = microblaze_get_target_address (insn, immfound, imm, pc, ra, rb, &targetvalid, &unconditionalbranch); ++ microblaze_debug ("single-step uncondbr=%d targetvalid=%d target=%x\n", unconditionalbranch, targetvalid, stepbreaks[1].address); ++ if (unconditionalbranch) ++ stepbreaks[0].valid = FALSE; /* This is a unconditional branch: will not come to the next address */ ++ if (targetvalid && (stepbreaks[0].valid == FALSE || ++ (stepbreaks[0].address != stepbreaks[1].address)) ++ && (stepbreaks[1].address != pc)) { ++ stepbreaks[1].valid = TRUE; ++ } else { ++ stepbreaks[1].valid = FALSE; ++ } ++ } else { ++ stepbreaks[1].valid = FALSE; ++ } ++ ++ /* Insert the breakpoints */ ++ for (ii = 0; ii < 2; ++ii) ++ { ++ ++ /* ignore invalid breakpoint. */ ++ if (stepbreaks[ii].valid) { ++ // VEC_safe_push (CORE_ADDR, next_pcs, stepbreaks[ii].address);; ++ next_pcs.push_back (stepbreaks[ii].address); ++ } ++ } ++ return next_pcs; ++} ++#endif ++ + static int dwarf2_to_reg_map[78] = + { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ + 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ +@@ -805,6 +936,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) + microblaze_breakpoint::bp_from_kind); + set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); + ++ set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); ++ + set_gdbarch_frame_args_skip (gdbarch, 8); + + set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc); +diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h +index 872a3931f20..7f75c693b74 100644 +--- a/gdb/microblaze-tdep.h ++++ b/gdb/microblaze-tdep.h +@@ -59,11 +59,11 @@ enum microblaze_regnum + MICROBLAZE_R12_REGNUM, + MICROBLAZE_R13_REGNUM, + MICROBLAZE_R14_REGNUM, +- MICROBLAZE_R15_REGNUM, ++ MICROBLAZE_R15_REGNUM,MICROBLAZE_PREV_PC_REGNUM = MICROBLAZE_R15_REGNUM, + MICROBLAZE_R16_REGNUM, + MICROBLAZE_R17_REGNUM, + MICROBLAZE_R18_REGNUM, +- MICROBLAZE_R19_REGNUM, ++ MICROBLAZE_R19_REGNUM,MICROBLAZE_FP_REGNUM = MICROBLAZE_R19_REGNUM, + MICROBLAZE_R20_REGNUM, + MICROBLAZE_R21_REGNUM, + MICROBLAZE_R22_REGNUM, +@@ -76,7 +76,8 @@ enum microblaze_regnum + MICROBLAZE_R29_REGNUM, + MICROBLAZE_R30_REGNUM, + MICROBLAZE_R31_REGNUM, +- MICROBLAZE_PC_REGNUM, ++ MICROBLAZE_MAX_GPR_REGS, ++ MICROBLAZE_PC_REGNUM=32, + MICROBLAZE_MSR_REGNUM, + MICROBLAZE_EAR_REGNUM, + MICROBLAZE_ESR_REGNUM, +@@ -101,17 +102,21 @@ enum microblaze_regnum + MICROBLAZE_RTLBSX_REGNUM, + MICROBLAZE_RTLBLO_REGNUM, + MICROBLAZE_RTLBHI_REGNUM, +- MICROBLAZE_SLR_REGNUM, MICROBLAZE_NUM_CORE_REGS = MICROBLAZE_SLR_REGNUM, ++ MICROBLAZE_SLR_REGNUM, + MICROBLAZE_SHR_REGNUM, +- MICROBLAZE_NUM_REGS ++ MICROBLAZE_NUM_REGS, MICROBLAZE_NUM_CORE_REGS = MICROBLAZE_NUM_REGS + }; + ++/* Big enough to hold the size of the largest register in bytes. */ ++#define MICROBLAZE_MAX_REGISTER_SIZE 64 ++ + struct microblaze_frame_cache + { + /* Base address. */ + CORE_ADDR base; + CORE_ADDR pc; + ++ CORE_ADDR saved_sp; + /* Do we have a frame? */ + int frameless_p; + +-- +2.17.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0007-Patch-microblaze-Adding-64-bit-MB-support.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0007-Patch-microblaze-Adding-64-bit-MB-support.patch index 6536c22d4..564562da8 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0007-Patch-microblaze-Adding-64-bit-MB-support.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0007-Patch-microblaze-Adding-64-bit-MB-support.patch @@ -1,4 +1,4 @@ -From f9e5f9f884470d0a216126b347b4699d6051fcdd Mon Sep 17 00:00:00 2001 +From 0eea9a3f068837d4792719a8f9ba15736938eea4 Mon Sep 17 00:00:00 2001 From: Nagaraju Mekala Date: Thu, 31 Jan 2019 14:36:00 +0530 Subject: [PATCH 07/10] [Patch, microblaze]: Adding 64 bit MB support Added new @@ -16,6 +16,9 @@ Conflicts: Conflicts: bfd/configure opcodes/microblaze-opcm.h + +Conflicts: + gdb/microblaze-tdep.c --- bfd/Makefile.am | 2 + bfd/Makefile.in | 3 + @@ -41,8 +44,8 @@ Conflicts: gdb/features/microblaze64.c | 77 + gdb/features/microblaze64.xml | 11 + gdb/microblaze-linux-tdep.c | 36 +- - gdb/microblaze-tdep.c | 210 +- - gdb/microblaze-tdep.h | 8 +- + gdb/microblaze-tdep.c | 102 +- + gdb/microblaze-tdep.h | 4 +- .../microblaze-with-stack-protect.dat | 4 +- .../linux-microblaze-low.c | 0 include/elf/common.h | 1 + @@ -50,7 +53,7 @@ Conflicts: opcodes/microblaze-dis.c | 51 +- opcodes/microblaze-opc.h | 180 +- opcodes/microblaze-opcm.h | 36 +- - 41 files changed, 5454 insertions(+), 248 deletions(-) + 41 files changed, 5345 insertions(+), 245 deletions(-) create mode 100755 bfd/elf64-microblaze.c create mode 100644 gdb/features/microblaze64-core.xml create mode 100644 gdb/features/microblaze64-stack-protect.xml @@ -4880,18 +4883,18 @@ index 00000000000..515d18e65cf + + diff --git a/gdb/microblaze-linux-tdep.c b/gdb/microblaze-linux-tdep.c -index b8277dfd735..0c9ec82cee5 100644 +index b77acc9dc61..ba87d0bbd63 100644 --- a/gdb/microblaze-linux-tdep.c +++ b/gdb/microblaze-linux-tdep.c -@@ -39,6 +39,7 @@ - #include "glibc-tdep.h" +@@ -40,6 +40,7 @@ + #include "features/microblaze-linux.c" static int microblaze_debug_flag = 0; +int MICROBLAZE_REGISTER_SIZE=4; static void microblaze_debug (const char *fmt, ...) -@@ -54,6 +55,7 @@ microblaze_debug (const char *fmt, ...) +@@ -55,6 +56,7 @@ microblaze_debug (const char *fmt, ...) } } @@ -4899,7 +4902,7 @@ index b8277dfd735..0c9ec82cee5 100644 static int microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, struct bp_target_info *bp_tgt) -@@ -85,6 +87,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, +@@ -86,6 +88,8 @@ microblaze_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, return val; } @@ -4908,7 +4911,7 @@ index b8277dfd735..0c9ec82cee5 100644 static void microblaze_linux_sigtramp_cache (struct frame_info *next_frame, struct trad_frame_cache *this_cache, -@@ -146,8 +150,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, +@@ -147,8 +151,8 @@ microblaze_linux_init_abi (struct gdbarch_info info, linux_init_abi (info, gdbarch); @@ -4919,7 +4922,7 @@ index b8277dfd735..0c9ec82cee5 100644 /* Shared library handling. */ set_solib_svr4_fetch_link_map_offsets (gdbarch, -@@ -159,10 +163,30 @@ microblaze_linux_init_abi (struct gdbarch_info info, +@@ -160,10 +164,30 @@ microblaze_linux_init_abi (struct gdbarch_info info, /* BFD target for core files. */ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) @@ -4952,7 +4955,7 @@ index b8277dfd735..0c9ec82cee5 100644 /* Shared library handling. */ set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); -@@ -177,6 +201,8 @@ void _initialize_microblaze_linux_tdep (); +@@ -178,7 +202,9 @@ void _initialize_microblaze_linux_tdep (); void _initialize_microblaze_linux_tdep () { @@ -4961,9 +4964,10 @@ index b8277dfd735..0c9ec82cee5 100644 + microblaze_linux_init_abi); + gdbarch_register_osabi (bfd_arch_microblaze, bfd_mach_microblaze64, GDB_OSABI_LINUX, microblaze_linux_init_abi); + initialize_tdesc_microblaze_linux (); } diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index 399fa0e3dca..e51c022c1ba 100644 +index 0a5b5ab59cc..667d658adfd 100644 --- a/gdb/microblaze-tdep.c +++ b/gdb/microblaze-tdep.c @@ -40,7 +40,9 @@ @@ -5023,7 +5027,7 @@ index 399fa0e3dca..e51c022c1ba 100644 /* Allocate and initialize a frame cache. */ static struct microblaze_frame_cache * -@@ -556,17 +568,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache, +@@ -588,17 +600,16 @@ microblaze_extract_return_value (struct type *type, struct regcache *regcache, gdb_byte *valbuf) { gdb_byte buf[8]; @@ -5043,118 +5047,10 @@ index 399fa0e3dca..e51c022c1ba 100644 return; case 4: /* for sizes 4 or 8, copy the required length. */ case 8: -@@ -633,7 +644,119 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) - return (TYPE_LENGTH (type) == 16); +@@ -765,6 +776,12 @@ microblaze_software_single_step (struct regcache *regcache) } + #endif -- -+#if 0 -+static std::vector -+microblaze_software_single_step (struct regcache *regcache) -+{ -+// struct gdbarch *arch = get_frame_arch(frame); -+ struct gdbarch *arch = get_regcache_arch (regcache); -+ struct address_space *aspace = get_regcache_aspace (regcache); -+// struct address_space *aspace = get_frame_address_space (frame); -+ struct gdbarch_tdep *tdep = gdbarch_tdep (arch); -+ static char le_breakp[] = MICROBLAZE_BREAKPOINT_LE; -+ static char be_breakp[] = MICROBLAZE_BREAKPOINT; -+ enum bfd_endian byte_order = gdbarch_byte_order (arch); -+ char *breakp = byte_order == BFD_ENDIAN_BIG ? be_breakp : le_breakp; -+ std::vector ret = 0; -+ -+ /* Save the address and the values of the next_pc and the target */ -+ static struct sstep_breaks -+ { -+ CORE_ADDR address; -+ bfd_boolean valid; -+ /* Shadow contents. */ -+ char data[INST_WORD_SIZE]; -+ } stepbreaks[2]; -+ int ii; -+ -+ if (1) -+ { -+ CORE_ADDR pc; -+ std::vector *next_pcs = NULL; -+ long insn; -+ enum microblaze_instr minstr; -+ bfd_boolean isunsignednum; -+ enum microblaze_instr_type insn_type; -+ short delay_slots; -+ int imm; -+ bfd_boolean immfound = FALSE; -+ -+ /* Set a breakpoint at the next instruction */ -+ /* If the current instruction is an imm, set it at the inst after */ -+ /* If the instruction has a delay slot, skip the delay slot */ -+ pc = regcache_read_pc (regcache); -+ insn = microblaze_fetch_instruction (pc); -+ minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); -+ if (insn_type == immediate_inst) -+ { -+ int rd, ra, rb; -+ immfound = TRUE; -+ minstr = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm); -+ pc = pc + INST_WORD_SIZE; -+ insn = microblaze_fetch_instruction (pc); -+ minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); -+ } -+ stepbreaks[0].address = pc + (delay_slots * INST_WORD_SIZE) + INST_WORD_SIZE; -+ if (insn_type != return_inst) { -+ stepbreaks[0].valid = TRUE; -+ } else { -+ stepbreaks[0].valid = FALSE; -+ } -+ -+ microblaze_debug ("single-step insn_type=%x insn=%x\n", insn_type, insn); -+ /* Now check for branch or return instructions */ -+ if (insn_type == branch_inst || insn_type == return_inst) { -+ int limm; -+ int lrd, lra, lrb; -+ int ra, rb; -+ bfd_boolean targetvalid; -+ bfd_boolean unconditionalbranch; -+ microblaze_decode_insn(insn, &lrd, &lra, &lrb, &limm); -+ if (lra >= 0 && lra < MICROBLAZE_NUM_REGS) -+ ra = regcache_raw_get_unsigned(regcache, lra); -+ else -+ ra = 0; -+ if (lrb >= 0 && lrb < MICROBLAZE_NUM_REGS) -+ rb = regcache_raw_get_unsigned(regcache, lrb); -+ else -+ rb = 0; -+ stepbreaks[1].address = microblaze_get_target_address (insn, immfound, imm, pc, ra, rb, &targetvalid, &unconditionalbranch); -+ microblaze_debug ("single-step uncondbr=%d targetvalid=%d target=%x\n", unconditionalbranch, targetvalid, stepbreaks[1].address); -+ if (unconditionalbranch) -+ stepbreaks[0].valid = FALSE; /* This is a unconditional branch: will not come to the next address */ -+ if (targetvalid && (stepbreaks[0].valid == FALSE || -+ (stepbreaks[0].address != stepbreaks[1].address)) -+ && (stepbreaks[1].address != pc)) { -+ stepbreaks[1].valid = TRUE; -+ } else { -+ stepbreaks[1].valid = FALSE; -+ } -+ } else { -+ stepbreaks[1].valid = FALSE; -+ } -+ -+ /* Insert the breakpoints */ -+ for (ii = 0; ii < 2; ++ii) -+ { -+ -+ /* ignore invalid breakpoint. */ -+ if (stepbreaks[ii].valid) { -+ VEC_safe_push (CORE_ADDR, next_pcs, stepbreaks[ii].address);; -+// insert_single_step_breakpoint (arch, aspace, stepbreaks[ii].address); -+ ret = next_pcs; -+ } -+ } -+ } -+ return ret; -+} -+#endif -+ +static void +microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc) +{ @@ -5164,7 +5060,7 @@ index 399fa0e3dca..e51c022c1ba 100644 static int dwarf2_to_reg_map[78] = { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */ 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */ -@@ -668,13 +791,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) +@@ -799,13 +816,14 @@ microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg) static void microblaze_register_g_packet_guesses (struct gdbarch *gdbarch) { @@ -5182,7 +5078,7 @@ index 399fa0e3dca..e51c022c1ba 100644 } void -@@ -682,7 +806,7 @@ microblaze_supply_gregset (const struct regset *regset, +@@ -813,7 +831,7 @@ microblaze_supply_gregset (const struct regset *regset, struct regcache *regcache, int regnum, const void *gregs) { @@ -5191,7 +5087,7 @@ index 399fa0e3dca..e51c022c1ba 100644 if (regnum >= 0) regcache->raw_supply (regnum, regs + regnum); -@@ -690,7 +814,7 @@ microblaze_supply_gregset (const struct regset *regset, +@@ -821,7 +839,7 @@ microblaze_supply_gregset (const struct regset *regset, int i; for (i = 0; i < 50; i++) { @@ -5200,7 +5096,7 @@ index 399fa0e3dca..e51c022c1ba 100644 } } } -@@ -713,6 +837,17 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, +@@ -844,6 +862,17 @@ microblaze_iterate_over_regset_sections (struct gdbarch *gdbarch, } @@ -5218,7 +5114,7 @@ index 399fa0e3dca..e51c022c1ba 100644 static struct gdbarch * microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) -@@ -727,8 +862,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -858,8 +887,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) if (arches != NULL) return arches->gdbarch; if (tdesc == NULL) @@ -5236,7 +5132,7 @@ index 399fa0e3dca..e51c022c1ba 100644 /* Check any target description for validity. */ if (tdesc_has_registers (tdesc)) { -@@ -736,27 +878,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -867,27 +903,35 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) int valid_p; int i; @@ -5277,7 +5173,7 @@ index 399fa0e3dca..e51c022c1ba 100644 } if (!valid_p) -@@ -764,6 +914,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -895,6 +939,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdesc_data_cleanup (tdesc_data); return NULL; } @@ -5285,7 +5181,7 @@ index 399fa0e3dca..e51c022c1ba 100644 } /* Allocate space for the new architecture. */ -@@ -783,7 +934,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -914,7 +959,17 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) /* Register numbers of various important registers. */ set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM); set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM); @@ -5303,7 +5199,7 @@ index 399fa0e3dca..e51c022c1ba 100644 /* Map Dwarf2 registers to GDB registers. */ set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); -@@ -803,13 +964,15 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -934,7 +989,9 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) microblaze_breakpoint::kind_from_pc); set_gdbarch_sw_breakpoint_from_kind (gdbarch, microblaze_breakpoint::bp_from_kind); @@ -5312,7 +5208,9 @@ index 399fa0e3dca..e51c022c1ba 100644 + +// set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); - set_gdbarch_frame_args_skip (gdbarch, 8); + set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); + +@@ -942,7 +999,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc); @@ -5321,7 +5219,7 @@ index 399fa0e3dca..e51c022c1ba 100644 frame_base_set_default (gdbarch, µblaze_frame_base); -@@ -824,12 +987,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -957,12 +1014,11 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) tdesc_use_registers (gdbarch, tdesc, tdesc_data); //frame_base_append_sniffer (gdbarch, microblaze_frame_sniffer); @@ -5336,7 +5234,7 @@ index 399fa0e3dca..e51c022c1ba 100644 return gdbarch; } -@@ -841,6 +1003,8 @@ _initialize_microblaze_tdep () +@@ -974,6 +1030,8 @@ _initialize_microblaze_tdep () initialize_tdesc_microblaze_with_stack_protect (); initialize_tdesc_microblaze (); @@ -5346,7 +5244,7 @@ index 399fa0e3dca..e51c022c1ba 100644 add_setshow_zuinteger_cmd ("microblaze", class_maintenance, µblaze_debug_flag, _("\ diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index 872a3931f20..dc1d4686914 100644 +index 7f75c693b74..e0fa7ef9b12 100644 --- a/gdb/microblaze-tdep.h +++ b/gdb/microblaze-tdep.h @@ -27,7 +27,7 @@ struct microblaze_gregset @@ -5358,19 +5256,7 @@ index 872a3931f20..dc1d4686914 100644 }; struct gdbarch_tdep -@@ -101,9 +101,9 @@ enum microblaze_regnum - MICROBLAZE_RTLBSX_REGNUM, - MICROBLAZE_RTLBLO_REGNUM, - MICROBLAZE_RTLBHI_REGNUM, -- MICROBLAZE_SLR_REGNUM, MICROBLAZE_NUM_CORE_REGS = MICROBLAZE_SLR_REGNUM, -+ MICROBLAZE_SLR_REGNUM, - MICROBLAZE_SHR_REGNUM, -- MICROBLAZE_NUM_REGS -+ MICROBLAZE_NUM_REGS, MICROBLAZE_NUM_CORE_REGS = MICROBLAZE_NUM_REGS - }; - - struct microblaze_frame_cache -@@ -128,7 +128,7 @@ struct microblaze_frame_cache +@@ -133,7 +133,7 @@ struct microblaze_frame_cache struct trad_frame_saved_reg *saved_regs; }; /* All registers are 32 bits. */ diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0009-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch similarity index 87% rename from meta-microblaze/recipes-devtools/gdb/gdb/0009-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch rename to meta-microblaze/recipes-devtools/gdb/gdb/0008-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch index fca85fa2c..abbea266f 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0009-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0008-Patch-MicroBlaze-these-changes-will-make-64-bit-vect.patch @@ -1,7 +1,7 @@ -From 9ab0a0a551902e5196d46178b57fa1b33b587092 Mon Sep 17 00:00:00 2001 +From cc8ee172b9145ce488c556a2eb50f931f0676eea Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Mon, 19 Apr 2021 14:33:27 +0530 -Subject: [PATCH 09/10] [Patch,MicroBlaze] : these changes will make 64 bit +Subject: [PATCH 08/10] [Patch,MicroBlaze] : these changes will make 64 bit vectors as default target types when we built gdb with microblaze 64 bit type targets,for instance microblaze-xilinx-elf64/microblazeel-xilinx-elf64 diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0008-gdb-Fix-microblaze-target-compilation-3.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0008-gdb-Fix-microblaze-target-compilation-3.patch deleted file mode 100644 index 6a570b6a6..000000000 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0008-gdb-Fix-microblaze-target-compilation-3.patch +++ /dev/null @@ -1,288 +0,0 @@ -From 306ca46b3f330ee39601b9aede6b53c9cdbe9f86 Mon Sep 17 00:00:00 2001 -From: Mark Hatle -Date: Wed, 9 Dec 2020 23:35:35 -0600 -Subject: [PATCH 08/10] gdb: Fix microblaze target compilation (#3) - -Add microblaze-linux-nat.c to configure.nat - -Transition microblaze-linux-nat.c to use the new gdb C++ style functions. - -Signed-off-by: Mark Hatle ---- - gdb/configure.nat | 5 ++ - gdb/microblaze-linux-nat.c | 96 ++++++++++++++------------------------ - gdb/microblaze-tdep.h | 3 ++ - 3 files changed, 43 insertions(+), 61 deletions(-) - -diff --git a/gdb/configure.nat b/gdb/configure.nat -index bb70e303384..d8548a6b666 100644 ---- a/gdb/configure.nat -+++ b/gdb/configure.nat -@@ -261,6 +261,11 @@ case ${gdb_host} in - # Host: Motorola m68k running GNU/Linux. - NATDEPFILES="${NATDEPFILES} m68k-linux-nat.o" - ;; -+ microblaze) -+ # Host: Microblaze running GNU/Linux. -+ NATDEPFILES="${NATDEPFILES} microblaze-linux-nat.o" -+ NAT_CDEPS= -+ ;; - mips) - # Host: Linux/MIPS - NATDEPFILES="${NATDEPFILES} linux-nat-trad.o \ -diff --git a/gdb/microblaze-linux-nat.c b/gdb/microblaze-linux-nat.c -index e9b8c9c5221..bac4697e1e6 100644 ---- a/gdb/microblaze-linux-nat.c -+++ b/gdb/microblaze-linux-nat.c -@@ -36,13 +36,14 @@ - #include "dwarf2-frame.h" - #include "osabi.h" - --#include "gdb_assert.h" --#include "gdb_string.h" -+#include "gdbsupport/gdb_assert.h" -+#include - #include "target-descriptions.h" - #include "opcodes/microblaze-opcm.h" - #include "opcodes/microblaze-dis.h" - - #include "linux-nat.h" -+#include "linux-tdep.h" - #include "target-descriptions.h" - - #include -@@ -61,22 +62,17 @@ - /* Defines ps_err_e, struct ps_prochandle. */ - #include "gdb_proc_service.h" - --/* On GNU/Linux, threads are implemented as pseudo-processes, in which -- case we may be tracing more than one process at a time. In that -- case, inferior_ptid will contain the main process ID and the -- individual thread (process) ID. get_thread_id () is used to get -- the thread id if it's available, and the process id otherwise. */ -- --int --get_thread_id (ptid_t ptid) -+class microblaze_linux_nat_target final : public linux_nat_target - { -- int tid = TIDGET (ptid); -- if (0 == tid) -- tid = PIDGET (ptid); -- return tid; --} -+public: -+ /* Add our register access methods. */ -+ void fetch_registers (struct regcache *, int) override; -+ void store_registers (struct regcache *, int) override; -+ -+ const struct target_desc *read_description () override; -+}; - --#define GET_THREAD_ID(PTID) get_thread_id (PTID) -+static microblaze_linux_nat_target the_microblaze_linux_nat_target; - - /* Non-zero if our kernel may support the PTRACE_GETREGS and - PTRACE_SETREGS requests, for reading and writing the -@@ -88,7 +84,6 @@ static int - microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) - { - int u_addr = -1; -- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - /* NOTE: cagney/2003-11-25: This is the word size used by the ptrace - interface, and not the wordsize of the program's ABI. */ - int wordsize = sizeof (long); -@@ -105,18 +100,16 @@ microblaze_register_u_addr (struct gdbarch *gdbarch, int regno) - static void - fetch_register (struct regcache *regcache, int tid, int regno) - { -- struct gdbarch *gdbarch = get_regcache_arch (regcache); -- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ struct gdbarch *gdbarch = regcache->arch (); - /* This isn't really an address. But ptrace thinks of it as one. */ - CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); - int bytes_transferred; -- unsigned int offset; /* Offset of registers within the u area. */ -- char buf[MAX_REGISTER_SIZE]; -+ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; - - if (regaddr == -1) - { - memset (buf, '\0', register_size (gdbarch, regno)); /* Supply zeroes */ -- regcache_raw_supply (regcache, regno, buf); -+ regcache->raw_supply (regno, buf); - return; - } - -@@ -149,14 +142,14 @@ fetch_register (struct regcache *regcache, int tid, int regno) - { - /* Little-endian values are always found at the left end of the - bytes transferred. */ -- regcache_raw_supply (regcache, regno, buf); -+ regcache->raw_supply (regno, buf); - } - else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) - { - /* Big-endian values are found at the right end of the bytes - transferred. */ - size_t padding = (bytes_transferred - register_size (gdbarch, regno)); -- regcache_raw_supply (regcache, regno, buf + padding); -+ regcache->raw_supply (regno, buf + padding); - } - else - internal_error (__FILE__, __LINE__, -@@ -175,8 +168,6 @@ fetch_register (struct regcache *regcache, int tid, int regno) - static int - fetch_all_gp_regs (struct regcache *regcache, int tid) - { -- struct gdbarch *gdbarch = get_regcache_arch (regcache); -- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - gdb_gregset_t gregset; - - if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) -@@ -204,8 +195,6 @@ fetch_all_gp_regs (struct regcache *regcache, int tid) - static void - fetch_gp_regs (struct regcache *regcache, int tid) - { -- struct gdbarch *gdbarch = get_regcache_arch (regcache); -- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - int i; - - if (have_ptrace_getsetregs) -@@ -223,13 +212,12 @@ fetch_gp_regs (struct regcache *regcache, int tid) - static void - store_register (const struct regcache *regcache, int tid, int regno) - { -- struct gdbarch *gdbarch = get_regcache_arch (regcache); -- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); -+ struct gdbarch *gdbarch = regcache->arch (); - /* This isn't really an address. But ptrace thinks of it as one. */ - CORE_ADDR regaddr = microblaze_register_u_addr (gdbarch, regno); - int i; - size_t bytes_to_transfer; -- char buf[MAX_REGISTER_SIZE]; -+ char buf[MICROBLAZE_MAX_REGISTER_SIZE]; - - if (regaddr == -1) - return; -@@ -242,13 +230,13 @@ store_register (const struct regcache *regcache, int tid, int regno) - if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) - { - /* Little-endian values always sit at the left end of the buffer. */ -- regcache_raw_collect (regcache, regno, buf); -+ regcache->raw_collect (regno, buf); - } - else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) - { - /* Big-endian values sit at the right end of the buffer. */ - size_t padding = (bytes_to_transfer - register_size (gdbarch, regno)); -- regcache_raw_collect (regcache, regno, buf + padding); -+ regcache->raw_collect (regno, buf + padding); - } - - for (i = 0; i < bytes_to_transfer; i += sizeof (long)) -@@ -281,8 +269,6 @@ store_register (const struct regcache *regcache, int tid, int regno) - static int - store_all_gp_regs (const struct regcache *regcache, int tid, int regno) - { -- struct gdbarch *gdbarch = get_regcache_arch (regcache); -- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - gdb_gregset_t gregset; - - if (ptrace (PTRACE_GETREGS, tid, 0, (void *) &gregset) < 0) -@@ -319,8 +305,6 @@ store_all_gp_regs (const struct regcache *regcache, int tid, int regno) - static void - store_gp_regs (const struct regcache *regcache, int tid, int regno) - { -- struct gdbarch *gdbarch = get_regcache_arch (regcache); -- struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); - int i; - - if (have_ptrace_getsetregs) -@@ -339,12 +323,12 @@ store_gp_regs (const struct regcache *regcache, int tid, int regno) - regno == -1, otherwise fetch all general registers or all floating - point registers depending upon the value of regno. */ - --static void --microblaze_linux_fetch_inferior_registers (struct target_ops *ops, -- struct regcache *regcache, int regno) -+void -+microblaze_linux_nat_target::fetch_registers (struct regcache * regcache, -+ int regno) - { - /* Get the thread id for the ptrace call. */ -- int tid = GET_THREAD_ID (inferior_ptid); -+ int tid = regcache->ptid ().lwp (); - - if (regno == -1) - fetch_gp_regs (regcache, tid); -@@ -356,12 +340,12 @@ microblaze_linux_fetch_inferior_registers (struct target_ops *ops, - regno == -1, otherwise store all general registers or all floating - point registers depending upon the value of regno. */ - --static void --microblaze_linux_store_inferior_registers (struct target_ops *ops, -- struct regcache *regcache, int regno) -+void -+microblaze_linux_nat_target::store_registers (struct regcache *regcache, -+ int regno) - { - /* Get the thread id for the ptrace call. */ -- int tid = GET_THREAD_ID (inferior_ptid); -+ int tid = regcache->ptid ().lwp (); - - if (regno >= 0) - store_register (regcache, tid, regno); -@@ -398,12 +382,12 @@ supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp) - /* FIXME. */ - } - --static const struct target_desc * --microblaze_linux_read_description (struct target_ops *ops) -+const struct target_desc * -+microblaze_linux_nat_target::read_description () - { -- CORE_ADDR microblaze_hwcap = 0; -+ CORE_ADDR microblaze_hwcap = linux_get_hwcap (this); - -- if (target_auxv_search (ops, AT_HWCAP, µblaze_hwcap) != 1) -+ if (microblaze_hwcap != 1) - return NULL; - - return NULL; -@@ -415,17 +399,7 @@ void _initialize_microblaze_linux_nat (void); - void - _initialize_microblaze_linux_nat (void) - { -- struct target_ops *t; -- -- /* Fill in the generic GNU/Linux methods. */ -- t = linux_target (); -- -- /* Add our register access methods. */ -- t->to_fetch_registers = microblaze_linux_fetch_inferior_registers; -- t->to_store_registers = microblaze_linux_store_inferior_registers; -- -- t->to_read_description = microblaze_linux_read_description; -- - /* Register the target. */ -- linux_nat_add_target (t); -+ linux_target = &the_microblaze_linux_nat_target; -+ add_inf_child_target (&the_microblaze_linux_nat_target); - } -diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index dc1d4686914..a5c12c10e0b 100644 ---- a/gdb/microblaze-tdep.h -+++ b/gdb/microblaze-tdep.h -@@ -106,6 +106,9 @@ enum microblaze_regnum - MICROBLAZE_NUM_REGS, MICROBLAZE_NUM_CORE_REGS = MICROBLAZE_NUM_REGS - }; - -+/* Big enough to hold the size of the largest register in bytes. */ -+#define MICROBLAZE_MAX_REGISTER_SIZE 64 -+ - struct microblaze_frame_cache - { - /* Base address. */ --- -2.17.1 - diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0010-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0009-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch similarity index 93% rename from meta-microblaze/recipes-devtools/gdb/gdb/0010-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch rename to meta-microblaze/recipes-devtools/gdb/gdb/0009-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch index 78ef92024..35466e8f9 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb/0010-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0009-Patch-MicroBlaze-Added-m64-abi-for-64-bit-target-des.patch @@ -1,7 +1,7 @@ -From 67fd78c3fa5894e0038c09a858cb518c20340abf Mon Sep 17 00:00:00 2001 +From a721a7063f829ccaf6cf8273be04b763b53a735d Mon Sep 17 00:00:00 2001 From: Mahesh Bodapati Date: Tue, 9 Nov 2021 16:19:17 +0530 -Subject: [PATCH 10/10] [Patch,MicroBlaze] : Added m64 abi for 64 bit target +Subject: [PATCH 09/10] [Patch,MicroBlaze] : Added m64 abi for 64 bit target descriptions. set m64 abi for 64 bit elf. --- @@ -22,7 +22,7 @@ index 515d18e65cf..9c1b7d22003 100644 diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c -index e51c022c1ba..3bffbbe4b3d 100644 +index 667d658adfd..aad6a9cae6e 100644 --- a/gdb/microblaze-tdep.c +++ b/gdb/microblaze-tdep.c @@ -65,8 +65,94 @@ @@ -139,7 +139,7 @@ index e51c022c1ba..3bffbbe4b3d 100644 static void ATTRIBUTE_PRINTF (1, 2) microblaze_debug (const char *fmt, ...) { -@@ -855,15 +953,30 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -880,15 +978,30 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) struct gdbarch_tdep *tdep; struct gdbarch *gdbarch; struct tdesc_arch_data *tdesc_data = NULL; @@ -172,7 +172,7 @@ index e51c022c1ba..3bffbbe4b3d 100644 { tdesc = tdesc_microblaze64; reg_size = 8; -@@ -878,7 +991,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -903,7 +1016,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) int valid_p; int i; @@ -181,7 +181,7 @@ index e51c022c1ba..3bffbbe4b3d 100644 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.microblaze64.core"); else -@@ -892,7 +1005,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -917,7 +1030,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) for (i = 0; i < MICROBLAZE_NUM_REGS; i++) valid_p &= tdesc_numbered_register (feature, tdesc_data, i, microblaze_register_names[i]); @@ -190,7 +190,7 @@ index e51c022c1ba..3bffbbe4b3d 100644 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.microblaze64.stack-protect"); else -@@ -943,7 +1056,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) +@@ -968,7 +1081,8 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_ptr_bit (gdbarch, 64); break; } @@ -200,7 +200,7 @@ index e51c022c1ba..3bffbbe4b3d 100644 /* Map Dwarf2 registers to GDB registers. */ set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum); -@@ -1000,7 +1114,30 @@ void +@@ -1027,7 +1141,30 @@ void _initialize_microblaze_tdep () { register_gdbarch_init (bfd_arch_microblaze, microblaze_gdbarch_init); @@ -232,14 +232,14 @@ index e51c022c1ba..3bffbbe4b3d 100644 initialize_tdesc_microblaze_with_stack_protect (); initialize_tdesc_microblaze (); initialize_tdesc_microblaze64_with_stack_protect (); -@@ -1015,5 +1152,4 @@ When non-zero, microblaze specific debugging is enabled."), +@@ -1042,5 +1179,4 @@ When non-zero, microblaze specific debugging is enabled."), NULL, &setdebuglist, &showdebuglist); - } diff --git a/gdb/microblaze-tdep.h b/gdb/microblaze-tdep.h -index a5c12c10e0b..29da6d29dcb 100644 +index e0fa7ef9b12..9cb9628295f 100644 --- a/gdb/microblaze-tdep.h +++ b/gdb/microblaze-tdep.h @@ -19,8 +19,16 @@ diff --git a/meta-microblaze/recipes-devtools/gdb/gdb/0010-Patch-MicroBlaze-Code-changes-for-gdbserver.patch b/meta-microblaze/recipes-devtools/gdb/gdb/0010-Patch-MicroBlaze-Code-changes-for-gdbserver.patch new file mode 100644 index 000000000..dc38b4803 --- /dev/null +++ b/meta-microblaze/recipes-devtools/gdb/gdb/0010-Patch-MicroBlaze-Code-changes-for-gdbserver.patch @@ -0,0 +1,401 @@ +From 01e16382c8fce4448c911a4c5780259e181e83dd Mon Sep 17 00:00:00 2001 +From: Mahesh Bodapati +Date: Fri, 8 Jul 2022 12:53:51 +0530 +Subject: [PATCH 10/10] [Patch,MicroBlaze]: Code changes for gdbserver. + +--- + gdb/features/Makefile | 1 + + gdb/features/microblaze-linux.xml | 1 + + gdb/regformats/microblaze-linux.dat | 64 +++++++++ + gdbserver/Makefile.in | 5 +- + gdbserver/configure.srv | 1 + + ...croblaze-low.c => linux-microblaze-low.cc} | 132 ++++++++++-------- + 6 files changed, 138 insertions(+), 66 deletions(-) + create mode 100644 gdb/regformats/microblaze-linux.dat + rename gdbserver/{linux-microblaze-low.c => linux-microblaze-low.cc} (72%) + +diff --git a/gdb/features/Makefile b/gdb/features/Makefile +index 131fc14adbf..1b15305862e 100644 +--- a/gdb/features/Makefile ++++ b/gdb/features/Makefile +@@ -47,6 +47,7 @@ + WHICH = mips-linux mips-dsp-linux \ + microblaze-with-stack-protect \ + microblaze64-with-stack-protect \ ++ microblaze-linux \ + mips64-linux mips64-dsp-linux \ + nios2-linux \ + rs6000/powerpc-32 \ +diff --git a/gdb/features/microblaze-linux.xml b/gdb/features/microblaze-linux.xml +index 8983e66eb3d..688a3f83d1e 100644 +--- a/gdb/features/microblaze-linux.xml ++++ b/gdb/features/microblaze-linux.xml +@@ -7,6 +7,7 @@ + + + ++ microblaze + GNU/Linux + + +diff --git a/gdb/regformats/microblaze-linux.dat b/gdb/regformats/microblaze-linux.dat +new file mode 100644 +index 00000000000..b5b49f485cd +--- /dev/null ++++ b/gdb/regformats/microblaze-linux.dat +@@ -0,0 +1,64 @@ ++# THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi :set ro: ++# Generated from: microblaze-linux.xml ++name:microblaze_linux ++xmltarget:microblaze-linux.xml ++expedite:r1,rpc ++32:r0 ++32:r1 ++32:r2 ++32:r3 ++32:r4 ++32:r5 ++32:r6 ++32:r7 ++32:r8 ++32:r9 ++32:r10 ++32:r11 ++32:r12 ++32:r13 ++32:r14 ++32:r15 ++32:r16 ++32:r17 ++32:r18 ++32:r19 ++32:r20 ++32:r21 ++32:r22 ++32:r23 ++32:r24 ++32:r25 ++32:r26 ++32:r27 ++32:r28 ++32:r29 ++32:r30 ++32:r31 ++32:rpc ++32:rmsr ++32:rear ++32:resr ++32:rfsr ++32:rbtr ++32:rpvr0 ++32:rpvr1 ++32:rpvr2 ++32:rpvr3 ++32:rpvr4 ++32:rpvr5 ++32:rpvr6 ++32:rpvr7 ++32:rpvr8 ++32:rpvr9 ++32:rpvr10 ++32:rpvr11 ++32:redr ++32:rpid ++32:rzpr ++32:rtlbx ++32:rtlbsx ++32:rtlblo ++32:rtlbhi ++32:slr ++32:shr +diff --git a/gdbserver/Makefile.in b/gdbserver/Makefile.in +index 46b5a0c7c60..eaaf6820fe0 100644 +--- a/gdbserver/Makefile.in ++++ b/gdbserver/Makefile.in +@@ -184,7 +184,7 @@ SFILES = \ + $(srcdir)/linux-ia64-low.cc \ + $(srcdir)/linux-low.cc \ + $(srcdir)/linux-m68k-low.cc \ +- $(srcdir)/linux-microblaze-low.c \ ++ $(srcdir)/linux-microblaze-low.cc \ + $(srcdir)/linux-mips-low.cc \ + $(srcdir)/linux-nios2-low.cc \ + $(srcdir)/linux-ppc-low.cc \ +@@ -222,7 +222,6 @@ SFILES = \ + $(srcdir)/../gdb/nat/linux-namespaces.c \ + $(srcdir)/../gdb/nat/linux-osdata.c \ + $(srcdir)/../gdb/nat/linux-personality.c \ +- $(srcdir)/../gdb/nat/microblaze-linux.c \ + $(srcdir)/../gdb/nat/mips-linux-watch.c \ + $(srcdir)/../gdb/nat/ppc-linux.c \ + $(srcdir)/../gdb/nat/riscv-linux-tdesc.c \ +@@ -564,8 +563,6 @@ target/%.o: ../gdb/target/%.c + + %-generated.cc: ../gdb/regformats/rs6000/%.dat $(regdat_sh) + $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $< $@ +-microblaze-linux.c : $(srcdir)/../regformats/reg-microblaze.dat $(regdat_sh) +- $(ECHO_REGDAT) $(SHELL) $(regdat_sh) $(srcdir)/../regformats/reg-microblaze.dat microblaze-linux.c + + # + # Dependency tracking. +diff --git a/gdbserver/configure.srv b/gdbserver/configure.srv +index af10cb05683..026b156bd60 100644 +--- a/gdbserver/configure.srv ++++ b/gdbserver/configure.srv +@@ -169,6 +169,7 @@ case "${gdbserver_host}" in + microblaze*-*-linux*) srv_regobj="microblaze-linux.o" + srv_tgtobj="$srv_linux_obj linux-microblaze-low.o " + srv_xmlfiles="microblaze-linux.xml" ++ srv_xmlfiles="${srv_xmlfiles} microblaze-core.xml" + srv_linux_regsets=yes + srv_linux_usrregs=yes + srv_linux_thread_db=yes +diff --git a/gdbserver/linux-microblaze-low.c b/gdbserver/linux-microblaze-low.cc +similarity index 72% +rename from gdbserver/linux-microblaze-low.c +rename to gdbserver/linux-microblaze-low.cc +index a2733f3c21c..d30fa102b5e 100644 +--- a/gdbserver/linux-microblaze-low.c ++++ b/gdbserver/linux-microblaze-low.cc +@@ -20,12 +20,17 @@ + #include "server.h" + #include "linux-low.h" + ++#include "elf/common.h" ++#include "nat/gdb_ptrace.h" ++#include ++ + #include + #include + #include + + #include "gdb_proc_service.h" + ++ + static int microblaze_regmap[] = + {PT_GPR(0), PT_GPR(1), PT_GPR(2), PT_GPR(3), + PT_GPR(4), PT_GPR(5), PT_GPR(6), PT_GPR(7), +@@ -39,14 +44,46 @@ static int microblaze_regmap[] = + PT_FSR + }; + ++ ++ ++class microblaze_target : public linux_process_target ++{ ++public: ++ ++ const regs_info *get_regs_info () override; ++ ++ const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override; ++ // CORE_ADDR microblaze_reinsert_addr (regcache *regcache); ++ ++protected: ++ ++ void low_arch_setup () override; ++ ++ bool low_cannot_fetch_register (int regno) override; ++ ++ bool low_cannot_store_register (int regno) override; ++ ++ // bool low_supports_breakpoints () override; ++ ++ CORE_ADDR low_get_pc (regcache *regcache) override; ++ ++ void low_set_pc (regcache *regcache, CORE_ADDR newpc) override; ++ ++ bool low_breakpoint_at (CORE_ADDR pc) override; ++}; ++ ++/* The singleton target ops object. */ ++ ++static microblaze_target the_microblaze_target; ++ + #define microblaze_num_regs (sizeof (microblaze_regmap) / sizeof (microblaze_regmap[0])) + + /* Defined in auto-generated file microblaze-linux.c. */ +-void init_registers_microblaze (void); +-extern const struct target_desc *tdesc_microblaze; ++void init_registers_microblaze_linux (void); ++extern const struct target_desc *tdesc_microblaze_linux; + +-static int +-microblaze_cannot_store_register (int regno) ++bool ++microblaze_target::low_cannot_store_register (int regno) + { + if (microblaze_regmap[regno] == -1 || regno == 0) + return 1; +@@ -54,14 +91,14 @@ microblaze_cannot_store_register (int regno) + return 0; + } + +-static int +-microblaze_cannot_fetch_register (int regno) ++bool ++microblaze_target::low_cannot_fetch_register (int regno) + { + return 0; + } + +-static CORE_ADDR +-microblaze_get_pc (struct regcache *regcache) ++CORE_ADDR ++microblaze_target::low_get_pc (struct regcache *regcache) + { + unsigned long pc; + +@@ -69,8 +106,8 @@ microblaze_get_pc (struct regcache *regcache) + return (CORE_ADDR) pc; + } + +-static void +-microblaze_set_pc (struct regcache *regcache, CORE_ADDR pc) ++void ++microblaze_target::low_set_pc (struct regcache *regcache, CORE_ADDR pc) + { + unsigned long newpc = pc; + +@@ -84,34 +121,35 @@ static const unsigned long microblaze_breakpoint = 0xba0c0018; + + /* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */ + +-static const gdb_byte * +-microblaze_sw_breakpoint_from_kind (int kind, int *size) ++const gdb_byte * ++microblaze_target::sw_breakpoint_from_kind (int kind, int *size) + { + *size = microblaze_breakpoint_len; + return (const gdb_byte *) µblaze_breakpoint; + } + +-static int +-microblaze_breakpoint_at (CORE_ADDR where) ++bool ++microblaze_target::low_breakpoint_at (CORE_ADDR where) + { + unsigned long insn; + +- (*the_target->read_memory) (where, (unsigned char *) &insn, 4); ++ read_memory (where, (unsigned char *) &insn, 4); + if (insn == microblaze_breakpoint) + return 1; + /* If necessary, recognize more trap instructions here. GDB only uses the + one. */ + return 0; + } +- +-static CORE_ADDR +-microblaze_reinsert_addr (struct regcache *regcache) ++#if 0 ++CORE_ADDR ++microblaze_target::microblaze_reinsert_addr (struct regcache *regcache) + { + unsigned long pc; + collect_register_by_name (regcache, "r15", &pc); + return pc; + } +- ++#endif ++#if 0 + #ifdef HAVE_PTRACE_GETREGS + + static void +@@ -166,12 +204,15 @@ microblaze_store_gregset (struct regcache *regcache, const void *buf) + } + + #endif /* HAVE_PTRACE_GETREGS */ ++#endif + + static struct regset_info microblaze_regsets[] = { ++#if 0 + #ifdef HAVE_PTRACE_GETREGS + { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), GENERAL_REGS, microblaze_fill_gregset, microblaze_store_gregset }, + { 0, 0, 0, -1, GENERAL_REGS, NULL, NULL }, + #endif /* HAVE_PTRACE_GETREGS */ ++#endif + { 0, 0, 0, -1, GENERAL_REGS, NULL, NULL }, + NULL_REGSET + }; +@@ -189,17 +230,17 @@ static struct regsets_info microblaze_regsets_info = + NULL, /* disabled_regsets */ + }; + +-static struct regs_info regs_info = ++static struct regs_info microblaze_regs_info = + { + NULL, /* regset_bitmap */ + µblaze_usrregs_info, + µblaze_regsets_info + }; + +-static const struct regs_info * +-microblaze_regs_info (void) ++const regs_info * ++microblaze_target::get_regs_info (void) + { +- return ®s_info; ++ return µblaze_regs_info; + } + + /* Support for hardware single step. */ +@@ -211,50 +252,17 @@ microblaze_supports_hardware_single_step (void) + } + + +-static void +-microblaze_arch_setup (void) ++void ++microblaze_target::low_arch_setup (void) + { +- current_process ()->tdesc = tdesc_microblaze; ++ current_process ()->tdesc = tdesc_microblaze_linux; + } + +-struct linux_target_ops the_low_target = { +- microblaze_arch_setup, +- microblaze_regs_info, +- microblaze_cannot_fetch_register, +- microblaze_cannot_store_register, +- NULL, /* fetch_register */ +- microblaze_get_pc, +- microblaze_set_pc, +- NULL, +- microblaze_sw_breakpoint_from_kind, +- NULL, +- 0, +- microblaze_breakpoint_at, +- NULL, +- NULL, +- NULL, +- NULL, +- NULL, +- microblaze_collect_ptrace_register, +- microblaze_supply_ptrace_register, +- NULL, /* siginfo_fixup */ +- NULL, /* new_process */ +- NULL, /* new_thread */ +- NULL, /* new_fork */ +- NULL, /* prepare_to_resume */ +- NULL, /* process_qsupported */ +- NULL, /* supports_tracepoints */ +- NULL, /* get_thread_area */ +- NULL, /* install_fast_tracepoint_jump_pad */ +- NULL, /* emit_ops */ +- NULL, /* get_min_fast_tracepoint_insn_len */ +- NULL, /* supports_range_stepping */ +- NULL, /* breakpoint_kind_from_current_state */ +- microblaze_supports_hardware_single_step, +-}; ++linux_process_target *the_linux_target = &the_microblaze_target; + + void + initialize_low_arch (void) + { +- init_registers_microblaze (); ++ init_registers_microblaze_linux (); ++ initialize_regsets_info (µblaze_regsets_info); + } +-- +2.17.1 + diff --git a/meta-microblaze/recipes-devtools/gdb/gdb_%.bbappend b/meta-microblaze/recipes-devtools/gdb/gdb_%.bbappend index 23866471f..33fbe1581 100644 --- a/meta-microblaze/recipes-devtools/gdb/gdb_%.bbappend +++ b/meta-microblaze/recipes-devtools/gdb/gdb_%.bbappend @@ -1,11 +1,4 @@ MICROBLAZEPATCHES = "" MICROBLAZEPATCHES:microblaze = "gdb-microblaze.inc" -# We don't have ptrace support for on-target microblaze GDB currently. Need -# to use tcf-agent or other external debug interface. -MB_DOES_NOT_WORK = "" -MB_DOES_NOT_WORK:microblaze = "GDB is not currently supported on Microblaze." - -PNBLACKLIST[gdb] = "${MB_DOES_NOT_WORK}" - require ${MICROBLAZEPATCHES} diff --git a/meta-microblaze/recipes-extended/ltp/ltp_%.bbappend b/meta-microblaze/recipes-extended/ltp/ltp_%.bbappend deleted file mode 100644 index 85bcc731e..000000000 --- a/meta-microblaze/recipes-extended/ltp/ltp_%.bbappend +++ /dev/null @@ -1,2 +0,0 @@ -# gdb on-target is not supported on Microblaze -RDEPENDS:${PN}:remove:microblaze = "gdb" diff --git a/meta-xilinx-bsp/README.md b/meta-xilinx-bsp/README.md index e41428619..f41f6d4a7 100644 --- a/meta-xilinx-bsp/README.md +++ b/meta-xilinx-bsp/README.md @@ -1,56 +1,38 @@ -meta-xilinx -=========== +# meta-xilinx -This layer provides support for MicroBlaze, Zynq and ZynqMP. +This layer provides support for MicroBlaze, Zynq, ZynqMP and Versal architectures Xilinx evaluation boards. -Additional documentation: +## Additional documentation: -* [Building](README.building.md) -* [Booting](README.booting.md) +* [Building](../README.building.md) +* [Booting](../README.booting.md) -Supported Boards/Machines -========================= +## Supported Boards/Machines -Boards/Machines supported by this layer: +**Boards/Machines supported by this layer:** -* MicroBlaze: - * [Xilinx ML605 (QEMU)](conf/machine/ml605-qemu-microblazeel.conf) - `ml605-qemu-microblazeel` (QEMU support) - * [Xilinx S3A DSP 1800 (QEMU)](conf/machine/s3adsp1800-qemu-microblazeeb.conf) - `s3adsp1800-qemu-microblazeeb` (QEMU support) - * [Xilinx KC705](conf/machine/kc705-microblazeel.conf) - `kc705-microblazeel` -* Zynq: - * [Zynq (QEMU)](conf/machine/qemu-zynq7.conf) - `qemu-zynq7` (QEMU Support) - * [Xilinx ZC702](conf/machine/zc702-zynq7.conf) - `zc702-zynq7` (with QEMU support) - * [Xilinx ZC706](conf/machine/zc706-zynq7.conf) - `zc706-zynq7` (with QEMU support) - * [Avnet MicroZed](conf/machine/microzed-zynq7.conf) - `microzed-zynq7` - * [Avnet PicoZed](conf/machine/picozed-zynq7.conf) - `picozed-zynq7` - * [Avnet/Digilent ZedBoard](conf/machine/zedboard-zynq7.conf) - `zedboard-zynq7` - * [Digilent Zybo](conf/machine/zybo-zynq7.conf) - `zybo-zynq7` - * [Digilent Zybo Linux BD](conf/machine/zybo-linux-bd-zynq7.conf) - `zybo-linux-bd-zynq7` -* ZynqMP: - * [Xilinx ZCU102](conf/machine/zcu102-zynqmp.conf) - `zcu102-zynqmp` (QEMU support) - * [Xilinx ZCU106](conf/machine/zcu106-zynqmp.conf) - `zcu106-zynqmp` - * [Xilinx ZCU104](conf/machine/zcu104-zynqmp.conf) - `zcu104-zynqmp` +| Platform | Xilinx Board Variant | Machine Configuration file | Board Device tree | +| ---| --- | ---| ---------- | +|MicroBlaze|[Xilinx KC705](https://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html)|[kc705-microblazeel](conf/machine/kc705-microblazeel.conf)|`kc705-full`| +|Zynq-7000|Zynq (QEMU)|[qemu-zynq7](conf/machine/qemu-zynq7.conf)|NA| +||[Xilinx ZC702](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html)|[zc702-zynq7](conf/machine/zc702-zynq7.conf)|`zc702`| +||[Xilinx ZC706](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html)|[zc706-zynq7](conf/machine/zc706-zynq7.conf)|`zc706`| +|ZynqMP|[Xilinx ZCU102](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html)|[zcu102-zynqmp](conf/machine/zcu102-zynqmp.conf)|`zcu102-rev1.0`| +||[Xilinx ZCU104](https://www.xilinx.com/products/boards-and-kits/zcu104.html)|[zcu104-zynqmp](conf/machine/zcu104-zynqmp.conf)|`zcu104-revc`| +||[Xilinx ZCU106](https://www.xilinx.com/products/boards-and-kits/zcu106.html)|[zcu106-zynqmp](conf/machine/zcu106-zynqmp.conf)|`zcu106-reva`| +||[Xilinx ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html)|[zcu111-zynqmp](conf/machine/zcu111-zynqmp.conf)|`zcu111-reva`| +||[Xilinx ZCU1275](https://www.xilinx.com/products/boards-and-kits/zcu1275.html)|[zcu1275-zynqmp](conf/machine/zcu1275-zynqmp.conf)|`zcu1275-revb`| +||[Xilinx ZCU1285](https://www.xilinx.com/products/boards-and-kits/zcu1285.html)|[zcu1285-zynqmp](conf/machine/zcu1285-zynqmp.conf)|`zcu1285-reva`| +||[Xilinx ZCU208](https://www.xilinx.com/products/boards-and-kits/zcu208.html)|[zcu208-zynqmp](conf/machine/zcu208-zynqmp.conf)|`zcu208-reva`| +||[Xilinx ZCU216](https://www.xilinx.com/products/boards-and-kits/zcu216.html)|[zcu216-zynqmp](conf/machine/zcu216-zynqmp.conf)|`zcu216-reva`| +|Versal|[Xilinx VCK190](https://www.xilinx.com/products/boards-and-kits/vck190.html)|[vck190-versal](conf/machine/vck190-versal.conf)|`versal-vck190-reva-x-ebm-01-reva`| +||[Xilinx VMK180](https://www.xilinx.com/products/boards-and-kits/vmk180.html)|[vmk180-versal](conf/machine/vmk180-versal.conf)|`versal-vmk180-reva-x-ebm-01-reva`| +||[Xilinx VCK5000](https://www.xilinx.com/products/boards-and-kits/vck5000.html)|[vck5000-versal](conf/machine/vck5000-versal.conf)|`versal-vck5000-reva-x-ebm-01-reva`| -Additional information on Xilinx architectures can be found at: - http://www.xilinx.com/support/index.htm +> **Note:** Additional information on Xilinx architectures can be found at: + https://www.xilinx.com/products/silicon-devices.html -For Zybo Linux BD reference design, please see meta-xilinx-contrib layer - -Maintainers, Mailing list, Patches -================================== - -Please send any patches, pull requests, comments or questions for this layer to -the [meta-xilinx mailing list](https://lists.yoctoproject.org/listinfo/meta-xilinx): - - meta-xilinx@lists.yoctoproject.org - -Maintainers: - - Sai Hari Chandana Kalluri - Mark Hatle - -Dependencies -============ +## Dependencies This layer depends on: @@ -58,31 +40,9 @@ This layer depends on: URI: git://git.openembedded.org/openembedded-core layers: meta + branch: master or xilinx current release version (e.g. hosister) -Recipe Licenses -=============== - -Due to licensing restrictions some recipes in this layer rely on closed source -or restricted content provided by Xilinx. In order to use these recipes you must -accept or agree to the licensing terms (e.g. EULA, Export Compliance, NDA, -Redistribution, etc). This layer **does not enforce** any legal requirement, it -is the **responsibility of the user** the ensure that they are in compliance -with any licenses or legal requirements for content used. - -In order to use recipes that rely on restricted content the `xilinx` license -flag must be white-listed in the build configuration (e.g. `local.conf`). This -can be done on a per package basis: - - LICENSE_FLAGS_WHITELIST += "xilinx_pmu-rom" - -or generally: - - LICENSE_FLAGS_WHITELIST += "xilinx" - -Generally speaking Xilinx content that is provided as a restricted download -cannot be obtained without a Xilinx account, in order to use this content you -must first download it with your Xilinx account and place the downloaded content -in the `downloads/` directory of your build or on a `PREMIRROR`. Attempting to -fetch the content using bitbake will fail, indicating the URL from which to -acquire the content. + URI: git://git.yoctoproject.org/meta-xilinx.git + layers: meta-xilinx-microblaze, meta-xilinx-core + branch: master or xilinx current release version (e.g. hosister) diff --git a/meta-xilinx-bsp/conf/layer.conf b/meta-xilinx-bsp/conf/layer.conf index b5bb3b193..051ca361e 100644 --- a/meta-xilinx-bsp/conf/layer.conf +++ b/meta-xilinx-bsp/conf/layer.conf @@ -16,4 +16,4 @@ BBFILE_PRIORITY_xilinx-bsp = "5" LAYERDEPENDS_xilinx-bsp = "xilinx" -LAYERSERIES_COMPAT_xilinx-bsp = "honister" +LAYERSERIES_COMPAT_xilinx-bsp = "langdale" diff --git a/meta-xilinx-bsp/conf/machine/qemu-zynq7.conf b/meta-xilinx-bsp/conf/machine/qemu-zynq7.conf deleted file mode 100644 index f28e3d4aa..000000000 --- a/meta-xilinx-bsp/conf/machine/qemu-zynq7.conf +++ /dev/null @@ -1,9 +0,0 @@ -#@TYPE: Machine -#@NAME: qemu-zynq7 -#@DESCRIPTION: Zynq QEMU machine support ('xilinx-zynq-a9' model) - -require conf/machine/zynq-generic.conf - -# Use the networking setup from qemuarm -MACHINEOVERRIDES:prepend:pn-init-ifupdown = "qemuall:" -FILESOVERRIDES:append:pn-init-ifupdown = ":qemuarm" diff --git a/meta-xilinx-bsp/conf/machine/s3adsp1800-qemu-microblazeeb.conf b/meta-xilinx-bsp/conf/machine/s3adsp1800-qemu-microblazeeb.conf deleted file mode 100644 index 126213578..000000000 --- a/meta-xilinx-bsp/conf/machine/s3adsp1800-qemu-microblazeeb.conf +++ /dev/null @@ -1,21 +0,0 @@ -#@TYPE: Machine -#@NAME: s3adsp1800-qemu-microblazeeb -#@DESCRIPTION: MicroBlaze QEMU machine support ('petalogix-s3adsp1800' model) - -TUNE_FEATURES:tune-microblaze ?= "microblaze v8.00 bigendian barrel-shift pattern-compare multiply-low" - -require conf/machine/microblaze-generic.conf - -MACHINE_FEATURES = "" - -USE_VT = "" -SERIAL_CONSOLES ?= "115200;ttyUL0" - -KERNEL_IMAGETYPE ?= "linux.bin.ub" - -# This machine is a targeting a QEMU model, runqemu setup: -QB_MEM = "-m 256" -QB_MACHINE = "-machine petalogix-s3adsp1800" -QB_OPT_APPEND = "-nographic -serial mon:stdio" -QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@" - diff --git a/meta-xilinx-bsp/conf/machine/v350-versal.conf b/meta-xilinx-bsp/conf/machine/v350-versal.conf deleted file mode 100644 index d865dc5ad..000000000 --- a/meta-xilinx-bsp/conf/machine/v350-versal.conf +++ /dev/null @@ -1,19 +0,0 @@ -#@TYPE: Machine -#@NAME: v350-versal -##@DESCRIPTION: Machine support for v350 versal. - -SOC_VARIANT = "ai-core" - -require conf/machine/versal-generic.conf - -# Add board compatibility override -MACHINEOVERRIDES .= ":v350" - -EXTRA_IMAGEDEPENDS += " \ - arm-trusted-firmware \ - virtual/boot-bin \ - virtual/bootloader \ - virtual/psm-firmware \ - virtual/plm \ - u-boot-zynq-scr \ -" diff --git a/meta-xilinx-bsp/conf/machine/vc-p-a2197-00-versal.conf b/meta-xilinx-bsp/conf/machine/vc-p-a2197-00-versal.conf deleted file mode 100644 index c20166e31..000000000 --- a/meta-xilinx-bsp/conf/machine/vc-p-a2197-00-versal.conf +++ /dev/null @@ -1,10 +0,0 @@ -#@TYPE: Machine -#@NAME: vc-p-a2197-versal -##@DESCRIPTION: Machine support for vc-p-a2197 versal . - -SOC_VARIANT = "ai-core" - -require conf/machine/versal-generic.conf - -# Add board compatibility override -MACHINEOVERRIDES .= ":vc-p-a2197-00" diff --git a/meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend index f3c932db9..2640c2c20 100644 --- a/meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend +++ b/meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend @@ -1,7 +1,3 @@ -YAML_MAIN_MEMORY_CONFIG:ultra96 ?= "psu_ddr_0" -YAML_CONSOLE_DEVICE_CONFIG:ultra96 ?= "psu_uart_1" -YAML_DT_BOARD_FLAGS:ultra96 ?= "{BOARD avnet-ultra96-rev1}" - YAML_MAIN_MEMORY_CONFIG:kc705 ?= "mig_7series_0" YAML_CONSOLE_DEVICE_CONFIG:kc705 ?= "axi_uartlite_0" YAML_DT_BOARD_FLAGS:kc705 ?= "{BOARD kc705-full}" @@ -10,7 +6,6 @@ YAML_DT_BOARD_FLAGS:zcu102 ?= "{BOARD zcu102-rev1.0}" YAML_DT_BOARD_FLAGS:zcu106 ?= "{BOARD zcu106-reva}" YAML_DT_BOARD_FLAGS:zc702 ?= "{BOARD zc702}" YAML_DT_BOARD_FLAGS:zc706 ?= "{BOARD zc706}" -YAML_DT_BOARD_FLAGS:zedboard ?= "{BOARD zedboard}" YAML_DT_BOARD_FLAGS:zc1254 ?= "{BOARD zc1254-reva}" YAML_DT_BOARD_FLAGS:zcu104 ?= "{BOARD zcu104-revc}" YAML_DT_BOARD_FLAGS:zcu111 ?= "{BOARD zcu111-reva}" diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend index 94020f25a..83f8c57b6 100644 --- a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend +++ b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend @@ -1,19 +1,9 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files:" # device tree sources for the various machines -COMPATIBLE_MACHINE:picozed-zynq7 = ".*" -SRC_URI:append:picozed-zynq7 = " file://picozed-zynq7.dts" - COMPATIBLE_MACHINE:qemu-zynq7 = ".*" SRC_URI:append:qemu-zynq7 = " file://qemu-zynq7.dts" -COMPATIBLE_MACHINE:zybo-linux-bd-zynq7 = ".*" -SRC_URI:append:zybo-linux-bd-zynq7 = " \ - file://zybo-linux-bd-zynq7.dts \ - file://pcw.dtsi \ - file://pl.dtsi \ - " - COMPATIBLE_MACHINE:kc705-microblazeel = ".*" SRC_URI:append:kc705-microblazeel = " \ file://kc705-microblazeel.dts \ diff --git a/meta-xilinx-contrib/README.md b/meta-xilinx-contrib/README.md index 952392af0..1b11d3474 100644 --- a/meta-xilinx-contrib/README.md +++ b/meta-xilinx-contrib/README.md @@ -1,35 +1,21 @@ -meta-xilinx-contrib -=================== +# meta-xilinx-contrib This layer is a contribution layer to support for MicroBlaze, Zynq and ZynqMP architectures. -This layer depends on meta-xilinx-bsp layer. +Any patches from open source contributors for vendor board can be added here. -Supported Boards/Machines -========================= +## Supported Boards/Machines -* Zynq: - * Digilent Zybo Linux BD Reference design - * [Avnet MiniZed](conf/machine/minized-zynq7.conf) - `minized-zynq7` +**Boards/Machines supported by this layer:** -Maintainers, Mailing list, Patches -================================== -Please send any patches, comments or questions for this layer to -the [meta-xilinx mailing list](https://lists.yoctoproject.org/listinfo/meta-xilinx): +| Platform | Vendor Board Variant | Machine Configuration file | Board Device tree | +| ---| --- | ---| ---------- | +|MicroBlaze|[Xilinx ML605 (QEMU)](https://www.digikey.com/en/products/detail/amd-xilinx/EK-V6-ML605-G/2175174)|[ml605-qemu-microblazeel](conf/machine/ml605-qemu-microblazeel.conf)|NA| +|Zynq-7000|NA|NA|NA| +|ZynqMP|NA|NA|NA| +|Versal|NA|NA|NA| - meta-xilinx@lists.yoctoproject.org with '[meta-xilinx-contrib]' in the subject. - - -Subscribe to mailing list at -https://lists.yoctoproject.org/listinfo/meta-xilinx - -Maintainers: - - Sai Hari Chandana Kalluri - Mark Hatle - -Dependencies -============ +## Dependencies This layer depends on: @@ -37,7 +23,9 @@ This layer depends on: URI: git://git.openembedded.org/openembedded-core layers: meta + branch: master or xilinx current release version (e.g. hosister) - URI: git://git.openembedded.org/meta-xilinx - + URI: git://git.yoctoproject.org/meta-xilinx.git + layers: meta-xilinx-microblaze, meta-xilinx-core, meta-xilinx-vendor + branch: master or xilinx current release version (e.g. hosister) diff --git a/meta-xilinx-bsp/conf/machine/ml605-qemu-microblazeel.conf b/meta-xilinx-contrib/conf/machine/ml605-qemu-microblazeel.conf similarity index 100% rename from meta-xilinx-bsp/conf/machine/ml605-qemu-microblazeel.conf rename to meta-xilinx-contrib/conf/machine/ml605-qemu-microblazeel.conf diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.1.bbappend b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.1.bbappend index 2ce919ac1..8ba7a4909 100644 --- a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.1.bbappend +++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2022.1.bbappend @@ -1,9 +1,12 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/linux-xlnx:" -SRC_URI:append:zybo-linux-bd-zynq7 = " \ - file://0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch \ - file://0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch \ - file://0003-drm-xilinx-Fix-DPMS-transition-to-on.patch \ - " +# Note: These patches are very old and doesn't apply on top of 5.x +# kernel. For more details refer README.md file. + +#SRC_URI:append:zybo-linux-bd-zynq7 = " \ +# file://0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch \ +# file://0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch \ +# file://0003-drm-xilinx-Fix-DPMS-transition-to-on.patch \ +# " SRC_URI:append:minized-zynq7 = " file://0004-minized-wifi-bluetooth.cfg" diff --git a/meta-xilinx-core/README.md b/meta-xilinx-core/README.md index 8997760c7..d450c4b3e 100644 --- a/meta-xilinx-core/README.md +++ b/meta-xilinx-core/README.md @@ -1,24 +1,8 @@ -meta-xilinx-core -================ +# meta-xilinx-core -This layer provides support for MicroBlaze, Zynq and ZynqMP. +This layer provides support for MicroBlaze, Zynq, ZynqMP and Versal architectures. - -Maintainers, Mailing list, Patches -================================== - -Please send any patches, pull requests, comments or questions for this layer to -the [meta-xilinx mailing list](https://lists.yoctoproject.org/listinfo/meta-xilinx): - - meta-xilinx@lists.yoctoproject.org - -Maintainers: - - Sai Hari Chandana Kalluri - Mark Hatle - -Dependencies -============ +## Dependencies This layer depends on: @@ -26,9 +10,10 @@ This layer depends on: URI: git://git.openembedded.org/openembedded-core layers: meta + branch: master or xilinx current release version (e.g. hosister) + -Configuring Machines -==================== +## Configuring Machines All machines that use meta-xilinx-tools should be derived from one of the following: microblaze-generic, zynq-generic, zynqmp-generic, or @@ -58,8 +43,7 @@ require you to specify the path to a PDI file using PDI_PATH. The XSCT version will extract the PDI automatically. -Recipe Licenses -=============== +## Recipe Licenses Due to licensing restrictions some recipes in this layer rely on closed source or restricted content provided by Xilinx. In order to use these recipes you must diff --git a/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass b/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass index 633180878..9532287d6 100644 --- a/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass +++ b/meta-xilinx-core/classes/image-types-xilinx-qemu.bbclass @@ -5,6 +5,55 @@ # block device to match that of valid SD card sizes (which are multiples of # 512K). -CONVERSIONTYPES:append = " qemu-sd" -CONVERSION_CMD:qemu-sd = "cp ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type} ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd; truncate -s %256M ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd" -CONVERSION_DEPENDS_qemu-sd = "coreutils-native" +CONVERSIONTYPES:append = " qemu-sd qemu-sd-fatimg" +CONVERSION_CMD:qemu-sd () { + cp ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type} ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd + # Get the wic.qemu-sd file size + file_size=`stat -c '%s' ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd` + powerof2=1 + file_size=${file_size%.*} + # Get the next power of 2 value for the image size value + while [ ${powerof2} -lt ${file_size} ]; do + powerof2=$(expr $powerof2 \* 2) + done + # Resize the image using qemu-img + qemu-img resize -f raw ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd ${powerof2} +} + +BOOT_VOLUME_ID ?= "BOOT" +BOOT_SPACE ?= "1047552" +IMAGE_ALIGNMENT ?= "1024" + +# Create SD image in case of INITRAMFS_IMAGE set due to circular dependencies. +# This creates FAT partitioned SD image containing boot.bin,boot.scr and rootfs.cpio.gz.u-boot files. +# This is a workaround fix until we fix the circular dependencies +# Usage: IMAGE_FSTYPES:append = " cpio.gz.u-boot.qemu-sd-fatimg" +CONVERSION_CMD:qemu-sd-fatimg () { + QEMU_IMG="${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type}.qemu-sd-fatimg" + BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE} + ${IMAGE_ALIGNMENT} - 1) + BOOT_SPACE_ALIGNED=$(expr ${BOOT_SPACE_ALIGNED} - ${BOOT_SPACE_ALIGNED} % ${IMAGE_ALIGNMENT}) + QEMUIMG_SIZE=$(expr ${IMAGE_ALIGNMENT} + ${BOOT_SPACE_ALIGNED}) + dd if=/dev/zero of=${QEMU_IMG} bs=1024 count=0 seek=${QEMUIMG_SIZE} + parted -s ${QEMU_IMG} mklabel msdos + parted -s ${QEMU_IMG} unit KiB mkpart primary fat32 ${IMAGE_ALIGNMENT} $(expr ${BOOT_SPACE_ALIGNED} \+ ${IMAGE_ALIGNMENT} \- 1) + parted -s ${QEMU_IMG} set 1 boot on + parted ${QEMU_IMG} print + BOOT_BLOCKS=$(LC_ALL=C parted -s ${QEMU_IMG} unit b print | awk '/ 1 / { print substr($4, 1, length($4 -1)) / 512 /2 }') + rm -f ${WORKDIR}/${BOOT_VOLUME_ID}.img + mkfs.vfat -n "${BOOT_VOLUME_ID}" -S 512 -C ${WORKDIR}/${BOOT_VOLUME_ID}.img $BOOT_BLOCKS + if [ -e ${DEPLOY_DIR_IMAGE}/boot.bin ]; then + mcopy -i ${WORKDIR}/${BOOT_VOLUME_ID}.img -s ${DEPLOY_DIR_IMAGE}/boot.bin ::/ + fi + if [ -e ${DEPLOY_DIR_IMAGE}/boot.scr ]; then + mcopy -i ${WORKDIR}/${BOOT_VOLUME_ID}.img -s ${DEPLOY_DIR_IMAGE}/boot.scr ::/ + fi + if [ ${INITRAMFS_IMAGE} = ${IMAGE_BASENAME} ] && [ x"${INITRAMFS_IMAGE_BUNDLE}" != "x1" ]; then + mcopy -i ${WORKDIR}/${BOOT_VOLUME_ID}.img -s ${IMAGE_NAME}${IMAGE_NAME_SUFFIX}.${type} ::rootfs.cpio.gz.u-boot + fi + dd if=${WORKDIR}/${BOOT_VOLUME_ID}.img of=${QEMU_IMG} conv=notrunc seek=1 bs=$(expr ${IMAGE_ALIGNMENT} \* 1024) +} + +CONVERSION_DEPENDS_qemu-sd = "qemu-xilinx-system-native" +CONVERSION_DEPENDS_qemu-sd-fatimg = "mtools-native:do_populate_sysroot \ + dosfstools-native:do_populate_sysroot \ + parted-native:do_populate_sysroot" diff --git a/meta-xilinx-core/classes/qemuboot-xilinx.bbclass b/meta-xilinx-core/classes/qemuboot-xilinx.bbclass index 48dfa6e25..59d3f0abf 100644 --- a/meta-xilinx-core/classes/qemuboot-xilinx.bbclass +++ b/meta-xilinx-core/classes/qemuboot-xilinx.bbclass @@ -12,6 +12,10 @@ QB_MACHINE_XILINX:microblaze = "-M microblaze-fdt-plnx" # defaults QB_DEFAULT_KERNEL ?= "none" +QB_DEFAULT_KERNEL:zynq ?= "${@'zImage' if \ + d.getVar('INITRAMFS_IMAGE_BUNDLE') != '1' else 'zImage-initramfs-${MACHINE}.bin'}" +QB_DEFAULT_KERNEL:microblaze ?= "${@'simpleImage.mb' if \ + d.getVar('INITRAMFS_IMAGE_BUNDLE') != '1' else 'simpleImage.mb-initramfs-${MACHINE}.bin'}" inherit qemuboot diff --git a/meta-xilinx-core/conf/bblayers.conf.sample b/meta-xilinx-core/conf/bblayers.conf.sample index 890ef3b66..a98e8936d 100644 --- a/meta-xilinx-core/conf/bblayers.conf.sample +++ b/meta-xilinx-core/conf/bblayers.conf.sample @@ -23,6 +23,7 @@ BBLAYERS ?= " \ ##OEROOT##/../meta-xilinx/meta-xilinx-pynq \ ##OEROOT##/../meta-xilinx/meta-xilinx-standalone \ ##OEROOT##/../meta-xilinx/meta-xilinx-contrib \ + ##OEROOT##/../meta-xilinx/meta-xilinx-vendor \ ##OEROOT##/../meta-xilinx-tools \ ##OEROOT##/../meta-petalinux \ ##OEROOT##/../meta-virtualization \ diff --git a/meta-xilinx-core/conf/layer.conf b/meta-xilinx-core/conf/layer.conf index 457853f79..5c27aa73d 100644 --- a/meta-xilinx-core/conf/layer.conf +++ b/meta-xilinx-core/conf/layer.conf @@ -23,7 +23,7 @@ virtualization-layer:${LAYERDIR}/dynamic-layers/virtualization-layer/recipes-*/* LAYERDEPENDS_xilinx = "core" LAYERRECOMMENDS_xilinx = "openembedded-layer chromium-browser-layer" -LAYERSERIES_COMPAT_xilinx = "honister" +LAYERSERIES_COMPAT_xilinx = "langdale" SIGGEN_EXCLUDE_SAFE_RECIPE_DEPS += " \ *->zocl \ diff --git a/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc b/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc index a15e92c6a..a4b0c59a4 100644 --- a/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc +++ b/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc @@ -46,6 +46,7 @@ def get_default_image_boot_files(d): # kernel images kerneltypes = set((d.getVar("KERNEL_IMAGETYPE") or "").split()) kerneltypes |= set((d.getVar("KERNEL_IMAGETYPES") or "").split()) + kerneltypes |= set((d.getVar("KERNEL_ALT_IMAGETYPE") or "").split()) for i in kerneltypes: files.append(i) diff --git a/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc b/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc index c2093ca61..0fcc5087f 100644 --- a/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc +++ b/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc @@ -5,13 +5,71 @@ IMAGE_CLASSES += "qemuboot-xilinx" # depend on qemu-helper-native, which will depend on QEMU -EXTRA_IMAGEDEPENDS += "qemu-helper-native" +EXTRA_IMAGEDEPENDS += "qemu-helper-native:do_addto_recipe_sysroot" PREFERRED_PROVIDER_qemu-helper-native = "qemu-xilinx-helper-native" PREFERRED_PROVIDER_qemu = "qemu-xilinx" PREFERRED_PROVIDER_qemu-native = "qemu-xilinx-native" PREFERRED_PROVIDER_nativesdk-qemu = "nativesdk-qemu-xilinx" +def qemu_add_extra_args(d): + initramfs_image = d.getVar('INITRAMFS_IMAGE') or "" + bundle_image = d.getVar('INITRAMFS_IMAGE_BUNDLE') or "" + deploy_dir = d.getVar('DEPLOY_DIR_IMAGE') or "" + machine_name = d.getVar('MACHINE') or "" + soc_family = d.getVar('SOC_FAMILY') or "" + qb_extra_args = '' + # Add kernel image and boot.scr to qemu boot command when initramfs_image supplied + kernel_name = '' + bootscr_image = '%s/boot.scr' % deploy_dir + if soc_family in ('zynqmp', 'versal'): + kernel_name = 'Image' + bootscr_loadaddr = '0x20000000' + if initramfs_image: + kernel_image = '%s/%s' % (deploy_dir, kernel_name) + if bundle_image == "1": + kernel_image = '%s/%s-initramfs-%s.bin' % (deploy_dir, kernel_name, machine_name) + kernel_loadaddr = '0x200000' + if kernel_name: + qb_extra_args = ' -device loader,file=%s,addr=%s,force-raw=on' % (kernel_image, kernel_loadaddr) + qb_extra_args += ' -device loader,file=%s,addr=%s,force-raw=on' % (bootscr_image, bootscr_loadaddr) + if soc_family == 'versal': + qb_extra_args += ' -boot mode=5' + else: + if soc_family in ('zynqmp', 'versal'): + qb_extra_args = ' -boot mode=5' + return qb_extra_args + +def qemu_rootfs_params(d,param): + initramfs_image = d.getVar('INITRAMFS_IMAGE') or "" + bundle_image = d.getVar('INITRAMFS_IMAGE_BUNDLE') or "" + soc_family = d.getVar('SOC_FAMILY') or "" + tune_features = (d.getVar('TUNE_FEATURES') or []).split() + if param == 'rootfs': + return 'none' if bundle_image == "1" else '' + elif param == 'fstype': + fstype_dict = { + "microblaze": "cpio.gz", + "zynq": "cpio.gz", + "zynqmp": "cpio.gz.u-boot", + "versal": "cpio.gz.u-boot.qemu-sd-fatimg" + } + if 'microblaze' in tune_features: + soc_family = 'microblaze' + if not initramfs_image: + image_fs = d.getVar('IMAGE_FSTYPES') + if 'wic.qemu-sd' in image_fs: + return 'wic.qemu-sd' + return fstype_dict[soc_family] + + elif param == 'rootfs-opt': + if not initramfs_image or soc_family == 'versal': + sd_index = "1" + if soc_family == 'zynq': sd_index = "0" + return ' -drive if=sd,index=%s,file=@ROOTFS@,format=raw' % (sd_index) + elif soc_family not in ('zynq') or 'microblaze' in tune_features: + return ' -device loader,file=@ROOTFS@,addr=0x04000000,force-raw=on' + def qemu_default_dtb(d): if d.getVar("IMAGE_BOOT_FILES", True): dtbs = d.getVar("IMAGE_BOOT_FILES", True).split(" ") @@ -51,5 +109,3 @@ QB_SYSTEM_NAME:aarch64 ?= "${@qemu_target_binary(d)}-multiarch" QB_SYSTEM_NAME ?= "${@qemu_target_binary(d)}" QB_DEFAULT_FSTYPE ?= "cpio" QB_DTB ?= "${@qemu_default_dtb(d)}" -QB_KERNEL_CMDLINE_APPEND ?= "${@qemu_default_serial(d)}" - diff --git a/meta-xilinx-core/conf/machine/microblaze-generic.conf b/meta-xilinx-core/conf/machine/microblaze-generic.conf index 9004282ac..6611d529a 100644 --- a/meta-xilinx-core/conf/machine/microblaze-generic.conf +++ b/meta-xilinx-core/conf/machine/microblaze-generic.conf @@ -29,16 +29,33 @@ MACHINE_ARCH = "${@['${MB_MACHINE_ARCH}', '${DEF_MACHINE_ARCH}']['microblaze-gen MACHINE_FEATURES = "" -KERNEL_IMAGETYPE = "linux.bin.ub" +KERNEL_IMAGETYPE ?= "linux.bin.ub" KERNEL_IMAGETYPES = "" SERIAL_CONSOLES ?= "115200;ttyS0" +MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree" + +IMAGE_BOOT_FILES += " \ + ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ + " + EXTRA_IMAGEDEPENDS += "libyaml-native python3-cython-native python3-pyyaml-native" UBOOT_MACHINE ?= "microblaze-generic_defconfig" UBOOT_INITIAL_ENV = "" +HDF_MACHINE = "kc705-microblazeel" +IMAGE_FSTYPES += "cpio.gz" +QB_ROOTFS:qemuboot-xilinx = "${@qemu_rootfs_params(d,'rootfs')}" +QB_DEFAULT_FSTYPE:qemuboot-xilinx = "${@qemu_rootfs_params(d,'fstype')}" +QB_ROOTFS_OPT:qemuboot-xilinx = " ${@qemu_rootfs_params(d,'rootfs-opt')}" + +QB_KERNEL_CMDLINE = "none" + +QB_OPT_APPEND ?= "" + +QB_NETWORK_DEVICE = "-net nic,netdev=eth0 -netdev user,id=eth0,tftp=${DEPLOY_DIR_IMAGE}" #### No additional settings should be after the Postamble #### Postamble PACKAGE_EXTRA_ARCHS:append = "${@['', ' ${MB_MACHINE_ARCH}']['microblaze-generic' != "${MACHINE}"]}" diff --git a/meta-xilinx-core/conf/machine/versal-generic.conf b/meta-xilinx-core/conf/machine/versal-generic.conf index 3509d8c4a..53b20cb83 100644 --- a/meta-xilinx-core/conf/machine/versal-generic.conf +++ b/meta-xilinx-core/conf/machine/versal-generic.conf @@ -29,7 +29,9 @@ HDF_MACHINE = "vck190-versal" # Default SD image build onfiguration, use qemu-sd to pad IMAGE_CLASSES += "image-types-xilinx-qemu" -IMAGE_FSTYPES += "wic.qemu-sd" +# Add wic.qemu-sd only if initramfs_image not set due to circular dependecies +IMAGE_FSTYPES += "${@'wic.qemu-sd' if (d.getVar('INITRAMFS_IMAGE') or '') == '' else 'cpio.gz.u-boot.qemu-sd-fatimg'}" + WKS_FILES ?= "sdimage-bootpart.wks" EXTRA_IMAGEDEPENDS += " \ @@ -58,12 +60,8 @@ QB_NETWORK_DEVICE = "" QB_KERNEL_CMDLINE_APPEND ?= "" QB_NET = "none" -QB_DEFAULT_FSTYPE:qemuboot-xilinx = "wic.qemu-sd" -QB_OPT_APPEND:append:qemuboot-xilinx = " -boot mode=5" -QB_ROOTFS_OPT:qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" - -# Use booti 80000 6000000 4000000 to launch -QB_OPT_APPEND ?= " -serial null -serial null -serial mon:stdio -display none" +QB_DEFAULT_FSTYPE:qemuboot-xilinx = "${@qemu_rootfs_params(d,'fstype')}" +QB_ROOTFS_OPT:qemuboot-xilinx = " ${@qemu_rootfs_params(d,'rootfs-opt')}" QEMU_HW_DTB_PATH = "${DEPLOY_DIR_IMAGE}/qemu-hw-devicetrees/multiarch" QEMU_HW_DTB_PS ?="${QEMU_HW_DTB_PATH}/board-versal-ps-vck190.dtb" @@ -74,8 +72,8 @@ QEMU_HW_DTB_PMC_vp1202-versal = "${QEMU_HW_DTB_PATH}/board-versal-vp1202-pmc-vir QB_OPT_APPEND:append:qemuboot-xilinx = " \ -hw-dtb ${QEMU_HW_DTB_PS} \ - -display none \ - -net nic -net user,tftp=${DEPLOY_DIR_IMAGE} \ + -serial null -serial null \ + ${@qemu_add_extra_args(d)} \ " # PLM instance args @@ -84,7 +82,7 @@ QB_PLM_OPT = " \ -device loader,file=${DEPLOY_DIR_IMAGE}/BOOT-${MACHINE}_bh.bin,addr=0xF201E000,force-raw \ -device loader,addr=0xf0000000,data=0xba020004,data-len=4 \ -device loader,addr=0xf0000004,data=0xb800fffc,data-len=4 \ - -device loader,file=${DEPLOY_DIR_IMAGE}/pmc_cdo.bin,addr=0xf2000000,force-raw \ + -device loader,file=${DEPLOY_DIR_IMAGE}/CDO/pmc_cdo.bin,addr=0xf2000000,force-raw \ -device loader,file=${DEPLOY_DIR_IMAGE}/plm-${MACHINE}.elf,cpu-num=1 \ -device loader,addr=0xF1110624,data=0x0,data-len=4 \ -device loader,addr=0xF1110620,data=0x1,data-len=4 \ diff --git a/meta-xilinx-core/conf/machine/zynq-generic.conf b/meta-xilinx-core/conf/machine/zynq-generic.conf index 59fc39763..1a7425e65 100644 --- a/meta-xilinx-core/conf/machine/zynq-generic.conf +++ b/meta-xilinx-core/conf/machine/zynq-generic.conf @@ -25,26 +25,38 @@ SERIAL_CONSOLES ?= "115200;ttyPS0" MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree" +IMAGE_BOOT_FILES += " \ + ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ + boot.scr \ + " + HDF_MACHINE = "zc702-zynq7" +IMAGE_CLASSES += "image-types-xilinx-qemu" +# Add wic.qemu-sd only if initramfs_image not set due to circular dependecies +IMAGE_FSTYPES += "${@'wic.qemu-sd' if (d.getVar('INITRAMFS_IMAGE') or '') == '' else 'cpio.gz'}" +WKS_FILES ?= "sdimage-bootpart.wks" QB_MEM = "-m 1024" -QB_NETWORK_DEVICE = "-net nic,netdev=eth0 -netdev user,id=eth0,tftp=/tftpboot -net nic" -QB_DEFAULT_KERNEL:qemuboot-xilinx = "zImage" - +QB_NETWORK_DEVICE = "-net nic,netdev=eth0 -netdev user,id=eth0,tftp=${DEPLOY_DIR_IMAGE} -net nic" QB_SYSTEM_NAME ?= "${@qemu_target_binary(d)}" -QB_DEFAULT_FSTYPE = "cpio.gz" -QB_DTB = "system.dtb" -QB_ROOTFS_OPT:qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" +QB_ROOTFS:qemuboot-xilinx = "${@qemu_rootfs_params(d,'rootfs')}" +QB_DEFAULT_FSTYPE:qemuboot-xilinx = "${@qemu_rootfs_params(d,'fstype')}" +QB_ROOTFS_OPT:qemuboot-xilinx = " ${@qemu_rootfs_params(d,'rootfs-opt')}" + +QB_KERNEL_CMDLINE = "none" + +QB_KERNEL_ROOT = "/dev/mmcblk0p2" # Replicate BootROM like behaviour, having loaded SPL and PMU(ROM+FW) -QB_OPT_APPEND = " \ - -nographic -serial null -serial mon:stdio \ +QB_OPT_APPEND ?= " \ + -serial null \ -gdb tcp::9000 \ -device loader,addr=0xf8000008,data=0xDF0D,data-len=4 \ -device loader,addr=0xf8000140,data=0x00500801,data-len=4 \ -device loader,addr=0xf800012c,data=0x1ed044d,data-len=4 \ -device loader,addr=0xf8000108,data=0x0001e008,data-len=4 \ -device loader,addr=0xF8000910,data=0xF,data-len=0x4 \ + -machine linux=on \ " #### No additional settings should be after the Postamble diff --git a/meta-xilinx-core/conf/machine/zynqmp-generic.conf b/meta-xilinx-core/conf/machine/zynqmp-generic.conf index 6bc423643..4f2fe8898 100644 --- a/meta-xilinx-core/conf/machine/zynqmp-generic.conf +++ b/meta-xilinx-core/conf/machine/zynqmp-generic.conf @@ -34,7 +34,8 @@ SPL_BINARY ?= "spl/boot.bin" # Default SD image build onfiguration, use qemu-sd to pad IMAGE_CLASSES += "image-types-xilinx-qemu" -IMAGE_FSTYPES += "wic.qemu-sd" +# Add wic.qemu-sd only if initramfs_image not set due to circular dependecies +IMAGE_FSTYPES += "${@'wic.qemu-sd' if (d.getVar('INITRAMFS_IMAGE') or '') == '' else 'cpio.gz.u-boot'}" WKS_FILES ?= "sdimage-bootpart.wks" SERIAL_CONSOLES ?= "115200;ttyPS0" @@ -54,6 +55,7 @@ EXTRA_IMAGEDEPENDS += " \ " IMAGE_BOOT_FILES += " \ + boot.bin \ uEnv.txt \ atf-uboot.ub \ ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \ @@ -62,7 +64,7 @@ IMAGE_BOOT_FILES += " \ # This machine has a QEMU model, runqemu setup: QB_MEM = "-m 4096" -QB_OPT_APPEND ?= "-nographic -serial mon:stdio -serial null" +QB_OPT_APPEND ?= "" QB_NETWORK_DEVICE = "-net nic -net nic -net nic -net nic,netdev=net0,macaddr=@MAC@" # Replicate BootROM like behaviour, having loaded SPL and PMU(ROM+FW) @@ -71,13 +73,13 @@ QB_OPT_APPEND:append:qemuboot-xilinx = " \ ${@qemu_zynqmp_unhalt(d, True)} \ -device loader,file=${DEPLOY_DIR_IMAGE}/arm-trusted-firmware.elf,cpu-num=0 \ -device loader,file=${DEPLOY_DIR_IMAGE}/u-boot.elf \ - -device loader,file=${DEPLOY_DIR_IMAGE}/system.dtb,addr=0x100000 \ + -device loader,file=${DEPLOY_DIR_IMAGE}/system.dtb,addr=0x100000,force-raw=on \ + ${@qemu_add_extra_args(d)} \ " -# Attach the rootfs disk image to the second SD interface of QEMU (which is SD0) -QB_DEFAULT_FSTYPE:qemuboot-xilinx = "wic.qemu-sd" -QB_OPT_APPEND:append:qemuboot-xilinx = " -boot mode=5" -QB_ROOTFS_OPT:qemuboot-xilinx = " -drive if=sd,index=1,file=@ROOTFS@,format=raw" +QB_ROOTFS:qemuboot-xilinx = "${@qemu_rootfs_params(d,'rootfs')}" +QB_DEFAULT_FSTYPE:qemuboot-xilinx = "${@qemu_rootfs_params(d,'fstype')}" +QB_ROOTFS_OPT:qemuboot-xilinx = "${@qemu_rootfs_params(d,'rootfs-opt')}" QB_PMU_OPT = " \ -M microblaze-fdt \ diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc index 4b076444d..ed391160b 100644 --- a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc +++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware.inc @@ -1,6 +1,6 @@ DESCRIPTION = "ARM Trusted Firmware" -LICENSE = "BSD" +LICENSE = "BSD-3-Clause" LIC_FILES_CHKSUM ?= "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031" PROVIDES = "virtual/arm-trusted-firmware" diff --git a/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb b/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb index c5bd75c6e..30cc362d5 100644 --- a/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb +++ b/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb @@ -3,7 +3,7 @@ DESCRIPTION = "Xilinx BSP device trees from within layer." SECTION = "bsp" # the device trees from within the layer are licensed as MIT, kernel includes are GPL -LICENSE = "MIT & GPLv2" +LICENSE = "MIT & GPL-2.0-or-later" LIC_FILES_CHKSUM = " \ file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302 \ file://${COMMON_LICENSE_DIR}/GPL-2.0-or-later;md5=fed54355545ffd980b814dab4a3b312c \ diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc index 717b8dd31..5f09a99fe 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc @@ -1,6 +1,7 @@ # U-boot fitimage/blob generator -UBOOT_IMAGE_BLOB ?= "" +UBOOT_IMAGE_BLOB_DEFAULT = "" +UBOOT_IMAGE_BLOB ?= "${UBOOT_IMAGE_BLOB_DEFAULT}" DT_BLOB_DIR ?= "${B}/arch/arm/dts/dt-blob" UBOOT_BLOB_NAME ?= "${MACHINE}-fit-dtb${IMAGE_VERSION_SUFFIX}.blob" diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-dev.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-dev.bb index 3e40bfa17..0c7685a57 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-dev.bb +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-dev.bb @@ -17,12 +17,3 @@ SRCREV ?= "${@oe.utils.conditional("PREFERRED_PROVIDER_virtual/bootloader", "u-b PV = "${UBRANCH}-xilinx-dev+git${SRCPV}" -# Newer versions of u-boot have support for these -HAS_PLATFORM_INIT ?= " \ - zynq_microzed_config \ - zynq_zed_config \ - zynq_zc702_config \ - zynq_zc706_config \ - zynq_zybo_config \ - " - diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc index 909dd72aa..5a9a08681 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc @@ -20,10 +20,17 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/u-boot:" SYSROOT_DIRS += "/boot" BASE_DTS ?= "${@os.path.basename(d.getVar('CONFIG_DTFILE') or '').rstrip('.dtb') or 'system-top'}" -DTB_PATH ?= "/boot/devicetree/" +DTB_PATH ?= "boot/devicetree/" DTB_NAME ?= "" -EXTRA_OEMAKE += "${@'EXT_DTB=${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_NAME}' if (d.getVar('DTB_NAME') != '') else '' }" +# This vairable is used for U-boot user specified dts from u-boot repo path +# u-boot-xlnx/arch/arm/dts/versal-vck190-revA-x-ebm-01-revA.dts. +# Note: .dts extension is not required for this variable settings. +# Example: UBOOT_USER_SPECIFIED_DTS = "versal-vck190-revA-x-ebm-01-revA" +UBOOT_USER_SPECIFIED_DTS ?= "" + +EXTRA_OEMAKE += "${@'EXT_DTB=${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_NAME}' if (d.getVar('DTB_NAME') != '' and d.getVar('UBOOT_USER_SPECIFIED_DTS') == '') else '' }" +EXTRA_OEMAKE += "${@'DEVICE_TREE=${UBOOT_USER_SPECIFIED_DTS}' if (d.getVar('UBOOT_USER_SPECIFIED_DTS') != '') else '' }" python __anonymous () { #check if there are any dtb providers @@ -34,6 +41,14 @@ python __anonymous () { d.setVar('DTB_NAME', d.getVar('BASE_DTS')+ '.dtb') } +do_configure:prepend () { + if [ -n "${UBOOT_USER_SPECIFIED_DTS}" && ! -f ${S}/arch/arm/dts/${UBOOT_USER_SPECIFIED_DTS}.dts ]; then + bbfatal "Uboot user specified dts (${UBOOT_USER_SPECIFIED_DTS}.dts) is not found in \ +the${S}/arch/arm/dts directory, you need to patch dts file to u-boot source and use this configuration. \ +For more details refer https://u-boot.readthedocs.io/en/latest/develop/devicetree/control.html#configuration " + fi +} + require u-boot-xlnx-blob.inc UBOOTELF_NODTB_IMAGE ?= "u-boot-nodtb.elf" @@ -56,4 +71,11 @@ do_deploy:prepend() { ln -sf ${UBOOT_NODTB_IMAGE} ${DEPLOYDIR}/${UBOOT_NODTB_SYMLINK} ln -sf ${UBOOT_NODTB_IMAGE} ${DEPLOYDIR}/${UBOOT_NODTB_BINARY} fi + + # In ZynqMP u-boot.dtb is generated by default but not for versal, Hence manually deploy. + if [ "${SOC_FAMILY}" == "versal" ]; then + if [ -f ${B}/arch/arm/dts/${UBOOT_USER_SPECIFIED_DTS}.dtb ]; then + install -Dm 0644 ${B}/arch/arm/dts/${UBOOT_USER_SPECIFIED_DTS}.dtb ${DEPLOYDIR}/u-boot.dtb + fi + fi } diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-uenv.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-uenv.bb index 861479b2f..829368949 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-uenv.bb +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-zynq-uenv.bb @@ -4,8 +4,6 @@ LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda INHIBIT_DEFAULT_DEPS = "1" -DEPENDS:append := "virtual/kernel ${@oe.utils.str_filter_out(d.getVar("BPN"), d.getVar("EXTRA_IMAGEDEPENDS"), d)}" - COMPATIBLE_MACHINE = "^$" COMPATIBLE_MACHINE:zynq = ".*" COMPATIBLE_MACHINE:zynqmp = ".*" @@ -14,6 +12,18 @@ PACKAGE_ARCH = "${MACHINE_ARCH}" inherit deploy image-wic-utils +def remove_task_from_depends(d): + extra_imagedepends = d.getVar('EXTRA_IMAGEDEPENDS') or '' + uenv_depends = '' + for imagedepend in extra_imagedepends.split(): + if imagedepend == d.getVar("BPN"): + continue + elif ':' in imagedepend: + uenv_depends += ' %s' % imagedepend.split(':')[0] + else: + uenv_depends += ' %s' % imagedepend + return uenv_depends + def uboot_boot_cmd(d): if d.getVar("KERNEL_IMAGETYPE") in ["uImage", "fitImage"]: return "bootm" @@ -67,6 +77,8 @@ def uenv_populate(d): return env +DEPENDS:append := "virtual/kernel ${@remove_task_from_depends(d)}" + # bootargs, default to booting with the rootfs device being partition 2 KERNEL_BOOTARGS:zynq = "earlyprintk console=ttyPS0,115200 root=/dev/mmcblk0p2 rw rootwait" KERNEL_BOOTARGS:zynqmp = "earlycon clk_ignore_unused root=/dev/mmcblk${devnum}p2 rw rootwait" diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot_%.bbappend b/meta-xilinx-core/recipes-bsp/u-boot/u-boot_%.bbappend index b85223699..56083ce34 100644 --- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot_%.bbappend +++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot_%.bbappend @@ -1,11 +1,2 @@ include u-boot-spl-zynq-init.inc -# u-boot 2016.11 has support for these -HAS_PLATFORM_INIT ??= " \ - zynq_microzed_config \ - zynq_zed_config \ - zynq_zc702_config \ - zynq_zc706_config \ - zynq_zybo_config \ - " - diff --git a/meta-xilinx-core/recipes-devtools/qemu/files/qemu-system-aarch64-multiarch b/meta-xilinx-core/recipes-devtools/qemu/files/qemu-system-aarch64-multiarch index 6f7fb5225..370e694b5 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/files/qemu-system-aarch64-multiarch +++ b/meta-xilinx-core/recipes-devtools/qemu/files/qemu-system-aarch64-multiarch @@ -28,6 +28,8 @@ elif '-plm-args' in APU_args: APU_args.remove(MB_args) MB_args = MB_args.split() mbtype='PLM' +elif '--help' in APU_args: + mbtype='help' else: error_msg = '\nMultiarch not setup properly.' sys.exit(error_msg) diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc index 6d8342979..87d90a503 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc @@ -1,6 +1,6 @@ SUMMARY = "Xilinx's hardware device trees required for QEMU" HOMEPAGE = "https://github.com/xilinx/qemu-devicetrees/" -LICENSE = "BSD" +LICENSE = "BSD-3-Clause" DEPENDS += "dtc-native" inherit deploy diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-helper-native_1.0.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-helper-native_1.0.bb index eb14c0c16..2450d275c 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-helper-native_1.0.bb +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-helper-native_1.0.bb @@ -2,6 +2,7 @@ FILESEXTRAPATHS:prepend := "${COREBASE}/meta/recipes-devtools/qemu/qemu-helper:" # provide it, to replace the existing PROVIDES = "qemu-helper-native" +PR = "r1" LICENSE = "GPLv2" LIC_FILES_CHKSUM = "file://${WORKDIR}/tunctl.c;endline=4;md5=ff3a09996bc5fff6bc5d4e0b4c28f999" @@ -32,3 +33,4 @@ do_install() { install tunctl ${STAGING_BINDIR_NATIVE} } +addtask addto_recipe_sysroot after do_populate_sysroot before do_build diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native.inc index 3faabe5b7..b22ab432b 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native.inc @@ -1,7 +1,7 @@ require recipes-devtools/qemu/qemu-native.inc require qemu-xilinx.inc -DEPENDS = "glib-2.0-native zlib-native" +DEPENDS = "glib-2.0-native zlib-native ninja-native meson-native" SRC_URI:remove = "file://0012-fix-libcap-header-issue-on-some-distro.patch" SRC_URI:remove = "file://0013-cpus.c-Add-error-messages-when-qemi_cpu_kick_thread-.patch" diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc index c54e0e1a8..d42aa4849 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx.inc @@ -30,10 +30,18 @@ S = "${WORKDIR}/git" PACKAGECONFIG:remove = "kvm" PACKAGECONFIG:append = " fdt sdl gcrypt pie" + PACKAGECONFIG[gcrypt] = "--enable-gcrypt,--disable-gcrypt,libgcrypt," PACKAGECONFIG[sdl] = "--enable-sdl,--disable-sdl,libsdl2" PACKAGECONFIG[pie] = "--enable-pie,--disable-pie,," +# Remove when version is in sync with core oe-core +PACKAGECONFIG:remove:class-nativesdk= "pulsedio" +PACKAGECONFIG:remove:class-native = "pulsedio" +PACKAGECONFIG[alsa] = "--audio-drv-list=alsa,,alsa-lib" +PACKAGECONFIG[pulsedio] = "--audio-drv-list=pa,,pulseaudio" +PACKAGECONFIG[selinux] = "" + DISABLE_STATIC:pn-${PN} = "" PTEST_ENABLED = "" diff --git a/meta-xilinx-core/recipes-kernel/dtc/python3-dtc/0001-Revert-libfdt-overlay-make-overlay_get_target-public.patch b/meta-xilinx-core/recipes-kernel/dtc/python3-dtc/0001-Revert-libfdt-overlay-make-overlay_get_target-public.patch new file mode 100644 index 000000000..cf4739ebe --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/dtc/python3-dtc/0001-Revert-libfdt-overlay-make-overlay_get_target-public.patch @@ -0,0 +1,129 @@ +From 4d4703e0199fb3556c37694e4d951785abca22fd Mon Sep 17 00:00:00 2001 +From: Bruce Ashfield +Date: Wed, 19 Jan 2022 12:46:42 -0500 +Subject: [PATCH] Revert "libfdt: overlay: make overlay_get_target() public" + +This reverts commit 45f3d1a095dd3440578d5c6313eba555a791f3fb. +--- + libfdt/fdt_overlay.c | 29 ++++++++++++++++++++++------- + libfdt/libfdt.h | 18 ------------------ + libfdt/version.lds | 1 - + 3 files changed, 22 insertions(+), 26 deletions(-) + +diff --git a/libfdt/fdt_overlay.c b/libfdt/fdt_overlay.c +index 5c0c398..d217e79 100644 +--- a/libfdt/fdt_overlay.c ++++ b/libfdt/fdt_overlay.c +@@ -40,22 +40,37 @@ static uint32_t overlay_get_target_phandle(const void *fdto, int fragment) + return fdt32_to_cpu(*val); + } + +-int fdt_overlay_target_offset(const void *fdt, const void *fdto, +- int fragment_offset, char const **pathp) ++/** ++ * overlay_get_target - retrieves the offset of a fragment's target ++ * @fdt: Base device tree blob ++ * @fdto: Device tree overlay blob ++ * @fragment: node offset of the fragment in the overlay ++ * @pathp: pointer which receives the path of the target (or NULL) ++ * ++ * overlay_get_target() retrieves the target offset in the base ++ * device tree of a fragment, no matter how the actual targeting is ++ * done (through a phandle or a path) ++ * ++ * returns: ++ * the targeted node offset in the base device tree ++ * Negative error code on error ++ */ ++static int overlay_get_target(const void *fdt, const void *fdto, ++ int fragment, char const **pathp) + { + uint32_t phandle; + const char *path = NULL; + int path_len = 0, ret; + + /* Try first to do a phandle based lookup */ +- phandle = overlay_get_target_phandle(fdto, fragment_offset); ++ phandle = overlay_get_target_phandle(fdto, fragment); + if (phandle == (uint32_t)-1) + return -FDT_ERR_BADPHANDLE; + + /* no phandle, try path */ + if (!phandle) { + /* And then a path based lookup */ +- path = fdt_getprop(fdto, fragment_offset, "target-path", &path_len); ++ path = fdt_getprop(fdto, fragment, "target-path", &path_len); + if (path) + ret = fdt_path_offset(fdt, path); + else +@@ -621,7 +636,7 @@ static int overlay_merge(void *fdt, void *fdto) + if (overlay < 0) + return overlay; + +- target = fdt_overlay_target_offset(fdt, fdto, fragment, NULL); ++ target = overlay_get_target(fdt, fdto, fragment, NULL); + if (target < 0) + return target; + +@@ -764,7 +779,7 @@ static int overlay_symbol_update(void *fdt, void *fdto) + return -FDT_ERR_BADOVERLAY; + + /* get the target of the fragment */ +- ret = fdt_overlay_target_offset(fdt, fdto, fragment, &target_path); ++ ret = overlay_get_target(fdt, fdto, fragment, &target_path); + if (ret < 0) + return ret; + target = ret; +@@ -786,7 +801,7 @@ static int overlay_symbol_update(void *fdt, void *fdto) + + if (!target_path) { + /* again in case setprop_placeholder changed it */ +- ret = fdt_overlay_target_offset(fdt, fdto, fragment, &target_path); ++ ret = overlay_get_target(fdt, fdto, fragment, &target_path); + if (ret < 0) + return ret; + target = ret; +diff --git a/libfdt/libfdt.h b/libfdt/libfdt.h +index a7f432c..7f117e8 100644 +--- a/libfdt/libfdt.h ++++ b/libfdt/libfdt.h +@@ -2116,24 +2116,6 @@ int fdt_del_node(void *fdt, int nodeoffset); + */ + int fdt_overlay_apply(void *fdt, void *fdto); + +-/** +- * fdt_overlay_target_offset - retrieves the offset of a fragment's target +- * @fdt: Base device tree blob +- * @fdto: Device tree overlay blob +- * @fragment_offset: node offset of the fragment in the overlay +- * @pathp: pointer which receives the path of the target (or NULL) +- * +- * fdt_overlay_target_offset() retrieves the target offset in the base +- * device tree of a fragment, no matter how the actual targeting is +- * done (through a phandle or a path) +- * +- * returns: +- * the targeted node offset in the base device tree +- * Negative error code on error +- */ +-int fdt_overlay_target_offset(const void *fdt, const void *fdto, +- int fragment_offset, char const **pathp); +- + /**********************************************************************/ + /* Debugging / informational functions */ + /**********************************************************************/ +diff --git a/libfdt/version.lds b/libfdt/version.lds +index cbce5d4..7ab85f1 100644 +--- a/libfdt/version.lds ++++ b/libfdt/version.lds +@@ -77,7 +77,6 @@ LIBFDT_1.2 { + fdt_appendprop_addrrange; + fdt_setprop_inplace_namelen_partial; + fdt_create_with_flags; +- fdt_overlay_target_offset; + local: + *; + }; +-- +2.19.1 + diff --git a/meta-xilinx-core/recipes-kernel/dtc/python3-dtc_1.6.0.bb b/meta-xilinx-core/recipes-kernel/dtc/python3-dtc_1.6.0.bb deleted file mode 100644 index f57b2b194..000000000 --- a/meta-xilinx-core/recipes-kernel/dtc/python3-dtc_1.6.0.bb +++ /dev/null @@ -1,27 +0,0 @@ -SUMMARY = "Device Tree Compiler" -HOMEPAGE = "https://devicetree.org/" -DESCRIPTION = "The Device Tree Compiler is a tool used to manipulate the Open-Firmware-like device tree used by PowerPC kernels." -SECTION = "bootloader" -LICENSE = "GPLv2 | BSD" -DEPENDS = "flex-native bison-native swig-native" - -SRC_URI = "git://git.kernel.org/pub/scm/utils/dtc/dtc.git" - -UPSTREAM_CHECK_GITTAGREGEX = "v(?P\d+(\.\d+)+)" - -LIC_FILES_CHKSUM = "file://libfdt.i;beginline=1;endline=6;md5=afda088c974174a29108c8d80b5dce90" - -SRCREV = "2525da3dba9beceb96651dc2986581871dbeca30" - -S = "${WORKDIR}/git/pylibfdt" - -DEPENDS += "libyaml dtc" - -inherit distutils3 - -do_configure:prepend() { - (cd ${S}/../ ; make version_gen.h ) -} - -BBCLASSEXTEND = "native nativesdk" - diff --git a/meta-xilinx-core/recipes-kernel/dtc/python3-dtc_1.6.1.bb b/meta-xilinx-core/recipes-kernel/dtc/python3-dtc_1.6.1.bb new file mode 100644 index 000000000..a868bd010 --- /dev/null +++ b/meta-xilinx-core/recipes-kernel/dtc/python3-dtc_1.6.1.bb @@ -0,0 +1,26 @@ +SUMMARY = "Python Library for the Device Tree Compiler" +HOMEPAGE = "https://devicetree.org/" +DESCRIPTION = "A python library for the Device Tree Compiler, a tool used to manipulate Device Tree files which contain a data structure for describing hardware." +SECTION = "bootloader" +LICENSE = "GPL-2.0-only | BSD-2-Clause" + +DEPENDS = "flex-native bison-native swig-native python3-setuptools-scm-native libyaml dtc" + +SRC_URI = "git://git.kernel.org/pub/scm/utils/dtc/dtc.git;branch=master \ + file://0001-Revert-libfdt-overlay-make-overlay_get_target-public.patch \ + " + +UPSTREAM_CHECK_GITTAGREGEX = "v(?P\d+(\.\d+)+)" + +LIC_FILES_CHKSUM = "file://pylibfdt/libfdt.i;beginline=1;endline=6;md5=afda088c974174a29108c8d80b5dce90" + +SRCREV = "c001fc01a43e7a06447c06ea3d50bd60641322b8" + +PV = "1.6.1+git${SRCPV}" +S = "${WORKDIR}/git" + +PYPA_WHEEL = "${S}/dist/libfdt-1.6.2*.whl" + +inherit setuptools3 pkgconfig + +BBCLASSEXTEND = "native nativesdk" diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb index 6ba6beab6..859a9440b 100644 --- a/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb +++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb @@ -26,14 +26,14 @@ EXTRA_OECMAKE += " \ -DCMAKE_EXPORT_COMPILE_COMANDS=ON \ " PACKAGE_ARCH:versal-ai-core = "${SOC_VARIANT_ARCH}" -EXTRA_OECMAKE:append:versal-ai-core += "-DXRT_AIE_BUILD=true" -TARGET_CXXFLAGS:append:versal-ai-core += "-DXRT_ENABLE_AIE" -DEPENDS:append:versal-ai-core += " libmetal libxaiengine aiefal" -RDEPENDS:${PN}:append:versal-ai-core += " libxaiengine aiefal" -EXTRA_OECMAKE:append:versal += "-DXRT_LIBDFX=true" -EXTRA_OECMAKE:append:zynqmp += "-DXRT_LIBDFX=true" -DEPENDS:append:versal += "libdfx" -DEPENDS:append:zynqmp += "libdfx" +EXTRA_OECMAKE:append:versal-ai-core = " -DXRT_AIE_BUILD=true" +TARGET_CXXFLAGS:append:versal-ai-core = " -DXRT_ENABLE_AIE" +DEPENDS:append:versal-ai-core = " libmetal libxaiengine aiefal" +RDEPENDS:${PN}:append:versal-ai-core = " libxaiengine aiefal" +EXTRA_OECMAKE:append:versal = " -DXRT_LIBDFX=true" +EXTRA_OECMAKE:append:zynqmp = " -DXRT_LIBDFX=true" +DEPENDS:append:versal = " libdfx" +DEPENDS:append:zynqmp = " libdfx" FILES_SOLIBSDEV = "" diff --git a/meta-xilinx-pynq/README.md b/meta-xilinx-pynq/README.md index a40ff96b2..7f8163f2f 100644 --- a/meta-xilinx-pynq/README.md +++ b/meta-xilinx-pynq/README.md @@ -1,26 +1,19 @@ # meta-xilinx-pynq -================================ - -Introduction -------------------------- +## Introduction This layer collects recipes required to build and run PYNQ based examples using jupyter-notebooks on yocto -Maintainers, Patches/Submissions, Community -=========================================== -Please open pull requests for any changes. - -Maintainers: - - Sai Hari Chandana Kalluri (chandana.kalluri@xilinx.com) - Peter Ogden (ogden@xilinx.com) +## Dependencies -Layer dependencies -===================== +This layer depends on: -URI: git://git.openembedded.org/bitbake + URI: git://git.openembedded.org/bitbake -URI: git://git.openembedded.org/openembedded-core + URI: git://git.openembedded.org/openembedded-core + layers: meta + branch: master or xilinx current release version (e.g. hosister) -URI: git://git.openembedded.org/meta-openembedded + URI: git://git.yoctoproject.org/meta-xilinx.git + layers: meta-xilinx-core + branch: master or xilinx current release version (e.g. hosister) diff --git a/meta-xilinx-standalone-experimental/README.md b/meta-xilinx-standalone-experimental/README.md index e49b01f2d..99675b0ac 100644 --- a/meta-xilinx-standalone-experimental/README.md +++ b/meta-xilinx-standalone-experimental/README.md @@ -1,5 +1,5 @@ -meta-xilinx-standalone-experimental -=================================== +# meta-xilinx-standalone-experimental + This layer contains experimental items that may eventually be added to the meta-xilinx-standalone layer. The components in this layer may or may not be buildable as they may require unreleased code. @@ -9,9 +9,9 @@ this should be considered to be a preview release only. For instance, some components may not be buildable, expect APIs to change on various parts and pieces. -Build Instructions ------------------- -Note: to use this layer you must REMOVE meta-xilinx-tools from your +## Build Instructions + +**Note:** to use this layer you must REMOVE meta-xilinx-tools from your project. meta-xilinx-tools is not compatible with this experimental approach. You may also have to remove other layers that depend on meta-xilinx-tools, such as meta-som. @@ -32,27 +32,18 @@ To install the setup SDK: Then follow the instructions in the 'prestep/README-setup' file. -Maintainers, Mailing list, Patches -================================== - -Please send any patches, pull requests, comments or questions for this -layer to the [meta-xilinx mailing list] -(https://lists.yoctoproject.org/listinfo/meta-xilinx): - - meta-xilinx@lists.yoctoproject.org -Maintainers: - - Sai Hari Chandana Kalluri - Mark Hatle - -Dependencies -============ +## Dependencies This layer depends on: - URI: git://git.yoctoproject.org/poky + URI: git://git.openembedded.org/bitbake + + URI: git://git.openembedded.org/openembedded-core + layers: meta + branch: master or xilinx current release version (e.g. hosister) - URI: git://git.yoctoproject.org/meta-xilinx/meta-xilinx-standalone + URI: git://git.yoctoproject.org/meta-xilinx.git + layers: meta-xilinx-core, meta-xilinx-bsp, meta-xilinx-standalone + branch: master or xilinx current release version (e.g. hosister) - URI: git://git.yoctoproject.org/meta-xilinx/meta-xilinx-bsp diff --git a/meta-xilinx-standalone/README.md b/meta-xilinx-standalone/README.md index a3514230b..ea9fdbc41 100644 --- a/meta-xilinx-standalone/README.md +++ b/meta-xilinx-standalone/README.md @@ -1,5 +1,4 @@ -meta-xilinx-standalone -====================== +# meta-xilinx-standalone This layer is meant to augment Yocto/OE functionality to provide a Baremetal/Standalone Toolchain as well as a generic version of various @@ -8,15 +7,14 @@ firmware that is required to boot a ZynqMP or Versal system. For optimized versions of the firmware and additional components you must use the meta-xilinx-tools layer. -Building --------- +## Building + The software in this layer may be used in either a standard single configuration build, or a multiconfig build. A multiconfig build, along with the MACHINES defined in meta-xilinx-bsps will automate the generation of certain firmwares. -Toolchains ----------- +## Toolchains To build standalone toolchains similar to those embedded with the Xilinx xsct tooling: @@ -29,8 +27,7 @@ Use one of the custom machines: MACHINE= DISTRO=xilinx-standalone bitbake meta-toolchain -Standalone Firmware -------------------- +## Standalone Firmware The standalone firmware is a genericly configured firmware, it can be build either in a single standalong configuration, or via an automated @@ -89,25 +86,17 @@ MACHINE=zynqmp-generic bitbake fsbl pmufw MACHINE=versal-generic bitbake plmfw psmfw -Maintainers, Mailing list, Patches -================================== - -Please send any patches, pull requests, comments or questions for this -layer to the [meta-xilinx mailing list] -(https://lists.yoctoproject.org/listinfo/meta-xilinx): - - meta-xilinx@lists.yoctoproject.org +## Dependencies -Maintainers: - - Sai Hari Chandana Kalluri - Mark Hatle +This layer depends on: -Dependencies -============ + URI: git://git.openembedded.org/bitbake -This layer depends on: + URI: git://git.openembedded.org/openembedded-core + layers: meta + branch: master or xilinx current release version (e.g. hosister) - URI: git://git.yoctoproject.org/poky + URI: git://git.yoctoproject.org/meta-xilinx.git + layers: meta-xilinx-microblaze, meta-xilinx-core, meta-xilinx-bsp + branch: master or xilinx current release version (e.g. hosister) - URI: git://git.yoctoproject.org/meta-xilinx/meta-xilinx-bsp diff --git a/meta-xilinx-standalone/conf/layer.conf b/meta-xilinx-standalone/conf/layer.conf index f7ebaca42..826cc7f8a 100644 --- a/meta-xilinx-standalone/conf/layer.conf +++ b/meta-xilinx-standalone/conf/layer.conf @@ -15,5 +15,5 @@ BBFILE_PRIORITY_xilinx-standalone = "7" LAYERDEPENDS_xilinx-standalone = "core xilinx" LAYERRECOMMENDS_xilinx-standalone = "xilinx-microblaze" -LAYERSERIES_COMPAT_xilinx-standalone = "honister" +LAYERSERIES_COMPAT_xilinx-standalone = "langdale" XILINX_RELEASE_VERSION = "v2022.1" diff --git a/meta-xilinx-standalone/recipes-devtools/gcc/gcc-11/additional-microblaze-multilibs.patch b/meta-xilinx-standalone/recipes-devtools/gcc/gcc-12/additional-microblaze-multilibs.patch similarity index 100% rename from meta-xilinx-standalone/recipes-devtools/gcc/gcc-11/additional-microblaze-multilibs.patch rename to meta-xilinx-standalone/recipes-devtools/gcc/gcc-12/additional-microblaze-multilibs.patch diff --git a/meta-xilinx-standalone/recipes-devtools/gcc/gcc-source_11.%.bbappend b/meta-xilinx-standalone/recipes-devtools/gcc/gcc-source_12.%.bbappend similarity index 97% rename from meta-xilinx-standalone/recipes-devtools/gcc/gcc-source_11.%.bbappend rename to meta-xilinx-standalone/recipes-devtools/gcc/gcc-source_12.%.bbappend index d8b803a31..c0ccc3c38 100644 --- a/meta-xilinx-standalone/recipes-devtools/gcc/gcc-source_11.%.bbappend +++ b/meta-xilinx-standalone/recipes-devtools/gcc/gcc-source_12.%.bbappend @@ -1,7 +1,7 @@ COMPATIBLE_HOST = "${HOST_SYS}" # Add MicroBlaze Patches (only when using MicroBlaze) -FILESEXTRAPATHS:append:microblaze:xilinx-standalone := ":${THISDIR}/gcc-11" +FILESEXTRAPATHS:append:microblaze:xilinx-standalone := ":${THISDIR}/gcc-12" SRC_URI:append:microblaze:xilinx-standalone = " \ file://additional-microblaze-multilibs.patch \ " diff --git a/meta-xilinx-vendor/COPYING.MIT b/meta-xilinx-vendor/COPYING.MIT new file mode 100644 index 000000000..fb950dc69 --- /dev/null +++ b/meta-xilinx-vendor/COPYING.MIT @@ -0,0 +1,17 @@ +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in +all copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN +THE SOFTWARE. diff --git a/meta-xilinx-vendor/README.md b/meta-xilinx-vendor/README.md new file mode 100644 index 000000000..84cbf1be6 --- /dev/null +++ b/meta-xilinx-vendor/README.md @@ -0,0 +1,41 @@ +# meta-xilinx-vendor + +This layer provides support for MicroBlaze, Zynq, ZynqMP and Versal architectures vendor boards. + +## Supported Boards/Machines + +**Boards/Machines supported by this layer:** + + +| Platform | Vendor Board Variant | Machine Configuration file | Board Device tree | +| ---| --- | ---| ---------- | +|MicroBlaze|[Xilinx S3A DSP 1800](https://shop.trenz-electronic.de/en/TE0320-00-EV02I-FPGA-Module-with-Spartan-3A-DSP-1800K-EV02I-1-Gbit-DDR-RAM)|[s3adsp1800-qemu-microblazeeb](conf/machine/s3adsp1800-qemu-microblazeeb.conf)|NA| +|Zynq-7000|[Avent Microzed](https://www.xilinx.com/products/boards-and-kits/1-5lakcu.html)|[microzed-zynq7](conf/machine/microzed-zynq7.conf)|`zynq-microzed.dtb`| +||[Avnet Picozed](https://www.xilinx.com/products/boards-and-kits/1-58nuel.html)|[picozed-zynq7](conf/machine/picozed-zynq7.conf)|NA| +||[Avnet Minized](https://www.xilinx.com/products/boards-and-kits/1-odbhjd.html)|[minized-zynq7](conf/machine/minized-zynq7.conf)|NA| +||[Avnet/Digilent ZedBoard](https://www.xilinx.com/products/boards-and-kits/1-8dyf-11.html)|[zedboard-zynq7](conf/machine/zedboard-zynq7.conf)|NA| +||[Digilent Zybo](https://www.xilinx.com/support/university/boards-portfolio/xup-boards/DigilentZYBO.html)|[zybo-zynq7](conf/machine/zybo-zynq7.conf)|`zynq-zybo.dtb`| +||[Digilent Zybo Linux BD](https://www.xilinx.com/support/university/boards-portfolio/xup-boards/DigilentZYBO.html)|[zybo-linux-bd-zynq7](conf/machine/zybo-linux-bd-zynq7.conf)|NA| +|ZynqMP|[Avent Ultra96 v1](https://www.xilinx.com/products/boards-and-kits/1-vad4rl.html)|[ultra96-zynqmp](conf/machine/ultra96-zynqmp.conf)|`avnet-ultra96-rev1`| +|Versal|NA|NA|NA| + +> **Note:** +``` +1. For Zybo Linux BD reference design refer meta-xilinx-contrib layer. +2. Ultra96 Machine configuration file is unsupported and is compatible with v1 board only. Refer to meta-avnet for v2 board. +``` + + +## Dependencies + +This layer depends on: + + URI: git://git.openembedded.org/bitbake + + URI: git://git.openembedded.org/openembedded-core + layers: meta + branch: master or xilinx current release version (e.g. hosister) + + URI: git://git.yoctoproject.org/meta-xilinx.git + layers: meta-xilinx-microblaze, meta-xilinx-core + branch: master or xilinx current release version (e.g. hosister) diff --git a/meta-xilinx-vendor/conf/layer.conf b/meta-xilinx-vendor/conf/layer.conf new file mode 100644 index 000000000..29ebc9498 --- /dev/null +++ b/meta-xilinx-vendor/conf/layer.conf @@ -0,0 +1,18 @@ +# We have a conf and classes directory, add to BBPATH +BBPATH .= ":${LAYERDIR}" + +# We have a packages directory, add to BBFILES +BBFILES += "${LAYERDIR}/recipes-*/*/*.bb \ + ${LAYERDIR}/recipes-*/*/*.bbappend" + +BBFILES_DYNAMIC += " \ +xilinx-tools:${LAYERDIR}/dynamic-layers/meta-xilinx-tools/recipes-*/*/*.bb \ +xilinx-tools:${LAYERDIR}/dynamic-layers/meta-xilinx-tools/recipes-*/*/*.bbappend \ +" + +BBFILE_COLLECTIONS += "xilinx-vendor" +BBFILE_PATTERN_xilinx-vendor = "^${LAYERDIR}/" +BBFILE_PRIORITY_xilinx-vendor = "5" + +LAYERDEPENDS_xilinx-vendor = "xilinx" +LAYERSERIES_COMPAT_xilinx-vendor = "langdale" diff --git a/meta-xilinx-bsp/conf/machine/include/board/ultra96.inc b/meta-xilinx-vendor/conf/machine/include/board/ultra96.inc similarity index 100% rename from meta-xilinx-bsp/conf/machine/include/board/ultra96.inc rename to meta-xilinx-vendor/conf/machine/include/board/ultra96.inc diff --git a/meta-xilinx-bsp/conf/machine/microzed-zynq7.conf b/meta-xilinx-vendor/conf/machine/microzed-zynq7.conf similarity index 85% rename from meta-xilinx-bsp/conf/machine/microzed-zynq7.conf rename to meta-xilinx-vendor/conf/machine/microzed-zynq7.conf index c0e8e6ddf..ce8058e4c 100644 --- a/meta-xilinx-bsp/conf/machine/microzed-zynq7.conf +++ b/meta-xilinx-vendor/conf/machine/microzed-zynq7.conf @@ -4,9 +4,6 @@ require conf/machine/zynq-generic.conf -# u-boot configuration -PREFERRED_PROVIDER_virtual/bootloader = "u-boot" - SPL_BINARY ?= "spl/boot.bin" UBOOT_ELF = "u-boot" diff --git a/meta-xilinx-contrib/conf/machine/minized-zynq7.conf b/meta-xilinx-vendor/conf/machine/minized-zynq7.conf similarity index 73% rename from meta-xilinx-contrib/conf/machine/minized-zynq7.conf rename to meta-xilinx-vendor/conf/machine/minized-zynq7.conf index a7c549ccd..af9d982d8 100644 --- a/meta-xilinx-contrib/conf/machine/minized-zynq7.conf +++ b/meta-xilinx-vendor/conf/machine/minized-zynq7.conf @@ -2,13 +2,10 @@ #@NAME: minized-zynq7 #@DESCRIPTION: Machine support for MiniZed. (http://www.minized.org/) -require conf/machine/include/tune-zynq.inc -require conf/machine/include/machine-xilinx-default.inc +require conf/machine/zynq-generic.conf MACHINE_FEATURES = "ext2 vfat usbhost wifi bluetooth" -# u-boot configuration -PREFERRED_PROVIDER_virtual/bootloader = "u-boot" UBOOT_MACHINE ?= "zynq_minized_config" EXTRA_IMAGEDEPENDS += " \ diff --git a/meta-xilinx-bsp/conf/machine/picozed-zynq7.conf b/meta-xilinx-vendor/conf/machine/picozed-zynq7.conf similarity index 88% rename from meta-xilinx-bsp/conf/machine/picozed-zynq7.conf rename to meta-xilinx-vendor/conf/machine/picozed-zynq7.conf index d4f63f957..31f5e220e 100644 --- a/meta-xilinx-bsp/conf/machine/picozed-zynq7.conf +++ b/meta-xilinx-vendor/conf/machine/picozed-zynq7.conf @@ -8,9 +8,6 @@ require conf/machine/zynq-generic.conf -# u-boot configuration -PREFERRED_PROVIDER_virtual/bootloader = "u-boot" - SPL_BINARY ?= "spl/boot.bin" UBOOT_ELF = "u-boot" diff --git a/meta-xilinx-bsp/conf/machine/ultra96-zynqmp.conf b/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf similarity index 100% rename from meta-xilinx-bsp/conf/machine/ultra96-zynqmp.conf rename to meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf diff --git a/meta-xilinx-bsp/conf/machine/zedboard-zynq7.conf b/meta-xilinx-vendor/conf/machine/zedboard-zynq7.conf similarity index 100% rename from meta-xilinx-bsp/conf/machine/zedboard-zynq7.conf rename to meta-xilinx-vendor/conf/machine/zedboard-zynq7.conf diff --git a/meta-xilinx-bsp/conf/machine/zybo-linux-bd-zynq7.conf b/meta-xilinx-vendor/conf/machine/zybo-linux-bd-zynq7.conf similarity index 80% rename from meta-xilinx-bsp/conf/machine/zybo-linux-bd-zynq7.conf rename to meta-xilinx-vendor/conf/machine/zybo-linux-bd-zynq7.conf index df26ea0d4..98718ae33 100644 --- a/meta-xilinx-bsp/conf/machine/zybo-linux-bd-zynq7.conf +++ b/meta-xilinx-vendor/conf/machine/zybo-linux-bd-zynq7.conf @@ -7,8 +7,6 @@ require conf/machine/zynq-generic.conf -PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot" - MACHINE_FEATURES += "keyboard screen alsa sdio" SPL_BINARY ?= "spl/boot.bin" @@ -22,6 +20,5 @@ IMAGE_BOOT_FILES += " \ " KERNEL_FEATURES += " \ - bsp/xilinx/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc \ features/xilinx/v4l2/v4l2.scc \ " diff --git a/meta-xilinx-bsp/conf/machine/zybo-zynq7.conf b/meta-xilinx-vendor/conf/machine/zybo-zynq7.conf similarity index 86% rename from meta-xilinx-bsp/conf/machine/zybo-zynq7.conf rename to meta-xilinx-vendor/conf/machine/zybo-zynq7.conf index aa1eafe4c..74d117c0c 100644 --- a/meta-xilinx-bsp/conf/machine/zybo-zynq7.conf +++ b/meta-xilinx-vendor/conf/machine/zybo-zynq7.conf @@ -8,8 +8,6 @@ require conf/machine/zynq-generic.conf -# u-boot configuration -PREFERRED_PROVIDER_virtual/bootloader = "u-boot" SPL_BINARY ?= "spl/boot.bin" UBOOT_ELF = "u-boot" diff --git a/meta-xilinx-vendor/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-vendor/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend new file mode 100644 index 000000000..963940f5b --- /dev/null +++ b/meta-xilinx-vendor/dynamic-layers/meta-xilinx-tools/recipes-bsp/device-tree/device-tree.bbappend @@ -0,0 +1,7 @@ +# Ultra96 device tree configuration +YAML_MAIN_MEMORY_CONFIG:ultra96 ?= "psu_ddr_0" +YAML_CONSOLE_DEVICE_CONFIG:ultra96 ?= "psu_uart_1" +YAML_DT_BOARD_FLAGS:ultra96 ?= "{BOARD avnet-ultra96-rev1}" + +# ZedBoard device tree configuration +YAML_DT_BOARD_FLAGS:zedboard ?= "{BOARD zedboard}" diff --git a/meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/embeddedsw/pmu-firmware_%.bbappend b/meta-xilinx-vendor/dynamic-layers/meta-xilinx-tools/recipes-bsp/embeddedsw/pmu-firmware_%.bbappend similarity index 100% rename from meta-xilinx-bsp/dynamic-layers/meta-xilinx-tools/recipes-bsp/embeddedsw/pmu-firmware_%.bbappend rename to meta-xilinx-vendor/dynamic-layers/meta-xilinx-tools/recipes-bsp/embeddedsw/pmu-firmware_%.bbappend diff --git a/meta-xilinx-vendor/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-vendor/recipes-bsp/device-tree/device-tree.bbappend new file mode 100644 index 000000000..341e69dc7 --- /dev/null +++ b/meta-xilinx-vendor/recipes-bsp/device-tree/device-tree.bbappend @@ -0,0 +1,13 @@ +FILESEXTRAPATHS:prepend := "${THISDIR}/files:" + +# device tree sources for the various machines +COMPATIBLE_MACHINE:picozed-zynq7 = ".*" +SRC_URI:append:picozed-zynq7 = " file://picozed-zynq7.dts" + +COMPATIBLE_MACHINE:zybo-linux-bd-zynq7 = ".*" +SRC_URI:append:zybo-linux-bd-zynq7 = " \ + file://zybo-linux-bd-zynq7.dts \ + file://pcw.dtsi \ + file://pl.dtsi \ + " + diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/picozed-zynq7.dts b/meta-xilinx-vendor/recipes-bsp/device-tree/files/picozed-zynq7.dts similarity index 100% rename from meta-xilinx-bsp/recipes-bsp/device-tree/files/picozed-zynq7.dts rename to meta-xilinx-vendor/recipes-bsp/device-tree/files/picozed-zynq7.dts diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi b/meta-xilinx-vendor/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi similarity index 100% rename from meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi rename to meta-xilinx-vendor/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pcw.dtsi diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi b/meta-xilinx-vendor/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi similarity index 100% rename from meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi rename to meta-xilinx-vendor/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/pl.dtsi diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts b/meta-xilinx-vendor/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts similarity index 100% rename from meta-xilinx-bsp/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts rename to meta-xilinx-vendor/recipes-bsp/device-tree/files/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.dts diff --git a/meta-xilinx-bsp/recipes-bsp/platform-init/platform-init.bbappend b/meta-xilinx-vendor/recipes-bsp/platform-init/platform-init.bbappend similarity index 100% rename from meta-xilinx-bsp/recipes-bsp/platform-init/platform-init.bbappend rename to meta-xilinx-vendor/recipes-bsp/platform-init/platform-init.bbappend diff --git a/meta-xilinx-bsp/recipes-bsp/platform-init/platform-init/picozed-zynq7/ps7_init_gpl.c b/meta-xilinx-vendor/recipes-bsp/platform-init/platform-init/picozed-zynq7/ps7_init_gpl.c similarity index 100% rename from meta-xilinx-bsp/recipes-bsp/platform-init/platform-init/picozed-zynq7/ps7_init_gpl.c rename to meta-xilinx-vendor/recipes-bsp/platform-init/platform-init/picozed-zynq7/ps7_init_gpl.c diff --git a/meta-xilinx-bsp/recipes-bsp/platform-init/platform-init/picozed-zynq7/ps7_init_gpl.h b/meta-xilinx-vendor/recipes-bsp/platform-init/platform-init/picozed-zynq7/ps7_init_gpl.h similarity index 100% rename from meta-xilinx-bsp/recipes-bsp/platform-init/platform-init/picozed-zynq7/ps7_init_gpl.h rename to meta-xilinx-vendor/recipes-bsp/platform-init/platform-init/picozed-zynq7/ps7_init_gpl.h