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In this section, "higher" seem to mean "closest from CPU". As suggested by the pyramid picture and sentences like:
Modern CPUs have multiple layers of cache (L1, L2, often L3, and rarely even L4). The lowest layer is shared between cores and is usually scaled with their number (e.g., a 10-core CPU should have around 10M of L3 cache).
However, this logic seems to be reverted in the following?
When accessed, the contents of a cache line are emplaced onto the lowest cache layer and then gradually evicted to higher levels unless accessed again in time.
The text was updated successfully, but these errors were encountered:
In this section, "higher" seem to mean "closest from CPU". As suggested by the pyramid picture and sentences like:
However, this logic seems to be reverted in the following?
The text was updated successfully, but these errors were encountered: