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AD7192 driver new features and devicetrees #2554

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AD7192 driver new features and devicetrees #2554

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@romandariana romandariana commented Jul 23, 2024 •
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PR Description

  • All commits, except the last one adding the Cora devicetrees, were already accepted upstream.
  • Correct AINCOM and VREF supplies setup.
  • Add support for AD7194.
  • Add correct clock consumer and provider configuration.
  • Cleanup driver.

PR Type

  • Bug fix (a change that fixes an issue)
  • New feature (a change that adds new functionality)
  • Breaking change (a change that affects other repos or cause CIs to fail)

PR Checklist

  • I have conducted a self-review of my own code changes
  • I have tested the changes on the relevant hardware
  • I have updated the documentation outside this repo accordingly (if there is the case)

@IuliaCMoldovan IuliaCMoldovan mentioned this pull request Oct 31, 2024
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12 tasks
@romandariana romandariana changed the title AD7192 driver new features AD7192 driver new features and devicetrees Nov 4, 2024
@romandariana romandariana marked this pull request as ready for review November 4, 2024 12:54
@romandariana romandariana marked this pull request as draft November 4, 2024 13:05
Fabrizio Lamarque and others added 13 commits November 4, 2024 15:15
@romandariana
dt-bindings: iio: ad7192: Add mandatory reference voltage source
283ef0b 
Add required reference voltage (VRef) supply regulator.

AD7192 requires three independent voltage sources: DVdd, AVdd and VRef
(on REFINx pin pairs).

Fixes: b581f74 ("staging: iio: adc: ad7192: move out of staging")
Signed-off-by: Fabrizio Lamarque <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Cc: <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
iio: adc: ad7192: Use standard attribute
0cb8bbd 
Replace custom attribute filter_low_pass_3db_frequency_available with
standard attribute.

Store the available values in ad7192_state struct.

The function that used to compute those values replaced by
ad7192_update_filter_freq_avail().

Function ad7192_show_filter_avail() is no longer needed.

Note that the initial available values are hardcoded.

Also moved the mutex lock and unlock in order to protect the whole
switch statement since each branch modifies the state of the device.

Reviewed-by: David Lechner <[email protected]>
Signed-off-by: Alisa-Dariana Roman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
dt-bindings: iio: adc: ad7192: Add aincom supply
f7fe997 
AINCOM should actually be a supply. AINx inputs are referenced to AINCOM
in pseudo-differential operation mode. AINCOM voltage represents the
offset of corresponding channels.

Reviewed-by: Rob Herring (Arm) <[email protected]>
Signed-off-by: Alisa-Dariana Roman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
iio: adc: ad7192: Add aincom supply
c63b252 
AINCOM should actually be a supply. AINx inputs are referenced to AINCOM
in pseudo-differential operation mode. AINCOM voltage represents the
offset of corresponding channels.

Signed-off-by: Alisa-Dariana Roman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
dt-bindings: iio: adc: ad7192: Add AD7194 support
d3c16d7 
Unlike the other AD719Xs, AD7194 has configurable channels. The user can
dynamically configure them in the devicetree.

Also add an example for AD7194 devicetree.

Signed-off-by: Alisa-Dariana Roman <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
iio: adc: ad7192: Add AD7194 support
3ff64fa 
Unlike the other AD719Xs, AD7194 has configurable channels. The user can
dynamically configure them in the devicetree.

Add sigma_delta_info member to chip_info structure. Since AD7194 is the
only chip that has no channel sequencer, num_slots should remain
undefined.

Also modify config AD7192 description for better scaling.

Signed-off-by: Alisa-Dariana Roman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
iio: adc: ad7192: Clean up dev
4f1b0b9 
Clean up by using a local variable struct device *dev. Also use
dev_err_probe where possible.

Signed-off-by: Alisa-Dariana Roman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@dlech @romandariana
iio: adc: ad7192: use devm_regulator_get_enable_read_voltage
32b5fef 
This makes use of the new devm_regulator_get_enable_read_voltage()
function to reduce boilerplate code.

Error messages have changed slightly since there are now fewer places
where we print an error. The rest of the logic of selecting which
supply to use as the reference voltage remains the same.

Also 1000 is replaced by MILLI in a few places for consistency.

Signed-off-by: David Lechner <[email protected]>
Signed-off-by: Alisa-Dariana Roman <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
dt-bindings: iio: adc: ad7192: Update clock config
a838281 
There are actually 4 configuration modes of clock source for AD719X
devices. Either a crystal can be attached externally between MCLK1 and
MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2
pin. The other 2 modes make use of the 4.92MHz internal clock.

To configure external clock as either a crystal or a CMOS-compatible
clock, changing the register settings is necessary. Therefore, add clock
name xtal alongside mclk. By selecting one or the other, the register is
configured.

The presence of an external clock source is optional, not required. When
both clocks and clock-names properties are present, an external clock
source is used. If the intention is to use the internal clock, both
properties should be absent. Modify required properties accordingly.

Signed-off-by: Alisa-Dariana Roman <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
iio: adc: ad7192: Update clock config
b3fe7e1 
There are actually 4 configuration modes of clock source for AD719X
devices. Either a crystal can be attached externally between MCLK1 and
MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2
pin. The other 2 modes make use of the 4.92MHz internal clock.

Undocumented properties adi,int-clock-output-enable and adi,clock-xtal
still supported for backward compatibility, but their use is highly
discouraged. Use cleaner alternative of configuring external clock by
using clock names mclk and xtal.

Functionality of AD7192_CLK_INT_CO will be implemented in complementary
patch by adding clock provider.

Signed-off-by: Alisa-Dariana Roman <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
dt-bindings: iio: adc: ad7192: Add clock provider
a7afcdf 
Internal clock of AD719X devices can be made available on MCLK2 pin. Add
clock provider to support this functionality when clock cells property
is present.

The clock source can be either provided externally or the internal clock
is used. Pair of clocks and clock-names property is mutally exclusive
with #clock-cells property.

Modify second example to showcase the mode where internal clock is used.

Signed-off-by: Alisa-Dariana Roman <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
iio: adc: ad7192: Add clock provider
73a4ada 
Internal clock of AD719X devices can be made available on MCLK2 pin. Add
clock provider to support this functionality when clock cells property
is present.

Signed-off-by: Alisa-Dariana Roman <[email protected]>
Reviewed-by: Nuno Sa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Jonathan Cameron <[email protected]>
@romandariana
arm: dts: Add AD719x dts for cora
eb09975 
Add AD7190, AD7192, AD7193, AD7194 and AD7195 devicetrees for Cora z7s
board.

Signed-off-by: Alisa-Dariana Roman <[email protected]>
@romandariana romandariana marked this pull request as ready for review November 4, 2024 13:28
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