From b745307384248ace0d5af0b93d815ce576559c92 Mon Sep 17 00:00:00 2001 From: bunnie Date: Wed, 25 Dec 2024 06:11:17 +0800 Subject: [PATCH 1/2] add updated register profile to include the coreuser block this has come back again due to volatility in the coreuser API --- utralib/cramium/core.svd | 148 ++++++++++++++++++++++++++- utralib/src/generated/cramium_soc.rs | 118 +++++++++++++++++++++ 2 files changed, 265 insertions(+), 1 deletion(-) diff --git a/utralib/cramium/core.svd b/utralib/cramium/core.svd index 7ded17387..cff44b124 100644 --- a/utralib/cramium/core.svd +++ b/utralib/cramium/core.svd @@ -3,7 +3,7 @@ litex SOC - + 8 32 @@ -265,6 +265,152 @@ register to disable individual events.]]> 21 + + COREUSER + 0xE0002000 + COREUSER + + + CONTROL + 0x0000 + 0x00 + 32 + + + enable + 0 + [0:0] + 0 + + + + use8bit + 1 + [1:1] + 1 + + + + shift + 4 + [4:2] + 2 + + + + privilege + 5 + [5:5] + 5 + + + + mpp + 7 + [7:6] + 6 + + + + + + STATUS + 0x0004 + 0x00 + 32 + + + coreuser + 7 + [7:0] + 0 + + + + + + MAP_LO + 0x0008 + 0x00 + 32 + + + lut0 + 7 + [7:0] + 0 + + + + lut1 + 15 + [15:8] + 8 + + + + lut2 + 23 + [23:16] + 16 + + + + lut3 + 31 + [31:24] + 24 + + + + + + MAP_HI + 0x000c + 0x00 + 32 + + + lut4 + 7 + [7:0] + 0 + + + + lut5 + 15 + [15:8] + 8 + + + + lut6 + 23 + [23:16] + 16 + + + + lut7 + 31 + [31:24] + 24 + + + + + + + 0 + 0x10 + registers + + CSRTEST 0xE0003000 diff --git a/utralib/src/generated/cramium_soc.rs b/utralib/src/generated/cramium_soc.rs index 194a383eb..7cecda856 100644 --- a/utralib/src/generated/cramium_soc.rs +++ b/utralib/src/generated/cramium_soc.rs @@ -350,6 +350,7 @@ pub const HW_BIO_FIFO3_MEM_LEN: usize = 4096; // Physical base addresses of registers pub const HW_D11CTIME_BASE : usize = 0xe0000000; pub const HW_SUSRES_BASE : usize = 0xe0001000; +pub const HW_COREUSER_BASE : usize = 0xe0002000; pub const HW_CSRTEST_BASE : usize = 0xe0003000; pub const HW_IRQARRAY0_BASE : usize = 0xe0004000; pub const HW_IRQARRAY1_BASE : usize = 0xe0005000; @@ -489,6 +490,34 @@ pub mod utra { pub const HW_SUSRES_BASE: usize = 0xe0001000; } + pub mod coreuser { + pub const COREUSER_NUMREGS: usize = 4; + + pub const CONTROL: crate::Register = crate::Register::new(0, 0xff); + pub const CONTROL_ENABLE: crate::Field = crate::Field::new(1, 0, CONTROL); + pub const CONTROL_USE8BIT: crate::Field = crate::Field::new(1, 1, CONTROL); + pub const CONTROL_SHIFT: crate::Field = crate::Field::new(3, 2, CONTROL); + pub const CONTROL_PRIVILEGE: crate::Field = crate::Field::new(1, 5, CONTROL); + pub const CONTROL_MPP: crate::Field = crate::Field::new(2, 6, CONTROL); + + pub const STATUS: crate::Register = crate::Register::new(1, 0xff); + pub const STATUS_COREUSER: crate::Field = crate::Field::new(8, 0, STATUS); + + pub const MAP_LO: crate::Register = crate::Register::new(2, 0xffffffff); + pub const MAP_LO_LUT0: crate::Field = crate::Field::new(8, 0, MAP_LO); + pub const MAP_LO_LUT1: crate::Field = crate::Field::new(8, 8, MAP_LO); + pub const MAP_LO_LUT2: crate::Field = crate::Field::new(8, 16, MAP_LO); + pub const MAP_LO_LUT3: crate::Field = crate::Field::new(8, 24, MAP_LO); + + pub const MAP_HI: crate::Register = crate::Register::new(3, 0xffffffff); + pub const MAP_HI_LUT4: crate::Field = crate::Field::new(8, 0, MAP_HI); + pub const MAP_HI_LUT5: crate::Field = crate::Field::new(8, 8, MAP_HI); + pub const MAP_HI_LUT6: crate::Field = crate::Field::new(8, 16, MAP_HI); + pub const MAP_HI_LUT7: crate::Field = crate::Field::new(8, 24, MAP_HI); + + pub const HW_COREUSER_BASE: usize = 0xe0002000; + } + pub mod csrtest { pub const CSRTEST_NUMREGS: usize = 2; @@ -5603,6 +5632,95 @@ mod tests { susres_csr.wfo(utra::susres::EV_ENABLE_SOFT_INT, baz); } + #[test] + #[ignore] + fn compile_check_coreuser_csr() { + use super::*; + let mut coreuser_csr = CSR::new(HW_COREUSER_BASE as *mut u32); + + let foo = coreuser_csr.r(utra::coreuser::CONTROL); + coreuser_csr.wo(utra::coreuser::CONTROL, foo); + let bar = coreuser_csr.rf(utra::coreuser::CONTROL_ENABLE); + coreuser_csr.rmwf(utra::coreuser::CONTROL_ENABLE, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::CONTROL_ENABLE, bar); + baz |= coreuser_csr.ms(utra::coreuser::CONTROL_ENABLE, 1); + coreuser_csr.wfo(utra::coreuser::CONTROL_ENABLE, baz); + let bar = coreuser_csr.rf(utra::coreuser::CONTROL_USE8BIT); + coreuser_csr.rmwf(utra::coreuser::CONTROL_USE8BIT, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::CONTROL_USE8BIT, bar); + baz |= coreuser_csr.ms(utra::coreuser::CONTROL_USE8BIT, 1); + coreuser_csr.wfo(utra::coreuser::CONTROL_USE8BIT, baz); + let bar = coreuser_csr.rf(utra::coreuser::CONTROL_SHIFT); + coreuser_csr.rmwf(utra::coreuser::CONTROL_SHIFT, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::CONTROL_SHIFT, bar); + baz |= coreuser_csr.ms(utra::coreuser::CONTROL_SHIFT, 1); + coreuser_csr.wfo(utra::coreuser::CONTROL_SHIFT, baz); + let bar = coreuser_csr.rf(utra::coreuser::CONTROL_PRIVILEGE); + coreuser_csr.rmwf(utra::coreuser::CONTROL_PRIVILEGE, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::CONTROL_PRIVILEGE, bar); + baz |= coreuser_csr.ms(utra::coreuser::CONTROL_PRIVILEGE, 1); + coreuser_csr.wfo(utra::coreuser::CONTROL_PRIVILEGE, baz); + let bar = coreuser_csr.rf(utra::coreuser::CONTROL_MPP); + coreuser_csr.rmwf(utra::coreuser::CONTROL_MPP, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::CONTROL_MPP, bar); + baz |= coreuser_csr.ms(utra::coreuser::CONTROL_MPP, 1); + coreuser_csr.wfo(utra::coreuser::CONTROL_MPP, baz); + + let foo = coreuser_csr.r(utra::coreuser::STATUS); + coreuser_csr.wo(utra::coreuser::STATUS, foo); + let bar = coreuser_csr.rf(utra::coreuser::STATUS_COREUSER); + coreuser_csr.rmwf(utra::coreuser::STATUS_COREUSER, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::STATUS_COREUSER, bar); + baz |= coreuser_csr.ms(utra::coreuser::STATUS_COREUSER, 1); + coreuser_csr.wfo(utra::coreuser::STATUS_COREUSER, baz); + + let foo = coreuser_csr.r(utra::coreuser::MAP_LO); + coreuser_csr.wo(utra::coreuser::MAP_LO, foo); + let bar = coreuser_csr.rf(utra::coreuser::MAP_LO_LUT0); + coreuser_csr.rmwf(utra::coreuser::MAP_LO_LUT0, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::MAP_LO_LUT0, bar); + baz |= coreuser_csr.ms(utra::coreuser::MAP_LO_LUT0, 1); + coreuser_csr.wfo(utra::coreuser::MAP_LO_LUT0, baz); + let bar = coreuser_csr.rf(utra::coreuser::MAP_LO_LUT1); + coreuser_csr.rmwf(utra::coreuser::MAP_LO_LUT1, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::MAP_LO_LUT1, bar); + baz |= coreuser_csr.ms(utra::coreuser::MAP_LO_LUT1, 1); + coreuser_csr.wfo(utra::coreuser::MAP_LO_LUT1, baz); + let bar = coreuser_csr.rf(utra::coreuser::MAP_LO_LUT2); + coreuser_csr.rmwf(utra::coreuser::MAP_LO_LUT2, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::MAP_LO_LUT2, bar); + baz |= coreuser_csr.ms(utra::coreuser::MAP_LO_LUT2, 1); + coreuser_csr.wfo(utra::coreuser::MAP_LO_LUT2, baz); + let bar = coreuser_csr.rf(utra::coreuser::MAP_LO_LUT3); + coreuser_csr.rmwf(utra::coreuser::MAP_LO_LUT3, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::MAP_LO_LUT3, bar); + baz |= coreuser_csr.ms(utra::coreuser::MAP_LO_LUT3, 1); + coreuser_csr.wfo(utra::coreuser::MAP_LO_LUT3, baz); + + let foo = coreuser_csr.r(utra::coreuser::MAP_HI); + coreuser_csr.wo(utra::coreuser::MAP_HI, foo); + let bar = coreuser_csr.rf(utra::coreuser::MAP_HI_LUT4); + coreuser_csr.rmwf(utra::coreuser::MAP_HI_LUT4, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::MAP_HI_LUT4, bar); + baz |= coreuser_csr.ms(utra::coreuser::MAP_HI_LUT4, 1); + coreuser_csr.wfo(utra::coreuser::MAP_HI_LUT4, baz); + let bar = coreuser_csr.rf(utra::coreuser::MAP_HI_LUT5); + coreuser_csr.rmwf(utra::coreuser::MAP_HI_LUT5, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::MAP_HI_LUT5, bar); + baz |= coreuser_csr.ms(utra::coreuser::MAP_HI_LUT5, 1); + coreuser_csr.wfo(utra::coreuser::MAP_HI_LUT5, baz); + let bar = coreuser_csr.rf(utra::coreuser::MAP_HI_LUT6); + coreuser_csr.rmwf(utra::coreuser::MAP_HI_LUT6, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::MAP_HI_LUT6, bar); + baz |= coreuser_csr.ms(utra::coreuser::MAP_HI_LUT6, 1); + coreuser_csr.wfo(utra::coreuser::MAP_HI_LUT6, baz); + let bar = coreuser_csr.rf(utra::coreuser::MAP_HI_LUT7); + coreuser_csr.rmwf(utra::coreuser::MAP_HI_LUT7, bar); + let mut baz = coreuser_csr.zf(utra::coreuser::MAP_HI_LUT7, bar); + baz |= coreuser_csr.ms(utra::coreuser::MAP_HI_LUT7, 1); + coreuser_csr.wfo(utra::coreuser::MAP_HI_LUT7, baz); + } + #[test] #[ignore] fn compile_check_csrtest_csr() { From 6e0bdb49f40bd9b36fc326fd1baf21f52726bb77 Mon Sep 17 00:00:00 2001 From: bunnie Date: Sun, 29 Dec 2024 01:28:12 +0800 Subject: [PATCH 2/2] add an option to reset the backup flag the backup flag can be left "hanging around" if a restore of PDDB is aborted. This command allows a user to override that setting in case this is necessary. --- tools/usb_update.py | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/tools/usb_update.py b/tools/usb_update.py index 593b18097..667eb892b 100644 --- a/tools/usb_update.py +++ b/tools/usb_update.py @@ -996,6 +996,9 @@ def main(): parser.add_argument( "--key", help="Backup key in hex or BIP-39 format. Used to factory-reset efused devices. Specify BIP-39 phrase within double-quotes.", type=str ) + parser.add_argument( + "--clear-backup", help="Clear backup flag", required=False, action='store_true' + ) args = parser.parse_args() if not len(sys.argv) > 1: @@ -1115,6 +1118,12 @@ def main(): print("Disabling boot") pc_usb.erase_region(locs['LOC_LOADER'][0], 1024 * 256) + if args.clear_backup: + print("Clearing backup flag") + pc_usb.erase_region(locs["LOC_KERNEL"][0] + 0x0140_0000 - 0x1000, 4096) + print("Backup flag cleared") + exit(0) + if args.enable_boot_wipe: if args.loader == None: print("Must provide both a loader and soc image")