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Just FYI, there's an ongoing effort to develop a SystemVerilog frontend for Yosys, and one of the goals is to be able to synthesize the whole core_tile: povik/yosys-slang#31
The text was updated successfully, but these errors were encountered:
alikates
changed the title
Synthesys with fully Open Source tools
Synthesis with fully Open Source tools
Aug 16, 2024
Please, keep in mind that internally we have some "fixes" of the code in terms of linting/correctness that might make it easier for yosys to parse. I am unsure when these will be pushed.
Just FYI, there's an ongoing effort to develop a SystemVerilog frontend for Yosys, and one of the goals is to be able to synthesize the whole
core_tile
: povik/yosys-slang#31The text was updated successfully, but these errors were encountered: