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Support instructions that clobber all registers and have non-fixed uses #145

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fitzgen opened this issue Jun 22, 2023 · 2 comments
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@fitzgen
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fitzgen commented Jun 22, 2023

There are currently special cases for when an instruction uses a fixed register and clobbers it, but when an instruction uses an unconstrained register and clobbers all registers there is no special case and we get a TooManyLiveRegisters error. This can be avoided by adding an unnecessary fixed register constraint so that the first special case is hit, but one shouldn't have to constrain the register allocation in that way, regalloc2 should just handle this case.

fitzgen added a commit to fitzgen/wasmtime that referenced this issue Jun 22, 2023
…l` calling convention

This is a workaround to fix
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=60035 in the meantime,
until bytecodealliance/regalloc2#145 is fixed.

Co-Authored-By: Jamey Sharp <[email protected]>
Co-Authored-By: Trevor Elliott <[email protected]>
fitzgen added a commit to fitzgen/wasmtime that referenced this issue Jun 22, 2023
…l` calling convention

This is a workaround to fix
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=60035 in the meantime,
until bytecodealliance/regalloc2#145 is fixed.

Co-Authored-By: Jamey Sharp <[email protected]>
Co-Authored-By: Trevor Elliott <[email protected]>
fitzgen added a commit to fitzgen/wasmtime that referenced this issue Jun 22, 2023
…l` calling convention

This is a workaround to fix
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=60035 in the meantime,
until bytecodealliance/regalloc2#145 is fixed.

Co-Authored-By: Jamey Sharp <[email protected]>
Co-Authored-By: Trevor Elliott <[email protected]>
github-merge-queue bot pushed a commit to bytecodealliance/wasmtime that referenced this issue Jun 22, 2023
…l` calling convention (#6632)

This is a workaround to fix
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=60035 in the meantime,
until bytecodealliance/regalloc2#145 is fixed.

Co-authored-by: Jamey Sharp <[email protected]>
Co-authored-by: Trevor Elliott <[email protected]>
@cfallin
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cfallin commented Jun 27, 2023

My comment in #146 should probably have gone here; I think there's a way to do this more generally, by doing splits in a more general way (in the middle of insts) and leveraging overlap support.

elliottt added a commit to elliottt/wasmtime that referenced this issue Mar 11, 2024
Work around bytecodealliance/regalloc2#145 in
the same way that we do for tail calls -- using a fixed use constraint.
elliottt added a commit to elliottt/wasmtime that referenced this issue Mar 11, 2024
Work around bytecodealliance/regalloc2#145 in
the same way that we do for tail calls -- using a fixed use constraint.
elliottt added a commit to elliottt/wasmtime that referenced this issue Mar 11, 2024
Work around bytecodealliance/regalloc2#145 in
the same way that we do for tail calls -- using a fixed use constraint.
github-merge-queue bot pushed a commit to bytecodealliance/wasmtime that referenced this issue Mar 11, 2024
* Emit fixed use constraints for indirect call destinations

Work around bytecodealliance/regalloc2#145 in
the same way that we do for tail calls -- using a fixed use constraint.

* Add tests to exercise indirect calls with the winch calling convention
@Iizerd
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Iizerd commented Jul 19, 2024

The interesting thing with this issue is that it isn't limited to a single RegClass. If an instruction clobbers/Defs all registers in the Vector class, but has some Uses in the Integer class that are non-fixed, the error TooManyLiveRegisters is still raised. This is really unintuitive because the classes (in my mind) should be entirely disjoint and the constraints on one should not affect another. I confess I'm not familiar enough with the code base to try and tackle this yet though.

Additionally, under similar circumstances I was able to reach the panic here https://github.com/bytecodealliance/regalloc2/blob/main/src/ion/process.rs#L1266

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