From 0062377afc61550f9ebdf41bcf33f0bbf1d23d6a Mon Sep 17 00:00:00 2001 From: Juri Date: Tue, 1 Mar 2022 17:24:39 +0100 Subject: [PATCH 1/6] change RAM length --- ld/NRF51822.ld | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ld/NRF51822.ld b/ld/NRF51822.ld index c766981..6362bec 100644 --- a/ld/NRF51822.ld +++ b/ld/NRF51822.ld @@ -3,7 +3,7 @@ MEMORY { FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000 - RAM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x2000 + RAM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x6000 } OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") From 331c1693931a72f0073dff65c41388f7694f96ee Mon Sep 17 00:00:00 2001 From: Juri Date: Mon, 7 Mar 2022 18:29:05 +0100 Subject: [PATCH 2/6] add ram sizes 16k and 32k set with "RAM_SIZE": "\"32k\"" --- CMake/toolchain.cmake | 18 +++- ld/NRF51822_16k.ld | 151 ++++++++++++++++++++++++++++ ld/{NRF51822.ld => NRF51822_32k.ld} | 0 readme.md | 3 +- 4 files changed, 170 insertions(+), 2 deletions(-) create mode 100644 ld/NRF51822_16k.ld rename ld/{NRF51822.ld => NRF51822_32k.ld} (100%) diff --git a/CMake/toolchain.cmake b/CMake/toolchain.cmake index 3645d58..219a854 100644 --- a/CMake/toolchain.cmake +++ b/CMake/toolchain.cmake @@ -5,6 +5,22 @@ if(TARGET_NORDIC_NRF51822_16K_GCC_TOOLCHAIN_INCLUDED) endif() set(TARGET_NORDIC_NRF51822_16K_GCC_TOOLCHAIN_INCLUDED 1) +if(NOT YOTTA_CFG_NRF51822_RAM_SIZE) + message(WARNING "No definition of YOTTA_CFG_NRF51822_RAM_SIZE found, building image for default 16K target.") + set(YOTTA_CFG_NRF51822_RAM_SIZE "16K") +else() + # Ensure that the string is uppercase to build the macro definitions correctly + string(TOUPPER "${YOTTA_CFG_NRF51822_RAM_SIZE}" YOTTA_CFG_NRF51822_RAM_SIZE) + if(YOTTA_CFG_NRF51822_RAM_SIZE STREQUAL "16K") + + elseif(YOTTA_CFG_NRF51822_RAM_SIZE STREQUAL "32K") + + else() + # Fail if the RAM size is not supported + message(FATAL_ERROR "Cannot build image for target with RAM size '${YOTTA_CFG_NRF51822_RAM_SIZE}'. Please modify your yotta config to set YOTTA_CFG_NRF51822_RAM_SIZE a supported option.\nSupported RAM sizes: '16K' (default), '32K'.") + endif() +endif() + # legacy definitions for building mbed 2.0 modules with a retrofitted build # system: set(MBED_LEGACY_TARGET_DEFINITIONS "NORDIC" "NRF51_CALLIOPE" "MCU_NRF51822" "MCU_NRF51_16K" "MCU_NORDIC_16K" "MCU_NRF51_16K_S110") @@ -19,7 +35,7 @@ set(CMAKE_C_FLAGS_INIT "${CMAKE_C_FLAGS_INIT} ${_CPU_COMPILATION_OPT set(CMAKE_ASM_FLAGS_INIT "${CMAKE_ASM_FLAGS_INIT} ${_CPU_COMPILATION_OPTIONS}") set(CMAKE_CXX_FLAGS_INIT "${CMAKE_CXX_FLAGS_INIT} ${_CPU_COMPILATION_OPTIONS} -std=c++11 -fwrapv") set(CMAKE_MODULE_LINKER_FLAGS_INIT "${CMAKE_MODULE_LINKER_FLAGS_INIT} -mcpu=cortex-m0 -mthumb") -set(CMAKE_EXE_LINKER_FLAGS_INIT "${CMAKE_EXE_LINKER_FLAGS_INIT} -mcpu=cortex-m0 -mthumb -T\"${CMAKE_CURRENT_LIST_DIR}/../ld/NRF51822.ld\"") +set(CMAKE_EXE_LINKER_FLAGS_INIT "${CMAKE_EXE_LINKER_FLAGS_INIT} -mcpu=cortex-m0 -mthumb -T\"${CMAKE_CURRENT_LIST_DIR}/../ld/NRF51822_${YOTTA_CFG_NRF51822_RAM_SIZE}.ld\"") # used by the apply_target_rules function below: set(NRF51822_SOFTDEVICE_HEX_FILE "${CMAKE_CURRENT_LIST_DIR}/../softdevice/s110_nrf51822_8.0.0_softdevice.hex") diff --git a/ld/NRF51822_16k.ld b/ld/NRF51822_16k.ld new file mode 100644 index 0000000..c766981 --- /dev/null +++ b/ld/NRF51822_16k.ld @@ -0,0 +1,151 @@ +/* Linker script to configure memory regions. */ + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000 + RAM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x2000 +} + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") + +/* Linker script to place sections and symbol values. Should be used together + * with other linker script that defines memory regions FLASH and RAM. + * It references following symbols, which must be defined in code: + * Reset_Handler : Entry of reset handler + * + * It defines following symbols, which code can use without definition: + * __exidx_start + * __exidx_end + * __etext + * __data_start__ + * __preinit_array_start + * __preinit_array_end + * __init_array_start + * __init_array_end + * __fini_array_start + * __fini_array_end + * __data_end__ + * __bss_start__ + * __bss_end__ + * __end__ + * end + * __HeapLimit + * __StackLimit + * __StackTop + * __stack + */ +ENTRY(Reset_Handler) + +SECTIONS +{ + .text : + { + KEEP(*(.Vectors)) + *(.text*) + + KEEP(*(.init)) + KEEP(*(.fini)) + + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + *(SORT(.ctors.*)) + *(.ctors) + + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + *(SORT(.dtors.*)) + *(.dtors) + + *(.rodata*) + + KEEP(*(.eh_frame*)) + } > FLASH + + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH + + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; + + __etext = .; + + .data : AT (__etext) + { + __data_start__ = .; + *(vtable) + *(.data*) + + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); + + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); + + + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); + + *(.jcr) + . = ALIGN(4); + /* All data end */ + __data_end__ = .; + + } > RAM + + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; + } > RAM + + .heap (COPY): + { + __end__ = .; + end = __end__; + *(.heap*) + __HeapLimit = .; + } > RAM + + /* .stack_dummy section doesn't contains any symbols. It is only + * used for linker to calculate size of stack sections, and assign + * values to stack symbols later */ + .stack_dummy (COPY): + { + *(.stack*) + } > RAM + + /* Set stack top to end of RAM, and stack limit move down by + * size of stack_dummy section */ + __StackTop = ORIGIN(RAM) + LENGTH(RAM); + __StackLimit = __StackTop - SIZEOF(.stack_dummy); + PROVIDE(__stack = __StackTop); + + /* Check if data + heap + stack exceeds RAM limit */ + ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack") +} \ No newline at end of file diff --git a/ld/NRF51822.ld b/ld/NRF51822_32k.ld similarity index 100% rename from ld/NRF51822.ld rename to ld/NRF51822_32k.ld diff --git a/readme.md b/readme.md index ca771af..bbe0a26 100644 --- a/readme.md +++ b/readme.md @@ -1,2 +1,3 @@ -## yotta Target Description using GCC to compile for Nordic nRF51822 16KB device. +## yotta Target Description using GCC to compile for Nordic nRF51822 16K and 32K device. +To choose RAM size use `"RAM_SIZE": "\"32k\""`. Default is set to 16K From 5b03fece2bc4d7e3c4babf83df228d90741dde0e Mon Sep 17 00:00:00 2001 From: Juri Date: Mon, 7 Mar 2022 19:05:51 +0100 Subject: [PATCH 3/6] remove K for updating case --- ld/{NRF51822_16k.ld => NRF51822_16.ld} | 0 ld/{NRF51822_32k.ld => NRF51822_32.ld} | 0 2 files changed, 0 insertions(+), 0 deletions(-) rename ld/{NRF51822_16k.ld => NRF51822_16.ld} (100%) rename ld/{NRF51822_32k.ld => NRF51822_32.ld} (100%) diff --git a/ld/NRF51822_16k.ld b/ld/NRF51822_16.ld similarity index 100% rename from ld/NRF51822_16k.ld rename to ld/NRF51822_16.ld diff --git a/ld/NRF51822_32k.ld b/ld/NRF51822_32.ld similarity index 100% rename from ld/NRF51822_32k.ld rename to ld/NRF51822_32.ld From 64ea93fea75bdcb80a2ab031a870f15d6e239cdf Mon Sep 17 00:00:00 2001 From: Juri Date: Mon, 7 Mar 2022 19:06:10 +0100 Subject: [PATCH 4/6] add uppercase K --- ld/{NRF51822_16.ld => NRF51822_16K.ld} | 0 ld/{NRF51822_32.ld => NRF51822_32K.ld} | 0 2 files changed, 0 insertions(+), 0 deletions(-) rename ld/{NRF51822_16.ld => NRF51822_16K.ld} (100%) rename ld/{NRF51822_32.ld => NRF51822_32K.ld} (100%) diff --git a/ld/NRF51822_16.ld b/ld/NRF51822_16K.ld similarity index 100% rename from ld/NRF51822_16.ld rename to ld/NRF51822_16K.ld diff --git a/ld/NRF51822_32.ld b/ld/NRF51822_32K.ld similarity index 100% rename from ld/NRF51822_32.ld rename to ld/NRF51822_32K.ld From c24f9196220e35bf5e15114c310ea95b32bd3896 Mon Sep 17 00:00:00 2001 From: Juri Date: Mon, 7 Mar 2022 19:06:57 +0100 Subject: [PATCH 5/6] update readme --- readme.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/readme.md b/readme.md index bbe0a26..6790962 100644 --- a/readme.md +++ b/readme.md @@ -1,3 +1,3 @@ ## yotta Target Description using GCC to compile for Nordic nRF51822 16K and 32K device. -To choose RAM size use `"RAM_SIZE": "\"32k\""`. Default is set to 16K +To choose RAM size use `"RAM_SIZE": "\"32K\""`. Default is set to 16K From 604bd59f20e4866c7608aad1ea4691084dc70261 Mon Sep 17 00:00:00 2001 From: Juri Date: Mon, 7 Mar 2022 19:16:47 +0100 Subject: [PATCH 6/6] Update env variable name --- CMake/toolchain.cmake | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/CMake/toolchain.cmake b/CMake/toolchain.cmake index 219a854..4f60802 100644 --- a/CMake/toolchain.cmake +++ b/CMake/toolchain.cmake @@ -5,19 +5,19 @@ if(TARGET_NORDIC_NRF51822_16K_GCC_TOOLCHAIN_INCLUDED) endif() set(TARGET_NORDIC_NRF51822_16K_GCC_TOOLCHAIN_INCLUDED 1) -if(NOT YOTTA_CFG_NRF51822_RAM_SIZE) - message(WARNING "No definition of YOTTA_CFG_NRF51822_RAM_SIZE found, building image for default 16K target.") - set(YOTTA_CFG_NRF51822_RAM_SIZE "16K") +if(NOT YOTTA_CFG_RAM_SIZE) + message(WARNING "No definition of YOTTA_CFG_RAM_SIZE found, building image for default 16K target.") + set(YOTTA_CFG_RAM_SIZE "16K") else() # Ensure that the string is uppercase to build the macro definitions correctly - string(TOUPPER "${YOTTA_CFG_NRF51822_RAM_SIZE}" YOTTA_CFG_NRF51822_RAM_SIZE) - if(YOTTA_CFG_NRF51822_RAM_SIZE STREQUAL "16K") + string(TOUPPER "${YOTTA_CFG_RAM_SIZE}" YOTTA_CFG_RAM_SIZE) + if(YOTTA_CFG_RAM_SIZE STREQUAL "16K") - elseif(YOTTA_CFG_NRF51822_RAM_SIZE STREQUAL "32K") + elseif(YOTTA_CFG_RAM_SIZE STREQUAL "32K") else() # Fail if the RAM size is not supported - message(FATAL_ERROR "Cannot build image for target with RAM size '${YOTTA_CFG_NRF51822_RAM_SIZE}'. Please modify your yotta config to set YOTTA_CFG_NRF51822_RAM_SIZE a supported option.\nSupported RAM sizes: '16K' (default), '32K'.") + message(FATAL_ERROR "Cannot build image for target with RAM size '${YOTTA_CFG_RAM_SIZE}'. Please modify your yotta config to set YOTTA_CFG_RAM_SIZE a supported option.\nSupported RAM sizes: '16K' (default), '32K'.") endif() endif() @@ -35,7 +35,7 @@ set(CMAKE_C_FLAGS_INIT "${CMAKE_C_FLAGS_INIT} ${_CPU_COMPILATION_OPT set(CMAKE_ASM_FLAGS_INIT "${CMAKE_ASM_FLAGS_INIT} ${_CPU_COMPILATION_OPTIONS}") set(CMAKE_CXX_FLAGS_INIT "${CMAKE_CXX_FLAGS_INIT} ${_CPU_COMPILATION_OPTIONS} -std=c++11 -fwrapv") set(CMAKE_MODULE_LINKER_FLAGS_INIT "${CMAKE_MODULE_LINKER_FLAGS_INIT} -mcpu=cortex-m0 -mthumb") -set(CMAKE_EXE_LINKER_FLAGS_INIT "${CMAKE_EXE_LINKER_FLAGS_INIT} -mcpu=cortex-m0 -mthumb -T\"${CMAKE_CURRENT_LIST_DIR}/../ld/NRF51822_${YOTTA_CFG_NRF51822_RAM_SIZE}.ld\"") +set(CMAKE_EXE_LINKER_FLAGS_INIT "${CMAKE_EXE_LINKER_FLAGS_INIT} -mcpu=cortex-m0 -mthumb -T\"${CMAKE_CURRENT_LIST_DIR}/../ld/NRF51822_${YOTTA_CFG_RAM_SIZE}.ld\"") # used by the apply_target_rules function below: set(NRF51822_SOFTDEVICE_HEX_FILE "${CMAKE_CURRENT_LIST_DIR}/../softdevice/s110_nrf51822_8.0.0_softdevice.hex")