From df39165bf3f938304eefc4f89a6919a936aa9dcb Mon Sep 17 00:00:00 2001 From: drom Date: Mon, 23 Dec 2024 13:31:26 +0000 Subject: [PATCH] =?UTF-8?q?Deploying=20to=20gh-pages=20from=20@=20circt/pe?= =?UTF-8?q?rf@7155120531cd12e76b8df51e09b3d90b512caa0e=20=F0=9F=9A=80?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ...Medium1Large1Mega1.top.v.lo-2024-12-23.log | 99 +++++++++++++++++++ ...Large1Mega1.top.v.lo-vlint-2024-12-23.json | 49 +++++++++ test1-2024-12-23.log | 26 +++++ test1-vlint-2024-12-23.json | 4 + test2-2024-12-23.log | 20 ++++ test2-vlint-2024-12-23.json | 4 + test3-2024-12-23.log | 29 ++++++ test3-vlint-2024-12-23.json | 4 + 8 files changed, 235 insertions(+) create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-12-23.log create mode 100644 chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-12-23.json create mode 100644 test1-2024-12-23.log create mode 100644 test1-vlint-2024-12-23.json create mode 100644 test2-2024-12-23.log create mode 100644 test2-vlint-2024-12-23.json create mode 100644 test3-2024-12-23.log create mode 100644 test3-vlint-2024-12-23.json diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-12-23.log b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-12-23.log new file mode 100644 index 0000000..11192cf --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-2024-12-23.log @@ -0,0 +1,99 @@ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 16.2395 seconds + + ----User Time---- ----Wall Time---- ----Name---- + 2.5847 ( 7.2%) 2.5847 ( 15.9%) FIR Parser + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) 0.0000 ( 0.0%) Parse OMIR + 2.2010 ( 6.1%) 2.2010 ( 13.6%) Parse modules + 0.3417 ( 0.9%) 0.3417 ( 2.1%) Verify circuit + 14.9598 ( 41.5%) 6.7042 ( 41.3%) 'firrtl.circuit' Pipeline + 0.3361 ( 0.9%) 0.3361 ( 2.1%) LowerFIRRTLAnnotations + 0.0930 ( 0.3%) 0.0930 ( 0.6%) LowerIntrinsics + 0.0929 ( 0.3%) 0.0929 ( 0.6%) (A) circt::firrtl::InstanceGraph + 2.8543 ( 7.9%) 0.7303 ( 4.5%) 'firrtl.module' Pipeline + 1.1826 ( 3.3%) 0.3079 ( 1.9%) DropName + 1.6686 ( 4.6%) 0.4215 ( 2.6%) CSE + 0.0008 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.0000 ( 0.0%) 0.0000 ( 0.0%) InjectDUTHierarchy + 0.1124 ( 0.3%) 0.0287 ( 0.2%) 'firrtl.module' Pipeline + 0.1098 ( 0.3%) 0.0281 ( 0.2%) LowerCHIRRTLPass + 0.0933 ( 0.3%) 0.0933 ( 0.6%) InferWidths + 0.1999 ( 0.6%) 0.1999 ( 1.2%) MemToRegOfVec + 0.3682 ( 1.0%) 0.3682 ( 2.3%) InferResets + 0.0501 ( 0.1%) 0.0501 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0671 ( 0.2%) 0.0671 ( 0.4%) WireDFT + 0.5173 ( 1.4%) 0.1330 ( 0.8%) 'firrtl.module' Pipeline + 0.5154 ( 1.4%) 0.1324 ( 0.8%) FlattenMemory + 0.2582 ( 0.7%) 0.2582 ( 1.6%) LowerFIRRTLTypes + 0.6828 ( 1.9%) 0.1760 ( 1.1%) 'firrtl.module' Pipeline + 0.6618 ( 1.8%) 0.1700 ( 1.0%) ExpandWhens + 0.0176 ( 0.0%) 0.0055 ( 0.0%) SFCCompat + 0.3161 ( 0.9%) 0.3161 ( 1.9%) Inliner + 0.5400 ( 1.5%) 0.1387 ( 0.9%) 'firrtl.module' Pipeline + 0.5381 ( 1.5%) 0.1382 ( 0.9%) RandomizeRegisterInit + 0.9414 ( 2.6%) 0.9414 ( 5.8%) CheckCombLoops + 0.0505 ( 0.1%) 0.0505 ( 0.3%) (A) circt::firrtl::InstanceGraph + 3.2253 ( 9.0%) 0.8194 ( 5.0%) 'firrtl.module' Pipeline + 2.9335 ( 8.1%) 0.7477 ( 4.6%) Canonicalizer + 0.2886 ( 0.8%) 0.0772 ( 0.5%) InferReadWrite + 0.1411 ( 0.4%) 0.1411 ( 0.9%) PrefixModules + 0.0557 ( 0.2%) 0.0557 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 0.6138 ( 1.7%) 0.6138 ( 3.8%) IMConstProp + 0.0551 ( 0.2%) 0.0551 ( 0.3%) AddSeqMemPorts + 0.0549 ( 0.2%) 0.0549 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.1581 ( 0.4%) 0.1581 ( 1.0%) CreateSiFiveMetadata + 0.0408 ( 0.1%) 0.0408 ( 0.3%) ExtractInstances + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.0000 ( 0.0%) 0.0000 ( 0.0%) GrandCentral + 0.0003 ( 0.0%) 0.0003 ( 0.0%) BlackBoxReader + 0.3235 ( 0.9%) 0.0830 ( 0.5%) 'firrtl.module' Pipeline + 0.3214 ( 0.9%) 0.0826 ( 0.5%) DropName + 0.3085 ( 0.9%) 0.3085 ( 1.9%) SymbolDCE + 0.2298 ( 0.6%) 0.2298 ( 1.4%) InnerSymbolDCE + 2.0029 ( 5.6%) 1.1324 ( 7.0%) 'firrtl.circuit' Pipeline + 0.8704 ( 2.4%) 0.2221 ( 1.4%) 'firrtl.module' Pipeline + 0.8687 ( 2.4%) 0.2216 ( 1.4%) Canonicalizer + 0.5100 ( 1.4%) 0.5100 ( 3.1%) IMDeadCodeElim + 0.0523 ( 0.1%) 0.0523 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0000 ( 0.0%) 0.0000 ( 0.0%) EmitOMIR + 0.0239 ( 0.1%) 0.0239 ( 0.1%) ResolveTraces + 0.0001 ( 0.0%) 0.0001 ( 0.0%) (A) circt::firrtl::NLATable + 0.2876 ( 0.8%) 0.2876 ( 1.8%) LowerXMR + 0.0479 ( 0.1%) 0.0479 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.7371 ( 2.0%) 0.7371 ( 4.5%) LowerFIRRTLToHW + 0.0528 ( 0.1%) 0.0528 ( 0.3%) (A) circt::firrtl::InstanceGraph + 0.0002 ( 0.0%) 0.0002 ( 0.0%) (A) circt::firrtl::NLATable + 5.1375 ( 14.3%) 1.4159 ( 8.7%) 'hw.module' Pipeline + 0.9395 ( 2.6%) 0.2561 ( 1.6%) CSE + 0.0009 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 2.9948 ( 8.3%) 0.9802 ( 6.0%) Canonicalizer + 0.6186 ( 1.7%) 0.1759 ( 1.1%) CSE + 0.0006 ( 0.0%) 0.0002 ( 0.0%) (A) DominanceInfo + 0.5786 ( 1.6%) 0.2189 ( 1.3%) LowerSeqFIRRTLToSV + 0.1717 ( 0.5%) 0.1717 ( 1.1%) HWMemSimImpl + 3.4148 ( 9.5%) 0.9589 ( 5.9%) 'hw.module' Pipeline + 0.9365 ( 2.6%) 0.2769 ( 1.7%) CSE + 0.0011 ( 0.0%) 0.0004 ( 0.0%) (A) DominanceInfo + 1.6835 ( 4.7%) 0.6098 ( 3.8%) Canonicalizer + 0.5323 ( 1.5%) 0.1737 ( 1.1%) CSE + 0.0010 ( 0.0%) 0.0003 ( 0.0%) (A) DominanceInfo + 0.2550 ( 0.7%) 0.0748 ( 0.5%) HWCleanup + 0.5677 ( 1.6%) 0.1423 ( 0.9%) 'hw.module' Pipeline + 0.0569 ( 0.2%) 0.0152 ( 0.1%) HWLegalizeModules + 0.5057 ( 1.4%) 0.1283 ( 0.8%) PrettifyVerilog + 0.2168 ( 0.6%) 0.2168 ( 1.3%) StripDebugInfoWithPred + 1.6635 ( 4.6%) 1.6635 ( 10.2%) ExportVerilog + 2.0851 ( 5.8%) 0.5372 ( 3.3%) 'builtin.module' Pipeline + 1.5479 ( 4.3%) 0.3877 ( 2.4%) 'hw.module' Pipeline + 1.5454 ( 4.3%) 0.3870 ( 2.4%) PrepareForEmission + -0.5322 ( -1.5%) -0.5322 ( -3.3%) Rest + 36.0335 (100.0%) 16.2395 (100.0%) Total + +{ + totalTime: 16.286, + maxMemory: 864604160 +} diff --git a/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-12-23.json b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-12-23.json new file mode 100644 index 0000000..7261973 --- /dev/null +++ b/chipyard.TestHarness.RocketSmall1Medium1Big1_BoomMedium1Large1Mega1.top.v.lo-vlint-2024-12-23.json @@ -0,0 +1,49 @@ +{ + "errors": { + "'table_1_ext'": 1, + "This may be because there's no search path specified with -I.": 1, + "'table_0_ext'": 1, + "'hi_us_0_ext'": 1, + "'table_ext'": 1, + "'hi_us_ext'": 1, + "'meta_0_0_ext'": 1, + "'data_ext'": 1, + "'ebtb_ext'": 1, + "'btb_0_ext'": 1, + "'meta_0_ext'": 1, + "'rob_debug_inst_mem_1_ext'": 1, + "'meta_2_ext'": 1, + "'tag_array_5_ext'": 1, + "'rob_debug_inst_mem_0_ext'": 1, + "'ghist_0_0_ext'": 1, + "'meta_1_ext'": 1, + "'rob_debug_inst_mem_ext'": 1, + "'ghist_0_ext'": 1, + "'meta_ext'": 1, + "'dataArrayB0Way_0_ext'": 1, + "'tag_array_4_ext'": 1, + "'array_0_0_ext'": 1, + "'tag_array_3_ext'": 1, + "'data_arrays_0_2_ext'": 1, + "'tag_array_2_ext'": 1, + "'data_arrays_0_1_ext'": 1, + "'data_arrays_0_0_ext'": 1, + "'tag_array_0_ext'": 1, + "'tag_array_ext'": 1, + "'data_arrays_0_ext'": 1, + "'plusarg_reader'": 142, + "'l2_tlb_ram_1_ext'": 1, + "'l2_tlb_ram_0_ext'": 1, + "'tag_array_1_ext'": 1, + "'l2_tlb_ram_ext'": 1, + "'cc_banks_0_ext'": 1, + "'cc_dir_ext'": 1, + "'ClockDividerN'": 1, + "'EICG_wrapper'": 1, + "'GenericDigitalOutIOCell'": 9, + "'GenericDigitalInIOCell'": 13 + }, + "warnings": { + "WIDTH": 113 + } +} \ No newline at end of file diff --git a/test1-2024-12-23.log b/test1-2024-12-23.log new file mode 100644 index 0000000..17933a3 --- /dev/null +++ b/test1-2024-12-23.log @@ -0,0 +1,26 @@ +regress/test1.fir:7247:15: error: use of unknown declaration 'validif' + tmp499 <= validif(head(inp_a.inp_c.inp_j.inp_gc.inp_gkb.inp_flb.inp_fic, 1), SInt<13>("h-b9c")) + ^ +regress/test1.fir:28262:15: error: use of unknown declaration 'validif' + tmp550 <= validif(tail(asUInt(SInt<22>("h-3089")), 21), tmp548) + ^ +regress/test1.fir:51636:15: error: use of unknown declaration 'validif' + tmp541 <= validif(tail(inp_jc.inp_hd.inp_ae.inp_ei.inp_ahb.inp_mlc, 26), inp_a.inp_b.inp_d.inp_f.inp_g.inp_bb.inp_eb.inp_kd.inp_nk.inp_an.inp_gp.inp_mic) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.0656 seconds + + ----Wall Time---- ----Name---- + 0.0648 ( 98.8%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.0606 ( 92.4%) Parse modules + 0.0008 ( 1.2%) Rest + 0.0656 (100.0%) Total + +{ + totalTime: 0.073, + maxMemory: 0 +} diff --git a/test1-vlint-2024-12-23.json b/test1-vlint-2024-12-23.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test1-vlint-2024-12-23.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test2-2024-12-23.log b/test2-2024-12-23.log new file mode 100644 index 0000000..8e453f7 --- /dev/null +++ b/test2-2024-12-23.log @@ -0,0 +1,20 @@ +regress/test2.fir:247424:17: error: use of unknown declaration 'validif' + tmp20070 <= validif(head(UInt<3>(6), 1), SInt<24>("b-11111101000010001010101")) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.8487 seconds + + ----Wall Time---- ----Name---- + 0.8468 ( 99.8%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.8032 ( 94.6%) Parse modules + 0.0019 ( 0.2%) Rest + 0.8487 (100.0%) Total + +{ + totalTime: 0.862, + maxMemory: 173015040 +} diff --git a/test2-vlint-2024-12-23.json b/test2-vlint-2024-12-23.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test2-vlint-2024-12-23.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file diff --git a/test3-2024-12-23.log b/test3-2024-12-23.log new file mode 100644 index 0000000..0f552b0 --- /dev/null +++ b/test3-2024-12-23.log @@ -0,0 +1,29 @@ +regress/test3.fir:20273:15: error: use of unknown declaration 'validif' + tmp236 <= validif(head(inp_h.inp_i.inp_k.inp_p.inp_gb.inp_pb.inp_nd[0][3][3].inp_ng.inp_li, 1), UInt<6>(33)) + ^ +regress/test3.fir:170544:16: error: use of unknown declaration 'validif' + tmp2807 <= validif(tail(UInt<29>("b111111100001000110000101110"), 28), SInt<4>("o-1")) + ^ +regress/test3.fir:324162:15: error: use of unknown declaration 'validif' + tmp523 <= validif(head(inp_e.inp_ob.inp_ge.inp_ki[1][2][3].inp_hk.inp_il, 1), inp_a.inp_c.inp_hc.inp_fd.inp_je.inp_dl) + ^ +regress/test3.fir:847311:15: error: use of unknown declaration 'validif' + tmp237 <= validif(tail(asUInt(inp_e.inp_i.inp_j.inp_bb[4][4].inp_oh), 18), tmp227) + ^ +===-------------------------------------------------------------------------=== + ... Execution time report ... +===-------------------------------------------------------------------------=== + Total Execution Time: 0.4062 seconds + + ----Wall Time---- ----Name---- + 0.4039 ( 99.4%) FIR Parser + 0.0000 ( 0.0%) Parse annotations + 0.0000 ( 0.0%) Parse OMIR + 0.3669 ( 90.3%) Parse modules + 0.0024 ( 0.6%) Rest + 0.4062 (100.0%) Total + +{ + totalTime: 0.416, + maxMemory: 138043392 +} diff --git a/test3-vlint-2024-12-23.json b/test3-vlint-2024-12-23.json new file mode 100644 index 0000000..86f39b6 --- /dev/null +++ b/test3-vlint-2024-12-23.json @@ -0,0 +1,4 @@ +{ + "errors": {}, + "warnings": {} +} \ No newline at end of file