diff --git a/src/libtriton/arch/arm/aarch64/aarch64Semantics.cpp b/src/libtriton/arch/arm/aarch64/aarch64Semantics.cpp
index d20dbb458..a856c9d8d 100644
--- a/src/libtriton/arch/arm/aarch64/aarch64Semantics.cpp
+++ b/src/libtriton/arch/arm/aarch64/aarch64Semantics.cpp
@@ -3115,6 +3115,11 @@ namespace triton {
           triton::arch::OperandWrapper& dst = inst.operands[0];
           triton::arch::OperandWrapper& src = inst.operands[1];
 
+          /* LDR (literal) */
+          if (inst.operands.size() == 2 && src.getType() == triton::arch::OP_IMM) {
+            src = triton::arch::MemoryAccess(src.getConstImmediate().getValue(), dst.getSize());
+          }
+
           /* Create the semantics of the LOAD */
           auto node1 = this->symbolicEngine->getOperandAst(inst, src);
 
@@ -3143,7 +3148,6 @@ namespace triton {
             /* Spread taint */
             expr2->isTainted = this->taintEngine->isTainted(base);
           }
-
           /* LDR <Xt>, [<Xn|SP>, #<simm>]! */
           else if (inst.operands.size() == 2 && inst.isWriteBack() == true) {
             triton::arch::Register& base = src.getMemory().getBaseRegister();
diff --git a/src/testers/unittests/test_github_issues.py b/src/testers/unittests/test_github_issues.py
index 9b5670f10..c327299fe 100644
--- a/src/testers/unittests/test_github_issues.py
+++ b/src/testers/unittests/test_github_issues.py
@@ -629,6 +629,26 @@ def test_1(self):
         self.assertEqual(ctx.getConcreteMemoryAreaValue(0x129098, 16), b'/proc/self/maps\x00')
 
 
+class TestIssue1265(unittest.TestCase):
+    """Testing #1265."""
+
+    def setUp(self):
+        self.ctx = TritonContext(ARCH.AARCH64)
+        self.ctx.setConcreteMemoryValue(MemoryAccess(0x122fff00, 8), 0x1122334455667788)
+
+    def test_1(self):
+        inst = Instruction(0x12300000, b'\x00\xf8\xff\x58') # ldr x0, #-256
+        self.ctx.processing(inst)
+        x0 = self.ctx.getConcreteRegisterValue(self.ctx.registers.x0)
+        self.assertEqual(x0, 0x1122334455667788)
+
+    def test_2(self):
+        inst = Instruction(0x12300000, b'\x00\xf8\xff\x18') # ldr w0, #-256
+        self.ctx.processing(inst)
+        x0 = self.ctx.getConcreteRegisterValue(self.ctx.registers.x0)
+        self.assertEqual(x0, 0x55667788)
+
+
 # FIXME: Uncomment this one when we will move to Capstone 5 as min version
 #class TestIssue1195(unittest.TestCase):
 #    """Testing #1195."""