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[RISC-V] Fix some minor errors (#107179)
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* [RISC-V] Fix minor errors

* Delete Unused Codes in RISCV64 Unwinder
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clamp03 authored Oct 8, 2024
1 parent 3f28b1a commit afad60c
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Showing 9 changed files with 45 additions and 669 deletions.
2 changes: 1 addition & 1 deletion src/coreclr/inc/regdisp.h
Original file line number Diff line number Diff line change
Expand Up @@ -379,7 +379,7 @@ inline void SyncRegDisplayToCurrentContext(REGDISPLAY* pRD)

#if defined(TARGET_64BIT)
pRD->SP = (INT_PTR)GetSP(pRD->pCurrentContext);
pRD->ControlPC = INT_PTR(GetIP(pRD->pCurrentContext));
pRD->ControlPC = (INT_PTR)GetIP(pRD->pCurrentContext);
#elif defined(TARGET_ARM)
pRD->SP = (DWORD)GetSP(pRD->pCurrentContext);
pRD->ControlPC = (DWORD)GetIP(pRD->pCurrentContext);
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7 changes: 4 additions & 3 deletions src/coreclr/jit/unwindriscv64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -170,7 +170,6 @@ void Compiler::unwindSaveReg(regNumber reg, int offset)
}
#endif // FEATURE_CFI_SUPPORT
int z = offset / 8;
// assert(0 <= z && z <= 0xFF);

UnwindInfo* pu = &funCurrentFunc()->uwi;

Expand All @@ -183,6 +182,7 @@ void Compiler::unwindSaveReg(regNumber reg, int offset)

BYTE x = (BYTE)(reg - REG_RA);
assert(0 <= x && x <= 0x1B);
assert(0 <= z && z <= 0xFF);

pu->AddCode(0xD0, (BYTE)x, (BYTE)z);
}
Expand All @@ -194,6 +194,7 @@ void Compiler::unwindSaveReg(regNumber reg, int offset)

BYTE x = (BYTE)(reg - REG_F8);
assert(0 <= x && x <= 0x13);
assert(0 <= z && z <= 0xFFF);

pu->AddCode(0xDC | (BYTE)(x >> 4), (BYTE)(x << 4) | (BYTE)(z >> 8), (BYTE)z);
}
Expand Down Expand Up @@ -584,7 +585,7 @@ void DumpUnwindInfo(Compiler* comp,
getRegName(REG_F24 + x, true), getRegName(REG_F24 + x + 1, true), (z + 1) * 8);
}
#endif
else if ((b1 & 0xDC) == 0xDC)
else if ((b1 & 0xFE) == 0xDC)
{
// save_freg: 1101110x | xxxxzzzz | zzzzzzzz : save reg f(8 + #X) at [sp + #Z * 8], offset <= 2047
assert(i + 1 < countOfUnwindCodes);
Expand All @@ -593,7 +594,7 @@ void DumpUnwindInfo(Compiler* comp,
i += 2;

x = (DWORD)((b1 & 0x1) << 4) | (DWORD)(b2 >> 4);
z = ((DWORD)(2 & 0xF) << 8) | (DWORD)b3;
z = ((DWORD)(b2 & 0xF) << 8) | (DWORD)b3;

printf(" %02X %02X %02X save_freg X#%u Z#%u (0x%02X); fsd %s, [sp, #%u]\n", b1, b2, b3, x, z, z,
getRegName(REG_F8 + x), z * 8);
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20 changes: 10 additions & 10 deletions src/coreclr/pal/inc/unixasmmacrosriscv64.inc
Original file line number Diff line number Diff line change
Expand Up @@ -222,8 +222,12 @@ C_FUNC(\Name\()_End):
// GPR_a1
// GPR_a0
//
// General Registers:
// Callee Saved Registers:
// GPR_gp
// GPR_tp
// GPR_s11
// GPR_s10
// GPR_s9
// GPR_s8
// GPR_s7
// GPR_s6
Expand All @@ -232,7 +236,6 @@ C_FUNC(\Name\()_End):
// GPR_s3
// GPR_s2
// GPR_s1
// GPR_s0
// GPR_ra
// GPR_fp
//
Expand All @@ -256,11 +259,8 @@ C_FUNC(\Name\()_End):

__PWTB_FloatArgumentRegisters = \extraLocals

// Note, stack (see __PWTB_StackAlloc variable) must be 16 byte aligned,
// SIZEOF__FloatArgumentRegisters (0x40) is 16 byte aligned, that mean initial
// __PWTB_FloatArgumentRegisters value must be not 16 byte aligned and
// after add (120 + 64) provide 16 byte aligned result.
.if ((__PWTB_FloatArgumentRegisters % 16) == 0)
// Note, stack (see __PWTB_StackAlloc variable) must be 16 byte aligned.
.if ((__PWTB_FloatArgumentRegisters % 16) != 0)
__PWTB_FloatArgumentRegisters = __PWTB_FloatArgumentRegisters + 8
.endif

Expand All @@ -272,10 +272,10 @@ C_FUNC(\Name\()_End):


__PWTB_CalleeSavedRegisters = __PWTB_TransitionBlock
__PWTB_ArgumentRegisters = __PWTB_TransitionBlock + 120
__PWTB_ArgumentRegisters = __PWTB_TransitionBlock + 120 + 8

// Including fp, ra, s1-s11, tp, gp, and (a0-a7)arguments. (1+1+11+1+1)*8 + 8*8.
__PWTB_StackAlloc = __PWTB_TransitionBlock + 120 + 64
// Including fp, ra, s1-s11, tp, gp, padding and (a0-a7)arguments. (1+1+11+1+1)*8 + 8 + 8*8.
__PWTB_StackAlloc = __PWTB_TransitionBlock + 120 + 8 + 64
PROLOG_STACK_ALLOC __PWTB_StackAlloc
PROLOG_SAVE_REG_PAIR fp, ra, __PWTB_CalleeSavedRegisters, 1

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6 changes: 3 additions & 3 deletions src/coreclr/pal/src/arch/riscv64/context2.S
Original file line number Diff line number Diff line change
Expand Up @@ -139,7 +139,7 @@ LEAF_END RtlCaptureContext, _TEXT
//

LEAF_ENTRY CONTEXT_CaptureContext, _TEXT
PROLOG_STACK_ALLOC 24
PROLOG_STACK_ALLOC 32
sd t0, 0(sp)
sd t1, 8(sp)
sd t3, 16(sp)
Expand All @@ -149,7 +149,7 @@ LEAF_ENTRY CONTEXT_CaptureContext, _TEXT
and t3, t1, t0
bne t3, t0, LOCAL_LABEL(Done_CONTEXT_CONTROL)

addi t0, sp, 24
addi t0, sp, 32
sd fp, CONTEXT_Fp(a0)
sd t0, CONTEXT_Sp(a0)
sd ra, CONTEXT_Ra(a0)
Expand Down Expand Up @@ -243,6 +243,6 @@ LOCAL_LABEL(Done_CONTEXT_INTEGER):

LOCAL_LABEL(Done_CONTEXT_FLOATING_POINT):

EPILOG_STACK_FREE 24
EPILOG_STACK_FREE 32
ret
LEAF_END CONTEXT_CaptureContext, _TEXT
Original file line number Diff line number Diff line change
Expand Up @@ -715,8 +715,8 @@ private class RiscV64TransitionBlock : TransitionBlock
// fp=x8, ra=x1, s1-s11(R9,R18-R27), tp=x3, gp=x4
public override int NumCalleeSavedRegisters => 15;
// Callee-saves, argument registers
public override int SizeOfTransitionBlock => SizeOfCalleeSavedRegisters + SizeOfArgumentRegisters;
public override int OffsetOfFirstGCRefMapSlot => SizeOfCalleeSavedRegisters;
public override int SizeOfTransitionBlock => SizeOfCalleeSavedRegisters + PointerSize + SizeOfArgumentRegisters;
public override int OffsetOfFirstGCRefMapSlot => SizeOfCalleeSavedRegisters + PointerSize;
public override int OffsetOfArgumentRegisters => OffsetOfFirstGCRefMapSlot;

public override int OffsetOfFloatArgumentRegisters => 8 * sizeof(double);
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