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There is a configuration for 30 Ohm impedance on layer Int1 and Int5 instead of 50 Ohm.
The text was updated successfully, but these errors were encountered:
And change Min Width value to Preferred Width in Width_50R rule because now some 50R traces on inner layers are 0.12 mm instead of 0.17 mm.
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There is a configuration for 30 Ohm impedance on layer Int1 and Int5 instead of 50 Ohm.
The text was updated successfully, but these errors were encountered: