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I've observed various different hangs when attempting to use core 1 on both the RP2350A and RP2350B. Specifically I've noticed async SPI on core 1 will hang (the core 1 executor continues to run but the task awaiting the SPI future will never be woken up), and channels will hang on the sender side when sending from core 0 to core 1. Neither of these happen 100% of the time but enough that it makes it almost impossible to use the second core reliably.
I've written an minimal reproducible example that works on a bare Pico 2 from my testing. Given the nature of the bug, it's hard to tell if it could be related to the critical section implementation, the executor implementation, or something else entirely.
The text was updated successfully, but these errors were encountered:
seems to be something with cross-core wakes. In the repro above the wake from DMA seems to get lost. By default the DMA irq is handled in core0, which then wakes the task in core1.
Might be worth trying to disable timer.dbgpause on any relevant timers, it's possible that the debug core logic has changed between both parts, if you are using RTT (and scanning the ring buffer pointers) it might register the debug core as "active"?
I've observed various different hangs when attempting to use core 1 on both the RP2350A and RP2350B. Specifically I've noticed async SPI on core 1 will hang (the core 1 executor continues to run but the task awaiting the SPI future will never be woken up), and channels will hang on the sender side when sending from core 0 to core 1. Neither of these happen 100% of the time but enough that it makes it almost impossible to use the second core reliably.
I've written an minimal reproducible example that works on a bare Pico 2 from my testing. Given the nature of the bug, it's hard to tell if it could be related to the critical section implementation, the executor implementation, or something else entirely.
The text was updated successfully, but these errors were encountered: