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Add typeck query that fully checks a design #184

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fabianschuiki opened this issue Jun 7, 2020 · 0 comments
Open

Add typeck query that fully checks a design #184

fabianschuiki opened this issue Jun 7, 2020 · 0 comments
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A-typeck Area: Type checking, inference, and computation. C-enhancement Category: Adding or improving on features. L-vlog Language: Verilog and SystemVerilog.

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@fabianschuiki
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Add a typeck query similar to nameck, which uses a visitor to start from the AST root and traverse the entire design, type-checking nodes as it goes along. In contrast to name checking, this visitor also needs to track a current ParamEnv, and spawn new sub-visitors with the correct new environment for every instance.

This query will make the compiler report typing issues at a more determinstic location, making interaction easier for the user.

@fabianschuiki fabianschuiki added L-vlog Language: Verilog and SystemVerilog. C-enhancement Category: Adding or improving on features. A-typeck Area: Type checking, inference, and computation. labels Jun 7, 2020
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Labels
A-typeck Area: Type checking, inference, and computation. C-enhancement Category: Adding or improving on features. L-vlog Language: Verilog and SystemVerilog.
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