From 4d7ba2b3b5a06734881c25ca27ba7f5e38f6a459 Mon Sep 17 00:00:00 2001 From: Simon Doppler Date: Mon, 19 Aug 2019 21:33:13 +0200 Subject: [PATCH] remove portconnector in rtlib also clean up the `println` calls in the rom.rs code --- src/models/rtlib/arithmic/add.rs | 20 +++++++++--------- src/models/rtlib/arithmic/twoscomplement.rs | 9 +++----- src/models/rtlib/memory/rom.rs | 23 +++++++++++---------- src/port/pport.rs | 8 ++++--- 4 files changed, 30 insertions(+), 30 deletions(-) diff --git a/src/models/rtlib/arithmic/add.rs b/src/models/rtlib/arithmic/add.rs index b2da060..c15ed8e 100644 --- a/src/models/rtlib/arithmic/add.rs +++ b/src/models/rtlib/arithmic/add.rs @@ -1,7 +1,6 @@ use crate::direction::{Input, Output}; use crate::logicbit::mask_from_width; use crate::{Ieee1164, LogicVector, Port, Updateable}; -use crate::port::PortConnector; /// This models an actual adder that will add up both inputs. /// @@ -19,16 +18,17 @@ pub struct Add { impl Updateable for Add { fn update(&mut self) -> bool { - let old_value = PortConnector::from(self.s.clone()).value(); let a = self.a.value(); let b = self.b.value(); - self.s.with_value_mut(|v| match (a.as_u128(), b.as_u128()) { - (Some(a), Some(b)) => v - .replace_with_int(a.wrapping_add(b) & mask_from_width(v.width())) - .unwrap(), - _ => v.set_all_to(Ieee1164::_U), - }); - - old_value != PortConnector::from(self.s.clone()).value() + self.s.with_value_mut(|v| { + let old_value = v.clone(); + match (a.as_u128(), b.as_u128()) { + (Some(a), Some(b)) => v + .replace_with_int(a.wrapping_add(b) & mask_from_width(v.width())) + .unwrap(), + _ => v.set_all_to(Ieee1164::_U), + }; + old_value == *v + }) } } diff --git a/src/models/rtlib/arithmic/twoscomplement.rs b/src/models/rtlib/arithmic/twoscomplement.rs index 7ca51c4..d57f73c 100644 --- a/src/models/rtlib/arithmic/twoscomplement.rs +++ b/src/models/rtlib/arithmic/twoscomplement.rs @@ -1,8 +1,6 @@ use crate::direction::{Input, Output}; use crate::{LogicVector, Port, Updateable}; -use crate::port::PortConnector; - /// Computes the two's complement of the applied value. #[derive(Debug)] pub struct TwosComplement { @@ -14,9 +12,8 @@ pub struct TwosComplement { impl Updateable for TwosComplement { fn update(&mut self) -> bool { - let old_value = PortConnector::from(self.y.clone()).value(); - let a = self.a.value(); - self.y.with_value_mut(|y| *y = (!a).incr()); - old_value != PortConnector::from(self.y.clone()).value() + let new_value = (!self.a.value()).incr(); + let old_value = self.y.replace(new_value.clone()); + old_value != new_value } } diff --git a/src/models/rtlib/memory/rom.rs b/src/models/rtlib/memory/rom.rs index 532af2e..27ad697 100644 --- a/src/models/rtlib/memory/rom.rs +++ b/src/models/rtlib/memory/rom.rs @@ -3,7 +3,6 @@ use std::iter::FromIterator; use crate::direction::{Input, Output}; use crate::{Ieee1164, LogicVector, Port, Updateable}; -use crate::port::PortConnector; /// This struct represents a Read-only-memory with a size of 1kB (1024 bytes). /// @@ -85,8 +84,6 @@ impl fmt::Debug for Rom1kx8 { impl Updateable for Rom1kx8 { fn update(&mut self) -> bool { - println!("ROM Update"); - let old_value = PortConnector::from(self.data.clone()).value(); let ncs = self.n_chip_select.value(); let noe = self.n_output_enable.value(); let data = if let Some(addr) = self.addr.value().as_u128() { @@ -95,9 +92,8 @@ impl Updateable for Rom1kx8 { None }; - println!("{} {} {:?}", ncs, noe, data); - self.data.with_value_mut(|f| { + let old_value = f.clone(); if ncs.is_UXZ() || noe.is_UXZ() { f.set_all_to(Ieee1164::_X); } else if ncs.is_1H() || noe.is_1H() { @@ -106,10 +102,9 @@ impl Updateable for Rom1kx8 { f.replace_with_int(data).unwrap(); } else { f.set_all_to(Ieee1164::_X); - } - }); - - old_value != PortConnector::from(self.data.clone()).value() + }; + old_value == *f + }) } } @@ -149,7 +144,10 @@ mod tests { sig_data.connect(&data).unwrap(); for i in 0..1024 { - addr.with_value_mut(|f| f.replace_with_int(i).unwrap()); + addr.with_value_mut(|f| { + f.replace_with_int(i).unwrap(); + true + }); sig_addr.update(); rom.update(); sig_data.update(); @@ -184,7 +182,10 @@ mod tests { sig_data.connect(&data).unwrap(); for i in 0..1024 { - addr.with_value_mut(|f| f.replace_with_int(i).unwrap()); + addr.with_value_mut(|f| { + f.replace_with_int(i).unwrap(); + true + }); sig_addr.update(); rom.update(); sig_data.update(); diff --git a/src/port/pport.rs b/src/port/pport.rs index e80033f..040a3e6 100644 --- a/src/port/pport.rs +++ b/src/port/pport.rs @@ -174,7 +174,8 @@ where } /// Accepts a `FnOnce` which accepts a `&mut T`, so you can modify the inner values, instead of - /// replacing it. + /// replacing it. This function returns true if the inner value was changed. Since the inner value + /// may not be cloned, the closure has to return true if the value was changed. /// /// ```rust /// # use logical::Port; @@ -183,10 +184,11 @@ where /// port.with_value_mut(|value| { /// value.push('D'); /// assert_eq!("ABCD", value); + /// true /// }); /// ``` - pub fn with_value_mut(&mut self, f: F) { - f(&mut self.inner.value.write().unwrap()); + pub fn with_value_mut bool>(&mut self, f: F) -> bool { + f(&mut self.inner.value.write().unwrap()) } }