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ComponentUpdateLog.txt
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ComponentUpdateLog.txt
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Last Modified Date & Time: 05/16/2016 20:51:37
PSoC_4_CapSense: PSoC_4_CapSense.cydwr
cy_boot [v4.20] to [v5.30]
LIN_Dynamic [v3.20] to [v3.30]
Bootloader_PSoC4_Example01: Bootloader_PSoC4_Example01.cydwr
cy_boot [v4.20] to [v5.30]
LIN_Dynamic [v3.20] to [v3.30]
PSoC4_I2C_Slave: PSoC4_I2C_Slave.cydwr
cy_boot [v4.20] to [v5.30]
LIN_Dynamic [v3.20] to [v3.30]
I2C - PSoC-DSP: I2C - PSoC-DSP.cydwr
cy_boot [v5.20] to [v5.30]
LIN_Dynamic [v3.20] to [v3.30]
Last Modified Date & Time: 07/03/2016 13:38:33
PSoC_4_CapSense: TopDesign.cysch
UART_1 [v3.10] to [v3.20]
I2CM [v3.10] to [v3.20]
PSoC_4_CapSense: PSoC_4_CapSense.cydwr
cy_boot [v5.30] to [v5.40]
cy_lfclk [v1.0] to [v1.10]
LIN_Dynamic [v3.30] to [v3.40]
Bootloader_PSoC4_Example01: TopDesign.cysch
I2C_Slave [v3.10] to [v3.20]
Bootloader_PSoC4_Example01: Bootloader_PSoC4_Example01.cydwr
cy_boot [v5.30] to [v5.40]
cy_lfclk [v1.0] to [v1.10]
LIN_Dynamic [v3.30] to [v3.40]
PSoC4_I2C_Slave: TopDesign.cysch
I2CS [v3.10] to [v3.20]
UART_1 [v3.10] to [v3.20]
PSoC4_I2C_Slave: PSoC4_I2C_Slave.cydwr
cy_boot [v5.30] to [v5.40]
cy_lfclk [v1.0] to [v1.10]
LIN_Dynamic [v3.30] to [v3.40]
PSoC5_UART_Sender: PSoC5_UART_Sender.cydwr
cy_boot [v5.30] to [v5.40]
LIN_Dynamic [v3.30] to [v3.40]
PSoC5_SPI_Master_DSP: PSoC5_SPI_Master_DSP.cydwr
cy_boot [v5.30] to [v5.40]
LIN_Dynamic [v3.30] to [v3.40]
PSoC5_SPI_Master_CapSense: PSoC5_SPI_Master_CapSense.cydwr
cy_boot [v5.30] to [v5.40]
LIN_Dynamic [v3.30] to [v3.40]