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Vector instructions are currently unsupported but they are used, particularly in standard libraries.
One good place to start would be A32 encodings, prioritizing vpush, vpop, vldr, vstr, vmov.
vpush, vpop, vldr, vstr, vmov
The bigger challenge is dealing with 64-bit registers (d0 - d31) and their alternate views (32-bit regs s0 - s31 and 128-bit regs q0 - q15).
d0 - d31
s0 - s31
q0 - q15
The text was updated successfully, but these errors were encountered:
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Vector instructions are currently unsupported but they are used, particularly in standard libraries.
One good place to start would be A32 encodings, prioritizing
vpush, vpop, vldr, vstr, vmov
.The bigger challenge is dealing with 64-bit registers (
d0 - d31
) and their alternate views (32-bit regss0 - s31
and 128-bit regsq0 - q15
).The text was updated successfully, but these errors were encountered: