Can not initial the firmware(88W8864)

[zlopen]

I used the latest master branch of openwrt and mwlwifi repo with WRT1200 V1, I found the errors below in the kernel log

[ 11.274477] Loading modules backported from Linux version v5.8-0-gbcf876870b95
[ 11.281764] Backport generated by backports.git v5.8-1-0-g79400d9e
[ 11.282551] random: crng init done
[ 11.347950] <<Marvell Mac80211 Wireless PCIE Network Driver version 10.3.8.0-20181210>>
[ 11.356041] pci 0000:00:01.0: enabling device (0140 -> 0142)
[ 11.361834] ieee80211 phy0: priv->pcmd_buf = 80dba321 priv->pphys_cmd_buf = 1cd9a212
[ 11.376471] ieee80211 phy0: fw download start
[ 11.604155] ieee80211 phy0: FwSize = 118776 downloaded Size = 118776 curr_iteration 65497
[ 339.286015] ieee80211 phy0: Exhausted curr_iteration for fw signature
[ 339.292494] ieee80211 phy0: cannot download firmware image <mwlwifi/88W8864.bin>
[ 339.299954] ieee80211 phy0: firmware init fail
[ 339.304420] ieee80211 phy0: fail to initialize firmware
[ 339.309718] mwlwifi: probe of 0000:01:00.0 failed with error -5
[ 339.315740] pci 0000:00:02.0: enabling device (0140 -> 0142)
[ 339.321529] ieee80211 phy1: priv->pcmd_buf = 1b29fc75 priv->pphys_cmd_buf = 93a8ca0b
[ 339.326026] ieee80211 phy1: fw download start
[ 339.444579] ieee80211 phy1: FwSize = 118776 downloaded Size = 118776 curr_iteration 65510
[ 340.302019] ieee80211 phy1: fw download complete
[ 340.302033] ieee80211 phy1: device node: pcie@2,0
[ 340.307345] ieee80211 phy1: pcmd = 1b29fc75
[ 340.325039] ieee80211 phy1: firmware version: 0x702091a
[ 340.348337] ieee80211 phy1: firmware region code: 0
[ 340.384182] ieee80211 phy1: regdomain: FCC

the problem for me is to initial 5G wifi, currently only 2.4G network can be initial successfully
in the code, I saw the part like below, but I do not familiar with driver development, I am wondering do I need to change a bigger FW_MAX_NUM_CHECKS or another version of 88W8864.bin?

/* NOTE: the following back to back checks on C1C is time
* sensitive, hence may need to be tweaked dependent on host
* processor. Time for SC2 to go from the write of event 2 to
* C1C == 2 is ~1300 nSec. Hence the checkings on host has to
* consider how efficient your code can be to meet this timing,
* or you can alternatively tweak this routines to fit your
* platform
*/
do {
int_code = readl(pcie_priv->iobase1 + 0xc1c);
if ((int_code & MACREG_H2ARIC_BIT_DOOR_BELL) !=
MACREG_H2ARIC_BIT_DOOR_BELL)
break;
cond_resched();
curr_iteration--;
} while (curr_iteration);