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MPW5 : OpenRAM Use pre-generated 32-bit 1kB single-port RAM
OpenRAM from source Create OpenRAM instance from source with a FuseSoC generator
Improved debug interface Current debug IF uses a 32-bit WB port + a GPIO to set debug mode. This uses way too many pins. Exchange with something serial, perhaps a JTAG IF. (Maybe even add run-control to set PC)
CoreScore on Sky130 Mux GPIO output pins.
The text was updated successfully, but these errors were encountered:
Idea for a roadmap
The text was updated successfully, but these errors were encountered: