From 813b70d70eb23c53d70216ee5ca84796364c0c5f Mon Sep 17 00:00:00 2001 From: leonmavr <0xleo.git@gmail.com> Date: Fri, 16 Aug 2024 02:33:39 +0200 Subject: [PATCH] Fix the order of 0x8 range instructions --- src/chip8.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/chip8.cpp b/src/chip8.cpp index c6e1107..2cb1bad 100644 --- a/src/chip8.cpp +++ b/src/chip8.cpp @@ -282,12 +282,12 @@ void Chip8::Exec(const opcode_t& opc) { X("OR Vx Vy" , prefix == 0x8 && n == 0x1 , Vx |= Vy;) \ X("AND Vx Vy" , prefix == 0x8 && n == 0x2 , Vx &= Vy;) \ X("XOR Vx Vy" , prefix == 0x8 && n == 0x3 , Vx ^= Vy;) \ - X("ADD Vx Vy" , prefix == 0x8 && n == 0x4 , Vf = ((Vx & 0x80) >> 7) & ((Vy & 0x80) >> 7); Vx += Vy;) \ - X("SUB Vx Vy" , prefix == 0x8 && n == 0x5 , Vf = (Vx > Vy) ? 1 : 0; Vx -= Vy;) \ - X("SHR Vx Vy" , prefix == 0x8 && n == 0x6 , Vf = Vx & 1; Vx >>= 1;) \ - X("SUBN Vx Vy" , prefix == 0x8 && n == 0x7 , Vf = (Vy > Vx) ? 1 : 0; Vx = Vy - Vx;) \ - X("SHL Vx Vy" , prefix == 0x8 && n == 0xe , Vf = (Vx >> 7) & 0x1; Vx <<= 1;) \ - X("SNE Vx Vy" , prefix == 0x9 && n == 0 \ + X("ADD Vx Vy" , prefix == 0x8 && n == 0x4 , uint16_t sum = Vx + Vy; Vf = sum > 0x100; Vx = sum & 0xFF;) \ + X("SUB Vx Vy" , prefix == 0x8 && n == 0x5 , Vf = Vx >= Vy; Vx = (Vx - Vy) & 0xFF) \ + X("SHR Vx Vy" , prefix == 0x8 && n == 0x6 , Vf = Vx & 0x1; Vx >>= 1;) \ + X("SUBN Vx Vy" , prefix == 0x8 && n == 0x7 , Vf = Vy >= Vx; Vx = (Vy - Vx) & 0xFF;) \ + X("SHL Vx Vy" , prefix == 0x8 && n == 0xe , Vf = (Vx >> 7) & 0x1; Vx = (Vx << 1) & 0xFF;) \ + X("SNE Vx Vy" , prefix == 0x9 && n == 0x0 \ && Vx != Vy , PC += 2;) \ X("LD I nnn" , prefix == 0xa , I = nnn;) \ X("JP V0 nnn" , prefix == 0xb , PC = nnn + regs_[0] - 2;) \