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[CIR][NFC] move data member pointer lowering to CXXABI #1130

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Commits on Nov 21, 2024

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  2. [CIR][ABI] Fix use after free from erasing while iterating (llvm#854)

    The loop was erasing the user of a value while iterating on the value's
    users, which results in a use after free. We're already assuming (and
    asserting) that there's only one user, so we can just access it directly
    instead. CIR/Transforms/Target/x86_64/x86_64-call-conv-lowering-pass.cpp
    was failing with ASAN before this change. We're now ASAN-clean except
    for llvm#829 (which is also in
    progress).
    smeenai committed Nov 21, 2024
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  3. Recommit [CIR][Pipeline] Support -fclangir-analysis-only (llvm#832)

    Reland llvm#638
    
    This was reverted due to llvm#655. I
    tried to address the problem in the newest commit.
    
    The changes of the PR since the last landed one includes:
    - Move the definition of `cir::CIRGenConsumer` to
    `clang/include/clang/CIRFrontendAction/CIRGenConsumer.h`, and leave its
    `HandleTranslationUnit` interface is left empty. So that
    `cir::CIRGenConsumer` won't need to depend on CodeGen any more.
    - Change the old definition of `cir::CIRGenConsumer` in
    `clang/lib/CIR/FrontendAction/CIRGenAction.cpp` and to
    `CIRLoweringConsumer`, inherited from `cir::CIRGenConsumer`, which
    implements the original `HandleTranslationUnit` interface.
    
    I feel this may improve the readability more even without my original
    patch.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  4. [CIR][Lowering] Fix lowering for multi dimensional array (llvm#851)

    This PR fixes the lowering for multi dimensional arrays.
    
    Consider the following code snippet `test.c`: 
    ```
    void foo() {
      char arr[4][1] = {"a", "b", "c", "d"};
    }
    ```
    
    When ran with `bin/clang test.c -Xclang -fclangir -Xclang -emit-llvm -S
    -o -`, It produces the following error:
    ```
    ~/clangir/llvm/include/llvm/Support/Casting.h:566: decltype(auto) llvm::cast(const From&) [with To = mlir::ArrayAttr; From = mlir::Attribute]: Assertion `isa<To>(Val) && "cast<Ty>() argument of incompatible type!"' failed.
    ```
    
    The bug can be traced back to `LoweringHelpers.cpp`. It considers the
    values in the array as integer types, and this causes an error in this
    case.
    
    This PR updates `convertToDenseElementsAttrImpl` when the array contains
    string attributes. I have also added one more similar test. Note that in
    the tests I used a **literal match** to avoid matching as regex, so
    `!dbg` is useful.
    bruteforceboy authored and smeenai committed Nov 21, 2024
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  5. [CIR][CodeGen] Support global temporaries

    Support expressions at the top level such as
    
    const unsigned int n = 1234;
    const int &r = (const int&)n;
    
    Reviewers: bcardosolopes
    
    Pull Request: llvm#857
    lanza authored and smeenai committed Nov 21, 2024
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  6. [CIR][CodeGen][NFC] Move GetUndefRValue to the right file

    This is to match clang CodeGen
    lanza authored and smeenai committed Nov 21, 2024
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  7. [CIR][CIRGen] Exceptions: lexical scope issue with global initializers

    Fix llvm#829
    
    Thanks @smeenai for pointing out the root cause and UBSan failure!
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  8. [CIR][CIRGen][Builtin][Neon] Lower __builtin_neon_vrndns_f32 (llvm#858)

    As title.
    Also introduced buildAArch64NeonCall skeleton, which is partially the
    counterpart of OG's EmitNeonCall. And this could be use for many other
    neon intrinsics.
    
    ---------
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  11. [CIR][CIRGen] Implement Nullpointer arithmatic extension (llvm#861)

    See the test for example.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  12. [CIR][Codegen] supports aarch64_be (llvm#864)

    This PR adds aarch64 big endian support.
    
    Basically the support for aarch64_be itself is expressed only in two
    extra cases for the switch statement and changes in the `CIRDataLayout`
    are needed to prove that we really support big endian. Hence the idea
    for the test - I think the best way for proof is something connected
    with bit-fields, so we compare the results of the original codegen and
    ours.
    gitoleg authored and smeenai committed Nov 21, 2024
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  13. [CIR] Split cir-simplify into two passes (llvm#868)

    This PR splits the old `cir-simplify` pass into two new passes, namely
    `cir-canonicalize` and `cir-simplify` (the new `cir-simplify`). The
    `cir-canonicalize` pass runs transformations that do not affect
    CIR-to-source fidelity much, such as operation folding and redundant
    operation elimination. On the other hand, the new `cir-simplify` pass
    runs transformations that may significantly change the code and break
    high-level code analysis passes, such as more aggresive code
    optimizations.
    
    This PR also updates the CIR-to-CIR pipeline to fit these two new
    passes. The `cir-canonicalize` pass is moved to the very front of the
    pipeline, while the new `cir-simplify` pass is moved to the back of the
    pipeline (but still before lowering prepare of course). Additionally,
    the new `cir-simplify` now only runs when the user specifies a non-zero
    optimization level on the frontend.
    
    Also fixed some typos and resolved some `clang-tidy` complaints along
    the way.
    
    Resolves llvm#827 .
    Lancern authored and smeenai committed Nov 21, 2024
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  14. [CIR][CodeGen] Implement union cast (llvm#867)

    Currently the C style cast is not implemented/supported for unions.
    
    This PR adds support for union casts as done in `CGExprAgg.cpp`. I have
    also added an extra test in `union-init.c`.
    bruteforceboy authored and smeenai committed Nov 21, 2024
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  16. [CIR][CodeGen] Fix array initialization in CIRGenExprAgg (llvm#852)

    Mistakenly closed llvm#850
    
    llvm#850 (review)
     
    This PR fixes array initialization for expression arguments. 
    
    Consider the following code snippet `test.c`: 
    ```
    typedef struct {
      int a;
      int b[2];
    } A;
    
    int bar() {
      return 42;
    }
    
    void foo() {
      A a = {bar(), {}};
    }
    ```
    When ran with `bin/clang test.c -Xclang -fclangir -Xclang -emit-cir -S
    -o -`, It produces the following error:
    ```
    ~/clangir/clang/lib/CIR/CodeGen/CIRGenExprAgg.cpp:483: void {anonymous}::AggExprEmitter::buildArrayInit(cir::Address, mlir::cir::ArrayType, clang::QualType, clang::Expr*, llvm::ArrayRef<clang::Expr*>, clang::Expr*): Assertion `NumInitElements != 0' failed.
    ```
    The error can be traced back to `CIRGenExprAgg.cpp`, and the fix is
    simple. It is possible to have an empty array initialization as an
    expression argument!
    bruteforceboy authored and smeenai committed Nov 21, 2024
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  17. [CIR][CIRGen] Correct isSized predicate for vector type (llvm#869)

    As title, if element type of vector type is sized, then the vector type
    should be deemed sized.
    This would enable us generate code for neon without triggering assertion
    ghehg authored and smeenai committed Nov 21, 2024
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  18. [CIR][CIRGen][Builtin][Neon] Lower builtin_neon_vrnda_v and builtin_n…

    …eon_vrndaq_v (llvm#871)
    
    as title. 
    This also added NeonType support for Float32
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  20. [CIR][CIRGen][NFC] Cleanups: add skeleton for DominatingValue<RValue>…

    …::saved_type::save
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  22. [CIR][CIRGen][NFC] Cleanups: add more skeleton to pushFullExprCleanup

    It will hit another assert when calling initFullExprCleanup.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  23. [CIR][CodeGen][BugFix] don't place alloca before the label (llvm#875)

    This PR fixes the case, when a temporary var is used, and `alloca`
    operation is inserted in the block start before the `label` operation.
    Implementation: when we search for the `alloca` place in a block, we
    take label operations into account as well.
    
    Fix llvm#870
    
    ---------
    
    Co-authored-by: Bruno Cardoso Lopes <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  24. [CIR][CIRGen] Allow constant evaluation of int annotation (llvm#874)

    __attribute__((annotate()) was only accepting integer literals,
    preventing some meta-programming usage for example.
    This should be extended to some other kinds of types.
    
    ---------
    
    Co-authored-by: Bruno Cardoso Lopes <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  25. [CIR][CIRGen] Cleanups: handle conditional cleanups

    Just as the title says, but only covers non-exception path, that's
    coming next.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  26. [CIR][CIRGen][NFC] Cleanups: Prepare for conditional cleanup

    Nothing unblocked yet, just hit next assert in the same path.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  27. [CIR][CIRGen][NFC] Cleanups: more boilerplate work for conditional on…

    … exceptions
    
    Code path still hits an assert sooner, incremental NFC step.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  28. [CIR][CodeGen] Handling multiple stmt followed after a switch case (l…

    …lvm#878)
    
    Close llvm#876
    
    We've already considered the case that there are random stmt after a
    switch case:
    
    ```
    for (auto *c : compoundStmt->body()) {
          if (auto *switchCase = dyn_cast<SwitchCase>(c)) {
            res = buildSwitchCase(*switchCase, condType, caseAttrs);
          } else if (lastCaseBlock) {
            // This means it's a random stmt following up a case, just
            // emit it as part of previous known case.
            mlir::OpBuilder::InsertionGuard guardCase(builder);
            builder.setInsertionPointToEnd(lastCaseBlock);
            res = buildStmt(c, /*useCurrentScope=*/!isa<CompoundStmt>(c));
          } else {
            llvm_unreachable("statement doesn't belong to any case region, NYI");
          }
    
          lastCaseBlock = builder.getBlock();
    
          if (res.failed())
            break;
    }
    ```
    
    However, maybe this is an oversight, in the branch of ` if
    (lastCaseBlock)`, the insertion point will be updated automatically when
    the RAII object `guardCase` destroys, then we can assign the correct
    value for `lastCaseBlock` later. So we will see the weird code pattern
    in the issue side.
    
    BTW, I found the codes in CIRGenStmt.cpp are far more less similar with
    the ones other code gen places. Is this intentional? And what is the
    motivation and guide lines here?
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  29. [CIR][CIRGen] Generate CIR for empty compound literal (llvm#880)

    as title.
    ghehg authored and smeenai committed Nov 21, 2024
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  30. [CIR][CIRGen] Generate CIR for vset_lane and vsetq_lane intrinsics (l…

    …lvm#882)
    
    As title. 
    Notice that for those intrinsics, just like OG, we do not lower to llvm
    intrinsics, instead, do vector insert.
    The test case is partially from OG
    [aarch64-neon-vget.c](https://github.com/llvm/clangir/blob/85bc6407f559221afebe08a60ed2b50bf1edf7fa/clang/test/CodeGen/aarch64-neon-vget.c)
    But, I did not do all signed and unsigned int tests because unsigned and
    signed of the same width essentially just use the same intrinsic ID thus
    exactly same code path as far as this PR concerns.
    
    ---------
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  31. [CIR][CI] Remove libcxx tests

    Reviewers: bcardosolopes
    
    Reviewed By: bcardosolopes
    
    Pull Request: llvm#881
    lanza authored and smeenai committed Nov 21, 2024
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  32. [CIR][Dialect][CodeGen] Add a unit attribute for OpenCL kernels (llvm…

    …#877)
    
    We need a target-independent way to distinguish OpenCL kernels in
    ClangIR. This PR adds a unit attribute `OpenCLKernelAttr` similar to the
    one in Clang AST.
    
    This attribute is attached to the extra attribute dictionary of
    `cir.func` operations only. (Not for `cir.call`.)
    seven-mile authored and smeenai committed Nov 21, 2024
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  33. [CIR][CodeGen] Handle the case of 'case' after label statement after …

    …'case' (llvm#879)
    
    Motivation example:
    
    ```
    extern "C" void action1();
    extern "C" void action2();
    
    extern "C" void case_follow_label(int v) {
      switch (v) {
        case 1:
        label:
        case 2:
          action1();
          break;
        default:
          action2();
          goto label;
      }
    }
    ```
    
    When we compile it, we will meet:
    
    ```
      case Stmt::CaseStmtClass:
      case Stmt::DefaultStmtClass:
        assert(0 &&
               "Should not get here, currently handled directly from SwitchStmt");
        break;
    ```
    
    in `buildStmt`. The cause is clear. We call `buildStmt` when we build
    the label stmt.
    
    To solve this, I think we should be able to build case stmt in
    buildStmt. But the new problem is, we need to pass the information like
    caseAttr and condType. So I tried to add such informations in
    CIRGenFunction as data member.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  34. [CIR][CIRGen] Generate CIR for neon_vget and neon_vdup lane intrinsics (

    llvm#884)
    
    as title. 
    This PR has simliar test case organization as to
    [PR882](llvm#882)
    Notice that comparing to OG, this PR combines cases for some pairs of
    intrinsics such as
    BI__builtin_neon_vget_lane_f32 and BI__builtin_neon_vdups_lane_f32. 
    They have the same code generated in OG and CIRGen
    OG separate them into different case handling because it passes
    mnemonics which are different. CIRGen doesn't pass that so why not
    combine them.
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  35. [CIR][CIRGen] Allow maybeSetTrivialComdat for GlobalOp (llvm#885)

    as title, this would complete solution to fix issue [LLVM lowering
    missing comdat and constant
    attributes](llvm#801)
    ghehg authored and smeenai committed Nov 21, 2024
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  36. [CIR][CIRGen][Builtin][Neon] Lower neon vqadd_v (llvm#890)

    as title. 
    Also add function buildCommonNeonBuiltinExpr just like OG's
    emitCommonNeonBuiltinExpr. This might help consolidate neon cases and
    share common code.
    Notice:
    
    - I pretty much keep the skeleton of OG's emitCommonNeonBuiltinExpr at
    the cost of that we didn't use a few variables they calculate. They
    might help in the future.
    - The purpose of having CommonNeonBuiltinExpr is to reduce
    implementation code duplication. So far, we only have one type
    implemented, and it's hard for CIR to be more generic. But we should see
    if in future we can have different types of intrinsics share more
    generic code path.
    
    ---------
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  39. [CIR][CIRGen][Builtin] Allow CIRGen for builtin calls with math error…

    …no override (llvm#893)
    
    As title. 
    The test case used is abort(), but it is from the real code. 
    Notice: Since CIR implementation for NoReturn Call is pending to
    implement, the generated llvm code is like:
    `define dso_local void @test() llvm#1  {
      call void @abort(), !dbg !8
      ret void
    }`
    which is not right, right code should be like, 
    `
    `define dso_local void @test() llvm#1  {
      call void @abort(), !dbg !8
      unreachable
    }`
    `
    Still send this PR as Noreturn implementation is a separate issue.
    ghehg authored and smeenai committed Nov 21, 2024
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  41. [CIR][NFC] Rename test

    bcardosolopes authored and smeenai committed Nov 21, 2024
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  42. [CIR][ABI] Apply CC lowering pass by default (llvm#842)

    Before this patch, the CC lowering pass was applied only when explicitly
    requested by the user. This update changes the default behavior to
    always apply the CC lowering pass, with an option to disable it using
    the `-fno-clangir-call-conv-lowering` flag if necessary.
    
    The primary objective is to make this pass a mandatory step in the
    compilation pipeline. This ensures that future contributions correctly
    implement the CC lowering for both existing and new targets, resulting
    in more consistent and accurate code generation.
    
    From an implementation perspective, several `llvm_unreachable`
    statements have been substituted with a new `assert_or_abort` macro.
    This macro can be configured to either trigger a non-blocking assertion
    or a blocking unreachable statement. This facilitates a test-by-testa
    incremental development as it does not required you to know which code
    path a test will trigger an just cause a crash if it does.
    
    A few notable changes:
    
     - Support multi-block function in CC lowering
     - Ignore pointer-related CC lowering
     - Ignore no-proto functions CC lowering
     - Handle missing type evaluation kinds
     - Fix CC lowering for function declarations
     - Unblock indirect function calls
     - Disable CC lowering pass on several tests
    sitio-couto authored and smeenai committed Nov 21, 2024
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  43. [CIR][CIRGen][Builtin][Neon] Lower vqrshrun_n and add getAArch64SIMDI…

    …ntrinsicString (llvm#899)
    
    as title.
    In addition, this PR has 2 extra changes.
    
    1. change return type of GetNeonType into mlir::cir::VectorType so we
    don't have to do cast all the time, this is consistent with
    [OG](https://github.com/llvm/clangir/blob/db6b7c07c076cb738d0acae248d7c3c199b2b952/clang/lib/CodeGen/CGBuiltin.cpp#L6234)
    as well.
    2. add getAArch64SIMDIntrinsicString helper function so we have better
    debug info when hitting NYI in buildCommonNeonBuiltinExpr
    
    ---------
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  44. [CIR][NFC] Silence unused warning

    bcardosolopes authored and smeenai committed Nov 21, 2024
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  45. Revert "[CIR][ABI] Apply CC lowering pass by default (llvm#842)"

    Fix llvm#895 and it's also missing some more
    throughout behavior for the pass, it also needs to be enabled by default when
    emitting object files.
    
    This reverts commit db6b7c0.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  46. [CIR][CIRGen] Add time trace to several CIRGen pieces (llvm#898)

    Then we can observe the time consumed in different part of CIR. This
    patch is not complete. But I think it is fine given we can always add
    them easily.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  47. [CIR][Dialect] Support OpenCL work group uniformity attribute (llvm#896)

    > To keep information about whether an OpenCL kernel has uniform work
    > group size or not, clang generates 'uniform-work-group-size' function
    > attribute for every kernel:
    > 
    > "uniform-work-group-size"="true" for OpenCL 1.2 and lower,
    > "uniform-work-group-size"="true" for OpenCL 2.0 and higher if
    '-cl-uniform-work-group-size' option was specified,
    > "uniform-work-group-size"="false" for OpenCL 2.0 and higher if no
    '-cl-uniform-work-group-size' options was specified.
    > If the function is not an OpenCL kernel, 'uniform-work-group-size'
    > attribute isn't generated.
    > 
    > *From [Differential 43570](https://reviews.llvm.org/D43570)*
    
    This PR introduces the `OpenCLKernelUniformWorkGroupSizeAttr` attribute
    to the ClangIR pipeline, towards the completeness in attributes for
    OpenCL. While this attribute is represented as a unit attribute in MLIR,
    its absence signifies either non-kernel functions or a `false` value for
    kernel functions. To match the original LLVM IR behavior, we also
    consider whether a function is an OpenCL kernel during lowering:
    
    * If the function is not a kernel, the attribute is ignored. No LLVM
    function attribute is set.
    * If the function is a kernel:
    * and the `OpenCLKernelUniformWorkGroupSizeAttr` is present, we generate
    the LLVM function attribute `"uniform-work-group-size"="true"`.
        * If absent, we generate `"uniform-work-group-size"="false"`.
    seven-mile authored and smeenai committed Nov 21, 2024
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  48. [CIR][CodeGen][NFC] Rename the confusing buildGlobal overload (llvm…

    …#897)
    
    `CIRGenModule::buildGlobal` --[rename]-->
    `CIRGenModule::getOrCreateCIRGlobal`
    
    We already have `CIRGenModule::buildGlobal` that corresponds to
    `CodeGenModule::EmitGlobal`. But there is an overload of `buildGlobal`
    used by `getAddrOfGlobalVar`. Since this name is confusing, this PR
    rename it to `getOrCreateCIRGlobal`.
    
    Note that `getOrCreateCIRGlobal` already exists. It is intentional to
    make the renamed function an overload to it. The reason here is that the
    renamed function is basically a wrapper of the original
    `getOrCreateCIRGlobal` with more specific parameters:
    
    `getOrCreateCIRGlobal(decl, type, isDef)` --[call]-->
    `getOrCreateCIRGlobal(getMangledName(decl), type,
    decl->getType()->getAS(), decl, isDef)`
    seven-mile authored and smeenai committed Nov 21, 2024
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  49. [CIR][CIRGen][Builtin][Neon] Lower neon vld1_lane and vld1q_lane (llv…

    …m#901)
    
    just as title.
    
    ---------
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  50. [CIR][CodeGen][NFC] Break the missing feature flag for OpenCL into sm…

    …aller pieces (llvm#902)
    
    The missing feature flag for OpenCL has very few occurrences now. This
    PR rearranges them into proper pieces to better track them.
    seven-mile authored and smeenai committed Nov 21, 2024
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  51. [CIR][CodeGen] Add nothrow for functions in OpenCL languages (llvm#903

    )
    
    Heterogeneous languages do not support exceptions, which corresponds to
    `nothrow` in ClangIR and `nounwind` in LLVM IR.
    
    This PR adds nothrow attributes for all functions for OpenCL languages
    in CIRGen. The Lowering for it is already supported previously.
    seven-mile authored and smeenai committed Nov 21, 2024
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  52. [CIR][CodeGen] Set constant properly for global variables (llvm#904)

    Fix llvm#801 (the remaining `constant` part). Actually the missing stage is
    CIRGen.
    
    There are two places where `GV.setConstant` is called:
    
    * `buildGlobalVarDefinition`
    * `getOrCreateCIRGlobal`
    
    Therefore, the primary test `global-constant.c` contains a global
    definition and a global declaration with use, which should be enough to
    cover the two paths.
    
    A test for OpenCL `constant` qualified global is also added. Some
    existing testcases need tweaking to avoid failure of missing constant.
    seven-mile authored and smeenai committed Nov 21, 2024
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  53. [CIR][Test][NFC] Organize CIR CodeGen AArch64 neon tests (llvm#910)

    as title.
    
    ---------
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  54. [CIR][Lowering] Fix Global Attr Lowering (llvm#906)

    Consider the following code snippet `tmp.c`: 
    ```
    #define N 3200
    
    struct S {
      double a[N];
      double b[N];
    } s;
    
    double *b = s.b;
    
    void foo() {
      double x = 0;
      for (int i = 0; i < N; i++)
        x += b[i];
    }
    
    int main() {
      foo();
      return 0;
    }
    ```
    Running `bin/clang tmp.c -fclangir -o tmp && ./tmp` causes a
    segmentation fault.
    
    I compared the LLVM IR with and without CIR and noticed a difference
    which causes this:
    `@b = global ptr getelementptr inbounds (%struct.S, ptr @s, i32 0, i32
    1)` // no CIR
    `@b = global ptr getelementptr inbounds (%struct.S, ptr @s, i32 1)` //
    with CIR
    
    It seems there is a missing index when creating global pointers from
    structs. I have updated `Lowering/DirectToLLVM/LowerToLLVM.cpp`, and
    added a few tests.
    bruteforceboy authored and smeenai committed Nov 21, 2024
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  55. [CIR][CIRGen][Builtin] Implement builtin __sync_fetch_and_sub (llvm#932)

    as title.
    Notice this is not target specific nor neon intrinsics.
    ghehg authored and smeenai committed Nov 21, 2024
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  56. [CIR][CIRGen] Cleanup: enable conditional cleanup with exceptions

    Entails several minor changes:
    - Duplicate resume blocks around.
    - Disable LP caching, we repeat them as often as necessary.
    - Update maps accordingly for tracking places to patch up.
    - Make changes to clean up block handling.
    - Fix an issue in flatten cfg.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  57. [CIR][CIRGen][Builtin][Neon] Lower BI__builtin_neon_vmovn_v (llvm#909)

    as title. 
    The current implementation of this PR is use cir::CastOP integral
    casting to implement vector type truncation. Thus, LLVM lowering code
    has been change to accommodate it.
    In addition.
    Added code into
    [CIRGenBuiltinAArch64.cpp](https://github.com/llvm/clangir/pull/909/files#diff-6f7700013aa60ed524eb6ddcbab90c4dd288c384f9434547b038357868334932)
    to make it more similar to OG.
    ```
     mlir::Type ty = vTy;
      if (!ty)
    ```
    Added test case into neon.c as the file already contains similar vector
    move test cases such as vmovl
    
    ---------
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  58. [CIR][CIRGen][Builtin][Neon] Lower neon vst1q_lane and vst1_lane (llv…

    …m#935)
    
    as title. 
    Also changed
    [neon-ldst.c](https://github.com/llvm/clangir/compare/main...ghehg:clangir-llvm-ghehg:macM3?expand=1#diff-ea4814b6503bff2b7bc4afc6400565e6e89e5785bfcda587dc8401d8de5d3a22)
    to make it have the same RUN options as OG
    [clang/test/CodeGen/aarch64-neon-intrinsics.c](https://github.com/llvm/clangir/blob/main/clang/test/CodeGen/aarch64-neon-intrinsics.c)
    Those options help us to avoid checking load/store pairs thus make the
    test less verbose and easier to compare against OG.
    
    Co-authored-by: Guojin He <[email protected]>
    2 people authored and smeenai committed Nov 21, 2024
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  59. [CIR] Derived-to-base conversions (llvm#937)

    Implement derived-to-base address conversions for non-virtual base
    classes. The code gen for this situation was only implemented when the
    offset was zero, and it simply created a `cir.base_class_addr` op for
    which no lowering or other transformation existed.
    
    Conversion to a virtual base class is not yet implemented.
    
    Two new fields are added to the `cir.base_class_addr` operation: the
    byte offset of the necessary adjustment, and a boolean flag indicating
    whether the source operand may be null. The offset is easy to compute in
    the front end while the entire path of intermediate classes is still
    available. It would be difficult for the back end to recompute the
    offset. So it is best to store it in the operation. The null-pointer
    check is best done late in the lowering process. But whether or not the
    null-pointer check is needed is only known by the front end; the back
    end can't figure that out. So that flag needs to be stored in the
    operation.
    
    `CIRGenFunction::getAddressOfBaseClass` was largely rewritten. The code
    path no longer matches the equivalent function in the LLVM IR code gen,
    because the generated ClangIR is quite different from the generated LLVM
    IR.
    
    `cir.base_class_addr` is lowered to LLVM IR as a `getelementptr`
    operation. If a null-pointer check is needed, then that is wrapped in a
    `select` operation.
    
    When generating code for a constructor or destructor, an incorrect
    `cir.ptr_stride` op was used to convert the pointer to a base class. The
    code was assuming that the operand of `cir.ptr_stride` was measured in
    bytes; the operand is the number elements, not the number of bytes. So
    the base class constructor was being called on the wrong chunk of
    memory. Fix this by using a `cir.base_class_addr` op instead of
    `cir.ptr_stride` in this scenario.
    
    The use of `cir.ptr_stride` in `ApplyNonVirtualAndVirtualOffset` had the
    same problem. Continue using `cir.ptr_stride` here, but temporarily
    convert the pointer to type `char*` so the pointer is adjusted
    correctly.
    
    Adjust the expected results of three existing tests in response to these
    changes.
    
    Add two new tests, one code gen and one lowering, to cover the case
    where a base class is at a non-zero offset.
    dkolsen-pgi authored and smeenai committed Nov 21, 2024
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  61. [CIR][CIRGen] Exceptions: fix agg store for temporaries

    Fix llvm#934
    
    While here move scope op codegen outside the builder, so it's easier
    to dump blocks and operations while debugging.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  65. [Lowering][DirectToLLVM] Fix calling variadic functions (llvm#945)

    After 5da4310, the LLVM dialect
    requires the variadic callee type to be present for variadic calls. The
    op builders take care of this automatically if you pass the function
    type, so change our lowering logic to do so. Add tests for this as well
    as a missing test for indirect function call lowering.
    
    Fixes llvm#913
    Fixes llvm#933
    smeenai committed Nov 21, 2024
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  66. [CIR] [CodeGen] Remove NYI in buildPointerWithAlignment (llvm#949)

    See the test for the reproducer. It would crash due the NYI.
    
    See
    https://github.com/llvm/llvm-project/blob/327124ece7d59de56ca0f9faa2cd82af68c011b9/clang/lib/CodeGen/CGExpr.cpp#L1295-L1373,
    I found we've implemented all the cases in CGExpr.cpp. IIUC, I think we
    can remove the NYI.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  67. [CIR][Lowering] Introduce HoistAllocasPass (llvm#887)

    Close llvm#883. See the above issue
    for details
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  68. [CIR][CodeGen] Enable -fno-PIE (llvm#940)

    The title describes the purpose of the PR. 
    
    The logic was gotten from the original CodeGen, and I added a test to
    check that `-fno-PIE` is indeed enabled.
    bruteforceboy authored and smeenai committed Nov 21, 2024
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  69. [CIR][CIRGen] Add support for __fp16 type (llvm#950)

    This PR adds support for the `__fp16` type. CIRGen and LLVM lowering is
    included.
    
    Resolve llvm#900 .
    Lancern authored and smeenai committed Nov 21, 2024
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  70. [CIR][CIRGen][Builtin] Support unsigned type for _sync_(bool/val)_com…

    …pare_and_swap (llvm#955)
    
    as title. 
    Actually just follow the way in `makeBinaryAtomicValue` in the same file
    which did the right thing by creating SInt or UInt based on first
    argument's signess.
    ghehg authored and smeenai committed Nov 21, 2024
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  71. [CIR][CIRGen][NFC] Improve buildAutoVarAlloca skeleton and add hooks …

    …for buildVarAnnotations
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  72. [CIR][CIRGen] Support annotations on local var decl

    LLVM lowering support coming next.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  74. [CIR][NFC] Fix post-rebase warning

    bcardosolopes authored and smeenai committed Nov 21, 2024
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  76. Reapply and patch "[CIR][ABI] Apply CC lowering pass by default (llvm…

    …#842)" (llvm#944)
    
    This reverts commit 8f699fd and fixes some issues, namely:
     
    - CC lowering pass will no longer fail if the function has no AST
    information that won't be used.
    - Fixed CC lowering not disabling when running certain `cc1` compilation
    commands.
    - CC lowering can now be disabled when calling `cir-opt` and
    `cir-translate`.
    - Compilation commands that generate Object files should now invoke CC
    lowering by default.
    sitio-couto authored and smeenai committed Nov 21, 2024
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  77. [CIR][CodeGen] kr-style for function arguments (llvm#938)

    I tried to run llvm-test-suite and turned out that there are many tests
    fail with segfault due to old C style (let's remember Kernighan and
    Ritchie) . This PR fix it by the usual copy-pasta from the original
    codegen :)
    
    So let's take a look at the code:
    ```
    void foo(x) short x; {}
    int main() {
      foo(4); 
      return 0;
    }
    ```
    and CIR for `foo` function is:
    ```
    cir.func  @foo(%arg0: !s32i) {
        %0 = cir.alloca !s16i, !cir.ptr<!s16i>, ["x", init] 
        %1 = cir.cast(bitcast, %0 : !cir.ptr<!s16i>), !cir.ptr<!s32i>
        cir.store %arg0, %1 : !s32i, !cir.ptr<!s32i>
        cir.return
    }
    ```
    We bitcast the **address** (!!!) and store a value of a bigger size
    there.
    
    And now everything looks fine:
    ```
    cir.func no_proto  @foo(%arg0: !s32i) {
        %0 = cir.alloca !s16i, !cir.ptr<!s16i>, ["x", init] 
        %1 = cir.cast(integral, %arg0 : !s32i), !s16i
        cir.store %1, %0 : !s16i, !cir.ptr<!s16i> 
        cir.return 
    } 
    ```
    We truncate an argument and store it. 
    
    P.S.
    The `bitcast` that was there before looks a little bit suspicious and
    dangerous. Are we sure we can do this unconditional cast while we create
    `StoreOp` ?
    gitoleg authored and smeenai committed Nov 21, 2024
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  78. [CIR][CIRGen] Add const attribute to alloca operations (llvm#892)

    This PR tries to give a simple initial implementation for eliminating
    redundant loads of constant objects, an idea originally posted by
    OfekShilon.
    
    Specifically, this PR adds a new unit attribute `const` to the
    `cir.alloca` operation. Presence of this attribute indicates that the
    alloca-ed object is declared `const` in the input source program. CIRGen
    is updated accordingly to start emitting this new attribute.
    Lancern authored and smeenai committed Nov 21, 2024
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  79. [CIR][Lowering] VecCreateOp and VecSplatOp lowering choose LLVM:Poiso…

    …nOp (llvm#959)
    
    They should use PoisonOp (which becomes PoisonValue in LLVMIR) as it is
    the OG's choice.
    Proof:
    We generate VecCreateOp [here
    ](https://github.com/llvm/clangir/blob/2ca12fe5ec3a1e7279256f069010be2d68200585/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp#L1975)
    And it's OG counterpart is
    [here](https://github.com/llvm/clangir/blob/2ca12fe5ec3a1e7279256f069010be2d68200585/clang/lib/CodeGen/CGExprScalar.cpp#L2096)
    OG uses PoisonValue. 
    As to VecSplatOp, OG unconditionally [chooses PoisonValue
    ](https://github.com/llvm/clangir/blob/2ca12fe5ec3a1e7279256f069010be2d68200585/llvm/lib/IR/IRBuilder.cpp#L1204)
    
    A even more solid proof for this case is that 
    when we use OG to generate code for our test case I changed in this PR ,
    its always using poison instead of undef as far as VecSplat and
    VecCreate is concerned. The [OG generated code for vectype-ext.cpp
    ](https://godbolt.org/z/eqx1rns86) here.
    The [OG generated code for vectype.cpp
    ](https://godbolt.org/z/frMjbKGeT) here.
    
    For reference, generated CIR for the test case vectype-ext.cpp is
    [here](https://godbolt.org/z/frMjbKGeT)
    
    This is to unblock llvm#936 to help it
    set on the right path.
    
    Note: There might be other CIR vec ops that need to choose Poison to be
    consistent with OG, but I'd limit the scope of this PR, and wait to see
    issue pop up in the future.
    ghehg authored and smeenai committed Nov 21, 2024
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  80. [CIR][NFC][Testing] Fix test failure (llvm#963)

    as title.
    Base on my experience of [this type of test(https://github.com/llvm/clangir/blob/a7ac2b4e2055e169d9f556abf5821a1ccab666cd/clang/test/CIR/CodeGen/attribute-annotate-multiple.cpp#L51),
    The number of characters varies in this line as it's about full file
    path which changes during environment.
    ghehg authored and smeenai committed Nov 21, 2024
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  81. [CIR][CodeGen] Support static references to temporaries

    Pull Request: llvm#872
    lanza authored and smeenai committed Nov 21, 2024
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  82. [CIR][CIRGen] Support CodeGen for vbase constructors

    1. Add new `cir.vtt.address_point` op for visiting the element of VTT to
    initialize the virtual pointer.
    2. Implement `getVirtualBaseClassOffset` method which provides a virtual offset
    to adjust to actual virtual pointers in virtual base.
    3. Follows the original clang CodeGen scheme for the implementation of most
    other parts.
    
    @bcardosolopes's note: this is cherry-picked from an older PR from Jing Zhang and
    slightly modified for updates: applied review, test, doc and operation syntax.
    It does not yet has LLVM lowering support, I'm going to make incremental
    changes on top of this.  Any necessary CIR modifications to this design should
    follow up shortly too. Also, to make this work I also added more logic to
    `addImplicitStructorParam`s` and `buildThisParam`.
    Laity000 authored and smeenai committed Nov 21, 2024
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  83. [CIR][CIRGen][Builtin][Neon] Lower neon_vtrn and neon_vtrnq (llvm#942)

    as title. 
    The generated code is the same as Clang codeden except in a small
    discrepancy when GEP:
    OG generates code like this: 
    `%6 = getelementptr inbounds <4 x i16>, ptr %retval.i, i32 1`
    CIR generates a bit differently:
    `%6 = getelementptr <4 x i16>, ptr %retval.i, i64 1`
    Ptr offest might be trivial because choosing i64 over i32 as index type
    seems to be LLVM Dialect's choice.
    
    The lack of `inbounds` keyword might be an issue as
    `mlir::cir::PtrStrideOp` is currently not lowering to LLVM:GEPOp with
    `inbounds` attribute as `mlir::cir::PtrStrideOp` itself has no
    `inbounds`. It's probably because there was no need for it though we do
    have an implementation of [`CIRGenFunction::buildCheckedInBoundsGEP`
    ](https://github.com/llvm/clangir/blob/10d6f4b94da7e0181a070f0265d079419d96cf78/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp#L2762).
    
    Anyway, the issue is not in the scope of this PR and should be addressed
    in a separate PR. If we think this is an issue, I can create another PR
    and probably add optional attribute to `mlir::cir::PtrStrideOp` to
    achieve it.
    
    In addition to lowering work, a couple of more works:
    
    1. Did a little refactoring on variable name changing into desired
    CamelBack case.
    2. Changed neon-misc RUN Options to be consistent with other neon test
    files and make test case more concise.
    ghehg authored and smeenai committed Nov 21, 2024
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  84. [CIR][CIRGen][Builtin][Neon] Lower neon_vext_v and neon_vextq_v (llvm…

    …#951)
    
    as title. 
    There are two highlights of the PR
    
    1. The PR introduced a new test file to cover neon intrinsics that move
    data, which is a big category. This would the 5th neon test file. And
    we're committed to keep total number of neon test files within 6. This
    file uses another opt option instcombine, which makes test LLVM code
    more concise, and our -fclangir generated LLVM code would be identical
    to OG with this. It looks like OG did some instcombine optimization.
    
    2. `getIntFromMLIRValue` helper function could be substituted by
    [`mlir::cir::IntAttr getConstOpIntAttr` in
    CIRGenAtomic.cpp](https://github.com/llvm/clangir/blob/24b24557c98d1c031572a567b658cfb6254f8a89/clang/lib/CIR/CodeGen/CIRGenAtomic.cpp#L337).
    The function `mlir::cir::IntAttr getConstOpIntAttr` is doing more than
    `getIntFromMLIRValue`, and there is FIXME in the comment, so not sure if
    we should just use `mlir::cir::IntAttr getConstOpIntAttr`, either is
    fine with me.
    ghehg authored and smeenai committed Nov 21, 2024
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  85. [CIR][Lowering] Handling Lowering of multiple dimension array correct…

    …ly (llvm#961)
    
    Close llvm#957
    
    the previous algorithm to convert a multiple dimension array to a tensor
    is: fill the value one by one and fill the zero values in conditions.
    And it has some problems handling the multiple dimension array as above
    issue shows so that the generated values are not in the same shape with
    the original array.
    
    the new algorithm here is, full fill the values ahead of time with the
    correct element size and full fill the values to different slots and we
    only need to maintain the index to write.
    
    I feel the new version has better performance (avoid allocation) and
    better readability slightly.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  87. [CIR][CIRGen][Builtin][Neon] Lower neon_vpadd_v and neon_vpaddq_v int…

    …o llvm intrinsic (llvm#960)
    
    This PR refactored Neon Built in code in clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp a bit to make it cleaner.
    
    Also changed RUNOption of test file clang/test/CIR/CodeGen/AArch64/neon-arith.c to make test more concise, and easy to compare against OG (to compare, just remove -fclangir from llvm gen part of RUN, and the test should still pass)
    ghehg authored and smeenai committed Nov 21, 2024
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  88. [CIR] [Lowering] Fix handling of multiple array for ZeroAttr (llvm#970)

    This is the following up fix for the previous fix
    llvm#961
    
    See the attached new test for the reproducer.
    
    Sorry for the initial overlook.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  89. [CIR][Driver] Fix -fclangir-call-conv-lowering behavior

    - The flag is the default even for cc1, so make it disable two level deep.
    - While here, remove the unnecessary flag disable for pure `-emit-cir`.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  91. [CIR] Make the asserts to display suggestion for -fno-clangir-call-co…

    …nv-lowering
    
    While here, add more unrecheables to cover some of the current errors, so that
    our users can see a clear message instead of a random cast assert of sorts.
    This covers at least all crashes seen when removing
    -fno-clangir-call-conv-lowering from all tests, there are probably other things
    we'll find as we exercise this path.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  92. [CIR][NFC] Massively rename workarounds for callconv lowering

    These are not meant to be used by any other component, make sure it's very
    specific.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  93. [CIR][CIRGen] Implement CIRGenModule::shouldEmitFunction (llvm#984)

    This is the usual copy-paste-modify from CodeGen, though I changed all
    the variable names to conform to our new style. All these functions
    should be pulled out as common helpers when we're upstream.
    smeenai committed Nov 21, 2024
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  94. [CIR][CIRGen] Port 1d0bd8e (llvm#983)

    llvm/llvm-project@1d0bd8e
    moves a conditional from CodeGen to AST, and this follows suit for
    consistency. (Our support for the Microsoft ABI is NYI anyway; this is
    just to make things simpler to follow when matching up logic between
    CodeGen and CIRGen.)
    smeenai committed Nov 21, 2024
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  98. [CIR][CIRGen][NFC] Consolidate RUN lines for builtin tests (llvm#968)

    There is no change to testing functionality. This refacot let those
    files have the same Run options that is easier to maintain and extend.
    ghehg authored and smeenai committed Nov 21, 2024
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  99. [CIR] [Lowering] care trailing zero for lowering constant array (llvm…

    …#976)
    
    Close llvm#975
    
    See the attached test case for example
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  100. [CIR] Add support for __int128 type (llvm#980)

    This PR adds initial support for the `__int128` type. The `!cir.int`
    type is extended to support 128-bit integer types.
    
    This PR comes with a simple test that verifies the CIRGen and LLVM
    lowering of `!s128i` and `!u128i` work.
    
    Resolve llvm#953 .
    Lancern authored and smeenai committed Nov 21, 2024
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  102. [CIR][CIRGen][Builtin][Neon] Lower vqdmulhq_lane, vqdmulh_lane, vqrdm…

    …ulhq_lane and vqrdmulh_lane (llvm#985)
    ghehg authored and smeenai committed Nov 21, 2024
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  103. [CIR][CIRGen][Builtin][Type] Support for IEEE Quad (long double) adde…

    …d (in CIR + Direct to LLVM) (llvm#966)
    
    Fixes llvm#931
    Added type definition in CIRTypes.td, created appropriate functions for
    the same in CIRTypes.cpp like getPreferredAlignment,
    getPreferredAlignment, etc. Optionally added lowering in LowerToLLVM.cpp
    mvvsmk authored and smeenai committed Nov 21, 2024
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  105. [CIR] Disable -fclangir-call-conv-lowering from default in the LLVM…

    … pipeline
    
    This is causing lots of churn. `-fclangir-call-conv-lowering` is not mature
    enough, assumptions are leading to crashes we cannot track with special
    messages, leading to not great user experience. Turn this off until we have
    someone dedicated to roll this out.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  109. [CIR][CIRGen][NFC] Add more skeleton for handling inheritance ctors

    While here add some bits for ptr auth and match OG.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  110. [CIR][CIRGen] Ensure default visibility for local linkage functions (l…

    …lvm#990)
    
    LLVM's verifier enforces this, which was previously causing us to fail
    verification. This is a bit of a band-aid; the overall linkage and
    visibility setting flow needs some work to match the original.
    smeenai committed Nov 21, 2024
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  111. [CIR][CIRGen][Builtin][Neon] Lower neon_vshl_n_v and neon_vshlq_n_v (l…

    …lvm#965)
    
    As title, but important step in this PR is to allow CIR ShiftOp to take
    vector of int type as input type. As result, I added a verifier to
    ShiftOp with 2 constraints
    
    1. Input type either all vector or int type. This is consistent with
    LLVM::ShlOp, vector shift amount is expected.
    2. In the spirit of C99 6.5.7.3, shift amount type must be the same as
    result type, the if vector type is used. (This is enforced in LLVM
    lowering for scalar int type).
    ghehg authored and smeenai committed Nov 21, 2024
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  112. [CIR][CIRGen] Use Clang Codegen's skeleton in CIRGenFunction::buildBu…

    …iltinExpr (llvm#967)
    
    This PR helps us to triage unimplemented builtins (that are target
    independent).
    There are unhandled builtins in CIR Codegen
    `[CIRGenFunction::buildBuiltinExpr](https://github.com/llvm/clangir/blob/4c446b3287895879da598e23164d338d04bced3e/clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp#L305)`.
    And those builtins have implementation in
    [OG](https://github.com/llvm/clangir/blob/4c446b3287895879da598e23164d338d04bced3e/clang/lib/CodeGen/CGBuiltin.cpp#L2573).
    Currently, those builtins just are treated as LibraryCall or some other
    ways which eventually get failure, and failure messages are confusing.
    This PR address this problem by refactoring
    `CIRGenFunction::buildBuiltinExpr` to keep the same skeleton as OG
    counterpart `CodeGenFunction::EmitBuiltinExpr`, and add builtin name to
    NYI message
    ghehg authored and smeenai committed Nov 21, 2024
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  115. [CIR][CIRGen] Support initial cases of inheritance ctor/dtor

    Add more NFC skeleton while here.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  118. [CIR][CIRGen] Add missing testcase for null base class

    Forgot to git add in cb0cb34
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  119. [CIR] [CodeGen] Introduce IsFPClassOp to support builtin_isfpclass (l…

    …lvm#971)
    
    The llvm's intrinsic `llvm.is.fpclass` is used to support multiple float
    point builtins:
    https://clang.llvm.org/docs/LanguageExtensions.html#builtin-isfpclass
    
    > The `__builtin_isfpclass()` builtin is a generalization of functions
    > isnan, isinf, isfinite and some others defined by the C standard. It
    tests
    > if the floating-point value, specified by the first argument, falls
    into
    > any of data classes, specified by the second argument.
    
    I meant to support this by creating IntrinsicCallOp directly. But I
    can't make it due to llvm#480 since
    the return type of the intrinsic will mismatch. So I have to create a
    new Op for it. But I feel it might not be too bad. At least it is more
    explicit and more expressive.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  126. [CIR][Transforms] Fix CallConv Function Lowering (llvm#979)

    Re llvm#958 
    
    > Consider the following code snippet `tmp.c`: 
    > ```
    > typedef struct {
    >   int a, b;
    > } S;
    > 
    > void foo(S s) {}
    > ```
    > Running `bin/clang tmp.c -fclangir -Xclang -emit-llvm -Xclang
    -fclangir-call-conv-lowering -S -o -`, we get:
    > ```
    > loc(fused["tmp.c":5:1, "tmp.c":5:16]): error: 'llvm.bitcast' op result
    #0 must be LLVM-compatible non-aggregate type, but got
    '!llvm.struct<"struct.S", (i32, i32)>'
    > ```
    > We can also produce a similar error from this: 
    > ```
    > typedef struct {
    >   int a, b;
    > } S;
    > 
    > S init() { S s; return s; }
    > ```
    > gives:
    > ```
    > loc(fused["tmp.c":5:17, "tmp.c":5:24]): error: 'llvm.bitcast' op
    operand #0 must be LLVM-compatible non-aggregate type, but got
    '!llvm.struct<"struct.S", (i32, i32)>'
    > ```
    > I've traced the errors back to
    `lib/CIR/Dialect/Transforms/TargetLowering/LowerFunction.cpp` in
    `LowerFunction::buildAggregateStore`, `castReturnValue`, and
    `buildAggregateBitcast`.
    > 
    > `withElementType(SrcTy)` is currently commented out/ignored in
    `LowerFunction.cpp`, but it is important.
    > 
    > This PR adds/fixes this and updates one test.
    
    I thought [about
    it](llvm#958 (comment))
    and I understand adding `cir.bitcast` to circumvent the CIR checks, but
    I am not sure how we can ignore/drop the bitcast while lowering. I think
    we can just make the CIR casts correct.
    
    I have added a number of lowering tests to verify that the CIR is
    lowered properly.
    
    cc: @sitio-couto @bcardosolopes.
    bruteforceboy authored and smeenai committed Nov 21, 2024
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  127. [CIR][CIRGen][Lowering] Use same set of annotation-related global var…

    …s for source code global and local vars (llvm#1001)
    
    Now CIR supports annotations for both globals and locals. They all
    should just use the same set of annotation related globals including
    file name string, annotation name string, and arguments. This PR makes
    sure this is the case.
    
    FYI: for the test case we have, OG generates [ code
    ](https://godbolt.org/z/Ev5Ycoqj1), pretty much the same code except
    annotation variable names.
    This would fix the crash like
    > error: redefinition of symbol named '.str.annotation'
    > fatal error: error in backend: The pass manager failed to lower CIR to
    LLVMIR dialect!
    ghehg authored and smeenai committed Nov 21, 2024
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  129. [ClangIR][Lowering] Handle lowered array index (llvm#1008)

    Previously we didn't generate the index for array correct.
    
    The previous test is incorrect already:  globals-neg-index-array.c
    
    ```
    // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-cir %s -o %t.cir
    // RUN: FileCheck --input-file=%t.cir %s
    // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t.ll
    // RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s
    // RUN: %clang_cc1 -x c++ -triple x86_64-unknown-linux-gnu -emit-cir %s -o %t.cir
    // RUN: FileCheck --input-file=%t.cir %s
    // RUN: %clang_cc1 -x c++ -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t.ll
    // RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s
    
    struct __attribute__((packed)) PackedStruct {
        char a1;
        char a2;
        char a3;
    };
    struct PackedStruct packed[10];
    char *packed_element = &(packed[-2].a3);
    // CHECK: cir.global  external @PACKED = #cir.zero : !cir.array<!ty_PackedStruct x 10> {alignment = 16 : i64} loc(#loc5)
    // CHECK: cir.global  external @packed_element = #cir.global_view<@PACKED, [-2 : i32, 2 : i32]>
    // LLVM: @PACKED = global [10 x %struct.PackedStruct] zeroinitializer
    + // LLVM: @packed_element = global ptr getelementptr inbounds ([10 x %struct.PackedStruct], ptr @PACKED, i32 0, i32 -2, i32 2)
    - // LLVM: @packed_element = global ptr getelementptr inbounds ([10 x %struct.PackedStruct], ptr @PACKED,  i32 -2, i32 2)
    ```
    
    Compile it with `-fclangir -S`, we got:
    
    ```
    packed:
            .zero   30
    
    packed_element:
    	.quad	packed-54
    ```
    
    but the traditional pipeline shows (https://godbolt.org/z/eTj96EP1E):
    
    ```
    packed:
            .zero   30
    
    packed_element:
            .quad   packed-4
    ```
    
    this may be a simple mismatch.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  130. [CIR][CIRGen] Removed extra space in "cir.shift( right)" (llvm#997) (l…

    …lvm#1009)
    
    The MLIR docs at https://mlir.llvm.org/docs/DefiningDialects/Operations/#literals
    specify that "An empty literal `` may be used to remove a space that is
    inserted implicitly after certain literal elements", so I inserted one
    before the `right` literal to remove the extra space that was being
    printed. Oddly, the bug is also fixed by inserting an empty literal
    _after_ the `left` literal, which leads me to believe that tablegen is
    inserting an implicit space after the `left` literal.
    MarcoCalabretta authored and smeenai committed Nov 21, 2024
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  132. [ClangIR][CIRGen] Introduce CaseOp and refactor SwitchOp (llvm#1006)

    Close llvm#522
    
    This solves the issue we can't handle `case` in nested scopes and we
    can't handle if the switch body is not a compound statement.
    
    The core idea of the patch is to introduce the `cir.case` operation to
    the language. Then we can get the cases by traversing the body of the
    `cir.switch` operation easily instead of counting the regions and the
    attributes.
    
    Every `cir.case` operation has a region and now the `cir.switch` has
    only one region too. But to make the analysis and optimizations easier,
    I add a new concept `simple form` here. That a simple `cir.switch`
    operation is: all the `cir.case` operation owned by the `cir.switch`
    lives in the top level blocks of the `cir.switch` region and there is no
    other operations except the ending `cir.yield`. This solves the previous
    `simplified for common-case` vs `general solution` discussion in
    llvm#522. After implemented this, I
    feel the correct answer to it is, we want a general solution for
    constructing and lowering the operations but we like simple and common
    case for analysis and optimizations. We just mixed the different phases.
    
    For other semantics, see `CIROps.td`.
    
    For lowering, we can make it generally by lower the cases one by one and
    finally lower the switch itself.
    
    Although this patch has 1000+ lines of changes, I feel it is relatively
    neat especially it erases some odd behaviors before.
    
    Tested with Spec2017's C benchmarks except 500.perlbench_r.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  133. [CIR][ABI][AArch64][Lowering] Initial support for return of struct ty…

    …pes (llvm#1004)
    
    This PR adds a support for return values of a struct type. There are two
    cases that are not covered by this PR and will be added later.
    gitoleg authored and smeenai committed Nov 21, 2024
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  134. [CIR][Lowering] Supports varargs in the CallingConvention pass (llvm#…

    …1005)
    
    This PR adds several copy-pasted lines and a small test and now var args
    seems to work in the calling convention pass
    gitoleg authored and smeenai committed Nov 21, 2024
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  135. [CIR][CodeGen][NFC] Add some missing guards for unreachable

    Reviewers: smeenai
    
    Reviewed By: smeenai
    
    Pull Request: llvm#1022
    lanza authored and smeenai committed Nov 21, 2024
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  136. [CIR][CodeGen] Store the old CIRGenFunction when popping to a new one

    We diverge from CodeGen here by delaying the function emission that
    happens for a global variable. However, due to situations where a global
    can be emitted while building out a function the old CGF might not be
    invalid. So we need to store it here just in case.
    
    Reviewers: bcardosolopes, smeenai
    
    Reviewed By: smeenai
    
    Pull Request: llvm#1023
    lanza authored and smeenai committed Nov 21, 2024
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  137. [CIR][CodeGen][NFC] Implement a missing function

    This was declared but never implemented. Upon first usage in a later
    commit this fails to link.
    
    Reviewers: bcardosolopes, smeenai
    
    Reviewed By: smeenai
    
    Pull Request: llvm#1024
    lanza authored and smeenai committed Nov 21, 2024
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  138. [CIR][ABI][Lowering] Supports function pointers in the calling conven…

    …tion lowering pass (llvm#1003)
    
    This PR adds initial function pointers support for the calling
    convention lowering pass. This is a suggestion, so any other ideas are
    welcome.
    
    Several ideas was described in the llvm#995 and basically what I'm trying to
    do is to generate a clean CIR code without additional `bitcast`
    operations for function pointers and without mix of lowered and initial
    function types.
    
    #### Problem
    Looks like we can not just lower the function type and cast the value
    since too many operations are involved. For instance, for the
    next simple code: 
    ```
    typedef struct {
      int a;
    } S;
    
    typedef int (*myfptr)(S);
    
    int foo(S s) { return 42 + s.a; }
    
    void bar() {
      myfptr a = foo;
    }
    ```
    we get the next CIR for the function `bar` , before the calling
    convention lowering pass:
    ```
    cir.func no_proto  @bar() extra(#fn_attr) {
        %0 = cir.alloca !cir.ptr<!cir.func<!s32i (!ty_S)>>, !cir.ptr<!cir.ptr<!cir.func<!s32i (!ty_S)>>>, ["a", init]
        %1 = cir.get_global @foo : !cir.ptr<!cir.func<!s32i (!ty_S)>> 
        cir.store %1, %0 : !cir.ptr<!cir.func<!s32i (!ty_S)>>, !cir.ptr<!cir.ptr<!cir.func<!s32i (!ty_S)>>>
        cir.return 
      } 
    ```
    As one can see, first three operations depend on the function type. Once
    `foo` is lowered, we need to fix `GetGlobalOp`:
    otherwise the code will fail with the verification error since actual
    `foo` type (lowered) differs from the one currently expected by the
    `GetGlobalOp`.
    First idea would just rewrite only the `GetGlobalOp` and insert a
    bitcast after, so both `AllocaOp` and `StoreOp` would work witth proper
    types.
    
    Once the code will be more complex, we will need to take care about
    possible use cases, e.g. if we use arrays, we will need to track array
    accesses to it as well in order to insert this bitcast every time the
    array element is needed.
    
    One workaround I can think of: we fix the `GetGlobalOp` type and cast
    from the lowered type to the initial, and cast back before the actual
    call happens - but it doesn't sound as a good and clean approach (from
    my point of view, of course).
    
    So I suggest to use type converter and rewrite any operation that may
    deal with function pointers and make sure it has a proper type, and we
    don't have any unlowered function type in the program after the calling
    convention lowering pass.
    
    #### Implementation
    I added lowering for `AllocaOp`, `GetGlobalOp`, and split the lowering
    for `FuncOp` (former `CallConvLoweringPattern`) and lower `CallOp`
    separately.
    Frankly speaking, I tried to implement a pattern for each operation, but
    for some reasons the tests are not passed for
    windows and macOs in this case - something weird happens inside
    `applyPatternsAndFold` function. I suspect it's due to two different
    rewriters used - one in the `LoweringModule` and one in the mentioned
    function.
    So I decided to follow the same approach as it's done for the
    `LoweringPrepare` pass and don't involve this complex rewriting
    framework.
    
    Next I will add a type converter for the struct type, patterns for
    `ConstantOp` (for const arrays and `GlobalViewAttr`)
    In the end of the day we'll have (at least I hope so) a clean CIR code
    without any bitcasts for function pointers.
    
    cc @sitio-couto  @bcardosolopes
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  141. [CIR][CIRGen] Fix "definition with same mangled name" error (llvm#1016)

    We had some incorrect logic when creating functions and getting their
    address which resulted in spurious "definition with the same mangled
    name" errors. Fix that logic to match original CodeGen, which also fixes
    these errors.
    
    It's expected that decls can appear in the deferred decl list multiple
    times, and CodeGen has to guard against that. In the case that triggered
    the error, both `CIRGenerator::HandleInlineFunctionDefinition` and
    CIRGenModule were deferring the declaration.
    
    Something else I discovered here is that we emit these functions in the
    opposite order as regular CodeGen: https://godbolt.org/z/4PrKG7h9b.
    That might be a meaningful difference worth investigating further.
    
    Fixes llvm#991
    smeenai committed Nov 21, 2024
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  142. [CIR][CIRGen][Builtin][Neon] Lower neon_vrshr_n and vrshrq_n to llvm …

    …intrinsics (llvm#1020)
    
    In this PR, also changed `buildNeonShiftVector` to allow it generates
    negative shift values. When the shift value is negative, the shift
    amount vector is not used in any ShiftOp of IR (as they don't need sign
    to know shift direction), instead, it is just input argument to shift
    intrinsic function call.
    ghehg authored and smeenai committed Nov 21, 2024
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  143. [CIR][Dialect][NFC] Fix double whitespaces in cir.func assembly (ll…

    …vm#1028)
    
    This PR fixes the notorious double whitespaces introduced by visibility
    attribute, for `cir.func` only.
    
    It uses "leading whitespace" for every print. And the printing of
    visibility attr is properly guarded by a check of `!isDefault()`.
    
    Double whitespaces in test files are removed.
    seven-mile authored and smeenai committed Nov 21, 2024
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  144. [CIR][CIRGen] Add support for abs (llvm#1011)

    This patch introduces support for the abs family of built-in functions
    (abs, labs, llabs).
    PikachuHyA authored and smeenai committed Nov 21, 2024
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  145. [CIR][Lowering] Transform cir.store of const arrays into cir.copy

    Add lowering prepare logic to lower stores to cir.copy.
    
    This bring LLVM lowering closer to OG and turns out the rest of the compiler
    understands memcpys better and generate better assembly code for at least arm64
    and x86_64.
    
    Note that current lowering to memcpy is only using i32 intrinsic version,
    this PR does not touch that code and that will be addressed in another PR.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  146. [CIR][CIRGen] Fix typo in test check

    POSION -> POISON
    smeenai committed Nov 21, 2024
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  147. [CIR][CIRGen] Fix swapped parameters in test

    Clang recognizes the function anyway, but this is an obvious error.
    smeenai committed Nov 21, 2024
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  148. [CIR][CIRGen][Builtin][Neon] Lower neon_vtst_v and neon_vtstq_v (llvm…

    …#1013)
    
    In addition, this PR enables ZeroAttr of vector type so that CIR can
    generate a vector initialized with all zero values.
    ghehg authored and smeenai committed Nov 21, 2024
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  149. [CIR][CIRGen] Add support for memmove (llvm#1019)

    due to the issue described in
    llvm#1018,
    the MLIR lowering for `memmove` has been excluded in this patch.
    PikachuHyA authored and smeenai committed Nov 21, 2024
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  150. [CIR][ABI][AArch64] support for return struct types greater than 128 …

    …bits (llvm#1027)
    
    This PR adds a support for the return values of struct types > 128 bits
    in size.
    As usually, lot's of copy-pasted lines from the original codegen, except
    the `AllocaOp` replacement for the return value.
    gitoleg authored and smeenai committed Nov 21, 2024
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  151. [CIR][ABI][Lowering] Supports call by function pointer in the calling…

    … convention lowering pass (llvm#1034)
    
    This PR adds a support for calls by  function pointers.
    
    @sitio-couto   I think would be great if you'll also take a look
    gitoleg authored and smeenai committed Nov 21, 2024
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  153. [CIR][ABI][Lowering] Add CCLower support for int128 on x86_64 (llvm#1036

    )
    
    This PR adds calling convention lowering support for the int128 type on
    x86_64.
    
    This is a follow up on llvm#953 .
    Lancern authored and smeenai committed Nov 21, 2024
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  156. [Driver] Bring back -emit-cir as a frontend option

    Upstream accepted this being a ClangOption but it got lost in the
    rebase. Bring it back here.
    lanza authored and smeenai committed Nov 21, 2024
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  157. [CIR] Add a cir.undef attr

    CodeGen sometimes emits undef constants directly, e.g. when initializing
    an empty struct (https://godbolt.org/z/68od33aa8). We want to match this
    behavior, so we need a cir.undef attr to represent the constant. This
    change implements the lowering for the new op, which matches how
    cir.zero is lowered. A follow-up will change CIRGen to use it. It also
    replaces UndefOf with a ConstantOp of UndefAttr to avoid redundancy.
    
    Pull Request resolved: llvm#993
    smeenai committed Nov 21, 2024
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  159. [CIR][CIRGen] Fix const codegen for empty struct

    If an empty struct has a non-trivial constexpr constructor, CodeGen
    emits an undef constant. CIRGen was previously emitting an empty
    attribute, which got interpreted as constant evaluation failing,
    resulting in a global variable initializer being emitted. Change to
    undef to match CodeGen. https://godbolt.org/z/7M9EnEddx has the
    comparison between current CIRGen vs. original CodeGen; it should match
    after this lands.
    
    Pull Request resolved: llvm#994
    smeenai committed Nov 21, 2024
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  167. [CIR][CIRGen][Builtin][Neon] Lower neon_vshr_n_v and neon_vshrq_n_v (l…

    …lvm#1045)
    
    Note in the test file, `test_vshrq_n_s32_32` and `test_vshr_n_u16_16`
    are addition to what traditional clang code gen already has.
    They tested the case where shift amount is the same as element size (
    compiler errors if shift amount is greater than elem size). OG didn't
    test that case here, but [has somewhat tested
    elsewhere](https://github.com/llvm/clangir/blob/3d16a0f8499c43497a18a46d838313ab4deeadea/clang/test/CodeGen/aarch64-neon-shifts.c#L23)
    ghehg authored and smeenai committed Nov 21, 2024
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  168. [ClangIR][CIRGen] Handle nested union in arrays of struct (llvm#1007)

    Reproducer:
    
    ```
    struct nested
    {
      union {
        const char *single;
        const char *const *multi;
      } output;
    };
    static const char * const test[] = {
      "test",
    };
    const struct nested data[] = 
    {
        {
            {
                .multi = test,
            },
        },
        {
            {
                .single = "hello",
            },
        },
    };
    ```
    
    ClangIR now failed to recognize `data` as an array since it failed to
    recognize the initializer for union. This comes from a fundamental
    difference between CIR and LLVM IR. In LLVM IR, the union is simply a
    struct with the largest member. So it is fine to have only one init
    element. But in CIR, the union has the information for all members. So
    if we only pass a single init element, we may be in trouble. We solve
    the problem by appending placeholder attribute for the uninitialized
    fields.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  170. [CIR][CIRGen] Support __builtin___memcpy_chk (llvm#1032)

    This is just the usual adaption from CodeGen.
    smeenai committed Nov 21, 2024
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  171. [CIR][CIRGen] Support __builtin___memset_chk (llvm#1053)

    This follows the same implementation as CodeGen. llvm#1051
    tracks potentially switching to a different strategy in the future.
    smeenai committed Nov 21, 2024
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  172. [CIR][CIRGen] Emit required vtables (llvm#1054)

    We were missing an override for this previously and thus not emitting
    vtables when key functions were defined.
    smeenai committed Nov 21, 2024
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  173. [CIR][CodeGen][NFC] Add getMLIRContext to CIRGenModule

    Upstream review of a PR requested that we be more explicit with
    differentiating things from MLIR to similarly named things from clang
    AST/LLVM/etc. So add an MLIRContext getter that we should start using.
    
    Reviewers: bcardosolopes
    
    Reviewed By: bcardosolopes
    
    Pull Request: llvm#1047
    lanza authored and smeenai committed Nov 21, 2024
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  174. [CIR][Dialect][NFC] Add some helpers to LoadOp

    These are just missing getters/setters that should be there already.
    They are in use in a patch coming up. I'm splitting them out here for
    reviewability.
    
    Reviewers: bcardosolopes
    
    Pull Request: llvm#1021
    lanza authored and smeenai committed Nov 21, 2024
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  175. [CIR][ABI][AArch64][Lowering] Initial support for passing struct types (

    llvm#1041)
    
    This PR adds a support for some basic cases for struct types passed by
    value.
    
    The hardest part probably is `createCoercedStore` function, which I
    rewrote significantly in order to make it closer to the orignal codegen.
    gitoleg authored and smeenai committed Nov 21, 2024
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  176. [CIR][ABI][AArch64] convers aarch64_be return struct case (llvm#1049)

    This PR adds a support return struct as a value for one missed case for
    AArch64 big endian arch
    gitoleg authored and smeenai committed Nov 21, 2024
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  177. [CIR][CIRGen][Builtin][NFC] Refactor IntrinsicCallOp (llvm#1056)

    `IntrinsicCallOp` is now named `LLVMIntrinsicCallOp` to better reflect
    its purpose. And now In CIR, we do not have "llvm" prefix which will be
    added later during LLVMLowering.
    ghehg authored and smeenai committed Nov 21, 2024
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  178. [CIR][CIRGen][Builtin] Support __builtin_char_memchr (llvm#1050)

    This should fix NYI like `BI__builtin_char_memchr NYI UNREACHABLE
    executed at clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp:1402`
    The test is from
    [OG](https://github.com/llvm/clangir/blob/3ef67c19917ad26ed8b19d4d13a43458a952fddb/clang/test/CodeGenCXX/builtins.cpp#L64)
    
    see builtin's prototype 
    [char *__builtin_char_memchr(const char *haystack, int needle, size_t
    size);
    ](https://clang.llvm.org/docs/LanguageExtensions.html#string-builtins)
    ghehg authored and smeenai committed Nov 21, 2024
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  179. [CIR] fix getTypeSizeInBits with fp80 and fp128 (llvm#1058)

    fix llvm#1057
    
    ---------
    
    Co-authored-by: Bruno Cardoso Lopes <[email protected]>
    Co-authored-by: Sirui Mu <[email protected]>
    3 people authored and smeenai committed Nov 21, 2024
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  180. [CIR][ABI][Lowering] covers return struct case with coercion through …

    …memory (llvm#1059)
    
    This PR covers one more case for return values of struct type, where
    `memcpy` is emitted.
    gitoleg authored and smeenai committed Nov 21, 2024
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  183. [CIR][Lowering] Add LLVM lowering support for cir.assume (llvm#1066)

    This PR adds LLVMIR lowering support for `cir.assume`,
    `cir.assume.aligned`, and `cir.assume.separate_storage`.
    Lancern authored and smeenai committed Nov 21, 2024
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  184. [CIR][CodeGen] Fix the default linkage of string literals (llvm#1067)

    In OG CodeGen, string literals has `private` linkage as default (marked
    by `cir_private` in CIR assembly). But CIR uses `internal`, which is
    probably an ancient typo.
    
    This PR keeps align with it and thus modifies the existing test files.
    seven-mile authored and smeenai committed Nov 21, 2024
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  185. [CIR][ABI][AArch64][Lowering] support for passing struct types > 128 …

    …bits (llvm#1068)
    
    This PR adds a partial support for so-called indirect function arguments
    for struct types with size > 128 bits for aarch64.
    
    #### Couple words about the implementation
    The hard part is that it's not one-to-one copy from the original
    codegen, but the code is inspired by it of course.
    In the original codegen there is no much job is done for the indirect
    arguments inside the loop in the `EmitFunctionProlog`, and additional
    alloca is added in the end, in the call for `EmitParamDecl` function.
    
    In our case, for the indirect argument (which is a pointer) we replace
    the original alloca with a new one, and store the pointer in there. And
    replace all the uses of the old alloca with the load from the new one,
    i.e. in both cases users works with the pointer to a structure.
    
    Also, I added several missed features in the `constructAttributeList`
    for indirect arguments, but didn't preserve the original code structure,
    so let me know if I need to do it.
    gitoleg authored and smeenai committed Nov 21, 2024
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  186. [CIR][CIRGen] Add aliases for virtual dtors calls

    Note that we lack two pieces of support for aliases in LLVM IR dialect
    globals: the `alias` keyword and function types `void (ptr)`, this needs
    to be done before we can nail this for good, but it's outside the scope
    of this commit.
    
    The behavior is slightly different under -O1, which will be addressed next.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  187. [CIR][NFC] Fix unused warning

    bcardosolopes authored and smeenai committed Nov 21, 2024
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  188. [CIR][CodeGen] Use the same SSA name as OG's for string literals (llv…

    …m#1073)
    
    This PR changes the naming format of string literals from `.str1` to
    `.str.1`, making it easier to reuse the existing testcases of OG
    CodeGen.
    seven-mile authored and smeenai committed Nov 21, 2024
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  189. [CIR] Make X86ArgClass an enum class (llvm#1080)

    It's currently polluting the `cir` namespace with very generic symbols
    like `Integer` and `Memory`, which is pretty confusing. `X86_64ABIInfo`
    already has `Class` alias for `X86ArgClass`, so we can use that alias to
    qualify all uses.
    smeenai committed Nov 21, 2024
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  190. [CIR][CIRGen] Fix some alias issues under -O1 and above

    Note that there are still missing pieces, which will be incrementally
    addressed.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  192. [CIR][NFC] Update test comment

    Just verified this is actually done by some LLVM optimization, not by the
    frontend emitting directly, so this is a non-goal now, since CIR can also use
    LLVM opts to do the same once we have real global alias.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  193. [CIR][NFC] More comments removed for ir differences

    Also verified this does not apply anymore, we match -O0. The only
    remaing part is to lower to proper LLVM globals once LLVM IR dialect
    gets the global alias support.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  196. [CIR] Extend support for floating point attributes (llvm#572)

    This commit extends the support for floating point attributes parsing by
    using
    the new `AsmParser::parseFloat(fltSemnatics, APFloat&)` interface.
    As a drive-by, this commit also harmonizes the cir.fp print/parse
    namespace
    usage, and adds the constraint of supporting only "CIRFPType"s for
    cir.fp in
    tablegen instead of verifying it manually in the parsing logic.
    
    ---
    
    This commit is based on top of a to-be-upstreamed commit which extends
    the upstream MLIR float type parsing. Upstream parsing of float type has
    full capability only through parsing the Builtin Dialect's `FloatAttr`.
    Thos commit exposes the same capabilities to downstream users.
    
    ---
    
    This PR should resolve (at least) `GCC-C-execute-ieee-fp-cmp-2` and
    `GCC-C-execute-ieee-fp-cmp-4`, paving the way to other
    `GCC-C-execute-ieee-*` tests passing from the SingleSource suite. It
    resolves llvm#559 .
    orbiri authored and smeenai committed Nov 21, 2024
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  198. [CIR][CIRGen][Builtin][Neon] Lower neon_vaesmcq_u8 (llvm#1072)

    The test case is from
    [clang/test/CodeGen/neon-crypto.c](https://github.com/llvm/clangir/blob/dbf320e5c3db0410566ae561067c595308870bad/clang/test/CodeGen/neon-crypto.c#L28)
    Need a dedicated test file as RunOptions has crypto related target
    features.
    ghehg authored and smeenai committed Nov 21, 2024
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  199. [CIR][CIRGen] Move CIRGen types into clang::CIRGen (llvm#1082)

    llvm#1025 explains why we want to move
    the CIR dialect from the `mlir::cir` to the `cir` namespace. To avoid
    overloading the `cir` namespace too much afterwards, move all symbols
    whose equivalents live inside the `clang::CodeGen` namespace to a new
    `clang::CIRGen` namespace, so that we match the original CodeGen's
    structure more closely.
    
    There's some symbols that live under `clang/include/clang/CIR` whose
    equivalents live in `clang/lib/CodeGen` and are in the `clang::CodeGen`
    namespace. We have these symbols in a common location since they're also
    used by lowering, so I've also left them in the `cir` namespace. Those
    symbols are:
    - AArch64ABIKind
    - ABIArgInfo
    - FnInfoOpts
    - TypeEvaluationKind
    - X86AVXABILevel
    
    This is a pretty large PR out of necessity. To make it slightly more
    reviewable, I've split it out into three commits (which will be squashed
    together when the PR lands):
    - The first commit manually switches places to the `clang::CIRGen`
      namespace. This has to be manual because we only want to move things
      selectively.
    - The second commit adjusts namespace prefixes to make builds work. I
      ran https://gist.github.com/smeenai/f4dd441fb61c53e835c4e6057f8c322f
      to make this change. The script is idempotent, and I added
      substitutions one at a time and reviewed each one afterwards (using
      `git diff --color-words=.`) to ensure only intended changes were being
      made.
    - The third commit runs `git clang-format`.
    
    Because I went one-by-one with all my substitutions and checked each one
    afterwards, I'm pretty confident in the validity of all the changes
    (despite the size of the PR).
    smeenai committed Nov 21, 2024
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  200. [CIR][ABI][AArch64][Lowering] Support unions (llvm#1075)

    As the title says, this PR adds support for unions for AArch64 lowering.
    The idea is basically the same as the
    [original](https://github.com/llvm/clangir/blob/dbf320e5c3db0410566ae561067c595308870bad/clang/lib/AST/RecordLayoutBuilder.cpp#L2111)
    codegen, and I added a couple of tests.
    bruteforceboy authored and smeenai committed Nov 21, 2024
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  201. [CIR] Merge the mlir::cir namespace into cir (llvm#1084)

    llvm#1025 explains why we want to move
    the CIR dialect from the `mlir::cir` to the `cir` namespace.
    
    This is a large PR, and I've split it out into four commits (that'll be
    squashed when landing). The first commit changes `mlir::cir` to `cir`
    everywhere. This was originally done mechanically with:
    
    ```
    find clang \( -name '*.h' -o -name '*.cpp' -o -name '*.td' \) -print0 | xargs -0 perl -pi -e 's/mlir::cir/cir/g'
    find clang \( -name '*.h' -o -name '*.cpp' \) -print0 | xargs -0 perl -pi -e 's/::cir/cir/g'
    find clang \( -name '*.h' -o -name '*.cpp' \) -print0 | xargs -0 perl -0777 -pi -e 's/namespace mlir \{\nnamespace cir \{/namespace cir {/g'
    find clang \( -name '*.h' -o -name '*.cpp' \) -print0 | xargs -0 perl -0777 -pi -e 's!\} // namespace cir\n\} // namespace mlir!} // namespace cir!g'
    ```
    
    It then required some manual fixups to address edge cases.
    
    Code that lived under `mlir::cir` could refer to the `mlir` namespace
    without qualification, but after the namespace change, we need to
    explicitly qualify all our usages. This is done in the second commit via
    https://gist.github.com/smeenai/996200fd45ad123bbf22b412d59479b6, which
    is an idempotent script to add all qualifications. I added cases to the
    script one at a time and reviewed each change afterwards to ensure we
    were only making the intended modifications, so I feel pretty confident
    in the end result. I also removed `using namespace llvm` from some
    headers to avoid conflicts, which in turn required adding some `llvm::`
    qualifiers as well.
    
    The third commit fixes a test, since an error message now contains the
    mlir namespace. Similar tests in flang also have the namespace in their
    error messages, so this is an expected change.
    
    The fourth change runs `git clang-format`. Unfortunately, that doesn't
    work for TableGen files, so we'll have a few instances of undesirable
    formatting left there. I'll look into fixing that as a follow-up.
    
    I validated the end result by examining the symbols in the built Clang
    binary. There's nothing in the `mlir::cir` namespace anymore.
    https://gist.github.com/smeenai/8438fd01588109fcdbde5c8652781dc0 had the
    symbols which lived in `cir` and should have moved to `clang::CIRGen`,
    and I validated that all the symbols were moved, with the exceptions
    noted in llvm#1082 and the duplicated
    symbols noted in llvm#1025.
    smeenai committed Nov 21, 2024
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  202. [CIR] Merge two copies of CIRGenAction.h (llvm#1085)

    We have both clang/include/clang/CIRFrontendAction/CIRGenAction.h and
    clang/include/clang/cir/FrontendAction/CIRGenAction.h, which is a
    historical artifact. The latter is what's being upstreamed, so merge the
    former into it to avoid any confusion.
    smeenai committed Nov 21, 2024
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  205. [CIR][CIRGen] Change buildX functions to emitX (llvm#1093)

    The buildX naming convention originated when the CIRGen implementation
    was planned to be substantially different from original CodeGen. CIRGen
    is now a much closer adaption of CodeGen, and the emitX to buildX
    renaming just makes things more confusing, since CodeGen also has some
    helper functions whose names start with build or Build, so it's not
    immediately clear which CodeGen function corresponds to a CIRGen buildX
    function. Rename the buildX functions back to emitX to fix this.
    
    This diff was generated mostly mechanically. I searched for all buildX
    functions in CIRGen and all emitX or buildX functions in CodeGen:
    
    ```
    rg '\b[Bb]uild[A-Z][A-Za-z0-9_]*\b' clang/lib/CIR/CodeGen -Io | sort -u -o /tmp/buildfuncs
    rg '\b([Ee]mit|[Bb]uild)[A-Z][A-Za-z0-9_]*\b' clang/lib/CodeGen -Io | sort -u -o /tmp/emitfuncs
    ```
    
    I used a simple Python script to find corresponding functions:
    https://gist.github.com/smeenai/02be7ced8564cef5518df72606ec7b19.
    https://gist.github.com/smeenai/6ffd67be4249c8cebdd7fa99cfa4f13c is the
    resulting list of correspondences. This isn't 100% accurate because it's
    not accounting for the files that the functions are present in, but
    that's pretty unlikely to matter here, so I kept it simple.
    
    The buildX functions in CIRGen which correspond to an emitX function in
    CodeGen should be changed, and the ones which correspond to a BuildX
    function in CodeGen should not be changed. That leaves some functions
    without any correspondences, which required a judgement call. I scanned
    through all those functions, and buildVirtualMethodAttr was the only one
    that seemed like it shouldn't be changed to emit. I performed the
    replacement as follows:
    
    ```
    funcs="$(awk '(/-> [Ee]/ || !/->/) && !/buildVirtualMethodAttr/ { print substr($1, 6) }' /tmp/corrfuncs | paste -sd '|')"
    find clang/include/clang/CIR clang/lib/CIR/{CodeGen,FrontendAction} \( -name '*.h' -o -name '*.cpp' \) -print0 | \
      xargs -0 perl -pi -e "s/\bbuild($funcs)\\b/emit\\1/g"
    ```
    
    The mechanical changes are in the first commit of this PR. There was a
    manual fixup required for a token pasting macro in CIRGenExprScalar.cpp,
    which is the second commit. I then ran `git clang-format`, which is the
    third commit. (They'll be squashed together when the PR is committed.)
    smeenai committed Nov 21, 2024
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  206. [CIR][NFC] Move LoweringPrepare into CIRGen (llvm#1092)

    Move LP into CIRGen and give it a handle on the CIRGenModule. A lot of
    code has been duplicated from CIRGen into cir/Dialect/Transforms in
    order to let LP live there, but with more necessary CIRGen features
    (e.g. EH scope and cleanups) going to be used in LP it doesn't make
    sense to keep it separate. Add this patch that just refactors
    LoweringPrepare into the CIRGen directory and give it a handle on the
    CGM.
    lanza authored and smeenai committed Nov 21, 2024
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  207. [CIR][CodeGen][LowerToLLVM] String literals for OpenCL (llvm#1091)

    This PR supports string literals in OpenCL end to end, making it
    possible to use `printf`. This involves two changes:
    
    * In CIRGen, ensure we create the global symbol for string literals with
    correct `constant` address space.
    * In LowerToLLVM, make the lowering of `GlobalViewAttr` aware of the
    upstream address space.
    
    Other proper refactors are also applied.
    
    Two test cases from OG CodeGen are reused. `str_literals.cl` is the
    primary test, while `printf.cl` is the bonus one.
    seven-mile authored and smeenai committed Nov 21, 2024
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  208. Revert "[CIR][NFC] Move LoweringPrepare into CIRGen (llvm#1092)"

    This reverts commit 4463352.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  209. [CIR][CIRGen] support builtin signbit (llvm#1033)

    This patch adds support for the `__builtin_signbit` intrinsic. The
    intrinsic requires special handling for PowerPC; however, since ClangIR
    does not currently support PowerPC, this handling is omitted in this
    implementation.
    PikachuHyA authored and smeenai committed Nov 21, 2024
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  210. [CIR][CIRGen][Builtin] Support __builtin_memcpy_inline (llvm#1069)

    The test code is from [OG's
    clang/test/CodeGen/builtins-memcpy-inline.c](https://github.com/llvm/clangir/blob/5f1afad625f1292ffcf02c36402d292c46213c86/clang/test/CodeGen/builtins-memcpy-inline.c#L7)
    Also, a little design choice when introducing MemCpyInlineOp, I chose to
    let it inherit CIR_MemCpyOp, so in future when we optimize MemCpy like
    Ops, we'd have cleaner and more unified code.
    However, the cost is that during LLVM lowering I'd have to convert the
    length from ConstOp into IntegerAttr as that's [what LLVM dialect is
    expecting](https://mlir.llvm.org/docs/Dialects/LLVM/#llvmintrmemcpyinline-llvmmemcpyinlineop)
    ghehg authored and smeenai committed Nov 21, 2024
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  211. [CIR][CIRGen][Builtin] Support __sync_add_and_fetch (llvm#1077)

    Notable change is to introduce helper function `buildBinaryAtomicPost`
    which models on [OG's
    `EmitBinaryAtomicPost`](https://github.com/llvm/clangir/blob/dbf320e5c3db0410566ae561067c595308870bad/clang/lib/CodeGen/CGBuiltin.cpp#L340C15-L340C35).
    Comparing to `EmitBinaryAtomicPost`, `buildBinaryAtomicPost` is more
    concise as OG's ``EmitBinaryAtomicPost`` duplicates quite a bit of code
    from
    [MakeBinaryAtomicValue](https://github.com/llvm/clangir/blob/dbf320e5c3db0410566ae561067c595308870bad/clang/lib/CodeGen/CGBuiltin.cpp#L340)
    Also, didn't implement invert as __sync_add_and_fetch does not need it,
    but will add it (which is a trivial work) when we implement a builtin
    that needs it.
    Test cases are from
    [OG](https://github.com/llvm/clangir/blob/dbf320e5c3db0410566ae561067c595308870bad/clang/test/CodeGen/Atomics.c#L134)
    ghehg authored and smeenai committed Nov 21, 2024
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  212. [CIR][CodeGen][NFC] Simplify replacing initializer of static decls (l…

    …lvm#1095)
    
    When emitting initializers for static declarations, it's essential to
    ensure that the `cir.global` operation aligns its type with that of the
    initializer.
    
    The original approach creates a new global op and copies every attribute
    from the old one. But just `setSymType` should work well.
    
    This also removes missing feature flags there.
    seven-mile authored and smeenai committed Nov 21, 2024
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  213. [CIR][Dialect][NFC] Fix double white spaces in cir.global assembly (l…

    …lvm#1096)
    
    Following llvm#1009 and llvm#1028, this PR removes the double white spaces in
    the assembly format of `cir.global` op.
    
    It's basically some `mlir-tablegen`-builtin magic: With
    `constBuilderCall` specified, we can apply `DefaultValuedAttr` with any
    default value we can construct from constant values. Then we can easily
    omit the default in assembly. Hence, we don't need to compromise
    anything for the wrapper attribute `cir::VisibilityAttr`.
    
    Similarly to llvm#1009, an empty literal ``` `` ``` is used to omit the
    leading space emitted by inner attribute.
    
    The test case `visibility-attribute.c` is modified to save the
    intermediate CIR to disk and reflect the effects.
    
    Double whitespaces in other test files are removed.
    seven-mile authored and smeenai committed Nov 21, 2024
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  214. [CIR] Properly ensure terminating IfOp and ScopeOp regions (llvm#1097)

    The code changes modify the `cir.if` and `cir.scope` operations to
    ensure that their code regions are properly terminated. Previously, the
    if/else and scope regions could be left completely empty which is
    non-trivially expected in most code inspecting these ops. This led, for
    example, to a crash when and if clause was left empty in the source
    code.
    
    Now, the child regions must be terminated, either explicitly or
    implicitly by the default builder and assembly parser. This change
    improves the clarity and correctness of the code.
    orbiri authored and smeenai committed Nov 21, 2024
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  216. [CIR][NFC] Fix formatting (llvm#1105)

    This got misaligned after the namespace changes.
    smeenai committed Nov 21, 2024
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  217. [CIR][NFC] Conform if/else lowering order to match clang's output (ll…

    …vm#1107)
    
    Before the commit, when flattening if/else clauses - the else body came
    before the "then" body, as opposed to clang's output order.
    
    This commit reverses this and hopefully allows easier comparisson
    between clang's output and cir's.
    orbiri authored and smeenai committed Nov 21, 2024
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  218. [CIR] [Lowering] [X86_64] Support VAArg in shape (llvm#1100)

    This patch implements transformations for VAArg in X86_64 ABI **in
    shape**. `In shape` means it can't work properly due to the dependent
    X86_64 ABI is not robust. e.g., when we want to use VAArg with `long
    double`, we need llvm#1087.
    
    This patch literally implement
    https://github.com/llvm/llvm-project/blob/d233fedfb0de882353c348cd1ac57dab619efa6d/clang/lib/CodeGen/Targets/X86.cpp#L3015-L3240
    in CIR.
    
    There some differences due to the traditional pipeline are converting
    AST to LLVM and we're transforming CIR to CIR. And also to get the ABI
    Info, I moved `X86_64ABIInfo` to the header.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  220. [CIR][ABI][AArch64] Support struct passing with coercion through memo…

    …ry (llvm#1111)
    
    This PR adds a support for one more case of passing structs by value,
    with `memcpy` emitted.
    
    First of all, don't worry - despite the PR seems big, it's basically
    consist of helpers + refactoring. Also, there is a minor change in the
    `CIRBaseBuilder` - I made static the `getBestAllocaInsertPoint` method
    in order to call it from lowering - we discussed once - and I here we
    just need it (or copy-paste the code, which doesn't seem good).
    
    I will add several comments in order to simplify review.
    gitoleg authored and smeenai committed Nov 21, 2024
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  223. [CIR][CIRGen] Support __builtin_signbitl (llvm#1117)

    follow llvm#1033
    handle `LongDoubleType` with `FP80Type`.
    PikachuHyA authored and smeenai committed Nov 21, 2024
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  224. [CIR][Dialect][NFC] Refactor hardcoded attribute name strings (llvm#1122

    )
    
    As title, this patch refactors raw string literals for (module)
    attribute names into static methods of `CIRDialect`, following the
    convention of MLIR.
    seven-mile authored and smeenai committed Nov 21, 2024
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  225. [CIR][ABI][Lowering] Fixes calls with union type (llvm#1119)

    This PR handles calls with unions passed by value in the calling
    convention pass.
    
    #### Implementation
    As one may know, data layout for unions in CIR and in LLVM differ one
    from another. In CIR we track all the union members, while in LLVM IR
    only the largest one.
    
    And here we need to take this difference into account: we need to find a
    type of the largest member and treat it as the first (and only) union
    member in order to preserve all the logic from the original codegen.
    
    There is a method `StructType::getLargestMember` - but looks like it
    produces different results (with the one I implemented or better to say
    copy-pasted). Maybe it's done intentionally, I don't know.
    
    The LLVM IR produced has also some difference from the original one. In
    the original IR `gep` is emitted - and we can not do the same. If we
    create `getMemberOp` we may fail on type checking for unions - since the
    first member type may differ from the largest type. This is why we
    create `bitcast` instead. Relates to the issue llvm#1061
    gitoleg authored and smeenai committed Nov 21, 2024
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  226. [CIR][Builtin][NFC] More informative llvm_unreachable message in CIRG…

    …enBuiltinAArch64.cpp (llvm#1124)
    
    We are still seeing crash message like `NYI UNREACHABLE executed at
    clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp:3304`, which is not
    convenient for triaging as our code base changes so fast, line number
    doesn't help much.
    So, here we replaced most of `llvm_unreachable("NYI")` with more
    informative message.
    ghehg authored and smeenai committed Nov 21, 2024
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  228. [CIR][LowerToLLVM] Lowering triple from cir.triple attribute (llvm#…

    …1125)
    
    Currently, the final `target triple` in LLVM IR is set in
    `CIRGenAction`, which is not executed by cir tools like `cir-translate`.
    This PR delay its assignment to LLVM lowering, enabling sharing the
    emitting of `target triple` between different invoking paths.
    seven-mile authored and smeenai committed Nov 21, 2024
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  229. [CIR][ABI][AArch64][Lowering] Support calls for struct types > 128 bi…

    …ts (llvm#1074)
    
    As the title says, this PR adds support for calls with struct types >
    128 bits, building upon this
    [PR](llvm#1068).
    
    The idea is gotten from the original Codegen, and I have added a couple
    of tests.
    bruteforceboy authored and smeenai committed Nov 21, 2024
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  230. [CIR][CIRGen][Builtin] Support __builtin_elementwise_abs and extend A…

    …bsOp to take vector input (llvm#1099)
    
    Extend AbsOp to take vector of int input. With it, we can support
    __builtin_elementwise_abs.
    We should in the next PR extend FpUnaryOps to support vector type input
    so we won't have blocker to implement all elementwise builtins
    completely. Now just temporarily have missingFeature
    `fpUnaryOPsSupportVectorType`.
    Currently, int type UnaryOp support vector type. 
    
    FYI:
    [clang's documentation about elementwise
    builtins](https://clang.llvm.org/docs/LanguageExtensions.html#vector-builtins)
    ghehg authored and smeenai committed Nov 21, 2024
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  231. [ClangIR][Lowering][NFC] Split LowerToLLVM.h from LowerToLLVM.cpp (ll…

    …vm#1102)
    
    This is a NFC patch that moves declaration from  LowerToLLVM.cpp.
    
    The motivation of the patch is, we hope we can use the abilities from
    MLIR's standard dialects without lowering **ALL** clangir operation to
    MLIR's standard dialects. For example, currently we have 86 operations
    in LowerToLLVM.cpp but only 45 operations under though MLIR. It won't be
    easy to add proper lowering for all operation to **different** dialects.
    
    I think the solution may be to allow **mixed** IR. So that we can
    lowering CIR to MLIR's standard dialects partially and we can use some
    existing analysis and optimizations in MLIR and then we can lower all of
    them (the MLIR dialects and unlowered clangir) to LLVM IR. The hybrid IR
    is one of the goals of MLIR as far as I know.
    
    NOTE: I completely understand that the DirectlyLLVM pipeline is the
    tier-1 pipeline that we want to support. The idea above won't change
    this. I just want to offer some oppotunities for the downstream projects
    and finally some chances to improve the overall ecosystem.
    ChuanqiXu9 authored and smeenai committed Nov 21, 2024
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  232. [CIR][CIRGen][Builtin][Neon] Lower neon_splat_lane, neon_splat_laneq…

    …, neon_splatq_lane and neon_splatq_laneq (llvm#1126)
    ghehg authored and smeenai committed Nov 21, 2024
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  234. [CIR][CIRGen] Support for visual bases in getAddressOfBaseClass

    This is going to be raised in follow up work, which is hard to
    do in one go because createBaseClassAddr goes of the OG skeleton
    and ideally we want ApplyNonVirtualAndVirtualOffset to work naturally.
    
    This also doesn't handle null checks, coming next.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  238. [CIR][CIRGen][NFC] More skeleton conformance

    Now that we fixed the dep on VBase, clean up the rest of the function.
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  239. [CIR][CIRGen] Teach all uses of ApplyNonVirtualAndVirtualOffset to us…

    …e BaseClassAddrOp
    bcardosolopes authored and smeenai committed Nov 21, 2024
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  240. [CIR] Force cir.cmp to always return bool (llvm#1110)

    It was always the intention for `cir.cmp` operations to return bool
    result. Due
    to missing constraints, a bug in codegen has slipped in which created
    `cir.cmp`
    operations with result type that matches the original AST expression
    type. In
    C, as opposed to C++, boolean expression types are "int". This resulted
    with
    extra operations being codegened around boolean expressions and their
    usage.
    
    This commit both enforces `cir.cmp` in the op definition and fixes the
    mentioned bug.
    orbiri authored and smeenai committed Nov 21, 2024
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  242. [CIR][CIRGen][TBAA] Initial TBAA support (llvm#1116)

    This is the first patch to support TBAA, following the discussion at
    llvm#1076 (comment)
    
    - add skeleton for CIRGen, utilizing `decorateOperationWithTBAA`
    - add empty implementation in `CIRGenTBAA`
    - introduce `CIR_TBAAAttr` with empty body
    - attach `CIR_TBAAAttr` to `LoadOp` and `StoreOp`
    - no handling of vtable pointer
    - no LLVM lowering
    PikachuHyA authored and smeenai committed Nov 21, 2024
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  243. [CIR][ABI][AArch64][Lowering] Support structures with padding (llvm#1118

    )
    
    The title describes the purpose of the PR. It adds initial support for
    structures with padding to the call convention lowering for AArch64.
    
    I have also _initial support_ for the missing feature
    [FinishLayout](https://github.com/llvm/clangir/blob/5c5d58402bebdb1e851fb055f746662d4e7eb586/clang/lib/AST/RecordLayoutBuilder.cpp#L786)
    for records, and the logic is gotten from the original codegen.
    
    Finally, I added a test for verification.
    bruteforceboy authored and smeenai committed Nov 21, 2024
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Commits on Nov 22, 2024

  1. [CIR][NFC] Refactor code for populating LLVM conversion patterns (llv…

    …m#1152)
    
    The function `populateCIRToLLVMConversionPatterns` contains a spaghetti
    of LLVM dialect conversion patterns, which results in merge conflicts
    very easily. Besides, a few patterns are even registered for more than
    once, possibly due to careless resolution of merge conflicts.
    
    This PR attempts to mitigate this problem. Pattern names now are sorted
    in alphabetical order, and each source code line now only lists exactly
    one pattern name to reduce potential merge conflicts.
    Lancern authored and smeenai committed Nov 22, 2024
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Commits on Nov 23, 2024

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  2. [CIR][Builtin][Neon][NFC] Introduce skeleton of emitCommonNeonSISDBui…

    …ltinExpr (llvm#1133)
    
    This PR is a NFC as we just NYI every builtID of neon SISD. We will
    implement them in subsequent PRs.
    ghehg authored Nov 23, 2024
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  4. [CIR][FlattenCFG] Let results of CIR ScopeOp forwarded during Flatten…

    …CFG (llvm#1147)
    
    This PR implements NYI in CIRScopeOpFlattening. It seems to me the best
    way is to let results of ScopeOp forwarded as block arguments of the
    last block split from the cir.scope block.
    ghehg authored Nov 23, 2024
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  5. [CIR][NFC] move data member pointer lowering to CXXABI

    This patch moves the lowering code for data member pointers from the conversion
    patterns to the implementation of CXXABI because this part should be ABI-
    specific.
    Lancern committed Nov 23, 2024
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